java -Xmx4000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCHC.xml --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -s ../../../trunk/examples/settings/chccomp2018/chcToBoogie_automizer.epf -i /storage/chc-comp/vmt-chc-benchmarks/lustre/cd_e7_621.smt2 -------------------------------------------------------------------------------- This is Ultimate 0.1.23-55b8104 [2018-06-18 14:06:27,150 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-06-18 14:06:27,152 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-06-18 14:06:27,167 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-06-18 14:06:27,167 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-06-18 14:06:27,168 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-06-18 14:06:27,169 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-06-18 14:06:27,171 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-06-18 14:06:27,173 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-06-18 14:06:27,174 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-06-18 14:06:27,175 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-06-18 14:06:27,176 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-06-18 14:06:27,177 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-06-18 14:06:27,181 INFO L177 SettingsManager]: ChcToBoogie provides no preferences, ignoring... [2018-06-18 14:06:27,181 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-06-18 14:06:27,182 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-06-18 14:06:27,184 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-06-18 14:06:27,193 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-06-18 14:06:27,194 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-06-18 14:06:27,195 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-06-18 14:06:27,199 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-06-18 14:06:27,201 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-06-18 14:06:27,202 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-06-18 14:06:27,203 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-06-18 14:06:27,204 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-06-18 14:06:27,204 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-06-18 14:06:27,205 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-06-18 14:06:27,208 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-06-18 14:06:27,209 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-06-18 14:06:27,209 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-06-18 14:06:27,210 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-06-18 14:06:27,211 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-06-18 14:06:27,215 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-06-18 14:06:27,216 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-06-18 14:06:27,217 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-06-18 14:06:27,217 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/chccomp2018/chcToBoogie_automizer.epf [2018-06-18 14:06:27,235 INFO L110 SettingsManager]: Loading preferences was successful [2018-06-18 14:06:27,237 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-06-18 14:06:27,237 INFO L131 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2018-06-18 14:06:27,238 INFO L133 SettingsManager]: * Logger pattern=[%d{ISO8601} %-5p]: %m%n [2018-06-18 14:06:27,239 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-06-18 14:06:27,239 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-06-18 14:06:27,239 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-06-18 14:06:27,240 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-06-18 14:06:27,240 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-06-18 14:06:27,240 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-06-18 14:06:27,240 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-06-18 14:06:27,240 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-06-18 14:06:27,241 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-06-18 14:06:27,241 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-06-18 14:06:27,242 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-06-18 14:06:27,242 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-06-18 14:06:27,242 INFO L133 SettingsManager]: * Compute trace for counterexample result=false [2018-06-18 14:06:27,243 INFO L131 SettingsManager]: Preferences of SmtParser differ from their defaults: [2018-06-18 14:06:27,244 INFO L133 SettingsManager]: * Use TreeAutomizer as solver for the given file (assumes the file contains Horn clauses only).=true [2018-06-18 14:06:27,294 INFO ]: Repository-Root is: /tmp [2018-06-18 14:06:27,311 INFO ]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-06-18 14:06:27,316 INFO ]: [Toolchain 1]: Toolchain data selected. [2018-06-18 14:06:27,318 INFO ]: Initializing SmtParser... [2018-06-18 14:06:27,318 INFO ]: SmtParser initialized [2018-06-18 14:06:27,319 INFO ]: [Toolchain 1]: Parsing single file: /storage/chc-comp/vmt-chc-benchmarks/lustre/cd_e7_621.smt2 [2018-06-18 14:06:27,322 INFO ]: Parsing .smt2 file as a set of Horn Clauses No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-06-18 14:06:27,407 INFO ]: Executing SMT file /storage/chc-comp/vmt-chc-benchmarks/lustre/cd_e7_621.smt2 unknown [2018-06-18 14:06:27,693 INFO ]: Succesfully executed SMT file /storage/chc-comp/vmt-chc-benchmarks/lustre/cd_e7_621.smt2 [2018-06-18 14:06:27,698 INFO ]: ####################### [Toolchain 1] ####################### [2018-06-18 14:06:27,713 INFO ]: Walking toolchain with 4 elements. [2018-06-18 14:06:27,714 INFO ]: ------------------------ChcToBoogie---------------------------- [2018-06-18 14:06:27,714 INFO ]: Initializing ChcToBoogie... [2018-06-18 14:06:27,714 INFO ]: ChcToBoogie initialized [2018-06-18 14:06:27,729 INFO ]: Executing the observer ChcToBoogieObserver from plugin ChcToBoogie for "de.uni_freiburg.informatik.ultimate.source.smtparser OTHER 18.06 02:06:27" (1/1) ... [2018-06-18 14:06:27,807 INFO ]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 18.06 02:06:27 Unit [2018-06-18 14:06:27,808 INFO ]: ------------------------ END ChcToBoogie---------------------------- [2018-06-18 14:06:27,808 INFO ]: ------------------------Boogie Preprocessor---------------------------- [2018-06-18 14:06:27,808 INFO ]: Initializing Boogie Preprocessor... [2018-06-18 14:06:27,808 INFO ]: Boogie Preprocessor initialized [2018-06-18 14:06:27,835 INFO ]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 18.06 02:06:27" (1/1) ... [2018-06-18 14:06:27,835 INFO ]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 18.06 02:06:27" (1/1) ... [2018-06-18 14:06:27,846 INFO ]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 18.06 02:06:27" (1/1) ... [2018-06-18 14:06:27,847 INFO ]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 18.06 02:06:27" (1/1) ... [2018-06-18 14:06:27,862 INFO ]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 18.06 02:06:27" (1/1) ... [2018-06-18 14:06:27,864 INFO ]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 18.06 02:06:27" (1/1) ... [2018-06-18 14:06:27,865 INFO ]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 18.06 02:06:27" (1/1) ... [2018-06-18 14:06:27,867 INFO ]: ------------------------ END Boogie Preprocessor---------------------------- [2018-06-18 14:06:27,868 INFO ]: ------------------------RCFGBuilder---------------------------- [2018-06-18 14:06:27,868 INFO ]: Initializing RCFGBuilder... [2018-06-18 14:06:27,868 INFO ]: RCFGBuilder initialized [2018-06-18 14:06:27,869 INFO ]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 18.06 02:06:27" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2018-06-18 14:06:27,910 INFO ]: Specification and implementation of procedure False given in one single declaration [2018-06-18 14:06:27,910 INFO ]: Found specification of procedure False [2018-06-18 14:06:27,910 INFO ]: Found implementation of procedure False [2018-06-18 14:06:27,910 INFO ]: Specification and implementation of procedure state given in one single declaration [2018-06-18 14:06:27,910 INFO ]: Found specification of procedure state [2018-06-18 14:06:27,910 INFO ]: Found implementation of procedure state [2018-06-18 14:06:27,910 INFO ]: Specification and implementation of procedure Ultimate.START given in one single declaration [2018-06-18 14:06:27,911 INFO ]: Found specification of procedure Ultimate.START [2018-06-18 14:06:27,911 INFO ]: Found implementation of procedure Ultimate.START Waiting until toolchain timeout for monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-06-18 14:06:28,298 INFO ]: Using library mode [2018-06-18 14:06:28,299 INFO ]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.06 02:06:28 BoogieIcfgContainer [2018-06-18 14:06:28,299 INFO ]: ------------------------ END RCFGBuilder---------------------------- [2018-06-18 14:06:28,301 INFO ]: ------------------------TraceAbstraction---------------------------- [2018-06-18 14:06:28,301 INFO ]: Initializing TraceAbstraction... [2018-06-18 14:06:28,310 INFO ]: TraceAbstraction initialized [2018-06-18 14:06:28,310 INFO ]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.source.smtparser OTHER 18.06 02:06:27" (1/3) ... [2018-06-18 14:06:28,311 INFO ]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@25208564 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction OTHER 18.06 02:06:28, skipping insertion in model container [2018-06-18 14:06:28,311 INFO ]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 18.06 02:06:27" (2/3) ... [2018-06-18 14:06:28,312 INFO ]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@25208564 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.06 02:06:28, skipping insertion in model container [2018-06-18 14:06:28,312 INFO ]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.06 02:06:28" (3/3) ... [2018-06-18 14:06:28,314 INFO ]: Analyzing ICFG de.uni_freiburg.informatik.ultimate.plugins.chctoboogie.ChcToBoogieObserver [2018-06-18 14:06:28,324 INFO ]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-06-18 14:06:28,337 INFO ]: Appying trace abstraction to program that has 1 error locations. [2018-06-18 14:06:28,387 INFO ]: Using default assertion order modulation [2018-06-18 14:06:28,388 INFO ]: Interprodecural is true [2018-06-18 14:06:28,388 INFO ]: Hoare is false [2018-06-18 14:06:28,388 INFO ]: Compute interpolants for FPandBP [2018-06-18 14:06:28,388 INFO ]: Backedges is TWOTRACK [2018-06-18 14:06:28,388 INFO ]: Determinization is PREDICATE_ABSTRACTION [2018-06-18 14:06:28,388 INFO ]: Difference is false [2018-06-18 14:06:28,388 INFO ]: Minimize is MINIMIZE_SEVPA [2018-06-18 14:06:28,388 INFO ]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-06-18 14:06:28,406 INFO ]: Start isEmpty. Operand 13 states. [2018-06-18 14:06:28,421 INFO ]: Finished isEmpty. Found accepting run of length 10 [2018-06-18 14:06:28,421 INFO ]: Found error trace [2018-06-18 14:06:28,422 INFO ]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-06-18 14:06:28,422 INFO ]: === Iteration 1 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-18 14:06:28,428 INFO ]: Analyzing trace with hash -597537630, now seen corresponding path program 1 times [2018-06-18 14:06:28,430 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-18 14:06:28,431 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-18 14:06:28,482 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-18 14:06:28,482 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-18 14:06:28,482 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-18 14:06:28,550 INFO ]: Conjunction of SSA is unsat [2018-06-18 14:06:28,560 WARN ]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-06-18 14:06:28,721 INFO ]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-18 14:06:28,724 INFO ]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-06-18 14:06:28,724 INFO ]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-06-18 14:06:28,726 INFO ]: Interpolant automaton has 4 states [2018-06-18 14:06:28,742 INFO ]: Constructing interpolant automaton starting with 4 interpolants. [2018-06-18 14:06:28,743 INFO ]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-06-18 14:06:28,745 INFO ]: Start difference. First operand 13 states. Second operand 4 states. [2018-06-18 14:06:28,876 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-18 14:06:28,876 INFO ]: Finished difference Result 13 states and 14 transitions. [2018-06-18 14:06:28,877 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-06-18 14:06:28,879 INFO ]: Start accepts. Automaton has 4 states. Word has length 9 [2018-06-18 14:06:28,879 INFO ]: Finished accepts. some prefix is accepted. [2018-06-18 14:06:28,894 INFO ]: With dead ends: 13 [2018-06-18 14:06:28,894 INFO ]: Without dead ends: 13 [2018-06-18 14:06:28,899 INFO ]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-06-18 14:06:28,916 INFO ]: Start minimizeSevpa. Operand 13 states. [2018-06-18 14:06:28,938 INFO ]: Finished minimizeSevpa. Reduced states from 13 to 13. [2018-06-18 14:06:28,940 INFO ]: Start removeUnreachable. Operand 13 states. [2018-06-18 14:06:28,940 INFO ]: Finished removeUnreachable. Reduced from 13 states to 13 states and 14 transitions. [2018-06-18 14:06:28,946 INFO ]: Start accepts. Automaton has 13 states and 14 transitions. Word has length 9 [2018-06-18 14:06:28,947 INFO ]: Finished accepts. word is rejected. [2018-06-18 14:06:28,947 INFO ]: Abstraction has 13 states and 14 transitions. [2018-06-18 14:06:28,947 INFO ]: Interpolant automaton has 4 states. [2018-06-18 14:06:28,947 INFO ]: Start isEmpty. Operand 13 states and 14 transitions. [2018-06-18 14:06:28,948 INFO ]: Finished isEmpty. Found accepting run of length 14 [2018-06-18 14:06:28,948 INFO ]: Found error trace [2018-06-18 14:06:28,948 INFO ]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-06-18 14:06:28,948 INFO ]: === Iteration 2 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-18 14:06:28,948 INFO ]: Analyzing trace with hash 1530833734, now seen corresponding path program 1 times [2018-06-18 14:06:28,948 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-18 14:06:28,948 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-18 14:06:28,949 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-18 14:06:28,949 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-18 14:06:28,950 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-18 14:06:29,015 INFO ]: Conjunction of SSA is unsat [2018-06-18 14:06:29,016 WARN ]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-06-18 14:06:29,204 INFO ]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-06-18 14:06:29,204 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-18 14:06:29,204 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-18 14:06:29,217 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-18 14:06:29,302 INFO ]: Conjunction of SSA is unsat [2018-06-18 14:06:29,312 INFO ]: Computing forward predicates... [2018-06-18 14:06:29,550 INFO ]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-06-18 14:06:29,572 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-18 14:06:29,572 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 8 [2018-06-18 14:06:29,572 INFO ]: Interpolant automaton has 8 states [2018-06-18 14:06:29,573 INFO ]: Constructing interpolant automaton starting with 8 interpolants. [2018-06-18 14:06:29,573 INFO ]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-06-18 14:06:29,573 INFO ]: Start difference. First operand 13 states and 14 transitions. Second operand 8 states. [2018-06-18 14:06:29,773 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-18 14:06:29,773 INFO ]: Finished difference Result 15 states and 16 transitions. [2018-06-18 14:06:29,775 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-06-18 14:06:29,775 INFO ]: Start accepts. Automaton has 8 states. Word has length 13 [2018-06-18 14:06:29,775 INFO ]: Finished accepts. some prefix is accepted. [2018-06-18 14:06:29,775 INFO ]: With dead ends: 15 [2018-06-18 14:06:29,775 INFO ]: Without dead ends: 15 [2018-06-18 14:06:29,776 INFO ]: 0 DeclaredPredicates, 19 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2018-06-18 14:06:29,776 INFO ]: Start minimizeSevpa. Operand 15 states. [2018-06-18 14:06:29,780 INFO ]: Finished minimizeSevpa. Reduced states from 15 to 15. [2018-06-18 14:06:29,780 INFO ]: Start removeUnreachable. Operand 15 states. [2018-06-18 14:06:29,781 INFO ]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2018-06-18 14:06:29,781 INFO ]: Start accepts. Automaton has 15 states and 16 transitions. Word has length 13 [2018-06-18 14:06:29,781 INFO ]: Finished accepts. word is rejected. [2018-06-18 14:06:29,781 INFO ]: Abstraction has 15 states and 16 transitions. [2018-06-18 14:06:29,781 INFO ]: Interpolant automaton has 8 states. [2018-06-18 14:06:29,781 INFO ]: Start isEmpty. Operand 15 states and 16 transitions. [2018-06-18 14:06:29,782 INFO ]: Finished isEmpty. Found accepting run of length 18 [2018-06-18 14:06:29,782 INFO ]: Found error trace [2018-06-18 14:06:29,782 INFO ]: trace histogram [3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2018-06-18 14:06:29,782 INFO ]: === Iteration 3 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-18 14:06:29,782 INFO ]: Analyzing trace with hash -1486246934, now seen corresponding path program 2 times [2018-06-18 14:06:29,782 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-18 14:06:29,782 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-18 14:06:29,783 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-18 14:06:29,783 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-18 14:06:29,783 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-18 14:06:29,906 INFO ]: Conjunction of SSA is unsat [2018-06-18 14:06:29,907 WARN ]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-06-18 14:06:30,515 WARN ]: Spent 399.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 23 [2018-06-18 14:06:30,600 INFO ]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-06-18 14:06:30,600 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-18 14:06:30,600 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-18 14:06:30,611 INFO ]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-06-18 14:06:30,679 INFO ]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-06-18 14:06:30,679 INFO ]: Conjunction of SSA is unsat [2018-06-18 14:06:30,683 INFO ]: Computing forward predicates... [2018-06-18 14:06:31,378 INFO ]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-06-18 14:06:31,398 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-18 14:06:31,398 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 13 [2018-06-18 14:06:31,399 INFO ]: Interpolant automaton has 13 states [2018-06-18 14:06:31,399 INFO ]: Constructing interpolant automaton starting with 13 interpolants. [2018-06-18 14:06:31,399 INFO ]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-06-18 14:06:31,399 INFO ]: Start difference. First operand 15 states and 16 transitions. Second operand 13 states. [2018-06-18 14:06:31,628 WARN ]: Spent 117.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 29 [2018-06-18 14:06:31,765 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-18 14:06:31,765 INFO ]: Finished difference Result 17 states and 18 transitions. [2018-06-18 14:06:31,765 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-06-18 14:06:31,765 INFO ]: Start accepts. Automaton has 13 states. Word has length 17 [2018-06-18 14:06:31,765 INFO ]: Finished accepts. some prefix is accepted. [2018-06-18 14:06:31,766 INFO ]: With dead ends: 17 [2018-06-18 14:06:31,766 INFO ]: Without dead ends: 17 [2018-06-18 14:06:31,766 INFO ]: 0 DeclaredPredicates, 28 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=66, Invalid=206, Unknown=0, NotChecked=0, Total=272 [2018-06-18 14:06:31,766 INFO ]: Start minimizeSevpa. Operand 17 states. [2018-06-18 14:06:31,770 INFO ]: Finished minimizeSevpa. Reduced states from 17 to 17. [2018-06-18 14:06:31,770 INFO ]: Start removeUnreachable. Operand 17 states. [2018-06-18 14:06:31,770 INFO ]: Finished removeUnreachable. Reduced from 17 states to 17 states and 18 transitions. [2018-06-18 14:06:31,771 INFO ]: Start accepts. Automaton has 17 states and 18 transitions. Word has length 17 [2018-06-18 14:06:31,771 INFO ]: Finished accepts. word is rejected. [2018-06-18 14:06:31,771 INFO ]: Abstraction has 17 states and 18 transitions. [2018-06-18 14:06:31,771 INFO ]: Interpolant automaton has 13 states. [2018-06-18 14:06:31,771 INFO ]: Start isEmpty. Operand 17 states and 18 transitions. [2018-06-18 14:06:31,771 INFO ]: Finished isEmpty. Found accepting run of length 22 [2018-06-18 14:06:31,771 INFO ]: Found error trace [2018-06-18 14:06:31,771 INFO ]: trace histogram [4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2018-06-18 14:06:31,771 INFO ]: === Iteration 4 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-18 14:06:31,771 INFO ]: Analyzing trace with hash -2056434034, now seen corresponding path program 3 times [2018-06-18 14:06:31,771 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-18 14:06:31,771 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-18 14:06:31,772 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-18 14:06:31,772 INFO ]: Changing assertion order to NOT_INCREMENTALLY [2018-06-18 14:06:31,772 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-18 14:06:31,837 INFO ]: Conjunction of SSA is unsat [2018-06-18 14:06:31,838 WARN ]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-06-18 14:06:32,167 WARN ]: Spent 127.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 19 [2018-06-18 14:06:32,252 INFO ]: Checked inductivity of 21 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-06-18 14:06:32,252 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-18 14:06:32,252 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-18 14:06:32,260 INFO ]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-06-18 14:06:32,341 INFO ]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-06-18 14:06:32,341 INFO ]: Conjunction of SSA is unsat [2018-06-18 14:06:32,345 INFO ]: Computing forward predicates... [2018-06-18 14:06:32,584 INFO ]: Checked inductivity of 21 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-06-18 14:06:32,615 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-18 14:06:32,615 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 17 [2018-06-18 14:06:32,615 INFO ]: Interpolant automaton has 17 states [2018-06-18 14:06:32,615 INFO ]: Constructing interpolant automaton starting with 17 interpolants. [2018-06-18 14:06:32,616 INFO ]: CoverageRelationStatistics Valid=44, Invalid=228, Unknown=0, NotChecked=0, Total=272 [2018-06-18 14:06:32,616 INFO ]: Start difference. First operand 17 states and 18 transitions. Second operand 17 states. [2018-06-18 14:06:33,107 WARN ]: Spent 174.00 ms on a formula simplification that was a NOOP. DAG size: 36 [2018-06-18 14:06:33,173 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-18 14:06:33,173 INFO ]: Finished difference Result 19 states and 20 transitions. [2018-06-18 14:06:33,177 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-06-18 14:06:33,177 INFO ]: Start accepts. Automaton has 17 states. Word has length 21 [2018-06-18 14:06:33,178 INFO ]: Finished accepts. some prefix is accepted. [2018-06-18 14:06:33,178 INFO ]: With dead ends: 19 [2018-06-18 14:06:33,178 INFO ]: Without dead ends: 19 [2018-06-18 14:06:33,179 INFO ]: 0 DeclaredPredicates, 35 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2018-06-18 14:06:33,179 INFO ]: Start minimizeSevpa. Operand 19 states. [2018-06-18 14:06:33,183 INFO ]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-06-18 14:06:33,183 INFO ]: Start removeUnreachable. Operand 19 states. [2018-06-18 14:06:33,184 INFO ]: Finished removeUnreachable. Reduced from 19 states to 19 states and 20 transitions. [2018-06-18 14:06:33,184 INFO ]: Start accepts. Automaton has 19 states and 20 transitions. Word has length 21 [2018-06-18 14:06:33,184 INFO ]: Finished accepts. word is rejected. [2018-06-18 14:06:33,184 INFO ]: Abstraction has 19 states and 20 transitions. [2018-06-18 14:06:33,184 INFO ]: Interpolant automaton has 17 states. [2018-06-18 14:06:33,184 INFO ]: Start isEmpty. Operand 19 states and 20 transitions. [2018-06-18 14:06:33,185 INFO ]: Finished isEmpty. Found accepting run of length 26 [2018-06-18 14:06:33,185 INFO ]: Found error trace [2018-06-18 14:06:33,185 INFO ]: trace histogram [5, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2018-06-18 14:06:33,185 INFO ]: === Iteration 5 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-18 14:06:33,185 INFO ]: Analyzing trace with hash -434924750, now seen corresponding path program 4 times [2018-06-18 14:06:33,186 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-18 14:06:33,186 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-18 14:06:33,188 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-18 14:06:33,188 INFO ]: Changing assertion order to NOT_INCREMENTALLY [2018-06-18 14:06:33,188 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-18 14:06:33,290 INFO ]: Conjunction of SSA is unsat [2018-06-18 14:06:33,291 WARN ]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-06-18 14:06:33,586 INFO ]: Checked inductivity of 36 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-06-18 14:06:33,586 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-18 14:06:33,586 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-18 14:06:33,593 INFO ]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-06-18 14:06:33,676 INFO ]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-06-18 14:06:33,676 INFO ]: Conjunction of SSA is unsat [2018-06-18 14:06:33,680 INFO ]: Computing forward predicates... [2018-06-18 14:06:33,859 INFO ]: Checked inductivity of 36 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-06-18 14:06:33,879 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-18 14:06:33,879 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10] total 18 [2018-06-18 14:06:33,880 INFO ]: Interpolant automaton has 18 states [2018-06-18 14:06:33,880 INFO ]: Constructing interpolant automaton starting with 18 interpolants. [2018-06-18 14:06:33,880 INFO ]: CoverageRelationStatistics Valid=60, Invalid=246, Unknown=0, NotChecked=0, Total=306 [2018-06-18 14:06:33,880 INFO ]: Start difference. First operand 19 states and 20 transitions. Second operand 18 states. [2018-06-18 14:06:34,114 WARN ]: Spent 100.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 21 [2018-06-18 14:06:34,262 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-18 14:06:34,262 INFO ]: Finished difference Result 21 states and 22 transitions. [2018-06-18 14:06:34,270 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-06-18 14:06:34,270 INFO ]: Start accepts. Automaton has 18 states. Word has length 25 [2018-06-18 14:06:34,270 INFO ]: Finished accepts. some prefix is accepted. [2018-06-18 14:06:34,272 INFO ]: With dead ends: 21 [2018-06-18 14:06:34,272 INFO ]: Without dead ends: 21 [2018-06-18 14:06:34,272 INFO ]: 0 DeclaredPredicates, 42 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=137, Invalid=415, Unknown=0, NotChecked=0, Total=552 [2018-06-18 14:06:34,272 INFO ]: Start minimizeSevpa. Operand 21 states. [2018-06-18 14:06:34,275 INFO ]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-06-18 14:06:34,275 INFO ]: Start removeUnreachable. Operand 21 states. [2018-06-18 14:06:34,276 INFO ]: Finished removeUnreachable. Reduced from 21 states to 21 states and 22 transitions. [2018-06-18 14:06:34,276 INFO ]: Start accepts. Automaton has 21 states and 22 transitions. Word has length 25 [2018-06-18 14:06:34,276 INFO ]: Finished accepts. word is rejected. [2018-06-18 14:06:34,276 INFO ]: Abstraction has 21 states and 22 transitions. [2018-06-18 14:06:34,276 INFO ]: Interpolant automaton has 18 states. [2018-06-18 14:06:34,276 INFO ]: Start isEmpty. Operand 21 states and 22 transitions. [2018-06-18 14:06:34,277 INFO ]: Finished isEmpty. Found accepting run of length 30 [2018-06-18 14:06:34,277 INFO ]: Found error trace [2018-06-18 14:06:34,277 INFO ]: trace histogram [6, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1] [2018-06-18 14:06:34,277 INFO ]: === Iteration 6 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-18 14:06:34,277 INFO ]: Analyzing trace with hash 1986427350, now seen corresponding path program 5 times [2018-06-18 14:06:34,277 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-18 14:06:34,277 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-18 14:06:34,278 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-18 14:06:34,278 INFO ]: Changing assertion order to NOT_INCREMENTALLY [2018-06-18 14:06:34,278 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-18 14:06:34,350 INFO ]: Conjunction of SSA is unsat [2018-06-18 14:06:34,351 WARN ]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-06-18 14:06:34,668 WARN ]: Spent 142.00 ms on a formula simplification that was a NOOP. DAG size: 8 [2018-06-18 14:06:34,911 WARN ]: Spent 174.00 ms on a formula simplification that was a NOOP. DAG size: 13 [2018-06-18 14:06:35,327 WARN ]: Spent 321.00 ms on a formula simplification. DAG size of input: 32 DAG size of output: 21 [2018-06-18 14:06:35,438 INFO ]: Checked inductivity of 55 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-06-18 14:06:35,438 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-18 14:06:35,438 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-18 14:06:35,449 INFO ]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-06-18 14:06:35,561 INFO ]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-06-18 14:06:35,561 INFO ]: Conjunction of SSA is unsat [2018-06-18 14:06:35,566 INFO ]: Computing forward predicates... [2018-06-18 14:06:35,907 INFO ]: Checked inductivity of 55 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-06-18 14:06:35,932 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-18 14:06:35,932 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13] total 22 [2018-06-18 14:06:35,932 INFO ]: Interpolant automaton has 22 states [2018-06-18 14:06:35,932 INFO ]: Constructing interpolant automaton starting with 22 interpolants. [2018-06-18 14:06:35,934 INFO ]: CoverageRelationStatistics Valid=64, Invalid=398, Unknown=0, NotChecked=0, Total=462 [2018-06-18 14:06:35,934 INFO ]: Start difference. First operand 21 states and 22 transitions. Second operand 22 states. [2018-06-18 14:06:36,252 WARN ]: Spent 154.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 38 [2018-06-18 14:06:36,787 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-18 14:06:36,787 INFO ]: Finished difference Result 23 states and 24 transitions. [2018-06-18 14:06:36,790 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-06-18 14:06:36,790 INFO ]: Start accepts. Automaton has 22 states. Word has length 29 [2018-06-18 14:06:36,791 INFO ]: Finished accepts. some prefix is accepted. [2018-06-18 14:06:36,791 INFO ]: With dead ends: 23 [2018-06-18 14:06:36,791 INFO ]: Without dead ends: 23 [2018-06-18 14:06:36,792 INFO ]: 0 DeclaredPredicates, 49 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=178, Invalid=634, Unknown=0, NotChecked=0, Total=812 [2018-06-18 14:06:36,792 INFO ]: Start minimizeSevpa. Operand 23 states. [2018-06-18 14:06:36,795 INFO ]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-06-18 14:06:36,795 INFO ]: Start removeUnreachable. Operand 23 states. [2018-06-18 14:06:36,796 INFO ]: Finished removeUnreachable. Reduced from 23 states to 23 states and 24 transitions. [2018-06-18 14:06:36,796 INFO ]: Start accepts. Automaton has 23 states and 24 transitions. Word has length 29 [2018-06-18 14:06:36,796 INFO ]: Finished accepts. word is rejected. [2018-06-18 14:06:36,796 INFO ]: Abstraction has 23 states and 24 transitions. [2018-06-18 14:06:36,796 INFO ]: Interpolant automaton has 22 states. [2018-06-18 14:06:36,796 INFO ]: Start isEmpty. Operand 23 states and 24 transitions. [2018-06-18 14:06:36,798 INFO ]: Finished isEmpty. Found accepting run of length 34 [2018-06-18 14:06:36,798 INFO ]: Found error trace [2018-06-18 14:06:36,798 INFO ]: trace histogram [7, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1] [2018-06-18 14:06:36,798 INFO ]: === Iteration 7 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-18 14:06:36,798 INFO ]: Analyzing trace with hash 800064122, now seen corresponding path program 6 times [2018-06-18 14:06:36,798 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-18 14:06:36,798 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-18 14:06:36,799 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-18 14:06:36,799 INFO ]: Changing assertion order to NOT_INCREMENTALLY [2018-06-18 14:06:36,799 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-18 14:06:36,867 INFO ]: Conjunction of SSA is unsat [2018-06-18 14:06:36,868 WARN ]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-06-18 14:06:37,420 INFO ]: Checked inductivity of 78 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-06-18 14:06:37,420 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-18 14:06:37,420 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-18 14:06:37,426 INFO ]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-06-18 14:06:37,549 INFO ]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-06-18 14:06:37,549 INFO ]: Conjunction of SSA is unsat [2018-06-18 14:06:37,554 INFO ]: Computing forward predicates... [2018-06-18 14:06:37,851 INFO ]: Checked inductivity of 78 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2018-06-18 14:06:37,884 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-18 14:06:37,884 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14] total 24 [2018-06-18 14:06:37,884 INFO ]: Interpolant automaton has 24 states [2018-06-18 14:06:37,884 INFO ]: Constructing interpolant automaton starting with 24 interpolants. [2018-06-18 14:06:37,885 INFO ]: CoverageRelationStatistics Valid=79, Invalid=473, Unknown=0, NotChecked=0, Total=552 [2018-06-18 14:06:37,885 INFO ]: Start difference. First operand 23 states and 24 transitions. Second operand 24 states. [2018-06-18 14:06:38,609 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-18 14:06:38,609 INFO ]: Finished difference Result 25 states and 26 transitions. [2018-06-18 14:06:38,609 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-06-18 14:06:38,609 INFO ]: Start accepts. Automaton has 24 states. Word has length 33 [2018-06-18 14:06:38,610 INFO ]: Finished accepts. some prefix is accepted. [2018-06-18 14:06:38,611 INFO ]: With dead ends: 25 [2018-06-18 14:06:38,611 INFO ]: Without dead ends: 25 [2018-06-18 14:06:38,611 INFO ]: 0 DeclaredPredicates, 56 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 110 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=221, Invalid=771, Unknown=0, NotChecked=0, Total=992 [2018-06-18 14:06:38,611 INFO ]: Start minimizeSevpa. Operand 25 states. [2018-06-18 14:06:38,615 INFO ]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-06-18 14:06:38,615 INFO ]: Start removeUnreachable. Operand 25 states. [2018-06-18 14:06:38,615 INFO ]: Finished removeUnreachable. Reduced from 25 states to 25 states and 26 transitions. [2018-06-18 14:06:38,615 INFO ]: Start accepts. Automaton has 25 states and 26 transitions. Word has length 33 [2018-06-18 14:06:38,616 INFO ]: Finished accepts. word is rejected. [2018-06-18 14:06:38,616 INFO ]: Abstraction has 25 states and 26 transitions. [2018-06-18 14:06:38,616 INFO ]: Interpolant automaton has 24 states. [2018-06-18 14:06:38,616 INFO ]: Start isEmpty. Operand 25 states and 26 transitions. [2018-06-18 14:06:38,617 INFO ]: Finished isEmpty. Found accepting run of length 38 [2018-06-18 14:06:38,617 INFO ]: Found error trace [2018-06-18 14:06:38,617 INFO ]: trace histogram [8, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1] [2018-06-18 14:06:38,617 INFO ]: === Iteration 8 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-18 14:06:38,617 INFO ]: Analyzing trace with hash -411423458, now seen corresponding path program 7 times [2018-06-18 14:06:38,617 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-18 14:06:38,617 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-18 14:06:38,618 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-18 14:06:38,618 INFO ]: Changing assertion order to NOT_INCREMENTALLY [2018-06-18 14:06:38,618 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-18 14:06:38,691 INFO ]: Conjunction of SSA is unsat [2018-06-18 14:06:38,692 WARN ]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-06-18 14:06:39,119 INFO ]: Checked inductivity of 105 backedges. 0 proven. 67 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-06-18 14:06:39,119 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-18 14:06:39,119 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-18 14:06:39,126 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-18 14:06:39,217 INFO ]: Conjunction of SSA is unsat [2018-06-18 14:06:39,223 INFO ]: Computing forward predicates... [2018-06-18 14:06:39,788 INFO ]: Checked inductivity of 105 backedges. 0 proven. 62 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2018-06-18 14:06:39,812 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-18 14:06:39,812 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13] total 24 [2018-06-18 14:06:39,812 INFO ]: Interpolant automaton has 24 states [2018-06-18 14:06:39,812 INFO ]: Constructing interpolant automaton starting with 24 interpolants. [2018-06-18 14:06:39,812 INFO ]: CoverageRelationStatistics Valid=112, Invalid=440, Unknown=0, NotChecked=0, Total=552 [2018-06-18 14:06:39,813 INFO ]: Start difference. First operand 25 states and 26 transitions. Second operand 24 states. [2018-06-18 14:06:40,588 WARN ]: Spent 336.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 29 [2018-06-18 14:06:40,733 WARN ]: Spent 123.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 27 [2018-06-18 14:06:41,154 WARN ]: Spent 107.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 27 [2018-06-18 14:06:41,611 WARN ]: Spent 158.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 25 [2018-06-18 14:06:41,693 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-18 14:06:41,694 INFO ]: Finished difference Result 29 states and 30 transitions. [2018-06-18 14:06:41,694 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-06-18 14:06:41,694 INFO ]: Start accepts. Automaton has 24 states. Word has length 37 [2018-06-18 14:06:41,694 INFO ]: Finished accepts. some prefix is accepted. [2018-06-18 14:06:41,695 INFO ]: With dead ends: 29 [2018-06-18 14:06:41,695 INFO ]: Without dead ends: 29 [2018-06-18 14:06:41,695 INFO ]: 0 DeclaredPredicates, 64 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 118 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=288, Invalid=834, Unknown=0, NotChecked=0, Total=1122 [2018-06-18 14:06:41,696 INFO ]: Start minimizeSevpa. Operand 29 states. [2018-06-18 14:06:41,700 INFO ]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-06-18 14:06:41,700 INFO ]: Start removeUnreachable. Operand 29 states. [2018-06-18 14:06:41,701 INFO ]: Finished removeUnreachable. Reduced from 29 states to 29 states and 30 transitions. [2018-06-18 14:06:41,701 INFO ]: Start accepts. Automaton has 29 states and 30 transitions. Word has length 37 [2018-06-18 14:06:41,701 INFO ]: Finished accepts. word is rejected. [2018-06-18 14:06:41,701 INFO ]: Abstraction has 29 states and 30 transitions. [2018-06-18 14:06:41,701 INFO ]: Interpolant automaton has 24 states. [2018-06-18 14:06:41,701 INFO ]: Start isEmpty. Operand 29 states and 30 transitions. [2018-06-18 14:06:41,702 INFO ]: Finished isEmpty. Found accepting run of length 46 [2018-06-18 14:06:41,702 INFO ]: Found error trace [2018-06-18 14:06:41,702 INFO ]: trace histogram [10, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1] [2018-06-18 14:06:41,702 INFO ]: === Iteration 9 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-18 14:06:41,702 INFO ]: Analyzing trace with hash 1442343014, now seen corresponding path program 8 times [2018-06-18 14:06:41,702 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-18 14:06:41,702 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-18 14:06:41,703 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-18 14:06:41,703 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-18 14:06:41,703 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-18 14:06:41,889 INFO ]: Conjunction of SSA is sat [2018-06-18 14:06:41,895 INFO ]: Counterexample might be feasible [2018-06-18 14:06:41,916 INFO ]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.06 02:06:41 BoogieIcfgContainer [2018-06-18 14:06:41,918 INFO ]: ------------------------ END TraceAbstraction---------------------------- [2018-06-18 14:06:41,919 INFO ]: Toolchain (without parser) took 14220.48 ms. Allocated memory was 307.8 MB in the beginning and 471.3 MB in the end (delta: 163.6 MB). Free memory was 259.0 MB in the beginning and 361.9 MB in the end (delta: -102.9 MB). Peak memory consumption was 60.7 MB. Max. memory is 3.6 GB. [2018-06-18 14:06:41,920 INFO ]: SmtParser took 0.08 ms. Allocated memory is still 307.8 MB. Free memory is still 273.2 MB. There was no memory consumed. Max. memory is 3.6 GB. [2018-06-18 14:06:41,920 INFO ]: ChcToBoogie took 94.44 ms. Allocated memory is still 307.8 MB. Free memory was 259.0 MB in the beginning and 256.0 MB in the end (delta: 3.0 MB). Peak memory consumption was 3.0 MB. Max. memory is 3.6 GB. [2018-06-18 14:06:41,920 INFO ]: Boogie Preprocessor took 58.88 ms. Allocated memory is still 307.8 MB. Free memory was 256.0 MB in the beginning and 255.0 MB in the end (delta: 996.1 kB). Peak memory consumption was 996.1 kB. Max. memory is 3.6 GB. [2018-06-18 14:06:41,921 INFO ]: RCFGBuilder took 431.38 ms. Allocated memory is still 307.8 MB. Free memory was 255.0 MB in the beginning and 242.0 MB in the end (delta: 13.1 MB). Peak memory consumption was 13.1 MB. Max. memory is 3.6 GB. [2018-06-18 14:06:41,921 INFO ]: TraceAbstraction took 13617.47 ms. Allocated memory was 307.8 MB in the beginning and 471.3 MB in the end (delta: 163.6 MB). Free memory was 241.0 MB in the beginning and 361.9 MB in the end (delta: -120.9 MB). Peak memory consumption was 42.7 MB. Max. memory is 3.6 GB. [2018-06-18 14:06:41,927 INFO ]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * SmtParser took 0.08 ms. Allocated memory is still 307.8 MB. Free memory is still 273.2 MB. There was no memory consumed. Max. memory is 3.6 GB. * ChcToBoogie took 94.44 ms. Allocated memory is still 307.8 MB. Free memory was 259.0 MB in the beginning and 256.0 MB in the end (delta: 3.0 MB). Peak memory consumption was 3.0 MB. Max. memory is 3.6 GB. * Boogie Preprocessor took 58.88 ms. Allocated memory is still 307.8 MB. Free memory was 256.0 MB in the beginning and 255.0 MB in the end (delta: 996.1 kB). Peak memory consumption was 996.1 kB. Max. memory is 3.6 GB. * RCFGBuilder took 431.38 ms. Allocated memory is still 307.8 MB. Free memory was 255.0 MB in the beginning and 242.0 MB in the end (delta: 13.1 MB). Peak memory consumption was 13.1 MB. Max. memory is 3.6 GB. * TraceAbstraction took 13617.47 ms. Allocated memory was 307.8 MB in the beginning and 471.3 MB in the end (delta: 163.6 MB). Free memory was 241.0 MB in the beginning and 361.9 MB in the end (delta: -120.9 MB). Peak memory consumption was 42.7 MB. Max. memory is 3.6 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [UNKNOWN] : assertion can be violated assertion can be violated We found a FailurePath: [L0] CALL call False(); [L0] assume !hbv_False_1_Bool; [L0] CALL call state(hbv_False_2_Int, hbv_False_3_Bool, hbv_False_4_Int, hbv_False_5_Int, hbv_False_6_Bool, hbv_False_7_Bool, hbv_False_8_Bool, hbv_False_9_Bool, hbv_False_10_Bool, hbv_False_11_Bool, hbv_False_12_Bool, hbv_False_13_Bool, hbv_False_14_Int, hbv_False_15_Bool, hbv_False_16_Int, hbv_False_17_Bool, hbv_False_18_Bool, hbv_False_19_Int, hbv_False_20_Bool, hbv_False_21_Bool, hbv_False_22_Bool, hbv_False_1_Bool, hbv_False_23_Int); [L0] assume ((((((((((((((((((((((((((((((((((((((((hhv_state_0_Int == hhv_state_14_Int && !((!hbv_state_21_Bool || !hbv_state_6_Bool) && (hbv_state_21_Bool || hbv_state_6_Bool))) && !(!hbv_state_9_Bool && !hbv_state_8_Bool)) && !((!hhv_state_20_Bool || !hhv_state_16_Bool) && (hhv_state_16_Bool || hhv_state_20_Bool))) && hhv_state_3_Int == hhv_state_2_Int) && hbv_state_3_Int == hbv_state_19_Int) && !((hbv_state_3_Int <= 9 || hbv_state_14_Bool) && (!hbv_state_14_Bool || !(hbv_state_3_Int <= 9)))) && !(((!hhv_state_1_Bool || !(hhv_state_0_Int <= 12)) || !(8 <= hhv_state_0_Int)) && ((8 <= hhv_state_0_Int && hhv_state_0_Int <= 12) || hhv_state_1_Bool))) && !((!(hbv_state_18_Int <= 7) || !hhv_state_4_Bool) && (hhv_state_4_Bool || hbv_state_18_Int <= 7))) && hhv_state_2_Int == hhv_state_22_Int) && !((!hhv_state_19_Bool || !hhv_state_15_Bool) && (hhv_state_15_Bool || hhv_state_19_Bool))) && !(((hhv_state_10_Bool || 1 <= hhv_state_12_Int) && (!hhv_state_10_Bool || !(1 <= hhv_state_12_Int))) && hhv_state_11_Bool)) && !((hbv_state_14_Bool || hbv_state_20_Bool) && (!hbv_state_20_Bool || !hbv_state_14_Bool))) && !(((hhv_state_12_Int <= -1 || hhv_state_8_Bool) && (!hhv_state_8_Bool || !(hhv_state_12_Int <= -1))) && hhv_state_9_Bool)) && !(!hbv_state_4_Bool && !hbv_state_5_Bool)) && !(hhv_state_1_Bool && !(hhv_state_22_Int == 0))) && !((!hbv_state_10_Bool || !hbv_state_11_Bool) && (hbv_state_10_Bool || hbv_state_11_Bool))) && !((!hhv_state_16_Bool || !(hhv_state_14_Int <= 9)) && (hhv_state_14_Int <= 9 || hhv_state_16_Bool))) && !((hbv_state_20_Bool || hhv_state_11_Bool) && (!hbv_state_20_Bool || !hhv_state_11_Bool))) && hbv_state_12_Int == hbv_state_3_Int) && !((hbv_state_1_Bool || hbv_state_2_Bool) && (!hbv_state_1_Bool || !hbv_state_2_Bool))) && !((hhv_state_15_Bool || 11 <= hhv_state_14_Int) && (!hhv_state_15_Bool || !(11 <= hhv_state_14_Int)))) && !(((hbv_state_6_Bool && !hbv_state_2_Bool) || !hbv_state_13_Bool) && ((hbv_state_13_Bool || hbv_state_2_Bool) || !hbv_state_6_Bool))) && !(!hhv_state_11_Bool && !hhv_state_10_Bool)) && !((!hhv_state_5_Bool || !hhv_state_4_Bool) && (hhv_state_4_Bool || hhv_state_5_Bool))) && !(((!(1 <= hbv_state_7_Int) || !hbv_state_5_Bool) && (1 <= hbv_state_7_Int || hbv_state_5_Bool)) && hbv_state_4_Bool)) && !((hbv_state_16_Bool || hhv_state_9_Bool) && (!hbv_state_16_Bool || !hhv_state_9_Bool))) && !((hbv_state_15_Bool || hbv_state_16_Bool) && (!hbv_state_15_Bool || !hbv_state_16_Bool))) && !((!hbv_state_15_Bool || !(11 <= hbv_state_3_Int)) && (11 <= hbv_state_3_Int || hbv_state_15_Bool))) && !((hbv_state_22_Bool || (hbv_state_12_Int <= 12 && 8 <= hbv_state_12_Int)) && ((!hbv_state_22_Bool || !(hbv_state_12_Int <= 12)) || !(8 <= hbv_state_12_Int)))) && !((!hhv_state_18_Bool || !hhv_state_13_Bool) && (hhv_state_13_Bool || hhv_state_18_Bool))) && hbv_state_17_Int == hbv_state_18_Int) && !((!hhv_state_21_Bool || (hhv_state_7_Bool && !hhv_state_5_Bool)) && ((hhv_state_5_Bool || hhv_state_21_Bool) || !hhv_state_7_Bool))) && !(!hhv_state_1_Bool && !(hbv_state_18_Int + -1 * hhv_state_22_Int == -1))) && !(((hhv_state_6_Bool || hbv_state_6_Bool) || ((!(16 <= hhv_state_0_Int) && hhv_state_18_Bool) && 0 <= hhv_state_0_Int)) && ((!hbv_state_6_Bool && ((16 <= hhv_state_0_Int || !hhv_state_18_Bool) || !(0 <= hhv_state_0_Int))) || !hhv_state_6_Bool))) && !((hhv_state_13_Bool || (((hhv_state_10_Bool && hhv_state_12_Int <= 4) && -4 <= hhv_state_12_Int) && hhv_state_8_Bool)) && ((((!hhv_state_8_Bool || !(hhv_state_12_Int <= 4)) || !hhv_state_10_Bool) || !hhv_state_13_Bool) || !(-4 <= hhv_state_12_Int)))) && !((!hhv_state_7_Bool || !hhv_state_6_Bool) && (hhv_state_7_Bool || hhv_state_6_Bool))) && !(((hbv_state_7_Int <= -1 || hbv_state_8_Bool) && (!hbv_state_8_Bool || !(hbv_state_7_Int <= -1))) && hbv_state_9_Bool)) && !((hbv_state_10_Bool || (((hbv_state_7_Int <= 4 && hbv_state_5_Bool) && -4 <= hbv_state_7_Int) && hbv_state_8_Bool)) && ((((!(-4 <= hbv_state_7_Int) || !hbv_state_10_Bool) || !hbv_state_8_Bool) || !(hbv_state_7_Int <= 4)) || !hbv_state_5_Bool))) && hhv_state_14_Int == hhv_state_17_Int) && !(!hhv_state_8_Bool && !hhv_state_9_Bool)) && hbv_state_3_Int + (hhv_state_12_Int + -1 * hhv_state_17_Int) == 0; [L0] CALL call state(hbv_state_12_Int, hbv_state_22_Bool, hbv_state_17_Int, hbv_state_18_Int, hbv_state_1_Bool, hbv_state_2_Bool, hbv_state_21_Bool, hbv_state_6_Bool, hbv_state_8_Bool, hbv_state_9_Bool, hbv_state_5_Bool, hbv_state_4_Bool, hbv_state_7_Int, hbv_state_10_Bool, hbv_state_3_Int, hbv_state_15_Bool, hbv_state_14_Bool, hbv_state_19_Int, hbv_state_11_Bool, hbv_state_16_Bool, hbv_state_20_Bool, hbv_state_13_Bool, hbv_state_23_Int); [L0] assume ((((((((((((((((((((((((((((((((((((((((hhv_state_0_Int == hhv_state_14_Int && !((!hbv_state_21_Bool || !hbv_state_6_Bool) && (hbv_state_21_Bool || hbv_state_6_Bool))) && !(!hbv_state_9_Bool && !hbv_state_8_Bool)) && !((!hhv_state_20_Bool || !hhv_state_16_Bool) && (hhv_state_16_Bool || hhv_state_20_Bool))) && hhv_state_3_Int == hhv_state_2_Int) && hbv_state_3_Int == hbv_state_19_Int) && !((hbv_state_3_Int <= 9 || hbv_state_14_Bool) && (!hbv_state_14_Bool || !(hbv_state_3_Int <= 9)))) && !(((!hhv_state_1_Bool || !(hhv_state_0_Int <= 12)) || !(8 <= hhv_state_0_Int)) && ((8 <= hhv_state_0_Int && hhv_state_0_Int <= 12) || hhv_state_1_Bool))) && !((!(hbv_state_18_Int <= 7) || !hhv_state_4_Bool) && (hhv_state_4_Bool || hbv_state_18_Int <= 7))) && hhv_state_2_Int == hhv_state_22_Int) && !((!hhv_state_19_Bool || !hhv_state_15_Bool) && (hhv_state_15_Bool || hhv_state_19_Bool))) && !(((hhv_state_10_Bool || 1 <= hhv_state_12_Int) && (!hhv_state_10_Bool || !(1 <= hhv_state_12_Int))) && hhv_state_11_Bool)) && !((hbv_state_14_Bool || hbv_state_20_Bool) && (!hbv_state_20_Bool || !hbv_state_14_Bool))) && !(((hhv_state_12_Int <= -1 || hhv_state_8_Bool) && (!hhv_state_8_Bool || !(hhv_state_12_Int <= -1))) && hhv_state_9_Bool)) && !(!hbv_state_4_Bool && !hbv_state_5_Bool)) && !(hhv_state_1_Bool && !(hhv_state_22_Int == 0))) && !((!hbv_state_10_Bool || !hbv_state_11_Bool) && (hbv_state_10_Bool || hbv_state_11_Bool))) && !((!hhv_state_16_Bool || !(hhv_state_14_Int <= 9)) && (hhv_state_14_Int <= 9 || hhv_state_16_Bool))) && !((hbv_state_20_Bool || hhv_state_11_Bool) && (!hbv_state_20_Bool || !hhv_state_11_Bool))) && hbv_state_12_Int == hbv_state_3_Int) && !((hbv_state_1_Bool || hbv_state_2_Bool) && (!hbv_state_1_Bool || !hbv_state_2_Bool))) && !((hhv_state_15_Bool || 11 <= hhv_state_14_Int) && (!hhv_state_15_Bool || !(11 <= hhv_state_14_Int)))) && !(((hbv_state_6_Bool && !hbv_state_2_Bool) || !hbv_state_13_Bool) && ((hbv_state_13_Bool || hbv_state_2_Bool) || !hbv_state_6_Bool))) && !(!hhv_state_11_Bool && !hhv_state_10_Bool)) && !((!hhv_state_5_Bool || !hhv_state_4_Bool) && (hhv_state_4_Bool || hhv_state_5_Bool))) && !(((!(1 <= hbv_state_7_Int) || !hbv_state_5_Bool) && (1 <= hbv_state_7_Int || hbv_state_5_Bool)) && hbv_state_4_Bool)) && !((hbv_state_16_Bool || hhv_state_9_Bool) && (!hbv_state_16_Bool || !hhv_state_9_Bool))) && !((hbv_state_15_Bool || hbv_state_16_Bool) && (!hbv_state_15_Bool || !hbv_state_16_Bool))) && !((!hbv_state_15_Bool || !(11 <= hbv_state_3_Int)) && (11 <= hbv_state_3_Int || hbv_state_15_Bool))) && !((hbv_state_22_Bool || (hbv_state_12_Int <= 12 && 8 <= hbv_state_12_Int)) && ((!hbv_state_22_Bool || !(hbv_state_12_Int <= 12)) || !(8 <= hbv_state_12_Int)))) && !((!hhv_state_18_Bool || !hhv_state_13_Bool) && (hhv_state_13_Bool || hhv_state_18_Bool))) && hbv_state_17_Int == hbv_state_18_Int) && !((!hhv_state_21_Bool || (hhv_state_7_Bool && !hhv_state_5_Bool)) && ((hhv_state_5_Bool || hhv_state_21_Bool) || !hhv_state_7_Bool))) && !(!hhv_state_1_Bool && !(hbv_state_18_Int + -1 * hhv_state_22_Int == -1))) && !(((hhv_state_6_Bool || hbv_state_6_Bool) || ((!(16 <= hhv_state_0_Int) && hhv_state_18_Bool) && 0 <= hhv_state_0_Int)) && ((!hbv_state_6_Bool && ((16 <= hhv_state_0_Int || !hhv_state_18_Bool) || !(0 <= hhv_state_0_Int))) || !hhv_state_6_Bool))) && !((hhv_state_13_Bool || (((hhv_state_10_Bool && hhv_state_12_Int <= 4) && -4 <= hhv_state_12_Int) && hhv_state_8_Bool)) && ((((!hhv_state_8_Bool || !(hhv_state_12_Int <= 4)) || !hhv_state_10_Bool) || !hhv_state_13_Bool) || !(-4 <= hhv_state_12_Int)))) && !((!hhv_state_7_Bool || !hhv_state_6_Bool) && (hhv_state_7_Bool || hhv_state_6_Bool))) && !(((hbv_state_7_Int <= -1 || hbv_state_8_Bool) && (!hbv_state_8_Bool || !(hbv_state_7_Int <= -1))) && hbv_state_9_Bool)) && !((hbv_state_10_Bool || (((hbv_state_7_Int <= 4 && hbv_state_5_Bool) && -4 <= hbv_state_7_Int) && hbv_state_8_Bool)) && ((((!(-4 <= hbv_state_7_Int) || !hbv_state_10_Bool) || !hbv_state_8_Bool) || !(hbv_state_7_Int <= 4)) || !hbv_state_5_Bool))) && hhv_state_14_Int == hhv_state_17_Int) && !(!hhv_state_8_Bool && !hhv_state_9_Bool)) && hbv_state_3_Int + (hhv_state_12_Int + -1 * hhv_state_17_Int) == 0; [L0] CALL call state(hbv_state_12_Int, hbv_state_22_Bool, hbv_state_17_Int, hbv_state_18_Int, hbv_state_1_Bool, hbv_state_2_Bool, hbv_state_21_Bool, hbv_state_6_Bool, hbv_state_8_Bool, hbv_state_9_Bool, hbv_state_5_Bool, hbv_state_4_Bool, hbv_state_7_Int, hbv_state_10_Bool, hbv_state_3_Int, hbv_state_15_Bool, hbv_state_14_Bool, hbv_state_19_Int, hbv_state_11_Bool, hbv_state_16_Bool, hbv_state_20_Bool, hbv_state_13_Bool, hbv_state_23_Int); [L0] assume ((((((((((((((((((((((((((((((((((((((((hhv_state_0_Int == hhv_state_14_Int && !((!hbv_state_21_Bool || !hbv_state_6_Bool) && (hbv_state_21_Bool || hbv_state_6_Bool))) && !(!hbv_state_9_Bool && !hbv_state_8_Bool)) && !((!hhv_state_20_Bool || !hhv_state_16_Bool) && (hhv_state_16_Bool || hhv_state_20_Bool))) && hhv_state_3_Int == hhv_state_2_Int) && hbv_state_3_Int == hbv_state_19_Int) && !((hbv_state_3_Int <= 9 || hbv_state_14_Bool) && (!hbv_state_14_Bool || !(hbv_state_3_Int <= 9)))) && !(((!hhv_state_1_Bool || !(hhv_state_0_Int <= 12)) || !(8 <= hhv_state_0_Int)) && ((8 <= hhv_state_0_Int && hhv_state_0_Int <= 12) || hhv_state_1_Bool))) && !((!(hbv_state_18_Int <= 7) || !hhv_state_4_Bool) && (hhv_state_4_Bool || hbv_state_18_Int <= 7))) && hhv_state_2_Int == hhv_state_22_Int) && !((!hhv_state_19_Bool || !hhv_state_15_Bool) && (hhv_state_15_Bool || hhv_state_19_Bool))) && !(((hhv_state_10_Bool || 1 <= hhv_state_12_Int) && (!hhv_state_10_Bool || !(1 <= hhv_state_12_Int))) && hhv_state_11_Bool)) && !((hbv_state_14_Bool || hbv_state_20_Bool) && (!hbv_state_20_Bool || !hbv_state_14_Bool))) && !(((hhv_state_12_Int <= -1 || hhv_state_8_Bool) && (!hhv_state_8_Bool || !(hhv_state_12_Int <= -1))) && hhv_state_9_Bool)) && !(!hbv_state_4_Bool && !hbv_state_5_Bool)) && !(hhv_state_1_Bool && !(hhv_state_22_Int == 0))) && !((!hbv_state_10_Bool || !hbv_state_11_Bool) && (hbv_state_10_Bool || hbv_state_11_Bool))) && !((!hhv_state_16_Bool || !(hhv_state_14_Int <= 9)) && (hhv_state_14_Int <= 9 || hhv_state_16_Bool))) && !((hbv_state_20_Bool || hhv_state_11_Bool) && (!hbv_state_20_Bool || !hhv_state_11_Bool))) && hbv_state_12_Int == hbv_state_3_Int) && !((hbv_state_1_Bool || hbv_state_2_Bool) && (!hbv_state_1_Bool || !hbv_state_2_Bool))) && !((hhv_state_15_Bool || 11 <= hhv_state_14_Int) && (!hhv_state_15_Bool || !(11 <= hhv_state_14_Int)))) && !(((hbv_state_6_Bool && !hbv_state_2_Bool) || !hbv_state_13_Bool) && ((hbv_state_13_Bool || hbv_state_2_Bool) || !hbv_state_6_Bool))) && !(!hhv_state_11_Bool && !hhv_state_10_Bool)) && !((!hhv_state_5_Bool || !hhv_state_4_Bool) && (hhv_state_4_Bool || hhv_state_5_Bool))) && !(((!(1 <= hbv_state_7_Int) || !hbv_state_5_Bool) && (1 <= hbv_state_7_Int || hbv_state_5_Bool)) && hbv_state_4_Bool)) && !((hbv_state_16_Bool || hhv_state_9_Bool) && (!hbv_state_16_Bool || !hhv_state_9_Bool))) && !((hbv_state_15_Bool || hbv_state_16_Bool) && (!hbv_state_15_Bool || !hbv_state_16_Bool))) && !((!hbv_state_15_Bool || !(11 <= hbv_state_3_Int)) && (11 <= hbv_state_3_Int || hbv_state_15_Bool))) && !((hbv_state_22_Bool || (hbv_state_12_Int <= 12 && 8 <= hbv_state_12_Int)) && ((!hbv_state_22_Bool || !(hbv_state_12_Int <= 12)) || !(8 <= hbv_state_12_Int)))) && !((!hhv_state_18_Bool || !hhv_state_13_Bool) && (hhv_state_13_Bool || hhv_state_18_Bool))) && hbv_state_17_Int == hbv_state_18_Int) && !((!hhv_state_21_Bool || (hhv_state_7_Bool && !hhv_state_5_Bool)) && ((hhv_state_5_Bool || hhv_state_21_Bool) || !hhv_state_7_Bool))) && !(!hhv_state_1_Bool && !(hbv_state_18_Int + -1 * hhv_state_22_Int == -1))) && !(((hhv_state_6_Bool || hbv_state_6_Bool) || ((!(16 <= hhv_state_0_Int) && hhv_state_18_Bool) && 0 <= hhv_state_0_Int)) && ((!hbv_state_6_Bool && ((16 <= hhv_state_0_Int || !hhv_state_18_Bool) || !(0 <= hhv_state_0_Int))) || !hhv_state_6_Bool))) && !((hhv_state_13_Bool || (((hhv_state_10_Bool && hhv_state_12_Int <= 4) && -4 <= hhv_state_12_Int) && hhv_state_8_Bool)) && ((((!hhv_state_8_Bool || !(hhv_state_12_Int <= 4)) || !hhv_state_10_Bool) || !hhv_state_13_Bool) || !(-4 <= hhv_state_12_Int)))) && !((!hhv_state_7_Bool || !hhv_state_6_Bool) && (hhv_state_7_Bool || hhv_state_6_Bool))) && !(((hbv_state_7_Int <= -1 || hbv_state_8_Bool) && (!hbv_state_8_Bool || !(hbv_state_7_Int <= -1))) && hbv_state_9_Bool)) && !((hbv_state_10_Bool || (((hbv_state_7_Int <= 4 && hbv_state_5_Bool) && -4 <= hbv_state_7_Int) && hbv_state_8_Bool)) && ((((!(-4 <= hbv_state_7_Int) || !hbv_state_10_Bool) || !hbv_state_8_Bool) || !(hbv_state_7_Int <= 4)) || !hbv_state_5_Bool))) && hhv_state_14_Int == hhv_state_17_Int) && !(!hhv_state_8_Bool && !hhv_state_9_Bool)) && hbv_state_3_Int + (hhv_state_12_Int + -1 * hhv_state_17_Int) == 0; [L0] CALL call state(hbv_state_12_Int, hbv_state_22_Bool, hbv_state_17_Int, hbv_state_18_Int, hbv_state_1_Bool, hbv_state_2_Bool, hbv_state_21_Bool, hbv_state_6_Bool, hbv_state_8_Bool, hbv_state_9_Bool, hbv_state_5_Bool, hbv_state_4_Bool, hbv_state_7_Int, hbv_state_10_Bool, hbv_state_3_Int, hbv_state_15_Bool, hbv_state_14_Bool, hbv_state_19_Int, hbv_state_11_Bool, hbv_state_16_Bool, hbv_state_20_Bool, hbv_state_13_Bool, hbv_state_23_Int); [L0] assume ((((((((((((((((((((((((((((((((((((((((hhv_state_0_Int == hhv_state_14_Int && !((!hbv_state_21_Bool || !hbv_state_6_Bool) && (hbv_state_21_Bool || hbv_state_6_Bool))) && !(!hbv_state_9_Bool && !hbv_state_8_Bool)) && !((!hhv_state_20_Bool || !hhv_state_16_Bool) && (hhv_state_16_Bool || hhv_state_20_Bool))) && hhv_state_3_Int == hhv_state_2_Int) && hbv_state_3_Int == hbv_state_19_Int) && !((hbv_state_3_Int <= 9 || hbv_state_14_Bool) && (!hbv_state_14_Bool || !(hbv_state_3_Int <= 9)))) && !(((!hhv_state_1_Bool || !(hhv_state_0_Int <= 12)) || !(8 <= hhv_state_0_Int)) && ((8 <= hhv_state_0_Int && hhv_state_0_Int <= 12) || hhv_state_1_Bool))) && !((!(hbv_state_18_Int <= 7) || !hhv_state_4_Bool) && (hhv_state_4_Bool || hbv_state_18_Int <= 7))) && hhv_state_2_Int == hhv_state_22_Int) && !((!hhv_state_19_Bool || !hhv_state_15_Bool) && (hhv_state_15_Bool || hhv_state_19_Bool))) && !(((hhv_state_10_Bool || 1 <= hhv_state_12_Int) && (!hhv_state_10_Bool || !(1 <= hhv_state_12_Int))) && hhv_state_11_Bool)) && !((hbv_state_14_Bool || hbv_state_20_Bool) && (!hbv_state_20_Bool || !hbv_state_14_Bool))) && !(((hhv_state_12_Int <= -1 || hhv_state_8_Bool) && (!hhv_state_8_Bool || !(hhv_state_12_Int <= -1))) && hhv_state_9_Bool)) && !(!hbv_state_4_Bool && !hbv_state_5_Bool)) && !(hhv_state_1_Bool && !(hhv_state_22_Int == 0))) && !((!hbv_state_10_Bool || !hbv_state_11_Bool) && (hbv_state_10_Bool || hbv_state_11_Bool))) && !((!hhv_state_16_Bool || !(hhv_state_14_Int <= 9)) && (hhv_state_14_Int <= 9 || hhv_state_16_Bool))) && !((hbv_state_20_Bool || hhv_state_11_Bool) && (!hbv_state_20_Bool || !hhv_state_11_Bool))) && hbv_state_12_Int == hbv_state_3_Int) && !((hbv_state_1_Bool || hbv_state_2_Bool) && (!hbv_state_1_Bool || !hbv_state_2_Bool))) && !((hhv_state_15_Bool || 11 <= hhv_state_14_Int) && (!hhv_state_15_Bool || !(11 <= hhv_state_14_Int)))) && !(((hbv_state_6_Bool && !hbv_state_2_Bool) || !hbv_state_13_Bool) && ((hbv_state_13_Bool || hbv_state_2_Bool) || !hbv_state_6_Bool))) && !(!hhv_state_11_Bool && !hhv_state_10_Bool)) && !((!hhv_state_5_Bool || !hhv_state_4_Bool) && (hhv_state_4_Bool || hhv_state_5_Bool))) && !(((!(1 <= hbv_state_7_Int) || !hbv_state_5_Bool) && (1 <= hbv_state_7_Int || hbv_state_5_Bool)) && hbv_state_4_Bool)) && !((hbv_state_16_Bool || hhv_state_9_Bool) && (!hbv_state_16_Bool || !hhv_state_9_Bool))) && !((hbv_state_15_Bool || hbv_state_16_Bool) && (!hbv_state_15_Bool || !hbv_state_16_Bool))) && !((!hbv_state_15_Bool || !(11 <= hbv_state_3_Int)) && (11 <= hbv_state_3_Int || hbv_state_15_Bool))) && !((hbv_state_22_Bool || (hbv_state_12_Int <= 12 && 8 <= hbv_state_12_Int)) && ((!hbv_state_22_Bool || !(hbv_state_12_Int <= 12)) || !(8 <= hbv_state_12_Int)))) && !((!hhv_state_18_Bool || !hhv_state_13_Bool) && (hhv_state_13_Bool || hhv_state_18_Bool))) && hbv_state_17_Int == hbv_state_18_Int) && !((!hhv_state_21_Bool || (hhv_state_7_Bool && !hhv_state_5_Bool)) && ((hhv_state_5_Bool || hhv_state_21_Bool) || !hhv_state_7_Bool))) && !(!hhv_state_1_Bool && !(hbv_state_18_Int + -1 * hhv_state_22_Int == -1))) && !(((hhv_state_6_Bool || hbv_state_6_Bool) || ((!(16 <= hhv_state_0_Int) && hhv_state_18_Bool) && 0 <= hhv_state_0_Int)) && ((!hbv_state_6_Bool && ((16 <= hhv_state_0_Int || !hhv_state_18_Bool) || !(0 <= hhv_state_0_Int))) || !hhv_state_6_Bool))) && !((hhv_state_13_Bool || (((hhv_state_10_Bool && hhv_state_12_Int <= 4) && -4 <= hhv_state_12_Int) && hhv_state_8_Bool)) && ((((!hhv_state_8_Bool || !(hhv_state_12_Int <= 4)) || !hhv_state_10_Bool) || !hhv_state_13_Bool) || !(-4 <= hhv_state_12_Int)))) && !((!hhv_state_7_Bool || !hhv_state_6_Bool) && (hhv_state_7_Bool || hhv_state_6_Bool))) && !(((hbv_state_7_Int <= -1 || hbv_state_8_Bool) && (!hbv_state_8_Bool || !(hbv_state_7_Int <= -1))) && hbv_state_9_Bool)) && !((hbv_state_10_Bool || (((hbv_state_7_Int <= 4 && hbv_state_5_Bool) && -4 <= hbv_state_7_Int) && hbv_state_8_Bool)) && ((((!(-4 <= hbv_state_7_Int) || !hbv_state_10_Bool) || !hbv_state_8_Bool) || !(hbv_state_7_Int <= 4)) || !hbv_state_5_Bool))) && hhv_state_14_Int == hhv_state_17_Int) && !(!hhv_state_8_Bool && !hhv_state_9_Bool)) && hbv_state_3_Int + (hhv_state_12_Int + -1 * hhv_state_17_Int) == 0; [L0] CALL call state(hbv_state_12_Int, hbv_state_22_Bool, hbv_state_17_Int, hbv_state_18_Int, hbv_state_1_Bool, hbv_state_2_Bool, hbv_state_21_Bool, hbv_state_6_Bool, hbv_state_8_Bool, hbv_state_9_Bool, hbv_state_5_Bool, hbv_state_4_Bool, hbv_state_7_Int, hbv_state_10_Bool, hbv_state_3_Int, hbv_state_15_Bool, hbv_state_14_Bool, hbv_state_19_Int, hbv_state_11_Bool, hbv_state_16_Bool, hbv_state_20_Bool, hbv_state_13_Bool, hbv_state_23_Int); [L0] assume ((((((((((((((((((((((((((((((((((((((((hhv_state_0_Int == hhv_state_14_Int && !((!hbv_state_21_Bool || !hbv_state_6_Bool) && (hbv_state_21_Bool || hbv_state_6_Bool))) && !(!hbv_state_9_Bool && !hbv_state_8_Bool)) && !((!hhv_state_20_Bool || !hhv_state_16_Bool) && (hhv_state_16_Bool || hhv_state_20_Bool))) && hhv_state_3_Int == hhv_state_2_Int) && hbv_state_3_Int == hbv_state_19_Int) && !((hbv_state_3_Int <= 9 || hbv_state_14_Bool) && (!hbv_state_14_Bool || !(hbv_state_3_Int <= 9)))) && !(((!hhv_state_1_Bool || !(hhv_state_0_Int <= 12)) || !(8 <= hhv_state_0_Int)) && ((8 <= hhv_state_0_Int && hhv_state_0_Int <= 12) || hhv_state_1_Bool))) && !((!(hbv_state_18_Int <= 7) || !hhv_state_4_Bool) && (hhv_state_4_Bool || hbv_state_18_Int <= 7))) && hhv_state_2_Int == hhv_state_22_Int) && !((!hhv_state_19_Bool || !hhv_state_15_Bool) && (hhv_state_15_Bool || hhv_state_19_Bool))) && !(((hhv_state_10_Bool || 1 <= hhv_state_12_Int) && (!hhv_state_10_Bool || !(1 <= hhv_state_12_Int))) && hhv_state_11_Bool)) && !((hbv_state_14_Bool || hbv_state_20_Bool) && (!hbv_state_20_Bool || !hbv_state_14_Bool))) && !(((hhv_state_12_Int <= -1 || hhv_state_8_Bool) && (!hhv_state_8_Bool || !(hhv_state_12_Int <= -1))) && hhv_state_9_Bool)) && !(!hbv_state_4_Bool && !hbv_state_5_Bool)) && !(hhv_state_1_Bool && !(hhv_state_22_Int == 0))) && !((!hbv_state_10_Bool || !hbv_state_11_Bool) && (hbv_state_10_Bool || hbv_state_11_Bool))) && !((!hhv_state_16_Bool || !(hhv_state_14_Int <= 9)) && (hhv_state_14_Int <= 9 || hhv_state_16_Bool))) && !((hbv_state_20_Bool || hhv_state_11_Bool) && (!hbv_state_20_Bool || !hhv_state_11_Bool))) && hbv_state_12_Int == hbv_state_3_Int) && !((hbv_state_1_Bool || hbv_state_2_Bool) && (!hbv_state_1_Bool || !hbv_state_2_Bool))) && !((hhv_state_15_Bool || 11 <= hhv_state_14_Int) && (!hhv_state_15_Bool || !(11 <= hhv_state_14_Int)))) && !(((hbv_state_6_Bool && !hbv_state_2_Bool) || !hbv_state_13_Bool) && ((hbv_state_13_Bool || hbv_state_2_Bool) || !hbv_state_6_Bool))) && !(!hhv_state_11_Bool && !hhv_state_10_Bool)) && !((!hhv_state_5_Bool || !hhv_state_4_Bool) && (hhv_state_4_Bool || hhv_state_5_Bool))) && !(((!(1 <= hbv_state_7_Int) || !hbv_state_5_Bool) && (1 <= hbv_state_7_Int || hbv_state_5_Bool)) && hbv_state_4_Bool)) && !((hbv_state_16_Bool || hhv_state_9_Bool) && (!hbv_state_16_Bool || !hhv_state_9_Bool))) && !((hbv_state_15_Bool || hbv_state_16_Bool) && (!hbv_state_15_Bool || !hbv_state_16_Bool))) && !((!hbv_state_15_Bool || !(11 <= hbv_state_3_Int)) && (11 <= hbv_state_3_Int || hbv_state_15_Bool))) && !((hbv_state_22_Bool || (hbv_state_12_Int <= 12 && 8 <= hbv_state_12_Int)) && ((!hbv_state_22_Bool || !(hbv_state_12_Int <= 12)) || !(8 <= hbv_state_12_Int)))) && !((!hhv_state_18_Bool || !hhv_state_13_Bool) && (hhv_state_13_Bool || hhv_state_18_Bool))) && hbv_state_17_Int == hbv_state_18_Int) && !((!hhv_state_21_Bool || (hhv_state_7_Bool && !hhv_state_5_Bool)) && ((hhv_state_5_Bool || hhv_state_21_Bool) || !hhv_state_7_Bool))) && !(!hhv_state_1_Bool && !(hbv_state_18_Int + -1 * hhv_state_22_Int == -1))) && !(((hhv_state_6_Bool || hbv_state_6_Bool) || ((!(16 <= hhv_state_0_Int) && hhv_state_18_Bool) && 0 <= hhv_state_0_Int)) && ((!hbv_state_6_Bool && ((16 <= hhv_state_0_Int || !hhv_state_18_Bool) || !(0 <= hhv_state_0_Int))) || !hhv_state_6_Bool))) && !((hhv_state_13_Bool || (((hhv_state_10_Bool && hhv_state_12_Int <= 4) && -4 <= hhv_state_12_Int) && hhv_state_8_Bool)) && ((((!hhv_state_8_Bool || !(hhv_state_12_Int <= 4)) || !hhv_state_10_Bool) || !hhv_state_13_Bool) || !(-4 <= hhv_state_12_Int)))) && !((!hhv_state_7_Bool || !hhv_state_6_Bool) && (hhv_state_7_Bool || hhv_state_6_Bool))) && !(((hbv_state_7_Int <= -1 || hbv_state_8_Bool) && (!hbv_state_8_Bool || !(hbv_state_7_Int <= -1))) && hbv_state_9_Bool)) && !((hbv_state_10_Bool || (((hbv_state_7_Int <= 4 && hbv_state_5_Bool) && -4 <= hbv_state_7_Int) && hbv_state_8_Bool)) && ((((!(-4 <= hbv_state_7_Int) || !hbv_state_10_Bool) || !hbv_state_8_Bool) || !(hbv_state_7_Int <= 4)) || !hbv_state_5_Bool))) && hhv_state_14_Int == hhv_state_17_Int) && !(!hhv_state_8_Bool && !hhv_state_9_Bool)) && hbv_state_3_Int + (hhv_state_12_Int + -1 * hhv_state_17_Int) == 0; [L0] CALL call state(hbv_state_12_Int, hbv_state_22_Bool, hbv_state_17_Int, hbv_state_18_Int, hbv_state_1_Bool, hbv_state_2_Bool, hbv_state_21_Bool, hbv_state_6_Bool, hbv_state_8_Bool, hbv_state_9_Bool, hbv_state_5_Bool, hbv_state_4_Bool, hbv_state_7_Int, hbv_state_10_Bool, hbv_state_3_Int, hbv_state_15_Bool, hbv_state_14_Bool, hbv_state_19_Int, hbv_state_11_Bool, hbv_state_16_Bool, hbv_state_20_Bool, hbv_state_13_Bool, hbv_state_23_Int); [L0] assume ((((((((((((((((((((((((((((((((((((((((hhv_state_0_Int == hhv_state_14_Int && !((!hbv_state_21_Bool || !hbv_state_6_Bool) && (hbv_state_21_Bool || hbv_state_6_Bool))) && !(!hbv_state_9_Bool && !hbv_state_8_Bool)) && !((!hhv_state_20_Bool || !hhv_state_16_Bool) && (hhv_state_16_Bool || hhv_state_20_Bool))) && hhv_state_3_Int == hhv_state_2_Int) && hbv_state_3_Int == hbv_state_19_Int) && !((hbv_state_3_Int <= 9 || hbv_state_14_Bool) && (!hbv_state_14_Bool || !(hbv_state_3_Int <= 9)))) && !(((!hhv_state_1_Bool || !(hhv_state_0_Int <= 12)) || !(8 <= hhv_state_0_Int)) && ((8 <= hhv_state_0_Int && hhv_state_0_Int <= 12) || hhv_state_1_Bool))) && !((!(hbv_state_18_Int <= 7) || !hhv_state_4_Bool) && (hhv_state_4_Bool || hbv_state_18_Int <= 7))) && hhv_state_2_Int == hhv_state_22_Int) && !((!hhv_state_19_Bool || !hhv_state_15_Bool) && (hhv_state_15_Bool || hhv_state_19_Bool))) && !(((hhv_state_10_Bool || 1 <= hhv_state_12_Int) && (!hhv_state_10_Bool || !(1 <= hhv_state_12_Int))) && hhv_state_11_Bool)) && !((hbv_state_14_Bool || hbv_state_20_Bool) && (!hbv_state_20_Bool || !hbv_state_14_Bool))) && !(((hhv_state_12_Int <= -1 || hhv_state_8_Bool) && (!hhv_state_8_Bool || !(hhv_state_12_Int <= -1))) && hhv_state_9_Bool)) && !(!hbv_state_4_Bool && !hbv_state_5_Bool)) && !(hhv_state_1_Bool && !(hhv_state_22_Int == 0))) && !((!hbv_state_10_Bool || !hbv_state_11_Bool) && (hbv_state_10_Bool || hbv_state_11_Bool))) && !((!hhv_state_16_Bool || !(hhv_state_14_Int <= 9)) && (hhv_state_14_Int <= 9 || hhv_state_16_Bool))) && !((hbv_state_20_Bool || hhv_state_11_Bool) && (!hbv_state_20_Bool || !hhv_state_11_Bool))) && hbv_state_12_Int == hbv_state_3_Int) && !((hbv_state_1_Bool || hbv_state_2_Bool) && (!hbv_state_1_Bool || !hbv_state_2_Bool))) && !((hhv_state_15_Bool || 11 <= hhv_state_14_Int) && (!hhv_state_15_Bool || !(11 <= hhv_state_14_Int)))) && !(((hbv_state_6_Bool && !hbv_state_2_Bool) || !hbv_state_13_Bool) && ((hbv_state_13_Bool || hbv_state_2_Bool) || !hbv_state_6_Bool))) && !(!hhv_state_11_Bool && !hhv_state_10_Bool)) && !((!hhv_state_5_Bool || !hhv_state_4_Bool) && (hhv_state_4_Bool || hhv_state_5_Bool))) && !(((!(1 <= hbv_state_7_Int) || !hbv_state_5_Bool) && (1 <= hbv_state_7_Int || hbv_state_5_Bool)) && hbv_state_4_Bool)) && !((hbv_state_16_Bool || hhv_state_9_Bool) && (!hbv_state_16_Bool || !hhv_state_9_Bool))) && !((hbv_state_15_Bool || hbv_state_16_Bool) && (!hbv_state_15_Bool || !hbv_state_16_Bool))) && !((!hbv_state_15_Bool || !(11 <= hbv_state_3_Int)) && (11 <= hbv_state_3_Int || hbv_state_15_Bool))) && !((hbv_state_22_Bool || (hbv_state_12_Int <= 12 && 8 <= hbv_state_12_Int)) && ((!hbv_state_22_Bool || !(hbv_state_12_Int <= 12)) || !(8 <= hbv_state_12_Int)))) && !((!hhv_state_18_Bool || !hhv_state_13_Bool) && (hhv_state_13_Bool || hhv_state_18_Bool))) && hbv_state_17_Int == hbv_state_18_Int) && !((!hhv_state_21_Bool || (hhv_state_7_Bool && !hhv_state_5_Bool)) && ((hhv_state_5_Bool || hhv_state_21_Bool) || !hhv_state_7_Bool))) && !(!hhv_state_1_Bool && !(hbv_state_18_Int + -1 * hhv_state_22_Int == -1))) && !(((hhv_state_6_Bool || hbv_state_6_Bool) || ((!(16 <= hhv_state_0_Int) && hhv_state_18_Bool) && 0 <= hhv_state_0_Int)) && ((!hbv_state_6_Bool && ((16 <= hhv_state_0_Int || !hhv_state_18_Bool) || !(0 <= hhv_state_0_Int))) || !hhv_state_6_Bool))) && !((hhv_state_13_Bool || (((hhv_state_10_Bool && hhv_state_12_Int <= 4) && -4 <= hhv_state_12_Int) && hhv_state_8_Bool)) && ((((!hhv_state_8_Bool || !(hhv_state_12_Int <= 4)) || !hhv_state_10_Bool) || !hhv_state_13_Bool) || !(-4 <= hhv_state_12_Int)))) && !((!hhv_state_7_Bool || !hhv_state_6_Bool) && (hhv_state_7_Bool || hhv_state_6_Bool))) && !(((hbv_state_7_Int <= -1 || hbv_state_8_Bool) && (!hbv_state_8_Bool || !(hbv_state_7_Int <= -1))) && hbv_state_9_Bool)) && !((hbv_state_10_Bool || (((hbv_state_7_Int <= 4 && hbv_state_5_Bool) && -4 <= hbv_state_7_Int) && hbv_state_8_Bool)) && ((((!(-4 <= hbv_state_7_Int) || !hbv_state_10_Bool) || !hbv_state_8_Bool) || !(hbv_state_7_Int <= 4)) || !hbv_state_5_Bool))) && hhv_state_14_Int == hhv_state_17_Int) && !(!hhv_state_8_Bool && !hhv_state_9_Bool)) && hbv_state_3_Int + (hhv_state_12_Int + -1 * hhv_state_17_Int) == 0; [L0] CALL call state(hbv_state_12_Int, hbv_state_22_Bool, hbv_state_17_Int, hbv_state_18_Int, hbv_state_1_Bool, hbv_state_2_Bool, hbv_state_21_Bool, hbv_state_6_Bool, hbv_state_8_Bool, hbv_state_9_Bool, hbv_state_5_Bool, hbv_state_4_Bool, hbv_state_7_Int, hbv_state_10_Bool, hbv_state_3_Int, hbv_state_15_Bool, hbv_state_14_Bool, hbv_state_19_Int, hbv_state_11_Bool, hbv_state_16_Bool, hbv_state_20_Bool, hbv_state_13_Bool, hbv_state_23_Int); [L0] assume ((((((((((((((((((((((((((((((((((((((((hhv_state_0_Int == hhv_state_14_Int && !((!hbv_state_21_Bool || !hbv_state_6_Bool) && (hbv_state_21_Bool || hbv_state_6_Bool))) && !(!hbv_state_9_Bool && !hbv_state_8_Bool)) && !((!hhv_state_20_Bool || !hhv_state_16_Bool) && (hhv_state_16_Bool || hhv_state_20_Bool))) && hhv_state_3_Int == hhv_state_2_Int) && hbv_state_3_Int == hbv_state_19_Int) && !((hbv_state_3_Int <= 9 || hbv_state_14_Bool) && (!hbv_state_14_Bool || !(hbv_state_3_Int <= 9)))) && !(((!hhv_state_1_Bool || !(hhv_state_0_Int <= 12)) || !(8 <= hhv_state_0_Int)) && ((8 <= hhv_state_0_Int && hhv_state_0_Int <= 12) || hhv_state_1_Bool))) && !((!(hbv_state_18_Int <= 7) || !hhv_state_4_Bool) && (hhv_state_4_Bool || hbv_state_18_Int <= 7))) && hhv_state_2_Int == hhv_state_22_Int) && !((!hhv_state_19_Bool || !hhv_state_15_Bool) && (hhv_state_15_Bool || hhv_state_19_Bool))) && !(((hhv_state_10_Bool || 1 <= hhv_state_12_Int) && (!hhv_state_10_Bool || !(1 <= hhv_state_12_Int))) && hhv_state_11_Bool)) && !((hbv_state_14_Bool || hbv_state_20_Bool) && (!hbv_state_20_Bool || !hbv_state_14_Bool))) && !(((hhv_state_12_Int <= -1 || hhv_state_8_Bool) && (!hhv_state_8_Bool || !(hhv_state_12_Int <= -1))) && hhv_state_9_Bool)) && !(!hbv_state_4_Bool && !hbv_state_5_Bool)) && !(hhv_state_1_Bool && !(hhv_state_22_Int == 0))) && !((!hbv_state_10_Bool || !hbv_state_11_Bool) && (hbv_state_10_Bool || hbv_state_11_Bool))) && !((!hhv_state_16_Bool || !(hhv_state_14_Int <= 9)) && (hhv_state_14_Int <= 9 || hhv_state_16_Bool))) && !((hbv_state_20_Bool || hhv_state_11_Bool) && (!hbv_state_20_Bool || !hhv_state_11_Bool))) && hbv_state_12_Int == hbv_state_3_Int) && !((hbv_state_1_Bool || hbv_state_2_Bool) && (!hbv_state_1_Bool || !hbv_state_2_Bool))) && !((hhv_state_15_Bool || 11 <= hhv_state_14_Int) && (!hhv_state_15_Bool || !(11 <= hhv_state_14_Int)))) && !(((hbv_state_6_Bool && !hbv_state_2_Bool) || !hbv_state_13_Bool) && ((hbv_state_13_Bool || hbv_state_2_Bool) || !hbv_state_6_Bool))) && !(!hhv_state_11_Bool && !hhv_state_10_Bool)) && !((!hhv_state_5_Bool || !hhv_state_4_Bool) && (hhv_state_4_Bool || hhv_state_5_Bool))) && !(((!(1 <= hbv_state_7_Int) || !hbv_state_5_Bool) && (1 <= hbv_state_7_Int || hbv_state_5_Bool)) && hbv_state_4_Bool)) && !((hbv_state_16_Bool || hhv_state_9_Bool) && (!hbv_state_16_Bool || !hhv_state_9_Bool))) && !((hbv_state_15_Bool || hbv_state_16_Bool) && (!hbv_state_15_Bool || !hbv_state_16_Bool))) && !((!hbv_state_15_Bool || !(11 <= hbv_state_3_Int)) && (11 <= hbv_state_3_Int || hbv_state_15_Bool))) && !((hbv_state_22_Bool || (hbv_state_12_Int <= 12 && 8 <= hbv_state_12_Int)) && ((!hbv_state_22_Bool || !(hbv_state_12_Int <= 12)) || !(8 <= hbv_state_12_Int)))) && !((!hhv_state_18_Bool || !hhv_state_13_Bool) && (hhv_state_13_Bool || hhv_state_18_Bool))) && hbv_state_17_Int == hbv_state_18_Int) && !((!hhv_state_21_Bool || (hhv_state_7_Bool && !hhv_state_5_Bool)) && ((hhv_state_5_Bool || hhv_state_21_Bool) || !hhv_state_7_Bool))) && !(!hhv_state_1_Bool && !(hbv_state_18_Int + -1 * hhv_state_22_Int == -1))) && !(((hhv_state_6_Bool || hbv_state_6_Bool) || ((!(16 <= hhv_state_0_Int) && hhv_state_18_Bool) && 0 <= hhv_state_0_Int)) && ((!hbv_state_6_Bool && ((16 <= hhv_state_0_Int || !hhv_state_18_Bool) || !(0 <= hhv_state_0_Int))) || !hhv_state_6_Bool))) && !((hhv_state_13_Bool || (((hhv_state_10_Bool && hhv_state_12_Int <= 4) && -4 <= hhv_state_12_Int) && hhv_state_8_Bool)) && ((((!hhv_state_8_Bool || !(hhv_state_12_Int <= 4)) || !hhv_state_10_Bool) || !hhv_state_13_Bool) || !(-4 <= hhv_state_12_Int)))) && !((!hhv_state_7_Bool || !hhv_state_6_Bool) && (hhv_state_7_Bool || hhv_state_6_Bool))) && !(((hbv_state_7_Int <= -1 || hbv_state_8_Bool) && (!hbv_state_8_Bool || !(hbv_state_7_Int <= -1))) && hbv_state_9_Bool)) && !((hbv_state_10_Bool || (((hbv_state_7_Int <= 4 && hbv_state_5_Bool) && -4 <= hbv_state_7_Int) && hbv_state_8_Bool)) && ((((!(-4 <= hbv_state_7_Int) || !hbv_state_10_Bool) || !hbv_state_8_Bool) || !(hbv_state_7_Int <= 4)) || !hbv_state_5_Bool))) && hhv_state_14_Int == hhv_state_17_Int) && !(!hhv_state_8_Bool && !hhv_state_9_Bool)) && hbv_state_3_Int + (hhv_state_12_Int + -1 * hhv_state_17_Int) == 0; [L0] CALL call state(hbv_state_12_Int, hbv_state_22_Bool, hbv_state_17_Int, hbv_state_18_Int, hbv_state_1_Bool, hbv_state_2_Bool, hbv_state_21_Bool, hbv_state_6_Bool, hbv_state_8_Bool, hbv_state_9_Bool, hbv_state_5_Bool, hbv_state_4_Bool, hbv_state_7_Int, hbv_state_10_Bool, hbv_state_3_Int, hbv_state_15_Bool, hbv_state_14_Bool, hbv_state_19_Int, hbv_state_11_Bool, hbv_state_16_Bool, hbv_state_20_Bool, hbv_state_13_Bool, hbv_state_23_Int); [L0] assume ((((((((((((((((((((((((((((((((((((((((hhv_state_0_Int == hhv_state_14_Int && !((!hbv_state_21_Bool || !hbv_state_6_Bool) && (hbv_state_21_Bool || hbv_state_6_Bool))) && !(!hbv_state_9_Bool && !hbv_state_8_Bool)) && !((!hhv_state_20_Bool || !hhv_state_16_Bool) && (hhv_state_16_Bool || hhv_state_20_Bool))) && hhv_state_3_Int == hhv_state_2_Int) && hbv_state_3_Int == hbv_state_19_Int) && !((hbv_state_3_Int <= 9 || hbv_state_14_Bool) && (!hbv_state_14_Bool || !(hbv_state_3_Int <= 9)))) && !(((!hhv_state_1_Bool || !(hhv_state_0_Int <= 12)) || !(8 <= hhv_state_0_Int)) && ((8 <= hhv_state_0_Int && hhv_state_0_Int <= 12) || hhv_state_1_Bool))) && !((!(hbv_state_18_Int <= 7) || !hhv_state_4_Bool) && (hhv_state_4_Bool || hbv_state_18_Int <= 7))) && hhv_state_2_Int == hhv_state_22_Int) && !((!hhv_state_19_Bool || !hhv_state_15_Bool) && (hhv_state_15_Bool || hhv_state_19_Bool))) && !(((hhv_state_10_Bool || 1 <= hhv_state_12_Int) && (!hhv_state_10_Bool || !(1 <= hhv_state_12_Int))) && hhv_state_11_Bool)) && !((hbv_state_14_Bool || hbv_state_20_Bool) && (!hbv_state_20_Bool || !hbv_state_14_Bool))) && !(((hhv_state_12_Int <= -1 || hhv_state_8_Bool) && (!hhv_state_8_Bool || !(hhv_state_12_Int <= -1))) && hhv_state_9_Bool)) && !(!hbv_state_4_Bool && !hbv_state_5_Bool)) && !(hhv_state_1_Bool && !(hhv_state_22_Int == 0))) && !((!hbv_state_10_Bool || !hbv_state_11_Bool) && (hbv_state_10_Bool || hbv_state_11_Bool))) && !((!hhv_state_16_Bool || !(hhv_state_14_Int <= 9)) && (hhv_state_14_Int <= 9 || hhv_state_16_Bool))) && !((hbv_state_20_Bool || hhv_state_11_Bool) && (!hbv_state_20_Bool || !hhv_state_11_Bool))) && hbv_state_12_Int == hbv_state_3_Int) && !((hbv_state_1_Bool || hbv_state_2_Bool) && (!hbv_state_1_Bool || !hbv_state_2_Bool))) && !((hhv_state_15_Bool || 11 <= hhv_state_14_Int) && (!hhv_state_15_Bool || !(11 <= hhv_state_14_Int)))) && !(((hbv_state_6_Bool && !hbv_state_2_Bool) || !hbv_state_13_Bool) && ((hbv_state_13_Bool || hbv_state_2_Bool) || !hbv_state_6_Bool))) && !(!hhv_state_11_Bool && !hhv_state_10_Bool)) && !((!hhv_state_5_Bool || !hhv_state_4_Bool) && (hhv_state_4_Bool || hhv_state_5_Bool))) && !(((!(1 <= hbv_state_7_Int) || !hbv_state_5_Bool) && (1 <= hbv_state_7_Int || hbv_state_5_Bool)) && hbv_state_4_Bool)) && !((hbv_state_16_Bool || hhv_state_9_Bool) && (!hbv_state_16_Bool || !hhv_state_9_Bool))) && !((hbv_state_15_Bool || hbv_state_16_Bool) && (!hbv_state_15_Bool || !hbv_state_16_Bool))) && !((!hbv_state_15_Bool || !(11 <= hbv_state_3_Int)) && (11 <= hbv_state_3_Int || hbv_state_15_Bool))) && !((hbv_state_22_Bool || (hbv_state_12_Int <= 12 && 8 <= hbv_state_12_Int)) && ((!hbv_state_22_Bool || !(hbv_state_12_Int <= 12)) || !(8 <= hbv_state_12_Int)))) && !((!hhv_state_18_Bool || !hhv_state_13_Bool) && (hhv_state_13_Bool || hhv_state_18_Bool))) && hbv_state_17_Int == hbv_state_18_Int) && !((!hhv_state_21_Bool || (hhv_state_7_Bool && !hhv_state_5_Bool)) && ((hhv_state_5_Bool || hhv_state_21_Bool) || !hhv_state_7_Bool))) && !(!hhv_state_1_Bool && !(hbv_state_18_Int + -1 * hhv_state_22_Int == -1))) && !(((hhv_state_6_Bool || hbv_state_6_Bool) || ((!(16 <= hhv_state_0_Int) && hhv_state_18_Bool) && 0 <= hhv_state_0_Int)) && ((!hbv_state_6_Bool && ((16 <= hhv_state_0_Int || !hhv_state_18_Bool) || !(0 <= hhv_state_0_Int))) || !hhv_state_6_Bool))) && !((hhv_state_13_Bool || (((hhv_state_10_Bool && hhv_state_12_Int <= 4) && -4 <= hhv_state_12_Int) && hhv_state_8_Bool)) && ((((!hhv_state_8_Bool || !(hhv_state_12_Int <= 4)) || !hhv_state_10_Bool) || !hhv_state_13_Bool) || !(-4 <= hhv_state_12_Int)))) && !((!hhv_state_7_Bool || !hhv_state_6_Bool) && (hhv_state_7_Bool || hhv_state_6_Bool))) && !(((hbv_state_7_Int <= -1 || hbv_state_8_Bool) && (!hbv_state_8_Bool || !(hbv_state_7_Int <= -1))) && hbv_state_9_Bool)) && !((hbv_state_10_Bool || (((hbv_state_7_Int <= 4 && hbv_state_5_Bool) && -4 <= hbv_state_7_Int) && hbv_state_8_Bool)) && ((((!(-4 <= hbv_state_7_Int) || !hbv_state_10_Bool) || !hbv_state_8_Bool) || !(hbv_state_7_Int <= 4)) || !hbv_state_5_Bool))) && hhv_state_14_Int == hhv_state_17_Int) && !(!hhv_state_8_Bool && !hhv_state_9_Bool)) && hbv_state_3_Int + (hhv_state_12_Int + -1 * hhv_state_17_Int) == 0; [L0] CALL call state(hbv_state_12_Int, hbv_state_22_Bool, hbv_state_17_Int, hbv_state_18_Int, hbv_state_1_Bool, hbv_state_2_Bool, hbv_state_21_Bool, hbv_state_6_Bool, hbv_state_8_Bool, hbv_state_9_Bool, hbv_state_5_Bool, hbv_state_4_Bool, hbv_state_7_Int, hbv_state_10_Bool, hbv_state_3_Int, hbv_state_15_Bool, hbv_state_14_Bool, hbv_state_19_Int, hbv_state_11_Bool, hbv_state_16_Bool, hbv_state_20_Bool, hbv_state_13_Bool, hbv_state_23_Int); [L0] assume ((((((((((((((((((((((((((((((((((((((((hhv_state_0_Int == hhv_state_14_Int && !((!hbv_state_21_Bool || !hbv_state_6_Bool) && (hbv_state_21_Bool || hbv_state_6_Bool))) && !(!hbv_state_9_Bool && !hbv_state_8_Bool)) && !((!hhv_state_20_Bool || !hhv_state_16_Bool) && (hhv_state_16_Bool || hhv_state_20_Bool))) && hhv_state_3_Int == hhv_state_2_Int) && hbv_state_3_Int == hbv_state_19_Int) && !((hbv_state_3_Int <= 9 || hbv_state_14_Bool) && (!hbv_state_14_Bool || !(hbv_state_3_Int <= 9)))) && !(((!hhv_state_1_Bool || !(hhv_state_0_Int <= 12)) || !(8 <= hhv_state_0_Int)) && ((8 <= hhv_state_0_Int && hhv_state_0_Int <= 12) || hhv_state_1_Bool))) && !((!(hbv_state_18_Int <= 7) || !hhv_state_4_Bool) && (hhv_state_4_Bool || hbv_state_18_Int <= 7))) && hhv_state_2_Int == hhv_state_22_Int) && !((!hhv_state_19_Bool || !hhv_state_15_Bool) && (hhv_state_15_Bool || hhv_state_19_Bool))) && !(((hhv_state_10_Bool || 1 <= hhv_state_12_Int) && (!hhv_state_10_Bool || !(1 <= hhv_state_12_Int))) && hhv_state_11_Bool)) && !((hbv_state_14_Bool || hbv_state_20_Bool) && (!hbv_state_20_Bool || !hbv_state_14_Bool))) && !(((hhv_state_12_Int <= -1 || hhv_state_8_Bool) && (!hhv_state_8_Bool || !(hhv_state_12_Int <= -1))) && hhv_state_9_Bool)) && !(!hbv_state_4_Bool && !hbv_state_5_Bool)) && !(hhv_state_1_Bool && !(hhv_state_22_Int == 0))) && !((!hbv_state_10_Bool || !hbv_state_11_Bool) && (hbv_state_10_Bool || hbv_state_11_Bool))) && !((!hhv_state_16_Bool || !(hhv_state_14_Int <= 9)) && (hhv_state_14_Int <= 9 || hhv_state_16_Bool))) && !((hbv_state_20_Bool || hhv_state_11_Bool) && (!hbv_state_20_Bool || !hhv_state_11_Bool))) && hbv_state_12_Int == hbv_state_3_Int) && !((hbv_state_1_Bool || hbv_state_2_Bool) && (!hbv_state_1_Bool || !hbv_state_2_Bool))) && !((hhv_state_15_Bool || 11 <= hhv_state_14_Int) && (!hhv_state_15_Bool || !(11 <= hhv_state_14_Int)))) && !(((hbv_state_6_Bool && !hbv_state_2_Bool) || !hbv_state_13_Bool) && ((hbv_state_13_Bool || hbv_state_2_Bool) || !hbv_state_6_Bool))) && !(!hhv_state_11_Bool && !hhv_state_10_Bool)) && !((!hhv_state_5_Bool || !hhv_state_4_Bool) && (hhv_state_4_Bool || hhv_state_5_Bool))) && !(((!(1 <= hbv_state_7_Int) || !hbv_state_5_Bool) && (1 <= hbv_state_7_Int || hbv_state_5_Bool)) && hbv_state_4_Bool)) && !((hbv_state_16_Bool || hhv_state_9_Bool) && (!hbv_state_16_Bool || !hhv_state_9_Bool))) && !((hbv_state_15_Bool || hbv_state_16_Bool) && (!hbv_state_15_Bool || !hbv_state_16_Bool))) && !((!hbv_state_15_Bool || !(11 <= hbv_state_3_Int)) && (11 <= hbv_state_3_Int || hbv_state_15_Bool))) && !((hbv_state_22_Bool || (hbv_state_12_Int <= 12 && 8 <= hbv_state_12_Int)) && ((!hbv_state_22_Bool || !(hbv_state_12_Int <= 12)) || !(8 <= hbv_state_12_Int)))) && !((!hhv_state_18_Bool || !hhv_state_13_Bool) && (hhv_state_13_Bool || hhv_state_18_Bool))) && hbv_state_17_Int == hbv_state_18_Int) && !((!hhv_state_21_Bool || (hhv_state_7_Bool && !hhv_state_5_Bool)) && ((hhv_state_5_Bool || hhv_state_21_Bool) || !hhv_state_7_Bool))) && !(!hhv_state_1_Bool && !(hbv_state_18_Int + -1 * hhv_state_22_Int == -1))) && !(((hhv_state_6_Bool || hbv_state_6_Bool) || ((!(16 <= hhv_state_0_Int) && hhv_state_18_Bool) && 0 <= hhv_state_0_Int)) && ((!hbv_state_6_Bool && ((16 <= hhv_state_0_Int || !hhv_state_18_Bool) || !(0 <= hhv_state_0_Int))) || !hhv_state_6_Bool))) && !((hhv_state_13_Bool || (((hhv_state_10_Bool && hhv_state_12_Int <= 4) && -4 <= hhv_state_12_Int) && hhv_state_8_Bool)) && ((((!hhv_state_8_Bool || !(hhv_state_12_Int <= 4)) || !hhv_state_10_Bool) || !hhv_state_13_Bool) || !(-4 <= hhv_state_12_Int)))) && !((!hhv_state_7_Bool || !hhv_state_6_Bool) && (hhv_state_7_Bool || hhv_state_6_Bool))) && !(((hbv_state_7_Int <= -1 || hbv_state_8_Bool) && (!hbv_state_8_Bool || !(hbv_state_7_Int <= -1))) && hbv_state_9_Bool)) && !((hbv_state_10_Bool || (((hbv_state_7_Int <= 4 && hbv_state_5_Bool) && -4 <= hbv_state_7_Int) && hbv_state_8_Bool)) && ((((!(-4 <= hbv_state_7_Int) || !hbv_state_10_Bool) || !hbv_state_8_Bool) || !(hbv_state_7_Int <= 4)) || !hbv_state_5_Bool))) && hhv_state_14_Int == hhv_state_17_Int) && !(!hhv_state_8_Bool && !hhv_state_9_Bool)) && hbv_state_3_Int + (hhv_state_12_Int + -1 * hhv_state_17_Int) == 0; [L0] CALL call state(hbv_state_12_Int, hbv_state_22_Bool, hbv_state_17_Int, hbv_state_18_Int, hbv_state_1_Bool, hbv_state_2_Bool, hbv_state_21_Bool, hbv_state_6_Bool, hbv_state_8_Bool, hbv_state_9_Bool, hbv_state_5_Bool, hbv_state_4_Bool, hbv_state_7_Int, hbv_state_10_Bool, hbv_state_3_Int, hbv_state_15_Bool, hbv_state_14_Bool, hbv_state_19_Int, hbv_state_11_Bool, hbv_state_16_Bool, hbv_state_20_Bool, hbv_state_13_Bool, hbv_state_23_Int); [L0] assume ((((((((((((((((((((((!(((!(1 <= hhv_state_12_Int) || !hhv_state_10_Bool) && (1 <= hhv_state_12_Int || hhv_state_10_Bool)) && hhv_state_11_Bool) && !((hhv_state_16_Bool || hhv_state_20_Bool) && (!hhv_state_20_Bool || !hhv_state_16_Bool))) && hhv_state_0_Int == hhv_state_14_Int) && !!hhv_state_4_Bool) && !((!hhv_state_6_Bool || !hhv_state_7_Bool) && (hhv_state_6_Bool || hhv_state_7_Bool))) && !((((16 <= hhv_state_0_Int || !hhv_state_6_Bool) || !(0 <= hhv_state_0_Int)) || !hhv_state_18_Bool) && (((!(16 <= hhv_state_0_Int) && hhv_state_18_Bool) && 0 <= hhv_state_0_Int) || hhv_state_6_Bool))) && !(!hhv_state_9_Bool && !hhv_state_8_Bool)) && !(!hhv_state_11_Bool && !hhv_state_10_Bool)) && hhv_state_2_Int == 0) && !((!hhv_state_13_Bool || !hhv_state_18_Bool) && (hhv_state_13_Bool || hhv_state_18_Bool))) && !((hhv_state_14_Int <= 9 || hhv_state_16_Bool) && (!hhv_state_16_Bool || !(hhv_state_14_Int <= 9)))) && !hhv_state_9_Bool) && !(((hhv_state_7_Bool && !hhv_state_5_Bool) || !hhv_state_21_Bool) && ((hhv_state_21_Bool || hhv_state_5_Bool) || !hhv_state_7_Bool))) && !!hhv_state_11_Bool) && !((!hhv_state_15_Bool || !(11 <= hhv_state_14_Int)) && (11 <= hhv_state_14_Int || hhv_state_15_Bool))) && !(((hhv_state_12_Int <= -1 || hhv_state_8_Bool) && (!hhv_state_8_Bool || !(hhv_state_12_Int <= -1))) && hhv_state_9_Bool)) && !((hhv_state_1_Bool || (hhv_state_0_Int <= 12 && 8 <= hhv_state_0_Int)) && ((!hhv_state_1_Bool || !(hhv_state_0_Int <= 12)) || !(8 <= hhv_state_0_Int)))) && !((hhv_state_15_Bool || hhv_state_19_Bool) && (!hhv_state_15_Bool || !hhv_state_19_Bool))) && hhv_state_2_Int == hhv_state_3_Int) && !((hhv_state_4_Bool || hhv_state_5_Bool) && (!hhv_state_4_Bool || !hhv_state_5_Bool))) && !((hhv_state_13_Bool || (((hhv_state_12_Int <= 4 && hhv_state_10_Bool) && -4 <= hhv_state_12_Int) && hhv_state_8_Bool)) && ((((!(-4 <= hhv_state_12_Int) || !hhv_state_13_Bool) || !hhv_state_8_Bool) || !(hhv_state_12_Int <= 4)) || !hhv_state_10_Bool))) && !(hhv_state_1_Bool && !(hhv_state_22_Int == 0))) && hhv_state_14_Int == hhv_state_17_Int) && hhv_state_17_Int == 0; [L0] RET call state(hbv_state_12_Int, hbv_state_22_Bool, hbv_state_17_Int, hbv_state_18_Int, hbv_state_1_Bool, hbv_state_2_Bool, hbv_state_21_Bool, hbv_state_6_Bool, hbv_state_8_Bool, hbv_state_9_Bool, hbv_state_5_Bool, hbv_state_4_Bool, hbv_state_7_Int, hbv_state_10_Bool, hbv_state_3_Int, hbv_state_15_Bool, hbv_state_14_Bool, hbv_state_19_Int, hbv_state_11_Bool, hbv_state_16_Bool, hbv_state_20_Bool, hbv_state_13_Bool, hbv_state_23_Int); [L0] RET call state(hbv_state_12_Int, hbv_state_22_Bool, hbv_state_17_Int, hbv_state_18_Int, hbv_state_1_Bool, hbv_state_2_Bool, hbv_state_21_Bool, hbv_state_6_Bool, hbv_state_8_Bool, hbv_state_9_Bool, hbv_state_5_Bool, hbv_state_4_Bool, hbv_state_7_Int, hbv_state_10_Bool, hbv_state_3_Int, hbv_state_15_Bool, hbv_state_14_Bool, hbv_state_19_Int, hbv_state_11_Bool, hbv_state_16_Bool, hbv_state_20_Bool, hbv_state_13_Bool, hbv_state_23_Int); [L0] RET call state(hbv_state_12_Int, hbv_state_22_Bool, hbv_state_17_Int, hbv_state_18_Int, hbv_state_1_Bool, hbv_state_2_Bool, hbv_state_21_Bool, hbv_state_6_Bool, hbv_state_8_Bool, hbv_state_9_Bool, hbv_state_5_Bool, hbv_state_4_Bool, hbv_state_7_Int, hbv_state_10_Bool, hbv_state_3_Int, hbv_state_15_Bool, hbv_state_14_Bool, hbv_state_19_Int, hbv_state_11_Bool, hbv_state_16_Bool, hbv_state_20_Bool, hbv_state_13_Bool, hbv_state_23_Int); [L0] RET call state(hbv_state_12_Int, hbv_state_22_Bool, hbv_state_17_Int, hbv_state_18_Int, hbv_state_1_Bool, hbv_state_2_Bool, hbv_state_21_Bool, hbv_state_6_Bool, hbv_state_8_Bool, hbv_state_9_Bool, hbv_state_5_Bool, hbv_state_4_Bool, hbv_state_7_Int, hbv_state_10_Bool, hbv_state_3_Int, hbv_state_15_Bool, hbv_state_14_Bool, hbv_state_19_Int, hbv_state_11_Bool, hbv_state_16_Bool, hbv_state_20_Bool, hbv_state_13_Bool, hbv_state_23_Int); [L0] RET call state(hbv_state_12_Int, hbv_state_22_Bool, hbv_state_17_Int, hbv_state_18_Int, hbv_state_1_Bool, hbv_state_2_Bool, hbv_state_21_Bool, hbv_state_6_Bool, hbv_state_8_Bool, hbv_state_9_Bool, hbv_state_5_Bool, hbv_state_4_Bool, hbv_state_7_Int, hbv_state_10_Bool, hbv_state_3_Int, hbv_state_15_Bool, hbv_state_14_Bool, hbv_state_19_Int, hbv_state_11_Bool, hbv_state_16_Bool, hbv_state_20_Bool, hbv_state_13_Bool, hbv_state_23_Int); [L0] RET call state(hbv_state_12_Int, hbv_state_22_Bool, hbv_state_17_Int, hbv_state_18_Int, hbv_state_1_Bool, hbv_state_2_Bool, hbv_state_21_Bool, hbv_state_6_Bool, hbv_state_8_Bool, hbv_state_9_Bool, hbv_state_5_Bool, hbv_state_4_Bool, hbv_state_7_Int, hbv_state_10_Bool, hbv_state_3_Int, hbv_state_15_Bool, hbv_state_14_Bool, hbv_state_19_Int, hbv_state_11_Bool, hbv_state_16_Bool, hbv_state_20_Bool, hbv_state_13_Bool, hbv_state_23_Int); [L0] RET call state(hbv_state_12_Int, hbv_state_22_Bool, hbv_state_17_Int, hbv_state_18_Int, hbv_state_1_Bool, hbv_state_2_Bool, hbv_state_21_Bool, hbv_state_6_Bool, hbv_state_8_Bool, hbv_state_9_Bool, hbv_state_5_Bool, hbv_state_4_Bool, hbv_state_7_Int, hbv_state_10_Bool, hbv_state_3_Int, hbv_state_15_Bool, hbv_state_14_Bool, hbv_state_19_Int, hbv_state_11_Bool, hbv_state_16_Bool, hbv_state_20_Bool, hbv_state_13_Bool, hbv_state_23_Int); [L0] RET call state(hbv_state_12_Int, hbv_state_22_Bool, hbv_state_17_Int, hbv_state_18_Int, hbv_state_1_Bool, hbv_state_2_Bool, hbv_state_21_Bool, hbv_state_6_Bool, hbv_state_8_Bool, hbv_state_9_Bool, hbv_state_5_Bool, hbv_state_4_Bool, hbv_state_7_Int, hbv_state_10_Bool, hbv_state_3_Int, hbv_state_15_Bool, hbv_state_14_Bool, hbv_state_19_Int, hbv_state_11_Bool, hbv_state_16_Bool, hbv_state_20_Bool, hbv_state_13_Bool, hbv_state_23_Int); [L0] RET call state(hbv_state_12_Int, hbv_state_22_Bool, hbv_state_17_Int, hbv_state_18_Int, hbv_state_1_Bool, hbv_state_2_Bool, hbv_state_21_Bool, hbv_state_6_Bool, hbv_state_8_Bool, hbv_state_9_Bool, hbv_state_5_Bool, hbv_state_4_Bool, hbv_state_7_Int, hbv_state_10_Bool, hbv_state_3_Int, hbv_state_15_Bool, hbv_state_14_Bool, hbv_state_19_Int, hbv_state_11_Bool, hbv_state_16_Bool, hbv_state_20_Bool, hbv_state_13_Bool, hbv_state_23_Int); [L0] RET call state(hbv_False_2_Int, hbv_False_3_Bool, hbv_False_4_Int, hbv_False_5_Int, hbv_False_6_Bool, hbv_False_7_Bool, hbv_False_8_Bool, hbv_False_9_Bool, hbv_False_10_Bool, hbv_False_11_Bool, hbv_False_12_Bool, hbv_False_13_Bool, hbv_False_14_Int, hbv_False_15_Bool, hbv_False_16_Int, hbv_False_17_Bool, hbv_False_18_Bool, hbv_False_19_Int, hbv_False_20_Bool, hbv_False_21_Bool, hbv_False_22_Bool, hbv_False_1_Bool, hbv_False_23_Int); [L0] RET call False(); [L0] assert false; - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 13 locations, 1 error locations. UNSAFE Result, 13.5s OverallTime, 9 OverallIterations, 10 TraceHistogramMax, 5.1s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 87 SDtfs, 208 SDslu, 490 SDs, 0 SdLazy, 385 SolverSat, 256 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 297 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 155 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 420 ImplicationChecksByTransitivity, 8.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=29occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 8 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 1.2s SatisfiabilityAnalysisTime, 6.4s InterpolantComputationTime, 404 NumberOfCodeBlocks, 404 NumberOfCodeBlocksAsserted, 32 NumberOfCheckSat, 344 ConstructedInterpolants, 0 QuantifiedInterpolants, 41688 SizeOfPredicates, 126 NumberOfNonLiveVariables, 2856 ConjunctsInSsa, 161 ConjunctsInUnsatCore, 15 InterpolantComputations, 1 PerfectInterpolantSequences, 209/616 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/cd_e7_621.smt2_chcToBoogie_automizer.epf_AutomizerCHC.xml/Csv-Benchmark-0-2018-06-18_14-06-41-946.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/cd_e7_621.smt2_chcToBoogie_automizer.epf_AutomizerCHC.xml/Csv-TraceAbstractionBenchmarks-0-2018-06-18_14-06-41-946.csv Received shutdown request...