java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test12_true-valid-memsafety.i
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This is Ultimate 0.1.23-ccafca9-m
[2018-02-04 00:41:59,262 INFO L170 SettingsManager]: Resetting all preferences to default values...
[2018-02-04 00:41:59,264 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values
[2018-02-04 00:41:59,277 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring...
[2018-02-04 00:41:59,277 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values
[2018-02-04 00:41:59,278 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values
[2018-02-04 00:41:59,279 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values
[2018-02-04 00:41:59,281 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values
[2018-02-04 00:41:59,282 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values
[2018-02-04 00:41:59,283 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values
[2018-02-04 00:41:59,284 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring...
[2018-02-04 00:41:59,284 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values
[2018-02-04 00:41:59,284 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values
[2018-02-04 00:41:59,285 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values
[2018-02-04 00:41:59,286 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values
[2018-02-04 00:41:59,288 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values
[2018-02-04 00:41:59,289 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values
[2018-02-04 00:41:59,291 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values
[2018-02-04 00:41:59,292 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values
[2018-02-04 00:41:59,293 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values
[2018-02-04 00:41:59,295 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring...
[2018-02-04 00:41:59,296 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring...
[2018-02-04 00:41:59,296 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values
[2018-02-04 00:41:59,297 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values
[2018-02-04 00:41:59,297 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values
[2018-02-04 00:41:59,298 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring...
[2018-02-04 00:41:59,299 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values
[2018-02-04 00:41:59,299 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring...
[2018-02-04 00:41:59,299 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring...
[2018-02-04 00:41:59,299 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values
[2018-02-04 00:41:59,300 INFO L181 SettingsManager]: Finished resetting all preferences to default values...
[2018-02-04 00:41:59,300 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf
[2018-02-04 00:41:59,309 INFO L110 SettingsManager]: Loading preferences was successful
[2018-02-04 00:41:59,309 INFO L112 SettingsManager]: Preferences different from defaults after loading the file:
[2018-02-04 00:41:59,310 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2018-02-04 00:41:59,310 INFO L133 SettingsManager]: * Create parallel compositions if possible=false
[2018-02-04 00:41:59,310 INFO L133 SettingsManager]: * Use SBE=true
[2018-02-04 00:41:59,311 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2018-02-04 00:41:59,311 INFO L133 SettingsManager]: * sizeof long=4
[2018-02-04 00:41:59,311 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false
[2018-02-04 00:41:59,311 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true
[2018-02-04 00:41:59,311 INFO L133 SettingsManager]: * sizeof POINTER=4
[2018-02-04 00:41:59,311 INFO L133 SettingsManager]: * Check division by zero=IGNORE
[2018-02-04 00:41:59,311 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true
[2018-02-04 00:41:59,311 INFO L133 SettingsManager]: * Bitprecise bitfields=true
[2018-02-04 00:41:59,311 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true
[2018-02-04 00:41:59,311 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE
[2018-02-04 00:41:59,312 INFO L133 SettingsManager]: * sizeof long double=12
[2018-02-04 00:41:59,312 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2018-02-04 00:41:59,312 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements
[2018-02-04 00:41:59,312 INFO L133 SettingsManager]: * To the following directory=./dump/
[2018-02-04 00:41:59,312 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode
[2018-02-04 00:41:59,312 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2018-02-04 00:41:59,312 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2018-02-04 00:41:59,312 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK
[2018-02-04 00:41:59,312 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP
[2018-02-04 00:41:59,313 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL
[2018-02-04 00:41:59,342 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp
[2018-02-04 00:41:59,351 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized
[2018-02-04 00:41:59,353 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected.
[2018-02-04 00:41:59,355 INFO L271 PluginConnector]: Initializing CDTParser...
[2018-02-04 00:41:59,356 INFO L276 PluginConnector]: CDTParser initialized
[2018-02-04 00:41:59,356 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test12_true-valid-memsafety.i
[2018-02-04 00:41:59,500 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2018-02-04 00:41:59,501 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements.
[2018-02-04 00:41:59,502 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2018-02-04 00:41:59,502 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator...
[2018-02-04 00:41:59,506 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized
[2018-02-04 00:41:59,507 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 12:41:59" (1/1) ...
[2018-02-04 00:41:59,509 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2819ab97 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:41:59, skipping insertion in model container
[2018-02-04 00:41:59,509 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 12:41:59" (1/1) ...
[2018-02-04 00:41:59,519 INFO L153 Dispatcher]: Using SV-COMP mode
[2018-02-04 00:41:59,556 INFO L153 Dispatcher]: Using SV-COMP mode
[2018-02-04 00:41:59,672 INFO L450 PostProcessor]: Settings: Checked method=main
[2018-02-04 00:41:59,705 INFO L450 PostProcessor]: Settings: Checked method=main
[2018-02-04 00:41:59,718 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:41:59 WrapperNode
[2018-02-04 00:41:59,718 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2018-02-04 00:41:59,719 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2018-02-04 00:41:59,719 INFO L271 PluginConnector]: Initializing Boogie Preprocessor...
[2018-02-04 00:41:59,719 INFO L276 PluginConnector]: Boogie Preprocessor initialized
[2018-02-04 00:41:59,728 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:41:59" (1/1) ...
[2018-02-04 00:41:59,728 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:41:59" (1/1) ...
[2018-02-04 00:41:59,740 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:41:59" (1/1) ...
[2018-02-04 00:41:59,741 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:41:59" (1/1) ...
[2018-02-04 00:41:59,753 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:41:59" (1/1) ...
[2018-02-04 00:41:59,757 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:41:59" (1/1) ...
[2018-02-04 00:41:59,761 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:41:59" (1/1) ...
[2018-02-04 00:41:59,765 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2018-02-04 00:41:59,765 INFO L113 PluginConnector]: ------------------------RCFGBuilder----------------------------
[2018-02-04 00:41:59,765 INFO L271 PluginConnector]: Initializing RCFGBuilder...
[2018-02-04 00:41:59,766 INFO L276 PluginConnector]: RCFGBuilder initialized
[2018-02-04 00:41:59,766 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:41:59" (1/1) ...
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2018-02-04 00:41:59,801 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init
[2018-02-04 00:41:59,802 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2018-02-04 00:41:59,802 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~$Pointer$~X~int~TO~int
[2018-02-04 00:41:59,802 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc
[2018-02-04 00:41:59,802 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD
[2018-02-04 00:41:59,802 INFO L136 BoogieDeclarations]: Found implementation of procedure __ldv_list_add
[2018-02-04 00:41:59,802 INFO L136 BoogieDeclarations]: Found implementation of procedure __ldv_list_del
[2018-02-04 00:41:59,802 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_list_add
[2018-02-04 00:41:59,802 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_list_del
[2018-02-04 00:41:59,802 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc
[2018-02-04 00:41:59,802 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill
[2018-02-04 00:41:59,803 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_msg_free
[2018-02-04 00:41:59,803 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg
[2018-02-04 00:41:59,803 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs
[2018-02-04 00:41:59,803 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata
[2018-02-04 00:41:59,803 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata
[2018-02-04 00:41:59,803 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup
[2018-02-04 00:41:59,803 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release
[2018-02-04 00:41:59,803 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_i2c_get_clientdata
[2018-02-04 00:41:59,803 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_i2c_set_clientdata
[2018-02-04 00:41:59,803 INFO L136 BoogieDeclarations]: Found implementation of procedure master_xfer
[2018-02-04 00:41:59,803 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_i2c_transfer
[2018-02-04 00:41:59,803 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_m88ts2022_rd_reg
[2018-02-04 00:41:59,803 INFO L136 BoogieDeclarations]: Found implementation of procedure alloc_fix_12
[2018-02-04 00:41:59,803 INFO L136 BoogieDeclarations]: Found implementation of procedure free_12
[2018-02-04 00:41:59,803 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point
[2018-02-04 00:41:59,804 INFO L136 BoogieDeclarations]: Found implementation of procedure main
[2018-02-04 00:41:59,804 INFO L128 BoogieDeclarations]: Found specification of procedure write~int
[2018-02-04 00:41:59,804 INFO L128 BoogieDeclarations]: Found specification of procedure read~int
[2018-02-04 00:41:59,804 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$
[2018-02-04 00:41:59,804 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$
[2018-02-04 00:41:59,804 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free
[2018-02-04 00:41:59,804 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc
[2018-02-04 00:41:59,804 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc
[2018-02-04 00:41:59,804 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy
[2018-02-04 00:41:59,804 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy
[2018-02-04 00:41:59,804 INFO L128 BoogieDeclarations]: Found specification of procedure malloc
[2018-02-04 00:41:59,804 INFO L128 BoogieDeclarations]: Found specification of procedure free
[2018-02-04 00:41:59,804 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int
[2018-02-04 00:41:59,805 INFO L128 BoogieDeclarations]: Found specification of procedure memcpy
[2018-02-04 00:41:59,805 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc
[2018-02-04 00:41:59,805 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD
[2018-02-04 00:41:59,805 INFO L128 BoogieDeclarations]: Found specification of procedure __ldv_list_add
[2018-02-04 00:41:59,805 INFO L128 BoogieDeclarations]: Found specification of procedure __ldv_list_del
[2018-02-04 00:41:59,805 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_list_add
[2018-02-04 00:41:59,805 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_list_del
[2018-02-04 00:41:59,805 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc
[2018-02-04 00:41:59,805 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_msg_fill
[2018-02-04 00:41:59,805 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_msg_free
[2018-02-04 00:41:59,805 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_submit_msg
[2018-02-04 00:41:59,805 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs
[2018-02-04 00:41:59,805 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata
[2018-02-04 00:41:59,805 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata
[2018-02-04 00:41:59,805 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup
[2018-02-04 00:41:59,806 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release
[2018-02-04 00:41:59,806 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_i2c_get_clientdata
[2018-02-04 00:41:59,806 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_i2c_set_clientdata
[2018-02-04 00:41:59,806 INFO L128 BoogieDeclarations]: Found specification of procedure master_xfer
[2018-02-04 00:41:59,806 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_i2c_transfer
[2018-02-04 00:41:59,806 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~$Pointer$~X~int~TO~int
[2018-02-04 00:41:59,806 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_m88ts2022_rd_reg
[2018-02-04 00:41:59,806 INFO L128 BoogieDeclarations]: Found specification of procedure alloc_fix_12
[2018-02-04 00:41:59,807 INFO L128 BoogieDeclarations]: Found specification of procedure free_12
[2018-02-04 00:41:59,807 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point
[2018-02-04 00:41:59,807 INFO L128 BoogieDeclarations]: Found specification of procedure main
[2018-02-04 00:41:59,807 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init
[2018-02-04 00:41:59,807 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2018-02-04 00:42:00,436 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2018-02-04 00:42:00,548 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2018-02-04 00:42:00,548 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 12:42:00 BoogieIcfgContainer
[2018-02-04 00:42:00,548 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2018-02-04 00:42:00,549 INFO L113 PluginConnector]: ------------------------TraceAbstraction----------------------------
[2018-02-04 00:42:00,549 INFO L271 PluginConnector]: Initializing TraceAbstraction...
[2018-02-04 00:42:00,552 INFO L276 PluginConnector]: TraceAbstraction initialized
[2018-02-04 00:42:00,552 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 04.02 12:41:59" (1/3) ...
[2018-02-04 00:42:00,553 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@573a68b9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 12:42:00, skipping insertion in model container
[2018-02-04 00:42:00,553 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:41:59" (2/3) ...
[2018-02-04 00:42:00,553 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@573a68b9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 12:42:00, skipping insertion in model container
[2018-02-04 00:42:00,553 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 12:42:00" (3/3) ...
[2018-02-04 00:42:00,555 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test12_true-valid-memsafety.i
[2018-02-04 00:42:00,562 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION
[2018-02-04 00:42:00,569 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 141 error locations.
[2018-02-04 00:42:00,601 INFO L322 AbstractCegarLoop]: Interprodecural is true
[2018-02-04 00:42:00,601 INFO L323 AbstractCegarLoop]: Hoare is false
[2018-02-04 00:42:00,602 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP
[2018-02-04 00:42:00,602 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK
[2018-02-04 00:42:00,602 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2018-02-04 00:42:00,602 INFO L327 AbstractCegarLoop]: Difference is false
[2018-02-04 00:42:00,602 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA
[2018-02-04 00:42:00,602 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce========
[2018-02-04 00:42:00,603 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure
[2018-02-04 00:42:00,623 INFO L276 IsEmpty]: Start isEmpty. Operand 398 states.
[2018-02-04 00:42:00,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5
[2018-02-04 00:42:00,633 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 00:42:00,634 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1]
[2018-02-04 00:42:00,634 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, alloc_fix_12Err4RequiresViolation, alloc_fix_12Err0RequiresViolation, alloc_fix_12Err5RequiresViolation, alloc_fix_12Err12RequiresViolation, alloc_fix_12Err3RequiresViolation, alloc_fix_12Err1RequiresViolation, alloc_fix_12Err13RequiresViolation, alloc_fix_12Err8RequiresViolation, alloc_fix_12Err15RequiresViolation, alloc_fix_12Err10RequiresViolation, alloc_fix_12Err6RequiresViolation, alloc_fix_12Err14RequiresViolation, alloc_fix_12Err11RequiresViolation, alloc_fix_12Err7RequiresViolation, alloc_fix_12Err9RequiresViolation, alloc_fix_12Err2RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]===
[2018-02-04 00:42:00,639 INFO L82 PathProgramCache]: Analyzing trace with hash 18685926, now seen corresponding path program 1 times
[2018-02-04 00:42:00,641 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-02-04 00:42:00,642 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-02-04 00:42:00,700 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:00,700 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:00,700 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:00,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:00,737 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 00:42:00,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 00:42:00,857 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 00:42:00,858 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2018-02-04 00:42:00,859 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states
[2018-02-04 00:42:00,872 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2018-02-04 00:42:00,873 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2018-02-04 00:42:00,875 INFO L87 Difference]: Start difference. First operand 398 states. Second operand 3 states.
[2018-02-04 00:42:01,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 00:42:01,284 INFO L93 Difference]: Finished difference Result 487 states and 527 transitions.
[2018-02-04 00:42:01,284 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states.
[2018-02-04 00:42:01,285 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4
[2018-02-04 00:42:01,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 00:42:01,298 INFO L225 Difference]: With dead ends: 487
[2018-02-04 00:42:01,298 INFO L226 Difference]: Without dead ends: 481
[2018-02-04 00:42:01,300 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2018-02-04 00:42:01,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 481 states.
[2018-02-04 00:42:01,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 481 to 436.
[2018-02-04 00:42:01,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 436 states.
[2018-02-04 00:42:01,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 436 states to 436 states and 491 transitions.
[2018-02-04 00:42:01,350 INFO L78 Accepts]: Start accepts. Automaton has 436 states and 491 transitions. Word has length 4
[2018-02-04 00:42:01,350 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 00:42:01,350 INFO L432 AbstractCegarLoop]: Abstraction has 436 states and 491 transitions.
[2018-02-04 00:42:01,350 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states.
[2018-02-04 00:42:01,351 INFO L276 IsEmpty]: Start isEmpty. Operand 436 states and 491 transitions.
[2018-02-04 00:42:01,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5
[2018-02-04 00:42:01,351 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 00:42:01,351 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1]
[2018-02-04 00:42:01,351 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, alloc_fix_12Err4RequiresViolation, alloc_fix_12Err0RequiresViolation, alloc_fix_12Err5RequiresViolation, alloc_fix_12Err12RequiresViolation, alloc_fix_12Err3RequiresViolation, alloc_fix_12Err1RequiresViolation, alloc_fix_12Err13RequiresViolation, alloc_fix_12Err8RequiresViolation, alloc_fix_12Err15RequiresViolation, alloc_fix_12Err10RequiresViolation, alloc_fix_12Err6RequiresViolation, alloc_fix_12Err14RequiresViolation, alloc_fix_12Err11RequiresViolation, alloc_fix_12Err7RequiresViolation, alloc_fix_12Err9RequiresViolation, alloc_fix_12Err2RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]===
[2018-02-04 00:42:01,351 INFO L82 PathProgramCache]: Analyzing trace with hash 18685927, now seen corresponding path program 1 times
[2018-02-04 00:42:01,352 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-02-04 00:42:01,352 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-02-04 00:42:01,353 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:01,354 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:01,354 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:01,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:01,364 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 00:42:01,397 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 00:42:01,397 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 00:42:01,397 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2018-02-04 00:42:01,398 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states
[2018-02-04 00:42:01,399 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2018-02-04 00:42:01,399 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2018-02-04 00:42:01,399 INFO L87 Difference]: Start difference. First operand 436 states and 491 transitions. Second operand 3 states.
[2018-02-04 00:42:01,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 00:42:01,553 INFO L93 Difference]: Finished difference Result 567 states and 652 transitions.
[2018-02-04 00:42:01,554 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states.
[2018-02-04 00:42:01,554 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4
[2018-02-04 00:42:01,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 00:42:01,558 INFO L225 Difference]: With dead ends: 567
[2018-02-04 00:42:01,558 INFO L226 Difference]: Without dead ends: 567
[2018-02-04 00:42:01,558 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2018-02-04 00:42:01,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 567 states.
[2018-02-04 00:42:01,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 567 to 497.
[2018-02-04 00:42:01,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 497 states.
[2018-02-04 00:42:01,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 497 states to 497 states and 602 transitions.
[2018-02-04 00:42:01,578 INFO L78 Accepts]: Start accepts. Automaton has 497 states and 602 transitions. Word has length 4
[2018-02-04 00:42:01,578 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 00:42:01,578 INFO L432 AbstractCegarLoop]: Abstraction has 497 states and 602 transitions.
[2018-02-04 00:42:01,578 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states.
[2018-02-04 00:42:01,578 INFO L276 IsEmpty]: Start isEmpty. Operand 497 states and 602 transitions.
[2018-02-04 00:42:01,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22
[2018-02-04 00:42:01,579 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 00:42:01,579 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 00:42:01,579 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, alloc_fix_12Err4RequiresViolation, alloc_fix_12Err0RequiresViolation, alloc_fix_12Err5RequiresViolation, alloc_fix_12Err12RequiresViolation, alloc_fix_12Err3RequiresViolation, alloc_fix_12Err1RequiresViolation, alloc_fix_12Err13RequiresViolation, alloc_fix_12Err8RequiresViolation, alloc_fix_12Err15RequiresViolation, alloc_fix_12Err10RequiresViolation, alloc_fix_12Err6RequiresViolation, alloc_fix_12Err14RequiresViolation, alloc_fix_12Err11RequiresViolation, alloc_fix_12Err7RequiresViolation, alloc_fix_12Err9RequiresViolation, alloc_fix_12Err2RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]===
[2018-02-04 00:42:01,579 INFO L82 PathProgramCache]: Analyzing trace with hash -769194584, now seen corresponding path program 1 times
[2018-02-04 00:42:01,579 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-02-04 00:42:01,580 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-02-04 00:42:01,581 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:01,581 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:01,581 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:01,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:01,602 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 00:42:01,644 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 00:42:01,645 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 00:42:01,645 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2018-02-04 00:42:01,645 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-02-04 00:42:01,645 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-02-04 00:42:01,645 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2018-02-04 00:42:01,646 INFO L87 Difference]: Start difference. First operand 497 states and 602 transitions. Second operand 6 states.
[2018-02-04 00:42:01,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 00:42:01,697 INFO L93 Difference]: Finished difference Result 543 states and 666 transitions.
[2018-02-04 00:42:01,697 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-02-04 00:42:01,697 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 21
[2018-02-04 00:42:01,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 00:42:01,700 INFO L225 Difference]: With dead ends: 543
[2018-02-04 00:42:01,700 INFO L226 Difference]: Without dead ends: 543
[2018-02-04 00:42:01,700 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42
[2018-02-04 00:42:01,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 543 states.
[2018-02-04 00:42:01,714 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 543 to 496.
[2018-02-04 00:42:01,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 496 states.
[2018-02-04 00:42:01,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 496 states to 496 states and 604 transitions.
[2018-02-04 00:42:01,717 INFO L78 Accepts]: Start accepts. Automaton has 496 states and 604 transitions. Word has length 21
[2018-02-04 00:42:01,717 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 00:42:01,717 INFO L432 AbstractCegarLoop]: Abstraction has 496 states and 604 transitions.
[2018-02-04 00:42:01,717 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-02-04 00:42:01,717 INFO L276 IsEmpty]: Start isEmpty. Operand 496 states and 604 transitions.
[2018-02-04 00:42:01,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22
[2018-02-04 00:42:01,718 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 00:42:01,718 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 00:42:01,718 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, alloc_fix_12Err4RequiresViolation, alloc_fix_12Err0RequiresViolation, alloc_fix_12Err5RequiresViolation, alloc_fix_12Err12RequiresViolation, alloc_fix_12Err3RequiresViolation, alloc_fix_12Err1RequiresViolation, alloc_fix_12Err13RequiresViolation, alloc_fix_12Err8RequiresViolation, alloc_fix_12Err15RequiresViolation, alloc_fix_12Err10RequiresViolation, alloc_fix_12Err6RequiresViolation, alloc_fix_12Err14RequiresViolation, alloc_fix_12Err11RequiresViolation, alloc_fix_12Err7RequiresViolation, alloc_fix_12Err9RequiresViolation, alloc_fix_12Err2RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]===
[2018-02-04 00:42:01,718 INFO L82 PathProgramCache]: Analyzing trace with hash 976272294, now seen corresponding path program 1 times
[2018-02-04 00:42:01,718 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-02-04 00:42:01,718 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-02-04 00:42:01,720 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:01,720 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:01,720 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:01,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:01,739 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 00:42:01,837 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 00:42:01,837 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 00:42:01,837 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2018-02-04 00:42:01,837 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states
[2018-02-04 00:42:01,838 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2018-02-04 00:42:01,838 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2018-02-04 00:42:01,838 INFO L87 Difference]: Start difference. First operand 496 states and 604 transitions. Second operand 5 states.
[2018-02-04 00:42:02,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 00:42:02,146 INFO L93 Difference]: Finished difference Result 571 states and 703 transitions.
[2018-02-04 00:42:02,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-02-04 00:42:02,146 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21
[2018-02-04 00:42:02,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 00:42:02,149 INFO L225 Difference]: With dead ends: 571
[2018-02-04 00:42:02,149 INFO L226 Difference]: Without dead ends: 571
[2018-02-04 00:42:02,150 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42
[2018-02-04 00:42:02,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 571 states.
[2018-02-04 00:42:02,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 571 to 538.
[2018-02-04 00:42:02,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 538 states.
[2018-02-04 00:42:02,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 538 states to 538 states and 661 transitions.
[2018-02-04 00:42:02,166 INFO L78 Accepts]: Start accepts. Automaton has 538 states and 661 transitions. Word has length 21
[2018-02-04 00:42:02,167 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 00:42:02,167 INFO L432 AbstractCegarLoop]: Abstraction has 538 states and 661 transitions.
[2018-02-04 00:42:02,167 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states.
[2018-02-04 00:42:02,167 INFO L276 IsEmpty]: Start isEmpty. Operand 538 states and 661 transitions.
[2018-02-04 00:42:02,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22
[2018-02-04 00:42:02,168 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 00:42:02,168 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 00:42:02,168 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, alloc_fix_12Err4RequiresViolation, alloc_fix_12Err0RequiresViolation, alloc_fix_12Err5RequiresViolation, alloc_fix_12Err12RequiresViolation, alloc_fix_12Err3RequiresViolation, alloc_fix_12Err1RequiresViolation, alloc_fix_12Err13RequiresViolation, alloc_fix_12Err8RequiresViolation, alloc_fix_12Err15RequiresViolation, alloc_fix_12Err10RequiresViolation, alloc_fix_12Err6RequiresViolation, alloc_fix_12Err14RequiresViolation, alloc_fix_12Err11RequiresViolation, alloc_fix_12Err7RequiresViolation, alloc_fix_12Err9RequiresViolation, alloc_fix_12Err2RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]===
[2018-02-04 00:42:02,168 INFO L82 PathProgramCache]: Analyzing trace with hash 976272295, now seen corresponding path program 1 times
[2018-02-04 00:42:02,168 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-02-04 00:42:02,169 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-02-04 00:42:02,170 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:02,170 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:02,170 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:02,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:02,188 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 00:42:02,346 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 00:42:02,346 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 00:42:02,346 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2018-02-04 00:42:02,346 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states
[2018-02-04 00:42:02,347 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2018-02-04 00:42:02,347 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2018-02-04 00:42:02,347 INFO L87 Difference]: Start difference. First operand 538 states and 661 transitions. Second operand 7 states.
[2018-02-04 00:42:03,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 00:42:03,459 INFO L93 Difference]: Finished difference Result 668 states and 771 transitions.
[2018-02-04 00:42:03,460 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states.
[2018-02-04 00:42:03,460 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 21
[2018-02-04 00:42:03,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 00:42:03,462 INFO L225 Difference]: With dead ends: 668
[2018-02-04 00:42:03,463 INFO L226 Difference]: Without dead ends: 668
[2018-02-04 00:42:03,463 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 5 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=105, Unknown=0, NotChecked=0, Total=156
[2018-02-04 00:42:03,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 668 states.
[2018-02-04 00:42:03,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 668 to 538.
[2018-02-04 00:42:03,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 538 states.
[2018-02-04 00:42:03,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 538 states to 538 states and 660 transitions.
[2018-02-04 00:42:03,479 INFO L78 Accepts]: Start accepts. Automaton has 538 states and 660 transitions. Word has length 21
[2018-02-04 00:42:03,480 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 00:42:03,480 INFO L432 AbstractCegarLoop]: Abstraction has 538 states and 660 transitions.
[2018-02-04 00:42:03,480 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states.
[2018-02-04 00:42:03,480 INFO L276 IsEmpty]: Start isEmpty. Operand 538 states and 660 transitions.
[2018-02-04 00:42:03,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25
[2018-02-04 00:42:03,481 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 00:42:03,481 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 00:42:03,481 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, alloc_fix_12Err4RequiresViolation, alloc_fix_12Err0RequiresViolation, alloc_fix_12Err5RequiresViolation, alloc_fix_12Err12RequiresViolation, alloc_fix_12Err3RequiresViolation, alloc_fix_12Err1RequiresViolation, alloc_fix_12Err13RequiresViolation, alloc_fix_12Err8RequiresViolation, alloc_fix_12Err15RequiresViolation, alloc_fix_12Err10RequiresViolation, alloc_fix_12Err6RequiresViolation, alloc_fix_12Err14RequiresViolation, alloc_fix_12Err11RequiresViolation, alloc_fix_12Err7RequiresViolation, alloc_fix_12Err9RequiresViolation, alloc_fix_12Err2RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]===
[2018-02-04 00:42:03,482 INFO L82 PathProgramCache]: Analyzing trace with hash 886332479, now seen corresponding path program 1 times
[2018-02-04 00:42:03,482 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-02-04 00:42:03,482 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-02-04 00:42:03,483 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:03,483 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:03,483 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:03,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:03,493 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 00:42:03,558 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked.
[2018-02-04 00:42:03,558 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 00:42:03,558 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-02-04 00:42:03,571 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:03,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:03,605 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 00:42:03,635 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked.
[2018-02-04 00:42:03,661 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 00:42:03,661 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4] total 8
[2018-02-04 00:42:03,661 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states
[2018-02-04 00:42:03,662 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2018-02-04 00:42:03,662 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56
[2018-02-04 00:42:03,662 INFO L87 Difference]: Start difference. First operand 538 states and 660 transitions. Second operand 8 states.
[2018-02-04 00:42:03,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 00:42:03,731 INFO L93 Difference]: Finished difference Result 503 states and 588 transitions.
[2018-02-04 00:42:03,732 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-02-04 00:42:03,732 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 24
[2018-02-04 00:42:03,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 00:42:03,734 INFO L225 Difference]: With dead ends: 503
[2018-02-04 00:42:03,734 INFO L226 Difference]: Without dead ends: 503
[2018-02-04 00:42:03,734 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56
[2018-02-04 00:42:03,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 503 states.
[2018-02-04 00:42:03,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 503 to 495.
[2018-02-04 00:42:03,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 495 states.
[2018-02-04 00:42:03,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 495 states to 495 states and 574 transitions.
[2018-02-04 00:42:03,745 INFO L78 Accepts]: Start accepts. Automaton has 495 states and 574 transitions. Word has length 24
[2018-02-04 00:42:03,745 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 00:42:03,745 INFO L432 AbstractCegarLoop]: Abstraction has 495 states and 574 transitions.
[2018-02-04 00:42:03,745 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states.
[2018-02-04 00:42:03,746 INFO L276 IsEmpty]: Start isEmpty. Operand 495 states and 574 transitions.
[2018-02-04 00:42:03,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27
[2018-02-04 00:42:03,746 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 00:42:03,746 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 00:42:03,746 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, alloc_fix_12Err4RequiresViolation, alloc_fix_12Err0RequiresViolation, alloc_fix_12Err5RequiresViolation, alloc_fix_12Err12RequiresViolation, alloc_fix_12Err3RequiresViolation, alloc_fix_12Err1RequiresViolation, alloc_fix_12Err13RequiresViolation, alloc_fix_12Err8RequiresViolation, alloc_fix_12Err15RequiresViolation, alloc_fix_12Err10RequiresViolation, alloc_fix_12Err6RequiresViolation, alloc_fix_12Err14RequiresViolation, alloc_fix_12Err11RequiresViolation, alloc_fix_12Err7RequiresViolation, alloc_fix_12Err9RequiresViolation, alloc_fix_12Err2RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]===
[2018-02-04 00:42:03,747 INFO L82 PathProgramCache]: Analyzing trace with hash -1359343331, now seen corresponding path program 1 times
[2018-02-04 00:42:03,747 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-02-04 00:42:03,747 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-02-04 00:42:03,748 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:03,748 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:03,748 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:03,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:03,759 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 00:42:03,793 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked.
[2018-02-04 00:42:03,793 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 00:42:03,793 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-02-04 00:42:03,798 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:03,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:03,817 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 00:42:03,831 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked.
[2018-02-04 00:42:03,849 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 00:42:03,849 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5
[2018-02-04 00:42:03,849 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-02-04 00:42:03,850 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-02-04 00:42:03,850 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2018-02-04 00:42:03,850 INFO L87 Difference]: Start difference. First operand 495 states and 574 transitions. Second operand 6 states.
[2018-02-04 00:42:03,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 00:42:03,878 INFO L93 Difference]: Finished difference Result 496 states and 579 transitions.
[2018-02-04 00:42:03,879 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states.
[2018-02-04 00:42:03,879 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 26
[2018-02-04 00:42:03,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 00:42:03,880 INFO L225 Difference]: With dead ends: 496
[2018-02-04 00:42:03,880 INFO L226 Difference]: Without dead ends: 496
[2018-02-04 00:42:03,881 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 23 SyntacticMatches, 4 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42
[2018-02-04 00:42:03,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 496 states.
[2018-02-04 00:42:03,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 496 to 494.
[2018-02-04 00:42:03,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 494 states.
[2018-02-04 00:42:03,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 494 states to 494 states and 572 transitions.
[2018-02-04 00:42:03,888 INFO L78 Accepts]: Start accepts. Automaton has 494 states and 572 transitions. Word has length 26
[2018-02-04 00:42:03,888 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 00:42:03,888 INFO L432 AbstractCegarLoop]: Abstraction has 494 states and 572 transitions.
[2018-02-04 00:42:03,888 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-02-04 00:42:03,888 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 572 transitions.
[2018-02-04 00:42:03,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27
[2018-02-04 00:42:03,889 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 00:42:03,889 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 00:42:03,889 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, alloc_fix_12Err4RequiresViolation, alloc_fix_12Err0RequiresViolation, alloc_fix_12Err5RequiresViolation, alloc_fix_12Err12RequiresViolation, alloc_fix_12Err3RequiresViolation, alloc_fix_12Err1RequiresViolation, alloc_fix_12Err13RequiresViolation, alloc_fix_12Err8RequiresViolation, alloc_fix_12Err15RequiresViolation, alloc_fix_12Err10RequiresViolation, alloc_fix_12Err6RequiresViolation, alloc_fix_12Err14RequiresViolation, alloc_fix_12Err11RequiresViolation, alloc_fix_12Err7RequiresViolation, alloc_fix_12Err9RequiresViolation, alloc_fix_12Err2RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]===
[2018-02-04 00:42:03,889 INFO L82 PathProgramCache]: Analyzing trace with hash -1359343330, now seen corresponding path program 1 times
[2018-02-04 00:42:03,889 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-02-04 00:42:03,890 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-02-04 00:42:03,891 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:03,891 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:03,891 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:03,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:03,912 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 00:42:03,984 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 00:42:03,984 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 00:42:03,984 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-02-04 00:42:04,011 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:04,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:04,030 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 00:42:04,048 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5
[2018-02-04 00:42:04,049 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:04,051 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:04,051 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5
[2018-02-04 00:42:04,061 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 00:42:04,079 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 00:42:04,080 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6
[2018-02-04 00:42:04,080 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states
[2018-02-04 00:42:04,080 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2018-02-04 00:42:04,080 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2018-02-04 00:42:04,080 INFO L87 Difference]: Start difference. First operand 494 states and 572 transitions. Second operand 7 states.
[2018-02-04 00:42:04,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 00:42:04,832 INFO L93 Difference]: Finished difference Result 597 states and 705 transitions.
[2018-02-04 00:42:04,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states.
[2018-02-04 00:42:04,832 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 26
[2018-02-04 00:42:04,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 00:42:04,834 INFO L225 Difference]: With dead ends: 597
[2018-02-04 00:42:04,834 INFO L226 Difference]: Without dead ends: 592
[2018-02-04 00:42:04,835 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 25 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56
[2018-02-04 00:42:04,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 592 states.
[2018-02-04 00:42:04,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 592 to 521.
[2018-02-04 00:42:04,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 521 states.
[2018-02-04 00:42:04,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 521 states to 521 states and 620 transitions.
[2018-02-04 00:42:04,847 INFO L78 Accepts]: Start accepts. Automaton has 521 states and 620 transitions. Word has length 26
[2018-02-04 00:42:04,847 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 00:42:04,847 INFO L432 AbstractCegarLoop]: Abstraction has 521 states and 620 transitions.
[2018-02-04 00:42:04,847 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states.
[2018-02-04 00:42:04,848 INFO L276 IsEmpty]: Start isEmpty. Operand 521 states and 620 transitions.
[2018-02-04 00:42:04,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27
[2018-02-04 00:42:04,848 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 00:42:04,848 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 00:42:04,848 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, alloc_fix_12Err4RequiresViolation, alloc_fix_12Err0RequiresViolation, alloc_fix_12Err5RequiresViolation, alloc_fix_12Err12RequiresViolation, alloc_fix_12Err3RequiresViolation, alloc_fix_12Err1RequiresViolation, alloc_fix_12Err13RequiresViolation, alloc_fix_12Err8RequiresViolation, alloc_fix_12Err15RequiresViolation, alloc_fix_12Err10RequiresViolation, alloc_fix_12Err6RequiresViolation, alloc_fix_12Err14RequiresViolation, alloc_fix_12Err11RequiresViolation, alloc_fix_12Err7RequiresViolation, alloc_fix_12Err9RequiresViolation, alloc_fix_12Err2RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]===
[2018-02-04 00:42:04,849 INFO L82 PathProgramCache]: Analyzing trace with hash -1359343329, now seen corresponding path program 1 times
[2018-02-04 00:42:04,849 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-02-04 00:42:04,849 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-02-04 00:42:04,850 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:04,850 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:04,850 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:04,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:04,858 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 00:42:04,890 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked.
[2018-02-04 00:42:04,890 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 00:42:04,890 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2018-02-04 00:42:04,890 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states
[2018-02-04 00:42:04,890 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2018-02-04 00:42:04,890 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2018-02-04 00:42:04,890 INFO L87 Difference]: Start difference. First operand 521 states and 620 transitions. Second operand 5 states.
[2018-02-04 00:42:04,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 00:42:04,903 INFO L93 Difference]: Finished difference Result 523 states and 619 transitions.
[2018-02-04 00:42:04,904 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states.
[2018-02-04 00:42:04,904 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26
[2018-02-04 00:42:04,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 00:42:04,905 INFO L225 Difference]: With dead ends: 523
[2018-02-04 00:42:04,905 INFO L226 Difference]: Without dead ends: 523
[2018-02-04 00:42:04,905 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2018-02-04 00:42:04,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 523 states.
[2018-02-04 00:42:04,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 523 to 520.
[2018-02-04 00:42:04,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 520 states.
[2018-02-04 00:42:04,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 520 states to 520 states and 617 transitions.
[2018-02-04 00:42:04,914 INFO L78 Accepts]: Start accepts. Automaton has 520 states and 617 transitions. Word has length 26
[2018-02-04 00:42:04,914 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 00:42:04,915 INFO L432 AbstractCegarLoop]: Abstraction has 520 states and 617 transitions.
[2018-02-04 00:42:04,915 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states.
[2018-02-04 00:42:04,915 INFO L276 IsEmpty]: Start isEmpty. Operand 520 states and 617 transitions.
[2018-02-04 00:42:04,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28
[2018-02-04 00:42:04,915 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 00:42:04,915 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 00:42:04,916 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, alloc_fix_12Err4RequiresViolation, alloc_fix_12Err0RequiresViolation, alloc_fix_12Err5RequiresViolation, alloc_fix_12Err12RequiresViolation, alloc_fix_12Err3RequiresViolation, alloc_fix_12Err1RequiresViolation, alloc_fix_12Err13RequiresViolation, alloc_fix_12Err8RequiresViolation, alloc_fix_12Err15RequiresViolation, alloc_fix_12Err10RequiresViolation, alloc_fix_12Err6RequiresViolation, alloc_fix_12Err14RequiresViolation, alloc_fix_12Err11RequiresViolation, alloc_fix_12Err7RequiresViolation, alloc_fix_12Err9RequiresViolation, alloc_fix_12Err2RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]===
[2018-02-04 00:42:04,916 INFO L82 PathProgramCache]: Analyzing trace with hash -1082862565, now seen corresponding path program 1 times
[2018-02-04 00:42:04,916 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-02-04 00:42:04,916 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-02-04 00:42:04,917 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:04,917 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:04,917 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:04,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:04,925 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 00:42:04,952 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 00:42:04,952 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 00:42:04,952 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2018-02-04 00:42:04,952 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states
[2018-02-04 00:42:04,952 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2018-02-04 00:42:04,953 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2018-02-04 00:42:04,953 INFO L87 Difference]: Start difference. First operand 520 states and 617 transitions. Second operand 5 states.
[2018-02-04 00:42:05,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 00:42:05,182 INFO L93 Difference]: Finished difference Result 541 states and 644 transitions.
[2018-02-04 00:42:05,182 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-02-04 00:42:05,182 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27
[2018-02-04 00:42:05,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 00:42:05,184 INFO L225 Difference]: With dead ends: 541
[2018-02-04 00:42:05,184 INFO L226 Difference]: Without dead ends: 541
[2018-02-04 00:42:05,184 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30
[2018-02-04 00:42:05,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 541 states.
[2018-02-04 00:42:05,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 541 to 537.
[2018-02-04 00:42:05,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 537 states.
[2018-02-04 00:42:05,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 537 states to 537 states and 638 transitions.
[2018-02-04 00:42:05,194 INFO L78 Accepts]: Start accepts. Automaton has 537 states and 638 transitions. Word has length 27
[2018-02-04 00:42:05,195 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 00:42:05,195 INFO L432 AbstractCegarLoop]: Abstraction has 537 states and 638 transitions.
[2018-02-04 00:42:05,195 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states.
[2018-02-04 00:42:05,195 INFO L276 IsEmpty]: Start isEmpty. Operand 537 states and 638 transitions.
[2018-02-04 00:42:05,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28
[2018-02-04 00:42:05,196 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 00:42:05,196 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 00:42:05,196 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, alloc_fix_12Err4RequiresViolation, alloc_fix_12Err0RequiresViolation, alloc_fix_12Err5RequiresViolation, alloc_fix_12Err12RequiresViolation, alloc_fix_12Err3RequiresViolation, alloc_fix_12Err1RequiresViolation, alloc_fix_12Err13RequiresViolation, alloc_fix_12Err8RequiresViolation, alloc_fix_12Err15RequiresViolation, alloc_fix_12Err10RequiresViolation, alloc_fix_12Err6RequiresViolation, alloc_fix_12Err14RequiresViolation, alloc_fix_12Err11RequiresViolation, alloc_fix_12Err7RequiresViolation, alloc_fix_12Err9RequiresViolation, alloc_fix_12Err2RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]===
[2018-02-04 00:42:05,197 INFO L82 PathProgramCache]: Analyzing trace with hash -1082862564, now seen corresponding path program 1 times
[2018-02-04 00:42:05,197 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-02-04 00:42:05,197 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-02-04 00:42:05,198 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:05,198 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:05,198 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:05,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:05,207 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 00:42:05,373 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 00:42:05,374 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 00:42:05,374 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8
[2018-02-04 00:42:05,374 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states
[2018-02-04 00:42:05,374 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2018-02-04 00:42:05,374 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56
[2018-02-04 00:42:05,375 INFO L87 Difference]: Start difference. First operand 537 states and 638 transitions. Second operand 8 states.
[2018-02-04 00:42:05,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 00:42:05,711 INFO L93 Difference]: Finished difference Result 500 states and 568 transitions.
[2018-02-04 00:42:05,712 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states.
[2018-02-04 00:42:05,712 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 27
[2018-02-04 00:42:05,712 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 00:42:05,713 INFO L225 Difference]: With dead ends: 500
[2018-02-04 00:42:05,713 INFO L226 Difference]: Without dead ends: 488
[2018-02-04 00:42:05,713 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132
[2018-02-04 00:42:05,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 488 states.
[2018-02-04 00:42:05,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 488 to 477.
[2018-02-04 00:42:05,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 477 states.
[2018-02-04 00:42:05,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 477 states to 477 states and 550 transitions.
[2018-02-04 00:42:05,720 INFO L78 Accepts]: Start accepts. Automaton has 477 states and 550 transitions. Word has length 27
[2018-02-04 00:42:05,720 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 00:42:05,720 INFO L432 AbstractCegarLoop]: Abstraction has 477 states and 550 transitions.
[2018-02-04 00:42:05,721 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states.
[2018-02-04 00:42:05,721 INFO L276 IsEmpty]: Start isEmpty. Operand 477 states and 550 transitions.
[2018-02-04 00:42:05,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29
[2018-02-04 00:42:05,721 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 00:42:05,721 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 00:42:05,722 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, alloc_fix_12Err4RequiresViolation, alloc_fix_12Err0RequiresViolation, alloc_fix_12Err5RequiresViolation, alloc_fix_12Err12RequiresViolation, alloc_fix_12Err3RequiresViolation, alloc_fix_12Err1RequiresViolation, alloc_fix_12Err13RequiresViolation, alloc_fix_12Err8RequiresViolation, alloc_fix_12Err15RequiresViolation, alloc_fix_12Err10RequiresViolation, alloc_fix_12Err6RequiresViolation, alloc_fix_12Err14RequiresViolation, alloc_fix_12Err11RequiresViolation, alloc_fix_12Err7RequiresViolation, alloc_fix_12Err9RequiresViolation, alloc_fix_12Err2RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]===
[2018-02-04 00:42:05,722 INFO L82 PathProgramCache]: Analyzing trace with hash -1622671872, now seen corresponding path program 1 times
[2018-02-04 00:42:05,722 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-02-04 00:42:05,722 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-02-04 00:42:05,723 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:05,723 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:05,723 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:05,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:05,731 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 00:42:05,762 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked.
[2018-02-04 00:42:05,762 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 00:42:05,762 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2018-02-04 00:42:05,762 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-02-04 00:42:05,763 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-02-04 00:42:05,763 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2018-02-04 00:42:05,763 INFO L87 Difference]: Start difference. First operand 477 states and 550 transitions. Second operand 6 states.
[2018-02-04 00:42:05,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 00:42:05,798 INFO L93 Difference]: Finished difference Result 478 states and 549 transitions.
[2018-02-04 00:42:05,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-02-04 00:42:05,799 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28
[2018-02-04 00:42:05,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 00:42:05,800 INFO L225 Difference]: With dead ends: 478
[2018-02-04 00:42:05,800 INFO L226 Difference]: Without dead ends: 478
[2018-02-04 00:42:05,801 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42
[2018-02-04 00:42:05,801 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 478 states.
[2018-02-04 00:42:05,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 478 to 476.
[2018-02-04 00:42:05,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 476 states.
[2018-02-04 00:42:05,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 476 states to 476 states and 547 transitions.
[2018-02-04 00:42:05,808 INFO L78 Accepts]: Start accepts. Automaton has 476 states and 547 transitions. Word has length 28
[2018-02-04 00:42:05,808 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 00:42:05,808 INFO L432 AbstractCegarLoop]: Abstraction has 476 states and 547 transitions.
[2018-02-04 00:42:05,808 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-02-04 00:42:05,809 INFO L276 IsEmpty]: Start isEmpty. Operand 476 states and 547 transitions.
[2018-02-04 00:42:05,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29
[2018-02-04 00:42:05,809 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 00:42:05,809 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 00:42:05,809 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, alloc_fix_12Err4RequiresViolation, alloc_fix_12Err0RequiresViolation, alloc_fix_12Err5RequiresViolation, alloc_fix_12Err12RequiresViolation, alloc_fix_12Err3RequiresViolation, alloc_fix_12Err1RequiresViolation, alloc_fix_12Err13RequiresViolation, alloc_fix_12Err8RequiresViolation, alloc_fix_12Err15RequiresViolation, alloc_fix_12Err10RequiresViolation, alloc_fix_12Err6RequiresViolation, alloc_fix_12Err14RequiresViolation, alloc_fix_12Err11RequiresViolation, alloc_fix_12Err7RequiresViolation, alloc_fix_12Err9RequiresViolation, alloc_fix_12Err2RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]===
[2018-02-04 00:42:05,810 INFO L82 PathProgramCache]: Analyzing trace with hash -1622671871, now seen corresponding path program 1 times
[2018-02-04 00:42:05,810 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-02-04 00:42:05,810 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-02-04 00:42:05,811 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:05,811 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:05,811 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:05,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:05,822 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 00:42:06,018 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 00:42:06,019 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 00:42:06,019 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-02-04 00:42:06,037 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:06,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:06,063 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 00:42:06,086 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22
[2018-02-04 00:42:06,086 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:06,104 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25
[2018-02-04 00:42:06,105 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:06,127 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21
[2018-02-04 00:42:06,127 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:06,129 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24
[2018-02-04 00:42:06,130 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:06,143 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts.
[2018-02-04 00:42:06,143 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46
[2018-02-04 00:42:06,244 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:06,245 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:06,247 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 28
[2018-02-04 00:42:06,247 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:06,279 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:06,280 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 37
[2018-02-04 00:42:06,280 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:06,303 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:06,304 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 35
[2018-02-04 00:42:06,305 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:06,326 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:06,327 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:06,328 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25
[2018-02-04 00:42:06,328 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:06,345 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts.
[2018-02-04 00:42:06,345 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:67, output treesize:49
[2018-02-04 00:42:06,402 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 00:42:06,429 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 00:42:06,430 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 17
[2018-02-04 00:42:06,430 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states
[2018-02-04 00:42:06,430 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants.
[2018-02-04 00:42:06,430 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=260, Unknown=2, NotChecked=0, Total=306
[2018-02-04 00:42:06,430 INFO L87 Difference]: Start difference. First operand 476 states and 547 transitions. Second operand 18 states.
[2018-02-04 00:42:27,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 00:42:27,084 INFO L93 Difference]: Finished difference Result 663 states and 771 transitions.
[2018-02-04 00:42:27,084 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states.
[2018-02-04 00:42:27,084 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 28
[2018-02-04 00:42:27,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 00:42:27,086 INFO L225 Difference]: With dead ends: 663
[2018-02-04 00:42:27,086 INFO L226 Difference]: Without dead ends: 663
[2018-02-04 00:42:27,086 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=96, Invalid=500, Unknown=4, NotChecked=0, Total=600
[2018-02-04 00:42:27,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 663 states.
[2018-02-04 00:42:27,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 663 to 485.
[2018-02-04 00:42:27,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 485 states.
[2018-02-04 00:42:27,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 485 states to 485 states and 562 transitions.
[2018-02-04 00:42:27,092 INFO L78 Accepts]: Start accepts. Automaton has 485 states and 562 transitions. Word has length 28
[2018-02-04 00:42:27,092 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 00:42:27,092 INFO L432 AbstractCegarLoop]: Abstraction has 485 states and 562 transitions.
[2018-02-04 00:42:27,092 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states.
[2018-02-04 00:42:27,092 INFO L276 IsEmpty]: Start isEmpty. Operand 485 states and 562 transitions.
[2018-02-04 00:42:27,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29
[2018-02-04 00:42:27,093 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 00:42:27,093 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 00:42:27,093 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, alloc_fix_12Err4RequiresViolation, alloc_fix_12Err0RequiresViolation, alloc_fix_12Err5RequiresViolation, alloc_fix_12Err12RequiresViolation, alloc_fix_12Err3RequiresViolation, alloc_fix_12Err1RequiresViolation, alloc_fix_12Err13RequiresViolation, alloc_fix_12Err8RequiresViolation, alloc_fix_12Err15RequiresViolation, alloc_fix_12Err10RequiresViolation, alloc_fix_12Err6RequiresViolation, alloc_fix_12Err14RequiresViolation, alloc_fix_12Err11RequiresViolation, alloc_fix_12Err7RequiresViolation, alloc_fix_12Err9RequiresViolation, alloc_fix_12Err2RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]===
[2018-02-04 00:42:27,093 INFO L82 PathProgramCache]: Analyzing trace with hash -1622671872, now seen corresponding path program 1 times
[2018-02-04 00:42:27,093 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-02-04 00:42:27,093 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-02-04 00:42:27,094 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:27,094 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:27,094 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:27,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:27,100 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 00:42:27,146 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 00:42:27,146 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 00:42:27,146 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-02-04 00:42:27,154 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:27,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:27,168 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 00:42:27,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5
[2018-02-04 00:42:27,171 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:27,172 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:27,172 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5
[2018-02-04 00:42:27,190 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:27,190 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:27,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21
[2018-02-04 00:42:27,191 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:27,195 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-02-04 00:42:27,195 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15
[2018-02-04 00:42:27,208 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 00:42:27,238 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 00:42:27,238 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 10
[2018-02-04 00:42:27,238 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states
[2018-02-04 00:42:27,238 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants.
[2018-02-04 00:42:27,238 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110
[2018-02-04 00:42:27,239 INFO L87 Difference]: Start difference. First operand 485 states and 562 transitions. Second operand 11 states.
[2018-02-04 00:42:28,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 00:42:28,023 INFO L93 Difference]: Finished difference Result 591 states and 693 transitions.
[2018-02-04 00:42:28,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states.
[2018-02-04 00:42:28,023 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 28
[2018-02-04 00:42:28,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 00:42:28,026 INFO L225 Difference]: With dead ends: 591
[2018-02-04 00:42:28,026 INFO L226 Difference]: Without dead ends: 591
[2018-02-04 00:42:28,026 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 25 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=48, Invalid=162, Unknown=0, NotChecked=0, Total=210
[2018-02-04 00:42:28,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 591 states.
[2018-02-04 00:42:28,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 591 to 473.
[2018-02-04 00:42:28,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 473 states.
[2018-02-04 00:42:28,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 473 states to 473 states and 544 transitions.
[2018-02-04 00:42:28,040 INFO L78 Accepts]: Start accepts. Automaton has 473 states and 544 transitions. Word has length 28
[2018-02-04 00:42:28,040 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 00:42:28,040 INFO L432 AbstractCegarLoop]: Abstraction has 473 states and 544 transitions.
[2018-02-04 00:42:28,040 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states.
[2018-02-04 00:42:28,040 INFO L276 IsEmpty]: Start isEmpty. Operand 473 states and 544 transitions.
[2018-02-04 00:42:28,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30
[2018-02-04 00:42:28,040 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 00:42:28,040 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 00:42:28,040 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, alloc_fix_12Err4RequiresViolation, alloc_fix_12Err0RequiresViolation, alloc_fix_12Err5RequiresViolation, alloc_fix_12Err12RequiresViolation, alloc_fix_12Err3RequiresViolation, alloc_fix_12Err1RequiresViolation, alloc_fix_12Err13RequiresViolation, alloc_fix_12Err8RequiresViolation, alloc_fix_12Err15RequiresViolation, alloc_fix_12Err10RequiresViolation, alloc_fix_12Err6RequiresViolation, alloc_fix_12Err14RequiresViolation, alloc_fix_12Err11RequiresViolation, alloc_fix_12Err7RequiresViolation, alloc_fix_12Err9RequiresViolation, alloc_fix_12Err2RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]===
[2018-02-04 00:42:28,040 INFO L82 PathProgramCache]: Analyzing trace with hash 1049980534, now seen corresponding path program 1 times
[2018-02-04 00:42:28,041 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-02-04 00:42:28,041 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-02-04 00:42:28,041 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:28,042 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:28,042 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:28,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:28,048 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 00:42:28,118 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked.
[2018-02-04 00:42:28,118 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 00:42:28,118 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-02-04 00:42:28,124 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:28,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:28,139 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 00:42:28,141 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5
[2018-02-04 00:42:28,141 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:28,142 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:28,142 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5
[2018-02-04 00:42:28,144 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1
[2018-02-04 00:42:28,144 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:28,145 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:28,145 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:9, output treesize:3
[2018-02-04 00:42:28,161 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:28,161 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:28,162 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21
[2018-02-04 00:42:28,162 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:28,165 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:28,165 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15
[2018-02-04 00:42:28,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 12
[2018-02-04 00:42:28,200 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:28,210 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 8
[2018-02-04 00:42:28,211 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:28,226 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:28,226 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:41, output treesize:3
[2018-02-04 00:42:28,231 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:28,231 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21
[2018-02-04 00:42:28,232 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:28,236 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-02-04 00:42:28,236 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:25, output treesize:15
[2018-02-04 00:42:28,253 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked.
[2018-02-04 00:42:28,270 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 00:42:28,270 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 9] total 13
[2018-02-04 00:42:28,271 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states
[2018-02-04 00:42:28,271 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants.
[2018-02-04 00:42:28,271 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182
[2018-02-04 00:42:28,271 INFO L87 Difference]: Start difference. First operand 473 states and 544 transitions. Second operand 14 states.
[2018-02-04 00:42:29,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 00:42:29,482 INFO L93 Difference]: Finished difference Result 572 states and 640 transitions.
[2018-02-04 00:42:29,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states.
[2018-02-04 00:42:29,482 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 29
[2018-02-04 00:42:29,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 00:42:29,484 INFO L225 Difference]: With dead ends: 572
[2018-02-04 00:42:29,484 INFO L226 Difference]: Without dead ends: 572
[2018-02-04 00:42:29,484 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 28 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420
[2018-02-04 00:42:29,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 572 states.
[2018-02-04 00:42:29,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 572 to 473.
[2018-02-04 00:42:29,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 473 states.
[2018-02-04 00:42:29,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 473 states to 473 states and 543 transitions.
[2018-02-04 00:42:29,489 INFO L78 Accepts]: Start accepts. Automaton has 473 states and 543 transitions. Word has length 29
[2018-02-04 00:42:29,489 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 00:42:29,489 INFO L432 AbstractCegarLoop]: Abstraction has 473 states and 543 transitions.
[2018-02-04 00:42:29,489 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states.
[2018-02-04 00:42:29,489 INFO L276 IsEmpty]: Start isEmpty. Operand 473 states and 543 transitions.
[2018-02-04 00:42:29,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30
[2018-02-04 00:42:29,489 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 00:42:29,489 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 00:42:29,489 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, alloc_fix_12Err4RequiresViolation, alloc_fix_12Err0RequiresViolation, alloc_fix_12Err5RequiresViolation, alloc_fix_12Err12RequiresViolation, alloc_fix_12Err3RequiresViolation, alloc_fix_12Err1RequiresViolation, alloc_fix_12Err13RequiresViolation, alloc_fix_12Err8RequiresViolation, alloc_fix_12Err15RequiresViolation, alloc_fix_12Err10RequiresViolation, alloc_fix_12Err6RequiresViolation, alloc_fix_12Err14RequiresViolation, alloc_fix_12Err11RequiresViolation, alloc_fix_12Err7RequiresViolation, alloc_fix_12Err9RequiresViolation, alloc_fix_12Err2RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]===
[2018-02-04 00:42:29,490 INFO L82 PathProgramCache]: Analyzing trace with hash 1049980535, now seen corresponding path program 1 times
[2018-02-04 00:42:29,490 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-02-04 00:42:29,490 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-02-04 00:42:29,490 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:29,490 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:29,490 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 00:42:29,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:29,500 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 00:42:29,557 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 00:42:29,557 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 00:42:29,557 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-02-04 00:42:29,562 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 00:42:29,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 00:42:29,578 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 00:42:29,580 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5
[2018-02-04 00:42:29,580 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:29,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5
[2018-02-04 00:42:29,584 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:29,586 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:29,586 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14
[2018-02-04 00:42:29,594 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1
[2018-02-04 00:42:29,594 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:29,598 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1
[2018-02-04 00:42:29,598 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:29,600 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:29,600 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:20, output treesize:10
[2018-02-04 00:42:29,636 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:29,637 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:29,637 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 47
[2018-02-04 00:42:29,638 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:29,658 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:29,658 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:29,659 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27
[2018-02-04 00:42:29,659 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:29,675 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:29,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 35
[2018-02-04 00:42:29,677 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:29,696 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:29,696 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:29,697 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25
[2018-02-04 00:42:29,697 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:29,711 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts.
[2018-02-04 00:42:29,711 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:67, output treesize:49
[2018-02-04 00:42:29,744 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16
[2018-02-04 00:42:29,744 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:29,756 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:29,757 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 00:42:29,757 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 24
[2018-02-04 00:42:29,758 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:29,768 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-02-04 00:42:29,768 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:55, output treesize:7
[2018-02-04 00:42:29,790 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 00:42:29,822 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 00:42:29,822 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6] total 11
[2018-02-04 00:42:29,822 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states
[2018-02-04 00:42:29,823 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants.
[2018-02-04 00:42:29,823 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132
[2018-02-04 00:42:29,823 INFO L87 Difference]: Start difference. First operand 473 states and 543 transitions. Second operand 12 states.
[2018-02-04 00:42:58,000 WARN L146 SmtUtils]: Spent 20333ms on a formula simplification. DAG size of input: 59 DAG size of output 56
[2018-02-04 00:43:20,291 WARN L146 SmtUtils]: Spent 22270ms on a formula simplification. DAG size of input: 57 DAG size of output 54
[2018-02-04 00:43:24,004 WARN L146 SmtUtils]: Spent 3367ms on a formula simplification. DAG size of input: 42 DAG size of output 41
[2018-02-04 00:43:48,356 WARN L146 SmtUtils]: Spent 24325ms on a formula simplification. DAG size of input: 52 DAG size of output 50
[2018-02-04 00:43:52,708 WARN L146 SmtUtils]: Spent 4010ms on a formula simplification. DAG size of input: 38 DAG size of output 38
[2018-02-04 00:43:57,591 WARN L146 SmtUtils]: Spent 3986ms on a formula simplification. DAG size of input: 35 DAG size of output 35
[2018-02-04 00:44:18,269 WARN L146 SmtUtils]: Spent 20142ms on a formula simplification. DAG size of input: 48 DAG size of output 47
[2018-02-04 00:44:30,805 WARN L143 SmtUtils]: Spent 12122ms on a formula simplification that was a NOOP. DAG size: 43
Received shutdown request...
[2018-02-04 00:45:41,644 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states.
[2018-02-04 00:45:41,644 WARN L491 AbstractCegarLoop]: Verification canceled
[2018-02-04 00:45:41,650 WARN L185 ceAbstractionStarter]: Timeout
[2018-02-04 00:45:41,650 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.02 12:45:41 BoogieIcfgContainer
[2018-02-04 00:45:41,650 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction----------------------------
[2018-02-04 00:45:41,651 INFO L168 Benchmark]: Toolchain (without parser) took 222149.88 ms. Allocated memory was 403.7 MB in the beginning and 810.5 MB in the end (delta: 406.8 MB). Free memory was 360.4 MB in the beginning and 450.8 MB in the end (delta: -90.4 MB). Peak memory consumption was 316.4 MB. Max. memory is 5.3 GB.
[2018-02-04 00:45:41,651 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 403.7 MB. Free memory is still 367.0 MB. There was no memory consumed. Max. memory is 5.3 GB.
[2018-02-04 00:45:41,651 INFO L168 Benchmark]: CACSL2BoogieTranslator took 216.73 ms. Allocated memory is still 403.7 MB. Free memory was 360.4 MB in the beginning and 342.9 MB in the end (delta: 17.4 MB). Peak memory consumption was 17.4 MB. Max. memory is 5.3 GB.
[2018-02-04 00:45:41,652 INFO L168 Benchmark]: Boogie Preprocessor took 46.22 ms. Allocated memory is still 403.7 MB. Free memory was 342.9 MB in the beginning and 340.3 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB.
[2018-02-04 00:45:41,652 INFO L168 Benchmark]: RCFGBuilder took 783.06 ms. Allocated memory was 403.7 MB in the beginning and 424.1 MB in the end (delta: 20.4 MB). Free memory was 340.3 MB in the beginning and 381.3 MB in the end (delta: -41.0 MB). Peak memory consumption was 100.6 MB. Max. memory is 5.3 GB.
[2018-02-04 00:45:41,652 INFO L168 Benchmark]: TraceAbstraction took 221101.26 ms. Allocated memory was 424.1 MB in the beginning and 810.5 MB in the end (delta: 386.4 MB). Free memory was 381.3 MB in the beginning and 450.8 MB in the end (delta: -69.5 MB). Peak memory consumption was 316.9 MB. Max. memory is 5.3 GB.
[2018-02-04 00:45:41,653 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] #######################
--- Results ---
* Results from de.uni_freiburg.informatik.ultimate.core:
- StatisticsResult: Toolchain Benchmarks
Benchmark results are:
* CDTParser took 0.13 ms. Allocated memory is still 403.7 MB. Free memory is still 367.0 MB. There was no memory consumed. Max. memory is 5.3 GB.
* CACSL2BoogieTranslator took 216.73 ms. Allocated memory is still 403.7 MB. Free memory was 360.4 MB in the beginning and 342.9 MB in the end (delta: 17.4 MB). Peak memory consumption was 17.4 MB. Max. memory is 5.3 GB.
* Boogie Preprocessor took 46.22 ms. Allocated memory is still 403.7 MB. Free memory was 342.9 MB in the beginning and 340.3 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB.
* RCFGBuilder took 783.06 ms. Allocated memory was 403.7 MB in the beginning and 424.1 MB in the end (delta: 20.4 MB). Free memory was 340.3 MB in the beginning and 381.3 MB in the end (delta: -41.0 MB). Peak memory consumption was 100.6 MB. Max. memory is 5.3 GB.
* TraceAbstraction took 221101.26 ms. Allocated memory was 424.1 MB in the beginning and 810.5 MB in the end (delta: 386.4 MB). Free memory was 381.3 MB in the beginning and 450.8 MB in the end (delta: -69.5 MB). Peak memory consumption was 316.9 MB. Max. memory is 5.3 GB.
* Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1121). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1121). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1156). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1156). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1157). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1156). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1157). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1156). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1116). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1115). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1115). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1116). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1164). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1163). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1163). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1163). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1164). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1163). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1620]: Timeout (TraceAbstraction)
Unable to prove that all allocated memory was freed (line 1620). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1131). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1131). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1131). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1131). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1530). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1522). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1517). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1522). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1530). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1528). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1517). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1512). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1528). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1522). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1517). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1522). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1528). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1517). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1530). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1530). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1512). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1528). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1110). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1107). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1110). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1107). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1108). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1109). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1109). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1108). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1545). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1541). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1545). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1560). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1542). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1541). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1560). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1546). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1564). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1551). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1545). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1564). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1551). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1545). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1546). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1542). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1490). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1490). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1490). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1490). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1135). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1135). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1135). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1135). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1508). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1508). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1198). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1198). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1570). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1575). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1571). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1571). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1570). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1575). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1572). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1572). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1193). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1193). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1593). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1610). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1614). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1585). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1585). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1608). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1614). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1598). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1600). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1606). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1589). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1612). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1598). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1608). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1610). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1612). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1593). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1589). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1600). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1606). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1146). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1146). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 18 states, 12 states before enhancement), while ReachableStatesComputation was computing reachable states (482 states constructedinput type IntersectNwa).
- StatisticsResult: Ultimate Automizer benchmark data
CFG has 28 procedures, 416 locations, 141 error locations. TIMEOUT Result, 221.0s OverallTime, 16 OverallIterations, 2 TraceHistogramMax, 218.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 6011 SDtfs, 4153 SDslu, 18785 SDs, 0 SdLazy, 14244 SolverSat, 934 SolverUnsat, 171 SolverUnknown, 0 SolverNotchecked, 96.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 345 GetRequests, 183 SyntacticMatches, 24 SemanticMatches, 138 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 253 ImplicationChecksByTransitivity, 120.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=538occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 15 MinimizatonAttempts, 821 StatesRemovedByMinimization, 15 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.0s InterpolantComputationTime, 559 NumberOfCodeBlocks, 559 NumberOfCodeBlocksAsserted, 23 NumberOfCheckSat, 536 ConstructedInterpolants, 27 QuantifiedInterpolants, 103217 SizeOfPredicates, 21 NumberOfNonLiveVariables, 1018 ConjunctsInSsa, 114 ConjunctsInUnsatCore, 23 InterpolantComputations, 9 PerfectInterpolantSequences, 37/74 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available
RESULT: Ultimate could not prove your program: Timeout
Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test12_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-04_00-45-41-660.csv
Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test12_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-04_00-45-41-660.csv
Completed graceful shutdown