java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_2_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-ccafca9-m [2018-02-04 00:53:35,459 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-04 00:53:35,461 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-04 00:53:35,473 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-04 00:53:35,473 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-04 00:53:35,474 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-04 00:53:35,475 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-04 00:53:35,476 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-04 00:53:35,478 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-04 00:53:35,479 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-04 00:53:35,479 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-04 00:53:35,480 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-04 00:53:35,480 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-04 00:53:35,481 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-04 00:53:35,482 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-04 00:53:35,484 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-04 00:53:35,486 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-04 00:53:35,487 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-04 00:53:35,488 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-04 00:53:35,489 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-04 00:53:35,491 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-02-04 00:53:35,491 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-02-04 00:53:35,491 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-02-04 00:53:35,492 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-02-04 00:53:35,493 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-02-04 00:53:35,494 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-02-04 00:53:35,494 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-02-04 00:53:35,494 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-02-04 00:53:35,495 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-02-04 00:53:35,495 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-04 00:53:35,495 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-04 00:53:35,496 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-02-04 00:53:35,505 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-04 00:53:35,505 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-04 00:53:35,507 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-04 00:53:35,507 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-04 00:53:35,507 INFO L133 SettingsManager]: * Use SBE=true [2018-02-04 00:53:35,507 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-04 00:53:35,507 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-04 00:53:35,507 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-04 00:53:35,508 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-04 00:53:35,508 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-04 00:53:35,508 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-04 00:53:35,508 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-04 00:53:35,508 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-04 00:53:35,508 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-02-04 00:53:35,508 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-04 00:53:35,509 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-04 00:53:35,509 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-04 00:53:35,509 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-04 00:53:35,509 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-04 00:53:35,509 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-04 00:53:35,509 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 00:53:35,509 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-04 00:53:35,510 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-02-04 00:53:35,510 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-02-04 00:53:35,510 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-02-04 00:53:35,543 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-04 00:53:35,553 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-04 00:53:35,557 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-04 00:53:35,558 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-04 00:53:35,558 INFO L276 PluginConnector]: CDTParser initialized [2018-02-04 00:53:35,559 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_2_true-valid-memsafety_true-termination.i [2018-02-04 00:53:35,708 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-04 00:53:35,709 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-04 00:53:35,710 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-04 00:53:35,710 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-04 00:53:35,714 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-04 00:53:35,714 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 12:53:35" (1/1) ... [2018-02-04 00:53:35,717 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@f13972f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:53:35, skipping insertion in model container [2018-02-04 00:53:35,717 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 12:53:35" (1/1) ... [2018-02-04 00:53:35,726 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 00:53:35,759 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 00:53:35,854 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 00:53:35,876 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 00:53:35,886 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:53:35 WrapperNode [2018-02-04 00:53:35,887 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-04 00:53:35,887 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-04 00:53:35,887 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-04 00:53:35,888 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-04 00:53:35,899 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:53:35" (1/1) ... [2018-02-04 00:53:35,900 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:53:35" (1/1) ... [2018-02-04 00:53:35,908 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:53:35" (1/1) ... [2018-02-04 00:53:35,908 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:53:35" (1/1) ... [2018-02-04 00:53:35,914 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:53:35" (1/1) ... [2018-02-04 00:53:35,916 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:53:35" (1/1) ... [2018-02-04 00:53:35,918 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:53:35" (1/1) ... [2018-02-04 00:53:35,921 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-04 00:53:35,921 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-04 00:53:35,921 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-04 00:53:35,921 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-04 00:53:35,922 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:53:35" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 00:53:35,961 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-04 00:53:35,961 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-04 00:53:35,961 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-02-04 00:53:35,961 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-02-04 00:53:35,961 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-02-04 00:53:35,961 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-02-04 00:53:35,961 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-02-04 00:53:35,961 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-02-04 00:53:35,961 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-02-04 00:53:35,962 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-02-04 00:53:35,962 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-02-04 00:53:35,962 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-02-04 00:53:35,962 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-02-04 00:53:35,962 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-02-04 00:53:35,962 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-02-04 00:53:35,962 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-02-04 00:53:35,962 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-02-04 00:53:35,962 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-02-04 00:53:35,962 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-02-04 00:53:35,962 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-04 00:53:35,962 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-02-04 00:53:35,962 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-02-04 00:53:35,963 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-02-04 00:53:35,963 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-02-04 00:53:35,963 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-02-04 00:53:35,963 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-02-04 00:53:35,963 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-02-04 00:53:35,963 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-02-04 00:53:35,963 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-02-04 00:53:35,963 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-02-04 00:53:35,963 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-02-04 00:53:35,963 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-02-04 00:53:35,963 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-02-04 00:53:35,963 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-02-04 00:53:35,963 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-02-04 00:53:35,963 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-02-04 00:53:35,964 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-02-04 00:53:35,964 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-02-04 00:53:35,964 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-02-04 00:53:35,964 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-02-04 00:53:35,964 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-02-04 00:53:35,964 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-02-04 00:53:35,964 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-02-04 00:53:35,964 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-02-04 00:53:35,964 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-02-04 00:53:35,964 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-02-04 00:53:35,964 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-02-04 00:53:35,964 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-02-04 00:53:35,964 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-02-04 00:53:35,964 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-02-04 00:53:35,965 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-04 00:53:35,965 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-04 00:53:35,965 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-04 00:53:36,147 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-02-04 00:53:36,306 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-04 00:53:36,306 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 12:53:36 BoogieIcfgContainer [2018-02-04 00:53:36,306 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-04 00:53:36,307 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-04 00:53:36,307 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-04 00:53:36,309 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-04 00:53:36,309 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 04.02 12:53:35" (1/3) ... [2018-02-04 00:53:36,310 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@55448291 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 12:53:36, skipping insertion in model container [2018-02-04 00:53:36,310 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:53:35" (2/3) ... [2018-02-04 00:53:36,310 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@55448291 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 12:53:36, skipping insertion in model container [2018-02-04 00:53:36,310 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 12:53:36" (3/3) ... [2018-02-04 00:53:36,311 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_2_true-valid-memsafety_true-termination.i [2018-02-04 00:53:36,316 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-02-04 00:53:36,322 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-02-04 00:53:36,345 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-04 00:53:36,345 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-04 00:53:36,345 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-02-04 00:53:36,345 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-02-04 00:53:36,345 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-04 00:53:36,345 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-04 00:53:36,345 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-04 00:53:36,345 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-04 00:53:36,346 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-04 00:53:36,356 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states. [2018-02-04 00:53:36,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-02-04 00:53:36,363 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:36,364 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:36,364 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:36,366 INFO L82 PathProgramCache]: Analyzing trace with hash -998986606, now seen corresponding path program 1 times [2018-02-04 00:53:36,367 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:36,368 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:36,402 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:36,402 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:36,402 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:36,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:36,439 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:36,591 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:36,593 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:53:36,594 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 00:53:36,595 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 00:53:36,606 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 00:53:36,606 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 00:53:36,608 INFO L87 Difference]: Start difference. First operand 143 states. Second operand 5 states. [2018-02-04 00:53:36,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:36,662 INFO L93 Difference]: Finished difference Result 149 states and 158 transitions. [2018-02-04 00:53:36,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 00:53:36,663 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-02-04 00:53:36,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:36,674 INFO L225 Difference]: With dead ends: 149 [2018-02-04 00:53:36,674 INFO L226 Difference]: Without dead ends: 146 [2018-02-04 00:53:36,675 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 00:53:36,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-02-04 00:53:36,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 144. [2018-02-04 00:53:36,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-02-04 00:53:36,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 153 transitions. [2018-02-04 00:53:36,713 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 153 transitions. Word has length 17 [2018-02-04 00:53:36,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:36,714 INFO L432 AbstractCegarLoop]: Abstraction has 144 states and 153 transitions. [2018-02-04 00:53:36,714 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 00:53:36,714 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 153 transitions. [2018-02-04 00:53:36,715 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-04 00:53:36,715 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:36,715 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:36,715 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:36,715 INFO L82 PathProgramCache]: Analyzing trace with hash -2077747980, now seen corresponding path program 1 times [2018-02-04 00:53:36,715 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:36,715 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:36,717 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:36,717 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:36,717 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:36,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:36,735 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:36,787 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:36,787 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:53:36,787 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 00:53:36,788 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 00:53:36,789 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 00:53:36,789 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 00:53:36,789 INFO L87 Difference]: Start difference. First operand 144 states and 153 transitions. Second operand 6 states. [2018-02-04 00:53:36,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:36,948 INFO L93 Difference]: Finished difference Result 145 states and 154 transitions. [2018-02-04 00:53:36,949 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 00:53:36,949 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-02-04 00:53:36,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:36,950 INFO L225 Difference]: With dead ends: 145 [2018-02-04 00:53:36,951 INFO L226 Difference]: Without dead ends: 145 [2018-02-04 00:53:36,951 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 00:53:36,952 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-02-04 00:53:36,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 143. [2018-02-04 00:53:36,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-02-04 00:53:36,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 152 transitions. [2018-02-04 00:53:36,960 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 152 transitions. Word has length 19 [2018-02-04 00:53:36,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:36,961 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 152 transitions. [2018-02-04 00:53:36,961 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 00:53:36,961 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 152 transitions. [2018-02-04 00:53:36,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-04 00:53:36,962 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:36,962 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:36,962 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:36,962 INFO L82 PathProgramCache]: Analyzing trace with hash -2077747979, now seen corresponding path program 1 times [2018-02-04 00:53:36,962 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:36,962 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:36,963 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:36,964 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:36,964 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:36,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:36,980 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:37,141 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:37,141 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:53:37,141 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 00:53:37,141 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 00:53:37,142 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 00:53:37,142 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 00:53:37,142 INFO L87 Difference]: Start difference. First operand 143 states and 152 transitions. Second operand 7 states. [2018-02-04 00:53:37,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:37,324 INFO L93 Difference]: Finished difference Result 144 states and 153 transitions. [2018-02-04 00:53:37,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 00:53:37,325 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-02-04 00:53:37,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:37,326 INFO L225 Difference]: With dead ends: 144 [2018-02-04 00:53:37,326 INFO L226 Difference]: Without dead ends: 144 [2018-02-04 00:53:37,326 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-02-04 00:53:37,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-02-04 00:53:37,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 142. [2018-02-04 00:53:37,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-02-04 00:53:37,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 151 transitions. [2018-02-04 00:53:37,333 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 151 transitions. Word has length 19 [2018-02-04 00:53:37,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:37,333 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 151 transitions. [2018-02-04 00:53:37,333 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 00:53:37,333 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 151 transitions. [2018-02-04 00:53:37,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-02-04 00:53:37,334 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:37,334 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:37,334 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:37,334 INFO L82 PathProgramCache]: Analyzing trace with hash -471802203, now seen corresponding path program 1 times [2018-02-04 00:53:37,334 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:37,334 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:37,336 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:37,336 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:37,336 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:37,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:37,348 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:37,401 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:37,401 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:53:37,402 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 00:53:37,402 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 00:53:37,402 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 00:53:37,402 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 00:53:37,402 INFO L87 Difference]: Start difference. First operand 142 states and 151 transitions. Second operand 7 states. [2018-02-04 00:53:37,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:37,445 INFO L93 Difference]: Finished difference Result 159 states and 170 transitions. [2018-02-04 00:53:37,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 00:53:37,445 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-02-04 00:53:37,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:37,446 INFO L225 Difference]: With dead ends: 159 [2018-02-04 00:53:37,446 INFO L226 Difference]: Without dead ends: 159 [2018-02-04 00:53:37,447 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-02-04 00:53:37,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-02-04 00:53:37,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 151. [2018-02-04 00:53:37,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-02-04 00:53:37,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 160 transitions. [2018-02-04 00:53:37,455 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 160 transitions. Word has length 27 [2018-02-04 00:53:37,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:37,455 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 160 transitions. [2018-02-04 00:53:37,455 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 00:53:37,456 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 160 transitions. [2018-02-04 00:53:37,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-04 00:53:37,456 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:37,456 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:37,457 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:37,457 INFO L82 PathProgramCache]: Analyzing trace with hash 131109242, now seen corresponding path program 1 times [2018-02-04 00:53:37,457 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:37,457 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:37,458 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:37,458 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:37,458 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:37,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:37,470 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:37,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:37,547 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:53:37,547 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 00:53:37,547 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 00:53:37,547 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 00:53:37,548 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 00:53:37,548 INFO L87 Difference]: Start difference. First operand 151 states and 160 transitions. Second operand 10 states. [2018-02-04 00:53:37,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:37,737 INFO L93 Difference]: Finished difference Result 150 states and 159 transitions. [2018-02-04 00:53:37,737 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 00:53:37,737 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-02-04 00:53:37,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:37,738 INFO L225 Difference]: With dead ends: 150 [2018-02-04 00:53:37,738 INFO L226 Difference]: Without dead ends: 150 [2018-02-04 00:53:37,738 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 00:53:37,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-02-04 00:53:37,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-02-04 00:53:37,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-02-04 00:53:37,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 159 transitions. [2018-02-04 00:53:37,745 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 159 transitions. Word has length 34 [2018-02-04 00:53:37,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:37,745 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 159 transitions. [2018-02-04 00:53:37,745 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 00:53:37,745 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 159 transitions. [2018-02-04 00:53:37,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-04 00:53:37,746 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:37,746 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:37,747 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:37,747 INFO L82 PathProgramCache]: Analyzing trace with hash 131109243, now seen corresponding path program 1 times [2018-02-04 00:53:37,747 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:37,747 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:37,748 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:37,749 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:37,749 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:37,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:37,760 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:37,782 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:37,782 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:53:37,782 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-04 00:53:37,782 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 00:53:37,783 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 00:53:37,783 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 00:53:37,783 INFO L87 Difference]: Start difference. First operand 150 states and 159 transitions. Second operand 4 states. [2018-02-04 00:53:37,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:37,793 INFO L93 Difference]: Finished difference Result 153 states and 162 transitions. [2018-02-04 00:53:37,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 00:53:37,793 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-02-04 00:53:37,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:37,794 INFO L225 Difference]: With dead ends: 153 [2018-02-04 00:53:37,794 INFO L226 Difference]: Without dead ends: 151 [2018-02-04 00:53:37,795 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 00:53:37,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-02-04 00:53:37,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151. [2018-02-04 00:53:37,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-02-04 00:53:37,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 160 transitions. [2018-02-04 00:53:37,801 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 160 transitions. Word has length 34 [2018-02-04 00:53:37,801 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:37,801 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 160 transitions. [2018-02-04 00:53:37,801 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 00:53:37,801 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 160 transitions. [2018-02-04 00:53:37,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-02-04 00:53:37,802 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:37,802 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:37,802 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:37,803 INFO L82 PathProgramCache]: Analyzing trace with hash -2110897305, now seen corresponding path program 1 times [2018-02-04 00:53:37,803 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:37,803 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:37,804 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:37,804 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:37,804 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:37,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:37,817 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:37,839 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:37,839 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:53:37,839 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:53:37,848 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:37,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:37,884 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:53:37,907 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:37,938 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:53:37,938 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-02-04 00:53:37,939 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 00:53:37,939 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 00:53:37,939 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-02-04 00:53:37,939 INFO L87 Difference]: Start difference. First operand 151 states and 160 transitions. Second operand 6 states. [2018-02-04 00:53:37,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:37,966 INFO L93 Difference]: Finished difference Result 154 states and 163 transitions. [2018-02-04 00:53:37,966 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 00:53:37,966 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-02-04 00:53:37,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:37,967 INFO L225 Difference]: With dead ends: 154 [2018-02-04 00:53:37,967 INFO L226 Difference]: Without dead ends: 152 [2018-02-04 00:53:37,968 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-02-04 00:53:37,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-02-04 00:53:37,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 152. [2018-02-04 00:53:37,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-02-04 00:53:37,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 161 transitions. [2018-02-04 00:53:37,978 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 161 transitions. Word has length 35 [2018-02-04 00:53:37,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:37,978 INFO L432 AbstractCegarLoop]: Abstraction has 152 states and 161 transitions. [2018-02-04 00:53:37,978 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 00:53:37,982 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 161 transitions. [2018-02-04 00:53:37,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-04 00:53:37,983 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:37,983 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:37,983 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:37,983 INFO L82 PathProgramCache]: Analyzing trace with hash 1181841647, now seen corresponding path program 1 times [2018-02-04 00:53:37,983 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:37,983 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:37,984 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:37,984 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:37,984 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:38,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:38,005 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:38,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:38,071 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:53:38,071 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 00:53:38,071 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 00:53:38,071 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 00:53:38,071 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 00:53:38,072 INFO L87 Difference]: Start difference. First operand 152 states and 161 transitions. Second operand 7 states. [2018-02-04 00:53:38,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:38,116 INFO L93 Difference]: Finished difference Result 163 states and 174 transitions. [2018-02-04 00:53:38,118 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 00:53:38,118 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-02-04 00:53:38,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:38,119 INFO L225 Difference]: With dead ends: 163 [2018-02-04 00:53:38,119 INFO L226 Difference]: Without dead ends: 163 [2018-02-04 00:53:38,119 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-02-04 00:53:38,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-02-04 00:53:38,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 159. [2018-02-04 00:53:38,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-02-04 00:53:38,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 169 transitions. [2018-02-04 00:53:38,125 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 169 transitions. Word has length 36 [2018-02-04 00:53:38,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:38,125 INFO L432 AbstractCegarLoop]: Abstraction has 159 states and 169 transitions. [2018-02-04 00:53:38,125 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 00:53:38,125 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 169 transitions. [2018-02-04 00:53:38,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-04 00:53:38,126 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:38,126 INFO L351 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:38,127 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:38,127 INFO L82 PathProgramCache]: Analyzing trace with hash 1401343739, now seen corresponding path program 2 times [2018-02-04 00:53:38,127 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:38,127 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:38,128 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:38,128 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:38,128 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:38,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:38,144 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:38,174 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:38,175 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:53:38,175 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:53:38,184 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 00:53:38,211 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 00:53:38,212 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:53:38,215 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:53:38,244 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 00:53:38,246 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 00:53:38,268 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 00:53:38,268 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:53:38,283 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 00:53:38,284 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-04 00:53:38,740 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 00:53:38,757 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 00:53:38,757 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [6] total 19 [2018-02-04 00:53:38,758 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-04 00:53:38,758 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-04 00:53:38,758 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-02-04 00:53:38,759 INFO L87 Difference]: Start difference. First operand 159 states and 169 transitions. Second operand 19 states. [2018-02-04 00:53:39,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:39,743 INFO L93 Difference]: Finished difference Result 181 states and 191 transitions. [2018-02-04 00:53:39,744 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 00:53:39,744 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 36 [2018-02-04 00:53:39,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:39,746 INFO L225 Difference]: With dead ends: 181 [2018-02-04 00:53:39,746 INFO L226 Difference]: Without dead ends: 179 [2018-02-04 00:53:39,747 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=99, Invalid=603, Unknown=0, NotChecked=0, Total=702 [2018-02-04 00:53:39,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-02-04 00:53:39,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 159. [2018-02-04 00:53:39,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-02-04 00:53:39,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 169 transitions. [2018-02-04 00:53:39,751 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 169 transitions. Word has length 36 [2018-02-04 00:53:39,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:39,755 INFO L432 AbstractCegarLoop]: Abstraction has 159 states and 169 transitions. [2018-02-04 00:53:39,755 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-04 00:53:39,755 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 169 transitions. [2018-02-04 00:53:39,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-02-04 00:53:39,756 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:39,757 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:39,757 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:39,757 INFO L82 PathProgramCache]: Analyzing trace with hash -1379512829, now seen corresponding path program 1 times [2018-02-04 00:53:39,757 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:39,757 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:39,758 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:39,759 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:53:39,759 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:39,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:39,765 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:39,793 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-02-04 00:53:39,793 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:53:39,793 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-04 00:53:39,793 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-04 00:53:39,794 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-04 00:53:39,794 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 00:53:39,794 INFO L87 Difference]: Start difference. First operand 159 states and 169 transitions. Second operand 3 states. [2018-02-04 00:53:39,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:39,865 INFO L93 Difference]: Finished difference Result 177 states and 190 transitions. [2018-02-04 00:53:39,865 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-04 00:53:39,865 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2018-02-04 00:53:39,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:39,866 INFO L225 Difference]: With dead ends: 177 [2018-02-04 00:53:39,866 INFO L226 Difference]: Without dead ends: 163 [2018-02-04 00:53:39,866 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 00:53:39,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-02-04 00:53:39,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 155. [2018-02-04 00:53:39,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-02-04 00:53:39,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 164 transitions. [2018-02-04 00:53:39,871 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 164 transitions. Word has length 39 [2018-02-04 00:53:39,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:39,871 INFO L432 AbstractCegarLoop]: Abstraction has 155 states and 164 transitions. [2018-02-04 00:53:39,872 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-04 00:53:39,872 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 164 transitions. [2018-02-04 00:53:39,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-04 00:53:39,872 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:39,873 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:39,873 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:39,873 INFO L82 PathProgramCache]: Analyzing trace with hash 710655878, now seen corresponding path program 1 times [2018-02-04 00:53:39,873 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:39,873 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:39,874 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:39,874 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:39,874 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:39,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:39,885 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:39,932 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-02-04 00:53:39,932 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:53:39,932 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 00:53:39,932 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 00:53:39,932 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 00:53:39,933 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 00:53:39,933 INFO L87 Difference]: Start difference. First operand 155 states and 164 transitions. Second operand 10 states. [2018-02-04 00:53:40,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:40,104 INFO L93 Difference]: Finished difference Result 153 states and 162 transitions. [2018-02-04 00:53:40,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 00:53:40,104 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-02-04 00:53:40,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:40,105 INFO L225 Difference]: With dead ends: 153 [2018-02-04 00:53:40,105 INFO L226 Difference]: Without dead ends: 153 [2018-02-04 00:53:40,105 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 00:53:40,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-02-04 00:53:40,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 153. [2018-02-04 00:53:40,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-02-04 00:53:40,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 162 transitions. [2018-02-04 00:53:40,108 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 162 transitions. Word has length 42 [2018-02-04 00:53:40,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:40,109 INFO L432 AbstractCegarLoop]: Abstraction has 153 states and 162 transitions. [2018-02-04 00:53:40,109 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 00:53:40,109 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 162 transitions. [2018-02-04 00:53:40,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-04 00:53:40,109 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:40,110 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:40,110 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:40,110 INFO L82 PathProgramCache]: Analyzing trace with hash 710655879, now seen corresponding path program 1 times [2018-02-04 00:53:40,110 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:40,110 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:40,111 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:40,111 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:40,111 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:40,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:40,119 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:40,142 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:40,142 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:53:40,142 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:53:40,147 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:40,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:40,169 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:53:40,180 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:40,198 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:53:40,198 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-02-04 00:53:40,198 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 00:53:40,199 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 00:53:40,199 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-02-04 00:53:40,199 INFO L87 Difference]: Start difference. First operand 153 states and 162 transitions. Second operand 8 states. [2018-02-04 00:53:40,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:40,214 INFO L93 Difference]: Finished difference Result 156 states and 165 transitions. [2018-02-04 00:53:40,214 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 00:53:40,214 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-02-04 00:53:40,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:40,214 INFO L225 Difference]: With dead ends: 156 [2018-02-04 00:53:40,215 INFO L226 Difference]: Without dead ends: 154 [2018-02-04 00:53:40,215 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-02-04 00:53:40,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-02-04 00:53:40,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 154. [2018-02-04 00:53:40,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-02-04 00:53:40,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 163 transitions. [2018-02-04 00:53:40,217 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 163 transitions. Word has length 42 [2018-02-04 00:53:40,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:40,218 INFO L432 AbstractCegarLoop]: Abstraction has 154 states and 163 transitions. [2018-02-04 00:53:40,218 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 00:53:40,218 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 163 transitions. [2018-02-04 00:53:40,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-02-04 00:53:40,218 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:40,218 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:40,218 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:40,219 INFO L82 PathProgramCache]: Analyzing trace with hash -495427355, now seen corresponding path program 1 times [2018-02-04 00:53:40,219 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:40,219 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:40,219 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:40,219 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:40,220 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:40,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:40,223 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:40,268 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-02-04 00:53:40,268 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:53:40,269 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 00:53:40,269 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 00:53:40,269 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 00:53:40,269 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 00:53:40,269 INFO L87 Difference]: Start difference. First operand 154 states and 163 transitions. Second operand 6 states. [2018-02-04 00:53:40,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:40,286 INFO L93 Difference]: Finished difference Result 138 states and 145 transitions. [2018-02-04 00:53:40,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 00:53:40,286 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2018-02-04 00:53:40,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:40,287 INFO L225 Difference]: With dead ends: 138 [2018-02-04 00:53:40,287 INFO L226 Difference]: Without dead ends: 138 [2018-02-04 00:53:40,287 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 00:53:40,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-02-04 00:53:40,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-02-04 00:53:40,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-02-04 00:53:40,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 145 transitions. [2018-02-04 00:53:40,290 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 145 transitions. Word has length 41 [2018-02-04 00:53:40,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:40,291 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 145 transitions. [2018-02-04 00:53:40,291 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 00:53:40,291 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 145 transitions. [2018-02-04 00:53:40,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-02-04 00:53:40,291 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:40,291 INFO L351 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:40,292 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:40,292 INFO L82 PathProgramCache]: Analyzing trace with hash -141638285, now seen corresponding path program 2 times [2018-02-04 00:53:40,292 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:40,292 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:40,293 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:40,293 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:40,293 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:40,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:40,304 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:40,349 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:40,350 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:53:40,350 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:53:40,355 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 00:53:40,370 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 00:53:40,370 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:53:40,373 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:53:40,380 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 00:53:40,380 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 00:53:40,405 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 00:53:40,405 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:53:40,419 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 00:53:40,419 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-04 00:53:40,909 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-04 00:53:40,928 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 00:53:40,928 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-02-04 00:53:40,928 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-04 00:53:40,929 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-04 00:53:40,929 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-02-04 00:53:40,929 INFO L87 Difference]: Start difference. First operand 138 states and 145 transitions. Second operand 22 states. [2018-02-04 00:53:43,160 WARN L143 SmtUtils]: Spent 2034ms on a formula simplification that was a NOOP. DAG size: 31 [2018-02-04 00:53:43,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:43,779 INFO L93 Difference]: Finished difference Result 139 states and 146 transitions. [2018-02-04 00:53:43,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 00:53:43,780 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 43 [2018-02-04 00:53:43,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:43,780 INFO L225 Difference]: With dead ends: 139 [2018-02-04 00:53:43,780 INFO L226 Difference]: Without dead ends: 137 [2018-02-04 00:53:43,780 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 155 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=147, Invalid=845, Unknown=0, NotChecked=0, Total=992 [2018-02-04 00:53:43,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-02-04 00:53:43,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-02-04 00:53:43,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-02-04 00:53:43,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 144 transitions. [2018-02-04 00:53:43,783 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 144 transitions. Word has length 43 [2018-02-04 00:53:43,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:43,783 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 144 transitions. [2018-02-04 00:53:43,783 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-04 00:53:43,783 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 144 transitions. [2018-02-04 00:53:43,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-02-04 00:53:43,784 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:43,784 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:43,784 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:43,784 INFO L82 PathProgramCache]: Analyzing trace with hash 1517747909, now seen corresponding path program 1 times [2018-02-04 00:53:43,784 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:43,784 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:43,785 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:43,785 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:53:43,785 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:43,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:43,792 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:43,830 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 00:53:43,831 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:53:43,831 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-02-04 00:53:43,831 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 00:53:43,831 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 00:53:43,831 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-04 00:53:43,831 INFO L87 Difference]: Start difference. First operand 137 states and 144 transitions. Second operand 8 states. [2018-02-04 00:53:43,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:43,857 INFO L93 Difference]: Finished difference Result 139 states and 145 transitions. [2018-02-04 00:53:43,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 00:53:43,857 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 47 [2018-02-04 00:53:43,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:43,857 INFO L225 Difference]: With dead ends: 139 [2018-02-04 00:53:43,857 INFO L226 Difference]: Without dead ends: 137 [2018-02-04 00:53:43,858 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-02-04 00:53:43,858 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-02-04 00:53:43,860 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-02-04 00:53:43,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-02-04 00:53:43,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 143 transitions. [2018-02-04 00:53:43,861 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 143 transitions. Word has length 47 [2018-02-04 00:53:43,861 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:43,861 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 143 transitions. [2018-02-04 00:53:43,861 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 00:53:43,861 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 143 transitions. [2018-02-04 00:53:43,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-02-04 00:53:43,861 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:43,862 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:43,862 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:43,862 INFO L82 PathProgramCache]: Analyzing trace with hash 2035822852, now seen corresponding path program 1 times [2018-02-04 00:53:43,862 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:43,862 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:43,863 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:43,863 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:43,863 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:43,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:43,870 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:43,909 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 00:53:43,909 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:53:43,909 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-02-04 00:53:43,910 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 00:53:43,910 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 00:53:43,910 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 00:53:43,910 INFO L87 Difference]: Start difference. First operand 137 states and 143 transitions. Second operand 10 states. [2018-02-04 00:53:43,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:43,953 INFO L93 Difference]: Finished difference Result 141 states and 146 transitions. [2018-02-04 00:53:43,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 00:53:43,953 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 52 [2018-02-04 00:53:43,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:43,954 INFO L225 Difference]: With dead ends: 141 [2018-02-04 00:53:43,954 INFO L226 Difference]: Without dead ends: 137 [2018-02-04 00:53:43,954 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 00:53:43,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-02-04 00:53:43,956 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-02-04 00:53:43,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-02-04 00:53:43,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 142 transitions. [2018-02-04 00:53:43,957 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 142 transitions. Word has length 52 [2018-02-04 00:53:43,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:43,957 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 142 transitions. [2018-02-04 00:53:43,957 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 00:53:43,957 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 142 transitions. [2018-02-04 00:53:43,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-02-04 00:53:43,958 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:43,958 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:43,958 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:43,958 INFO L82 PathProgramCache]: Analyzing trace with hash 1511828740, now seen corresponding path program 1 times [2018-02-04 00:53:43,958 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:43,958 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:43,959 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:43,959 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:43,959 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:43,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:43,967 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:44,033 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 00:53:44,033 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:53:44,034 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-02-04 00:53:44,034 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-04 00:53:44,034 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-04 00:53:44,034 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-02-04 00:53:44,034 INFO L87 Difference]: Start difference. First operand 137 states and 142 transitions. Second operand 13 states. [2018-02-04 00:53:44,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:44,219 INFO L93 Difference]: Finished difference Result 135 states and 140 transitions. [2018-02-04 00:53:44,219 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-04 00:53:44,219 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 63 [2018-02-04 00:53:44,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:44,220 INFO L225 Difference]: With dead ends: 135 [2018-02-04 00:53:44,220 INFO L226 Difference]: Without dead ends: 135 [2018-02-04 00:53:44,220 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-02-04 00:53:44,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-02-04 00:53:44,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-02-04 00:53:44,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-02-04 00:53:44,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 140 transitions. [2018-02-04 00:53:44,223 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 140 transitions. Word has length 63 [2018-02-04 00:53:44,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:44,224 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 140 transitions. [2018-02-04 00:53:44,224 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-04 00:53:44,224 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 140 transitions. [2018-02-04 00:53:44,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-02-04 00:53:44,224 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:44,225 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:44,225 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:44,225 INFO L82 PathProgramCache]: Analyzing trace with hash 1511828741, now seen corresponding path program 1 times [2018-02-04 00:53:44,225 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:44,225 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:44,226 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:44,226 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:44,226 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:44,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:44,239 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:44,291 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:44,291 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:53:44,291 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:53:44,298 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:44,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:44,335 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:53:44,353 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:44,383 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:53:44,383 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-02-04 00:53:44,384 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 00:53:44,384 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 00:53:44,384 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-02-04 00:53:44,384 INFO L87 Difference]: Start difference. First operand 135 states and 140 transitions. Second operand 10 states. [2018-02-04 00:53:44,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:44,409 INFO L93 Difference]: Finished difference Result 138 states and 143 transitions. [2018-02-04 00:53:44,409 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 00:53:44,409 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 63 [2018-02-04 00:53:44,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:44,410 INFO L225 Difference]: With dead ends: 138 [2018-02-04 00:53:44,410 INFO L226 Difference]: Without dead ends: 136 [2018-02-04 00:53:44,410 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-02-04 00:53:44,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-02-04 00:53:44,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-02-04 00:53:44,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-02-04 00:53:44,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 141 transitions. [2018-02-04 00:53:44,414 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 141 transitions. Word has length 63 [2018-02-04 00:53:44,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:44,414 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 141 transitions. [2018-02-04 00:53:44,414 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 00:53:44,414 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 141 transitions. [2018-02-04 00:53:44,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-02-04 00:53:44,414 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:44,415 INFO L351 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:44,415 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:44,415 INFO L82 PathProgramCache]: Analyzing trace with hash 2058801817, now seen corresponding path program 2 times [2018-02-04 00:53:44,415 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:44,415 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:44,416 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:44,416 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:44,416 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:44,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:44,429 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:44,485 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:44,485 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:53:44,485 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:53:44,492 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 00:53:44,525 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 00:53:44,525 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:53:44,529 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:53:44,534 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 00:53:44,534 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 00:53:44,549 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 00:53:44,549 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:53:44,562 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 00:53:44,563 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-04 00:53:45,109 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-02-04 00:53:45,126 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 00:53:45,184 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [10] total 27 [2018-02-04 00:53:45,185 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-02-04 00:53:45,185 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-02-04 00:53:45,185 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=603, Unknown=0, NotChecked=0, Total=702 [2018-02-04 00:53:45,185 INFO L87 Difference]: Start difference. First operand 136 states and 141 transitions. Second operand 27 states. [2018-02-04 00:53:47,244 WARN L143 SmtUtils]: Spent 2030ms on a formula simplification that was a NOOP. DAG size: 39 [2018-02-04 00:53:48,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:48,126 INFO L93 Difference]: Finished difference Result 137 states and 142 transitions. [2018-02-04 00:53:48,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-02-04 00:53:48,127 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 64 [2018-02-04 00:53:48,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:48,127 INFO L225 Difference]: With dead ends: 137 [2018-02-04 00:53:48,127 INFO L226 Difference]: Without dead ends: 135 [2018-02-04 00:53:48,128 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 319 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=213, Invalid=1347, Unknown=0, NotChecked=0, Total=1560 [2018-02-04 00:53:48,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-02-04 00:53:48,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-02-04 00:53:48,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-02-04 00:53:48,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 140 transitions. [2018-02-04 00:53:48,130 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 140 transitions. Word has length 64 [2018-02-04 00:53:48,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:48,130 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 140 transitions. [2018-02-04 00:53:48,130 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-02-04 00:53:48,130 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 140 transitions. [2018-02-04 00:53:48,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-02-04 00:53:48,131 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:48,131 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:48,131 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:48,131 INFO L82 PathProgramCache]: Analyzing trace with hash -243629328, now seen corresponding path program 1 times [2018-02-04 00:53:48,131 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:48,131 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:48,132 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:48,132 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:53:48,132 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:48,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:48,140 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:48,198 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-02-04 00:53:48,198 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:53:48,198 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-02-04 00:53:48,198 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 00:53:48,199 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 00:53:48,199 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-02-04 00:53:48,199 INFO L87 Difference]: Start difference. First operand 135 states and 140 transitions. Second operand 11 states. [2018-02-04 00:53:48,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:48,253 INFO L93 Difference]: Finished difference Result 138 states and 142 transitions. [2018-02-04 00:53:48,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 00:53:48,253 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 74 [2018-02-04 00:53:48,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:48,254 INFO L225 Difference]: With dead ends: 138 [2018-02-04 00:53:48,254 INFO L226 Difference]: Without dead ends: 135 [2018-02-04 00:53:48,254 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-02-04 00:53:48,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-02-04 00:53:48,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-02-04 00:53:48,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-02-04 00:53:48,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 139 transitions. [2018-02-04 00:53:48,257 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 139 transitions. Word has length 74 [2018-02-04 00:53:48,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:48,257 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 139 transitions. [2018-02-04 00:53:48,257 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 00:53:48,257 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 139 transitions. [2018-02-04 00:53:48,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-02-04 00:53:48,258 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:48,258 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:48,258 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:48,258 INFO L82 PathProgramCache]: Analyzing trace with hash 254396120, now seen corresponding path program 1 times [2018-02-04 00:53:48,258 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:48,258 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:48,259 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:48,259 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:48,259 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:48,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:48,274 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:48,435 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-02-04 00:53:48,435 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:53:48,435 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-02-04 00:53:48,436 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-02-04 00:53:48,436 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-02-04 00:53:48,436 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=271, Unknown=0, NotChecked=0, Total=306 [2018-02-04 00:53:48,436 INFO L87 Difference]: Start difference. First operand 135 states and 139 transitions. Second operand 18 states. [2018-02-04 00:53:48,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:48,707 INFO L93 Difference]: Finished difference Result 163 states and 174 transitions. [2018-02-04 00:53:48,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 00:53:48,707 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 87 [2018-02-04 00:53:48,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:48,707 INFO L225 Difference]: With dead ends: 163 [2018-02-04 00:53:48,708 INFO L226 Difference]: Without dead ends: 163 [2018-02-04 00:53:48,708 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=493, Unknown=0, NotChecked=0, Total=552 [2018-02-04 00:53:48,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-02-04 00:53:48,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 158. [2018-02-04 00:53:48,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-02-04 00:53:48,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 170 transitions. [2018-02-04 00:53:48,712 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 170 transitions. Word has length 87 [2018-02-04 00:53:48,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:48,712 INFO L432 AbstractCegarLoop]: Abstraction has 158 states and 170 transitions. [2018-02-04 00:53:48,712 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-02-04 00:53:48,712 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 170 transitions. [2018-02-04 00:53:48,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-02-04 00:53:48,713 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:48,713 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:48,713 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:48,714 INFO L82 PathProgramCache]: Analyzing trace with hash 254396121, now seen corresponding path program 1 times [2018-02-04 00:53:48,714 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:48,714 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:48,715 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:48,715 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:48,715 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:48,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:48,730 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:48,796 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:48,797 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:53:48,797 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:53:48,805 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:48,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:48,858 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:53:48,872 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:48,904 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:53:48,904 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-02-04 00:53:48,904 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-04 00:53:48,904 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-04 00:53:48,904 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-02-04 00:53:48,904 INFO L87 Difference]: Start difference. First operand 158 states and 170 transitions. Second operand 12 states. [2018-02-04 00:53:48,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:48,927 INFO L93 Difference]: Finished difference Result 161 states and 173 transitions. [2018-02-04 00:53:48,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 00:53:48,933 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 87 [2018-02-04 00:53:48,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:48,934 INFO L225 Difference]: With dead ends: 161 [2018-02-04 00:53:48,934 INFO L226 Difference]: Without dead ends: 159 [2018-02-04 00:53:48,935 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-02-04 00:53:48,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-02-04 00:53:48,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 159. [2018-02-04 00:53:48,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-02-04 00:53:48,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 171 transitions. [2018-02-04 00:53:48,940 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 171 transitions. Word has length 87 [2018-02-04 00:53:48,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:48,941 INFO L432 AbstractCegarLoop]: Abstraction has 159 states and 171 transitions. [2018-02-04 00:53:48,941 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-04 00:53:48,941 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 171 transitions. [2018-02-04 00:53:48,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-02-04 00:53:48,942 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:48,942 INFO L351 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:48,942 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:48,942 INFO L82 PathProgramCache]: Analyzing trace with hash -388927379, now seen corresponding path program 2 times [2018-02-04 00:53:48,942 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:48,942 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:48,943 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:48,943 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:48,943 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:48,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:48,965 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:49,047 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:49,047 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:53:49,048 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:53:49,055 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 00:53:49,100 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 00:53:49,101 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:53:49,105 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:53:49,115 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 00:53:49,115 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 00:53:49,128 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 00:53:49,128 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:53:49,141 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 00:53:49,141 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-04 00:53:51,330 WARN L143 SmtUtils]: Spent 2019ms on a formula simplification that was a NOOP. DAG size: 31 [2018-02-04 00:53:51,886 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-02-04 00:53:51,905 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 00:53:51,905 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [12] total 31 [2018-02-04 00:53:51,906 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-02-04 00:53:51,906 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-02-04 00:53:51,906 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=804, Unknown=0, NotChecked=0, Total=930 [2018-02-04 00:53:51,906 INFO L87 Difference]: Start difference. First operand 159 states and 171 transitions. Second operand 31 states. [2018-02-04 00:53:54,405 WARN L143 SmtUtils]: Spent 2026ms on a formula simplification that was a NOOP. DAG size: 36 [2018-02-04 00:53:55,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:55,182 INFO L93 Difference]: Finished difference Result 160 states and 170 transitions. [2018-02-04 00:53:55,182 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-02-04 00:53:55,182 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 88 [2018-02-04 00:53:55,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:55,183 INFO L225 Difference]: With dead ends: 160 [2018-02-04 00:53:55,183 INFO L226 Difference]: Without dead ends: 158 [2018-02-04 00:53:55,183 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 67 SyntacticMatches, 3 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 488 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=286, Invalid=1876, Unknown=0, NotChecked=0, Total=2162 [2018-02-04 00:53:55,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-02-04 00:53:55,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 158. [2018-02-04 00:53:55,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-02-04 00:53:55,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 168 transitions. [2018-02-04 00:53:55,186 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 168 transitions. Word has length 88 [2018-02-04 00:53:55,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:55,186 INFO L432 AbstractCegarLoop]: Abstraction has 158 states and 168 transitions. [2018-02-04 00:53:55,186 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-02-04 00:53:55,186 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 168 transitions. [2018-02-04 00:53:55,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-02-04 00:53:55,187 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:55,187 INFO L351 BasicCegarLoop]: trace histogram [9, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:55,188 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:55,188 INFO L82 PathProgramCache]: Analyzing trace with hash 1868073210, now seen corresponding path program 1 times [2018-02-04 00:53:55,188 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:55,188 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:55,189 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:55,189 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:53:55,189 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:55,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:55,202 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:55,282 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2018-02-04 00:53:55,283 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:53:55,283 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:53:55,292 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:55,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:55,340 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:53:55,479 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-02-04 00:53:55,508 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:53:55,508 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 13] total 22 [2018-02-04 00:53:55,508 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-04 00:53:55,509 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-04 00:53:55,509 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=376, Unknown=0, NotChecked=0, Total=462 [2018-02-04 00:53:55,509 INFO L87 Difference]: Start difference. First operand 158 states and 168 transitions. Second operand 22 states. [2018-02-04 00:53:55,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:55,630 INFO L93 Difference]: Finished difference Result 162 states and 168 transitions. [2018-02-04 00:53:55,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 00:53:55,630 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 92 [2018-02-04 00:53:55,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:55,631 INFO L225 Difference]: With dead ends: 162 [2018-02-04 00:53:55,631 INFO L226 Difference]: Without dead ends: 156 [2018-02-04 00:53:55,631 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=102, Invalid=548, Unknown=0, NotChecked=0, Total=650 [2018-02-04 00:53:55,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-02-04 00:53:55,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 156. [2018-02-04 00:53:55,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-02-04 00:53:55,634 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 162 transitions. [2018-02-04 00:53:55,635 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 162 transitions. Word has length 92 [2018-02-04 00:53:55,635 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:55,635 INFO L432 AbstractCegarLoop]: Abstraction has 156 states and 162 transitions. [2018-02-04 00:53:55,635 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-04 00:53:55,635 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 162 transitions. [2018-02-04 00:53:55,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-02-04 00:53:55,636 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:55,636 INFO L351 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:55,636 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:55,636 INFO L82 PathProgramCache]: Analyzing trace with hash -63866368, now seen corresponding path program 1 times [2018-02-04 00:53:55,636 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:55,636 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:55,637 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:55,637 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:55,637 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:55,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:55,655 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:55,872 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-02-04 00:53:55,873 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:53:55,873 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2018-02-04 00:53:55,873 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-02-04 00:53:55,873 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-02-04 00:53:55,873 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=381, Unknown=0, NotChecked=0, Total=420 [2018-02-04 00:53:55,873 INFO L87 Difference]: Start difference. First operand 156 states and 162 transitions. Second operand 21 states. [2018-02-04 00:53:56,162 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:56,162 INFO L93 Difference]: Finished difference Result 166 states and 175 transitions. [2018-02-04 00:53:56,162 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-02-04 00:53:56,162 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 104 [2018-02-04 00:53:56,162 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:56,163 INFO L225 Difference]: With dead ends: 166 [2018-02-04 00:53:56,163 INFO L226 Difference]: Without dead ends: 166 [2018-02-04 00:53:56,163 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=75, Invalid=795, Unknown=0, NotChecked=0, Total=870 [2018-02-04 00:53:56,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-02-04 00:53:56,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 162. [2018-02-04 00:53:56,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-02-04 00:53:56,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 172 transitions. [2018-02-04 00:53:56,167 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 172 transitions. Word has length 104 [2018-02-04 00:53:56,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:56,167 INFO L432 AbstractCegarLoop]: Abstraction has 162 states and 172 transitions. [2018-02-04 00:53:56,167 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-02-04 00:53:56,167 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 172 transitions. [2018-02-04 00:53:56,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-02-04 00:53:56,168 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:56,168 INFO L351 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:56,168 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:56,168 INFO L82 PathProgramCache]: Analyzing trace with hash -63866367, now seen corresponding path program 1 times [2018-02-04 00:53:56,168 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:56,169 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:56,169 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:56,169 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:56,170 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:56,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:56,187 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:56,304 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:56,304 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:53:56,304 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:53:56,312 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:56,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:56,375 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:53:56,391 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:56,421 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:53:56,421 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2018-02-04 00:53:56,421 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-04 00:53:56,421 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-04 00:53:56,421 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-02-04 00:53:56,422 INFO L87 Difference]: Start difference. First operand 162 states and 172 transitions. Second operand 15 states. [2018-02-04 00:53:56,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:53:56,461 INFO L93 Difference]: Finished difference Result 165 states and 175 transitions. [2018-02-04 00:53:56,462 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-02-04 00:53:56,462 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 104 [2018-02-04 00:53:56,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:53:56,463 INFO L225 Difference]: With dead ends: 165 [2018-02-04 00:53:56,463 INFO L226 Difference]: Without dead ends: 163 [2018-02-04 00:53:56,463 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 104 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=97, Invalid=143, Unknown=0, NotChecked=0, Total=240 [2018-02-04 00:53:56,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-02-04 00:53:56,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163. [2018-02-04 00:53:56,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-02-04 00:53:56,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 173 transitions. [2018-02-04 00:53:56,466 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 173 transitions. Word has length 104 [2018-02-04 00:53:56,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:53:56,467 INFO L432 AbstractCegarLoop]: Abstraction has 163 states and 173 transitions. [2018-02-04 00:53:56,467 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-04 00:53:56,467 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 173 transitions. [2018-02-04 00:53:56,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-02-04 00:53:56,467 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:53:56,468 INFO L351 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:53:56,468 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:53:56,468 INFO L82 PathProgramCache]: Analyzing trace with hash -1207457043, now seen corresponding path program 2 times [2018-02-04 00:53:56,468 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:53:56,468 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:53:56,469 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:56,469 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:53:56,469 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:53:56,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:53:56,484 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:53:56,597 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:53:56,597 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:53:56,598 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:53:56,605 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 00:53:56,654 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 00:53:56,654 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:53:56,659 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:53:56,663 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 00:53:56,663 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 00:53:56,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 00:53:56,682 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:53:56,695 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 00:53:56,695 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-04 00:53:59,682 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-02-04 00:53:59,699 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 00:53:59,699 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [15] total 38 [2018-02-04 00:53:59,700 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-02-04 00:53:59,700 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-02-04 00:53:59,700 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=178, Invalid=1227, Unknown=1, NotChecked=0, Total=1406 [2018-02-04 00:53:59,700 INFO L87 Difference]: Start difference. First operand 163 states and 173 transitions. Second operand 38 states. [2018-02-04 00:54:08,282 WARN L143 SmtUtils]: Spent 7993ms on a formula simplification that was a NOOP. DAG size: 36 [2018-02-04 00:54:09,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:54:09,358 INFO L93 Difference]: Finished difference Result 164 states and 173 transitions. [2018-02-04 00:54:09,358 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-02-04 00:54:09,358 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 105 [2018-02-04 00:54:09,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:54:09,359 INFO L225 Difference]: With dead ends: 164 [2018-02-04 00:54:09,359 INFO L226 Difference]: Without dead ends: 162 [2018-02-04 00:54:09,359 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 78 SyntacticMatches, 5 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 832 ImplicationChecksByTransitivity, 11.6s TimeCoverageRelationStatistics Valid=425, Invalid=2996, Unknown=1, NotChecked=0, Total=3422 [2018-02-04 00:54:09,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-02-04 00:54:09,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 162. [2018-02-04 00:54:09,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-02-04 00:54:09,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 171 transitions. [2018-02-04 00:54:09,362 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 171 transitions. Word has length 105 [2018-02-04 00:54:09,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:54:09,363 INFO L432 AbstractCegarLoop]: Abstraction has 162 states and 171 transitions. [2018-02-04 00:54:09,363 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-02-04 00:54:09,363 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 171 transitions. [2018-02-04 00:54:09,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-02-04 00:54:09,363 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:54:09,364 INFO L351 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:54:09,364 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:54:09,364 INFO L82 PathProgramCache]: Analyzing trace with hash 2055534530, now seen corresponding path program 1 times [2018-02-04 00:54:09,364 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:54:09,364 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:54:09,367 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:54:09,367 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:54:09,367 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:54:09,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:54:09,386 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:54:09,505 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:54:09,505 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:54:09,505 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:54:09,510 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:54:09,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:54:09,547 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:54:09,556 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:54:09,573 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:54:09,574 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 17 [2018-02-04 00:54:09,574 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-02-04 00:54:09,574 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-02-04 00:54:09,574 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-02-04 00:54:09,574 INFO L87 Difference]: Start difference. First operand 162 states and 171 transitions. Second operand 17 states. [2018-02-04 00:54:09,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:54:09,594 INFO L93 Difference]: Finished difference Result 165 states and 174 transitions. [2018-02-04 00:54:09,594 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-02-04 00:54:09,594 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 110 [2018-02-04 00:54:09,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:54:09,595 INFO L225 Difference]: With dead ends: 165 [2018-02-04 00:54:09,595 INFO L226 Difference]: Without dead ends: 163 [2018-02-04 00:54:09,595 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 110 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=126, Invalid=180, Unknown=0, NotChecked=0, Total=306 [2018-02-04 00:54:09,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-02-04 00:54:09,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163. [2018-02-04 00:54:09,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-02-04 00:54:09,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 172 transitions. [2018-02-04 00:54:09,597 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 172 transitions. Word has length 110 [2018-02-04 00:54:09,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:54:09,597 INFO L432 AbstractCegarLoop]: Abstraction has 163 states and 172 transitions. [2018-02-04 00:54:09,597 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-02-04 00:54:09,597 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 172 transitions. [2018-02-04 00:54:09,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-02-04 00:54:09,597 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:54:09,598 INFO L351 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:54:09,598 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:54:09,598 INFO L82 PathProgramCache]: Analyzing trace with hash 1832241070, now seen corresponding path program 2 times [2018-02-04 00:54:09,598 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:54:09,598 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:54:09,598 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:54:09,598 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:54:09,599 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:54:09,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:54:09,609 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:54:09,760 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:54:09,760 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:54:09,760 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:54:09,765 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 00:54:09,800 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 00:54:09,800 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:54:09,804 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:54:09,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-02-04 00:54:09,856 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 00:54:09,856 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:54:09,857 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:09,857 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:09,858 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-02-04 00:54:09,922 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 00:54:09,925 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 00:54:09,928 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 00:54:09,928 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-02-04 00:54:09,930 WARN L1033 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-02-04 00:54:09,936 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-02-04 00:54:09,938 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:09,940 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-02-04 00:54:09,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:09,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:09,946 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-02-04 00:54:09,946 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 00:54:09,950 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:09,952 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:09,954 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:09,955 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-02-04 00:54:10,232 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:10,233 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 36 [2018-02-04 00:54:10,235 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 00:54:10,236 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:10,236 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 15 [2018-02-04 00:54:10,236 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:54:10,238 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:10,240 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:10,240 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:13 [2018-02-04 00:54:10,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-02-04 00:54:10,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-02-04 00:54:10,545 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:54:10,546 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:10,547 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:10,547 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-02-04 00:54:10,582 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-02-04 00:54:10,600 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 00:54:10,600 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [41] imperfect sequences [17] total 56 [2018-02-04 00:54:10,600 INFO L409 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-02-04 00:54:10,600 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-02-04 00:54:10,601 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=212, Invalid=2761, Unknown=1, NotChecked=106, Total=3080 [2018-02-04 00:54:10,601 INFO L87 Difference]: Start difference. First operand 163 states and 172 transitions. Second operand 56 states. [2018-02-04 00:54:12,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:54:12,476 INFO L93 Difference]: Finished difference Result 159 states and 162 transitions. [2018-02-04 00:54:12,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2018-02-04 00:54:12,476 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 111 [2018-02-04 00:54:12,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:54:12,477 INFO L225 Difference]: With dead ends: 159 [2018-02-04 00:54:12,477 INFO L226 Difference]: Without dead ends: 157 [2018-02-04 00:54:12,478 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 73 SyntacticMatches, 0 SemanticMatches, 76 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1026 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=325, Invalid=5530, Unknown=1, NotChecked=150, Total=6006 [2018-02-04 00:54:12,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-02-04 00:54:12,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 157. [2018-02-04 00:54:12,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-02-04 00:54:12,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 160 transitions. [2018-02-04 00:54:12,480 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 160 transitions. Word has length 111 [2018-02-04 00:54:12,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:54:12,480 INFO L432 AbstractCegarLoop]: Abstraction has 157 states and 160 transitions. [2018-02-04 00:54:12,480 INFO L433 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-02-04 00:54:12,480 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 160 transitions. [2018-02-04 00:54:12,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-02-04 00:54:12,480 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:54:12,481 INFO L351 BasicCegarLoop]: trace histogram [14, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:54:12,481 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:54:12,481 INFO L82 PathProgramCache]: Analyzing trace with hash 1142789455, now seen corresponding path program 1 times [2018-02-04 00:54:12,481 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:54:12,481 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:54:12,481 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:54:12,482 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:54:12,482 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:54:12,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:54:12,497 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:54:12,692 INFO L134 CoverageAnalysis]: Checked inductivity of 114 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2018-02-04 00:54:12,693 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:54:12,693 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:54:12,697 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:54:12,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:54:12,746 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:54:12,975 INFO L134 CoverageAnalysis]: Checked inductivity of 114 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-02-04 00:54:13,004 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:54:13,004 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 35 [2018-02-04 00:54:13,004 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-02-04 00:54:13,004 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-02-04 00:54:13,004 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=174, Invalid=1016, Unknown=0, NotChecked=0, Total=1190 [2018-02-04 00:54:13,005 INFO L87 Difference]: Start difference. First operand 157 states and 160 transitions. Second operand 35 states. [2018-02-04 00:54:13,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:54:13,812 INFO L93 Difference]: Finished difference Result 169 states and 172 transitions. [2018-02-04 00:54:13,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-02-04 00:54:13,813 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 119 [2018-02-04 00:54:13,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:54:13,814 INFO L225 Difference]: With dead ends: 169 [2018-02-04 00:54:13,814 INFO L226 Difference]: Without dead ends: 167 [2018-02-04 00:54:13,815 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 108 SyntacticMatches, 0 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 526 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=521, Invalid=3639, Unknown=0, NotChecked=0, Total=4160 [2018-02-04 00:54:13,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-02-04 00:54:13,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 165. [2018-02-04 00:54:13,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-02-04 00:54:13,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 168 transitions. [2018-02-04 00:54:13,817 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 168 transitions. Word has length 119 [2018-02-04 00:54:13,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:54:13,818 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 168 transitions. [2018-02-04 00:54:13,818 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-02-04 00:54:13,818 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 168 transitions. [2018-02-04 00:54:13,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-02-04 00:54:13,818 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:54:13,819 INFO L351 BasicCegarLoop]: trace histogram [15, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:54:13,819 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:54:13,819 INFO L82 PathProgramCache]: Analyzing trace with hash -577478985, now seen corresponding path program 1 times [2018-02-04 00:54:13,819 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:54:13,819 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:54:13,820 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:54:13,820 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:54:13,820 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:54:13,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:54:13,838 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:54:14,130 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 127 trivial. 0 not checked. [2018-02-04 00:54:14,130 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:54:14,130 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:54:14,137 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:54:14,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:54:14,211 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:54:14,525 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-02-04 00:54:14,542 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:54:14,542 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 19] total 39 [2018-02-04 00:54:14,543 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-02-04 00:54:14,543 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-02-04 00:54:14,543 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=195, Invalid=1287, Unknown=0, NotChecked=0, Total=1482 [2018-02-04 00:54:14,543 INFO L87 Difference]: Start difference. First operand 165 states and 168 transitions. Second operand 39 states. [2018-02-04 00:54:15,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:54:15,740 INFO L93 Difference]: Finished difference Result 169 states and 172 transitions. [2018-02-04 00:54:15,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-02-04 00:54:15,740 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 134 [2018-02-04 00:54:15,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:54:15,741 INFO L225 Difference]: With dead ends: 169 [2018-02-04 00:54:15,741 INFO L226 Difference]: Without dead ends: 167 [2018-02-04 00:54:15,742 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 194 GetRequests, 122 SyntacticMatches, 0 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 600 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=595, Invalid=4807, Unknown=0, NotChecked=0, Total=5402 [2018-02-04 00:54:15,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-02-04 00:54:15,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 165. [2018-02-04 00:54:15,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-02-04 00:54:15,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 168 transitions. [2018-02-04 00:54:15,744 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 168 transitions. Word has length 134 [2018-02-04 00:54:15,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:54:15,744 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 168 transitions. [2018-02-04 00:54:15,744 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-02-04 00:54:15,745 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 168 transitions. [2018-02-04 00:54:15,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-02-04 00:54:15,745 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:54:15,745 INFO L351 BasicCegarLoop]: trace histogram [16, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:54:15,745 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:54:15,745 INFO L82 PathProgramCache]: Analyzing trace with hash -460832411, now seen corresponding path program 1 times [2018-02-04 00:54:15,745 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:54:15,745 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:54:15,746 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:54:15,746 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:54:15,746 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:54:15,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:54:15,843 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:54:20,764 INFO L134 CoverageAnalysis]: Checked inductivity of 152 backedges. 22 proven. 129 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-02-04 00:54:20,764 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:54:20,765 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:54:20,769 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:54:20,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:54:20,829 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:54:20,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 00:54:20,920 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 00:54:20,920 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:54:20,921 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:20,924 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:20,925 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 [2018-02-04 00:54:20,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-02-04 00:54:20,982 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:20,982 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-02-04 00:54:20,982 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:54:20,986 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:20,990 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 00:54:20,991 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:36, output treesize:32 [2018-02-04 00:54:21,061 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-02-04 00:54:21,063 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,064 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,065 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,065 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 52 [2018-02-04 00:54:21,066 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:54:21,075 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:21,088 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 00:54:21,089 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:52, output treesize:48 [2018-02-04 00:54:21,204 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-02-04 00:54:21,206 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,207 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,208 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,208 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,209 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,209 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,210 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 85 [2018-02-04 00:54:21,210 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:54:21,222 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:21,232 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-02-04 00:54:21,233 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:68, output treesize:64 [2018-02-04 00:54:21,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 47 [2018-02-04 00:54:21,329 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,330 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,331 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,331 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,332 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,333 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,334 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,334 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,335 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,335 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,336 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 126 [2018-02-04 00:54:21,336 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:54:21,366 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:21,388 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-02-04 00:54:21,389 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:84, output treesize:80 [2018-02-04 00:54:21,496 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-02-04 00:54:21,499 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,499 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,500 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,500 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,501 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,502 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,502 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,503 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,503 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,504 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,504 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,505 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,505 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,506 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,506 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,507 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 175 [2018-02-04 00:54:21,508 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:54:21,531 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:21,547 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 1 xjuncts. [2018-02-04 00:54:21,547 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:100, output treesize:96 [2018-02-04 00:54:21,678 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 65 [2018-02-04 00:54:21,682 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,683 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,684 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,685 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,686 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,687 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,689 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,689 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,690 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,691 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,692 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,693 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,694 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,695 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,696 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,696 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,697 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,698 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,699 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,699 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,700 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:21,701 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 232 [2018-02-04 00:54:21,702 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:54:21,739 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:21,758 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: 6 dim-0 vars, and 1 xjuncts. [2018-02-04 00:54:21,758 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:116, output treesize:112 [2018-02-04 00:54:22,174 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 74 [2018-02-04 00:54:22,187 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,188 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,189 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,190 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,190 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,191 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,192 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,192 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,193 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,193 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,194 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,194 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,195 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,196 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,196 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,197 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,197 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,198 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,198 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,199 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,199 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,200 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,201 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,201 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,202 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,202 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,203 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,203 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:22,204 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 297 [2018-02-04 00:54:22,205 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:54:22,254 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:22,278 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 1 dim-2 vars, End of recursive call: 7 dim-0 vars, and 1 xjuncts. [2018-02-04 00:54:22,278 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 8 variables, input treesize:132, output treesize:128 [2018-02-04 00:54:26,928 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 83 [2018-02-04 00:54:26,944 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,945 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,946 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,948 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,950 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,952 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,953 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,954 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,956 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,957 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,958 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,959 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,961 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,962 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,963 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,964 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,965 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,966 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,967 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,968 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,969 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,970 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,970 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,971 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,972 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,973 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,974 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,975 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,976 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,976 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,977 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,978 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,979 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,980 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,981 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,981 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:26,982 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 370 [2018-02-04 00:54:26,983 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:54:27,049 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:27,077 INFO L267 ElimStorePlain]: Start of recursive call 1: 8 dim-0 vars, 1 dim-2 vars, End of recursive call: 8 dim-0 vars, and 1 xjuncts. [2018-02-04 00:54:27,077 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 9 variables, input treesize:148, output treesize:144 [2018-02-04 00:54:39,729 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 92 [2018-02-04 00:54:39,733 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,734 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,735 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,736 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,737 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,738 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,739 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,740 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,740 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,741 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,742 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,743 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,744 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,745 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,746 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,747 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,747 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,748 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,749 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,750 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,751 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,751 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,752 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,753 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,754 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,755 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,756 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,757 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,758 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,759 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,759 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,760 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,761 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,761 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,762 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,763 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,764 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,765 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,765 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,766 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,767 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,768 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,768 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,769 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,770 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:54:39,771 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 451 [2018-02-04 00:54:39,771 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:54:39,861 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:54:39,890 INFO L267 ElimStorePlain]: Start of recursive call 1: 9 dim-0 vars, 1 dim-2 vars, End of recursive call: 9 dim-0 vars, and 1 xjuncts. [2018-02-04 00:54:39,890 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 10 variables, input treesize:164, output treesize:160 [2018-02-04 00:55:01,001 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 101 [2018-02-04 00:55:01,015 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,016 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,023 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,024 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,024 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,025 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,026 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,027 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,028 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,028 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,029 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,030 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,031 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,031 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,032 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,033 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,034 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,034 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,035 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,036 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,039 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,040 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,040 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,041 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,042 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,042 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,043 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,043 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,044 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,045 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,045 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,046 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,046 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,047 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,048 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,048 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,049 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,049 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,050 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,050 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,051 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,052 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,052 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,053 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,053 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,054 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,055 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,056 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,056 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,057 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,058 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,058 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,059 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,059 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,060 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:01,061 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 55 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 540 [2018-02-04 00:55:01,062 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:55:01,190 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:55:01,228 INFO L267 ElimStorePlain]: Start of recursive call 1: 10 dim-0 vars, 1 dim-2 vars, End of recursive call: 10 dim-0 vars, and 1 xjuncts. [2018-02-04 00:55:01,229 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 11 variables, input treesize:180, output treesize:176 [2018-02-04 00:55:31,525 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 135 treesize of output 110 [2018-02-04 00:55:31,530 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,530 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,531 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,532 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,533 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,533 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,534 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,535 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,536 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,536 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,537 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,538 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,539 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,539 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,540 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,541 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,542 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,542 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,543 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,544 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,545 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,545 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,546 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,547 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,548 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,548 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,549 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,549 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,550 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,551 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,551 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,552 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,553 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,553 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,554 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,555 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,555 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,556 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,557 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,557 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,558 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,559 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,559 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,560 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,561 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,561 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,562 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,563 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,563 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,564 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,565 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,565 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,566 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,567 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,568 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,568 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,569 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,570 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,570 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,571 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,572 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,572 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,573 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,574 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,574 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,575 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:55:31,577 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 66 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 637 [2018-02-04 00:55:31,578 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:55:31,731 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:55:31,774 INFO L267 ElimStorePlain]: Start of recursive call 1: 11 dim-0 vars, 1 dim-2 vars, End of recursive call: 11 dim-0 vars, and 1 xjuncts. [2018-02-04 00:55:31,774 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 12 variables, input treesize:196, output treesize:192 [2018-02-04 00:56:08,361 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 119 [2018-02-04 00:56:08,365 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,366 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,366 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,367 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,368 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,368 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,369 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,369 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,370 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,371 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,371 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,372 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,373 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,373 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,374 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,374 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,375 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,376 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,376 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,377 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,377 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,378 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,379 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,379 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,380 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,381 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,381 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,382 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,382 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,383 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,384 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,384 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,385 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,385 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,386 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,387 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,387 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,388 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,388 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,389 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,390 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,390 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,391 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,391 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,392 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,393 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,393 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,394 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,395 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,395 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,396 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,396 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,397 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,398 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,398 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,399 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,399 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,400 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,401 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,401 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,402 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,402 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,403 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,404 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,404 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,405 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,406 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,406 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,407 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,407 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,408 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,409 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,409 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,410 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,410 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,411 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,412 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,412 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:08,413 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 78 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 742 [2018-02-04 00:56:08,414 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:56:08,595 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:56:08,641 INFO L267 ElimStorePlain]: Start of recursive call 1: 12 dim-0 vars, 1 dim-2 vars, End of recursive call: 12 dim-0 vars, and 1 xjuncts. [2018-02-04 00:56:08,641 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 13 variables, input treesize:212, output treesize:208 [2018-02-04 00:56:54,753 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 157 treesize of output 128 [2018-02-04 00:56:54,758 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,759 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,763 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,764 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,765 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,766 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,767 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,768 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,769 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,770 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,771 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,772 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,773 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,774 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,775 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,776 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,777 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,778 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,779 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,780 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,781 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,782 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,783 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,784 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,785 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,787 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,788 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,788 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,789 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,790 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,791 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,792 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,794 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,795 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,796 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,797 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,798 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,799 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,800 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,801 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,802 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,803 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,804 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,805 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,806 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,807 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,808 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,809 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,810 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,811 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,812 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,813 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,814 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,815 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,816 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,817 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,818 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,819 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,820 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,821 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,822 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,823 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,823 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,824 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,825 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,826 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,827 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,828 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,829 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,830 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,831 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,832 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,833 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,834 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,835 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,836 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,837 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,838 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,839 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,840 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,841 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,842 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,843 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,844 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,845 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,846 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,847 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,848 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,849 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,850 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,851 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:56:54,852 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 91 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 855 [2018-02-04 00:56:54,853 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:56:55,091 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:56:55,139 INFO L267 ElimStorePlain]: Start of recursive call 1: 13 dim-0 vars, 1 dim-2 vars, End of recursive call: 13 dim-0 vars, and 1 xjuncts. [2018-02-04 00:56:55,139 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 14 variables, input treesize:228, output treesize:224 Received shutdown request... [2018-02-04 00:57:00,971 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-02-04 00:57:00,972 WARN L491 AbstractCegarLoop]: Verification canceled [2018-02-04 00:57:00,975 WARN L185 ceAbstractionStarter]: Timeout [2018-02-04 00:57:00,975 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.02 12:57:00 BoogieIcfgContainer [2018-02-04 00:57:00,975 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-02-04 00:57:00,975 INFO L168 Benchmark]: Toolchain (without parser) took 205267.09 ms. Allocated memory was 402.7 MB in the beginning and 1.2 GB in the end (delta: 769.1 MB). Free memory was 359.3 MB in the beginning and 471.7 MB in the end (delta: -112.3 MB). Peak memory consumption was 656.8 MB. Max. memory is 5.3 GB. [2018-02-04 00:57:00,976 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 402.7 MB. Free memory is still 365.9 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-04 00:57:00,976 INFO L168 Benchmark]: CACSL2BoogieTranslator took 177.45 ms. Allocated memory is still 402.7 MB. Free memory was 359.3 MB in the beginning and 344.8 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB. [2018-02-04 00:57:00,976 INFO L168 Benchmark]: Boogie Preprocessor took 33.80 ms. Allocated memory is still 402.7 MB. Free memory was 344.8 MB in the beginning and 343.5 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. [2018-02-04 00:57:00,977 INFO L168 Benchmark]: RCFGBuilder took 385.08 ms. Allocated memory is still 402.7 MB. Free memory was 343.5 MB in the beginning and 306.4 MB in the end (delta: 37.1 MB). Peak memory consumption was 37.1 MB. Max. memory is 5.3 GB. [2018-02-04 00:57:00,977 INFO L168 Benchmark]: TraceAbstraction took 204668.00 ms. Allocated memory was 402.7 MB in the beginning and 1.2 GB in the end (delta: 769.1 MB). Free memory was 306.4 MB in the beginning and 471.7 MB in the end (delta: -165.3 MB). Peak memory consumption was 603.8 MB. Max. memory is 5.3 GB. [2018-02-04 00:57:00,977 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 402.7 MB. Free memory is still 365.9 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 177.45 ms. Allocated memory is still 402.7 MB. Free memory was 359.3 MB in the beginning and 344.8 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 33.80 ms. Allocated memory is still 402.7 MB. Free memory was 344.8 MB in the beginning and 343.5 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. * RCFGBuilder took 385.08 ms. Allocated memory is still 402.7 MB. Free memory was 343.5 MB in the beginning and 306.4 MB in the end (delta: 37.1 MB). Peak memory consumption was 37.1 MB. Max. memory is 5.3 GB. * TraceAbstraction took 204668.00 ms. Allocated memory was 402.7 MB in the beginning and 1.2 GB in the end (delta: 769.1 MB). Free memory was 306.4 MB in the beginning and 471.7 MB in the end (delta: -165.3 MB). Peak memory consumption was 603.8 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1256). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1256). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1258). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1258). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1443]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1443). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 89 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 21 procedures, 143 locations, 23 error locations. TIMEOUT Result, 204.6s OverallTime, 32 OverallIterations, 16 TraceHistogramMax, 25.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3830 SDtfs, 1230 SDslu, 34678 SDs, 0 SdLazy, 16493 SolverSat, 387 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1762 GetRequests, 1106 SyntacticMatches, 10 SemanticMatches, 646 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 4245 ImplicationChecksByTransitivity, 27.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=165occurred in iteration=30, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 31 MinimizatonAttempts, 59 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 0.7s SatisfiabilityAnalysisTime, 11.7s InterpolantComputationTime, 3201 NumberOfCodeBlocks, 3157 NumberOfCodeBlocksAsserted, 46 NumberOfCheckSat, 3155 ConstructedInterpolants, 273 QuantifiedInterpolants, 1038937 SizeOfPredicates, 112 NumberOfNonLiveVariables, 5731 ConjunctsInSsa, 562 ConjunctsInUnsatCore, 46 InterpolantComputations, 22 PerfectInterpolantSequences, 706/1588 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-04_00-57-00-982.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-04_00-57-00-982.csv Completed graceful shutdown