java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_Array.epf -i ../../../trunk/examples/svcomp/array-memsafety/cstrcat-alloca_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-ccafca9-m [2018-02-04 01:41:30,966 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-04 01:41:30,968 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-04 01:41:30,978 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-04 01:41:30,978 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-04 01:41:30,979 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-04 01:41:30,980 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-04 01:41:30,981 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-04 01:41:30,982 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-04 01:41:30,983 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-04 01:41:30,984 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-04 01:41:30,984 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-04 01:41:30,985 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-04 01:41:30,985 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-04 01:41:30,986 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-04 01:41:30,988 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-04 01:41:30,989 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-04 01:41:30,990 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-04 01:41:30,991 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-04 01:41:30,992 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-04 01:41:30,994 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-02-04 01:41:30,994 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-02-04 01:41:30,995 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-02-04 01:41:30,996 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-02-04 01:41:30,996 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-02-04 01:41:30,997 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-02-04 01:41:30,997 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-02-04 01:41:30,998 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-02-04 01:41:30,998 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-02-04 01:41:30,998 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-04 01:41:30,999 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-04 01:41:30,999 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_Array.epf [2018-02-04 01:41:31,009 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-04 01:41:31,009 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-04 01:41:31,010 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-04 01:41:31,010 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-04 01:41:31,010 INFO L133 SettingsManager]: * Use SBE=true [2018-02-04 01:41:31,011 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-04 01:41:31,011 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-04 01:41:31,011 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-04 01:41:31,011 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-04 01:41:31,011 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-04 01:41:31,011 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-04 01:41:31,012 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-04 01:41:31,012 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-04 01:41:31,012 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-02-04 01:41:31,012 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-04 01:41:31,012 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-04 01:41:31,012 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-04 01:41:31,012 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-04 01:41:31,013 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-04 01:41:31,013 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-04 01:41:31,013 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 01:41:31,013 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-04 01:41:31,013 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=Craig_TreeInterpolation [2018-02-04 01:41:31,041 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-04 01:41:31,055 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-04 01:41:31,058 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-04 01:41:31,061 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-04 01:41:31,061 INFO L276 PluginConnector]: CDTParser initialized [2018-02-04 01:41:31,062 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-memsafety/cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-02-04 01:41:31,195 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-04 01:41:31,196 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-04 01:41:31,197 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-04 01:41:31,197 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-04 01:41:31,202 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-04 01:41:31,203 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 01:41:31" (1/1) ... [2018-02-04 01:41:31,206 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7f3d6190 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:41:31, skipping insertion in model container [2018-02-04 01:41:31,206 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 01:41:31" (1/1) ... [2018-02-04 01:41:31,221 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 01:41:31,250 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 01:41:31,345 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 01:41:31,361 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 01:41:31,366 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:41:31 WrapperNode [2018-02-04 01:41:31,366 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-04 01:41:31,367 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-04 01:41:31,367 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-04 01:41:31,367 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-04 01:41:31,379 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:41:31" (1/1) ... [2018-02-04 01:41:31,379 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:41:31" (1/1) ... [2018-02-04 01:41:31,385 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:41:31" (1/1) ... [2018-02-04 01:41:31,386 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:41:31" (1/1) ... [2018-02-04 01:41:31,389 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:41:31" (1/1) ... [2018-02-04 01:41:31,391 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:41:31" (1/1) ... [2018-02-04 01:41:31,392 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:41:31" (1/1) ... [2018-02-04 01:41:31,394 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-04 01:41:31,394 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-04 01:41:31,394 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-04 01:41:31,394 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-04 01:41:31,395 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:41:31" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 01:41:31,433 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-04 01:41:31,433 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-04 01:41:31,433 INFO L136 BoogieDeclarations]: Found implementation of procedure cstrcat [2018-02-04 01:41:31,433 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-04 01:41:31,433 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-02-04 01:41:31,433 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-02-04 01:41:31,433 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-02-04 01:41:31,434 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-02-04 01:41:31,434 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-02-04 01:41:31,434 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-02-04 01:41:31,434 INFO L128 BoogieDeclarations]: Found specification of procedure cstrcat [2018-02-04 01:41:31,434 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-04 01:41:31,434 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-04 01:41:31,434 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-04 01:41:31,582 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-04 01:41:31,582 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 01:41:31 BoogieIcfgContainer [2018-02-04 01:41:31,582 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-04 01:41:31,583 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-04 01:41:31,583 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-04 01:41:31,585 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-04 01:41:31,585 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 04.02 01:41:31" (1/3) ... [2018-02-04 01:41:31,586 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5dd388f5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 01:41:31, skipping insertion in model container [2018-02-04 01:41:31,586 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:41:31" (2/3) ... [2018-02-04 01:41:31,586 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5dd388f5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 01:41:31, skipping insertion in model container [2018-02-04 01:41:31,586 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 01:41:31" (3/3) ... [2018-02-04 01:41:31,588 INFO L107 eAbstractionObserver]: Analyzing ICFG cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-02-04 01:41:31,597 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:Craig_TreeInterpolation Determinization: PREDICATE_ABSTRACTION [2018-02-04 01:41:31,604 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 11 error locations. [2018-02-04 01:41:31,631 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-04 01:41:31,631 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-04 01:41:31,631 INFO L324 AbstractCegarLoop]: Compute interpolants for Craig_TreeInterpolation [2018-02-04 01:41:31,631 INFO L325 AbstractCegarLoop]: Backedges is CANONICAL [2018-02-04 01:41:31,631 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-04 01:41:31,631 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-04 01:41:31,632 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-04 01:41:31,632 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-04 01:41:31,632 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-04 01:41:31,643 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states. [2018-02-04 01:41:31,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-02-04 01:41:31,651 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:31,652 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:31,653 INFO L371 AbstractCegarLoop]: === Iteration 1 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:31,656 INFO L82 PathProgramCache]: Analyzing trace with hash 104454547, now seen corresponding path program 1 times [2018-02-04 01:41:31,690 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:31,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:31,733 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:31,789 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:31,791 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 01:41:31,792 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-04 01:41:31,795 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:31,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:31,796 INFO L182 omatonBuilderFactory]: Interpolants [52#true, 53#false, 54#(= |#valid| |old(#valid)|)] [2018-02-04 01:41:31,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:31,797 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-04 01:41:31,808 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-04 01:41:31,809 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 01:41:31,810 INFO L87 Difference]: Start difference. First operand 49 states. Second operand 3 states. [2018-02-04 01:41:31,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:31,888 INFO L93 Difference]: Finished difference Result 50 states and 55 transitions. [2018-02-04 01:41:31,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-04 01:41:31,890 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-02-04 01:41:31,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:31,944 INFO L225 Difference]: With dead ends: 50 [2018-02-04 01:41:31,944 INFO L226 Difference]: Without dead ends: 46 [2018-02-04 01:41:31,946 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 01:41:31,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-02-04 01:41:31,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-02-04 01:41:31,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-02-04 01:41:31,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 50 transitions. [2018-02-04 01:41:31,970 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 50 transitions. Word has length 11 [2018-02-04 01:41:31,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:31,970 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 50 transitions. [2018-02-04 01:41:31,970 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-04 01:41:31,971 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 50 transitions. [2018-02-04 01:41:31,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-02-04 01:41:31,971 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:31,971 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:31,971 INFO L371 AbstractCegarLoop]: === Iteration 2 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:31,971 INFO L82 PathProgramCache]: Analyzing trace with hash 1017224676, now seen corresponding path program 1 times [2018-02-04 01:41:31,972 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:31,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:31,987 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:32,038 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,038 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 01:41:32,038 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-02-04 01:41:32,038 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:32,039 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,039 INFO L182 omatonBuilderFactory]: Interpolants [151#true, 152#false, 153#(= 1 (select |#valid| |main_#t~malloc9.base|)), 154#(= 1 (select |#valid| main_~nondetString1~0.base))] [2018-02-04 01:41:32,039 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,041 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 01:41:32,041 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 01:41:32,041 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 01:41:32,041 INFO L87 Difference]: Start difference. First operand 46 states and 50 transitions. Second operand 4 states. [2018-02-04 01:41:32,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:32,093 INFO L93 Difference]: Finished difference Result 45 states and 49 transitions. [2018-02-04 01:41:32,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 01:41:32,093 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-02-04 01:41:32,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:32,094 INFO L225 Difference]: With dead ends: 45 [2018-02-04 01:41:32,095 INFO L226 Difference]: Without dead ends: 45 [2018-02-04 01:41:32,095 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 01:41:32,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-02-04 01:41:32,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-02-04 01:41:32,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-02-04 01:41:32,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 49 transitions. [2018-02-04 01:41:32,100 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 49 transitions. Word has length 15 [2018-02-04 01:41:32,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:32,100 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 49 transitions. [2018-02-04 01:41:32,100 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 01:41:32,101 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 49 transitions. [2018-02-04 01:41:32,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-02-04 01:41:32,101 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:32,101 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:32,101 INFO L371 AbstractCegarLoop]: === Iteration 3 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:32,102 INFO L82 PathProgramCache]: Analyzing trace with hash 1017224677, now seen corresponding path program 1 times [2018-02-04 01:41:32,102 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:32,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:32,117 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:32,192 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,192 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 01:41:32,192 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 01:41:32,193 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:32,193 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,193 INFO L182 omatonBuilderFactory]: Interpolants [247#true, 248#false, 249#(<= 1 main_~length1~0), 250#(and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (<= 1 main_~length1~0) (= (select |#valid| |main_#t~malloc9.base|) 1)), 251#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~length1~0) (= main_~nondetString1~0.offset 0)), 252#(and (= (select |#length| main_~nondetString1~0.base) main_~length1~0) (<= 1 main_~length1~0) (= main_~nondetString1~0.offset 0))] [2018-02-04 01:41:32,193 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,193 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 01:41:32,194 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 01:41:32,194 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-02-04 01:41:32,194 INFO L87 Difference]: Start difference. First operand 45 states and 49 transitions. Second operand 6 states. [2018-02-04 01:41:32,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:32,258 INFO L93 Difference]: Finished difference Result 44 states and 48 transitions. [2018-02-04 01:41:32,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 01:41:32,259 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 15 [2018-02-04 01:41:32,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:32,260 INFO L225 Difference]: With dead ends: 44 [2018-02-04 01:41:32,260 INFO L226 Difference]: Without dead ends: 44 [2018-02-04 01:41:32,260 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-02-04 01:41:32,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-02-04 01:41:32,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-02-04 01:41:32,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-02-04 01:41:32,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 48 transitions. [2018-02-04 01:41:32,264 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 48 transitions. Word has length 15 [2018-02-04 01:41:32,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:32,264 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 48 transitions. [2018-02-04 01:41:32,264 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 01:41:32,264 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 48 transitions. [2018-02-04 01:41:32,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-02-04 01:41:32,265 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:32,265 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:32,265 INFO L371 AbstractCegarLoop]: === Iteration 4 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:32,265 INFO L82 PathProgramCache]: Analyzing trace with hash 1469193927, now seen corresponding path program 1 times [2018-02-04 01:41:32,266 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:32,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:32,277 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:32,301 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,301 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 01:41:32,301 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-02-04 01:41:32,301 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:32,302 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,302 INFO L182 omatonBuilderFactory]: Interpolants [343#true, 344#false, 345#(= 1 (select |#valid| |main_#t~malloc10.base|)), 346#(= 1 (select |#valid| main_~nondetString2~0.base))] [2018-02-04 01:41:32,302 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,302 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 01:41:32,302 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 01:41:32,302 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 01:41:32,303 INFO L87 Difference]: Start difference. First operand 44 states and 48 transitions. Second operand 4 states. [2018-02-04 01:41:32,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:32,340 INFO L93 Difference]: Finished difference Result 43 states and 47 transitions. [2018-02-04 01:41:32,340 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 01:41:32,341 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-02-04 01:41:32,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:32,341 INFO L225 Difference]: With dead ends: 43 [2018-02-04 01:41:32,341 INFO L226 Difference]: Without dead ends: 43 [2018-02-04 01:41:32,341 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 01:41:32,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-02-04 01:41:32,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-02-04 01:41:32,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-02-04 01:41:32,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 47 transitions. [2018-02-04 01:41:32,344 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 47 transitions. Word has length 16 [2018-02-04 01:41:32,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:32,344 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 47 transitions. [2018-02-04 01:41:32,344 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 01:41:32,344 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 47 transitions. [2018-02-04 01:41:32,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-02-04 01:41:32,344 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:32,345 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:32,345 INFO L371 AbstractCegarLoop]: === Iteration 5 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:32,345 INFO L82 PathProgramCache]: Analyzing trace with hash 1469193928, now seen corresponding path program 1 times [2018-02-04 01:41:32,345 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:32,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:32,355 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:32,407 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,408 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 01:41:32,408 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 01:41:32,408 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:32,408 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,408 INFO L182 omatonBuilderFactory]: Interpolants [435#true, 436#false, 437#(<= 2 main_~length2~0), 438#(and (<= (+ main_~length3~0 1) main_~length2~0) (<= 1 main_~length3~0)), 439#(and (= 0 |main_#t~malloc10.offset|) (<= (+ main_~length3~0 1) (select |#length| |main_#t~malloc10.base|)) (<= 1 main_~length3~0)), 440#(and (= main_~nondetString2~0.offset 0) (<= (+ main_~length3~0 1) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0))] [2018-02-04 01:41:32,409 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,409 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 01:41:32,409 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 01:41:32,409 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-02-04 01:41:32,410 INFO L87 Difference]: Start difference. First operand 43 states and 47 transitions. Second operand 6 states. [2018-02-04 01:41:32,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:32,497 INFO L93 Difference]: Finished difference Result 58 states and 62 transitions. [2018-02-04 01:41:32,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 01:41:32,497 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 16 [2018-02-04 01:41:32,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:32,499 INFO L225 Difference]: With dead ends: 58 [2018-02-04 01:41:32,499 INFO L226 Difference]: Without dead ends: 58 [2018-02-04 01:41:32,499 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2018-02-04 01:41:32,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-02-04 01:41:32,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 50. [2018-02-04 01:41:32,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-02-04 01:41:32,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2018-02-04 01:41:32,507 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 54 transitions. Word has length 16 [2018-02-04 01:41:32,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:32,508 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 54 transitions. [2018-02-04 01:41:32,508 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 01:41:32,508 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 54 transitions. [2018-02-04 01:41:32,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-02-04 01:41:32,508 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:32,508 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:32,508 INFO L371 AbstractCegarLoop]: === Iteration 6 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:32,509 INFO L82 PathProgramCache]: Analyzing trace with hash 659847302, now seen corresponding path program 1 times [2018-02-04 01:41:32,509 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:32,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:32,519 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:32,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,568 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 01:41:32,568 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 01:41:32,568 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:32,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,568 INFO L182 omatonBuilderFactory]: Interpolants [560#(and (= 0 |main_#t~malloc10.offset|) (<= (+ main_~length3~0 1) (select |#length| |main_#t~malloc10.base|)) (<= 1 main_~length3~0)), 561#(and (= main_~nondetString2~0.offset 0) (<= (+ main_~length3~0 1) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0)), 555#true, 556#false, 557#(<= 1 main_~length1~0), 558#(and (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 559#(and (<= (+ main_~length3~0 1) main_~length2~0) (<= 1 main_~length3~0))] [2018-02-04 01:41:32,569 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,569 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 01:41:32,569 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 01:41:32,569 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-02-04 01:41:32,569 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. Second operand 7 states. [2018-02-04 01:41:32,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:32,662 INFO L93 Difference]: Finished difference Result 49 states and 53 transitions. [2018-02-04 01:41:32,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 01:41:32,662 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 16 [2018-02-04 01:41:32,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:32,662 INFO L225 Difference]: With dead ends: 49 [2018-02-04 01:41:32,662 INFO L226 Difference]: Without dead ends: 49 [2018-02-04 01:41:32,663 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2018-02-04 01:41:32,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-02-04 01:41:32,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 42. [2018-02-04 01:41:32,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-02-04 01:41:32,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 46 transitions. [2018-02-04 01:41:32,665 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 46 transitions. Word has length 16 [2018-02-04 01:41:32,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:32,666 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 46 transitions. [2018-02-04 01:41:32,666 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 01:41:32,666 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 46 transitions. [2018-02-04 01:41:32,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-02-04 01:41:32,666 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:32,666 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:32,666 INFO L371 AbstractCegarLoop]: === Iteration 7 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:32,667 INFO L82 PathProgramCache]: Analyzing trace with hash -262056781, now seen corresponding path program 1 times [2018-02-04 01:41:32,667 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:32,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:32,680 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:32,696 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,696 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 01:41:32,696 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-04 01:41:32,696 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:32,696 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,697 INFO L182 omatonBuilderFactory]: Interpolants [661#true, 662#false, 663#(= 1 (select |#valid| main_~nondetString2~0.base)), 664#(= 1 (select |#valid| |cstrcat_#in~s1.base|)), 665#(= 1 (select |#valid| cstrcat_~s~0.base))] [2018-02-04 01:41:32,697 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,697 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 01:41:32,697 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 01:41:32,697 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 01:41:32,697 INFO L87 Difference]: Start difference. First operand 42 states and 46 transitions. Second operand 5 states. [2018-02-04 01:41:32,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:32,730 INFO L93 Difference]: Finished difference Result 41 states and 45 transitions. [2018-02-04 01:41:32,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 01:41:32,730 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2018-02-04 01:41:32,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:32,730 INFO L225 Difference]: With dead ends: 41 [2018-02-04 01:41:32,730 INFO L226 Difference]: Without dead ends: 41 [2018-02-04 01:41:32,731 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-02-04 01:41:32,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-02-04 01:41:32,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-02-04 01:41:32,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-02-04 01:41:32,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 45 transitions. [2018-02-04 01:41:32,732 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 45 transitions. Word has length 20 [2018-02-04 01:41:32,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:32,733 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 45 transitions. [2018-02-04 01:41:32,733 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 01:41:32,733 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 45 transitions. [2018-02-04 01:41:32,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-02-04 01:41:32,733 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:32,733 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:32,733 INFO L371 AbstractCegarLoop]: === Iteration 8 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:32,733 INFO L82 PathProgramCache]: Analyzing trace with hash -262056780, now seen corresponding path program 1 times [2018-02-04 01:41:32,734 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:32,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:32,746 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:32,799 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,799 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 01:41:32,799 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 01:41:32,799 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:32,800 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,800 INFO L182 omatonBuilderFactory]: Interpolants [752#(<= 2 main_~length2~0), 753#(and (<= 2 (select |#length| |main_#t~malloc10.base|)) (= 0 |main_#t~malloc10.offset|)), 754#(and (= 0 main_~nondetString2~0.offset) (<= 2 (select |#length| main_~nondetString2~0.base))), 755#(and (<= 2 (select |#length| |cstrcat_#in~s1.base|)) (= 0 |cstrcat_#in~s1.offset|)), 756#(and (<= 2 (select |#length| cstrcat_~s~0.base)) (= cstrcat_~s~0.offset 0)), 750#true, 751#false] [2018-02-04 01:41:32,800 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,800 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 01:41:32,800 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 01:41:32,800 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 01:41:32,800 INFO L87 Difference]: Start difference. First operand 41 states and 45 transitions. Second operand 7 states. [2018-02-04 01:41:32,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:32,885 INFO L93 Difference]: Finished difference Result 46 states and 51 transitions. [2018-02-04 01:41:32,885 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 01:41:32,885 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 20 [2018-02-04 01:41:32,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:32,885 INFO L225 Difference]: With dead ends: 46 [2018-02-04 01:41:32,885 INFO L226 Difference]: Without dead ends: 46 [2018-02-04 01:41:32,886 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2018-02-04 01:41:32,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-02-04 01:41:32,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 43. [2018-02-04 01:41:32,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-02-04 01:41:32,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 47 transitions. [2018-02-04 01:41:32,887 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 47 transitions. Word has length 20 [2018-02-04 01:41:32,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:32,888 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 47 transitions. [2018-02-04 01:41:32,888 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 01:41:32,888 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 47 transitions. [2018-02-04 01:41:32,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-02-04 01:41:32,888 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:32,888 INFO L351 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:32,888 INFO L371 AbstractCegarLoop]: === Iteration 9 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:32,888 INFO L82 PathProgramCache]: Analyzing trace with hash 1316966177, now seen corresponding path program 1 times [2018-02-04 01:41:32,889 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:32,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:32,901 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:32,964 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,964 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:32,964 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2018-02-04 01:41:32,964 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:32,964 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,965 INFO L182 omatonBuilderFactory]: Interpolants [854#true, 855#false, 856#(<= 2 main_~length2~0), 857#(and (<= 2 (select |#length| |main_#t~malloc10.base|)) (= 0 |main_#t~malloc10.offset|)), 858#(and (= 0 main_~nondetString2~0.offset) (<= 2 (select |#length| main_~nondetString2~0.base))), 859#(and (<= 2 (select |#length| |cstrcat_#in~s1.base|)) (= 0 |cstrcat_#in~s1.offset|)), 860#(and (<= 2 (select |#length| cstrcat_~s~0.base)) (= cstrcat_~s~0.offset 0)), 861#(and (<= 1 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))] [2018-02-04 01:41:32,965 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:32,965 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 01:41:32,965 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 01:41:32,965 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-04 01:41:32,965 INFO L87 Difference]: Start difference. First operand 43 states and 47 transitions. Second operand 8 states. [2018-02-04 01:41:33,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:33,067 INFO L93 Difference]: Finished difference Result 61 states and 68 transitions. [2018-02-04 01:41:33,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 01:41:33,067 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 23 [2018-02-04 01:41:33,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:33,069 INFO L225 Difference]: With dead ends: 61 [2018-02-04 01:41:33,069 INFO L226 Difference]: Without dead ends: 61 [2018-02-04 01:41:33,070 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=120, Unknown=0, NotChecked=0, Total=156 [2018-02-04 01:41:33,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-02-04 01:41:33,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 46. [2018-02-04 01:41:33,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-02-04 01:41:33,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 51 transitions. [2018-02-04 01:41:33,072 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 51 transitions. Word has length 23 [2018-02-04 01:41:33,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:33,073 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 51 transitions. [2018-02-04 01:41:33,073 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 01:41:33,073 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 51 transitions. [2018-02-04 01:41:33,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-02-04 01:41:33,073 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:33,073 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:33,074 INFO L371 AbstractCegarLoop]: === Iteration 10 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:33,074 INFO L82 PathProgramCache]: Analyzing trace with hash -2123766212, now seen corresponding path program 1 times [2018-02-04 01:41:33,074 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:33,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:33,082 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:33,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:33,113 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 01:41:33,113 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 01:41:33,113 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:33,114 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:33,114 INFO L182 omatonBuilderFactory]: Interpolants [979#true, 980#false, 981#(= 1 (select |#valid| main_~nondetString1~0.base)), 982#(= 1 (select |#valid| |cstrcat_#in~s2.base|)), 983#(= 1 (select |#valid| cstrcat_~s2.base)), 984#(= 1 (select |#valid| |cstrcat_#t~post3.base|))] [2018-02-04 01:41:33,114 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:33,114 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 01:41:33,114 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 01:41:33,114 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 01:41:33,115 INFO L87 Difference]: Start difference. First operand 46 states and 51 transitions. Second operand 6 states. [2018-02-04 01:41:33,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:33,165 INFO L93 Difference]: Finished difference Result 45 states and 50 transitions. [2018-02-04 01:41:33,165 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 01:41:33,165 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 24 [2018-02-04 01:41:33,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:33,166 INFO L225 Difference]: With dead ends: 45 [2018-02-04 01:41:33,166 INFO L226 Difference]: Without dead ends: 45 [2018-02-04 01:41:33,166 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-02-04 01:41:33,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-02-04 01:41:33,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-02-04 01:41:33,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-02-04 01:41:33,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 50 transitions. [2018-02-04 01:41:33,169 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 50 transitions. Word has length 24 [2018-02-04 01:41:33,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:33,169 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 50 transitions. [2018-02-04 01:41:33,169 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 01:41:33,169 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 50 transitions. [2018-02-04 01:41:33,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-02-04 01:41:33,170 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:33,170 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:33,170 INFO L371 AbstractCegarLoop]: === Iteration 11 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:33,170 INFO L82 PathProgramCache]: Analyzing trace with hash -2123766211, now seen corresponding path program 1 times [2018-02-04 01:41:33,171 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:33,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:33,178 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:33,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:33,261 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 01:41:33,261 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-02-04 01:41:33,261 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:33,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:33,262 INFO L182 omatonBuilderFactory]: Interpolants [1079#true, 1080#false, 1081#(<= 1 main_~length1~0), 1082#(and (= 0 |main_#t~malloc9.offset|) (<= 1 main_~length1~0)), 1083#(and (<= 1 main_~length1~0) (= main_~nondetString1~0.offset 0)), 1084#(and (<= (+ main_~nondetString1~0.offset 1) (select |#length| main_~nondetString1~0.base)) (= main_~nondetString1~0.offset 0)), 1085#(and (= 0 |cstrcat_#in~s2.offset|) (<= 1 (select |#length| |cstrcat_#in~s2.base|))), 1086#(and (= 0 cstrcat_~s2.offset) (<= 1 (select |#length| cstrcat_~s2.base))), 1087#(and (= |cstrcat_#t~post3.offset| 0) (<= 1 (select |#length| |cstrcat_#t~post3.base|)))] [2018-02-04 01:41:33,262 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:33,262 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-02-04 01:41:33,262 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-02-04 01:41:33,262 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-02-04 01:41:33,262 INFO L87 Difference]: Start difference. First operand 45 states and 50 transitions. Second operand 9 states. [2018-02-04 01:41:33,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:33,334 INFO L93 Difference]: Finished difference Result 52 states and 58 transitions. [2018-02-04 01:41:33,334 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 01:41:33,334 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 24 [2018-02-04 01:41:33,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:33,334 INFO L225 Difference]: With dead ends: 52 [2018-02-04 01:41:33,334 INFO L226 Difference]: Without dead ends: 52 [2018-02-04 01:41:33,335 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2018-02-04 01:41:33,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-02-04 01:41:33,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 48. [2018-02-04 01:41:33,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-02-04 01:41:33,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 53 transitions. [2018-02-04 01:41:33,338 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 53 transitions. Word has length 24 [2018-02-04 01:41:33,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:33,338 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 53 transitions. [2018-02-04 01:41:33,338 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-02-04 01:41:33,338 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 53 transitions. [2018-02-04 01:41:33,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-02-04 01:41:33,339 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:33,339 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:33,339 INFO L371 AbstractCegarLoop]: === Iteration 12 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:33,339 INFO L82 PathProgramCache]: Analyzing trace with hash -1412243135, now seen corresponding path program 1 times [2018-02-04 01:41:33,341 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:33,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:33,350 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:33,395 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:33,395 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 01:41:33,395 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 01:41:33,395 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:33,396 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:33,396 INFO L182 omatonBuilderFactory]: Interpolants [1200#(= 1 (select |#valid| main_~nondetString2~0.base)), 1201#(= 1 (select |#valid| |cstrcat_#in~s1.base|)), 1202#(= 1 (select |#valid| cstrcat_~s~0.base)), 1203#(= 1 (select |#valid| |cstrcat_#t~post2.base|)), 1198#true, 1199#false] [2018-02-04 01:41:33,396 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:33,396 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 01:41:33,396 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 01:41:33,397 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 01:41:33,397 INFO L87 Difference]: Start difference. First operand 48 states and 53 transitions. Second operand 6 states. [2018-02-04 01:41:33,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:33,454 INFO L93 Difference]: Finished difference Result 47 states and 52 transitions. [2018-02-04 01:41:33,454 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 01:41:33,454 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-02-04 01:41:33,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:33,455 INFO L225 Difference]: With dead ends: 47 [2018-02-04 01:41:33,455 INFO L226 Difference]: Without dead ends: 47 [2018-02-04 01:41:33,455 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-02-04 01:41:33,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-02-04 01:41:33,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-02-04 01:41:33,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-02-04 01:41:33,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 52 transitions. [2018-02-04 01:41:33,458 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 52 transitions. Word has length 25 [2018-02-04 01:41:33,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:33,458 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 52 transitions. [2018-02-04 01:41:33,458 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 01:41:33,458 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 52 transitions. [2018-02-04 01:41:33,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-02-04 01:41:33,459 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:33,459 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:33,459 INFO L371 AbstractCegarLoop]: === Iteration 13 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:33,459 INFO L82 PathProgramCache]: Analyzing trace with hash -1412243134, now seen corresponding path program 1 times [2018-02-04 01:41:33,460 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:33,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:33,467 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:33,519 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:33,519 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 01:41:33,519 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 01:41:33,520 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:33,520 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:33,520 INFO L182 omatonBuilderFactory]: Interpolants [1302#true, 1303#false, 1304#(<= 2 main_~length2~0), 1305#(and (<= 2 (select |#length| |main_#t~malloc10.base|)) (= 0 |main_#t~malloc10.offset|)), 1306#(and (= 0 main_~nondetString2~0.offset) (<= 2 (select |#length| main_~nondetString2~0.base))), 1307#(and (<= 2 (select |#length| |cstrcat_#in~s1.base|)) (= 0 |cstrcat_#in~s1.offset|)), 1308#(and (<= 2 (select |#length| cstrcat_~s~0.base)) (= cstrcat_~s~0.offset 0)), 1309#(and (<= 0 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 2) (select |#length| |cstrcat_#t~post2.base|)))] [2018-02-04 01:41:33,520 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:33,520 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 01:41:33,520 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 01:41:33,520 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-04 01:41:33,520 INFO L87 Difference]: Start difference. First operand 47 states and 52 transitions. Second operand 8 states. [2018-02-04 01:41:33,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:33,596 INFO L93 Difference]: Finished difference Result 52 states and 58 transitions. [2018-02-04 01:41:33,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 01:41:33,596 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 25 [2018-02-04 01:41:33,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:33,597 INFO L225 Difference]: With dead ends: 52 [2018-02-04 01:41:33,597 INFO L226 Difference]: Without dead ends: 52 [2018-02-04 01:41:33,597 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=120, Unknown=0, NotChecked=0, Total=156 [2018-02-04 01:41:33,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-02-04 01:41:33,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 51. [2018-02-04 01:41:33,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-02-04 01:41:33,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 56 transitions. [2018-02-04 01:41:33,599 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 56 transitions. Word has length 25 [2018-02-04 01:41:33,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:33,599 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 56 transitions. [2018-02-04 01:41:33,599 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 01:41:33,599 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 56 transitions. [2018-02-04 01:41:33,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-02-04 01:41:33,600 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:33,600 INFO L351 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:33,600 INFO L371 AbstractCegarLoop]: === Iteration 14 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:33,600 INFO L82 PathProgramCache]: Analyzing trace with hash -786914924, now seen corresponding path program 2 times [2018-02-04 01:41:33,601 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:33,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:33,607 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:33,677 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 01:41:33,677 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 01:41:33,677 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 01:41:33,677 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:33,677 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:33,677 INFO L182 omatonBuilderFactory]: Interpolants [1424#false, 1425#(and (<= 1 main_~length3~0) (<= main_~length3~0 1)), 1426#(and (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= main_~length3~0 1)), 1427#(and (= main_~nondetString2~0.offset 0) (<= 1 main_~length3~0) (<= main_~length3~0 1)), 1428#(and (= main_~nondetString2~0.offset 0) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset))), 1429#(= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)), 1430#(= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)), 1431#(= |cstrcat_#t~mem0| 0), 1423#true] [2018-02-04 01:41:33,678 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 01:41:33,678 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-02-04 01:41:33,678 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-02-04 01:41:33,678 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-02-04 01:41:33,678 INFO L87 Difference]: Start difference. First operand 51 states and 56 transitions. Second operand 9 states. [2018-02-04 01:41:33,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:33,738 INFO L93 Difference]: Finished difference Result 74 states and 79 transitions. [2018-02-04 01:41:33,738 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 01:41:33,738 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 26 [2018-02-04 01:41:33,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:33,739 INFO L225 Difference]: With dead ends: 74 [2018-02-04 01:41:33,739 INFO L226 Difference]: Without dead ends: 74 [2018-02-04 01:41:33,740 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2018-02-04 01:41:33,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2018-02-04 01:41:33,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 63. [2018-02-04 01:41:33,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-02-04 01:41:33,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 69 transitions. [2018-02-04 01:41:33,743 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 69 transitions. Word has length 26 [2018-02-04 01:41:33,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:33,743 INFO L432 AbstractCegarLoop]: Abstraction has 63 states and 69 transitions. [2018-02-04 01:41:33,744 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-02-04 01:41:33,744 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 69 transitions. [2018-02-04 01:41:33,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-02-04 01:41:33,744 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:33,744 INFO L351 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:33,744 INFO L371 AbstractCegarLoop]: === Iteration 15 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:33,745 INFO L82 PathProgramCache]: Analyzing trace with hash 1513907666, now seen corresponding path program 1 times [2018-02-04 01:41:33,745 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:33,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:33,754 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:33,874 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 01:41:33,874 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 01:41:33,874 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-02-04 01:41:33,875 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:33,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:33,875 INFO L182 omatonBuilderFactory]: Interpolants [1584#(and (= main_~nondetString2~0.offset 0) (<= 1 main_~length3~0) (<= main_~length3~0 1)), 1585#(and (= main_~nondetString2~0.offset 0) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset))), 1586#(= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)), 1587#(= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)), 1588#(= |cstrcat_#t~mem0| 0), 1577#true, 1578#false, 1579#(<= 1 main_~length1~0), 1580#(<= main_~length2~0 (+ main_~length1~0 1)), 1581#(and (<= main_~length2~0 (+ main_~length1~0 1)) (<= 1 main_~length3~0)), 1582#(and (<= 1 main_~length3~0) (<= main_~length3~0 1)), 1583#(and (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= main_~length3~0 1))] [2018-02-04 01:41:33,875 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 01:41:33,876 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-04 01:41:33,876 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-04 01:41:33,876 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2018-02-04 01:41:33,876 INFO L87 Difference]: Start difference. First operand 63 states and 69 transitions. Second operand 12 states. [2018-02-04 01:41:34,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:34,118 INFO L93 Difference]: Finished difference Result 102 states and 109 transitions. [2018-02-04 01:41:34,118 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-04 01:41:34,118 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 26 [2018-02-04 01:41:34,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:34,118 INFO L225 Difference]: With dead ends: 102 [2018-02-04 01:41:34,119 INFO L226 Difference]: Without dead ends: 102 [2018-02-04 01:41:34,119 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=150, Invalid=500, Unknown=0, NotChecked=0, Total=650 [2018-02-04 01:41:34,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-02-04 01:41:34,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 64. [2018-02-04 01:41:34,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-02-04 01:41:34,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 71 transitions. [2018-02-04 01:41:34,122 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 71 transitions. Word has length 26 [2018-02-04 01:41:34,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:34,123 INFO L432 AbstractCegarLoop]: Abstraction has 64 states and 71 transitions. [2018-02-04 01:41:34,123 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-04 01:41:34,123 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 71 transitions. [2018-02-04 01:41:34,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-02-04 01:41:34,123 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:34,123 INFO L351 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:34,123 INFO L371 AbstractCegarLoop]: === Iteration 16 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:34,124 INFO L82 PathProgramCache]: Analyzing trace with hash -175036076, now seen corresponding path program 1 times [2018-02-04 01:41:34,124 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:34,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:34,133 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:34,290 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:34,291 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:34,291 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12] total 12 [2018-02-04 01:41:34,291 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:34,291 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:34,292 INFO L182 omatonBuilderFactory]: Interpolants [1792#(and (or (<= 3 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))) (= cstrcat_~s~0.offset 0)), 1793#(and (= cstrcat_~s~0.offset 0) (or (<= 3 (select |#length| cstrcat_~s~0.base)) (= |cstrcat_#t~mem0| 0))), 1794#(and (<= 1 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))), 1795#(and (<= 2 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))), 1783#true, 1784#false, 1785#(<= 1 main_~length1~0), 1786#(and (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 1787#(and (<= (+ main_~length3~0 1) main_~length2~0) (<= 1 main_~length3~0)), 1788#(and (= 0 |main_#t~malloc10.offset|) (<= (+ main_~length3~0 1) (select |#length| |main_#t~malloc10.base|)) (<= 1 main_~length3~0)), 1789#(and (= 0 main_~nondetString2~0.offset) (<= 1 main_~length3~0) (or (<= (+ main_~nondetString2~0.offset main_~length3~0) 1) (<= (+ main_~length3~0 1) (select |#length| main_~nondetString2~0.base)))), 1790#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (<= 3 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))))), 1791#(and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (<= 3 (select |#length| |cstrcat_#in~s1.base|))) (= 0 |cstrcat_#in~s1.offset|))] [2018-02-04 01:41:34,292 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:34,292 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-04 01:41:34,292 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-04 01:41:34,292 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2018-02-04 01:41:34,292 INFO L87 Difference]: Start difference. First operand 64 states and 71 transitions. Second operand 13 states. [2018-02-04 01:41:34,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:34,586 INFO L93 Difference]: Finished difference Result 83 states and 93 transitions. [2018-02-04 01:41:34,586 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-04 01:41:34,586 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 26 [2018-02-04 01:41:34,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:34,587 INFO L225 Difference]: With dead ends: 83 [2018-02-04 01:41:34,587 INFO L226 Difference]: Without dead ends: 83 [2018-02-04 01:41:34,588 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=83, Invalid=379, Unknown=0, NotChecked=0, Total=462 [2018-02-04 01:41:34,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-02-04 01:41:34,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 75. [2018-02-04 01:41:34,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-02-04 01:41:34,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 85 transitions. [2018-02-04 01:41:34,591 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 85 transitions. Word has length 26 [2018-02-04 01:41:34,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:34,592 INFO L432 AbstractCegarLoop]: Abstraction has 75 states and 85 transitions. [2018-02-04 01:41:34,592 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-04 01:41:34,592 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 85 transitions. [2018-02-04 01:41:34,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-02-04 01:41:34,593 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:34,593 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:34,593 INFO L371 AbstractCegarLoop]: === Iteration 17 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:34,593 INFO L82 PathProgramCache]: Analyzing trace with hash -707331403, now seen corresponding path program 1 times [2018-02-04 01:41:34,594 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:34,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:34,601 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:34,684 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:34,684 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:34,685 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8] total 8 [2018-02-04 01:41:34,685 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:34,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:34,685 INFO L182 omatonBuilderFactory]: Interpolants [1972#true, 1973#false, 1974#(<= 2 main_~length2~0), 1975#(and (<= 2 (select |#length| |main_#t~malloc10.base|)) (= 0 |main_#t~malloc10.offset|)), 1976#(and (= 0 main_~nondetString2~0.offset) (<= 2 (select |#length| main_~nondetString2~0.base))), 1977#(and (<= 2 (select |#length| |cstrcat_#in~s1.base|)) (= 0 |cstrcat_#in~s1.offset|)), 1978#(and (<= 2 (select |#length| cstrcat_~s~0.base)) (= cstrcat_~s~0.offset 0)), 1979#(and (<= 1 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))), 1980#(and (<= 1 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|)))] [2018-02-04 01:41:34,685 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:34,685 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-02-04 01:41:34,685 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-02-04 01:41:34,685 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-02-04 01:41:34,686 INFO L87 Difference]: Start difference. First operand 75 states and 85 transitions. Second operand 9 states. [2018-02-04 01:41:34,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:34,791 INFO L93 Difference]: Finished difference Result 85 states and 97 transitions. [2018-02-04 01:41:34,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 01:41:34,791 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 28 [2018-02-04 01:41:34,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:34,792 INFO L225 Difference]: With dead ends: 85 [2018-02-04 01:41:34,792 INFO L226 Difference]: Without dead ends: 85 [2018-02-04 01:41:34,792 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=168, Unknown=0, NotChecked=0, Total=210 [2018-02-04 01:41:34,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-02-04 01:41:34,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 80. [2018-02-04 01:41:34,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-02-04 01:41:34,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 91 transitions. [2018-02-04 01:41:34,794 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 91 transitions. Word has length 28 [2018-02-04 01:41:34,794 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:34,794 INFO L432 AbstractCegarLoop]: Abstraction has 80 states and 91 transitions. [2018-02-04 01:41:34,794 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-02-04 01:41:34,794 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 91 transitions. [2018-02-04 01:41:34,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-02-04 01:41:34,795 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:34,795 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:34,795 INFO L371 AbstractCegarLoop]: === Iteration 18 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:34,795 INFO L82 PathProgramCache]: Analyzing trace with hash -653260906, now seen corresponding path program 1 times [2018-02-04 01:41:34,795 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:34,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:34,803 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:34,996 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:34,996 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 01:41:34,997 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-02-04 01:41:34,997 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:34,997 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:34,997 INFO L182 omatonBuilderFactory]: Interpolants [2158#true, 2159#false, 2160#(<= 1 main_~length1~0), 2161#(and (<= 1 main_~length1~0) (<= main_~length2~0 2)), 2162#(and (<= main_~length2~0 (+ main_~length3~0 1)) (<= 1 main_~length1~0)), 2163#(and (<= 1 main_~length1~0) (<= main_~length1~0 1)), 2164#(and (= 0 |main_#t~malloc9.offset|) (<= 1 main_~length1~0) (= (select |#valid| |main_#t~malloc9.base|) 1) (<= main_~length1~0 1)), 2165#(and (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~length1~0) (<= main_~length1~0 1) (= main_~nondetString1~0.offset 0)), 2166#(and (not (= main_~nondetString1~0.base |main_#t~malloc10.base|)) (<= 1 main_~length1~0) (<= main_~length1~0 1) (= main_~nondetString1~0.offset 0)), 2167#(and (<= 1 main_~length1~0) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (<= main_~length1~0 1) (= main_~nondetString1~0.offset 0)), 2168#(and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset main_~length3~0 (- 1)) 0)) main_~nondetString1~0.base) main_~nondetString1~0.offset)) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 2169#(= 0 (select (select |#memory_int| |cstrcat_#in~s2.base|) |cstrcat_#in~s2.offset|)), 2170#(= 0 (select (select |#memory_int| cstrcat_~s2.base) cstrcat_~s2.offset)), 2171#(= 0 (select (select |#memory_int| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|)), 2172#(= |cstrcat_#t~mem5| 0)] [2018-02-04 01:41:34,997 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:34,997 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-04 01:41:34,998 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-04 01:41:34,998 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2018-02-04 01:41:34,998 INFO L87 Difference]: Start difference. First operand 80 states and 91 transitions. Second operand 15 states. [2018-02-04 01:41:35,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:35,435 INFO L93 Difference]: Finished difference Result 161 states and 178 transitions. [2018-02-04 01:41:35,436 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-02-04 01:41:35,436 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 29 [2018-02-04 01:41:35,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:35,437 INFO L225 Difference]: With dead ends: 161 [2018-02-04 01:41:35,437 INFO L226 Difference]: Without dead ends: 161 [2018-02-04 01:41:35,438 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 197 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=233, Invalid=889, Unknown=0, NotChecked=0, Total=1122 [2018-02-04 01:41:35,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-02-04 01:41:35,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 134. [2018-02-04 01:41:35,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-02-04 01:41:35,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 153 transitions. [2018-02-04 01:41:35,442 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 153 transitions. Word has length 29 [2018-02-04 01:41:35,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:35,442 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 153 transitions. [2018-02-04 01:41:35,442 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-04 01:41:35,443 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 153 transitions. [2018-02-04 01:41:35,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-02-04 01:41:35,443 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:35,444 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:35,444 INFO L371 AbstractCegarLoop]: === Iteration 19 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:35,444 INFO L82 PathProgramCache]: Analyzing trace with hash -434406188, now seen corresponding path program 1 times [2018-02-04 01:41:35,444 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:35,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:35,453 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:35,656 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:35,656 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:35,656 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13] total 13 [2018-02-04 01:41:35,656 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:35,656 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:35,656 INFO L182 omatonBuilderFactory]: Interpolants [2506#true, 2507#false, 2508#(<= 1 main_~length1~0), 2509#(and (= 0 |main_#t~malloc9.offset|) (<= 1 main_~length1~0) (= (select |#valid| |main_#t~malloc9.base|) 1)), 2510#(and (or (not (= (+ main_~nondetString1~0.offset main_~length1~0) 1)) (= (select |#valid| main_~nondetString1~0.base) 1)) (<= 1 main_~length1~0) (= main_~nondetString1~0.offset 0)), 2511#(and (<= 1 main_~length1~0) (or (not (= (+ main_~nondetString1~0.offset main_~length1~0) 1)) (not (= main_~nondetString1~0.base |main_#t~malloc10.base|))) (= main_~nondetString1~0.offset 0)), 2512#(and (or (not (= (+ main_~nondetString1~0.offset main_~length1~0) 1)) (not (= main_~nondetString1~0.base main_~nondetString2~0.base))) (<= 1 main_~length1~0) (= main_~nondetString1~0.offset 0)), 2513#(and (= 0 main_~nondetString1~0.offset) (or (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset main_~length3~0 (- 1)) 0)) main_~nondetString1~0.base) main_~nondetString1~0.offset)) (not (= main_~nondetString1~0.base main_~nondetString2~0.base))) (<= 2 (select |#length| main_~nondetString1~0.base)))), 2514#(and (= 0 |cstrcat_#in~s2.offset|) (or (<= 2 (select |#length| |cstrcat_#in~s2.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s2.base|) |cstrcat_#in~s2.offset|)))), 2515#(and (or (<= 2 (select |#length| cstrcat_~s2.base)) (= 0 (select (select |#memory_int| cstrcat_~s2.base) cstrcat_~s2.offset))) (= 0 cstrcat_~s2.offset)), 2516#(and (or (and (<= (+ cstrcat_~s2.offset 1) (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|)) (<= (+ |cstrcat_#t~post3.offset| 1) cstrcat_~s2.offset)) (= 0 (select (select |#memory_int| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|))) (= |cstrcat_#t~post3.offset| 0) (= |cstrcat_#t~post3.base| cstrcat_~s2.base)), 2517#(or (= |cstrcat_#t~mem5| 0) (and (<= (+ cstrcat_~s2.offset 1) (select |#length| cstrcat_~s2.base)) (<= 1 cstrcat_~s2.offset))), 2518#(and (<= (+ cstrcat_~s2.offset 1) (select |#length| cstrcat_~s2.base)) (<= 1 cstrcat_~s2.offset)), 2519#(and (<= 1 |cstrcat_#t~post3.offset|) (<= (+ |cstrcat_#t~post3.offset| 1) (select |#length| |cstrcat_#t~post3.base|)))] [2018-02-04 01:41:35,657 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:35,657 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-02-04 01:41:35,657 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-02-04 01:41:35,657 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=152, Unknown=0, NotChecked=0, Total=182 [2018-02-04 01:41:35,657 INFO L87 Difference]: Start difference. First operand 134 states and 153 transitions. Second operand 14 states. [2018-02-04 01:41:35,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:35,903 INFO L93 Difference]: Finished difference Result 143 states and 163 transitions. [2018-02-04 01:41:35,903 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-02-04 01:41:35,904 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 29 [2018-02-04 01:41:35,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:35,905 INFO L225 Difference]: With dead ends: 143 [2018-02-04 01:41:35,905 INFO L226 Difference]: Without dead ends: 143 [2018-02-04 01:41:35,905 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=88, Invalid=418, Unknown=0, NotChecked=0, Total=506 [2018-02-04 01:41:35,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-02-04 01:41:35,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 139. [2018-02-04 01:41:35,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-02-04 01:41:35,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 159 transitions. [2018-02-04 01:41:35,914 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 159 transitions. Word has length 29 [2018-02-04 01:41:35,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:35,914 INFO L432 AbstractCegarLoop]: Abstraction has 139 states and 159 transitions. [2018-02-04 01:41:35,914 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-02-04 01:41:35,914 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 159 transitions. [2018-02-04 01:41:35,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-02-04 01:41:35,914 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:35,915 INFO L351 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:35,915 INFO L371 AbstractCegarLoop]: === Iteration 20 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:35,915 INFO L82 PathProgramCache]: Analyzing trace with hash -409487743, now seen corresponding path program 2 times [2018-02-04 01:41:35,915 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:35,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:35,925 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:36,402 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:36,403 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:36,403 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18] total 18 [2018-02-04 01:41:36,403 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:36,403 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:36,403 INFO L182 omatonBuilderFactory]: Interpolants [2820#true, 2821#false, 2822#(<= 1 main_~length1~0), 2823#(and (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 2824#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 2825#(and (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 2826#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (= main_~nondetString1~0.offset 0)), 2827#(and (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|)) (= main_~nondetString1~0.offset 0)), 2828#(and (= 0 main_~nondetString2~0.offset) (or (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= (+ main_~nondetString2~0.offset main_~length3~0) 2)) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (or (not (= (+ main_~nondetString2~0.offset main_~length3~0) 2)) (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base))) (= main_~nondetString1~0.offset 0)), 2829#(and (or (and (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (<= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (or (not (= (+ main_~nondetString2~0.offset main_~length3~0) 2)) (= (+ main_~length3~0 1) (select |#length| main_~nondetString2~0.base)))) (<= 4 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) (* 2 main_~nondetString1~0.offset)))) (= 0 main_~nondetString2~0.offset) (<= 1 main_~length3~0) (= main_~nondetString1~0.offset 0)), 2830#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (or (<= 4 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1))) (or (<= 4 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 3 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)))))) (= main_~nondetString1~0.offset 0)), 2831#(and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (<= 4 (select |#length| |cstrcat_#in~s1.base|)) (and (<= 3 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1)))) (= 0 |cstrcat_#in~s1.offset|)), 2832#(and (or (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (<= 4 (select |#length| cstrcat_~s~0.base))) (or (<= 4 (select |#length| cstrcat_~s~0.base)) (= 3 (select |#length| cstrcat_~s~0.base)))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))) (= cstrcat_~s~0.offset 0)), 2833#(and (or (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (<= 4 (select |#length| cstrcat_~s~0.base))) (or (<= 4 (select |#length| cstrcat_~s~0.base)) (= 3 (select |#length| cstrcat_~s~0.base)))) (= |cstrcat_#t~mem0| 0)) (= cstrcat_~s~0.offset 0)), 2834#(or (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (and (= cstrcat_~s~0.offset 1) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)))), 2835#(or (and (= |cstrcat_#t~mem0| 0) (= cstrcat_~s~0.offset 1)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 2836#(<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)), 2837#(and (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (<= 0 cstrcat_~s~0.offset)), 2838#(and (<= 1 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))] [2018-02-04 01:41:36,403 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:36,404 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-04 01:41:36,404 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-04 01:41:36,404 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=292, Unknown=0, NotChecked=0, Total=342 [2018-02-04 01:41:36,404 INFO L87 Difference]: Start difference. First operand 139 states and 159 transitions. Second operand 19 states. [2018-02-04 01:41:36,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:36,856 INFO L93 Difference]: Finished difference Result 171 states and 196 transitions. [2018-02-04 01:41:36,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-02-04 01:41:36,856 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 29 [2018-02-04 01:41:36,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:36,857 INFO L225 Difference]: With dead ends: 171 [2018-02-04 01:41:36,857 INFO L226 Difference]: Without dead ends: 171 [2018-02-04 01:41:36,857 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 181 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=155, Invalid=775, Unknown=0, NotChecked=0, Total=930 [2018-02-04 01:41:36,858 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-02-04 01:41:36,860 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 153. [2018-02-04 01:41:36,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-02-04 01:41:36,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 177 transitions. [2018-02-04 01:41:36,862 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 177 transitions. Word has length 29 [2018-02-04 01:41:36,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:36,862 INFO L432 AbstractCegarLoop]: Abstraction has 153 states and 177 transitions. [2018-02-04 01:41:36,862 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-04 01:41:36,862 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 177 transitions. [2018-02-04 01:41:36,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-02-04 01:41:36,863 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:36,863 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:36,863 INFO L371 AbstractCegarLoop]: === Iteration 21 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:36,863 INFO L82 PathProgramCache]: Analyzing trace with hash 1617883298, now seen corresponding path program 2 times [2018-02-04 01:41:36,864 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:36,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:36,869 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:36,925 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:36,926 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:36,926 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9] total 9 [2018-02-04 01:41:36,926 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:36,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:36,926 INFO L182 omatonBuilderFactory]: Interpolants [3187#true, 3188#false, 3189#(= 0 |main_#t~malloc10.offset|), 3190#(= 0 main_~nondetString2~0.offset), 3191#(= 0 |cstrcat_#in~s1.offset|), 3192#(= cstrcat_~s~0.offset 0), 3193#(<= 1 cstrcat_~s~0.offset), 3194#(<= 2 cstrcat_~s~0.offset), 3195#(and (<= 2 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))), 3196#(and (<= 2 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|)))] [2018-02-04 01:41:36,926 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:36,926 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 01:41:36,927 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 01:41:36,927 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-02-04 01:41:36,927 INFO L87 Difference]: Start difference. First operand 153 states and 177 transitions. Second operand 10 states. [2018-02-04 01:41:37,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:37,002 INFO L93 Difference]: Finished difference Result 162 states and 184 transitions. [2018-02-04 01:41:37,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 01:41:37,003 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 31 [2018-02-04 01:41:37,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:37,003 INFO L225 Difference]: With dead ends: 162 [2018-02-04 01:41:37,003 INFO L226 Difference]: Without dead ends: 162 [2018-02-04 01:41:37,004 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2018-02-04 01:41:37,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-02-04 01:41:37,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 141. [2018-02-04 01:41:37,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-02-04 01:41:37,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 161 transitions. [2018-02-04 01:41:37,008 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 161 transitions. Word has length 31 [2018-02-04 01:41:37,008 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:37,008 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 161 transitions. [2018-02-04 01:41:37,008 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 01:41:37,008 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 161 transitions. [2018-02-04 01:41:37,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-02-04 01:41:37,009 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:37,009 INFO L351 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:37,009 INFO L371 AbstractCegarLoop]: === Iteration 22 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:37,009 INFO L82 PathProgramCache]: Analyzing trace with hash -1342276044, now seen corresponding path program 3 times [2018-02-04 01:41:37,010 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:37,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:37,022 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:37,365 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:37,365 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:37,365 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19] total 19 [2018-02-04 01:41:37,366 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:37,366 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:37,366 INFO L182 omatonBuilderFactory]: Interpolants [3520#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (or (and (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0)) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (<= 1 main_~length1~0))) (= main_~nondetString1~0.offset 0)), 3521#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= 1 main_~length3~0) (<= (+ main_~length3~0 1) (+ (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~nondetString1~0.offset 0)), 3522#(and (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (<= 4 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (select |#length| main_~nondetString2~0.base) (+ main_~nondetString1~0.offset (- 1))) (+ main_~nondetString2~0.offset (- 1))))) (<= 5 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1))) (= 0 main_~nondetString2~0.offset) (= main_~nondetString1~0.offset 0)), 3523#(and (or (and (or (<= 5 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (select |#length| |cstrcat_#in~s1.base|) (- 1)) (- 1))))) (<= 4 (select |#length| |cstrcat_#in~s1.base|))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1))) (= 0 |cstrcat_#in~s1.offset|)), 3524#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (<= 4 (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base)))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))) (= cstrcat_~s~0.offset 0)), 3525#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= |cstrcat_#t~mem0| 0) (and (<= 4 (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base))))) (= cstrcat_~s~0.offset 0)), 3526#(and (= cstrcat_~s~0.offset 1) (or (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)))), 3527#(and (or (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0)) (= cstrcat_~s~0.offset 1)), 3528#(and (<= 2 cstrcat_~s~0.offset) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)))), 3529#(and (<= 2 cstrcat_~s~0.offset) (or (= |cstrcat_#t~mem0| 0) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)))), 3530#(and (<= 3 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))), 3531#(and (<= 4 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))), 3512#true, 3513#false, 3514#(<= 1 main_~length1~0), 3515#(and (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 3516#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 3517#(and (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 3518#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (= main_~nondetString1~0.offset 0)), 3519#(and (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|)) (= main_~nondetString1~0.offset 0))] [2018-02-04 01:41:37,366 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:37,366 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 01:41:37,366 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 01:41:37,366 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=331, Unknown=0, NotChecked=0, Total=380 [2018-02-04 01:41:37,366 INFO L87 Difference]: Start difference. First operand 141 states and 161 transitions. Second operand 20 states. [2018-02-04 01:41:37,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:37,994 INFO L93 Difference]: Finished difference Result 177 states and 202 transitions. [2018-02-04 01:41:37,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 01:41:37,994 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-02-04 01:41:37,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:37,995 INFO L225 Difference]: With dead ends: 177 [2018-02-04 01:41:37,995 INFO L226 Difference]: Without dead ends: 177 [2018-02-04 01:41:37,996 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 196 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=151, Invalid=971, Unknown=0, NotChecked=0, Total=1122 [2018-02-04 01:41:37,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-02-04 01:41:37,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 147. [2018-02-04 01:41:37,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-02-04 01:41:37,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 169 transitions. [2018-02-04 01:41:37,999 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 169 transitions. Word has length 32 [2018-02-04 01:41:37,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:38,000 INFO L432 AbstractCegarLoop]: Abstraction has 147 states and 169 transitions. [2018-02-04 01:41:38,000 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 01:41:38,000 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 169 transitions. [2018-02-04 01:41:38,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-02-04 01:41:38,000 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:38,000 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:38,001 INFO L371 AbstractCegarLoop]: === Iteration 23 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:38,001 INFO L82 PathProgramCache]: Analyzing trace with hash 785498486, now seen corresponding path program 1 times [2018-02-04 01:41:38,001 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:38,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:38,007 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:38,159 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:38,159 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:38,195 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2018-02-04 01:41:38,196 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:38,196 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:38,196 INFO L182 omatonBuilderFactory]: Interpolants [3884#true, 3885#false, 3886#(<= 1 main_~length3~0), 3887#(<= (+ main_~length1~0 1) main_~length2~0), 3888#(and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length1~0 1) main_~length2~0) (= (select |#valid| |main_#t~malloc9.base|) 1)), 3889#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= (+ main_~length1~0 1) main_~length2~0)), 3890#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= 0 |main_#t~malloc10.offset|) (<= (+ main_~length1~0 1) (select |#length| |main_#t~malloc10.base|))), 3891#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length1~0 1) (select |#length| main_~nondetString2~0.base))), 3892#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (<= (+ (select |#length| main_~nondetString1~0.base) 1) (select |#length| main_~nondetString2~0.base))), 3893#(and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 1) (select |#length| |cstrcat_#in~s1.base|)) (= 0 |cstrcat_#in~s2.offset|) (= 0 |cstrcat_#in~s1.offset|)), 3894#(and (= 0 cstrcat_~s2.offset) (<= (+ (select |#length| cstrcat_~s2.base) 1) (select |#length| cstrcat_~s~0.base)) (= cstrcat_~s~0.offset 0)), 3895#(and (= 0 cstrcat_~s2.offset) (<= 1 cstrcat_~s~0.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (select |#length| cstrcat_~s~0.base))), 3896#(and (<= 2 cstrcat_~s~0.offset) (= |cstrcat_#t~post3.offset| 0) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset| cstrcat_~s~0.offset) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~post3.base| cstrcat_~s2.base)), 3897#(and (<= 2 cstrcat_~s~0.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base)))), 3898#(and (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post2.offset|) (+ (select |#length| |cstrcat_#t~post2.base|) |cstrcat_#t~post3.offset|)) (<= 2 |cstrcat_#t~post2.offset|)), 3899#(and (<= 2 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|)))] [2018-02-04 01:41:38,196 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:38,196 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-04 01:41:38,196 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-04 01:41:38,196 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-02-04 01:41:38,196 INFO L87 Difference]: Start difference. First operand 147 states and 169 transitions. Second operand 16 states. [2018-02-04 01:41:38,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:38,583 INFO L93 Difference]: Finished difference Result 175 states and 199 transitions. [2018-02-04 01:41:38,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-02-04 01:41:38,584 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 33 [2018-02-04 01:41:38,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:38,584 INFO L225 Difference]: With dead ends: 175 [2018-02-04 01:41:38,584 INFO L226 Difference]: Without dead ends: 175 [2018-02-04 01:41:38,585 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 104 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=124, Invalid=688, Unknown=0, NotChecked=0, Total=812 [2018-02-04 01:41:38,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-02-04 01:41:38,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 160. [2018-02-04 01:41:38,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-02-04 01:41:38,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 185 transitions. [2018-02-04 01:41:38,587 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 185 transitions. Word has length 33 [2018-02-04 01:41:38,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:38,587 INFO L432 AbstractCegarLoop]: Abstraction has 160 states and 185 transitions. [2018-02-04 01:41:38,587 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-04 01:41:38,587 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 185 transitions. [2018-02-04 01:41:38,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-04 01:41:38,588 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:38,588 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:38,588 INFO L371 AbstractCegarLoop]: === Iteration 24 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:38,588 INFO L82 PathProgramCache]: Analyzing trace with hash -1281886369, now seen corresponding path program 2 times [2018-02-04 01:41:38,589 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:38,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:38,597 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:38,885 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:38,885 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:38,885 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2018-02-04 01:41:38,885 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:38,886 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:38,886 INFO L182 omatonBuilderFactory]: Interpolants [4261#true, 4262#false, 4263#(and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (= (select |#valid| |main_#t~malloc9.base|) 1)), 4264#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (= main_~nondetString1~0.offset 0)), 4265#(and (or (not (= main_~nondetString1~0.base |main_#t~malloc10.base|)) (not (= (+ main_~nondetString1~0.offset main_~length1~0) 2))) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~nondetString1~0.offset 0)), 4266#(and (or (not (= (+ main_~nondetString1~0.offset main_~length1~0) 2)) (not (= main_~nondetString1~0.base main_~nondetString2~0.base))) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~nondetString1~0.offset 0)), 4267#(and (or (<= 3 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)) 1) (and (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset main_~length3~0 (- 1)) 0)) main_~nondetString1~0.base) 1)))) (= main_~nondetString1~0.offset 0)), 4268#(and (or (and (not (= |cstrcat_#in~s2.base| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s2.base|) 1))) (<= (select |#length| |cstrcat_#in~s2.base|) 1) (<= 3 (select |#length| |cstrcat_#in~s2.base|))) (= 0 |cstrcat_#in~s2.offset|)), 4269#(and (= 0 cstrcat_~s2.offset) (or (<= (select |#length| cstrcat_~s2.base) 1) (and (= 0 (select (select |#memory_int| cstrcat_~s2.base) 1)) (not (= cstrcat_~s2.base cstrcat_~s~0.base))) (<= 3 (select |#length| cstrcat_~s2.base)))), 4270#(and (or (and (not (= |cstrcat_#t~post2.base| cstrcat_~s2.base)) (<= cstrcat_~s2.offset (+ |cstrcat_#t~post3.offset| 1)) (= 0 (select (select |#memory_int| cstrcat_~s2.base) 1))) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) cstrcat_~s2.offset) (<= (+ cstrcat_~s2.offset 2) (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|))) (= |cstrcat_#t~post3.offset| 0) (= |cstrcat_#t~post3.base| cstrcat_~s2.base) (<= (+ |cstrcat_#t~post3.offset| 1) cstrcat_~s2.offset)), 4271#(and (or (and (= 0 (select (select (store |#memory_int| |cstrcat_#t~post2.base| (store (select |#memory_int| |cstrcat_#t~post2.base|) |cstrcat_#t~post2.offset| |cstrcat_#t~mem5|)) cstrcat_~s2.base) 1)) (<= cstrcat_~s2.offset 1)) (<= (+ cstrcat_~s2.offset 2) (select |#length| cstrcat_~s2.base)) (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset)) (<= 1 cstrcat_~s2.offset)), 4272#(and (or (<= (+ cstrcat_~s2.offset 2) (select |#length| cstrcat_~s2.base)) (and (<= cstrcat_~s2.offset 1) (= 0 (select (select |#memory_int| cstrcat_~s2.base) 1))) (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset)) (<= 1 cstrcat_~s2.offset)), 4273#(and (<= 2 cstrcat_~s2.offset) (or (and (= 1 |cstrcat_#t~post3.offset|) (= 0 (select (select |#memory_int| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|))) (<= (+ cstrcat_~s2.offset 1) (select |#length| cstrcat_~s2.base)) (<= (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|))), 4274#(and (or (= |cstrcat_#t~mem5| 0) (<= (+ cstrcat_~s2.offset 1) (select |#length| cstrcat_~s2.base))) (<= 2 cstrcat_~s2.offset)), 4275#(and (<= (+ cstrcat_~s2.offset 1) (select |#length| cstrcat_~s2.base)) (<= 2 cstrcat_~s2.offset)), 4276#(and (<= (+ |cstrcat_#t~post3.offset| 1) (select |#length| |cstrcat_#t~post3.base|)) (<= 2 |cstrcat_#t~post3.offset|))] [2018-02-04 01:41:38,886 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:38,886 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-04 01:41:38,886 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-04 01:41:38,887 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-02-04 01:41:38,887 INFO L87 Difference]: Start difference. First operand 160 states and 185 transitions. Second operand 16 states. [2018-02-04 01:41:39,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:39,227 INFO L93 Difference]: Finished difference Result 182 states and 212 transitions. [2018-02-04 01:41:39,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-04 01:41:39,228 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 34 [2018-02-04 01:41:39,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:39,228 INFO L225 Difference]: With dead ends: 182 [2018-02-04 01:41:39,228 INFO L226 Difference]: Without dead ends: 182 [2018-02-04 01:41:39,229 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=82, Invalid=470, Unknown=0, NotChecked=0, Total=552 [2018-02-04 01:41:39,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-02-04 01:41:39,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 170. [2018-02-04 01:41:39,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-02-04 01:41:39,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 198 transitions. [2018-02-04 01:41:39,232 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 198 transitions. Word has length 34 [2018-02-04 01:41:39,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:39,232 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 198 transitions. [2018-02-04 01:41:39,233 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-04 01:41:39,233 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 198 transitions. [2018-02-04 01:41:39,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-02-04 01:41:39,233 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:39,233 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:39,233 INFO L371 AbstractCegarLoop]: === Iteration 25 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:39,233 INFO L82 PathProgramCache]: Analyzing trace with hash 304009148, now seen corresponding path program 1 times [2018-02-04 01:41:39,234 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:39,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:39,238 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:39,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:39,293 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 01:41:39,293 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 01:41:39,293 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:39,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:39,293 INFO L182 omatonBuilderFactory]: Interpolants [4645#true, 4646#false, 4647#(= |#valid| |old(#valid)|), 4648#(and (= (store |#valid| |main_#t~malloc9.base| 0) |old(#valid)|) (= (select |#valid| |main_#t~malloc9.base|) 1)), 4649#(and (= (store (store |#valid| |main_#t~malloc9.base| 0) |main_#t~malloc10.base| 0) |old(#valid)|) (not (= |main_#t~malloc9.base| |main_#t~malloc10.base|))), 4650#(= |old(#valid)| (store |#valid| |main_#t~malloc10.base| 0))] [2018-02-04 01:41:39,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:39,294 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 01:41:39,294 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 01:41:39,294 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 01:41:39,294 INFO L87 Difference]: Start difference. First operand 170 states and 198 transitions. Second operand 6 states. [2018-02-04 01:41:39,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:39,368 INFO L93 Difference]: Finished difference Result 169 states and 197 transitions. [2018-02-04 01:41:39,368 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 01:41:39,368 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-02-04 01:41:39,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:39,368 INFO L225 Difference]: With dead ends: 169 [2018-02-04 01:41:39,368 INFO L226 Difference]: Without dead ends: 128 [2018-02-04 01:41:39,369 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-02-04 01:41:39,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-02-04 01:41:39,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 123. [2018-02-04 01:41:39,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-02-04 01:41:39,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 133 transitions. [2018-02-04 01:41:39,372 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 133 transitions. Word has length 35 [2018-02-04 01:41:39,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:39,373 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 133 transitions. [2018-02-04 01:41:39,373 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 01:41:39,373 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 133 transitions. [2018-02-04 01:41:39,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-02-04 01:41:39,373 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:39,374 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:39,374 INFO L371 AbstractCegarLoop]: === Iteration 26 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:39,374 INFO L82 PathProgramCache]: Analyzing trace with hash -1083771808, now seen corresponding path program 1 times [2018-02-04 01:41:39,375 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:39,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:39,384 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:39,598 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:39,598 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:39,598 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16] total 16 [2018-02-04 01:41:39,598 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:39,599 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:39,599 INFO L182 omatonBuilderFactory]: Interpolants [4960#(and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 1) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base))) (<= 1 cstrcat_~s~0.offset)), 4961#(and (<= 2 cstrcat_~s~0.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 1) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base)))), 4962#(and (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post2.offset| 1) (+ (select |#length| |cstrcat_#t~post2.base|) |cstrcat_#t~post3.offset|)) (<= 2 |cstrcat_#t~post2.offset|)), 4963#(and (<= (+ |cstrcat_#t~post2.offset| 2) (select |#length| |cstrcat_#t~post2.base|)) (<= 2 |cstrcat_#t~post2.offset|)), 4947#true, 4948#false, 4949#(<= 1 main_~length3~0), 4950#(<= (+ main_~length1~0 1) main_~length2~0), 4951#(and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length1~0 1) main_~length2~0) (= (select |#valid| |main_#t~malloc9.base|) 1)), 4952#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= (+ main_~length1~0 1) main_~length2~0)), 4953#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= 0 |main_#t~malloc10.offset|) (<= (+ main_~length1~0 1) (select |#length| |main_#t~malloc10.base|))), 4954#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length1~0 1) (select |#length| main_~nondetString2~0.base))), 4955#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (<= (+ (select |#length| main_~nondetString1~0.base) 1) (select |#length| main_~nondetString2~0.base))), 4956#(and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 1) (select |#length| |cstrcat_#in~s1.base|)) (= 0 |cstrcat_#in~s2.offset|) (= 0 |cstrcat_#in~s1.offset|)), 4957#(and (= 0 cstrcat_~s2.offset) (<= (+ (select |#length| cstrcat_~s2.base) 1) (select |#length| cstrcat_~s~0.base)) (= cstrcat_~s~0.offset 0)), 4958#(and (<= (+ |cstrcat_#t~post2.offset| 1) cstrcat_~s~0.offset) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset| cstrcat_~s~0.offset 1) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~post3.offset| 0) (= |cstrcat_#t~post3.base| cstrcat_~s2.base)), 4959#(and (<= (+ |cstrcat_#t~post2.offset| 1) cstrcat_~s~0.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 1) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base))))] [2018-02-04 01:41:39,599 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:39,599 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-02-04 01:41:39,599 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-02-04 01:41:39,599 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2018-02-04 01:41:39,600 INFO L87 Difference]: Start difference. First operand 123 states and 133 transitions. Second operand 17 states. [2018-02-04 01:41:39,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:39,916 INFO L93 Difference]: Finished difference Result 133 states and 143 transitions. [2018-02-04 01:41:39,916 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-02-04 01:41:39,917 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 35 [2018-02-04 01:41:39,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:39,917 INFO L225 Difference]: With dead ends: 133 [2018-02-04 01:41:39,917 INFO L226 Difference]: Without dead ends: 133 [2018-02-04 01:41:39,918 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=128, Invalid=684, Unknown=0, NotChecked=0, Total=812 [2018-02-04 01:41:39,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-02-04 01:41:39,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 114. [2018-02-04 01:41:39,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-02-04 01:41:39,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 124 transitions. [2018-02-04 01:41:39,921 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 124 transitions. Word has length 35 [2018-02-04 01:41:39,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:39,921 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 124 transitions. [2018-02-04 01:41:39,921 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-02-04 01:41:39,921 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 124 transitions. [2018-02-04 01:41:39,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-02-04 01:41:39,922 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:39,922 INFO L351 BasicCegarLoop]: trace histogram [6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:39,922 INFO L371 AbstractCegarLoop]: === Iteration 27 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:39,922 INFO L82 PathProgramCache]: Analyzing trace with hash -1600146015, now seen corresponding path program 4 times [2018-02-04 01:41:39,923 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:39,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:39,935 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:40,427 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:40,427 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:40,427 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22] total 22 [2018-02-04 01:41:40,428 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:40,428 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:40,428 INFO L182 omatonBuilderFactory]: Interpolants [5248#(and (or (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= |cstrcat_#t~mem0| 0) (and (or (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= 5 (select |#length| cstrcat_~s~0.base)))) (= cstrcat_~s~0.offset 0)), 5249#(and (or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))) (= cstrcat_~s~0.offset 1)), 5250#(and (= cstrcat_~s~0.offset 1) (or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))))), 5251#(or (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 5252#(or (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0)), 5253#(or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 5254#(or (= |cstrcat_#t~mem0| 0) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 5255#(<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)), 5256#(and (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (<= 0 cstrcat_~s~0.offset)), 5257#(and (<= 1 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))), 5235#true, 5236#false, 5237#(<= 1 main_~length1~0), 5238#(and (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 5239#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 5240#(and (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 5241#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (= main_~nondetString1~0.offset 0)), 5242#(and (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|)) (= main_~nondetString1~0.offset 0)), 5243#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0) (<= 1 main_~length1~0))) (= main_~nondetString1~0.offset 0)), 5244#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= 1 main_~length3~0) (<= (+ main_~length3~0 1) (+ (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)))) (= main_~nondetString1~0.offset 0)), 5245#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (<= 4 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 5 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (select |#length| main_~nondetString2~0.base) (+ main_~nondetString1~0.offset (- 1))) (+ main_~nondetString2~0.offset (- 1))))) (<= 6 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1))) (= main_~nondetString1~0.offset 0)), 5246#(and (or (and (<= 4 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (<= 5 (select |#length| |cstrcat_#in~s1.base|)) (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (select |#length| |cstrcat_#in~s1.base|) (- 1)) (- 1)))) (<= 6 (select |#length| |cstrcat_#in~s1.base|)))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1))) (= 0 |cstrcat_#in~s1.offset|)), 5247#(and (or (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (or (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= 5 (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))) (= cstrcat_~s~0.offset 0))] [2018-02-04 01:41:40,428 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:40,428 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-02-04 01:41:40,428 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-02-04 01:41:40,428 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=444, Unknown=0, NotChecked=0, Total=506 [2018-02-04 01:41:40,429 INFO L87 Difference]: Start difference. First operand 114 states and 124 transitions. Second operand 23 states. [2018-02-04 01:41:41,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:41,219 INFO L93 Difference]: Finished difference Result 137 states and 149 transitions. [2018-02-04 01:41:41,219 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-02-04 01:41:41,220 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 35 [2018-02-04 01:41:41,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:41,220 INFO L225 Difference]: With dead ends: 137 [2018-02-04 01:41:41,220 INFO L226 Difference]: Without dead ends: 137 [2018-02-04 01:41:41,220 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 269 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=199, Invalid=1207, Unknown=0, NotChecked=0, Total=1406 [2018-02-04 01:41:41,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-02-04 01:41:41,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 120. [2018-02-04 01:41:41,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-02-04 01:41:41,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 131 transitions. [2018-02-04 01:41:41,223 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 131 transitions. Word has length 35 [2018-02-04 01:41:41,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:41,223 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 131 transitions. [2018-02-04 01:41:41,223 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-02-04 01:41:41,223 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 131 transitions. [2018-02-04 01:41:41,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-04 01:41:41,224 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:41,224 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:41,224 INFO L371 AbstractCegarLoop]: === Iteration 28 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:41,224 INFO L82 PathProgramCache]: Analyzing trace with hash 1381463977, now seen corresponding path program 2 times [2018-02-04 01:41:41,225 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:41,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:41,233 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:41,559 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:41,559 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:41,559 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18] total 18 [2018-02-04 01:41:41,559 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:41,560 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:41,560 INFO L182 omatonBuilderFactory]: Interpolants [5545#true, 5546#false, 5547#(<= 1 main_~length3~0), 5548#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0)), 5549#(and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (= (select |#valid| |main_#t~malloc9.base|) 1)), 5550#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~length3~0)), 5551#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|))), 5552#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (or (and (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0)) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~length1~0 (select |#length| main_~nondetString1~0.base))), 5553#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (or (<= (+ main_~nondetString2~0.offset main_~length3~0) 1) (<= (+ main_~length3~0 (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base))) (<= 1 main_~length3~0)), 5554#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (<= (+ (select |#length| main_~nondetString1~0.base) 2) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))))), 5555#(and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 2) (select |#length| |cstrcat_#in~s1.base|))) (= 0 |cstrcat_#in~s2.offset|) (= 0 |cstrcat_#in~s1.offset|)), 5556#(and (or (<= (+ (select |#length| cstrcat_~s2.base) 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))) (= 0 cstrcat_~s2.offset) (= cstrcat_~s~0.offset 0)), 5557#(and (= 0 cstrcat_~s2.offset) (= cstrcat_~s~0.offset 0) (or (<= (+ (select |#length| cstrcat_~s2.base) 2) (select |#length| cstrcat_~s~0.base)) (= |cstrcat_#t~mem0| 0))), 5558#(and (= 0 cstrcat_~s2.offset) (<= 1 cstrcat_~s~0.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))), 5559#(and (<= 2 cstrcat_~s~0.offset) (= 0 cstrcat_~s2.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (select |#length| cstrcat_~s~0.base))), 5560#(and (<= 3 cstrcat_~s~0.offset) (= |cstrcat_#t~post3.offset| 0) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset| cstrcat_~s~0.offset) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~post3.base| cstrcat_~s2.base)), 5561#(and (<= 3 cstrcat_~s~0.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base)))), 5562#(and (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post2.offset|) (+ (select |#length| |cstrcat_#t~post2.base|) |cstrcat_#t~post3.offset|)) (<= 3 |cstrcat_#t~post2.offset|)), 5563#(and (<= 3 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|)))] [2018-02-04 01:41:41,560 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:41,560 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-04 01:41:41,560 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-04 01:41:41,560 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=297, Unknown=0, NotChecked=0, Total=342 [2018-02-04 01:41:41,561 INFO L87 Difference]: Start difference. First operand 120 states and 131 transitions. Second operand 19 states. [2018-02-04 01:41:42,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:42,016 INFO L93 Difference]: Finished difference Result 141 states and 152 transitions. [2018-02-04 01:41:42,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 01:41:42,016 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 36 [2018-02-04 01:41:42,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:42,016 INFO L225 Difference]: With dead ends: 141 [2018-02-04 01:41:42,016 INFO L226 Difference]: Without dead ends: 141 [2018-02-04 01:41:42,017 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=116, Invalid=754, Unknown=0, NotChecked=0, Total=870 [2018-02-04 01:41:42,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-02-04 01:41:42,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 120. [2018-02-04 01:41:42,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-02-04 01:41:42,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 131 transitions. [2018-02-04 01:41:42,018 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 131 transitions. Word has length 36 [2018-02-04 01:41:42,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:42,019 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 131 transitions. [2018-02-04 01:41:42,019 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-04 01:41:42,019 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 131 transitions. [2018-02-04 01:41:42,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-02-04 01:41:42,019 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:42,019 INFO L351 BasicCegarLoop]: trace histogram [7, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:42,019 INFO L371 AbstractCegarLoop]: === Iteration 29 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:42,019 INFO L82 PathProgramCache]: Analyzing trace with hash -107959532, now seen corresponding path program 5 times [2018-02-04 01:41:42,020 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:42,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:42,032 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:42,698 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:42,699 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:42,699 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23] total 23 [2018-02-04 01:41:42,699 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:42,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:42,699 INFO L182 omatonBuilderFactory]: Interpolants [5856#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= 1 main_~length3~0) (<= (+ main_~length3~0 1) (+ (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)))) (= main_~nondetString1~0.offset 0)), 5857#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (select |#length| main_~nondetString2~0.base) (+ main_~nondetString1~0.offset (- 1))) (- 1))))) (<= 4 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (- 1))))) (<= 5 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (and (<= 6 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (select |#length| main_~nondetString2~0.base) (+ main_~nondetString1~0.offset (- 2))) (+ main_~nondetString2~0.offset (- 1))))) (<= 7 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1))) (= main_~nondetString1~0.offset 0)), 5858#(and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (<= 5 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1)) (and (<= 6 (select |#length| |cstrcat_#in~s1.base|)) (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (select |#length| |cstrcat_#in~s1.base|) (- 2)) (- 1)))) (<= 7 (select |#length| |cstrcat_#in~s1.base|)))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (select |#length| |cstrcat_#in~s1.base|) (- 1)) (- 1)))) (<= 4 (select |#length| |cstrcat_#in~s1.base|)))) (= 0 |cstrcat_#in~s1.offset|)), 5859#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base))) (and (<= 6 (select |#length| cstrcat_~s~0.base)) (or (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1)))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))))) (= cstrcat_~s~0.offset 0)), 5860#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (<= 6 (select |#length| cstrcat_~s~0.base)) (or (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1)))))) (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))))) (= cstrcat_~s~0.offset 0)), 5861#(and (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))) (= cstrcat_~s~0.offset 1)), 5862#(and (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))) (= cstrcat_~s~0.offset 1)), 5863#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))))), 5864#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))))), 5865#(or (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 5866#(or (= |cstrcat_#t~mem0| 0) (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)))), 5867#(or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 5868#(and (or (= |cstrcat_#t~mem0| 0) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= 0 cstrcat_~s~0.offset)), 5869#(and (<= 1 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))), 5870#(and (<= 2 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))), 5847#true, 5848#false, 5849#(<= 1 main_~length1~0), 5850#(and (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 5851#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 5852#(and (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 5853#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (= main_~nondetString1~0.offset 0)), 5854#(and (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|)) (= main_~nondetString1~0.offset 0)), 5855#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0) (<= 1 main_~length1~0))) (= main_~nondetString1~0.offset 0))] [2018-02-04 01:41:42,699 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:42,700 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-02-04 01:41:42,700 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-02-04 01:41:42,700 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=485, Unknown=0, NotChecked=0, Total=552 [2018-02-04 01:41:42,700 INFO L87 Difference]: Start difference. First operand 120 states and 131 transitions. Second operand 24 states. [2018-02-04 01:41:43,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:43,673 INFO L93 Difference]: Finished difference Result 150 states and 163 transitions. [2018-02-04 01:41:43,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-02-04 01:41:43,673 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 38 [2018-02-04 01:41:43,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:43,674 INFO L225 Difference]: With dead ends: 150 [2018-02-04 01:41:43,674 INFO L226 Difference]: Without dead ends: 150 [2018-02-04 01:41:43,674 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 291 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=220, Invalid=1340, Unknown=0, NotChecked=0, Total=1560 [2018-02-04 01:41:43,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-02-04 01:41:43,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 126. [2018-02-04 01:41:43,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-02-04 01:41:43,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 138 transitions. [2018-02-04 01:41:43,676 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 138 transitions. Word has length 38 [2018-02-04 01:41:43,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:43,676 INFO L432 AbstractCegarLoop]: Abstraction has 126 states and 138 transitions. [2018-02-04 01:41:43,676 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-02-04 01:41:43,676 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 138 transitions. [2018-02-04 01:41:43,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-02-04 01:41:43,677 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:43,677 INFO L351 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:43,677 INFO L371 AbstractCegarLoop]: === Iteration 30 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:43,677 INFO L82 PathProgramCache]: Analyzing trace with hash 269048756, now seen corresponding path program 3 times [2018-02-04 01:41:43,678 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:43,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:43,687 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:43,916 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 01:41:43,916 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:43,916 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17] total 17 [2018-02-04 01:41:43,916 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:43,916 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:43,916 INFO L182 omatonBuilderFactory]: Interpolants [6179#true, 6180#false, 6181#(and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (= (select |#valid| |main_#t~malloc9.base|) 1)), 6182#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (= main_~nondetString1~0.offset 0)), 6183#(and (not (= main_~nondetString1~0.base |main_#t~malloc10.base|)) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~nondetString1~0.offset 0)), 6184#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 6185#(and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset main_~length3~0 (- 1)) 0)) main_~nondetString1~0.base) (+ (select |#length| main_~nondetString1~0.base) (+ main_~nondetString1~0.offset (- 1))))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 6186#(and (not (= |cstrcat_#in~s2.base| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s2.base|) (+ (select |#length| |cstrcat_#in~s2.base|) (- 1))))), 6187#(and (not (= cstrcat_~s2.base cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s2.base) (+ (select |#length| cstrcat_~s2.base) (- 1))))), 6188#(and (not (= |cstrcat_#t~post2.base| cstrcat_~s2.base)) (not (= cstrcat_~s2.base cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s2.base) (+ (select |#length| |cstrcat_#t~post3.base|) (- 1)))) (= |cstrcat_#t~post3.base| cstrcat_~s2.base)), 6189#(and (not (= cstrcat_~s2.base cstrcat_~s~0.base)) (= 0 (select (select (store |#memory_int| |cstrcat_#t~post2.base| (store (select |#memory_int| |cstrcat_#t~post2.base|) |cstrcat_#t~post2.offset| |cstrcat_#t~mem5|)) cstrcat_~s2.base) (+ (select |#length| cstrcat_~s2.base) (- 1))))), 6190#(and (not (= |cstrcat_#t~post2.base| cstrcat_~s2.base)) (= 0 (select (select |#memory_int| cstrcat_~s2.base) (+ (select |#length| cstrcat_~s2.base) (- 1))))), 6191#(= 0 (select (select (store |#memory_int| |cstrcat_#t~post2.base| (store (select |#memory_int| |cstrcat_#t~post2.base|) |cstrcat_#t~post2.offset| |cstrcat_#t~mem5|)) cstrcat_~s2.base) (+ (select |#length| cstrcat_~s2.base) (- 1)))), 6192#(= 0 (select (select |#memory_int| cstrcat_~s2.base) (+ (select |#length| cstrcat_~s2.base) (- 1)))), 6193#(or (= 0 (select (select |#memory_int| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|)) (and (or (<= (+ cstrcat_~s2.offset 1) (select |#length| cstrcat_~s2.base)) (<= (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|)) (<= (+ |cstrcat_#t~post3.offset| 1) cstrcat_~s2.offset))), 6194#(or (= |cstrcat_#t~mem5| 0) (and (<= (+ cstrcat_~s2.offset 1) (select |#length| cstrcat_~s2.base)) (<= 1 cstrcat_~s2.offset))), 6195#(and (<= (+ cstrcat_~s2.offset 1) (select |#length| cstrcat_~s2.base)) (<= 1 cstrcat_~s2.offset)), 6196#(and (<= 1 |cstrcat_#t~post3.offset|) (<= (+ |cstrcat_#t~post3.offset| 1) (select |#length| |cstrcat_#t~post3.base|)))] [2018-02-04 01:41:43,916 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 01:41:43,917 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-02-04 01:41:43,917 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-02-04 01:41:43,917 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=263, Unknown=0, NotChecked=0, Total=306 [2018-02-04 01:41:43,917 INFO L87 Difference]: Start difference. First operand 126 states and 138 transitions. Second operand 18 states. [2018-02-04 01:41:44,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:44,240 INFO L93 Difference]: Finished difference Result 125 states and 136 transitions. [2018-02-04 01:41:44,240 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-04 01:41:44,240 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 39 [2018-02-04 01:41:44,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:44,241 INFO L225 Difference]: With dead ends: 125 [2018-02-04 01:41:44,241 INFO L226 Difference]: Without dead ends: 95 [2018-02-04 01:41:44,241 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=140, Invalid=672, Unknown=0, NotChecked=0, Total=812 [2018-02-04 01:41:44,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-02-04 01:41:44,242 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 86. [2018-02-04 01:41:44,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-02-04 01:41:44,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 92 transitions. [2018-02-04 01:41:44,243 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 92 transitions. Word has length 39 [2018-02-04 01:41:44,243 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:44,243 INFO L432 AbstractCegarLoop]: Abstraction has 86 states and 92 transitions. [2018-02-04 01:41:44,243 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-02-04 01:41:44,243 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 92 transitions. [2018-02-04 01:41:44,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-02-04 01:41:44,243 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:44,244 INFO L351 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:44,244 INFO L371 AbstractCegarLoop]: === Iteration 31 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:44,244 INFO L82 PathProgramCache]: Analyzing trace with hash 394604694, now seen corresponding path program 3 times [2018-02-04 01:41:44,244 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:44,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:44,251 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:44,829 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:44,830 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:44,830 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21] total 21 [2018-02-04 01:41:44,830 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:44,830 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:44,831 INFO L182 omatonBuilderFactory]: Interpolants [6432#(<= 1 main_~length3~0), 6433#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0)), 6434#(and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (= (select |#valid| |main_#t~malloc9.base|) 1)), 6435#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~length3~0)), 6436#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|))), 6437#(and (= 0 main_~nondetString2~0.offset) (or (= 2 (+ main_~nondetString2~0.offset main_~length3~0)) (and (= 0 main_~nondetString1~0.offset) (or (and (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0)) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~length1~0 (select |#length| main_~nondetString1~0.base))))), 6438#(and (= 0 main_~nondetString2~0.offset) (or (= 2 (+ main_~nondetString2~0.offset main_~length3~0)) (and (= 0 main_~nondetString1~0.offset) (or (<= (+ main_~length3~0 (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base)) (<= (+ main_~nondetString2~0.offset main_~length3~0) 2)) (<= 1 main_~length3~0)))), 6439#(and (= 0 main_~nondetString2~0.offset) (or (and (= 0 main_~nondetString1~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (<= (+ (select |#length| main_~nondetString1~0.base) 3) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)))), 6440#(and (or (and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 3) (select |#length| |cstrcat_#in~s1.base|))) (= 0 |cstrcat_#in~s2.offset|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1))) (= 0 |cstrcat_#in~s1.offset|)), 6441#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (= 0 cstrcat_~s2.offset) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))))) (= cstrcat_~s~0.offset 0)), 6442#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (= 0 cstrcat_~s2.offset) (or (= |cstrcat_#t~mem0| 0) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))))) (= cstrcat_~s~0.offset 0)), 6443#(and (or (and (= 0 cstrcat_~s2.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))) (= cstrcat_~s~0.offset 1)), 6444#(and (= cstrcat_~s~0.offset 1) (or (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))))), 6445#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 6446#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))), 6447#(or (and (= |cstrcat_#t~post3.offset| 0) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) cstrcat_~s2.offset) (= |cstrcat_#t~post3.base| cstrcat_~s2.base)) (and (<= (+ |cstrcat_#t~post2.offset| 1) cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))), 6448#(or (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset) (and (<= (+ |cstrcat_#t~post2.offset| 1) cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))), 6449#(or (and (<= 1 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))) (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset)), 6450#(or (and (<= 1 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|))) (<= (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|)), 6451#(and (<= 1 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|))), 6430#true, 6431#false] [2018-02-04 01:41:44,831 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:44,831 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-04 01:41:44,831 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-04 01:41:44,831 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=409, Unknown=0, NotChecked=0, Total=462 [2018-02-04 01:41:44,832 INFO L87 Difference]: Start difference. First operand 86 states and 92 transitions. Second operand 22 states. [2018-02-04 01:41:45,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:45,406 INFO L93 Difference]: Finished difference Result 96 states and 102 transitions. [2018-02-04 01:41:45,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-02-04 01:41:45,407 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 39 [2018-02-04 01:41:45,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:45,407 INFO L225 Difference]: With dead ends: 96 [2018-02-04 01:41:45,407 INFO L226 Difference]: Without dead ends: 96 [2018-02-04 01:41:45,407 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 223 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=133, Invalid=989, Unknown=0, NotChecked=0, Total=1122 [2018-02-04 01:41:45,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-02-04 01:41:45,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 91. [2018-02-04 01:41:45,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2018-02-04 01:41:45,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 97 transitions. [2018-02-04 01:41:45,409 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 97 transitions. Word has length 39 [2018-02-04 01:41:45,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:45,409 INFO L432 AbstractCegarLoop]: Abstraction has 91 states and 97 transitions. [2018-02-04 01:41:45,409 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-04 01:41:45,410 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 97 transitions. [2018-02-04 01:41:45,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-02-04 01:41:45,410 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:45,410 INFO L351 BasicCegarLoop]: trace histogram [8, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:45,410 INFO L371 AbstractCegarLoop]: === Iteration 32 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:45,410 INFO L82 PathProgramCache]: Analyzing trace with hash 708041921, now seen corresponding path program 6 times [2018-02-04 01:41:45,411 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:45,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:45,425 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:46,081 WARN L146 SmtUtils]: Spent 109ms on a formula simplification. DAG size of input: 69 DAG size of output 49 [2018-02-04 01:41:46,452 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:46,452 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:46,452 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26] total 26 [2018-02-04 01:41:46,452 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:46,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:46,453 INFO L182 omatonBuilderFactory]: Interpolants [6663#true, 6664#false, 6665#(<= 1 main_~length1~0), 6666#(and (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 6667#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 6668#(and (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 6669#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (= main_~nondetString1~0.offset 0)), 6670#(and (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|)) (= main_~nondetString1~0.offset 0)), 6671#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0) (<= 1 main_~length1~0)) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~nondetString1~0.offset 0)), 6672#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= 1 main_~length3~0) (<= (+ main_~length3~0 1) (+ (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~nondetString1~0.offset 0)), 6673#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (<= 4 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (- 1)))))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (- main_~nondetString2~0.offset) 5) (- 1))))) (<= 6 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (and (<= 7 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (select |#length| main_~nondetString2~0.base) (+ main_~nondetString1~0.offset (- 1))) (+ main_~nondetString2~0.offset (- 1))))) (<= 8 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)) (and (<= 5 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 4) (+ main_~nondetString2~0.offset (- 1))))))) (= main_~nondetString1~0.offset 0)), 6674#(and (or (and (<= 4 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (<= 5 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 4 (- 1))))) (and (<= 7 (select |#length| |cstrcat_#in~s1.base|)) (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (select |#length| |cstrcat_#in~s1.base|) (- 1)) (- 1)))) (<= 8 (select |#length| |cstrcat_#in~s1.base|)))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1)) (and (<= 6 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 5 (- 1)))))) (= 0 |cstrcat_#in~s1.offset|)), 6675#(and (or (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= 8 (select |#length| cstrcat_~s~0.base))) (<= 7 (select |#length| cstrcat_~s~0.base)))) (= cstrcat_~s~0.offset 0)), 6676#(and (or (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= 8 (select |#length| cstrcat_~s~0.base))) (<= 7 (select |#length| cstrcat_~s~0.base)))) (= cstrcat_~s~0.offset 0)), 6677#(and (= cstrcat_~s~0.offset 1) (or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))))), 6678#(and (or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1)))))) (= cstrcat_~s~0.offset 1)), 6679#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 6680#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0)), 6681#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 6682#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))))), 6683#(or (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 6684#(or (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0)), 6685#(or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 6686#(or (= |cstrcat_#t~mem0| 0) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 6687#(<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)), 6688#(and (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (<= 0 cstrcat_~s~0.offset)), 6689#(and (<= 1 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))] [2018-02-04 01:41:46,453 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:46,453 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-02-04 01:41:46,453 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-02-04 01:41:46,454 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=618, Unknown=0, NotChecked=0, Total=702 [2018-02-04 01:41:46,454 INFO L87 Difference]: Start difference. First operand 91 states and 97 transitions. Second operand 27 states. [2018-02-04 01:41:47,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:47,709 INFO L93 Difference]: Finished difference Result 116 states and 124 transitions. [2018-02-04 01:41:47,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-02-04 01:41:47,710 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 41 [2018-02-04 01:41:47,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:47,710 INFO L225 Difference]: With dead ends: 116 [2018-02-04 01:41:47,710 INFO L226 Difference]: Without dead ends: 116 [2018-02-04 01:41:47,711 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 384 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=287, Invalid=1693, Unknown=0, NotChecked=0, Total=1980 [2018-02-04 01:41:47,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-02-04 01:41:47,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 97. [2018-02-04 01:41:47,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-02-04 01:41:47,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 104 transitions. [2018-02-04 01:41:47,712 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 104 transitions. Word has length 41 [2018-02-04 01:41:47,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:47,713 INFO L432 AbstractCegarLoop]: Abstraction has 97 states and 104 transitions. [2018-02-04 01:41:47,713 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-02-04 01:41:47,713 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 104 transitions. [2018-02-04 01:41:47,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-04 01:41:47,713 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:47,713 INFO L351 BasicCegarLoop]: trace histogram [5, 5, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:47,714 INFO L371 AbstractCegarLoop]: === Iteration 33 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:47,714 INFO L82 PathProgramCache]: Analyzing trace with hash -79154039, now seen corresponding path program 4 times [2018-02-04 01:41:47,714 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:47,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:47,725 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:48,598 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:48,598 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:48,598 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23] total 23 [2018-02-04 01:41:48,598 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:48,598 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:48,599 INFO L182 omatonBuilderFactory]: Interpolants [6944#(and (or (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= main_~length3~0 (div (+ main_~length2~0 (+ main_~nondetString1~0.offset (- 2))) 2))) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~length3~0) (= main_~nondetString1~0.offset 0)), 6945#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (or (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|)) (<= main_~length3~0 (div (+ (select |#length| |main_#t~malloc10.base|) (+ main_~nondetString1~0.offset (- 2))) 2))) (= main_~nondetString1~0.offset 0)), 6946#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (or (and (or (= (+ main_~length1~0 1) (+ main_~nondetString2~0.offset main_~length3~0)) (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base))) (<= (+ main_~nondetString1~0.offset (* 2 main_~length1~0)) (select |#length| main_~nondetString2~0.base))) (<= main_~length3~0 (div (+ (select |#length| main_~nondetString2~0.base) (+ main_~nondetString1~0.offset (- 2))) 2)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~length3~0 1))) (<= 1 main_~length3~0) (or (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (not (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~length3~0 1))))) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~nondetString1~0.offset 0)), 6947#(and (= 0 main_~nondetString2~0.offset) (or (and (or (and (<= (select |#length| main_~nondetString1~0.base) (div (+ (select |#length| main_~nondetString2~0.base) (- main_~nondetString1~0.offset)) 2)) (or (= (+ main_~nondetString2~0.offset main_~length3~0) (+ (select |#length| main_~nondetString1~0.base) 1)) (<= (+ (* 2 (select |#length| main_~nondetString1~0.base)) 2) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (<= (+ main_~nondetString2~0.offset main_~length3~0) (select |#length| main_~nondetString1~0.base)))) (<= (+ (* 2 main_~length3~0) 1) (+ (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (<= 1 main_~length3~0)) (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~nondetString1~0.offset 0)), 6948#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (<= (select |#length| main_~nondetString1~0.base) (div (+ (select |#length| main_~nondetString2~0.base) (- main_~nondetString1~0.offset)) 2)) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (select |#length| main_~nondetString1~0.base))) (<= (+ (* 2 (select |#length| main_~nondetString1~0.base)) 2) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)) (<= 6 (+ (* 2 main_~nondetString2~0.offset) (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (= main_~nondetString1~0.offset 0)), 6949#(and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (or (<= 6 (select |#length| |cstrcat_#in~s1.base|)) (and (<= (select |#length| |cstrcat_#in~s2.base|) (div (select |#length| |cstrcat_#in~s1.base|) 2)) (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (select |#length| |cstrcat_#in~s2.base|))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 1) (div (select |#length| |cstrcat_#in~s1.base|) 2))))) (= 0 |cstrcat_#in~s2.offset|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1))) (= 0 |cstrcat_#in~s1.offset|)), 6950#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 cstrcat_~s2.offset) (or (<= 2 (div (+ (select |#length| cstrcat_~s~0.base) (- 2)) 2)) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (select |#length| cstrcat_~s2.base))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 2) (select |#length| cstrcat_~s~0.base))) (<= (select |#length| cstrcat_~s2.base) (div (select |#length| cstrcat_~s~0.base) 2)))))) (= cstrcat_~s~0.offset 0)), 6951#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (or (<= 2 (div (+ (select |#length| cstrcat_~s~0.base) (- 2)) 2)) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (select |#length| cstrcat_~s2.base))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 2) (select |#length| cstrcat_~s~0.base))) (<= (select |#length| cstrcat_~s2.base) (div (select |#length| cstrcat_~s~0.base) 2)))))) (= cstrcat_~s~0.offset 0)), 6952#(or (and (= 0 cstrcat_~s2.offset) (or (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (+ (div (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1))) 2) 1)) (or (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (div (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1))) 2)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1))))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))) (and (= cstrcat_~s~0.offset 1) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)))), 6953#(or (and (= |cstrcat_#t~mem0| 0) (= cstrcat_~s~0.offset 1)) (and (= 0 cstrcat_~s2.offset) (or (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (+ (div (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1))) 2) 1)) (or (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (div (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1))) 2)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1))))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))))), 6954#(or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 6955#(or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1))), 6956#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 6957#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))), 6958#(and (<= (+ |cstrcat_#t~post2.offset| 1) cstrcat_~s~0.offset) (or (and (= |cstrcat_#t~post3.offset| 0) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) cstrcat_~s2.offset) (= |cstrcat_#t~post3.base| cstrcat_~s2.base)) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))), 6959#(and (<= (+ |cstrcat_#t~post2.offset| 1) cstrcat_~s~0.offset) (or (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))), 6960#(and (or (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))) (<= 1 cstrcat_~s~0.offset)), 6961#(and (<= 1 |cstrcat_#t~post2.offset|) (or (<= (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|)))), 6962#(and (<= 1 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|))), 6939#true, 6940#false, 6941#(<= 1 main_~length3~0), 6942#(and (<= 1 main_~length3~0) (or (= main_~length2~0 (+ main_~length3~0 main_~length1~0)) (<= (+ (* 2 main_~length3~0) (* 2 main_~length1~0) 1) (* 2 main_~length2~0)))), 6943#(and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (<= 1 main_~length3~0) (or (= main_~length2~0 (+ main_~length3~0 main_~length1~0)) (<= (+ (* 2 main_~length3~0) (* 2 main_~length1~0) 1) (* 2 main_~length2~0))) (= (select |#valid| |main_#t~malloc9.base|) 1))] [2018-02-04 01:41:48,599 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:48,599 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-02-04 01:41:48,599 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-02-04 01:41:48,599 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=496, Unknown=0, NotChecked=0, Total=552 [2018-02-04 01:41:48,599 INFO L87 Difference]: Start difference. First operand 97 states and 104 transitions. Second operand 24 states. [2018-02-04 01:41:49,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:49,725 INFO L93 Difference]: Finished difference Result 111 states and 118 transitions. [2018-02-04 01:41:49,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-02-04 01:41:49,726 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 42 [2018-02-04 01:41:49,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:49,726 INFO L225 Difference]: With dead ends: 111 [2018-02-04 01:41:49,726 INFO L226 Difference]: Without dead ends: 111 [2018-02-04 01:41:49,727 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 274 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=148, Invalid=1258, Unknown=0, NotChecked=0, Total=1406 [2018-02-04 01:41:49,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-02-04 01:41:49,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 97. [2018-02-04 01:41:49,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-02-04 01:41:49,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 104 transitions. [2018-02-04 01:41:49,728 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 104 transitions. Word has length 42 [2018-02-04 01:41:49,729 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:49,729 INFO L432 AbstractCegarLoop]: Abstraction has 97 states and 104 transitions. [2018-02-04 01:41:49,729 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-02-04 01:41:49,729 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 104 transitions. [2018-02-04 01:41:49,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-02-04 01:41:49,729 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:49,729 INFO L351 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:49,730 INFO L371 AbstractCegarLoop]: === Iteration 34 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:49,730 INFO L82 PathProgramCache]: Analyzing trace with hash -1162932171, now seen corresponding path program 5 times [2018-02-04 01:41:49,730 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:49,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:49,740 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:50,166 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:50,166 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:50,166 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21] total 21 [2018-02-04 01:41:50,166 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:50,166 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:50,167 INFO L182 omatonBuilderFactory]: Interpolants [7200#false, 7201#(<= 1 main_~length3~0), 7202#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0)), 7203#(and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (= (select |#valid| |main_#t~malloc9.base|) 1)), 7204#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~length3~0)), 7205#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|))), 7206#(and (= 0 main_~nondetString2~0.offset) (or (= 2 (+ main_~nondetString2~0.offset main_~length3~0)) (and (= 0 main_~nondetString1~0.offset) (or (and (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0)) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~length1~0 (select |#length| main_~nondetString1~0.base))))), 7207#(and (= 0 main_~nondetString2~0.offset) (or (= 2 (+ main_~nondetString2~0.offset main_~length3~0)) (and (= 0 main_~nondetString1~0.offset) (or (<= (+ main_~length3~0 (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base)) (<= (+ main_~nondetString2~0.offset main_~length3~0) 2)) (<= 1 main_~length3~0)))), 7208#(and (= 0 main_~nondetString2~0.offset) (or (and (= 0 main_~nondetString1~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (<= (+ (select |#length| main_~nondetString1~0.base) 3) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)))), 7209#(and (or (and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 3) (select |#length| |cstrcat_#in~s1.base|))) (= 0 |cstrcat_#in~s2.offset|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1))) (= 0 |cstrcat_#in~s1.offset|)), 7210#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (= 0 cstrcat_~s2.offset) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))))) (= cstrcat_~s~0.offset 0)), 7211#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (= 0 cstrcat_~s2.offset) (or (= |cstrcat_#t~mem0| 0) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))))) (= cstrcat_~s~0.offset 0)), 7212#(and (or (and (= 0 cstrcat_~s2.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))) (= cstrcat_~s~0.offset 1)), 7213#(and (= cstrcat_~s~0.offset 1) (or (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))))), 7214#(and (<= 2 cstrcat_~s~0.offset) (= 0 cstrcat_~s2.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))), 7215#(and (<= 3 cstrcat_~s~0.offset) (= 0 cstrcat_~s2.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (select |#length| cstrcat_~s~0.base))), 7216#(and (= |cstrcat_#t~post3.offset| 0) (<= 4 cstrcat_~s~0.offset) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset| cstrcat_~s~0.offset) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~post3.base| cstrcat_~s2.base)), 7217#(and (<= 4 cstrcat_~s~0.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base)))), 7218#(and (<= 5 cstrcat_~s~0.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base)))), 7219#(and (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post2.offset|) (+ (select |#length| |cstrcat_#t~post2.base|) |cstrcat_#t~post3.offset|)) (<= 5 |cstrcat_#t~post2.offset|)), 7220#(and (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|)) (<= 5 |cstrcat_#t~post2.offset|)), 7199#true] [2018-02-04 01:41:50,167 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:50,167 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-04 01:41:50,167 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-04 01:41:50,167 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=410, Unknown=0, NotChecked=0, Total=462 [2018-02-04 01:41:50,167 INFO L87 Difference]: Start difference. First operand 97 states and 104 transitions. Second operand 22 states. [2018-02-04 01:41:50,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:50,731 INFO L93 Difference]: Finished difference Result 116 states and 123 transitions. [2018-02-04 01:41:50,732 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 01:41:50,732 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 44 [2018-02-04 01:41:50,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:50,732 INFO L225 Difference]: With dead ends: 116 [2018-02-04 01:41:50,732 INFO L226 Difference]: Without dead ends: 101 [2018-02-04 01:41:50,732 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 235 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=135, Invalid=1055, Unknown=0, NotChecked=0, Total=1190 [2018-02-04 01:41:50,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-02-04 01:41:50,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 97. [2018-02-04 01:41:50,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-02-04 01:41:50,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 103 transitions. [2018-02-04 01:41:50,734 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 103 transitions. Word has length 44 [2018-02-04 01:41:50,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:50,734 INFO L432 AbstractCegarLoop]: Abstraction has 97 states and 103 transitions. [2018-02-04 01:41:50,734 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-04 01:41:50,734 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 103 transitions. [2018-02-04 01:41:50,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-02-04 01:41:50,734 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:50,734 INFO L351 BasicCegarLoop]: trace histogram [9, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:50,734 INFO L371 AbstractCegarLoop]: === Iteration 35 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:50,735 INFO L82 PathProgramCache]: Analyzing trace with hash 692432884, now seen corresponding path program 7 times [2018-02-04 01:41:50,735 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:50,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:50,747 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:51,155 WARN L146 SmtUtils]: Spent 109ms on a formula simplification. DAG size of input: 110 DAG size of output 63 [2018-02-04 01:41:52,278 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:52,278 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:52,279 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27] total 27 [2018-02-04 01:41:52,279 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:52,279 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:52,279 INFO L182 omatonBuilderFactory]: Interpolants [7460#true, 7461#false, 7462#(<= 1 main_~length1~0), 7463#(and (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 7464#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 7465#(and (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 7466#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (= main_~nondetString1~0.offset 0)), 7467#(and (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|)) (= main_~nondetString1~0.offset 0)), 7468#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0) (<= 1 main_~length1~0)) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~nondetString1~0.offset 0)), 7469#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= 1 main_~length3~0) (<= (+ main_~length3~0 1) (+ (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~nondetString1~0.offset 0)), 7470#(and (= 0 main_~nondetString2~0.offset) (or (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) (- 1))))) (<= 7 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (and (<= 8 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (or (<= 9 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (select |#length| main_~nondetString2~0.base) (+ main_~nondetString1~0.offset (- 1))) (- 1))))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (<= 4 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 6 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 5) (+ main_~nondetString2~0.offset (- 1)))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)) (and (<= 5 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 4) (+ main_~nondetString2~0.offset (- 1))))))) (= main_~nondetString1~0.offset 0)), 7471#(and (or (and (<= 4 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (<= 5 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 4 (- 1))))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ 5 1) (- 1)))) (<= 7 (select |#length| |cstrcat_#in~s1.base|))) (and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (select |#length| |cstrcat_#in~s1.base|) (- 1)) (- 1)))) (<= 9 (select |#length| |cstrcat_#in~s1.base|))) (<= 8 (select |#length| |cstrcat_#in~s1.base|))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1)) (and (<= 6 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 5 (- 1)))))) (= 0 |cstrcat_#in~s1.offset|)), 7472#(and (or (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1))))) (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (or (<= 9 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= 8 (select |#length| cstrcat_~s~0.base))) (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base)))) (= cstrcat_~s~0.offset 0)), 7473#(and (or (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1))))) (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (or (<= 9 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= 8 (select |#length| cstrcat_~s~0.base))) (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base)))) (= cstrcat_~s~0.offset 0)), 7474#(and (= cstrcat_~s~0.offset 1) (or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))))), 7475#(and (or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1)))))) (= cstrcat_~s~0.offset 1)), 7476#(or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= 2 cstrcat_~s~0.offset) (or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))))))), 7477#(or (= |cstrcat_#t~mem0| 0) (and (<= 2 cstrcat_~s~0.offset) (or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))))))), 7478#(or (and (<= 3 cstrcat_~s~0.offset) (or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 7479#(or (= |cstrcat_#t~mem0| 0) (and (<= 3 cstrcat_~s~0.offset) (or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))))), 7480#(or (and (or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))))) (<= 4 cstrcat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 7481#(or (= |cstrcat_#t~mem0| 0) (and (or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))))) (<= 4 cstrcat_~s~0.offset))), 7482#(or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= 5 cstrcat_~s~0.offset) (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)))), 7483#(or (= |cstrcat_#t~mem0| 0) (and (<= 5 cstrcat_~s~0.offset) (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)))), 7484#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= 6 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))), 7485#(and (<= 6 cstrcat_~s~0.offset) (or (= |cstrcat_#t~mem0| 0) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))), 7486#(and (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (<= 7 cstrcat_~s~0.offset)), 7487#(and (<= 8 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))] [2018-02-04 01:41:52,279 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:52,279 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-02-04 01:41:52,279 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-02-04 01:41:52,280 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=691, Unknown=0, NotChecked=0, Total=756 [2018-02-04 01:41:52,280 INFO L87 Difference]: Start difference. First operand 97 states and 103 transitions. Second operand 28 states. [2018-02-04 01:41:53,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:53,753 INFO L93 Difference]: Finished difference Result 122 states and 130 transitions. [2018-02-04 01:41:53,753 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-02-04 01:41:53,753 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 44 [2018-02-04 01:41:53,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:53,754 INFO L225 Difference]: With dead ends: 122 [2018-02-04 01:41:53,754 INFO L226 Difference]: Without dead ends: 122 [2018-02-04 01:41:53,754 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 377 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=185, Invalid=2071, Unknown=0, NotChecked=0, Total=2256 [2018-02-04 01:41:53,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-02-04 01:41:53,755 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 103. [2018-02-04 01:41:53,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-02-04 01:41:53,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 110 transitions. [2018-02-04 01:41:53,755 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 110 transitions. Word has length 44 [2018-02-04 01:41:53,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:53,756 INFO L432 AbstractCegarLoop]: Abstraction has 103 states and 110 transitions. [2018-02-04 01:41:53,756 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-02-04 01:41:53,756 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 110 transitions. [2018-02-04 01:41:53,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-02-04 01:41:53,756 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:53,756 INFO L351 BasicCegarLoop]: trace histogram [6, 6, 5, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:53,756 INFO L371 AbstractCegarLoop]: === Iteration 36 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:53,756 INFO L82 PathProgramCache]: Analyzing trace with hash -563034186, now seen corresponding path program 6 times [2018-02-04 01:41:53,757 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:53,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:53,770 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:54,287 WARN L146 SmtUtils]: Spent 119ms on a formula simplification. DAG size of input: 88 DAG size of output 37 [2018-02-04 01:41:54,493 WARN L146 SmtUtils]: Spent 101ms on a formula simplification. DAG size of input: 78 DAG size of output 53 [2018-02-04 01:41:54,622 WARN L146 SmtUtils]: Spent 107ms on a formula simplification. DAG size of input: 78 DAG size of output 54 [2018-02-04 01:41:54,839 WARN L146 SmtUtils]: Spent 112ms on a formula simplification. DAG size of input: 99 DAG size of output 70 [2018-02-04 01:41:55,239 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:55,240 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:55,240 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24] total 24 [2018-02-04 01:41:55,240 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:55,240 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:55,241 INFO L182 omatonBuilderFactory]: Interpolants [7753#true, 7754#false, 7755#(<= 1 main_~length3~0), 7756#(and (<= 1 main_~length3~0) (<= (+ (* 2 main_~length3~0) (* 2 main_~length1~0)) (* 2 main_~length2~0))), 7757#(and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (<= 1 main_~length3~0) (<= (+ (* 2 main_~length3~0) (* 2 main_~length1~0)) (* 2 main_~length2~0)) (= (select |#valid| |main_#t~malloc9.base|) 1)), 7758#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~length3~0) (= main_~nondetString1~0.offset 0)), 7759#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|)) (= main_~nondetString1~0.offset 0)), 7760#(and (or (and (or (and (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0)) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~nondetString1~0.offset 0)) (= (+ main_~nondetString2~0.offset main_~length3~0) 2)) (= 0 main_~nondetString2~0.offset)), 7761#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (or (= (+ main_~nondetString2~0.offset main_~length3~0) 1) (and (<= 1 main_~length3~0) (or (<= (+ (select |#length| main_~nondetString1~0.base) 1) (div (+ (select |#length| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (- main_~nondetString1~0.offset) (- 1)))) 2)) (<= (+ main_~length3~0 (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base)) (<= (+ (* 2 main_~length3~0) 1) (+ (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))))) (= main_~nondetString1~0.offset 0)))), 7762#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)) (and (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (<= 7 (+ (* 2 main_~nondetString2~0.offset) (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (and (or (<= (+ main_~nondetString1~0.offset (* 2 (select |#length| main_~nondetString1~0.base)) 1) (select |#length| main_~nondetString2~0.base)) (and (<= (+ main_~nondetString1~0.offset (* 2 (select |#length| main_~nondetString1~0.base))) (select |#length| main_~nondetString2~0.base)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- (+ (select |#length| main_~nondetString2~0.base) (- (select |#length| main_~nondetString1~0.base)))) (select |#length| main_~nondetString2~0.base)) (+ main_~nondetString1~0.offset (- 1))))))) (or (and (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base)) (+ main_~nondetString2~0.offset (- 1))))) (<= (+ (* 2 (select |#length| main_~nondetString1~0.base)) 3) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)))) (<= (+ (* 2 (select |#length| main_~nondetString1~0.base)) 2) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)))) (<= 3 (select |#length| main_~nondetString1~0.base)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (select |#length| main_~nondetString1~0.base)))))) (= main_~nondetString1~0.offset 0)))), 7763#(and (or (and (= 0 |cstrcat_#in~s2.offset|) (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (- (+ (select |#length| |cstrcat_#in~s1.base|) (- (select |#length| |cstrcat_#in~s2.base|)))) (select |#length| |cstrcat_#in~s1.base|)) (- 1)))) (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (select |#length| |cstrcat_#in~s2.base|))) (<= 3 (select |#length| |cstrcat_#in~s2.base|))) (<= (* 2 (select |#length| |cstrcat_#in~s2.base|)) (select |#length| |cstrcat_#in~s1.base|))) (<= 7 (select |#length| |cstrcat_#in~s1.base|)) (and (<= (select |#length| |cstrcat_#in~s2.base|) (div (+ (select |#length| |cstrcat_#in~s1.base|) (- 1)) 2)) (or (<= (+ (* 2 (select |#length| |cstrcat_#in~s2.base|)) 3) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (- (select |#length| |cstrcat_#in~s2.base|)) (select |#length| |cstrcat_#in~s1.base|)) (- 1)))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (select |#length| |cstrcat_#in~s2.base|))))))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1))) (= 0 |cstrcat_#in~s1.offset|)), 7764#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (or (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (select |#length| cstrcat_~s2.base))) (and (or (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1))))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 2) (select |#length| cstrcat_~s~0.base))) (<= 3 (select |#length| cstrcat_~s2.base))) (or (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 1) (select |#length| cstrcat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (+ (select |#length| cstrcat_~s~0.base) (- (select |#length| cstrcat_~s2.base)))) (select |#length| cstrcat_~s~0.base)) (- 1)))) (<= (* 2 (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base))))) (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))) (= 0 cstrcat_~s2.offset))) (= cstrcat_~s~0.offset 0)), 7765#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (= 0 cstrcat_~s2.offset) (or (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (select |#length| cstrcat_~s2.base))) (and (or (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1))))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 2) (select |#length| cstrcat_~s~0.base))) (<= 3 (select |#length| cstrcat_~s2.base))) (or (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 1) (select |#length| cstrcat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (+ (select |#length| cstrcat_~s~0.base) (- (select |#length| cstrcat_~s2.base)))) (select |#length| cstrcat_~s~0.base)) (- 1)))) (<= (* 2 (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base))))) (<= 7 (select |#length| cstrcat_~s~0.base)) (= |cstrcat_#t~mem0| 0)))) (= cstrcat_~s~0.offset 0)), 7766#(or (and (= 0 cstrcat_~s2.offset) (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1))))) (<= 3 (select |#length| cstrcat_~s2.base))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset) (+ (select |#length| cstrcat_~s~0.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (+ (- (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1)))) (- 1))))) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1)))) (- 1))))) (and (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)) (or (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1)))) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1)))) (- 1)))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (+ (- (+ (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1))) 1)) (- 1))))) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1)))) (- 1)))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset) (select |#length| cstrcat_~s~0.base)))) (<= 1 cstrcat_~s~0.offset)) (and (= cstrcat_~s~0.offset 1) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)))), 7767#(or (and (= |cstrcat_#t~mem0| 0) (= cstrcat_~s~0.offset 1)) (and (= 0 cstrcat_~s2.offset) (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1))))) (<= 3 (select |#length| cstrcat_~s2.base))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset) (+ (select |#length| cstrcat_~s~0.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (+ (- (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1)))) (- 1))))) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1)))) (- 1))))) (and (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)) (or (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1)))) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1)))) (- 1)))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (+ (- (+ (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1))) 1)) (- 1))))) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1)))) (- 1)))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset) (select |#length| cstrcat_~s~0.base)))) (<= 1 cstrcat_~s~0.offset))), 7768#(or (and (<= 2 cstrcat_~s~0.offset) (or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1))), 7769#(or (and (<= 2 cstrcat_~s~0.offset) (or (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1))), 7770#(or (and (<= 3 cstrcat_~s~0.offset) (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1))), 7771#(or (and (<= 3 cstrcat_~s~0.offset) (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= |cstrcat_#t~mem0| 0))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1))), 7772#(or (and (<= 4 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1))), 7773#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (<= 5 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)))), 7774#(or (and (<= 6 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))) (and (= |cstrcat_#t~post3.offset| 0) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) cstrcat_~s2.offset) (= |cstrcat_#t~post3.base| cstrcat_~s2.base))), 7775#(or (and (<= 6 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))) (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset)), 7776#(or (and (<= 6 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|))) (<= (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|)), 7777#(and (<= 6 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|)))] [2018-02-04 01:41:55,241 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:55,241 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-02-04 01:41:55,241 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-02-04 01:41:55,241 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=542, Unknown=0, NotChecked=0, Total=600 [2018-02-04 01:41:55,242 INFO L87 Difference]: Start difference. First operand 103 states and 110 transitions. Second operand 25 states. [2018-02-04 01:41:55,728 WARN L146 SmtUtils]: Spent 109ms on a formula simplification. DAG size of input: 101 DAG size of output 100 [2018-02-04 01:41:55,926 WARN L146 SmtUtils]: Spent 100ms on a formula simplification. DAG size of input: 117 DAG size of output 116 [2018-02-04 01:41:56,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:56,500 INFO L93 Difference]: Finished difference Result 117 states and 124 transitions. [2018-02-04 01:41:56,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-02-04 01:41:56,501 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 45 [2018-02-04 01:41:56,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:56,501 INFO L225 Difference]: With dead ends: 117 [2018-02-04 01:41:56,501 INFO L226 Difference]: Without dead ends: 117 [2018-02-04 01:41:56,502 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 296 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=149, Invalid=1411, Unknown=0, NotChecked=0, Total=1560 [2018-02-04 01:41:56,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-02-04 01:41:56,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 103. [2018-02-04 01:41:56,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-02-04 01:41:56,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 110 transitions. [2018-02-04 01:41:56,503 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 110 transitions. Word has length 45 [2018-02-04 01:41:56,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:56,503 INFO L432 AbstractCegarLoop]: Abstraction has 103 states and 110 transitions. [2018-02-04 01:41:56,503 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-02-04 01:41:56,503 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 110 transitions. [2018-02-04 01:41:56,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-02-04 01:41:56,504 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:56,504 INFO L351 BasicCegarLoop]: trace histogram [5, 5, 4, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:56,504 INFO L371 AbstractCegarLoop]: === Iteration 37 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:56,504 INFO L82 PathProgramCache]: Analyzing trace with hash 1979681826, now seen corresponding path program 7 times [2018-02-04 01:41:56,504 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:56,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:56,511 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:57,262 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 43 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:57,263 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:41:57,263 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23] total 23 [2018-02-04 01:41:57,263 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:41:57,263 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:57,263 INFO L182 omatonBuilderFactory]: Interpolants [8032#(and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (= (select |#valid| |main_#t~malloc9.base|) 1)), 8033#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~length3~0) (= main_~nondetString1~0.offset 0)), 8034#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|)) (= main_~nondetString1~0.offset 0)), 8035#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (= (+ main_~nondetString2~0.offset main_~length3~0) 1) (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0)))), 8036#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (or (<= (+ main_~length3~0 (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base)) (<= (+ main_~nondetString2~0.offset main_~length3~0) 2)) (<= 1 main_~length3~0)), 8037#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (<= (+ (select |#length| main_~nondetString1~0.base) 3) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (or (<= 4 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (<= (+ main_~nondetString1~0.offset (* 2 (select |#length| main_~nondetString1~0.base)) 1) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (select |#length| main_~nondetString1~0.base) (+ main_~nondetString1~0.offset (- 1))))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)))), 8038#(and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (or (<= 4 (select |#length| |cstrcat_#in~s2.base|)) (<= (+ (* 2 (select |#length| |cstrcat_#in~s2.base|)) 1) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (select |#length| |cstrcat_#in~s2.base|) (- 1))))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 3) (select |#length| |cstrcat_#in~s1.base|))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1))) (= 0 |cstrcat_#in~s2.offset|) (= 0 |cstrcat_#in~s1.offset|)), 8039#(and (= 0 cstrcat_~s2.offset) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (or (<= 4 (select |#length| cstrcat_~s2.base)) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 1) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (select |#length| cstrcat_~s2.base) (- 1))))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base)))) (= cstrcat_~s~0.offset 0)), 8040#(and (= 0 cstrcat_~s2.offset) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= |cstrcat_#t~mem0| 0) (and (or (<= 4 (select |#length| cstrcat_~s2.base)) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 1) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (select |#length| cstrcat_~s2.base) (- 1))))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base)))) (= cstrcat_~s~0.offset 0)), 8041#(and (= 0 cstrcat_~s2.offset) (or (and (<= 1 cstrcat_~s~0.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (or (<= 4 (select |#length| cstrcat_~s2.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1))) (- 1)))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset) (select |#length| cstrcat_~s~0.base)))) (and (= cstrcat_~s~0.offset 1) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))))), 8042#(and (= 0 cstrcat_~s2.offset) (or (and (= |cstrcat_#t~mem0| 0) (= cstrcat_~s~0.offset 1)) (and (<= 1 cstrcat_~s~0.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (or (<= 4 (select |#length| cstrcat_~s2.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1))) (- 1)))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset) (select |#length| cstrcat_~s~0.base)))))), 8043#(and (<= 2 cstrcat_~s~0.offset) (= 0 cstrcat_~s2.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)) (or (<= 4 (select |#length| cstrcat_~s2.base)) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset) (+ (select |#length| cstrcat_~s~0.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)))), 8044#(and (<= 2 cstrcat_~s~0.offset) (= 0 cstrcat_~s2.offset) (or (<= 4 (select |#length| cstrcat_~s2.base)) (= |cstrcat_#t~mem0| 0) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset) (+ (select |#length| cstrcat_~s~0.base) 1))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))), 8045#(and (<= 3 cstrcat_~s~0.offset) (= 0 cstrcat_~s2.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (select |#length| cstrcat_~s~0.base)) (or (<= 4 (select |#length| cstrcat_~s2.base)) (<= (select |#length| cstrcat_~s2.base) 2) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))), 8046#(and (= 0 cstrcat_~s2.offset) (<= 4 cstrcat_~s~0.offset) (or (<= 4 (select |#length| cstrcat_~s2.base)) (<= (select |#length| cstrcat_~s2.base) 2) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (+ (select |#length| cstrcat_~s~0.base) 1))), 8047#(and (<= 5 cstrcat_~s~0.offset) (= |cstrcat_#t~post3.offset| 0) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset| cstrcat_~s~0.offset) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base) 1)) (or (<= (+ cstrcat_~s2.offset 3) (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|)) (<= (+ (* 2 (select |#length| |cstrcat_#t~post3.base|)) (* 2 |cstrcat_#t~post3.offset|) cstrcat_~s~0.offset) (+ (* 2 cstrcat_~s2.offset) (select |#length| cstrcat_~s~0.base) 2))) (= |cstrcat_#t~post3.base| cstrcat_~s2.base)), 8048#(and (<= 5 cstrcat_~s~0.offset) (or (<= (select |#length| cstrcat_~s2.base) (+ cstrcat_~s2.offset 1)) (<= (+ cstrcat_~s2.offset 3) (select |#length| cstrcat_~s2.base)) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base) 1))), 8049#(and (<= 6 cstrcat_~s~0.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base) 1)) (or (<= (+ cstrcat_~s2.offset 2) (select |#length| cstrcat_~s2.base)) (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base))))), 8050#(and (<= 6 |cstrcat_#t~post2.offset|) (or (<= (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|)))), 8051#(and (<= 6 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|))), 8028#true, 8029#false, 8030#(<= 1 main_~length3~0), 8031#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0))] [2018-02-04 01:41:57,263 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 43 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:41:57,263 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-02-04 01:41:57,264 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-02-04 01:41:57,264 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=496, Unknown=0, NotChecked=0, Total=552 [2018-02-04 01:41:57,264 INFO L87 Difference]: Start difference. First operand 103 states and 110 transitions. Second operand 24 states. [2018-02-04 01:41:57,958 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:41:57,958 INFO L93 Difference]: Finished difference Result 122 states and 129 transitions. [2018-02-04 01:41:57,958 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-02-04 01:41:57,958 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 47 [2018-02-04 01:41:57,959 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:41:57,959 INFO L225 Difference]: With dead ends: 122 [2018-02-04 01:41:57,959 INFO L226 Difference]: Without dead ends: 122 [2018-02-04 01:41:57,959 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 250 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=137, Invalid=1195, Unknown=0, NotChecked=0, Total=1332 [2018-02-04 01:41:57,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-02-04 01:41:57,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 108. [2018-02-04 01:41:57,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-02-04 01:41:57,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 115 transitions. [2018-02-04 01:41:57,961 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 115 transitions. Word has length 47 [2018-02-04 01:41:57,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:41:57,961 INFO L432 AbstractCegarLoop]: Abstraction has 108 states and 115 transitions. [2018-02-04 01:41:57,961 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-02-04 01:41:57,961 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 115 transitions. [2018-02-04 01:41:57,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-02-04 01:41:57,961 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:41:57,962 INFO L351 BasicCegarLoop]: trace histogram [10, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:41:57,962 INFO L371 AbstractCegarLoop]: === Iteration 38 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:41:57,962 INFO L82 PathProgramCache]: Analyzing trace with hash -459920415, now seen corresponding path program 8 times [2018-02-04 01:41:57,962 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:41:57,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:41:57,972 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:41:58,515 WARN L146 SmtUtils]: Spent 167ms on a formula simplification. DAG size of input: 171 DAG size of output 69 [2018-02-04 01:41:58,685 WARN L146 SmtUtils]: Spent 150ms on a formula simplification. DAG size of input: 133 DAG size of output 59 [2018-02-04 01:41:58,836 WARN L146 SmtUtils]: Spent 129ms on a formula simplification. DAG size of input: 133 DAG size of output 59 [2018-02-04 01:41:59,025 WARN L146 SmtUtils]: Spent 132ms on a formula simplification. DAG size of input: 135 DAG size of output 59 [2018-02-04 01:41:59,184 WARN L146 SmtUtils]: Spent 131ms on a formula simplification. DAG size of input: 149 DAG size of output 65 [2018-02-04 01:41:59,350 WARN L146 SmtUtils]: Spent 136ms on a formula simplification. DAG size of input: 151 DAG size of output 65 [2018-02-04 01:42:00,101 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:00,101 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:42:00,101 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30] total 30 [2018-02-04 01:42:00,101 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:42:00,101 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:00,102 INFO L182 omatonBuilderFactory]: Interpolants [8320#(and (or (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base))) (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1)))) (<= 8 (select |#length| cstrcat_~s~0.base))) (and (<= 9 (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 1) (- 1)))) (<= 10 (select |#length| cstrcat_~s~0.base))))) (= cstrcat_~s~0.offset 0)), 8321#(and (or (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base))) (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1)))) (<= 8 (select |#length| cstrcat_~s~0.base))) (and (<= 9 (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 1) (- 1)))) (<= 10 (select |#length| cstrcat_~s~0.base))))) (= cstrcat_~s~0.offset 0)), 8322#(and (or (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1)))))) (= cstrcat_~s~0.offset 1)), 8323#(and (or (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1)))))) (= cstrcat_~s~0.offset 1)), 8324#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 8325#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 8326#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1))))))), 8327#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1))))))), 8328#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 8329#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 8330#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))))), 8331#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))))), 8332#(or (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 8333#(or (= |cstrcat_#t~mem0| 0) (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)))), 8334#(or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 8335#(or (= |cstrcat_#t~mem0| 0) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 8336#(<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)), 8337#(and (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (<= 0 cstrcat_~s~0.offset)), 8338#(and (<= 1 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))), 8308#true, 8309#false, 8310#(<= 1 main_~length1~0), 8311#(and (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 8312#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 8313#(and (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 8314#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (= main_~nondetString1~0.offset 0)), 8315#(and (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|)) (= main_~nondetString1~0.offset 0)), 8316#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0) (<= 1 main_~length1~0)) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~nondetString1~0.offset 0)), 8317#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= 1 main_~length3~0) (<= (+ main_~length3~0 1) (+ (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~nondetString1~0.offset 0)), 8318#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (<= 4 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (- 1)))))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (select |#length| main_~nondetString2~0.base) (+ main_~nondetString1~0.offset (- 1))) (+ main_~nondetString2~0.offset (- 1))))) (<= 7 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (and (<= 8 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) (- 1)))))) (and (<= 6 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 5) (+ main_~nondetString2~0.offset (- 1)))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)) (and (<= 9 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (or (<= 10 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) 1) (+ main_~nondetString2~0.offset (- 1))))))) (and (<= 5 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 4) (+ main_~nondetString2~0.offset (- 1))))))) (= main_~nondetString1~0.offset 0)), 8319#(and (or (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (select |#length| |cstrcat_#in~s1.base|) (- 1)) (- 1)))) (<= 7 (select |#length| |cstrcat_#in~s1.base|))) (and (<= 4 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (<= 5 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 4 (- 1))))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ 5 1) (- 1)))) (<= 8 (select |#length| |cstrcat_#in~s1.base|))) (and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ 5 1) 1) (- 1)))) (<= 10 (select |#length| |cstrcat_#in~s1.base|))) (<= 9 (select |#length| |cstrcat_#in~s1.base|))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1)) (and (<= 6 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 5 (- 1)))))) (= 0 |cstrcat_#in~s1.offset|))] [2018-02-04 01:42:00,102 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:00,102 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-02-04 01:42:00,102 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-02-04 01:42:00,102 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=114, Invalid=816, Unknown=0, NotChecked=0, Total=930 [2018-02-04 01:42:00,102 INFO L87 Difference]: Start difference. First operand 108 states and 115 transitions. Second operand 31 states. [2018-02-04 01:42:00,870 WARN L146 SmtUtils]: Spent 119ms on a formula simplification. DAG size of input: 117 DAG size of output 116 [2018-02-04 01:42:01,110 WARN L146 SmtUtils]: Spent 108ms on a formula simplification. DAG size of input: 112 DAG size of output 109 [2018-02-04 01:42:01,612 WARN L146 SmtUtils]: Spent 162ms on a formula simplification. DAG size of input: 98 DAG size of output 95 [2018-02-04 01:42:02,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:42:02,381 INFO L93 Difference]: Finished difference Result 140 states and 149 transitions. [2018-02-04 01:42:02,381 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-02-04 01:42:02,381 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 47 [2018-02-04 01:42:02,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:42:02,381 INFO L225 Difference]: With dead ends: 140 [2018-02-04 01:42:02,382 INFO L226 Difference]: Without dead ends: 140 [2018-02-04 01:42:02,382 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 546 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=417, Invalid=2339, Unknown=0, NotChecked=0, Total=2756 [2018-02-04 01:42:02,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-02-04 01:42:02,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 114. [2018-02-04 01:42:02,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-02-04 01:42:02,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 122 transitions. [2018-02-04 01:42:02,384 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 122 transitions. Word has length 47 [2018-02-04 01:42:02,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:42:02,384 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 122 transitions. [2018-02-04 01:42:02,384 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-02-04 01:42:02,384 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 122 transitions. [2018-02-04 01:42:02,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-02-04 01:42:02,385 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:42:02,385 INFO L351 BasicCegarLoop]: trace histogram [7, 7, 6, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:42:02,385 INFO L371 AbstractCegarLoop]: === Iteration 39 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:42:02,385 INFO L82 PathProgramCache]: Analyzing trace with hash -1926248087, now seen corresponding path program 8 times [2018-02-04 01:42:02,386 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:42:02,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:42:02,403 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:42:03,377 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 0 proven. 67 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:03,377 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:42:03,377 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26] total 26 [2018-02-04 01:42:03,377 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:42:03,377 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:03,377 INFO L182 omatonBuilderFactory]: Interpolants [8640#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0)), 8641#(and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (= (select |#valid| |main_#t~malloc9.base|) 1)), 8642#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~length3~0)), 8643#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|))), 8644#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0)), 8645#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (<= 1 main_~length3~0) (<= (+ main_~length3~0 (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base))), 8646#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (= 0 main_~nondetString1~0.offset) (or (and (<= (+ (select |#length| main_~nondetString1~0.base) 4) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 4) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= (+ (select |#length| main_~nondetString1~0.base) 5) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (- main_~nondetString2~0.offset) 4) 1) (+ main_~nondetString2~0.offset (- 1))))) (<= (+ (select |#length| main_~nondetString1~0.base) 6) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))))) (and (<= (+ (select |#length| main_~nondetString1~0.base) 3) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (- main_~nondetString2~0.offset) 3) (- 1)))))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)))), 8647#(and (or (and (= 0 |cstrcat_#in~s2.offset|) (or (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 4) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 4 (- 1))))) (and (or (<= (+ (select |#length| |cstrcat_#in~s2.base|) 6) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ 4 1) (- 1))))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 5) (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 3 (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 3) (select |#length| |cstrcat_#in~s1.base|))))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1))) (= 0 |cstrcat_#in~s1.offset|)), 8648#(and (or (and (= 0 cstrcat_~s2.offset) (or (and (<= (+ (select |#length| cstrcat_~s2.base) 5) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 4 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 6) (select |#length| cstrcat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))) (= cstrcat_~s~0.offset 0)), 8649#(and (or (and (= 0 cstrcat_~s2.offset) (or (and (<= (+ (select |#length| cstrcat_~s2.base) 5) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 4 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 6) (select |#length| cstrcat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= |cstrcat_#t~mem0| 0)) (= cstrcat_~s~0.offset 0)), 8650#(or (and (= 0 cstrcat_~s2.offset) (<= 1 cstrcat_~s~0.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))))) (and (= cstrcat_~s~0.offset 1) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)))), 8651#(or (and (= |cstrcat_#t~mem0| 0) (= cstrcat_~s~0.offset 1)) (and (= 0 cstrcat_~s2.offset) (<= 1 cstrcat_~s~0.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))))), 8652#(or (and (<= 2 cstrcat_~s~0.offset) (or (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 8653#(or (= |cstrcat_#t~mem0| 0) (and (<= 2 cstrcat_~s~0.offset) (or (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1))), 8654#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= 3 cstrcat_~s~0.offset) (or (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)))), 8655#(or (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (<= 3 cstrcat_~s~0.offset) (or (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)))), 8656#(or (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))) (<= 4 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1))), 8657#(or (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= |cstrcat_#t~mem0| 0)) (<= 4 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1))), 8658#(or (and (<= 5 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1))), 8659#(or (and (<= 6 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1))), 8660#(or (and (= |cstrcat_#t~post3.offset| 0) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) cstrcat_~s2.offset) (= |cstrcat_#t~post3.base| cstrcat_~s2.base)) (and (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)) (<= 7 cstrcat_~s~0.offset))), 8661#(or (and (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)) (<= 7 cstrcat_~s~0.offset)) (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset)), 8662#(or (and (<= 7 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|))) (<= (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|)), 8663#(and (<= 7 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|))), 8637#true, 8638#false, 8639#(<= 1 main_~length3~0)] [2018-02-04 01:42:03,377 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 0 proven. 67 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:03,378 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-02-04 01:42:03,378 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-02-04 01:42:03,378 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=640, Unknown=0, NotChecked=0, Total=702 [2018-02-04 01:42:03,378 INFO L87 Difference]: Start difference. First operand 114 states and 122 transitions. Second operand 27 states. [2018-02-04 01:42:04,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:42:04,515 INFO L93 Difference]: Finished difference Result 132 states and 140 transitions. [2018-02-04 01:42:04,515 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-02-04 01:42:04,515 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 48 [2018-02-04 01:42:04,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:42:04,516 INFO L225 Difference]: With dead ends: 132 [2018-02-04 01:42:04,516 INFO L226 Difference]: Without dead ends: 132 [2018-02-04 01:42:04,516 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 354 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=163, Invalid=1729, Unknown=0, NotChecked=0, Total=1892 [2018-02-04 01:42:04,516 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-02-04 01:42:04,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 114. [2018-02-04 01:42:04,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-02-04 01:42:04,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 122 transitions. [2018-02-04 01:42:04,518 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 122 transitions. Word has length 48 [2018-02-04 01:42:04,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:42:04,518 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 122 transitions. [2018-02-04 01:42:04,518 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-02-04 01:42:04,518 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 122 transitions. [2018-02-04 01:42:04,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-02-04 01:42:04,518 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:42:04,518 INFO L351 BasicCegarLoop]: trace histogram [6, 6, 5, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:42:04,518 INFO L371 AbstractCegarLoop]: === Iteration 40 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:42:04,519 INFO L82 PathProgramCache]: Analyzing trace with hash 1896148245, now seen corresponding path program 9 times [2018-02-04 01:42:04,519 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:42:04,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:42:04,526 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:42:05,795 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 58 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:05,795 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:42:05,795 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26] total 26 [2018-02-04 01:42:05,796 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:42:05,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:05,799 INFO L182 omatonBuilderFactory]: Interpolants [8960#(or (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (or (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (or (and (= 2 cstrcat_~s~0.offset) (or (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 4) (+ (select |#length| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= 4 (select |#length| cstrcat_~s2.base)))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 2))))))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))))), 8961#(or (and (or (<= (select |#length| cstrcat_~s2.base) 2) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (= 0 cstrcat_~s2.offset)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= cstrcat_~s~0.offset (select |#length| cstrcat_~s2.base)) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 5) (+ (select |#length| cstrcat_~s~0.base) cstrcat_~s~0.offset)))), 8962#(or (= |cstrcat_#t~mem0| 0) (and (or (<= (select |#length| cstrcat_~s2.base) 2) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (= 0 cstrcat_~s2.offset)) (and (= cstrcat_~s~0.offset (select |#length| cstrcat_~s2.base)) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 5) (+ (select |#length| cstrcat_~s~0.base) cstrcat_~s~0.offset)))), 8963#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))), 8964#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 8965#(or (and (= |cstrcat_#t~post3.offset| 0) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) (+ cstrcat_~s2.offset 1)) (= |cstrcat_#t~post3.base| cstrcat_~s2.base)) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))), 8966#(or (<= (select |#length| cstrcat_~s2.base) (+ cstrcat_~s2.offset 1)) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))), 8967#(and (<= (+ |cstrcat_#t~post2.offset| 1) cstrcat_~s~0.offset) (or (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))), 8968#(and (or (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))) (<= 1 cstrcat_~s~0.offset)), 8969#(and (<= 1 |cstrcat_#t~post2.offset|) (or (<= (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|)))), 8970#(and (<= 1 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|))), 8944#true, 8945#false, 8946#(<= 1 main_~length3~0), 8947#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0)), 8948#(and (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (= (select |#valid| |main_#t~malloc9.base|) 1) (= (select |#length| |main_#t~malloc9.base|) main_~length1~0)), 8949#(and (= 0 main_~nondetString1~0.offset) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~length3~0) (= (select |#length| main_~nondetString1~0.base) main_~length1~0)), 8950#(and (= 0 main_~nondetString1~0.offset) (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (= (select |#length| main_~nondetString1~0.base) main_~length1~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|))), 8951#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 1) (and (= 0 main_~nondetString1~0.offset) (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0)))))), 8952#(and (= 0 main_~nondetString2~0.offset) (<= 1 main_~length3~0) (or (and (= 0 main_~nondetString1~0.offset) (or (= (+ main_~length3~0 (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base)) (<= (+ main_~length3~0 (select |#length| main_~nondetString1~0.base) 1) (select |#length| main_~nondetString2~0.base)))) (<= (+ main_~nondetString2~0.offset main_~length3~0) 2))), 8953#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)) (and (= 0 main_~nondetString1~0.offset) (or (<= (+ (select |#length| main_~nondetString1~0.base) 4) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base)) (+ main_~nondetString2~0.offset (- 1))))) (= (+ (select |#length| main_~nondetString1~0.base) 3) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))))) (or (<= 4 (select |#length| main_~nondetString1~0.base)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString2~0.offset)) (+ main_~nondetString2~0.offset (- 1))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (select |#length| main_~nondetString1~0.base))) (<= (+ (* 2 (select |#length| main_~nondetString1~0.base)) 2) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))))))), 8954#(and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (select |#length| |cstrcat_#in~s2.base|))) (<= 4 (select |#length| |cstrcat_#in~s2.base|)) (<= (+ (* 2 (select |#length| |cstrcat_#in~s2.base|)) 2) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (select |#length| |cstrcat_#in~s2.base|) (- 1))))) (= 0 |cstrcat_#in~s2.offset|) (or (<= (+ (select |#length| |cstrcat_#in~s2.base|) 4) (select |#length| |cstrcat_#in~s1.base|)) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (- (select |#length| |cstrcat_#in~s2.base|)) (select |#length| |cstrcat_#in~s1.base|)) (- 1)))) (= (+ (select |#length| |cstrcat_#in~s2.base|) 3) (select |#length| |cstrcat_#in~s1.base|))))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1))) (= 0 |cstrcat_#in~s1.offset|)), 8955#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (or (<= 4 (select |#length| cstrcat_~s2.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (select |#length| cstrcat_~s2.base))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (select |#length| cstrcat_~s2.base) (- 1))))) (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1)))) (= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base))))) (= cstrcat_~s~0.offset 0)), 8956#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= |cstrcat_#t~mem0| 0) (and (or (<= 4 (select |#length| cstrcat_~s2.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (select |#length| cstrcat_~s2.base))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (select |#length| cstrcat_~s2.base) (- 1))))) (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1)))) (= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base))))) (= cstrcat_~s~0.offset 0)), 8957#(or (and (or (and (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1)))) (- 1)))) (= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1)))) (- 1)))) (= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (or (and (or (<= 4 (select |#length| cstrcat_~s2.base)) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 3) (+ (select |#length| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1))) (- 1))))) (= 1 cstrcat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1)))))))) (= 0 cstrcat_~s2.offset)) (and (= cstrcat_~s~0.offset 1) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)))), 8958#(or (and (= |cstrcat_#t~mem0| 0) (= cstrcat_~s~0.offset 1)) (and (or (and (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1)))) (- 1)))) (= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1)))) (- 1)))) (= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (or (and (or (<= 4 (select |#length| cstrcat_~s2.base)) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 3) (+ (select |#length| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1))) (- 1))))) (= 1 cstrcat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1)))))))) (= 0 cstrcat_~s2.offset))), 8959#(or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 cstrcat_~s2.offset) (or (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (or (and (= 2 cstrcat_~s~0.offset) (or (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 4) (+ (select |#length| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= 4 (select |#length| cstrcat_~s2.base)))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 2))))))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)))))] [2018-02-04 01:42:05,799 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 58 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:05,799 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-02-04 01:42:05,799 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-02-04 01:42:05,799 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=635, Unknown=0, NotChecked=0, Total=702 [2018-02-04 01:42:05,799 INFO L87 Difference]: Start difference. First operand 114 states and 122 transitions. Second operand 27 states. [2018-02-04 01:42:06,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:42:06,818 INFO L93 Difference]: Finished difference Result 142 states and 150 transitions. [2018-02-04 01:42:06,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-02-04 01:42:06,819 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 50 [2018-02-04 01:42:06,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:42:06,819 INFO L225 Difference]: With dead ends: 142 [2018-02-04 01:42:06,819 INFO L226 Difference]: Without dead ends: 142 [2018-02-04 01:42:06,820 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 362 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=193, Invalid=1613, Unknown=0, NotChecked=0, Total=1806 [2018-02-04 01:42:06,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-02-04 01:42:06,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 114. [2018-02-04 01:42:06,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-02-04 01:42:06,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 122 transitions. [2018-02-04 01:42:06,821 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 122 transitions. Word has length 50 [2018-02-04 01:42:06,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:42:06,821 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 122 transitions. [2018-02-04 01:42:06,821 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-02-04 01:42:06,821 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 122 transitions. [2018-02-04 01:42:06,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-02-04 01:42:06,822 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:42:06,822 INFO L351 BasicCegarLoop]: trace histogram [11, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:42:06,822 INFO L371 AbstractCegarLoop]: === Iteration 41 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:42:06,822 INFO L82 PathProgramCache]: Analyzing trace with hash -543453996, now seen corresponding path program 9 times [2018-02-04 01:42:06,822 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:42:06,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:42:06,836 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:42:07,635 WARN L146 SmtUtils]: Spent 232ms on a formula simplification. DAG size of input: 187 DAG size of output 77 [2018-02-04 01:42:07,849 WARN L146 SmtUtils]: Spent 190ms on a formula simplification. DAG size of input: 161 DAG size of output 67 [2018-02-04 01:42:08,033 WARN L146 SmtUtils]: Spent 159ms on a formula simplification. DAG size of input: 161 DAG size of output 67 [2018-02-04 01:42:08,216 WARN L146 SmtUtils]: Spent 156ms on a formula simplification. DAG size of input: 163 DAG size of output 67 [2018-02-04 01:42:08,419 WARN L146 SmtUtils]: Spent 169ms on a formula simplification. DAG size of input: 177 DAG size of output 73 [2018-02-04 01:42:08,633 WARN L146 SmtUtils]: Spent 174ms on a formula simplification. DAG size of input: 179 DAG size of output 73 [2018-02-04 01:42:08,800 WARN L146 SmtUtils]: Spent 138ms on a formula simplification. DAG size of input: 122 DAG size of output 64 [2018-02-04 01:42:08,962 WARN L146 SmtUtils]: Spent 126ms on a formula simplification. DAG size of input: 124 DAG size of output 64 [2018-02-04 01:42:09,659 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:09,659 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:42:09,660 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31] total 31 [2018-02-04 01:42:09,660 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:42:09,660 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:09,660 INFO L182 omatonBuilderFactory]: Interpolants [9280#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1)))))), 9281#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 9282#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0)), 9283#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 9284#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))))), 9285#(or (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 9286#(or (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0)), 9287#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))), 9288#(and (or (= |cstrcat_#t~mem0| 0) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (<= 0 cstrcat_~s~0.offset)), 9289#(and (<= 1 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))), 9290#(and (<= 2 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))), 9259#true, 9260#false, 9261#(<= 1 main_~length1~0), 9262#(and (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 9263#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 9264#(and (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 9265#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (= main_~nondetString1~0.offset 0)), 9266#(and (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|)) (= main_~nondetString1~0.offset 0)), 9267#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0) (<= 1 main_~length1~0))) (= main_~nondetString1~0.offset 0)), 9268#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= 1 main_~length3~0) (<= (+ main_~length3~0 1) (+ (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)))) (= main_~nondetString1~0.offset 0)), 9269#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (<= 4 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (- 1)))))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) (+ main_~nondetString2~0.offset (- 1))))) (<= 7 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (- main_~nondetString2~0.offset) 5) (- 1))))) (<= 6 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (and (<= 10 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (select |#length| main_~nondetString2~0.base) (+ main_~nondetString1~0.offset (- 1))) (+ main_~nondetString2~0.offset (- 1))))) (<= 11 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)) (and (<= 9 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) 2) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 8 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) 1) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 5 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 4) (+ main_~nondetString2~0.offset (- 1))))))) (= main_~nondetString1~0.offset 0)), 9270#(and (or (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ 5 1) 1) (- 1)))) (<= 8 (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ 5 1) 2) (- 1)))) (<= 9 (select |#length| |cstrcat_#in~s1.base|))) (and (<= 4 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (<= 5 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 4 (- 1))))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ 5 1) (- 1)))) (<= 7 (select |#length| |cstrcat_#in~s1.base|))) (and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (select |#length| |cstrcat_#in~s1.base|) (- 1)) (- 1)))) (<= 11 (select |#length| |cstrcat_#in~s1.base|))) (<= 10 (select |#length| |cstrcat_#in~s1.base|))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1)) (and (<= 6 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 5 (- 1)))))) (= 0 |cstrcat_#in~s1.offset|)), 9271#(and (= cstrcat_~s~0.offset 0) (or (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1))))) (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (and (<= 9 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 1) (- 1)))) (<= 8 (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base))) (and (or (<= 11 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= 10 (select |#length| cstrcat_~s~0.base))))), 9272#(and (or (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1))))) (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (and (<= 9 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 1) (- 1)))) (<= 8 (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base))) (and (or (<= 11 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= 10 (select |#length| cstrcat_~s~0.base)))) (= cstrcat_~s~0.offset 0)), 9273#(and (or (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1)))))) (= cstrcat_~s~0.offset 1)), 9274#(and (= cstrcat_~s~0.offset 1) (or (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1))))))), 9275#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (or (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)))), 9276#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (or (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)))), 9277#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 9278#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))))), 9279#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))))] [2018-02-04 01:42:09,660 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:09,660 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-02-04 01:42:09,661 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-02-04 01:42:09,661 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=877, Unknown=0, NotChecked=0, Total=992 [2018-02-04 01:42:09,661 INFO L87 Difference]: Start difference. First operand 114 states and 122 transitions. Second operand 32 states. [2018-02-04 01:42:10,234 WARN L143 SmtUtils]: Spent 113ms on a formula simplification that was a NOOP. DAG size: 112 [2018-02-04 01:42:10,658 WARN L146 SmtUtils]: Spent 120ms on a formula simplification. DAG size of input: 129 DAG size of output 123 [2018-02-04 01:42:10,901 WARN L146 SmtUtils]: Spent 112ms on a formula simplification. DAG size of input: 122 DAG size of output 116 [2018-02-04 01:42:11,130 WARN L146 SmtUtils]: Spent 102ms on a formula simplification. DAG size of input: 114 DAG size of output 108 [2018-02-04 01:42:11,445 WARN L146 SmtUtils]: Spent 104ms on a formula simplification. DAG size of input: 108 DAG size of output 102 [2018-02-04 01:42:12,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:42:12,176 INFO L93 Difference]: Finished difference Result 148 states and 158 transitions. [2018-02-04 01:42:12,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-02-04 01:42:12,176 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 50 [2018-02-04 01:42:12,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:42:12,177 INFO L225 Difference]: With dead ends: 148 [2018-02-04 01:42:12,177 INFO L226 Difference]: Without dead ends: 148 [2018-02-04 01:42:12,177 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 613 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=457, Invalid=2623, Unknown=0, NotChecked=0, Total=3080 [2018-02-04 01:42:12,177 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-02-04 01:42:12,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 120. [2018-02-04 01:42:12,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-02-04 01:42:12,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 129 transitions. [2018-02-04 01:42:12,179 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 129 transitions. Word has length 50 [2018-02-04 01:42:12,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:42:12,179 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 129 transitions. [2018-02-04 01:42:12,179 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-02-04 01:42:12,180 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 129 transitions. [2018-02-04 01:42:12,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-02-04 01:42:12,180 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:42:12,180 INFO L351 BasicCegarLoop]: trace histogram [8, 8, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:42:12,180 INFO L371 AbstractCegarLoop]: === Iteration 42 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:42:12,180 INFO L82 PathProgramCache]: Analyzing trace with hash -220821802, now seen corresponding path program 10 times [2018-02-04 01:42:12,181 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:42:12,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:42:12,198 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:42:13,334 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 0 proven. 88 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:13,334 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:42:13,334 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29] total 29 [2018-02-04 01:42:13,334 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:42:13,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:13,335 INFO L182 omatonBuilderFactory]: Interpolants [9607#true, 9608#false, 9609#(<= 1 main_~length3~0), 9610#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0)), 9611#(and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (= (select |#valid| |main_#t~malloc9.base|) 1)), 9612#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~length3~0)), 9613#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|))), 9614#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0)))), 9615#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (= 0 main_~nondetString1~0.offset) (<= 1 main_~length3~0) (<= (+ main_~length3~0 (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base))))), 9616#(and (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)) (and (= 0 main_~nondetString1~0.offset) (or (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (- main_~nondetString2~0.offset) 5) (- 1))))) (<= (+ (select |#length| main_~nondetString1~0.base) 5) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (<= (+ (select |#length| main_~nondetString1~0.base) 4) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 4) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= (+ (select |#length| main_~nondetString1~0.base) 3) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (- 1)))))) (and (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (select |#length| main_~nondetString2~0.base) (- (select |#length| main_~nondetString1~0.base))) (+ main_~nondetString2~0.offset (- 1))))) (<= (+ (select |#length| main_~nondetString1~0.base) 7) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)))) (<= (+ (select |#length| main_~nondetString1~0.base) 6) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))))))) (= 0 main_~nondetString2~0.offset)), 9617#(and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1)) (and (or (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 5) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 5 (- 1))))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 4) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 4 (- 1))))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 3 (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 3) (select |#length| |cstrcat_#in~s1.base|))) (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 6) (select |#length| |cstrcat_#in~s1.base|)) (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (select |#length| |cstrcat_#in~s1.base|) (- (select |#length| |cstrcat_#in~s2.base|))) (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 7) (select |#length| |cstrcat_#in~s1.base|))))) (= 0 |cstrcat_#in~s2.offset|))) (= 0 |cstrcat_#in~s1.offset|)), 9618#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (or (and (or (<= (+ (select |#length| cstrcat_~s2.base) 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- (select |#length| cstrcat_~s2.base))) (- 1))))) (<= (+ (select |#length| cstrcat_~s2.base) 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base)))) (= 0 cstrcat_~s2.offset))) (= cstrcat_~s~0.offset 0)), 9619#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (= 0 cstrcat_~s2.offset) (or (and (or (<= (+ (select |#length| cstrcat_~s2.base) 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- (select |#length| cstrcat_~s2.base))) (- 1))))) (<= (+ (select |#length| cstrcat_~s2.base) 6) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base)))))) (= cstrcat_~s~0.offset 0)), 9620#(and (= cstrcat_~s~0.offset 1) (or (and (= 0 cstrcat_~s2.offset) (or (and (or (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (+ (- (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1)))) (+ cstrcat_~s~0.offset (- 1)))) (- 1))))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)))), 9621#(and (= cstrcat_~s~0.offset 1) (or (and (= 0 cstrcat_~s2.offset) (or (and (or (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (+ (- (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1)))) (+ cstrcat_~s~0.offset (- 1)))) (- 1))))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))))) (= |cstrcat_#t~mem0| 0))), 9622#(or (and (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))))), 9623#(or (= |cstrcat_#t~mem0| 0) (and (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))))), 9624#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))), 9625#(or (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))), 9626#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1)))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 9627#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1)))))) (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1))), 9628#(or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 9629#(or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1))), 9630#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 9631#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))), 9632#(or (and (= |cstrcat_#t~post3.offset| 0) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) cstrcat_~s2.offset) (= |cstrcat_#t~post3.base| cstrcat_~s2.base)) (and (<= (+ |cstrcat_#t~post2.offset| 1) cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))), 9633#(or (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset) (and (<= (+ |cstrcat_#t~post2.offset| 1) cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))), 9634#(or (and (<= 1 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))) (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset)), 9635#(or (and (<= 1 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|))) (<= (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|)), 9636#(and (<= 1 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|)))] [2018-02-04 01:42:13,336 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 0 proven. 88 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:13,336 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-02-04 01:42:13,336 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-02-04 01:42:13,336 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=781, Unknown=0, NotChecked=0, Total=870 [2018-02-04 01:42:13,336 INFO L87 Difference]: Start difference. First operand 120 states and 129 transitions. Second operand 30 states. [2018-02-04 01:42:13,896 WARN L146 SmtUtils]: Spent 101ms on a formula simplification. DAG size of input: 103 DAG size of output 102 [2018-02-04 01:42:14,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:42:14,899 INFO L93 Difference]: Finished difference Result 145 states and 154 transitions. [2018-02-04 01:42:14,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-02-04 01:42:14,899 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 51 [2018-02-04 01:42:14,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:42:14,900 INFO L225 Difference]: With dead ends: 145 [2018-02-04 01:42:14,900 INFO L226 Difference]: Without dead ends: 145 [2018-02-04 01:42:14,900 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 541 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=290, Invalid=2160, Unknown=0, NotChecked=0, Total=2450 [2018-02-04 01:42:14,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-02-04 01:42:14,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 120. [2018-02-04 01:42:14,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-02-04 01:42:14,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 129 transitions. [2018-02-04 01:42:14,902 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 129 transitions. Word has length 51 [2018-02-04 01:42:14,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:42:14,903 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 129 transitions. [2018-02-04 01:42:14,903 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-02-04 01:42:14,903 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 129 transitions. [2018-02-04 01:42:14,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-02-04 01:42:14,903 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:42:14,903 INFO L351 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:42:14,903 INFO L371 AbstractCegarLoop]: === Iteration 43 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:42:14,903 INFO L82 PathProgramCache]: Analyzing trace with hash -1873015767, now seen corresponding path program 11 times [2018-02-04 01:42:14,904 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:42:14,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:42:14,912 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:42:15,374 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:15,375 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:42:15,375 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25] total 25 [2018-02-04 01:42:15,375 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:42:15,375 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:15,375 INFO L182 omatonBuilderFactory]: Interpolants [9942#true, 9943#false, 9944#(<= 1 main_~length3~0), 9945#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0)), 9946#(and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (= (select |#valid| |main_#t~malloc9.base|) 1)), 9947#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~length3~0)), 9948#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|))), 9949#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (= 0 main_~nondetString1~0.offset) (or (and (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0)) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~length1~0 (select |#length| main_~nondetString1~0.base))))), 9950#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (= 0 main_~nondetString1~0.offset) (or (<= (+ main_~nondetString2~0.offset main_~length3~0) 1) (<= (+ main_~length3~0 (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base))) (<= 1 main_~length3~0)))), 9951#(and (= 0 main_~nondetString2~0.offset) (or (and (= 0 main_~nondetString1~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (<= (+ (select |#length| main_~nondetString1~0.base) 3) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (or (<= (+ (select |#length| main_~nondetString1~0.base) 4) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base)) (+ main_~nondetString2~0.offset (- 1))))))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)))), 9952#(and (or (and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (- (select |#length| |cstrcat_#in~s2.base|)) (select |#length| |cstrcat_#in~s1.base|)) (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 4) (select |#length| |cstrcat_#in~s1.base|))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 3) (select |#length| |cstrcat_#in~s1.base|)))) (= 0 |cstrcat_#in~s2.offset|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1))) (= 0 |cstrcat_#in~s1.offset|)), 9953#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (or (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))) (= 0 cstrcat_~s2.offset))) (= cstrcat_~s~0.offset 0)), 9954#(and (= cstrcat_~s~0.offset 0) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (= 0 cstrcat_~s2.offset) (or (= |cstrcat_#t~mem0| 0) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))))))), 9955#(or (and (= 0 cstrcat_~s2.offset) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1)))) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1)))) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))) (and (= cstrcat_~s~0.offset 1) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)))), 9956#(or (and (= |cstrcat_#t~mem0| 0) (= cstrcat_~s~0.offset 1)) (and (= 0 cstrcat_~s2.offset) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1)))) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1)))) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)))), 9957#(and (= 0 cstrcat_~s2.offset) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)))), 9958#(and (= 0 cstrcat_~s2.offset) (or (= |cstrcat_#t~mem0| 0) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)))), 9959#(and (= 0 cstrcat_~s2.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))), 9960#(and (= 0 cstrcat_~s2.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (select |#length| cstrcat_~s~0.base))), 9961#(or (and (= |cstrcat_#t~post3.offset| 0) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) (+ cstrcat_~s2.offset 2)) (= |cstrcat_#t~post3.base| cstrcat_~s2.base)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 9962#(or (<= (select |#length| cstrcat_~s2.base) (+ cstrcat_~s2.offset 2)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 9963#(or (<= (select |#length| cstrcat_~s2.base) (+ cstrcat_~s2.offset 1)) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))), 9964#(and (<= (+ |cstrcat_#t~post2.offset| 1) cstrcat_~s~0.offset) (or (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))), 9965#(and (or (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))) (<= 1 cstrcat_~s~0.offset)), 9966#(and (<= 1 |cstrcat_#t~post2.offset|) (or (<= (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|)))), 9967#(and (<= 1 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|)))] [2018-02-04 01:42:15,376 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:15,376 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-02-04 01:42:15,376 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-02-04 01:42:15,376 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=585, Unknown=0, NotChecked=0, Total=650 [2018-02-04 01:42:15,376 INFO L87 Difference]: Start difference. First operand 120 states and 129 transitions. Second operand 26 states. [2018-02-04 01:42:16,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:42:16,303 INFO L93 Difference]: Finished difference Result 148 states and 157 transitions. [2018-02-04 01:42:16,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-02-04 01:42:16,303 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 52 [2018-02-04 01:42:16,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:42:16,304 INFO L225 Difference]: With dead ends: 148 [2018-02-04 01:42:16,304 INFO L226 Difference]: Without dead ends: 148 [2018-02-04 01:42:16,304 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 434 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=216, Invalid=1854, Unknown=0, NotChecked=0, Total=2070 [2018-02-04 01:42:16,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-02-04 01:42:16,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 125. [2018-02-04 01:42:16,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-02-04 01:42:16,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 134 transitions. [2018-02-04 01:42:16,306 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 134 transitions. Word has length 52 [2018-02-04 01:42:16,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:42:16,307 INFO L432 AbstractCegarLoop]: Abstraction has 125 states and 134 transitions. [2018-02-04 01:42:16,307 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-02-04 01:42:16,307 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 134 transitions. [2018-02-04 01:42:16,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-02-04 01:42:16,307 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:42:16,307 INFO L351 BasicCegarLoop]: trace histogram [7, 7, 6, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:42:16,307 INFO L371 AbstractCegarLoop]: === Iteration 44 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:42:16,307 INFO L82 PathProgramCache]: Analyzing trace with hash 133301058, now seen corresponding path program 12 times [2018-02-04 01:42:16,308 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:42:16,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:42:16,315 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:42:16,849 WARN L146 SmtUtils]: Spent 141ms on a formula simplification. DAG size of input: 202 DAG size of output 87 [2018-02-04 01:42:17,291 WARN L146 SmtUtils]: Spent 111ms on a formula simplification. DAG size of input: 164 DAG size of output 80 [2018-02-04 01:42:17,440 WARN L146 SmtUtils]: Spent 117ms on a formula simplification. DAG size of input: 166 DAG size of output 80 [2018-02-04 01:42:17,963 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 0 proven. 76 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:17,963 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:42:17,963 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27] total 27 [2018-02-04 01:42:17,963 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:42:17,963 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:17,964 INFO L182 omatonBuilderFactory]: Interpolants [10304#(and (or (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) (+ cstrcat_~s2.offset 1)) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~post3.offset| 0) (= |cstrcat_#t~post3.base| cstrcat_~s2.base) (<= 7 cstrcat_~s~0.offset)), 10305#(and (or (<= (select |#length| cstrcat_~s2.base) (+ cstrcat_~s2.offset 1)) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))) (<= 7 cstrcat_~s~0.offset)), 10306#(and (or (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))) (<= 8 cstrcat_~s~0.offset)), 10307#(and (<= 8 |cstrcat_#t~post2.offset|) (or (<= (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|)))), 10308#(and (<= 8 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|))), 10281#true, 10282#false, 10283#(<= 1 main_~length3~0), 10284#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0)), 10285#(and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (= (select |#valid| |main_#t~malloc9.base|) 1)), 10286#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~length3~0) (= main_~nondetString1~0.offset 0)), 10287#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|)) (= main_~nondetString1~0.offset 0)), 10288#(and (= 0 main_~nondetString2~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0) (= main_~nondetString1~0.offset 0)), 10289#(and (= 0 main_~nondetString2~0.offset) (<= 1 main_~length3~0) (<= (+ main_~length3~0 (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 10290#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (<= 9 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (+ (- main_~nondetString1~0.offset) 1))) (+ (- main_~nondetString2~0.offset) (+ main_~nondetString1~0.offset (- 1)))) (- 1))))) (<= 7 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)) (and (<= (+ main_~nondetString1~0.offset (* 2 (select |#length| main_~nondetString1~0.base)) 1) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString2~0.offset) (+ main_~nondetString1~0.offset 1))) (+ main_~nondetString2~0.offset (+ (- main_~nondetString1~0.offset) (- 1))))))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- (+ (- main_~nondetString2~0.offset) 3)) (+ (select |#length| main_~nondetString2~0.base) (- 1))) (+ main_~nondetString1~0.offset (- 1))))) (<= (+ (select |#length| main_~nondetString1~0.base) 4) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)))) (and (<= (+ main_~nondetString1~0.offset (* 2 (select |#length| main_~nondetString1~0.base)) 2) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (or (<= (+ main_~nondetString1~0.offset (* 2 (select |#length| main_~nondetString1~0.base)) 3) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString2~0.offset) (+ main_~nondetString1~0.offset 2))) (- 1))))))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (- (+ (- (+ (- main_~nondetString2~0.offset) 3)) (select |#length| main_~nondetString2~0.base))) (select |#length| main_~nondetString2~0.base)) (- 1))))) (<= (+ (select |#length| main_~nondetString1~0.base) 3) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))))) (= main_~nondetString1~0.offset 0)), 10291#(and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 4) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (- 3) (+ (select |#length| |cstrcat_#in~s1.base|) (- 1))) (- 1))))) (and (<= 7 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ 3 1) (- 1)) (- 1))))) (and (<= (+ (* 2 (select |#length| |cstrcat_#in~s2.base|)) 1) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (select |#length| |cstrcat_#in~s2.base|) 1) (- 1))))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1)) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (- (+ (- 3) (select |#length| |cstrcat_#in~s1.base|))) (select |#length| |cstrcat_#in~s1.base|)) (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 3) (select |#length| |cstrcat_#in~s1.base|))) (and (<= (+ (* 2 (select |#length| |cstrcat_#in~s2.base|)) 2) (select |#length| |cstrcat_#in~s1.base|)) (or (<= (+ (* 2 (select |#length| |cstrcat_#in~s2.base|)) 3) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (select |#length| |cstrcat_#in~s2.base|) 2) (- 1)))))) (<= 9 (select |#length| |cstrcat_#in~s1.base|))) (= 0 |cstrcat_#in~s2.offset|) (= 0 |cstrcat_#in~s1.offset|)), 10292#(and (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- 3) (+ (select |#length| cstrcat_~s~0.base) (- 1))) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base))) (<= 9 (select |#length| cstrcat_~s~0.base)) (and (or (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) 2) (- 1))))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 2) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 1) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) 1) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 3 1) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (+ (- 3) (select |#length| cstrcat_~s~0.base))) (select |#length| cstrcat_~s~0.base)) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base)))) (= 0 cstrcat_~s2.offset) (= cstrcat_~s~0.offset 0)), 10293#(and (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- 3) (+ (select |#length| cstrcat_~s~0.base) (- 1))) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base))) (<= 9 (select |#length| cstrcat_~s~0.base)) (and (or (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) 2) (- 1))))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 2) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) 1) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) 1) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= |cstrcat_#t~mem0| 0) (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 3 1) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (+ (- 3) (select |#length| cstrcat_~s~0.base))) (select |#length| cstrcat_~s~0.base)) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base)))) (= cstrcat_~s~0.offset 0)), 10294#(and (or (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset (+ (- (+ (- (+ cstrcat_~s~0.offset 2)) (+ cstrcat_~s~0.offset (+ (select |#length| cstrcat_~s~0.base) (- 1))))) (+ (select |#length| cstrcat_~s~0.base) (- 1)))) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (+ cstrcat_~s~0.offset 2)) (+ cstrcat_~s~0.offset (+ (select |#length| cstrcat_~s~0.base) (- 2)))) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (= cstrcat_~s~0.offset 1) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset (+ (select |#length| cstrcat_~s2.base) (- 1))) 1) (- 1)))) (and (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)) (or (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset (+ (select |#length| cstrcat_~s2.base) 1)) (- 1))))))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset) (select |#length| cstrcat_~s~0.base)))) (= 0 cstrcat_~s2.offset) (<= 1 cstrcat_~s~0.offset)), 10295#(and (= 0 cstrcat_~s2.offset) (<= 1 cstrcat_~s~0.offset) (or (and (= |cstrcat_#t~mem0| 0) (= cstrcat_~s~0.offset 1)) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset (+ (- (+ (- (+ cstrcat_~s~0.offset 2)) (+ cstrcat_~s~0.offset (+ (select |#length| cstrcat_~s~0.base) (- 1))))) (+ (select |#length| cstrcat_~s~0.base) (- 1)))) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (+ cstrcat_~s~0.offset 2)) (+ cstrcat_~s~0.offset (+ (select |#length| cstrcat_~s~0.base) (- 2)))) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset (+ (select |#length| cstrcat_~s2.base) (- 1))) 1) (- 1)))) (and (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)) (or (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset (+ (select |#length| cstrcat_~s2.base) 1)) (- 1))))))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset) (select |#length| cstrcat_~s~0.base))))), 10296#(and (<= 2 cstrcat_~s~0.offset) (= 0 cstrcat_~s2.offset) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 4)) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (or (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset (+ (select |#length| cstrcat_~s2.base) (- 2))) 2) (- 1))))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset (+ (select |#length| cstrcat_~s2.base) (- 2))) 1) (- 1)))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset) (+ (select |#length| cstrcat_~s~0.base) 1))))), 10297#(and (<= 2 cstrcat_~s~0.offset) (= 0 cstrcat_~s2.offset) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 4)) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (or (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset (+ (select |#length| cstrcat_~s2.base) (- 2))) 2) (- 1))))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset (+ (select |#length| cstrcat_~s2.base) (- 2))) 1) (- 1)))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset) (+ (select |#length| cstrcat_~s~0.base) 1))))), 10298#(and (<= 3 cstrcat_~s~0.offset) (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset (+ (select |#length| cstrcat_~s2.base) (- 1))) (- 1)))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset) (+ (select |#length| cstrcat_~s~0.base) 1))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (<= (select |#length| cstrcat_~s2.base) 2) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)))), 10299#(and (<= 3 cstrcat_~s~0.offset) (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset (+ (select |#length| cstrcat_~s2.base) (- 1))) (- 1)))) (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset) (+ (select |#length| cstrcat_~s~0.base) 1))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= |cstrcat_#t~mem0| 0) (<= (select |#length| cstrcat_~s2.base) 2))), 10300#(and (or (<= (select |#length| cstrcat_~s2.base) 2) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (and (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset) (+ (select |#length| cstrcat_~s~0.base) 2)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)))) (= 0 cstrcat_~s2.offset) (<= 4 cstrcat_~s~0.offset)), 10301#(and (= 0 cstrcat_~s2.offset) (<= 4 cstrcat_~s~0.offset) (or (<= (select |#length| cstrcat_~s2.base) 2) (and (<= (+ (* 2 (select |#length| cstrcat_~s2.base)) cstrcat_~s~0.offset) (+ (select |#length| cstrcat_~s~0.base) 2)) (= |cstrcat_#t~mem0| 0)) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 10302#(and (<= 5 cstrcat_~s~0.offset) (= 0 cstrcat_~s2.offset) (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (<= (select |#length| cstrcat_~s2.base) 2))), 10303#(and (= 0 cstrcat_~s2.offset) (or (<= (select |#length| cstrcat_~s2.base) 2) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= 6 cstrcat_~s~0.offset))] [2018-02-04 01:42:17,964 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 0 proven. 76 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:17,964 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-02-04 01:42:17,964 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-02-04 01:42:17,964 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=692, Unknown=0, NotChecked=0, Total=756 [2018-02-04 01:42:17,964 INFO L87 Difference]: Start difference. First operand 125 states and 134 transitions. Second operand 28 states. [2018-02-04 01:42:18,605 WARN L146 SmtUtils]: Spent 125ms on a formula simplification. DAG size of input: 145 DAG size of output 144 [2018-02-04 01:42:19,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:42:19,397 INFO L93 Difference]: Finished difference Result 152 states and 161 transitions. [2018-02-04 01:42:19,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-02-04 01:42:19,397 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 53 [2018-02-04 01:42:19,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:42:19,398 INFO L225 Difference]: With dead ends: 152 [2018-02-04 01:42:19,398 INFO L226 Difference]: Without dead ends: 152 [2018-02-04 01:42:19,398 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 362 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=165, Invalid=1815, Unknown=0, NotChecked=0, Total=1980 [2018-02-04 01:42:19,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-02-04 01:42:19,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 125. [2018-02-04 01:42:19,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-02-04 01:42:19,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 134 transitions. [2018-02-04 01:42:19,399 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 134 transitions. Word has length 53 [2018-02-04 01:42:19,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:42:19,399 INFO L432 AbstractCegarLoop]: Abstraction has 125 states and 134 transitions. [2018-02-04 01:42:19,400 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-02-04 01:42:19,400 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 134 transitions. [2018-02-04 01:42:19,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-02-04 01:42:19,400 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:42:19,400 INFO L351 BasicCegarLoop]: trace histogram [12, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:42:19,400 INFO L371 AbstractCegarLoop]: === Iteration 45 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:42:19,400 INFO L82 PathProgramCache]: Analyzing trace with hash 1988666113, now seen corresponding path program 10 times [2018-02-04 01:42:19,400 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:42:19,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:42:19,410 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:42:20,564 WARN L146 SmtUtils]: Spent 442ms on a formula simplification. DAG size of input: 347 DAG size of output 83 [2018-02-04 01:42:20,915 WARN L146 SmtUtils]: Spent 312ms on a formula simplification. DAG size of input: 309 DAG size of output 74 [2018-02-04 01:42:21,225 WARN L146 SmtUtils]: Spent 271ms on a formula simplification. DAG size of input: 309 DAG size of output 74 [2018-02-04 01:42:21,530 WARN L146 SmtUtils]: Spent 261ms on a formula simplification. DAG size of input: 311 DAG size of output 74 [2018-02-04 01:42:21,904 WARN L146 SmtUtils]: Spent 323ms on a formula simplification. DAG size of input: 326 DAG size of output 81 [2018-02-04 01:42:22,280 WARN L146 SmtUtils]: Spent 319ms on a formula simplification. DAG size of input: 328 DAG size of output 81 [2018-02-04 01:42:22,531 WARN L146 SmtUtils]: Spent 203ms on a formula simplification. DAG size of input: 220 DAG size of output 72 [2018-02-04 01:42:22,800 WARN L146 SmtUtils]: Spent 224ms on a formula simplification. DAG size of input: 222 DAG size of output 72 [2018-02-04 01:42:22,952 WARN L146 SmtUtils]: Spent 114ms on a formula simplification. DAG size of input: 145 DAG size of output 64 [2018-02-04 01:42:23,111 WARN L146 SmtUtils]: Spent 121ms on a formula simplification. DAG size of input: 147 DAG size of output 64 [2018-02-04 01:42:23,877 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:23,877 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:42:23,877 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34] total 34 [2018-02-04 01:42:23,877 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:42:23,877 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:23,878 INFO L182 omatonBuilderFactory]: Interpolants [10624#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 10625#(and (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 10626#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (= main_~nondetString1~0.offset 0)), 10627#(and (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|)) (= main_~nondetString1~0.offset 0)), 10628#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0) (<= 1 main_~length1~0))) (= main_~nondetString1~0.offset 0)), 10629#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= 1 main_~length3~0) (<= (+ main_~length3~0 1) (+ (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)))) (= main_~nondetString1~0.offset 0)), 10630#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (<= 4 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (- 1)))))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) (+ main_~nondetString2~0.offset (- 1))))) (<= 7 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (select |#length| main_~nondetString2~0.base) (+ main_~nondetString1~0.offset (- 1))) (+ main_~nondetString2~0.offset (- 1))))) (<= 9 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (and (<= 6 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 5) (+ main_~nondetString2~0.offset (- 1)))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)) (and (<= 8 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) 1) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 5 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 4) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 10 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) 2) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 11 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) 2) 1) (+ main_~nondetString2~0.offset (- 1))))) (<= 12 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))))) (= main_~nondetString1~0.offset 0)), 10631#(and (or (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ 5 1) 1) (- 1)))) (<= 8 (select |#length| |cstrcat_#in~s1.base|))) (and (<= 10 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ 5 1) 2) (- 1))))) (and (<= 4 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (<= 5 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 4 (- 1))))) (and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ 5 1) 2) 1) (- 1)))) (<= 12 (select |#length| |cstrcat_#in~s1.base|))) (<= 11 (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ 5 1) (- 1)))) (<= 7 (select |#length| |cstrcat_#in~s1.base|))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1)) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (select |#length| |cstrcat_#in~s1.base|) (- 1)) (- 1)))) (<= 9 (select |#length| |cstrcat_#in~s1.base|))) (and (<= 6 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 5 (- 1)))))) (= 0 |cstrcat_#in~s1.offset|)), 10632#(and (or (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1))))) (and (<= 11 (select |#length| cstrcat_~s~0.base)) (or (<= 12 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 1) 2) 1) (- 1)))))) (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 1) (- 1)))) (<= 8 (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 2) (- 1)))) (<= 10 (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= 9 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base)))) (= cstrcat_~s~0.offset 0)), 10633#(and (or (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1))))) (and (<= 11 (select |#length| cstrcat_~s~0.base)) (or (<= 12 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 1) 2) 1) (- 1)))))) (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 1) (- 1)))) (<= 8 (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 2) (- 1)))) (<= 10 (select |#length| cstrcat_~s~0.base))) (and (<= 9 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base)))) (= cstrcat_~s~0.offset 0)), 10634#(and (= cstrcat_~s~0.offset 1) (or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) 1) (- 1))))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1))))))), 10635#(and (or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) 1) (- 1))))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1)))))) (= cstrcat_~s~0.offset 1)), 10636#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)))), 10637#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)))), 10638#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))))), 10639#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))))), 10640#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 10641#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 10642#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1))))))), 10643#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1))))))), 10644#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 10645#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 10646#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 10647#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))))), 10648#(or (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 10649#(or (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0)), 10650#(or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 10651#(or (= |cstrcat_#t~mem0| 0) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 10652#(<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)), 10653#(and (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (<= 0 cstrcat_~s~0.offset)), 10654#(and (<= 1 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))), 10620#true, 10621#false, 10622#(<= 1 main_~length1~0), 10623#(and (<= 1 main_~length3~0) (<= 1 main_~length1~0))] [2018-02-04 01:42:23,878 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:23,878 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-02-04 01:42:23,878 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-02-04 01:42:23,878 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=152, Invalid=1038, Unknown=0, NotChecked=0, Total=1190 [2018-02-04 01:42:23,878 INFO L87 Difference]: Start difference. First operand 125 states and 134 transitions. Second operand 35 states. [2018-02-04 01:42:24,668 WARN L146 SmtUtils]: Spent 159ms on a formula simplification. DAG size of input: 145 DAG size of output 144 [2018-02-04 01:42:24,813 WARN L146 SmtUtils]: Spent 108ms on a formula simplification. DAG size of input: 137 DAG size of output 131 [2018-02-04 01:42:24,972 WARN L146 SmtUtils]: Spent 136ms on a formula simplification. DAG size of input: 140 DAG size of output 137 [2018-02-04 01:42:25,244 WARN L146 SmtUtils]: Spent 122ms on a formula simplification. DAG size of input: 133 DAG size of output 130 [2018-02-04 01:42:25,517 WARN L146 SmtUtils]: Spent 124ms on a formula simplification. DAG size of input: 125 DAG size of output 122 [2018-02-04 01:42:25,871 WARN L146 SmtUtils]: Spent 103ms on a formula simplification. DAG size of input: 119 DAG size of output 116 [2018-02-04 01:42:26,198 WARN L146 SmtUtils]: Spent 136ms on a formula simplification. DAG size of input: 112 DAG size of output 109 [2018-02-04 01:42:26,370 WARN L146 SmtUtils]: Spent 113ms on a formula simplification. DAG size of input: 103 DAG size of output 97 [2018-02-04 01:42:27,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:42:27,051 INFO L93 Difference]: Finished difference Result 166 states and 177 transitions. [2018-02-04 01:42:27,051 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-02-04 01:42:27,051 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 53 [2018-02-04 01:42:27,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:42:27,052 INFO L225 Difference]: With dead ends: 166 [2018-02-04 01:42:27,052 INFO L226 Difference]: Without dead ends: 166 [2018-02-04 01:42:27,053 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 733 ImplicationChecksByTransitivity, 6.6s TimeCoverageRelationStatistics Valid=579, Invalid=3081, Unknown=0, NotChecked=0, Total=3660 [2018-02-04 01:42:27,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-02-04 01:42:27,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 131. [2018-02-04 01:42:27,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-02-04 01:42:27,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 141 transitions. [2018-02-04 01:42:27,054 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 141 transitions. Word has length 53 [2018-02-04 01:42:27,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:42:27,054 INFO L432 AbstractCegarLoop]: Abstraction has 131 states and 141 transitions. [2018-02-04 01:42:27,054 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-02-04 01:42:27,054 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 141 transitions. [2018-02-04 01:42:27,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-02-04 01:42:27,055 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:42:27,055 INFO L351 BasicCegarLoop]: trace histogram [9, 9, 8, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:42:27,055 INFO L371 AbstractCegarLoop]: === Iteration 46 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:42:27,055 INFO L82 PathProgramCache]: Analyzing trace with hash 965490249, now seen corresponding path program 13 times [2018-02-04 01:42:27,055 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:42:27,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:42:27,072 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:42:27,516 WARN L146 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 128 DAG size of output 68 [2018-02-04 01:42:28,537 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:28,537 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:42:28,537 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31] total 31 [2018-02-04 01:42:28,538 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:42:28,538 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:28,538 INFO L182 omatonBuilderFactory]: Interpolants [11008#(and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (= (select |#valid| |main_#t~malloc9.base|) 1)), 11009#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~length3~0)), 11010#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|))), 11011#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0)), 11012#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (<= 1 main_~length3~0) (<= (+ main_~length3~0 (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base))), 11013#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (or (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (- main_~nondetString2~0.offset) 5) (- 1))))) (<= (+ (select |#length| main_~nondetString1~0.base) 5) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (<= (+ (select |#length| main_~nondetString1~0.base) 7) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (or (<= (+ (select |#length| main_~nondetString1~0.base) 8) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) 1) (+ main_~nondetString2~0.offset (- 1))))))) (and (<= (+ (select |#length| main_~nondetString1~0.base) 4) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 4) (+ main_~nondetString2~0.offset (- 1)))))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) (+ main_~nondetString2~0.offset (- 1))))) (<= (+ (select |#length| main_~nondetString1~0.base) 6) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)) (and (<= (+ (select |#length| main_~nondetString1~0.base) 3) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (- 1)))))))), 11014#(and (= 0 |cstrcat_#in~s2.offset|) (or (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 5) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 5 (- 1))))) (and (or (<= (+ (select |#length| |cstrcat_#in~s2.base|) 8) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ 5 1) 1) (- 1))))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 7) (select |#length| |cstrcat_#in~s1.base|))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 4) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 4 (- 1))))) (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 6) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ 5 1) (- 1))))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1)) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 3 (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 3) (select |#length| |cstrcat_#in~s1.base|)))) (= 0 |cstrcat_#in~s1.offset|)), 11015#(and (= 0 cstrcat_~s2.offset) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 6) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 8) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) 7) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base)))) (= cstrcat_~s~0.offset 0)), 11016#(and (= 0 cstrcat_~s2.offset) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 6) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 8) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) 7) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base)))) (= cstrcat_~s~0.offset 0)), 11017#(and (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)))) (and (= cstrcat_~s~0.offset 1) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))) (= 0 cstrcat_~s2.offset)), 11018#(and (= 0 cstrcat_~s2.offset) (or (and (= |cstrcat_#t~mem0| 0) (= cstrcat_~s~0.offset 1)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))))), 11019#(and (= 0 cstrcat_~s2.offset) (or (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))))), 11020#(and (or (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))) (= 0 cstrcat_~s2.offset)), 11021#(or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))))), 11022#(or (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))))), 11023#(or (and (= 0 cstrcat_~s2.offset) (or (and (or (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 11024#(or (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (or (and (or (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))))), 11025#(or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 cstrcat_~s2.offset) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)))), 11026#(or (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)))), 11027#(and (= 0 cstrcat_~s2.offset) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)))), 11028#(and (= 0 cstrcat_~s2.offset) (or (= |cstrcat_#t~mem0| 0) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)))), 11029#(and (= 0 cstrcat_~s2.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))), 11030#(and (= 0 cstrcat_~s2.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (select |#length| cstrcat_~s~0.base))), 11031#(and (<= (+ |cstrcat_#t~post2.offset| 1) cstrcat_~s~0.offset) (= |cstrcat_#t~post3.offset| 0) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset| cstrcat_~s~0.offset) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~post3.base| cstrcat_~s2.base)), 11032#(and (<= (+ |cstrcat_#t~post2.offset| 1) cstrcat_~s~0.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base)))), 11033#(and (<= 1 cstrcat_~s~0.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base)))), 11034#(and (<= 1 |cstrcat_#t~post2.offset|) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post2.offset|) (+ (select |#length| |cstrcat_#t~post2.base|) |cstrcat_#t~post3.offset|))), 11035#(and (<= 1 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|))), 11004#true, 11005#false, 11006#(<= 1 main_~length3~0), 11007#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0))] [2018-02-04 01:42:28,538 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:28,538 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-02-04 01:42:28,538 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-02-04 01:42:28,539 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=896, Unknown=0, NotChecked=0, Total=992 [2018-02-04 01:42:28,539 INFO L87 Difference]: Start difference. First operand 131 states and 141 transitions. Second operand 32 states. [2018-02-04 01:42:29,180 WARN L146 SmtUtils]: Spent 110ms on a formula simplification. DAG size of input: 117 DAG size of output 116 [2018-02-04 01:42:30,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:42:30,361 INFO L93 Difference]: Finished difference Result 157 states and 167 transitions. [2018-02-04 01:42:30,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-02-04 01:42:30,361 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 54 [2018-02-04 01:42:30,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:42:30,361 INFO L225 Difference]: With dead ends: 157 [2018-02-04 01:42:30,361 INFO L226 Difference]: Without dead ends: 116 [2018-02-04 01:42:30,362 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 676 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=351, Invalid=2729, Unknown=0, NotChecked=0, Total=3080 [2018-02-04 01:42:30,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-02-04 01:42:30,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2018-02-04 01:42:30,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-02-04 01:42:30,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 121 transitions. [2018-02-04 01:42:30,363 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 121 transitions. Word has length 54 [2018-02-04 01:42:30,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:42:30,363 INFO L432 AbstractCegarLoop]: Abstraction has 116 states and 121 transitions. [2018-02-04 01:42:30,363 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-02-04 01:42:30,364 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 121 transitions. [2018-02-04 01:42:30,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-02-04 01:42:30,364 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:42:30,364 INFO L351 BasicCegarLoop]: trace histogram [13, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:42:30,364 INFO L371 AbstractCegarLoop]: === Iteration 47 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:42:30,364 INFO L82 PathProgramCache]: Analyzing trace with hash -426753612, now seen corresponding path program 11 times [2018-02-04 01:42:30,364 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:42:30,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:42:30,375 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:42:32,225 WARN L146 SmtUtils]: Spent 508ms on a formula simplification. DAG size of input: 363 DAG size of output 91 [2018-02-04 01:42:32,612 WARN L146 SmtUtils]: Spent 342ms on a formula simplification. DAG size of input: 322 DAG size of output 81 [2018-02-04 01:42:32,993 WARN L146 SmtUtils]: Spent 335ms on a formula simplification. DAG size of input: 322 DAG size of output 81 [2018-02-04 01:42:33,378 WARN L146 SmtUtils]: Spent 334ms on a formula simplification. DAG size of input: 324 DAG size of output 81 [2018-02-04 01:42:33,828 WARN L146 SmtUtils]: Spent 392ms on a formula simplification. DAG size of input: 340 DAG size of output 89 [2018-02-04 01:42:34,248 WARN L146 SmtUtils]: Spent 357ms on a formula simplification. DAG size of input: 342 DAG size of output 89 [2018-02-04 01:42:34,564 WARN L146 SmtUtils]: Spent 264ms on a formula simplification. DAG size of input: 234 DAG size of output 80 [2018-02-04 01:42:34,975 WARN L146 SmtUtils]: Spent 357ms on a formula simplification. DAG size of input: 236 DAG size of output 80 [2018-02-04 01:42:35,180 WARN L146 SmtUtils]: Spent 161ms on a formula simplification. DAG size of input: 165 DAG size of output 71 [2018-02-04 01:42:35,390 WARN L146 SmtUtils]: Spent 164ms on a formula simplification. DAG size of input: 167 DAG size of output 71 [2018-02-04 01:42:35,559 WARN L146 SmtUtils]: Spent 125ms on a formula simplification. DAG size of input: 122 DAG size of output 64 [2018-02-04 01:42:35,716 WARN L146 SmtUtils]: Spent 117ms on a formula simplification. DAG size of input: 124 DAG size of output 64 [2018-02-04 01:42:36,440 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:36,441 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:42:36,441 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35] total 35 [2018-02-04 01:42:36,441 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:42:36,441 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:36,442 INFO L182 omatonBuilderFactory]: Interpolants [11392#(and (<= 4 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))), 11357#true, 11358#false, 11359#(<= 1 main_~length1~0), 11360#(and (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 11361#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 11362#(and (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 11363#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (= main_~nondetString1~0.offset 0)), 11364#(and (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|)) (= main_~nondetString1~0.offset 0)), 11365#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0) (<= 1 main_~length1~0)) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~nondetString1~0.offset 0)), 11366#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= 1 main_~length3~0) (<= (+ main_~length3~0 1) (+ (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~nondetString1~0.offset 0)), 11367#(and (= 0 main_~nondetString2~0.offset) (= main_~nondetString1~0.offset 0) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (<= 4 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (- 1)))))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) (+ main_~nondetString2~0.offset (- 1))))) (<= 7 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (and (or (<= 13 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ main_~nondetString1~0.offset (+ (select |#length| main_~nondetString2~0.base) (- 1))) (+ main_~nondetString2~0.offset (- 1)))))) (<= 12 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (- main_~nondetString2~0.offset) 5) (- 1))))) (<= 6 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (and (<= 8 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (- main_~nondetString2~0.offset) 5) 2) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 10 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 2) 1) 1) (+ main_~nondetString2~0.offset (- 1)))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)) (and (<= 5 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 4) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 11 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 2) 1) 2) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 9 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 2) 1) (+ main_~nondetString2~0.offset (- 1)))))))), 11368#(and (or (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ 5 2) 1) (- 1)))) (<= 9 (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ 5 2) 1) 2) (- 1)))) (<= 11 (select |#length| |cstrcat_#in~s1.base|))) (and (<= 4 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (<= 5 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 4 (- 1))))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ 5 1) (- 1)))) (<= 7 (select |#length| |cstrcat_#in~s1.base|))) (and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (select |#length| |cstrcat_#in~s1.base|) (- 1)) (- 1)))) (<= 13 (select |#length| |cstrcat_#in~s1.base|))) (<= 12 (select |#length| |cstrcat_#in~s1.base|))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1)) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ 5 2) 1) 1) (- 1)))) (<= 10 (select |#length| |cstrcat_#in~s1.base|))) (and (<= 6 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 5 (- 1))))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ 5 2) (- 1)))) (<= 8 (select |#length| |cstrcat_#in~s1.base|)))) (= 0 |cstrcat_#in~s1.offset|)), 11369#(and (or (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1))))) (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (<= 9 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 2) 1) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= 13 (select |#length| cstrcat_~s~0.base))) (<= 12 (select |#length| cstrcat_~s~0.base))) (and (<= 10 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 2) 1) 1) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 2) (- 1)))) (<= 8 (select |#length| cstrcat_~s~0.base))) (and (<= 11 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 2) 1) 2) (- 1)))))) (= cstrcat_~s~0.offset 0)), 11370#(and (or (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1))))) (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (<= 9 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 2) 1) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= 13 (select |#length| cstrcat_~s~0.base))) (<= 12 (select |#length| cstrcat_~s~0.base))) (and (<= 10 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 2) 1) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 2) (- 1)))) (<= 8 (select |#length| cstrcat_~s~0.base))) (and (<= 11 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 2) 1) 2) (- 1)))))) (= cstrcat_~s~0.offset 0)), 11371#(and (or (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) 1) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 2) (- 1)))))) (= cstrcat_~s~0.offset 1)), 11372#(and (= cstrcat_~s~0.offset 1) (or (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 2) (- 1))))))), 11373#(or (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 11374#(or (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 11375#(or (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1)))))), 11376#(or (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1)))))), 11377#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (or (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)))), 11378#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (or (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)))), 11379#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 11380#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))))), 11381#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1)))))), 11382#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1)))))), 11383#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 11384#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0)), 11385#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 11386#(or (and (or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))))) (<= 0 cstrcat_~s~0.offset)) (= |cstrcat_#t~mem0| 0)), 11387#(or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= 1 cstrcat_~s~0.offset) (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)))), 11388#(or (= |cstrcat_#t~mem0| 0) (and (<= 1 cstrcat_~s~0.offset) (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)))), 11389#(and (<= 2 cstrcat_~s~0.offset) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))), 11390#(and (<= 2 cstrcat_~s~0.offset) (or (= |cstrcat_#t~mem0| 0) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))), 11391#(and (<= 3 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)))] [2018-02-04 01:42:36,442 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:36,442 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-02-04 01:42:36,442 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-02-04 01:42:36,442 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=133, Invalid=1127, Unknown=0, NotChecked=0, Total=1260 [2018-02-04 01:42:36,442 INFO L87 Difference]: Start difference. First operand 116 states and 121 transitions. Second operand 36 states. [2018-02-04 01:42:37,403 WARN L146 SmtUtils]: Spent 132ms on a formula simplification. DAG size of input: 153 DAG size of output 144 [2018-02-04 01:42:37,621 WARN L146 SmtUtils]: Spent 187ms on a formula simplification. DAG size of input: 164 DAG size of output 151 [2018-02-04 01:42:37,785 WARN L146 SmtUtils]: Spent 122ms on a formula simplification. DAG size of input: 146 DAG size of output 136 [2018-02-04 01:42:37,964 WARN L146 SmtUtils]: Spent 152ms on a formula simplification. DAG size of input: 157 DAG size of output 143 [2018-02-04 01:42:38,115 WARN L146 SmtUtils]: Spent 108ms on a formula simplification. DAG size of input: 143 DAG size of output 130 [2018-02-04 01:42:38,295 WARN L146 SmtUtils]: Spent 148ms on a formula simplification. DAG size of input: 154 DAG size of output 137 [2018-02-04 01:42:38,448 WARN L146 SmtUtils]: Spent 107ms on a formula simplification. DAG size of input: 136 DAG size of output 123 [2018-02-04 01:42:38,627 WARN L146 SmtUtils]: Spent 148ms on a formula simplification. DAG size of input: 147 DAG size of output 130 [2018-02-04 01:42:38,968 WARN L146 SmtUtils]: Spent 171ms on a formula simplification. DAG size of input: 139 DAG size of output 122 [2018-02-04 01:42:39,242 WARN L146 SmtUtils]: Spent 113ms on a formula simplification. DAG size of input: 133 DAG size of output 116 [2018-02-04 01:42:39,503 WARN L146 SmtUtils]: Spent 103ms on a formula simplification. DAG size of input: 124 DAG size of output 111 [2018-02-04 01:42:40,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:42:40,232 INFO L93 Difference]: Finished difference Result 137 states and 144 transitions. [2018-02-04 01:42:40,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-02-04 01:42:40,233 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 56 [2018-02-04 01:42:40,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:42:40,233 INFO L225 Difference]: With dead ends: 137 [2018-02-04 01:42:40,233 INFO L226 Difference]: Without dead ends: 137 [2018-02-04 01:42:40,233 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 826 ImplicationChecksByTransitivity, 8.1s TimeCoverageRelationStatistics Valid=548, Invalid=3484, Unknown=0, NotChecked=0, Total=4032 [2018-02-04 01:42:40,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-02-04 01:42:40,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 122. [2018-02-04 01:42:40,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-02-04 01:42:40,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 128 transitions. [2018-02-04 01:42:40,235 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 128 transitions. Word has length 56 [2018-02-04 01:42:40,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:42:40,235 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 128 transitions. [2018-02-04 01:42:40,235 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-02-04 01:42:40,235 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 128 transitions. [2018-02-04 01:42:40,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-02-04 01:42:40,235 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:42:40,235 INFO L351 BasicCegarLoop]: trace histogram [10, 10, 9, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:42:40,235 INFO L371 AbstractCegarLoop]: === Iteration 48 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:42:40,236 INFO L82 PathProgramCache]: Analyzing trace with hash -898077194, now seen corresponding path program 14 times [2018-02-04 01:42:40,236 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:42:40,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:42:40,251 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:42:40,712 WARN L146 SmtUtils]: Spent 134ms on a formula simplification. DAG size of input: 166 DAG size of output 78 [2018-02-04 01:42:41,309 WARN L146 SmtUtils]: Spent 102ms on a formula simplification. DAG size of input: 154 DAG size of output 72 [2018-02-04 01:42:42,097 INFO L134 CoverageAnalysis]: Checked inductivity of 139 backedges. 0 proven. 139 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:42,097 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:42:42,097 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33] total 33 [2018-02-04 01:42:42,097 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:42:42,097 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:42,098 INFO L182 omatonBuilderFactory]: Interpolants [11712#(and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (= (select |#valid| |main_#t~malloc9.base|) 1)), 11713#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~length3~0)), 11714#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|))), 11715#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0)) (= (+ main_~nondetString2~0.offset main_~length3~0) 1))), 11716#(and (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (= (+ main_~nondetString2~0.offset main_~length3~0) 1) (and (= 0 main_~nondetString1~0.offset) (<= 1 main_~length3~0) (<= (+ main_~length3~0 (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base)))) (= 0 main_~nondetString2~0.offset)), 11717#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)) (and (or (and (<= (+ (select |#length| main_~nondetString1~0.base) 5) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 5) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= (+ (select |#length| main_~nondetString1~0.base) 4) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 4) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= (+ (select |#length| main_~nondetString1~0.base) 7) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (- main_~nondetString2~0.offset) 6) 1) (+ main_~nondetString2~0.offset (- 1)))))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (- main_~nondetString2~0.offset) 6) (- 1))))) (<= (+ (select |#length| main_~nondetString1~0.base) 6) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)))) (and (or (<= (+ (select |#length| main_~nondetString1~0.base) 9) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (- main_~nondetString2~0.offset) 6) 1) 1) (+ main_~nondetString2~0.offset (- 1)))))) (<= (+ (select |#length| main_~nondetString1~0.base) 8) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)))) (and (<= (+ (select |#length| main_~nondetString1~0.base) 3) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (- 1))))))) (= 0 main_~nondetString1~0.offset)))), 11718#(and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1)) (and (= 0 |cstrcat_#in~s2.offset|) (or (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ 6 1) (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 7) (select |#length| |cstrcat_#in~s1.base|))) (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 5) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 5 (- 1))))) (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 6) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 6 (- 1))))) (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 8) (select |#length| |cstrcat_#in~s1.base|)) (or (<= (+ (select |#length| |cstrcat_#in~s2.base|) 9) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ 6 1) 1) (- 1)))))) (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 4) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 4 (- 1))))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 3 (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 3) (select |#length| |cstrcat_#in~s1.base|)))))) (= 0 |cstrcat_#in~s1.offset|)), 11719#(and (or (and (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 6 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 7) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 6 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 9) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) 8) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 6 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))) (= cstrcat_~s~0.offset 0)), 11720#(and (or (and (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 6 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 7) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 6 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 9) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) 8) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 6 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= |cstrcat_#t~mem0| 0)) (= cstrcat_~s~0.offset 0)), 11721#(or (and (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 5) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 5) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 5) 1) 1) (- 1)))))))) (and (= cstrcat_~s~0.offset 1) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)))), 11722#(or (and (= |cstrcat_#t~mem0| 0) (= cstrcat_~s~0.offset 1)) (and (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 5) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 5) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 5) 1) 1) (- 1))))))))), 11723#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))))), 11724#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))))), 11725#(or (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))))), 11726#(or (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))))), 11727#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1))))))), 11728#(or (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1))))))), 11729#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 11730#(or (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 11731#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (or (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)))), 11732#(or (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (or (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)))), 11733#(or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 11734#(or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1))), 11735#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 11736#(and (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= 0 cstrcat_~s~0.offset)), 11737#(and (<= 1 cstrcat_~s~0.offset) (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)))), 11738#(and (<= 2 cstrcat_~s~0.offset) (or (and (= |cstrcat_#t~post3.offset| 0) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) cstrcat_~s2.offset) (= |cstrcat_#t~post3.base| cstrcat_~s2.base)) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))), 11739#(and (<= 2 cstrcat_~s~0.offset) (or (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))), 11740#(and (<= 2 |cstrcat_#t~post2.offset|) (or (<= (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|)))), 11741#(and (<= 2 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|))), 11708#true, 11709#false, 11710#(<= 1 main_~length3~0), 11711#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0))] [2018-02-04 01:42:42,098 INFO L134 CoverageAnalysis]: Checked inductivity of 139 backedges. 0 proven. 139 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:42,098 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-02-04 01:42:42,101 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-02-04 01:42:42,101 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=1003, Unknown=0, NotChecked=0, Total=1122 [2018-02-04 01:42:42,101 INFO L87 Difference]: Start difference. First operand 122 states and 128 transitions. Second operand 34 states. [2018-02-04 01:42:42,993 WARN L146 SmtUtils]: Spent 120ms on a formula simplification. DAG size of input: 135 DAG size of output 134 [2018-02-04 01:42:43,431 WARN L146 SmtUtils]: Spent 114ms on a formula simplification. DAG size of input: 124 DAG size of output 121 [2018-02-04 01:42:43,677 WARN L146 SmtUtils]: Spent 100ms on a formula simplification. DAG size of input: 117 DAG size of output 114 [2018-02-04 01:42:43,912 WARN L146 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 110 DAG size of output 107 [2018-02-04 01:42:44,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:42:44,652 INFO L93 Difference]: Finished difference Result 132 states and 138 transitions. [2018-02-04 01:42:44,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-02-04 01:42:44,652 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 57 [2018-02-04 01:42:44,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:42:44,652 INFO L225 Difference]: With dead ends: 132 [2018-02-04 01:42:44,652 INFO L226 Difference]: Without dead ends: 132 [2018-02-04 01:42:44,653 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 714 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=399, Invalid=2793, Unknown=0, NotChecked=0, Total=3192 [2018-02-04 01:42:44,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-02-04 01:42:44,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 127. [2018-02-04 01:42:44,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-02-04 01:42:44,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 133 transitions. [2018-02-04 01:42:44,655 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 133 transitions. Word has length 57 [2018-02-04 01:42:44,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:42:44,655 INFO L432 AbstractCegarLoop]: Abstraction has 127 states and 133 transitions. [2018-02-04 01:42:44,655 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-02-04 01:42:44,655 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 133 transitions. [2018-02-04 01:42:44,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-02-04 01:42:44,655 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:42:44,655 INFO L351 BasicCegarLoop]: trace histogram [14, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:42:44,655 INFO L371 AbstractCegarLoop]: === Iteration 49 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:42:44,656 INFO L82 PathProgramCache]: Analyzing trace with hash -313703903, now seen corresponding path program 12 times [2018-02-04 01:42:44,656 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:42:44,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:42:44,668 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:42:47,411 WARN L146 SmtUtils]: Spent 882ms on a formula simplification. DAG size of input: 687 DAG size of output 97 [2018-02-04 01:42:48,239 WARN L146 SmtUtils]: Spent 760ms on a formula simplification. DAG size of input: 646 DAG size of output 89 [2018-02-04 01:42:49,134 WARN L146 SmtUtils]: Spent 819ms on a formula simplification. DAG size of input: 646 DAG size of output 87 [2018-02-04 01:42:49,966 WARN L146 SmtUtils]: Spent 735ms on a formula simplification. DAG size of input: 648 DAG size of output 87 [2018-02-04 01:42:50,927 WARN L146 SmtUtils]: Spent 867ms on a formula simplification. DAG size of input: 664 DAG size of output 95 [2018-02-04 01:42:51,857 WARN L146 SmtUtils]: Spent 812ms on a formula simplification. DAG size of input: 666 DAG size of output 95 [2018-02-04 01:42:52,476 WARN L146 SmtUtils]: Spent 536ms on a formula simplification. DAG size of input: 448 DAG size of output 86 [2018-02-04 01:42:53,186 WARN L146 SmtUtils]: Spent 624ms on a formula simplification. DAG size of input: 450 DAG size of output 86 [2018-02-04 01:42:53,574 WARN L146 SmtUtils]: Spent 315ms on a formula simplification. DAG size of input: 314 DAG size of output 79 [2018-02-04 01:42:53,964 WARN L146 SmtUtils]: Spent 321ms on a formula simplification. DAG size of input: 316 DAG size of output 79 [2018-02-04 01:42:54,229 WARN L146 SmtUtils]: Spent 208ms on a formula simplification. DAG size of input: 220 DAG size of output 72 [2018-02-04 01:42:54,495 WARN L146 SmtUtils]: Spent 206ms on a formula simplification. DAG size of input: 222 DAG size of output 72 [2018-02-04 01:42:54,653 WARN L146 SmtUtils]: Spent 111ms on a formula simplification. DAG size of input: 145 DAG size of output 64 [2018-02-04 01:42:54,811 WARN L146 SmtUtils]: Spent 111ms on a formula simplification. DAG size of input: 147 DAG size of output 64 [2018-02-04 01:42:55,673 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:55,674 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:42:55,674 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38] total 38 [2018-02-04 01:42:55,674 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:42:55,674 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:55,674 INFO L182 omatonBuilderFactory]: Interpolants [12047#true, 12048#false, 12049#(<= 1 main_~length1~0), 12050#(and (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 12051#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 12052#(and (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 12053#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (= main_~nondetString1~0.offset 0)), 12054#(and (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|)) (= main_~nondetString1~0.offset 0)), 12055#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0) (<= 1 main_~length1~0)) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~nondetString1~0.offset 0)), 12056#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= 1 main_~length3~0) (<= (+ main_~length3~0 1) (+ (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~nondetString1~0.offset 0)), 12057#(and (= 0 main_~nondetString2~0.offset) (or (and (<= 10 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 2) 1) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 12 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 2) 1) 2) (+ main_~nondetString2~0.offset (- 1)))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (<= 4 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (- 1)))))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (select |#length| main_~nondetString2~0.base) (+ main_~nondetString1~0.offset (- 1))) (+ main_~nondetString2~0.offset (- 1))))) (<= 8 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (and (<= 9 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (- main_~nondetString2~0.offset) 5) 2) (+ main_~nondetString2~0.offset (- 1)))))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) (+ main_~nondetString2~0.offset (- 1))))) (<= 7 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (- main_~nondetString2~0.offset) 5) (- 1))))) (<= 6 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (and (<= 10 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 2) 1) 1) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 13 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (or (<= 14 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 2) 1) 2) 1) (+ main_~nondetString2~0.offset (- 1))))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)) (and (<= 5 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 4) (+ main_~nondetString2~0.offset (- 1))))))) (= main_~nondetString1~0.offset 0)), 12058#(and (or (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (select |#length| |cstrcat_#in~s1.base|) (- 1)) (- 1)))) (<= 8 (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ 5 2) 1) 2) (- 1)))) (<= 12 (select |#length| |cstrcat_#in~s1.base|))) (and (<= 4 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (<= 5 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 4 (- 1))))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ 5 1) (- 1)))) (<= 7 (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ 5 2) (- 1)))) (<= 9 (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ 5 2) 1) (- 1)))) (<= 10 (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ 5 2) 1) 1) (- 1)))) (<= 11 (select |#length| |cstrcat_#in~s1.base|))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1)) (and (<= 6 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 5 (- 1))))) (and (<= 13 (select |#length| |cstrcat_#in~s1.base|)) (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ (+ 5 2) 1) 2) 1) (- 1)))) (<= 14 (select |#length| |cstrcat_#in~s1.base|))))) (= 0 |cstrcat_#in~s1.offset|)), 12059#(and (or (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1))))) (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= 8 (select |#length| cstrcat_~s~0.base))) (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (<= 9 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 2) (- 1))))) (and (<= 13 (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ 5 2) 1) 2) 1) (- 1)))) (<= 14 (select |#length| cstrcat_~s~0.base)))) (and (<= 10 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 2) 1) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 2) 1) 2) (- 1)))) (<= 12 (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base))) (and (<= 10 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 2) 1) (- 1)))))) (= cstrcat_~s~0.offset 0)), 12060#(and (or (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1))))) (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= 8 (select |#length| cstrcat_~s~0.base))) (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (<= 9 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 2) (- 1))))) (and (<= 13 (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ 5 2) 1) 2) 1) (- 1)))) (<= 14 (select |#length| cstrcat_~s~0.base)))) (= |cstrcat_#t~mem0| 0) (and (<= 10 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 2) 1) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 2) 1) 2) (- 1)))) (<= 12 (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base))) (and (<= 10 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 2) 1) (- 1)))))) (= cstrcat_~s~0.offset 0)), 12061#(and (or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) 1) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 13) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base)))) (= cstrcat_~s~0.offset 1)), 12062#(and (= cstrcat_~s~0.offset 1) (or (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 13) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base))))), 12063#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) 2) 1) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))))), 12064#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) 2) 1) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))))), 12065#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) 1) (- 1))))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1)))))), 12066#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) 1) (- 1))))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1)))))), 12067#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)))), 12068#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)))), 12069#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))))), 12070#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))))), 12071#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 12072#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 12073#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1))))))), 12074#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1))))))), 12075#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 12076#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 12077#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))))), 12078#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))))), 12079#(or (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 12080#(or (= |cstrcat_#t~mem0| 0) (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)))), 12081#(or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 12082#(or (= |cstrcat_#t~mem0| 0) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 12083#(<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)), 12084#(and (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (<= 0 cstrcat_~s~0.offset)), 12085#(and (<= 1 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))] [2018-02-04 01:42:55,674 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:42:55,675 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-02-04 01:42:55,675 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-02-04 01:42:55,675 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=198, Invalid=1284, Unknown=0, NotChecked=0, Total=1482 [2018-02-04 01:42:55,675 INFO L87 Difference]: Start difference. First operand 127 states and 133 transitions. Second operand 39 states. [2018-02-04 01:42:56,040 WARN L146 SmtUtils]: Spent 100ms on a formula simplification. DAG size of input: 116 DAG size of output 116 [2018-02-04 01:42:56,639 WARN L146 SmtUtils]: Spent 196ms on a formula simplification. DAG size of input: 172 DAG size of output 171 [2018-02-04 01:42:56,815 WARN L146 SmtUtils]: Spent 134ms on a formula simplification. DAG size of input: 163 DAG size of output 157 [2018-02-04 01:42:57,013 WARN L146 SmtUtils]: Spent 174ms on a formula simplification. DAG size of input: 166 DAG size of output 163 [2018-02-04 01:42:57,191 WARN L146 SmtUtils]: Spent 126ms on a formula simplification. DAG size of input: 157 DAG size of output 151 [2018-02-04 01:42:57,383 WARN L146 SmtUtils]: Spent 167ms on a formula simplification. DAG size of input: 160 DAG size of output 157 [2018-02-04 01:42:57,537 WARN L146 SmtUtils]: Spent 119ms on a formula simplification. DAG size of input: 151 DAG size of output 145 [2018-02-04 01:42:57,716 WARN L146 SmtUtils]: Spent 151ms on a formula simplification. DAG size of input: 154 DAG size of output 151 [2018-02-04 01:42:57,888 WARN L146 SmtUtils]: Spent 134ms on a formula simplification. DAG size of input: 144 DAG size of output 138 [2018-02-04 01:42:58,095 WARN L146 SmtUtils]: Spent 146ms on a formula simplification. DAG size of input: 147 DAG size of output 144 [2018-02-04 01:42:58,237 WARN L146 SmtUtils]: Spent 104ms on a formula simplification. DAG size of input: 136 DAG size of output 130 [2018-02-04 01:42:58,396 WARN L146 SmtUtils]: Spent 126ms on a formula simplification. DAG size of input: 139 DAG size of output 136 [2018-02-04 01:42:58,698 WARN L146 SmtUtils]: Spent 127ms on a formula simplification. DAG size of input: 133 DAG size of output 130 [2018-02-04 01:42:58,980 WARN L146 SmtUtils]: Spent 111ms on a formula simplification. DAG size of input: 126 DAG size of output 123 [2018-02-04 01:43:00,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:43:00,066 INFO L93 Difference]: Finished difference Result 152 states and 160 transitions. [2018-02-04 01:43:00,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-02-04 01:43:00,066 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 59 [2018-02-04 01:43:00,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:43:00,066 INFO L225 Difference]: With dead ends: 152 [2018-02-04 01:43:00,066 INFO L226 Difference]: Without dead ends: 152 [2018-02-04 01:43:00,067 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 963 ImplicationChecksByTransitivity, 13.2s TimeCoverageRelationStatistics Valid=773, Invalid=3919, Unknown=0, NotChecked=0, Total=4692 [2018-02-04 01:43:00,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-02-04 01:43:00,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 133. [2018-02-04 01:43:00,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-02-04 01:43:00,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 140 transitions. [2018-02-04 01:43:00,069 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 140 transitions. Word has length 59 [2018-02-04 01:43:00,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:43:00,070 INFO L432 AbstractCegarLoop]: Abstraction has 133 states and 140 transitions. [2018-02-04 01:43:00,070 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-02-04 01:43:00,070 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 140 transitions. [2018-02-04 01:43:00,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-02-04 01:43:00,070 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:43:00,070 INFO L351 BasicCegarLoop]: trace histogram [11, 11, 10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:43:00,070 INFO L371 AbstractCegarLoop]: === Iteration 50 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:43:00,071 INFO L82 PathProgramCache]: Analyzing trace with hash -1688503511, now seen corresponding path program 15 times [2018-02-04 01:43:00,071 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:43:00,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:43:00,095 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:43:00,990 WARN L146 SmtUtils]: Spent 172ms on a formula simplification. DAG size of input: 188 DAG size of output 87 [2018-02-04 01:43:01,255 WARN L146 SmtUtils]: Spent 247ms on a formula simplification. DAG size of input: 162 DAG size of output 80 [2018-02-04 01:43:01,497 WARN L146 SmtUtils]: Spent 194ms on a formula simplification. DAG size of input: 162 DAG size of output 80 [2018-02-04 01:43:01,668 WARN L146 SmtUtils]: Spent 120ms on a formula simplification. DAG size of input: 164 DAG size of output 80 [2018-02-04 01:43:01,854 WARN L146 SmtUtils]: Spent 156ms on a formula simplification. DAG size of input: 173 DAG size of output 81 [2018-02-04 01:43:02,077 WARN L146 SmtUtils]: Spent 177ms on a formula simplification. DAG size of input: 175 DAG size of output 81 [2018-02-04 01:43:02,214 WARN L146 SmtUtils]: Spent 105ms on a formula simplification. DAG size of input: 124 DAG size of output 70 [2018-02-04 01:43:02,371 WARN L146 SmtUtils]: Spent 120ms on a formula simplification. DAG size of input: 126 DAG size of output 70 [2018-02-04 01:43:03,375 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 0 proven. 169 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:43:03,375 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:43:03,375 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34] total 34 [2018-02-04 01:43:03,375 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:43:03,375 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:43:03,376 INFO L182 omatonBuilderFactory]: Interpolants [12431#true, 12432#false, 12433#(<= 1 main_~length3~0), 12434#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0)), 12435#(and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (= (select |#valid| |main_#t~malloc9.base|) 1)), 12436#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~length3~0)), 12437#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|))), 12438#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0)) (= (+ main_~nondetString2~0.offset main_~length3~0) 1))), 12439#(and (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (= (+ main_~nondetString2~0.offset main_~length3~0) 1) (and (= 0 main_~nondetString1~0.offset) (<= 1 main_~length3~0) (<= (+ main_~length3~0 (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base)))) (= 0 main_~nondetString2~0.offset)), 12440#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (or (and (<= (+ (select |#length| main_~nondetString1~0.base) 5) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 5) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= (+ (select |#length| main_~nondetString1~0.base) 4) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 4) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= (+ (select |#length| main_~nondetString1~0.base) 7) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (- main_~nondetString2~0.offset) 6) 1) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= (+ (select |#length| main_~nondetString1~0.base) 3) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (- 1)))))) (and (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base)) (+ main_~nondetString2~0.offset (- 1))))) (<= (+ (select |#length| main_~nondetString1~0.base) 10) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)))) (<= (+ (select |#length| main_~nondetString1~0.base) 9) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)))) (and (<= (+ (select |#length| main_~nondetString1~0.base) 8) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (- main_~nondetString2~0.offset) 6) 2) (+ main_~nondetString2~0.offset (- 1)))))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 6) (+ main_~nondetString2~0.offset (- 1))))) (<= (+ (select |#length| main_~nondetString1~0.base) 6) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))))) (= 0 main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)))), 12441#(and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (or (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ 6 1) (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 7) (select |#length| |cstrcat_#in~s1.base|))) (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 5) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 5 (- 1))))) (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 8) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ 6 2) (- 1))))) (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 6) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 6 (- 1))))) (and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (- (select |#length| |cstrcat_#in~s2.base|)) (select |#length| |cstrcat_#in~s1.base|)) (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 10) (select |#length| |cstrcat_#in~s1.base|))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 9) (select |#length| |cstrcat_#in~s1.base|))) (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 4) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 4 (- 1))))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 3 (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 3) (select |#length| |cstrcat_#in~s1.base|)))) (= 0 |cstrcat_#in~s2.offset|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1))) (= 0 |cstrcat_#in~s1.offset|)), 12442#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 cstrcat_~s2.offset) (or (and (<= (+ (select |#length| cstrcat_~s2.base) 9) (select |#length| cstrcat_~s~0.base)) (or (<= (+ (select |#length| cstrcat_~s2.base) 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1)))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 6 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 7) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 6 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 6 2) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 8) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base)))))) (= cstrcat_~s~0.offset 0)), 12443#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (or (and (<= (+ (select |#length| cstrcat_~s2.base) 9) (select |#length| cstrcat_~s~0.base)) (or (<= (+ (select |#length| cstrcat_~s2.base) 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1)))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 6 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 7) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 6 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 6 2) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 8) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base)))))) (= cstrcat_~s~0.offset 0)), 12444#(or (and (= cstrcat_~s~0.offset 1) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))) (and (= 0 cstrcat_~s2.offset) (or (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (or (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1)))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 5) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 5) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 5) 2) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))))), 12445#(or (and (= |cstrcat_#t~mem0| 0) (= cstrcat_~s~0.offset 1)) (and (= 0 cstrcat_~s2.offset) (or (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (or (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1)))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 5) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 5) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 5) 2) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))))), 12446#(and (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 2) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1)))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))))), 12447#(and (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 2) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1)))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))))), 12448#(or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1)))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))))), 12449#(or (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1)))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))))), 12450#(and (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 2) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))))), 12451#(and (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 2) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= |cstrcat_#t~mem0| 0) (or (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))))), 12452#(or (and (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1))))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 12453#(or (and (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1))))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))))) (= |cstrcat_#t~mem0| 0)), 12454#(or (and (= 0 cstrcat_~s2.offset) (or (and (or (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1))))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 12455#(or (and (= 0 cstrcat_~s2.offset) (or (and (or (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1))))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))))) (= |cstrcat_#t~mem0| 0)), 12456#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)))) (= 0 cstrcat_~s2.offset)), 12457#(and (= 0 cstrcat_~s2.offset) (or (= |cstrcat_#t~mem0| 0) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))))), 12458#(and (= 0 cstrcat_~s2.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)))), 12459#(and (= 0 cstrcat_~s2.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)) (<= 0 cstrcat_~s~0.offset) (or (= |cstrcat_#t~mem0| 0) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)))), 12460#(and (= 0 cstrcat_~s2.offset) (<= 1 cstrcat_~s~0.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))), 12461#(and (<= 2 cstrcat_~s~0.offset) (= 0 cstrcat_~s2.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (select |#length| cstrcat_~s~0.base))), 12462#(and (<= 3 cstrcat_~s~0.offset) (= |cstrcat_#t~post3.offset| 0) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset| cstrcat_~s~0.offset) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~post3.base| cstrcat_~s2.base)), 12463#(and (<= 3 cstrcat_~s~0.offset) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset) (+ cstrcat_~s2.offset (select |#length| cstrcat_~s~0.base)))), 12464#(and (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post2.offset|) (+ (select |#length| |cstrcat_#t~post2.base|) |cstrcat_#t~post3.offset|)) (<= 3 |cstrcat_#t~post2.offset|)), 12465#(and (<= 3 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|)))] [2018-02-04 01:43:03,376 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 0 proven. 169 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:43:03,376 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-02-04 01:43:03,376 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-02-04 01:43:03,376 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=108, Invalid=1082, Unknown=0, NotChecked=0, Total=1190 [2018-02-04 01:43:03,376 INFO L87 Difference]: Start difference. First operand 133 states and 140 transitions. Second operand 35 states. [2018-02-04 01:43:04,246 WARN L146 SmtUtils]: Spent 132ms on a formula simplification. DAG size of input: 152 DAG size of output 151 [2018-02-04 01:43:04,454 WARN L146 SmtUtils]: Spent 166ms on a formula simplification. DAG size of input: 153 DAG size of output 136 [2018-02-04 01:43:04,647 WARN L146 SmtUtils]: Spent 163ms on a formula simplification. DAG size of input: 166 DAG size of output 143 [2018-02-04 01:43:04,797 WARN L146 SmtUtils]: Spent 109ms on a formula simplification. DAG size of input: 149 DAG size of output 131 [2018-02-04 01:43:04,971 WARN L146 SmtUtils]: Spent 141ms on a formula simplification. DAG size of input: 162 DAG size of output 138 [2018-02-04 01:43:05,281 WARN L146 SmtUtils]: Spent 141ms on a formula simplification. DAG size of input: 142 DAG size of output 129 [2018-02-04 01:43:05,424 WARN L146 SmtUtils]: Spent 101ms on a formula simplification. DAG size of input: 131 DAG size of output 117 [2018-02-04 01:43:05,579 WARN L146 SmtUtils]: Spent 120ms on a formula simplification. DAG size of input: 137 DAG size of output 123 [2018-02-04 01:43:05,861 WARN L146 SmtUtils]: Spent 111ms on a formula simplification. DAG size of input: 130 DAG size of output 117 [2018-02-04 01:43:06,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:43:06,781 INFO L93 Difference]: Finished difference Result 147 states and 154 transitions. [2018-02-04 01:43:06,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-02-04 01:43:06,781 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 60 [2018-02-04 01:43:06,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:43:06,782 INFO L225 Difference]: With dead ends: 147 [2018-02-04 01:43:06,782 INFO L226 Difference]: Without dead ends: 128 [2018-02-04 01:43:06,782 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 841 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=420, Invalid=3612, Unknown=0, NotChecked=0, Total=4032 [2018-02-04 01:43:06,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-02-04 01:43:06,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-02-04 01:43:06,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-02-04 01:43:06,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 133 transitions. [2018-02-04 01:43:06,784 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 133 transitions. Word has length 60 [2018-02-04 01:43:06,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:43:06,784 INFO L432 AbstractCegarLoop]: Abstraction has 128 states and 133 transitions. [2018-02-04 01:43:06,784 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-02-04 01:43:06,784 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 133 transitions. [2018-02-04 01:43:06,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-02-04 01:43:06,784 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:43:06,784 INFO L351 BasicCegarLoop]: trace histogram [15, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:43:06,784 INFO L371 AbstractCegarLoop]: === Iteration 51 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:43:06,784 INFO L82 PathProgramCache]: Analyzing trace with hash 295816852, now seen corresponding path program 13 times [2018-02-04 01:43:06,785 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:43:06,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:43:06,798 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:43:11,344 WARN L146 SmtUtils]: Spent 1052ms on a formula simplification. DAG size of input: 878 DAG size of output 105 [2018-02-04 01:43:12,281 WARN L146 SmtUtils]: Spent 864ms on a formula simplification. DAG size of input: 645 DAG size of output 95 [2018-02-04 01:43:13,264 WARN L146 SmtUtils]: Spent 866ms on a formula simplification. DAG size of input: 645 DAG size of output 95 [2018-02-04 01:43:14,233 WARN L146 SmtUtils]: Spent 879ms on a formula simplification. DAG size of input: 647 DAG size of output 95 [2018-02-04 01:43:15,285 WARN L146 SmtUtils]: Spent 946ms on a formula simplification. DAG size of input: 665 DAG size of output 105 [2018-02-04 01:43:16,393 WARN L146 SmtUtils]: Spent 999ms on a formula simplification. DAG size of input: 667 DAG size of output 105 [2018-02-04 01:43:17,131 WARN L146 SmtUtils]: Spent 650ms on a formula simplification. DAG size of input: 454 DAG size of output 96 [2018-02-04 01:43:18,270 WARN L146 SmtUtils]: Spent 1031ms on a formula simplification. DAG size of input: 456 DAG size of output 96 [2018-02-04 01:43:18,732 WARN L146 SmtUtils]: Spent 388ms on a formula simplification. DAG size of input: 328 DAG size of output 87 [2018-02-04 01:43:19,188 WARN L146 SmtUtils]: Spent 381ms on a formula simplification. DAG size of input: 330 DAG size of output 87 [2018-02-04 01:43:19,571 WARN L146 SmtUtils]: Spent 321ms on a formula simplification. DAG size of input: 234 DAG size of output 80 [2018-02-04 01:43:19,951 WARN L146 SmtUtils]: Spent 313ms on a formula simplification. DAG size of input: 236 DAG size of output 80 [2018-02-04 01:43:20,183 WARN L146 SmtUtils]: Spent 180ms on a formula simplification. DAG size of input: 161 DAG size of output 72 [2018-02-04 01:43:20,411 WARN L146 SmtUtils]: Spent 172ms on a formula simplification. DAG size of input: 163 DAG size of output 72 [2018-02-04 01:43:21,491 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:43:21,503 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:43:21,503 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39] total 39 [2018-02-04 01:43:21,504 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:43:21,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:43:21,504 INFO L182 omatonBuilderFactory]: Interpolants [12800#false, 12801#(<= 1 main_~length1~0), 12802#(and (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 12803#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 12804#(and (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 12805#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (= main_~nondetString1~0.offset 0)), 12806#(and (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|)) (= main_~nondetString1~0.offset 0)), 12807#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0) (<= 1 main_~length1~0))) (= main_~nondetString1~0.offset 0)), 12808#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= 1 main_~length3~0) (<= (+ main_~length3~0 1) (+ (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)))) (= main_~nondetString1~0.offset 0)), 12809#(and (= 0 main_~nondetString2~0.offset) (or (and (<= 13 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 2) 1) 2) 2) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 4 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (- 1)))))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) (+ main_~nondetString2~0.offset (- 1))))) (<= 7 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (and (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (select |#length| main_~nondetString2~0.base) (+ main_~nondetString1~0.offset (- 1))) (+ main_~nondetString2~0.offset (- 1))))) (<= 15 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (<= 14 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)) (and (<= 5 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 4) (+ main_~nondetString2~0.offset (- 1)))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (<= 12 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 2) 1) 2) 1) (- 1)))))) (and (<= 6 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 5) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 8 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (- main_~nondetString2~0.offset) 5) 2) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 10 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 2) 1) 1) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 11 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 2) 1) 2) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 9 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 2) 1) (+ main_~nondetString2~0.offset (- 1))))))) (= main_~nondetString1~0.offset 0)), 12810#(and (or (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ 5 2) 1) 2) (- 1)))) (<= 11 (select |#length| |cstrcat_#in~s1.base|))) (and (<= 12 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ (+ 5 2) 1) 2) 1) (- 1))))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ (+ 5 2) 1) 2) 2) (- 1)))) (<= 13 (select |#length| |cstrcat_#in~s1.base|))) (and (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (select |#length| |cstrcat_#in~s1.base|) (- 1)) (- 1)))) (<= 15 (select |#length| |cstrcat_#in~s1.base|))) (<= 14 (select |#length| |cstrcat_#in~s1.base|))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (<= 5 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 4 (- 1))))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ 5 1) (- 1)))) (<= 7 (select |#length| |cstrcat_#in~s1.base|))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1)) (and (<= 6 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 5 (- 1))))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ 5 2) 1) (- 1)))) (<= 9 (select |#length| |cstrcat_#in~s1.base|))) (and (<= 4 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 3 (- 1))))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ 5 2) 1) 1) (- 1)))) (<= 10 (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ 5 2) (- 1)))) (<= 8 (select |#length| |cstrcat_#in~s1.base|)))) (= 0 |cstrcat_#in~s1.offset|)), 12811#(and (or (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ 5 2) 1) 2) 2) (- 1)))) (<= 13 (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 2) (- 1)))) (<= 8 (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ 5 2) 1) 2) 1) (- 1)))) (<= 12 (select |#length| cstrcat_~s~0.base))) (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1))))) (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (<= 9 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 2) 1) (- 1))))) (and (<= 10 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 2) 1) 1) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= 15 (select |#length| cstrcat_~s~0.base))) (<= 14 (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base))) (and (<= 11 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 2) 1) 2) (- 1)))))) (= cstrcat_~s~0.offset 0)), 12812#(and (or (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ 5 2) 1) 2) 2) (- 1)))) (<= 13 (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 2) (- 1)))) (<= 8 (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ 5 2) 1) 2) 1) (- 1)))) (<= 12 (select |#length| cstrcat_~s~0.base))) (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1))))) (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (<= 9 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 2) 1) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= 10 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 2) 1) 1) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= 15 (select |#length| cstrcat_~s~0.base))) (<= 14 (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base))) (and (<= 11 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 2) 1) 2) (- 1)))))) (= cstrcat_~s~0.offset 0)), 12813#(and (= cstrcat_~s~0.offset 1) (or (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) 2) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) 1) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) 2) 2) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 14) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 13) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 2) (- 1))))))), 12814#(and (or (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) 2) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) 2) 2) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 14) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 13) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 2) (- 1)))))) (= cstrcat_~s~0.offset 1)), 12815#(or (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 13) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) 2) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) 2) 1) (- 1)))))), 12816#(or (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 13) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) 2) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) 2) 1) (- 1)))))), 12817#(or (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1)))))), 12818#(or (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1)))))), 12819#(or (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 12820#(or (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)))), 12821#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 12822#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 2) (- 1)))))), 12823#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (or (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 2) (- 1)))))), 12824#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (or (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 2) (- 1)))))), 12825#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 12826#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))))), 12827#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1)))))), 12828#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1)))))), 12829#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 12830#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0)), 12831#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 12832#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))))), 12833#(or (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 12834#(or (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0)), 12835#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))), 12836#(and (or (= |cstrcat_#t~mem0| 0) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (<= 0 cstrcat_~s~0.offset)), 12837#(and (<= 1 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))), 12838#(and (<= 2 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))), 12799#true] [2018-02-04 01:43:21,505 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:43:21,505 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-02-04 01:43:21,505 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-02-04 01:43:21,505 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=199, Invalid=1361, Unknown=0, NotChecked=0, Total=1560 [2018-02-04 01:43:21,505 INFO L87 Difference]: Start difference. First operand 128 states and 133 transitions. Second operand 40 states. [2018-02-04 01:43:21,902 WARN L146 SmtUtils]: Spent 103ms on a formula simplification. DAG size of input: 124 DAG size of output 123 [2018-02-04 01:43:22,220 WARN L143 SmtUtils]: Spent 107ms on a formula simplification that was a NOOP. DAG size: 156 [2018-02-04 01:43:22,686 WARN L146 SmtUtils]: Spent 159ms on a formula simplification. DAG size of input: 180 DAG size of output 173 [2018-02-04 01:43:22,934 WARN L146 SmtUtils]: Spent 220ms on a formula simplification. DAG size of input: 185 DAG size of output 179 [2018-02-04 01:43:23,128 WARN L146 SmtUtils]: Spent 142ms on a formula simplification. DAG size of input: 172 DAG size of output 165 [2018-02-04 01:43:23,348 WARN L146 SmtUtils]: Spent 194ms on a formula simplification. DAG size of input: 177 DAG size of output 171 [2018-02-04 01:43:23,543 WARN L146 SmtUtils]: Spent 153ms on a formula simplification. DAG size of input: 166 DAG size of output 159 [2018-02-04 01:43:23,765 WARN L146 SmtUtils]: Spent 189ms on a formula simplification. DAG size of input: 171 DAG size of output 165 [2018-02-04 01:43:23,944 WARN L146 SmtUtils]: Spent 134ms on a formula simplification. DAG size of input: 159 DAG size of output 152 [2018-02-04 01:43:24,150 WARN L146 SmtUtils]: Spent 170ms on a formula simplification. DAG size of input: 164 DAG size of output 158 [2018-02-04 01:43:24,405 WARN L146 SmtUtils]: Spent 193ms on a formula simplification. DAG size of input: 151 DAG size of output 144 [2018-02-04 01:43:24,605 WARN L146 SmtUtils]: Spent 161ms on a formula simplification. DAG size of input: 156 DAG size of output 150 [2018-02-04 01:43:24,764 WARN L146 SmtUtils]: Spent 114ms on a formula simplification. DAG size of input: 145 DAG size of output 138 [2018-02-04 01:43:24,946 WARN L146 SmtUtils]: Spent 143ms on a formula simplification. DAG size of input: 150 DAG size of output 144 [2018-02-04 01:43:25,101 WARN L146 SmtUtils]: Spent 108ms on a formula simplification. DAG size of input: 137 DAG size of output 130 [2018-02-04 01:43:25,273 WARN L146 SmtUtils]: Spent 129ms on a formula simplification. DAG size of input: 142 DAG size of output 136 [2018-02-04 01:43:25,433 WARN L146 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 131 DAG size of output 124 [2018-02-04 01:43:25,601 WARN L146 SmtUtils]: Spent 119ms on a formula simplification. DAG size of input: 136 DAG size of output 130 [2018-02-04 01:43:25,899 WARN L146 SmtUtils]: Spent 109ms on a formula simplification. DAG size of input: 130 DAG size of output 124 [2018-02-04 01:43:26,190 WARN L146 SmtUtils]: Spent 100ms on a formula simplification. DAG size of input: 124 DAG size of output 118 [2018-02-04 01:43:26,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:43:26,833 INFO L93 Difference]: Finished difference Result 149 states and 156 transitions. [2018-02-04 01:43:26,834 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-02-04 01:43:26,834 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 62 [2018-02-04 01:43:26,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:43:26,834 INFO L225 Difference]: With dead ends: 149 [2018-02-04 01:43:26,834 INFO L226 Difference]: Without dead ends: 149 [2018-02-04 01:43:26,835 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1064 ImplicationChecksByTransitivity, 16.0s TimeCoverageRelationStatistics Valid=829, Invalid=4283, Unknown=0, NotChecked=0, Total=5112 [2018-02-04 01:43:26,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-02-04 01:43:26,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 134. [2018-02-04 01:43:26,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-02-04 01:43:26,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 140 transitions. [2018-02-04 01:43:26,836 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 140 transitions. Word has length 62 [2018-02-04 01:43:26,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:43:26,837 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 140 transitions. [2018-02-04 01:43:26,837 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-02-04 01:43:26,837 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 140 transitions. [2018-02-04 01:43:26,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-02-04 01:43:26,837 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:43:26,837 INFO L351 BasicCegarLoop]: trace histogram [12, 12, 11, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:43:26,838 INFO L371 AbstractCegarLoop]: === Iteration 52 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:43:26,838 INFO L82 PathProgramCache]: Analyzing trace with hash 26770710, now seen corresponding path program 16 times [2018-02-04 01:43:26,838 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:43:26,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:43:26,872 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:43:29,789 WARN L146 SmtUtils]: Spent 481ms on a formula simplification. DAG size of input: 267 DAG size of output 102 [2018-02-04 01:43:30,317 WARN L146 SmtUtils]: Spent 501ms on a formula simplification. DAG size of input: 232 DAG size of output 91 [2018-02-04 01:43:30,847 WARN L146 SmtUtils]: Spent 498ms on a formula simplification. DAG size of input: 232 DAG size of output 91 [2018-02-04 01:43:31,368 WARN L146 SmtUtils]: Spent 485ms on a formula simplification. DAG size of input: 234 DAG size of output 91 [2018-02-04 01:43:32,197 WARN L146 SmtUtils]: Spent 781ms on a formula simplification. DAG size of input: 270 DAG size of output 129 [2018-02-04 01:43:33,025 WARN L146 SmtUtils]: Spent 773ms on a formula simplification. DAG size of input: 272 DAG size of output 129 [2018-02-04 01:43:33,599 WARN L146 SmtUtils]: Spent 527ms on a formula simplification. DAG size of input: 199 DAG size of output 120 [2018-02-04 01:43:34,155 WARN L146 SmtUtils]: Spent 502ms on a formula simplification. DAG size of input: 201 DAG size of output 120 [2018-02-04 01:43:34,463 WARN L146 SmtUtils]: Spent 253ms on a formula simplification. DAG size of input: 147 DAG size of output 77 [2018-02-04 01:43:34,758 WARN L146 SmtUtils]: Spent 240ms on a formula simplification. DAG size of input: 149 DAG size of output 77 [2018-02-04 01:43:34,936 WARN L146 SmtUtils]: Spent 133ms on a formula simplification. DAG size of input: 118 DAG size of output 69 [2018-02-04 01:43:35,116 WARN L146 SmtUtils]: Spent 135ms on a formula simplification. DAG size of input: 120 DAG size of output 69 [2018-02-04 01:43:36,051 INFO L134 CoverageAnalysis]: Checked inductivity of 202 backedges. 0 proven. 202 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:43:36,051 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:43:36,051 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37] total 37 [2018-02-04 01:43:36,051 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:43:36,051 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:43:36,052 INFO L182 omatonBuilderFactory]: Interpolants [13186#true, 13187#false, 13188#(<= 1 main_~length3~0), 13189#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0)), 13190#(and (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (= 1 (select |#valid| |main_#t~malloc9.base|)) (<= 1 main_~length3~0) (= (select |#length| |main_#t~malloc9.base|) main_~length1~0)), 13191#(and (= 0 main_~nondetString1~0.offset) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (= (select |#length| main_~nondetString1~0.base) main_~length1~0) (= 1 (select |#valid| main_~nondetString1~0.base))), 13192#(and (= 0 main_~nondetString1~0.offset) (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (= (select |#length| main_~nondetString1~0.base) main_~length1~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|))), 13193#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 1) (and (= 0 main_~nondetString1~0.offset) (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0)))))), 13194#(and (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (= (+ main_~nondetString2~0.offset main_~length3~0) 1) (and (= 0 main_~nondetString1~0.offset) (<= 1 main_~length3~0) (<= (+ main_~length3~0 (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base)))) (= 0 main_~nondetString2~0.offset)), 13195#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (= 0 main_~nondetString1~0.offset) (or (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (+ (+ (- main_~nondetString2~0.offset) 3) 1) 1) (- 1))))) (<= (+ (select |#length| main_~nondetString1~0.base) 5) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)))) (<= (+ (select |#length| main_~nondetString1~0.base) 8) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (and (<= (+ (select |#length| main_~nondetString1~0.base) 7) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 3) 1) 1) 1) 1) (- 1)))))) (and (<= (+ (select |#length| main_~nondetString1~0.base) 4) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (+ (- main_~nondetString2~0.offset) 3) 1) (- 1)))))) (and (<= (+ (select |#length| main_~nondetString1~0.base) 3) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (- 1)))))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 3) 1) 1) 1) (- 1))))) (<= (+ (select |#length| main_~nondetString1~0.base) 6) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))))) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 3) 1) 1) 1) 1) 1) (- 1))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (+ (- main_~nondetString2~0.offset) 3) 1) (- 1))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base)) (+ main_~nondetString2~0.offset (- 1))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (- (select |#length| main_~nondetString1~0.base)) (+ (select |#length| main_~nondetString2~0.base) (- 1))) (- 1))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 3) 1) 1) 1) (+ main_~nondetString2~0.offset (- 1))))) (<= (+ (select |#length| main_~nondetString1~0.base) 11) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (- 1))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (- main_~nondetString2~0.offset) 3) 1) 1) (+ main_~nondetString2~0.offset (- 1))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 3) 1) 1) 1) 1) (+ main_~nondetString2~0.offset (- 1))))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)))), 13196#(and (or (and (or (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ (+ 3 1) 1) 1) 1) (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 7) (select |#length| |cstrcat_#in~s1.base|))) (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 10) (select |#length| |cstrcat_#in~s1.base|)) (or (<= (+ (select |#length| |cstrcat_#in~s2.base|) 11) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (- (select |#length| |cstrcat_#in~s2.base|)) (+ (select |#length| |cstrcat_#in~s1.base|) (- 1))) (- 1)))))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ 3 1) 1) (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 5) (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ (+ (+ 3 1) 1) 1) 1) 1) (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 8) (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ 3 1) (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 4) (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (- (select |#length| |cstrcat_#in~s2.base|)) (select |#length| |cstrcat_#in~s1.base|)) (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 9) (select |#length| |cstrcat_#in~s1.base|))) (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 6) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ 3 1) 1) 1) (- 1))))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 3 (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 3) (select |#length| |cstrcat_#in~s1.base|)))) (= 0 |cstrcat_#in~s2.offset|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1))) (= 0 |cstrcat_#in~s1.offset|)), 13197#(and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (= 0 cstrcat_~s2.offset) (or (and (<= (+ (select |#length| cstrcat_~s2.base) 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 3 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ 3 1) 1) 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 8) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 3 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ 3 1) 1) 1) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 3 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 10) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (- 1))) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 11) (select |#length| cstrcat_~s~0.base)))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))) (= cstrcat_~s~0.offset 0)), 13198#(and (= cstrcat_~s~0.offset 0) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (or (and (<= (+ (select |#length| cstrcat_~s2.base) 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 3 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ 3 1) 1) 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 8) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 3 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ 3 1) 1) 1) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 3 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 10) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (- 1))) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 11) (select |#length| cstrcat_~s~0.base)))))))), 13199#(or (and (= 0 cstrcat_~s2.offset) (or (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (+ (- (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1)))) (- 2)))) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) 1) (- 1))))) (= 1 cstrcat_~s~0.offset) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)))) (or (and (<= (+ (select |#length| cstrcat_~s2.base) 10) (select |#length| cstrcat_~s~0.base)) (or (<= (+ (select |#length| cstrcat_~s2.base) 11) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 2)))) (- 1)))))) (and (<= (+ (select |#length| cstrcat_~s2.base) 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 8) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1))))))) (and (= cstrcat_~s~0.offset 1) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)))), 13200#(or (and (= |cstrcat_#t~mem0| 0) (= cstrcat_~s~0.offset 1)) (and (= 0 cstrcat_~s2.offset) (or (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (+ (- (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1)))) (- 2)))) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) 1) (- 1))))) (= 1 cstrcat_~s~0.offset) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)))) (or (and (<= (+ (select |#length| cstrcat_~s2.base) 10) (select |#length| cstrcat_~s~0.base)) (or (<= (+ (select |#length| cstrcat_~s2.base) 11) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 2)))) (- 1)))))) (and (<= (+ (select |#length| cstrcat_~s2.base) 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 8) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1)))))))), 13201#(or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (= cstrcat_~s~0.offset (select |#length| cstrcat_~s2.base)) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 4)) (- 1)))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))))) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 2)))) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) 10) (select |#length| cstrcat_~s~0.base)) (or (<= (+ (select |#length| cstrcat_~s2.base) 11) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 3)))) (- 1)))))) (and (<= (+ (select |#length| cstrcat_~s2.base) 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 7) (select |#length| cstrcat_~s~0.base)))))), 13202#(or (= |cstrcat_#t~mem0| 0) (and (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (= cstrcat_~s~0.offset (select |#length| cstrcat_~s2.base)) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 4)) (- 1)))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))))) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 2)))) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) 10) (select |#length| cstrcat_~s~0.base)) (or (<= (+ (select |#length| cstrcat_~s2.base) 11) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 3)))) (- 1)))))) (and (<= (+ (select |#length| cstrcat_~s2.base) 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 7) (select |#length| cstrcat_~s~0.base)))))), 13203#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (- 2)))) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 4)) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)))), 13204#(or (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (- 2)))) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 4)) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)))), 13205#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (- 2)))) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 4)) (- 1)))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)))), 13206#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (- 2)))) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 4)) (- 1)))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)))), 13207#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (- 2)))) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))), 13208#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (- 2)))) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))), 13209#(or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (- 2)))) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 13210#(or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (- 2)))) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 13211#(or (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (- 3)))) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (- 2)))) (- 1)))) (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 13212#(or (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (- 3)))) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (- 2)))) (- 1)))) (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1))), 13213#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (- 2)))) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)))), 13214#(or (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s2.base) (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (- 2)))) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)))), 13215#(or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 13216#(or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1))), 13217#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 13218#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))), 13219#(and (<= (+ |cstrcat_#t~post2.offset| 1) cstrcat_~s~0.offset) (or (and (= |cstrcat_#t~post3.offset| 0) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) cstrcat_~s2.offset) (= |cstrcat_#t~post3.base| cstrcat_~s2.base)) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))), 13220#(and (<= (+ |cstrcat_#t~post2.offset| 1) cstrcat_~s~0.offset) (or (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))), 13221#(and (or (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))) (<= 1 cstrcat_~s~0.offset)), 13222#(and (<= 1 |cstrcat_#t~post2.offset|) (or (<= (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|)))), 13223#(and (<= 1 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|)))] [2018-02-04 01:43:36,052 INFO L134 CoverageAnalysis]: Checked inductivity of 202 backedges. 0 proven. 202 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:43:36,052 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-02-04 01:43:36,052 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-02-04 01:43:36,052 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=1251, Unknown=0, NotChecked=0, Total=1406 [2018-02-04 01:43:36,053 INFO L87 Difference]: Start difference. First operand 134 states and 140 transitions. Second operand 38 states. [2018-02-04 01:43:37,102 WARN L146 SmtUtils]: Spent 208ms on a formula simplification. DAG size of input: 210 DAG size of output 209 [2018-02-04 01:43:37,555 WARN L146 SmtUtils]: Spent 121ms on a formula simplification. DAG size of input: 159 DAG size of output 156 [2018-02-04 01:43:37,823 WARN L146 SmtUtils]: Spent 116ms on a formula simplification. DAG size of input: 152 DAG size of output 149 [2018-02-04 01:43:38,080 WARN L146 SmtUtils]: Spent 110ms on a formula simplification. DAG size of input: 141 DAG size of output 140 [2018-02-04 01:43:38,326 WARN L146 SmtUtils]: Spent 109ms on a formula simplification. DAG size of input: 134 DAG size of output 133 [2018-02-04 01:43:39,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:43:39,463 INFO L93 Difference]: Finished difference Result 144 states and 150 transitions. [2018-02-04 01:43:39,463 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-02-04 01:43:39,463 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 63 [2018-02-04 01:43:39,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:43:39,463 INFO L225 Difference]: With dead ends: 144 [2018-02-04 01:43:39,463 INFO L226 Difference]: Without dead ends: 144 [2018-02-04 01:43:39,464 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 942 ImplicationChecksByTransitivity, 9.7s TimeCoverageRelationStatistics Valid=566, Invalid=3724, Unknown=0, NotChecked=0, Total=4290 [2018-02-04 01:43:39,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-02-04 01:43:39,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 139. [2018-02-04 01:43:39,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-02-04 01:43:39,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 145 transitions. [2018-02-04 01:43:39,465 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 145 transitions. Word has length 63 [2018-02-04 01:43:39,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:43:39,466 INFO L432 AbstractCegarLoop]: Abstraction has 139 states and 145 transitions. [2018-02-04 01:43:39,466 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-02-04 01:43:39,466 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 145 transitions. [2018-02-04 01:43:39,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-04 01:43:39,466 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:43:39,466 INFO L351 BasicCegarLoop]: trace histogram [16, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:43:39,466 INFO L371 AbstractCegarLoop]: === Iteration 53 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:43:39,466 INFO L82 PathProgramCache]: Analyzing trace with hash -593098431, now seen corresponding path program 14 times [2018-02-04 01:43:39,466 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:43:39,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:43:39,486 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:43:46,057 WARN L146 SmtUtils]: Spent 1844ms on a formula simplification. DAG size of input: 970 DAG size of output 115 [2018-02-04 01:43:47,703 WARN L146 SmtUtils]: Spent 1540ms on a formula simplification. DAG size of input: 880 DAG size of output 102 [2018-02-04 01:43:49,360 WARN L146 SmtUtils]: Spent 1536ms on a formula simplification. DAG size of input: 880 DAG size of output 102 [2018-02-04 01:43:50,989 WARN L146 SmtUtils]: Spent 1506ms on a formula simplification. DAG size of input: 882 DAG size of output 102 [2018-02-04 01:43:52,803 WARN L146 SmtUtils]: Spent 1657ms on a formula simplification. DAG size of input: 900 DAG size of output 112 [2018-02-04 01:43:54,618 WARN L146 SmtUtils]: Spent 1658ms on a formula simplification. DAG size of input: 902 DAG size of output 112 [2018-02-04 01:43:55,803 WARN L146 SmtUtils]: Spent 1063ms on a formula simplification. DAG size of input: 619 DAG size of output 100 [2018-02-04 01:43:57,069 WARN L146 SmtUtils]: Spent 1138ms on a formula simplification. DAG size of input: 621 DAG size of output 103 [2018-02-04 01:43:57,794 WARN L146 SmtUtils]: Spent 626ms on a formula simplification. DAG size of input: 424 DAG size of output 98 [2018-02-04 01:43:58,543 WARN L146 SmtUtils]: Spent 648ms on a formula simplification. DAG size of input: 426 DAG size of output 98 [2018-02-04 01:43:58,993 WARN L146 SmtUtils]: Spent 366ms on a formula simplification. DAG size of input: 307 DAG size of output 89 [2018-02-04 01:43:59,450 WARN L146 SmtUtils]: Spent 369ms on a formula simplification. DAG size of input: 309 DAG size of output 89 [2018-02-04 01:43:59,807 WARN L146 SmtUtils]: Spent 285ms on a formula simplification. DAG size of input: 224 DAG size of output 79 [2018-02-04 01:44:00,158 WARN L146 SmtUtils]: Spent 282ms on a formula simplification. DAG size of input: 226 DAG size of output 79 [2018-02-04 01:44:00,409 WARN L146 SmtUtils]: Spent 188ms on a formula simplification. DAG size of input: 158 DAG size of output 72 [2018-02-04 01:44:00,658 WARN L146 SmtUtils]: Spent 185ms on a formula simplification. DAG size of input: 160 DAG size of output 72 [2018-02-04 01:44:00,839 WARN L146 SmtUtils]: Spent 126ms on a formula simplification. DAG size of input: 120 DAG size of output 65 [2018-02-04 01:44:01,035 WARN L146 SmtUtils]: Spent 138ms on a formula simplification. DAG size of input: 122 DAG size of output 65 [2018-02-04 01:44:01,752 WARN L146 SmtUtils]: Spent 138ms on a formula simplification. DAG size of input: 49 DAG size of output 41 [2018-02-04 01:44:02,148 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:44:02,148 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:44:02,148 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42] total 42 [2018-02-04 01:44:02,148 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:44:02,149 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:44:02,149 INFO L182 omatonBuilderFactory]: Interpolants [13568#(and (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 13569#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (= main_~nondetString1~0.offset 0)), 13570#(and (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= 1 main_~length1~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|)) (= main_~nondetString1~0.offset 0)), 13571#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= 1 main_~length3~0) (<= 1 main_~length1~0)) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~nondetString1~0.offset 0)), 13572#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length3~0) 2) (and (<= 1 main_~length3~0) (<= (+ main_~length3~0 1) (+ (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (= (+ main_~nondetString2~0.offset main_~length3~0) 1)) (= main_~nondetString1~0.offset 0)), 13573#(and (= 0 main_~nondetString2~0.offset) (or (and (<= 4 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 12 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) 2) 2) (+ main_~nondetString2~0.offset (- 1)))))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) (+ main_~nondetString2~0.offset (- 1))))) (<= 7 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)) (and (<= 9 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) 2) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 8 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) 1) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 5 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 4) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 14 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) 2) 2) 2) (+ main_~nondetString2~0.offset (- 1)))))) (and (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (select |#length| main_~nondetString2~0.base) (+ main_~nondetString1~0.offset (- 2))) (+ main_~nondetString2~0.offset (- 1))))) (<= 16 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (<= 15 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (- main_~nondetString2~0.offset) 5) (- 1))))) (<= 6 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) 2) 1) (+ main_~nondetString2~0.offset (- 1))))) (<= 10 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset))) (and (<= 13 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) 2) 2) 1) (+ main_~nondetString2~0.offset (- 1)))))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (select |#length| main_~nondetString2~0.base) (+ main_~nondetString1~0.offset (- 1))) (+ main_~nondetString2~0.offset (- 1))))) (<= 11 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset)))) (= main_~nondetString1~0.offset 0)), 13574#(and (or (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ 5 1) 1) (- 1)))) (<= 8 (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ 5 1) 2) (- 1)))) (<= 9 (select |#length| |cstrcat_#in~s1.base|))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (<= 5 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 4 (- 1))))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ 5 1) 2) 1) (- 1)))) (<= 10 (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ 5 1) (- 1)))) (<= 7 (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ (+ 5 1) 2) 2) 2) (- 1)))) (<= 14 (select |#length| |cstrcat_#in~s1.base|))) (and (<= 12 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ 5 1) 2) 2) (- 1))))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1)) (and (<= 6 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 5 (- 1))))) (and (<= 4 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 3 (- 1))))) (and (or (<= 16 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (select |#length| |cstrcat_#in~s1.base|) (- 2)) (- 1))))) (<= 15 (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (select |#length| |cstrcat_#in~s1.base|) (- 1)) (- 1)))) (<= 11 (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ (+ 5 1) 2) 2) 1) (- 1)))) (<= 12 (select |#length| |cstrcat_#in~s1.base|)))) (= 0 |cstrcat_#in~s1.offset|)), 13575#(and (or (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (<= 14 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ 5 1) 2) 2) 2) (- 1))))) (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1))))) (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (<= 12 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 1) 2) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 1) (- 1)))) (<= 8 (select |#length| cstrcat_~s~0.base))) (and (<= 10 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 1) 2) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 2) (- 1)))) (<= 10 (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ 5 1) 2) 2) 1) (- 1)))) (<= 13 (select |#length| cstrcat_~s~0.base))) (and (<= 9 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (or (<= 16 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= 15 (select |#length| cstrcat_~s~0.base)))) (= cstrcat_~s~0.offset 0)), 13576#(and (or (and (<= 4 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (<= 14 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ 5 1) 2) 2) 2) (- 1))))) (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1))))) (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (<= 12 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 1) 2) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 1) (- 1)))) (<= 8 (select |#length| cstrcat_~s~0.base))) (and (<= 10 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 1) 2) 1) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 2) (- 1)))) (<= 10 (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ 5 1) 2) 2) 1) (- 1)))) (<= 13 (select |#length| cstrcat_~s~0.base))) (and (<= 9 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (or (<= 16 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= 15 (select |#length| cstrcat_~s~0.base)))) (= cstrcat_~s~0.offset 0)), 13577#(and (= cstrcat_~s~0.offset 1) (or (and (<= (+ cstrcat_~s~0.offset 14) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 15) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) 2) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 13) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))))), 13578#(and (= cstrcat_~s~0.offset 1) (or (and (<= (+ cstrcat_~s~0.offset 14) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 15) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) 2) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 13) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))))), 13579#(or (and (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) 2) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (or (<= (+ cstrcat_~s~0.offset 14) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= (+ cstrcat_~s~0.offset 13) (select |#length| cstrcat_~s~0.base)))), 13580#(or (and (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) 2) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (or (<= (+ cstrcat_~s~0.offset 14) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= (+ cstrcat_~s~0.offset 13) (select |#length| cstrcat_~s~0.base)))), 13581#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 2) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 2) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1)))) (<= (+ cstrcat_~s~0.offset 13) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)))), 13582#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 2) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 2) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1)))) (<= (+ cstrcat_~s~0.offset 13) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)))), 13583#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) (- 1)))))), 13584#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (or (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 2) 1) (- 1)))))), 13585#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)))), 13586#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)))), 13587#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1)))))), 13588#(or (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (or (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1)))))), 13589#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))))), 13590#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1)))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))))), 13591#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1)))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 13592#(or (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1)))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)))), 13593#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))))), 13594#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (or (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))))), 13595#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))), 13596#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 1)) (- 1)))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (or (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))), 13597#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))))), 13598#(or (and (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (or (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))))), 13599#(or (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 13600#(or (= |cstrcat_#t~mem0| 0) (and (or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)))), 13601#(or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 13602#(or (= |cstrcat_#t~mem0| 0) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 13603#(<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)), 13604#(and (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (<= 0 cstrcat_~s~0.offset)), 13605#(and (<= 1 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))), 13563#true, 13564#false, 13565#(<= 1 main_~length1~0), 13566#(and (<= 1 main_~length3~0) (<= 1 main_~length1~0)), 13567#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (<= 1 main_~length1~0))] [2018-02-04 01:44:02,149 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:44:02,150 INFO L409 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-02-04 01:44:02,150 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-02-04 01:44:02,150 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=252, Invalid=1554, Unknown=0, NotChecked=0, Total=1806 [2018-02-04 01:44:02,150 INFO L87 Difference]: Start difference. First operand 139 states and 145 transitions. Second operand 43 states. [2018-02-04 01:44:02,696 WARN L146 SmtUtils]: Spent 145ms on a formula simplification. DAG size of input: 134 DAG size of output 134 [2018-02-04 01:44:02,912 WARN L143 SmtUtils]: Spent 108ms on a formula simplification that was a NOOP. DAG size: 165 [2018-02-04 01:44:03,164 WARN L143 SmtUtils]: Spent 155ms on a formula simplification that was a NOOP. DAG size: 168 [2018-02-04 01:44:03,565 WARN L146 SmtUtils]: Spent 244ms on a formula simplification. DAG size of input: 199 DAG size of output 198 [2018-02-04 01:44:03,800 WARN L146 SmtUtils]: Spent 184ms on a formula simplification. DAG size of input: 189 DAG size of output 183 [2018-02-04 01:44:04,077 WARN L146 SmtUtils]: Spent 248ms on a formula simplification. DAG size of input: 195 DAG size of output 192 [2018-02-04 01:44:04,290 WARN L146 SmtUtils]: Spent 156ms on a formula simplification. DAG size of input: 186 DAG size of output 180 [2018-02-04 01:44:04,530 WARN L146 SmtUtils]: Spent 214ms on a formula simplification. DAG size of input: 189 DAG size of output 186 [2018-02-04 01:44:04,720 WARN L146 SmtUtils]: Spent 145ms on a formula simplification. DAG size of input: 177 DAG size of output 171 [2018-02-04 01:44:04,951 WARN L146 SmtUtils]: Spent 199ms on a formula simplification. DAG size of input: 180 DAG size of output 177 [2018-02-04 01:44:05,155 WARN L146 SmtUtils]: Spent 159ms on a formula simplification. DAG size of input: 169 DAG size of output 163 [2018-02-04 01:44:05,381 WARN L146 SmtUtils]: Spent 188ms on a formula simplification. DAG size of input: 172 DAG size of output 169 [2018-02-04 01:44:05,585 WARN L146 SmtUtils]: Spent 156ms on a formula simplification. DAG size of input: 163 DAG size of output 157 [2018-02-04 01:44:05,797 WARN L146 SmtUtils]: Spent 173ms on a formula simplification. DAG size of input: 166 DAG size of output 163 [2018-02-04 01:44:05,975 WARN L146 SmtUtils]: Spent 128ms on a formula simplification. DAG size of input: 157 DAG size of output 151 [2018-02-04 01:44:06,177 WARN L146 SmtUtils]: Spent 160ms on a formula simplification. DAG size of input: 160 DAG size of output 157 [2018-02-04 01:44:06,361 WARN L146 SmtUtils]: Spent 125ms on a formula simplification. DAG size of input: 149 DAG size of output 143 [2018-02-04 01:44:06,559 WARN L146 SmtUtils]: Spent 152ms on a formula simplification. DAG size of input: 152 DAG size of output 149 [2018-02-04 01:44:06,722 WARN L146 SmtUtils]: Spent 110ms on a formula simplification. DAG size of input: 143 DAG size of output 137 [2018-02-04 01:44:06,911 WARN L146 SmtUtils]: Spent 139ms on a formula simplification. DAG size of input: 146 DAG size of output 143 [2018-02-04 01:44:07,069 WARN L146 SmtUtils]: Spent 104ms on a formula simplification. DAG size of input: 137 DAG size of output 131 [2018-02-04 01:44:07,250 WARN L146 SmtUtils]: Spent 125ms on a formula simplification. DAG size of input: 140 DAG size of output 137 [2018-02-04 01:44:07,415 WARN L146 SmtUtils]: Spent 107ms on a formula simplification. DAG size of input: 129 DAG size of output 126 [2018-02-04 01:44:07,581 WARN L146 SmtUtils]: Spent 113ms on a formula simplification. DAG size of input: 132 DAG size of output 129 [2018-02-04 01:44:08,034 WARN L146 SmtUtils]: Spent 104ms on a formula simplification. DAG size of input: 126 DAG size of output 123 [2018-02-04 01:44:08,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:44:08,624 INFO L93 Difference]: Finished difference Result 164 states and 172 transitions. [2018-02-04 01:44:08,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-02-04 01:44:08,624 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 65 [2018-02-04 01:44:08,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:44:08,625 INFO L225 Difference]: With dead ends: 164 [2018-02-04 01:44:08,625 INFO L226 Difference]: Without dead ends: 164 [2018-02-04 01:44:08,625 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1212 ImplicationChecksByTransitivity, 23.7s TimeCoverageRelationStatistics Valid=999, Invalid=4853, Unknown=0, NotChecked=0, Total=5852 [2018-02-04 01:44:08,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-02-04 01:44:08,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 145. [2018-02-04 01:44:08,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-02-04 01:44:08,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 152 transitions. [2018-02-04 01:44:08,627 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 152 transitions. Word has length 65 [2018-02-04 01:44:08,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:44:08,628 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 152 transitions. [2018-02-04 01:44:08,628 INFO L433 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-02-04 01:44:08,628 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 152 transitions. [2018-02-04 01:44:08,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-02-04 01:44:08,628 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:44:08,628 INFO L351 BasicCegarLoop]: trace histogram [13, 13, 12, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:44:08,629 INFO L371 AbstractCegarLoop]: === Iteration 54 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:44:08,629 INFO L82 PathProgramCache]: Analyzing trace with hash -1759799287, now seen corresponding path program 17 times [2018-02-04 01:44:08,629 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:44:08,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:44:08,656 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:44:11,706 WARN L146 SmtUtils]: Spent 495ms on a formula simplification. DAG size of input: 207 DAG size of output 107 [2018-02-04 01:44:12,196 WARN L146 SmtUtils]: Spent 468ms on a formula simplification. DAG size of input: 175 DAG size of output 97 [2018-02-04 01:44:12,677 WARN L146 SmtUtils]: Spent 457ms on a formula simplification. DAG size of input: 175 DAG size of output 97 [2018-02-04 01:44:13,178 WARN L146 SmtUtils]: Spent 472ms on a formula simplification. DAG size of input: 177 DAG size of output 97 [2018-02-04 01:44:13,703 WARN L146 SmtUtils]: Spent 487ms on a formula simplification. DAG size of input: 190 DAG size of output 102 [2018-02-04 01:44:14,226 WARN L146 SmtUtils]: Spent 483ms on a formula simplification. DAG size of input: 192 DAG size of output 102 [2018-02-04 01:44:14,591 WARN L146 SmtUtils]: Spent 324ms on a formula simplification. DAG size of input: 150 DAG size of output 89 [2018-02-04 01:44:14,966 WARN L146 SmtUtils]: Spent 336ms on a formula simplification. DAG size of input: 152 DAG size of output 89 [2018-02-04 01:44:15,249 WARN L146 SmtUtils]: Spent 245ms on a formula simplification. DAG size of input: 127 DAG size of output 81 [2018-02-04 01:44:15,521 WARN L146 SmtUtils]: Spent 235ms on a formula simplification. DAG size of input: 129 DAG size of output 81 [2018-02-04 01:44:15,749 WARN L146 SmtUtils]: Spent 170ms on a formula simplification. DAG size of input: 106 DAG size of output 73 [2018-02-04 01:44:15,951 WARN L146 SmtUtils]: Spent 164ms on a formula simplification. DAG size of input: 108 DAG size of output 73 [2018-02-04 01:44:16,113 WARN L146 SmtUtils]: Spent 127ms on a formula simplification. DAG size of input: 87 DAG size of output 65 [2018-02-04 01:44:16,273 WARN L146 SmtUtils]: Spent 125ms on a formula simplification. DAG size of input: 89 DAG size of output 65 [2018-02-04 01:44:17,107 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 0 proven. 238 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:44:17,107 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:44:17,107 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39] total 39 [2018-02-04 01:44:17,107 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:44:17,108 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:44:17,108 INFO L182 omatonBuilderFactory]: Interpolants [14016#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))), 14017#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))), 14018#(or (and (= |cstrcat_#t~post3.offset| 0) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) cstrcat_~s2.offset) (= |cstrcat_#t~post3.base| cstrcat_~s2.base)) (and (<= (+ |cstrcat_#t~post2.offset| 1) cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))), 14019#(or (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset) (and (<= (+ |cstrcat_#t~post2.offset| 1) cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base)))), 14020#(or (and (<= 1 cstrcat_~s~0.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))) (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset)), 14021#(or (and (<= 1 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|))) (<= (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|)), 14022#(and (<= 1 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|))), 13983#true, 13984#false, 13985#(<= 1 main_~length3~0), 13986#(and (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0)), 13987#(and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (= 1 (select |#valid| |main_#t~malloc9.base|)) (<= 1 main_~length3~0)), 13988#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= 1 main_~length3~0) (= 1 (select |#valid| main_~nondetString1~0.base))), 13989#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|))), 13990#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (or (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= (+ main_~nondetString2~0.offset main_~length3~0) 2)) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~length3~0)), 13991#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (or (<= (+ main_~length3~0 (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base)) (<= (+ main_~nondetString2~0.offset main_~length3~0) 2)) (<= 1 main_~length3~0)), 13992#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (or (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (+ (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 3) 1) 1) 1) 1) 1) 1) (- 1))))) (<= (+ (select |#length| main_~nondetString1~0.base) 9) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- (select |#length| main_~nondetString1~0.base)) (select |#length| main_~nondetString2~0.base)) (+ main_~nondetString2~0.offset (- 1))))) (<= (+ (select |#length| main_~nondetString1~0.base) 10) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)))) (and (<= (+ (select |#length| main_~nondetString1~0.base) 11) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (or (<= (+ (select |#length| main_~nondetString1~0.base) 12) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- (select |#length| main_~nondetString1~0.base)) (+ (select |#length| main_~nondetString2~0.base) (- 1))) (+ main_~nondetString2~0.offset (- 1))))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (+ (+ (- main_~nondetString2~0.offset) 3) 1) 1) (- 1))))) (<= (+ (select |#length| main_~nondetString1~0.base) 5) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)) (and (<= (+ (select |#length| main_~nondetString1~0.base) 7) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 3) 1) 1) 1) 1) (- 1)))))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 3) 1) 1) 1) 1) 1) (- 1))))) (<= (+ (select |#length| main_~nondetString1~0.base) 8) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)))) (and (<= (+ (select |#length| main_~nondetString1~0.base) 4) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (+ (- main_~nondetString2~0.offset) 3) 1) (- 1)))))) (and (<= (+ (select |#length| main_~nondetString1~0.base) 3) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (- 1)))))) (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 3) 1) 1) 1) (- 1))))) (<= (+ (select |#length| main_~nondetString1~0.base) 6) (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)))))), 13993#(and (= 0 |cstrcat_#in~s2.offset|) (or (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ (+ 3 1) 1) 1) 1) (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 7) (select |#length| |cstrcat_#in~s1.base|))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 9) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ (+ (+ (+ 3 1) 1) 1) 1) 1) 1) (- 1))))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ 3 1) 1) (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 5) (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ (+ (+ 3 1) 1) 1) 1) 1) (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 8) (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ 3 1) (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 4) (select |#length| |cstrcat_#in~s1.base|))) (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 11) (select |#length| |cstrcat_#in~s1.base|)) (or (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (- (select |#length| |cstrcat_#in~s2.base|)) (+ (select |#length| |cstrcat_#in~s1.base|) (- 1))) (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 12) (select |#length| |cstrcat_#in~s1.base|)))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (- (select |#length| |cstrcat_#in~s2.base|)) (select |#length| |cstrcat_#in~s1.base|)) (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 10) (select |#length| |cstrcat_#in~s1.base|))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1)) (and (<= (+ (select |#length| |cstrcat_#in~s2.base|) 6) (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ 3 1) 1) 1) (- 1))))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 3 (- 1)))) (<= (+ (select |#length| |cstrcat_#in~s2.base|) 3) (select |#length| |cstrcat_#in~s1.base|)))) (= 0 |cstrcat_#in~s1.offset|)), 13994#(and (= 0 cstrcat_~s2.offset) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 3 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ 3 1) 1) 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 8) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 3 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ 3 1) 1) 1) 1) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ (select |#length| cstrcat_~s2.base) 11) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (- 1))) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 12) (select |#length| cstrcat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 3 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ 3 1) 1) 1) 1) 1) 1) (- 1)))))) (= cstrcat_~s~0.offset 0)), 13995#(and (= 0 cstrcat_~s2.offset) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 3 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 4) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ 3 1) 1) 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 8) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 3) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 3 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ 3 1) 1) 1) 1) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) 11) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (+ (select |#length| cstrcat_~s~0.base) (- 1))) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 12) (select |#length| cstrcat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 3 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) 6) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (select |#length| cstrcat_~s2.base)) (select |#length| cstrcat_~s~0.base)) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ 3 1) 1) 1) 1) 1) 1) (- 1)))))) (= cstrcat_~s~0.offset 0)), 13996#(and (= 0 cstrcat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1)))) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 2)))) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) 1) 1) (- 1))))) (and (= cstrcat_~s~0.offset 1) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1)))) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))))), 13997#(and (or (and (= |cstrcat_#t~mem0| 0) (= cstrcat_~s~0.offset 1)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1)))) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 2)))) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) 1) 1) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (- (+ (select |#length| cstrcat_~s2.base) (+ cstrcat_~s~0.offset (- 1)))) (+ (select |#length| cstrcat_~s~0.base) (+ cstrcat_~s~0.offset (- 1)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ (select |#length| cstrcat_~s2.base) cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base)))) (= 0 cstrcat_~s2.offset)), 13998#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) (- 1))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1)))))), 13999#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) (- 1))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1)))))), 14000#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) (- 1))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1)))))), 14001#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) (- 1))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1)))))), 14002#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1)))))), 14003#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1)))))), 14004#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1)))))), 14005#(or (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 2) 1) 1) (- 1)))))), 14006#(or (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))), 14007#(or (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1)))))), 14008#(or (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base))))), 14009#(or (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base))))), 14010#(or (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)))) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 14011#(or (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)))) (= |cstrcat_#t~mem0| 0) (and (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 2)) (- 1))))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1))), 14012#(or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (or (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)))), 14013#(or (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (and (or (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)))), 14014#(or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 14015#(or (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base)) (= |cstrcat_#t~mem0| 0) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 1)))] [2018-02-04 01:44:17,108 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 0 proven. 238 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:44:17,108 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-02-04 01:44:17,109 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-02-04 01:44:17,109 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=179, Invalid=1381, Unknown=0, NotChecked=0, Total=1560 [2018-02-04 01:44:17,109 INFO L87 Difference]: Start difference. First operand 145 states and 152 transitions. Second operand 40 states. [2018-02-04 01:44:18,094 WARN L146 SmtUtils]: Spent 193ms on a formula simplification. DAG size of input: 188 DAG size of output 187 [2018-02-04 01:44:18,270 WARN L146 SmtUtils]: Spent 134ms on a formula simplification. DAG size of input: 175 DAG size of output 172 [2018-02-04 01:44:18,578 WARN L146 SmtUtils]: Spent 130ms on a formula simplification. DAG size of input: 168 DAG size of output 165 [2018-02-04 01:44:18,858 WARN L146 SmtUtils]: Spent 119ms on a formula simplification. DAG size of input: 161 DAG size of output 158 [2018-02-04 01:44:19,157 WARN L146 SmtUtils]: Spent 131ms on a formula simplification. DAG size of input: 154 DAG size of output 151 [2018-02-04 01:44:19,458 WARN L146 SmtUtils]: Spent 122ms on a formula simplification. DAG size of input: 147 DAG size of output 144 [2018-02-04 01:44:19,746 WARN L146 SmtUtils]: Spent 109ms on a formula simplification. DAG size of input: 140 DAG size of output 137 [2018-02-04 01:44:20,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 01:44:20,993 INFO L93 Difference]: Finished difference Result 159 states and 166 transitions. [2018-02-04 01:44:20,993 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-02-04 01:44:20,993 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 66 [2018-02-04 01:44:20,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 01:44:20,993 INFO L225 Difference]: With dead ends: 159 [2018-02-04 01:44:20,994 INFO L226 Difference]: Without dead ends: 159 [2018-02-04 01:44:20,994 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1096 ImplicationChecksByTransitivity, 9.3s TimeCoverageRelationStatistics Valid=662, Invalid=4168, Unknown=0, NotChecked=0, Total=4830 [2018-02-04 01:44:20,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-02-04 01:44:20,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 145. [2018-02-04 01:44:20,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-02-04 01:44:20,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 152 transitions. [2018-02-04 01:44:20,995 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 152 transitions. Word has length 66 [2018-02-04 01:44:20,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 01:44:20,996 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 152 transitions. [2018-02-04 01:44:20,996 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-02-04 01:44:20,996 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 152 transitions. [2018-02-04 01:44:20,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-02-04 01:44:20,996 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 01:44:20,996 INFO L351 BasicCegarLoop]: trace histogram [12, 12, 11, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 01:44:20,996 INFO L371 AbstractCegarLoop]: === Iteration 55 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]=== [2018-02-04 01:44:20,996 INFO L82 PathProgramCache]: Analyzing trace with hash -1355312203, now seen corresponding path program 18 times [2018-02-04 01:44:20,997 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 01:44:21,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 01:44:21,026 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 01:44:22,281 WARN L146 SmtUtils]: Spent 254ms on a formula simplification. DAG size of input: 327 DAG size of output 91 [2018-02-04 01:44:22,568 WARN L146 SmtUtils]: Spent 263ms on a formula simplification. DAG size of input: 249 DAG size of output 83 [2018-02-04 01:44:22,870 WARN L146 SmtUtils]: Spent 271ms on a formula simplification. DAG size of input: 249 DAG size of output 83 [2018-02-04 01:44:23,173 WARN L146 SmtUtils]: Spent 268ms on a formula simplification. DAG size of input: 251 DAG size of output 83 [2018-02-04 01:44:23,514 WARN L146 SmtUtils]: Spent 296ms on a formula simplification. DAG size of input: 270 DAG size of output 93 [2018-02-04 01:44:23,840 WARN L146 SmtUtils]: Spent 274ms on a formula simplification. DAG size of input: 272 DAG size of output 93 [2018-02-04 01:44:24,093 WARN L146 SmtUtils]: Spent 205ms on a formula simplification. DAG size of input: 189 DAG size of output 84 [2018-02-04 01:44:24,349 WARN L146 SmtUtils]: Spent 213ms on a formula simplification. DAG size of input: 191 DAG size of output 84 [2018-02-04 01:44:24,537 WARN L146 SmtUtils]: Spent 151ms on a formula simplification. DAG size of input: 134 DAG size of output 76 [2018-02-04 01:44:24,720 WARN L146 SmtUtils]: Spent 142ms on a formula simplification. DAG size of input: 136 DAG size of output 76 [2018-02-04 01:44:25,905 INFO L134 CoverageAnalysis]: Checked inductivity of 211 backedges. 0 proven. 211 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:44:25,906 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 01:44:25,906 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37] total 37 [2018-02-04 01:44:25,906 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 01:44:25,906 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:44:25,906 INFO L182 omatonBuilderFactory]: Interpolants [14400#(and (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (and (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 13) (select |#length| cstrcat_~s~0.base)))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1)))))) (= cstrcat_~s~0.offset 1)), 14401#(and (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (and (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 13) (select |#length| cstrcat_~s~0.base)))) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) (- 1))))) (= |cstrcat_#t~mem0| 0) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 4) 1) 2) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1)))))) (= cstrcat_~s~0.offset 1)), 14402#(or (and (<= 2 cstrcat_~s~0.offset) (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 14403#(or (and (<= 2 cstrcat_~s~0.offset) (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 12) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ (+ cstrcat_~s~0.offset 3) 1) 2) 1) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))))) (= |cstrcat_#t~mem0| 0)), 14404#(or (and (<= 3 cstrcat_~s~0.offset) (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 14405#(or (= |cstrcat_#t~mem0| 0) (and (<= 3 cstrcat_~s~0.offset) (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ cstrcat_~s~0.offset 3) 2) 1) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 11) (select |#length| cstrcat_~s~0.base))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 2) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))))))), 14406#(or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1)))))) (<= 4 cstrcat_~s~0.offset))), 14407#(or (= |cstrcat_#t~mem0| 0) (and (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 4) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 10) (select |#length| cstrcat_~s~0.base)))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 4) (- 1)))))) (<= 4 cstrcat_~s~0.offset))), 14408#(or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= 5 cstrcat_~s~0.offset) (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))))))), 14409#(or (= |cstrcat_#t~mem0| 0) (and (<= 5 cstrcat_~s~0.offset) (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (and (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 9) (select |#length| cstrcat_~s~0.base)))) (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ cstrcat_~s~0.offset 3) 1) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))))))), 14410#(or (and (or (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))))) (<= 6 cstrcat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 14411#(or (= |cstrcat_#t~mem0| 0) (and (or (and (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 8) (select |#length| cstrcat_~s~0.base)))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 3) (- 1)))))) (<= 6 cstrcat_~s~0.offset))), 14412#(or (and (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base))))) (<= 7 cstrcat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 14413#(or (= |cstrcat_#t~mem0| 0) (and (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ cstrcat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 7) (select |#length| cstrcat_~s~0.base))))) (<= 7 cstrcat_~s~0.offset))), 14414#(or (and (or (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2))) (<= 8 cstrcat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset))), 14415#(or (and (or (and (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrcat_~s~0.offset 6) (select |#length| cstrcat_~s~0.base)))) (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2))) (<= 8 cstrcat_~s~0.offset)) (= |cstrcat_#t~mem0| 0)), 14416#(and (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (<= 9 cstrcat_~s~0.offset)), 14417#(and (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (= |cstrcat_#t~mem0| 0) (<= (+ cstrcat_~s~0.offset 5) (select |#length| cstrcat_~s~0.base))) (<= 9 cstrcat_~s~0.offset)), 14418#(and (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (<= (+ cstrcat_~s~0.offset 4) (select |#length| cstrcat_~s~0.base))) (<= 10 cstrcat_~s~0.offset)), 14419#(and (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (<= (+ cstrcat_~s~0.offset 3) (select |#length| cstrcat_~s~0.base))) (<= 11 cstrcat_~s~0.offset)), 14420#(and (<= 12 cstrcat_~s~0.offset) (or (and (= |cstrcat_#t~post3.offset| 0) (<= (+ (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) (+ cstrcat_~s2.offset 1)) (= |cstrcat_#t~post3.base| cstrcat_~s2.base)) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base)))), 14421#(and (or (<= (select |#length| cstrcat_~s2.base) (+ cstrcat_~s2.offset 1)) (<= (+ cstrcat_~s~0.offset 2) (select |#length| cstrcat_~s~0.base))) (<= 12 cstrcat_~s~0.offset)), 14422#(and (or (<= (select |#length| cstrcat_~s2.base) cstrcat_~s2.offset) (<= (+ cstrcat_~s~0.offset 1) (select |#length| cstrcat_~s~0.base))) (<= 13 cstrcat_~s~0.offset)), 14423#(and (<= 13 |cstrcat_#t~post2.offset|) (or (<= (select |#length| |cstrcat_#t~post3.base|) |cstrcat_#t~post3.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|)))), 14424#(and (<= 13 |cstrcat_#t~post2.offset|) (<= (+ |cstrcat_#t~post2.offset| 1) (select |#length| |cstrcat_#t~post2.base|))), 14387#true, 14388#false, 14389#(<= 1 main_~length3~0), 14390#(and (<= 1 main_~length3~0) (or (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= main_~length1~0 2))), 14391#(and (<= 1 main_~length3~0) (or (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= main_~length1~0 2)) (or (and (= main_~length1~0 (select |#length| |main_#t~malloc9.base|)) (= 0 |main_#t~malloc9.offset|) (= 1 (select |#valid| |main_#t~malloc9.base|))) (< 2 main_~length1~0))), 14392#(and (<= 1 main_~length3~0) (or (<= (+ main_~length3~0 main_~length1~0) main_~length2~0) (<= main_~length1~0 2)) (or (and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= 1 (select |#valid| main_~nondetString1~0.base))) (< 2 main_~length1~0))), 14393#(and (or (<= (+ main_~length3~0 main_~length1~0) (select |#length| |main_#t~malloc10.base|)) (<= main_~length1~0 2)) (= 0 |main_#t~malloc10.offset|) (<= 1 main_~length3~0) (or (and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base))) (< 2 main_~length1~0))), 14394#(and (= 0 main_~nondetString2~0.offset) (or (= 2 (+ main_~nondetString2~0.offset main_~length3~0)) (and (<= 1 main_~length3~0) (or (<= (+ main_~length3~0 main_~length1~0) (select |#length| main_~nondetString2~0.base)) (<= main_~length1~0 2)) (or (and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base))) (< 2 main_~length1~0))) (= (+ main_~nondetString2~0.offset main_~length3~0) 1))), 14395#(and (= 0 main_~nondetString2~0.offset) (or (= 2 (+ main_~nondetString2~0.offset main_~length3~0)) (and (<= 1 main_~length3~0) (or (and (= 0 main_~nondetString1~0.offset) (<= (select |#length| main_~nondetString1~0.base) 2)) (<= (+ main_~length3~0 3) (select |#length| main_~nondetString2~0.base)))) (= (+ main_~nondetString2~0.offset main_~length3~0) 1))), 14396#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (and (<= 12 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) 2) 1) (- 1)))))) (and (<= 8 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 5) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 7 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 4) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 6 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (- main_~nondetString2~0.offset) 3) (+ main_~nondetString2~0.offset (- 1)))))) (and (or (<= 14 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (select |#length| main_~nondetString2~0.base) (- 3)) (+ main_~nondetString2~0.offset (- 1)))))) (<= 13 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)))) (and (= 0 main_~nondetString1~0.offset) (<= (select |#length| main_~nondetString1~0.base) 2)) (and (<= 10 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) 1) (- 1)))))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)) (and (<= 9 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) (+ main_~nondetString2~0.offset (- 1)))))) (and (<= 11 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (+ (+ (+ (- main_~nondetString2~0.offset) 5) 1) 2) (+ main_~nondetString2~0.offset (- 1)))))))), 14397#(and (or (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ 5 1) (- 1)))) (<= 9 (select |#length| |cstrcat_#in~s1.base|))) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) |cstrcat_#in~s1.offset|)) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ 5 1) 1) (- 1)))) (<= 10 (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ (+ 5 1) 2) 1) (- 1)))) (<= 12 (select |#length| |cstrcat_#in~s1.base|))) (and (<= (select |#length| |cstrcat_#in~s2.base|) 2) (= 0 |cstrcat_#in~s2.offset|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) 1)) (and (or (<= 14 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (select |#length| |cstrcat_#in~s1.base|) (- 3)) (- 1))))) (<= 13 (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 3 (- 1)))) (<= 6 (select |#length| |cstrcat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 5 (- 1)))) (<= 8 (select |#length| |cstrcat_#in~s1.base|))) (and (<= 7 (select |#length| |cstrcat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ 4 (- 1))))) (and (= 0 (select (select |#memory_int| |cstrcat_#in~s1.base|) (+ (+ (+ 5 1) 2) (- 1)))) (<= 11 (select |#length| |cstrcat_#in~s1.base|)))) (= 0 |cstrcat_#in~s1.offset|)), 14398#(and (= cstrcat_~s~0.offset 0) (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (and (<= 12 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 1) 2) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 1) (- 1)))) (<= 10 (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1))))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) cstrcat_~s~0.offset)) (and (<= 9 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= 14 (select |#length| cstrcat_~s~0.base))) (<= 13 (select |#length| cstrcat_~s~0.base))) (and (<= 8 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 2) (- 1)))) (<= 11 (select |#length| cstrcat_~s~0.base))))), 14399#(and (or (and (= 0 cstrcat_~s2.offset) (<= (select |#length| cstrcat_~s2.base) 2)) (and (<= 12 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ (+ 5 1) 2) 1) (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 1) (- 1)))) (<= 10 (select |#length| cstrcat_~s~0.base))) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) 1)) (= |cstrcat_#t~mem0| 0) (and (<= 6 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 3 (- 1))))) (and (<= 7 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 4 (- 1))))) (and (<= 9 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ 5 1) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (select |#length| cstrcat_~s~0.base) (- 3)) (- 1)))) (<= 14 (select |#length| cstrcat_~s~0.base))) (<= 13 (select |#length| cstrcat_~s~0.base))) (and (<= 8 (select |#length| cstrcat_~s~0.base)) (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ 5 (- 1))))) (and (= 0 (select (select |#memory_int| cstrcat_~s~0.base) (+ (+ (+ 5 1) 2) (- 1)))) (<= 11 (select |#length| cstrcat_~s~0.base)))) (= cstrcat_~s~0.offset 0))] [2018-02-04 01:44:25,907 INFO L134 CoverageAnalysis]: Checked inductivity of 211 backedges. 0 proven. 211 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 01:44:25,907 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-02-04 01:44:25,907 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-02-04 01:44:25,907 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=1322, Unknown=0, NotChecked=0, Total=1406 [2018-02-04 01:44:25,907 INFO L87 Difference]: Start difference. First operand 145 states and 152 transitions. Second operand 38 states. [2018-02-04 01:44:26,380 WARN L146 SmtUtils]: Spent 121ms on a formula simplification. DAG size of input: 130 DAG size of output 128 Received shutdown request... [2018-02-04 01:44:28,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-02-04 01:44:28,638 WARN L491 AbstractCegarLoop]: Verification canceled [2018-02-04 01:44:28,640 WARN L185 ceAbstractionStarter]: Timeout [2018-02-04 01:44:28,640 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.02 01:44:28 BoogieIcfgContainer [2018-02-04 01:44:28,640 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-02-04 01:44:28,641 INFO L168 Benchmark]: Toolchain (without parser) took 177445.99 ms. Allocated memory was 405.3 MB in the beginning and 1.7 GB in the end (delta: 1.3 GB). Free memory was 363.1 MB in the beginning and 989.0 MB in the end (delta: -626.0 MB). Peak memory consumption was 678.0 MB. Max. memory is 5.3 GB. [2018-02-04 01:44:28,642 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 405.3 MB. Free memory is still 368.3 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-04 01:44:28,642 INFO L168 Benchmark]: CACSL2BoogieTranslator took 169.99 ms. Allocated memory is still 405.3 MB. Free memory was 361.7 MB in the beginning and 351.2 MB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 5.3 GB. [2018-02-04 01:44:28,642 INFO L168 Benchmark]: Boogie Preprocessor took 27.00 ms. Allocated memory is still 405.3 MB. Free memory was 351.2 MB in the beginning and 349.8 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. [2018-02-04 01:44:28,642 INFO L168 Benchmark]: RCFGBuilder took 188.50 ms. Allocated memory is still 405.3 MB. Free memory was 349.8 MB in the beginning and 330.0 MB in the end (delta: 19.8 MB). Peak memory consumption was 19.8 MB. Max. memory is 5.3 GB. [2018-02-04 01:44:28,643 INFO L168 Benchmark]: TraceAbstraction took 177057.66 ms. Allocated memory was 405.3 MB in the beginning and 1.7 GB in the end (delta: 1.3 GB). Free memory was 330.0 MB in the beginning and 989.0 MB in the end (delta: -659.0 MB). Peak memory consumption was 644.9 MB. Max. memory is 5.3 GB. [2018-02-04 01:44:28,644 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 405.3 MB. Free memory is still 368.3 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 169.99 ms. Allocated memory is still 405.3 MB. Free memory was 361.7 MB in the beginning and 351.2 MB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 27.00 ms. Allocated memory is still 405.3 MB. Free memory was 351.2 MB in the beginning and 349.8 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. * RCFGBuilder took 188.50 ms. Allocated memory is still 405.3 MB. Free memory was 349.8 MB in the beginning and 330.0 MB in the end (delta: 19.8 MB). Peak memory consumption was 19.8 MB. Max. memory is 5.3 GB. * TraceAbstraction took 177057.66 ms. Allocated memory was 405.3 MB in the beginning and 1.7 GB in the end (delta: 1.3 GB). Free memory was 330.0 MB in the beginning and 989.0 MB in the end (delta: -659.0 MB). Peak memory consumption was 644.9 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 543). Cancelled while BasicCegarLoop was constructing difference of abstraction (145states) and interpolant automaton (currently 31 states, 38 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 96. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 545). Cancelled while BasicCegarLoop was constructing difference of abstraction (145states) and interpolant automaton (currently 31 states, 38 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 96. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 543). Cancelled while BasicCegarLoop was constructing difference of abstraction (145states) and interpolant automaton (currently 31 states, 38 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 96. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 545). Cancelled while BasicCegarLoop was constructing difference of abstraction (145states) and interpolant automaton (currently 31 states, 38 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 96. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 545). Cancelled while BasicCegarLoop was constructing difference of abstraction (145states) and interpolant automaton (currently 31 states, 38 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 96. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 545). Cancelled while BasicCegarLoop was constructing difference of abstraction (145states) and interpolant automaton (currently 31 states, 38 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 96. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was constructing difference of abstraction (145states) and interpolant automaton (currently 31 states, 38 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 96. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 565). Cancelled while BasicCegarLoop was constructing difference of abstraction (145states) and interpolant automaton (currently 31 states, 38 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 96. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was constructing difference of abstraction (145states) and interpolant automaton (currently 31 states, 38 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 96. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 565). Cancelled while BasicCegarLoop was constructing difference of abstraction (145states) and interpolant automaton (currently 31 states, 38 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 96. - TimeoutResultAtElement [Line: 549]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 549). Cancelled while BasicCegarLoop was constructing difference of abstraction (145states) and interpolant automaton (currently 31 states, 38 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 96. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 49 locations, 11 error locations. TIMEOUT Result, 177.0s OverallTime, 55 OverallIterations, 16 TraceHistogramMax, 66.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1532 SDtfs, 3916 SDslu, 15361 SDs, 0 SdLazy, 19811 SolverSat, 1212 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1847 GetRequests, 65 SyntacticMatches, 4 SemanticMatches, 1777 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16959 ImplicationChecksByTransitivity, 140.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=170occurred in iteration=24, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 29/3616 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 54 MinimizatonAttempts, 713 StatesRemovedByMinimization, 45 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 109.4s InterpolantComputationTime, 2107 NumberOfCodeBlocks, 2107 NumberOfCodeBlocksAsserted, 55 NumberOfCheckSat, 2052 ConstructedInterpolants, 0 QuantifiedInterpolants, 4528004 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 55 InterpolantComputations, 16 PerfectInterpolantSequences, 29/3616 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/cstrcat-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_Array.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-04_01-44-28-649.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/cstrcat-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_Array.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-04_01-44-28-649.csv Completed graceful shutdown