java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i


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This is Ultimate 0.1.23-ccafca9-m
[2018-02-04 04:16:22,933 INFO  L170        SettingsManager]: Resetting all preferences to default values...
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[2018-02-04 04:16:22,968 INFO  L98         SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf
[2018-02-04 04:16:22,976 INFO  L110        SettingsManager]: Loading preferences was successful
[2018-02-04 04:16:22,976 INFO  L112        SettingsManager]: Preferences different from defaults after loading the file:
[2018-02-04 04:16:22,977 INFO  L131        SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2018-02-04 04:16:22,977 INFO  L133        SettingsManager]:  * Create parallel compositions if possible=false
[2018-02-04 04:16:22,977 INFO  L133        SettingsManager]:  * Use SBE=true
[2018-02-04 04:16:22,977 INFO  L131        SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2018-02-04 04:16:22,977 INFO  L133        SettingsManager]:  * sizeof long=4
[2018-02-04 04:16:22,977 INFO  L133        SettingsManager]:  * Check unreachability of error function in SV-COMP mode=false
[2018-02-04 04:16:22,977 INFO  L133        SettingsManager]:  * Overapproximate operations on floating types=true
[2018-02-04 04:16:22,977 INFO  L133        SettingsManager]:  * sizeof POINTER=4
[2018-02-04 04:16:22,978 INFO  L133        SettingsManager]:  * Check division by zero=IGNORE
[2018-02-04 04:16:22,978 INFO  L133        SettingsManager]:  * Check for the main procedure if all allocated memory was freed=true
[2018-02-04 04:16:22,978 INFO  L133        SettingsManager]:  * Bitprecise bitfields=true
[2018-02-04 04:16:22,978 INFO  L133        SettingsManager]:  * SV-COMP memtrack compatibility mode=true
[2018-02-04 04:16:22,978 INFO  L133        SettingsManager]:  * If two pointers are subtracted or compared they have the same base address=IGNORE
[2018-02-04 04:16:22,978 INFO  L133        SettingsManager]:  * sizeof long double=12
[2018-02-04 04:16:22,978 INFO  L131        SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2018-02-04 04:16:22,978 INFO  L133        SettingsManager]:  * Size of a code block=SequenceOfStatements
[2018-02-04 04:16:22,978 INFO  L133        SettingsManager]:  * To the following directory=./dump/
[2018-02-04 04:16:22,978 INFO  L133        SettingsManager]:  * SMT solver=External_DefaultMode
[2018-02-04 04:16:22,979 INFO  L133        SettingsManager]:  * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2018-02-04 04:16:22,979 INFO  L131        SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2018-02-04 04:16:22,979 INFO  L133        SettingsManager]:  * Interpolant automaton=TWOTRACK
[2018-02-04 04:16:22,979 INFO  L133        SettingsManager]:  * Compute Interpolants along a Counterexample=FPandBP
[2018-02-04 04:16:22,979 INFO  L133        SettingsManager]:  * Trace refinement strategy=SMTINTERPOL
[2018-02-04 04:16:23,006 INFO  L81    nceAwareModelManager]: Repository-Root is: /tmp
[2018-02-04 04:16:23,014 INFO  L266   ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized
[2018-02-04 04:16:23,017 INFO  L222   ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected.
[2018-02-04 04:16:23,018 INFO  L271        PluginConnector]: Initializing CDTParser...
[2018-02-04 04:16:23,018 INFO  L276        PluginConnector]: CDTParser initialized
[2018-02-04 04:16:23,019 INFO  L431   ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i
[2018-02-04 04:16:23,148 INFO  L304   ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2018-02-04 04:16:23,149 INFO  L131        ToolchainWalker]: Walking toolchain with 4 elements.
[2018-02-04 04:16:23,149 INFO  L113        PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2018-02-04 04:16:23,149 INFO  L271        PluginConnector]: Initializing CACSL2BoogieTranslator...
[2018-02-04 04:16:23,153 INFO  L276        PluginConnector]: CACSL2BoogieTranslator initialized
[2018-02-04 04:16:23,154 INFO  L185        PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 04:16:23" (1/1) ...
[2018-02-04 04:16:23,156 INFO  L205        PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@692a7dd0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:23, skipping insertion in model container
[2018-02-04 04:16:23,156 INFO  L185        PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 04:16:23" (1/1) ...
[2018-02-04 04:16:23,167 INFO  L153             Dispatcher]: Using SV-COMP mode
[2018-02-04 04:16:23,200 INFO  L153             Dispatcher]: Using SV-COMP mode
[2018-02-04 04:16:23,304 INFO  L450          PostProcessor]: Settings: Checked method=main
[2018-02-04 04:16:23,324 INFO  L450          PostProcessor]: Settings: Checked method=main
[2018-02-04 04:16:23,333 INFO  L202        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:23 WrapperNode
[2018-02-04 04:16:23,333 INFO  L132        PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2018-02-04 04:16:23,334 INFO  L113        PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2018-02-04 04:16:23,334 INFO  L271        PluginConnector]: Initializing Boogie Preprocessor...
[2018-02-04 04:16:23,334 INFO  L276        PluginConnector]: Boogie Preprocessor initialized
[2018-02-04 04:16:23,343 INFO  L185        PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:23" (1/1) ...
[2018-02-04 04:16:23,343 INFO  L185        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:23" (1/1) ...
[2018-02-04 04:16:23,351 INFO  L185        PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:23" (1/1) ...
[2018-02-04 04:16:23,352 INFO  L185        PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:23" (1/1) ...
[2018-02-04 04:16:23,359 INFO  L185        PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:23" (1/1) ...
[2018-02-04 04:16:23,362 INFO  L185        PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:23" (1/1) ...
[2018-02-04 04:16:23,364 INFO  L185        PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:23" (1/1) ...
[2018-02-04 04:16:23,366 INFO  L132        PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2018-02-04 04:16:23,367 INFO  L113        PluginConnector]: ------------------------RCFGBuilder----------------------------
[2018-02-04 04:16:23,367 INFO  L271        PluginConnector]: Initializing RCFGBuilder...
[2018-02-04 04:16:23,367 INFO  L276        PluginConnector]: RCFGBuilder initialized
[2018-02-04 04:16:23,368 INFO  L185        PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:23" (1/1) ...
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2018-02-04 04:16:23,406 INFO  L136     BoogieDeclarations]: Found implementation of procedure ULTIMATE.init
[2018-02-04 04:16:23,406 INFO  L136     BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2018-02-04 04:16:23,406 INFO  L136     BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID
[2018-02-04 04:16:23,407 INFO  L136     BoogieDeclarations]: Found implementation of procedure ldv_malloc
[2018-02-04 04:16:23,407 INFO  L136     BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD
[2018-02-04 04:16:23,407 INFO  L136     BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return
[2018-02-04 04:16:23,407 INFO  L136     BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return
[2018-02-04 04:16:23,407 INFO  L136     BoogieDeclarations]: Found implementation of procedure ldv_kref_sub
[2018-02-04 04:16:23,407 INFO  L136     BoogieDeclarations]: Found implementation of procedure ldv_kref_init
[2018-02-04 04:16:23,407 INFO  L136     BoogieDeclarations]: Found implementation of procedure ldv_kref_get
[2018-02-04 04:16:23,408 INFO  L136     BoogieDeclarations]: Found implementation of procedure ldv_kref_put
[2018-02-04 04:16:23,408 INFO  L136     BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup
[2018-02-04 04:16:23,408 INFO  L136     BoogieDeclarations]: Found implementation of procedure ldv_kobject_release
[2018-02-04 04:16:23,408 INFO  L136     BoogieDeclarations]: Found implementation of procedure ldv_kobject_put
[2018-02-04 04:16:23,408 INFO  L136     BoogieDeclarations]: Found implementation of procedure ldv_kobject_get
[2018-02-04 04:16:23,408 INFO  L136     BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal
[2018-02-04 04:16:23,408 INFO  L136     BoogieDeclarations]: Found implementation of procedure ldv_kobject_init
[2018-02-04 04:16:23,408 INFO  L136     BoogieDeclarations]: Found implementation of procedure ldv_kobject_create
[2018-02-04 04:16:23,408 INFO  L136     BoogieDeclarations]: Found implementation of procedure entry_point
[2018-02-04 04:16:23,408 INFO  L136     BoogieDeclarations]: Found implementation of procedure main
[2018-02-04 04:16:23,409 INFO  L128     BoogieDeclarations]: Found specification of procedure write~$Pointer$
[2018-02-04 04:16:23,409 INFO  L128     BoogieDeclarations]: Found specification of procedure read~$Pointer$
[2018-02-04 04:16:23,409 INFO  L128     BoogieDeclarations]: Found specification of procedure write~int
[2018-02-04 04:16:23,409 INFO  L128     BoogieDeclarations]: Found specification of procedure read~int
[2018-02-04 04:16:23,409 INFO  L128     BoogieDeclarations]: Found specification of procedure ULTIMATE.free
[2018-02-04 04:16:23,409 INFO  L128     BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc
[2018-02-04 04:16:23,409 INFO  L128     BoogieDeclarations]: Found specification of procedure #Ultimate.alloc
[2018-02-04 04:16:23,409 INFO  L128     BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset
[2018-02-04 04:16:23,410 INFO  L136     BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset
[2018-02-04 04:16:23,410 INFO  L128     BoogieDeclarations]: Found specification of procedure malloc
[2018-02-04 04:16:23,410 INFO  L128     BoogieDeclarations]: Found specification of procedure free
[2018-02-04 04:16:23,410 INFO  L128     BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int
[2018-02-04 04:16:23,410 INFO  L128     BoogieDeclarations]: Found specification of procedure memset
[2018-02-04 04:16:23,410 INFO  L128     BoogieDeclarations]: Found specification of procedure ldv_malloc
[2018-02-04 04:16:23,410 INFO  L128     BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD
[2018-02-04 04:16:23,411 INFO  L128     BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return
[2018-02-04 04:16:23,411 INFO  L128     BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return
[2018-02-04 04:16:23,411 INFO  L128     BoogieDeclarations]: Found specification of procedure ldv_kref_sub
[2018-02-04 04:16:23,411 INFO  L128     BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID
[2018-02-04 04:16:23,411 INFO  L128     BoogieDeclarations]: Found specification of procedure ldv_kref_init
[2018-02-04 04:16:23,411 INFO  L128     BoogieDeclarations]: Found specification of procedure ldv_kref_get
[2018-02-04 04:16:23,411 INFO  L128     BoogieDeclarations]: Found specification of procedure ldv_kref_put
[2018-02-04 04:16:23,411 INFO  L128     BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup
[2018-02-04 04:16:23,412 INFO  L128     BoogieDeclarations]: Found specification of procedure ldv_kobject_release
[2018-02-04 04:16:23,412 INFO  L128     BoogieDeclarations]: Found specification of procedure ldv_kobject_put
[2018-02-04 04:16:23,412 INFO  L128     BoogieDeclarations]: Found specification of procedure ldv_kobject_get
[2018-02-04 04:16:23,412 INFO  L128     BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal
[2018-02-04 04:16:23,412 INFO  L128     BoogieDeclarations]: Found specification of procedure ldv_kobject_init
[2018-02-04 04:16:23,412 INFO  L128     BoogieDeclarations]: Found specification of procedure ldv_kobject_create
[2018-02-04 04:16:23,412 INFO  L128     BoogieDeclarations]: Found specification of procedure entry_point
[2018-02-04 04:16:23,412 INFO  L128     BoogieDeclarations]: Found specification of procedure main
[2018-02-04 04:16:23,412 INFO  L128     BoogieDeclarations]: Found specification of procedure ULTIMATE.init
[2018-02-04 04:16:23,412 INFO  L128     BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2018-02-04 04:16:23,582 WARN  L455   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2018-02-04 04:16:23,698 INFO  L257             CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2018-02-04 04:16:23,698 INFO  L202        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 04:16:23 BoogieIcfgContainer
[2018-02-04 04:16:23,698 INFO  L132        PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2018-02-04 04:16:23,699 INFO  L113        PluginConnector]: ------------------------TraceAbstraction----------------------------
[2018-02-04 04:16:23,699 INFO  L271        PluginConnector]: Initializing TraceAbstraction...
[2018-02-04 04:16:23,701 INFO  L276        PluginConnector]: TraceAbstraction initialized
[2018-02-04 04:16:23,702 INFO  L185        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 04.02 04:16:23" (1/3) ...
[2018-02-04 04:16:23,702 INFO  L205        PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3df86f3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 04:16:23, skipping insertion in model container
[2018-02-04 04:16:23,702 INFO  L185        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:23" (2/3) ...
[2018-02-04 04:16:23,703 INFO  L205        PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3df86f3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 04:16:23, skipping insertion in model container
[2018-02-04 04:16:23,703 INFO  L185        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 04:16:23" (3/3) ...
[2018-02-04 04:16:23,704 INFO  L107   eAbstractionObserver]: Analyzing ICFG memleaks_test22_1_false-valid-memtrack_true-termination.i
[2018-02-04 04:16:23,710 INFO  L128   ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION
[2018-02-04 04:16:23,716 INFO  L140   ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations.
[2018-02-04 04:16:23,742 INFO  L322      AbstractCegarLoop]: Interprodecural is true
[2018-02-04 04:16:23,743 INFO  L323      AbstractCegarLoop]: Hoare is false
[2018-02-04 04:16:23,743 INFO  L324      AbstractCegarLoop]: Compute interpolants for FPandBP
[2018-02-04 04:16:23,743 INFO  L325      AbstractCegarLoop]: Backedges is TWOTRACK
[2018-02-04 04:16:23,743 INFO  L326      AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2018-02-04 04:16:23,743 INFO  L327      AbstractCegarLoop]: Difference is false
[2018-02-04 04:16:23,743 INFO  L328      AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA
[2018-02-04 04:16:23,743 INFO  L333      AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce========
[2018-02-04 04:16:23,744 INFO  L87    2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure
[2018-02-04 04:16:23,755 INFO  L276                IsEmpty]: Start isEmpty. Operand 142 states.
[2018-02-04 04:16:23,764 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 18
[2018-02-04 04:16:23,764 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:23,765 INFO  L351         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:23,765 INFO  L371      AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:23,768 INFO  L82        PathProgramCache]: Analyzing trace with hash -1956546830, now seen corresponding path program 1 times
[2018-02-04 04:16:23,770 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:23,770 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:23,810 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:23,810 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:23,810 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:23,846 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:23,854 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:23,969 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:23,972 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:16:23,972 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2018-02-04 04:16:24,035 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 5 states
[2018-02-04 04:16:24,047 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2018-02-04 04:16:24,048 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2018-02-04 04:16:24,050 INFO  L87              Difference]: Start difference. First operand 142 states. Second operand 5 states.
[2018-02-04 04:16:24,090 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:24,090 INFO  L93              Difference]: Finished difference Result 148 states and 156 transitions.
[2018-02-04 04:16:24,091 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2018-02-04 04:16:24,092 INFO  L78                 Accepts]: Start accepts. Automaton has 5 states. Word has length 17
[2018-02-04 04:16:24,093 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:24,104 INFO  L225             Difference]: With dead ends: 148
[2018-02-04 04:16:24,104 INFO  L226             Difference]: Without dead ends: 145
[2018-02-04 04:16:24,106 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2018-02-04 04:16:24,121 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 145 states.
[2018-02-04 04:16:24,140 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 143.
[2018-02-04 04:16:24,141 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 143 states.
[2018-02-04 04:16:24,143 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 151 transitions.
[2018-02-04 04:16:24,144 INFO  L78                 Accepts]: Start accepts. Automaton has 143 states and 151 transitions. Word has length 17
[2018-02-04 04:16:24,144 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:24,144 INFO  L432      AbstractCegarLoop]: Abstraction has 143 states and 151 transitions.
[2018-02-04 04:16:24,144 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 5 states.
[2018-02-04 04:16:24,144 INFO  L276                IsEmpty]: Start isEmpty. Operand 143 states and 151 transitions.
[2018-02-04 04:16:24,145 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 20
[2018-02-04 04:16:24,145 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:24,145 INFO  L351         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:24,145 INFO  L371      AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:24,145 INFO  L82        PathProgramCache]: Analyzing trace with hash 1123892084, now seen corresponding path program 1 times
[2018-02-04 04:16:24,145 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:24,145 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:24,147 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:24,147 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:24,147 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:24,164 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:24,166 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:24,223 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:24,223 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:16:24,223 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2018-02-04 04:16:24,224 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-02-04 04:16:24,224 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-02-04 04:16:24,224 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2018-02-04 04:16:24,225 INFO  L87              Difference]: Start difference. First operand 143 states and 151 transitions. Second operand 6 states.
[2018-02-04 04:16:24,353 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:24,354 INFO  L93              Difference]: Finished difference Result 144 states and 152 transitions.
[2018-02-04 04:16:24,354 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2018-02-04 04:16:24,354 INFO  L78                 Accepts]: Start accepts. Automaton has 6 states. Word has length 19
[2018-02-04 04:16:24,354 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:24,355 INFO  L225             Difference]: With dead ends: 144
[2018-02-04 04:16:24,355 INFO  L226             Difference]: Without dead ends: 144
[2018-02-04 04:16:24,355 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42
[2018-02-04 04:16:24,356 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 144 states.
[2018-02-04 04:16:24,360 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 142.
[2018-02-04 04:16:24,361 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 142 states.
[2018-02-04 04:16:24,363 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 150 transitions.
[2018-02-04 04:16:24,363 INFO  L78                 Accepts]: Start accepts. Automaton has 142 states and 150 transitions. Word has length 19
[2018-02-04 04:16:24,363 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:24,363 INFO  L432      AbstractCegarLoop]: Abstraction has 142 states and 150 transitions.
[2018-02-04 04:16:24,364 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-02-04 04:16:24,364 INFO  L276                IsEmpty]: Start isEmpty. Operand 142 states and 150 transitions.
[2018-02-04 04:16:24,364 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 20
[2018-02-04 04:16:24,364 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:24,364 INFO  L351         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:24,365 INFO  L371      AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:24,365 INFO  L82        PathProgramCache]: Analyzing trace with hash 1123892085, now seen corresponding path program 1 times
[2018-02-04 04:16:24,365 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:24,365 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:24,366 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:24,366 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:24,366 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:24,378 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:24,379 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:24,551 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:24,551 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:16:24,551 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2018-02-04 04:16:24,552 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 7 states
[2018-02-04 04:16:24,552 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2018-02-04 04:16:24,552 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2018-02-04 04:16:24,552 INFO  L87              Difference]: Start difference. First operand 142 states and 150 transitions. Second operand 7 states.
[2018-02-04 04:16:24,766 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:24,766 INFO  L93              Difference]: Finished difference Result 143 states and 151 transitions.
[2018-02-04 04:16:24,766 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 
[2018-02-04 04:16:24,767 INFO  L78                 Accepts]: Start accepts. Automaton has 7 states. Word has length 19
[2018-02-04 04:16:24,767 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:24,768 INFO  L225             Difference]: With dead ends: 143
[2018-02-04 04:16:24,768 INFO  L226             Difference]: Without dead ends: 143
[2018-02-04 04:16:24,769 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72
[2018-02-04 04:16:24,769 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 143 states.
[2018-02-04 04:16:24,773 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 141.
[2018-02-04 04:16:24,773 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 141 states.
[2018-02-04 04:16:24,774 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 149 transitions.
[2018-02-04 04:16:24,775 INFO  L78                 Accepts]: Start accepts. Automaton has 141 states and 149 transitions. Word has length 19
[2018-02-04 04:16:24,775 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:24,775 INFO  L432      AbstractCegarLoop]: Abstraction has 141 states and 149 transitions.
[2018-02-04 04:16:24,775 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 7 states.
[2018-02-04 04:16:24,775 INFO  L276                IsEmpty]: Start isEmpty. Operand 141 states and 149 transitions.
[2018-02-04 04:16:24,775 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 28
[2018-02-04 04:16:24,775 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:24,776 INFO  L351         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:24,776 INFO  L371      AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:24,776 INFO  L82        PathProgramCache]: Analyzing trace with hash -1414777661, now seen corresponding path program 1 times
[2018-02-04 04:16:24,776 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:24,776 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:24,777 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:24,777 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:24,777 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:24,789 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:24,790 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:24,846 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:24,846 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:16:24,846 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2018-02-04 04:16:24,847 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 7 states
[2018-02-04 04:16:24,847 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2018-02-04 04:16:24,847 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2018-02-04 04:16:24,847 INFO  L87              Difference]: Start difference. First operand 141 states and 149 transitions. Second operand 7 states.
[2018-02-04 04:16:24,888 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:24,888 INFO  L93              Difference]: Finished difference Result 157 states and 166 transitions.
[2018-02-04 04:16:24,890 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. 
[2018-02-04 04:16:24,890 INFO  L78                 Accepts]: Start accepts. Automaton has 7 states. Word has length 27
[2018-02-04 04:16:24,891 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:24,893 INFO  L225             Difference]: With dead ends: 157
[2018-02-04 04:16:24,893 INFO  L226             Difference]: Without dead ends: 157
[2018-02-04 04:16:24,893 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56
[2018-02-04 04:16:24,894 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 157 states.
[2018-02-04 04:16:24,904 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 150.
[2018-02-04 04:16:24,904 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 150 states.
[2018-02-04 04:16:24,905 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 158 transitions.
[2018-02-04 04:16:24,906 INFO  L78                 Accepts]: Start accepts. Automaton has 150 states and 158 transitions. Word has length 27
[2018-02-04 04:16:24,906 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:24,906 INFO  L432      AbstractCegarLoop]: Abstraction has 150 states and 158 transitions.
[2018-02-04 04:16:24,906 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 7 states.
[2018-02-04 04:16:24,906 INFO  L276                IsEmpty]: Start isEmpty. Operand 150 states and 158 transitions.
[2018-02-04 04:16:24,907 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 35
[2018-02-04 04:16:24,907 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:24,907 INFO  L351         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:24,907 INFO  L371      AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:24,907 INFO  L82        PathProgramCache]: Analyzing trace with hash 1439517623, now seen corresponding path program 1 times
[2018-02-04 04:16:24,908 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:24,908 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:24,909 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:24,909 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:24,909 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:24,922 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:24,923 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:24,991 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:24,991 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:16:24,991 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9
[2018-02-04 04:16:24,991 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 10 states
[2018-02-04 04:16:24,992 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2018-02-04 04:16:24,992 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90
[2018-02-04 04:16:24,992 INFO  L87              Difference]: Start difference. First operand 150 states and 158 transitions. Second operand 10 states.
[2018-02-04 04:16:25,178 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:25,178 INFO  L93              Difference]: Finished difference Result 149 states and 157 transitions.
[2018-02-04 04:16:25,178 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. 
[2018-02-04 04:16:25,178 INFO  L78                 Accepts]: Start accepts. Automaton has 10 states. Word has length 34
[2018-02-04 04:16:25,178 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:25,179 INFO  L225             Difference]: With dead ends: 149
[2018-02-04 04:16:25,179 INFO  L226             Difference]: Without dead ends: 149
[2018-02-04 04:16:25,179 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156
[2018-02-04 04:16:25,179 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 149 states.
[2018-02-04 04:16:25,183 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149.
[2018-02-04 04:16:25,183 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 149 states.
[2018-02-04 04:16:25,184 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 157 transitions.
[2018-02-04 04:16:25,185 INFO  L78                 Accepts]: Start accepts. Automaton has 149 states and 157 transitions. Word has length 34
[2018-02-04 04:16:25,185 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:25,185 INFO  L432      AbstractCegarLoop]: Abstraction has 149 states and 157 transitions.
[2018-02-04 04:16:25,185 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 10 states.
[2018-02-04 04:16:25,185 INFO  L276                IsEmpty]: Start isEmpty. Operand 149 states and 157 transitions.
[2018-02-04 04:16:25,186 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 35
[2018-02-04 04:16:25,186 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:25,186 INFO  L351         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:25,186 INFO  L371      AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:25,186 INFO  L82        PathProgramCache]: Analyzing trace with hash 1439517624, now seen corresponding path program 1 times
[2018-02-04 04:16:25,186 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:25,187 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:25,187 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:25,187 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:25,187 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:25,199 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:25,199 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:25,226 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:25,226 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:16:25,227 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2018-02-04 04:16:25,227 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 4 states
[2018-02-04 04:16:25,227 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2018-02-04 04:16:25,227 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2018-02-04 04:16:25,228 INFO  L87              Difference]: Start difference. First operand 149 states and 157 transitions. Second operand 4 states.
[2018-02-04 04:16:25,244 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:25,244 INFO  L93              Difference]: Finished difference Result 152 states and 160 transitions.
[2018-02-04 04:16:25,245 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2018-02-04 04:16:25,245 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 34
[2018-02-04 04:16:25,245 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:25,246 INFO  L225             Difference]: With dead ends: 152
[2018-02-04 04:16:25,246 INFO  L226             Difference]: Without dead ends: 150
[2018-02-04 04:16:25,247 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2018-02-04 04:16:25,247 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 150 states.
[2018-02-04 04:16:25,251 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150.
[2018-02-04 04:16:25,252 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 150 states.
[2018-02-04 04:16:25,253 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 158 transitions.
[2018-02-04 04:16:25,253 INFO  L78                 Accepts]: Start accepts. Automaton has 150 states and 158 transitions. Word has length 34
[2018-02-04 04:16:25,253 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:25,253 INFO  L432      AbstractCegarLoop]: Abstraction has 150 states and 158 transitions.
[2018-02-04 04:16:25,253 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2018-02-04 04:16:25,253 INFO  L276                IsEmpty]: Start isEmpty. Operand 150 states and 158 transitions.
[2018-02-04 04:16:25,254 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 36
[2018-02-04 04:16:25,254 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:25,254 INFO  L351         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:25,254 INFO  L371      AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:25,255 INFO  L82        PathProgramCache]: Analyzing trace with hash -204456797, now seen corresponding path program 1 times
[2018-02-04 04:16:25,255 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:25,255 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:25,256 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:25,256 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:25,256 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:25,268 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:25,269 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:25,297 INFO  L134       CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:25,297 INFO  L308   seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:16:25,298 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:16:25,299 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:25,322 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:25,331 INFO  L270         TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:16:25,359 INFO  L134       CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:25,359 INFO  L320   seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 04:16:25,359 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6
[2018-02-04 04:16:25,360 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-02-04 04:16:25,360 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-02-04 04:16:25,360 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30
[2018-02-04 04:16:25,360 INFO  L87              Difference]: Start difference. First operand 150 states and 158 transitions. Second operand 6 states.
[2018-02-04 04:16:25,385 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:25,385 INFO  L93              Difference]: Finished difference Result 153 states and 161 transitions.
[2018-02-04 04:16:25,386 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2018-02-04 04:16:25,386 INFO  L78                 Accepts]: Start accepts. Automaton has 6 states. Word has length 35
[2018-02-04 04:16:25,386 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:25,387 INFO  L225             Difference]: With dead ends: 153
[2018-02-04 04:16:25,387 INFO  L226             Difference]: Without dead ends: 151
[2018-02-04 04:16:25,387 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42
[2018-02-04 04:16:25,388 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 151 states.
[2018-02-04 04:16:25,392 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151.
[2018-02-04 04:16:25,392 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 151 states.
[2018-02-04 04:16:25,393 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 159 transitions.
[2018-02-04 04:16:25,393 INFO  L78                 Accepts]: Start accepts. Automaton has 151 states and 159 transitions. Word has length 35
[2018-02-04 04:16:25,393 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:25,393 INFO  L432      AbstractCegarLoop]: Abstraction has 151 states and 159 transitions.
[2018-02-04 04:16:25,393 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-02-04 04:16:25,394 INFO  L276                IsEmpty]: Start isEmpty. Operand 151 states and 159 transitions.
[2018-02-04 04:16:25,394 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 37
[2018-02-04 04:16:25,394 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:25,395 INFO  L351         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:25,395 INFO  L371      AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:25,395 INFO  L82        PathProgramCache]: Analyzing trace with hash -1829139958, now seen corresponding path program 1 times
[2018-02-04 04:16:25,395 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:25,395 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:25,396 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:25,396 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:25,397 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:25,415 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:25,416 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:25,468 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:25,469 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:16:25,469 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2018-02-04 04:16:25,469 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 7 states
[2018-02-04 04:16:25,469 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2018-02-04 04:16:25,469 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2018-02-04 04:16:25,470 INFO  L87              Difference]: Start difference. First operand 151 states and 159 transitions. Second operand 7 states.
[2018-02-04 04:16:25,493 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:25,493 INFO  L93              Difference]: Finished difference Result 161 states and 169 transitions.
[2018-02-04 04:16:25,495 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. 
[2018-02-04 04:16:25,495 INFO  L78                 Accepts]: Start accepts. Automaton has 7 states. Word has length 36
[2018-02-04 04:16:25,495 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:25,496 INFO  L225             Difference]: With dead ends: 161
[2018-02-04 04:16:25,496 INFO  L226             Difference]: Without dead ends: 161
[2018-02-04 04:16:25,496 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56
[2018-02-04 04:16:25,496 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 161 states.
[2018-02-04 04:16:25,499 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 157.
[2018-02-04 04:16:25,499 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 157 states.
[2018-02-04 04:16:25,500 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 165 transitions.
[2018-02-04 04:16:25,500 INFO  L78                 Accepts]: Start accepts. Automaton has 157 states and 165 transitions. Word has length 36
[2018-02-04 04:16:25,500 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:25,500 INFO  L432      AbstractCegarLoop]: Abstraction has 157 states and 165 transitions.
[2018-02-04 04:16:25,500 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 7 states.
[2018-02-04 04:16:25,501 INFO  L276                IsEmpty]: Start isEmpty. Operand 157 states and 165 transitions.
[2018-02-04 04:16:25,502 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 37
[2018-02-04 04:16:25,502 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:25,502 INFO  L351         BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:25,502 INFO  L371      AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:25,503 INFO  L82        PathProgramCache]: Analyzing trace with hash 371943704, now seen corresponding path program 2 times
[2018-02-04 04:16:25,503 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:25,503 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:25,504 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:25,504 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:25,504 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:25,514 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:25,515 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:25,558 INFO  L134       CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:25,559 INFO  L308   seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:16:25,559 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:16:25,560 INFO  L109   rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1
[2018-02-04 04:16:25,579 INFO  L242   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2018-02-04 04:16:25,579 INFO  L243   tOrderPrioritization]: Conjunction of SSA is unsat
[2018-02-04 04:16:25,583 INFO  L270         TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:16:25,613 INFO  L477             Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16
[2018-02-04 04:16:25,616 INFO  L267         ElimStorePlain]: Start of recursive call 2:  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:25,628 INFO  L477             Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19
[2018-02-04 04:16:25,628 INFO  L267         ElimStorePlain]: Start of recursive call 3:  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:25,639 INFO  L267         ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars,  End of recursive call:  and 2 xjuncts.
[2018-02-04 04:16:25,639 INFO  L202         ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36
[2018-02-04 04:16:25,889 INFO  L134       CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked.
[2018-02-04 04:16:25,889 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences.
[2018-02-04 04:16:25,890 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [6] total 20
[2018-02-04 04:16:25,890 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 20 states
[2018-02-04 04:16:25,890 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants.
[2018-02-04 04:16:25,891 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=329, Unknown=0, NotChecked=0, Total=380
[2018-02-04 04:16:25,891 INFO  L87              Difference]: Start difference. First operand 157 states and 165 transitions. Second operand 20 states.
[2018-02-04 04:16:26,475 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:26,475 INFO  L93              Difference]: Finished difference Result 178 states and 185 transitions.
[2018-02-04 04:16:26,475 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. 
[2018-02-04 04:16:26,475 INFO  L78                 Accepts]: Start accepts. Automaton has 20 states. Word has length 36
[2018-02-04 04:16:26,476 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:26,476 INFO  L225             Difference]: With dead ends: 178
[2018-02-04 04:16:26,476 INFO  L226             Difference]: Without dead ends: 176
[2018-02-04 04:16:26,477 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=104, Invalid=708, Unknown=0, NotChecked=0, Total=812
[2018-02-04 04:16:26,477 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 176 states.
[2018-02-04 04:16:26,481 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 157.
[2018-02-04 04:16:26,481 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 157 states.
[2018-02-04 04:16:26,482 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 165 transitions.
[2018-02-04 04:16:26,482 INFO  L78                 Accepts]: Start accepts. Automaton has 157 states and 165 transitions. Word has length 36
[2018-02-04 04:16:26,483 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:26,483 INFO  L432      AbstractCegarLoop]: Abstraction has 157 states and 165 transitions.
[2018-02-04 04:16:26,483 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 20 states.
[2018-02-04 04:16:26,483 INFO  L276                IsEmpty]: Start isEmpty. Operand 157 states and 165 transitions.
[2018-02-04 04:16:26,484 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 35
[2018-02-04 04:16:26,484 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:26,484 INFO  L351         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:26,484 INFO  L371      AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:26,485 INFO  L82        PathProgramCache]: Analyzing trace with hash -1983848104, now seen corresponding path program 1 times
[2018-02-04 04:16:26,485 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:26,485 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:26,486 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:26,486 INFO  L107   rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2018-02-04 04:16:26,486 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:26,492 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:26,493 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:26,512 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:26,512 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:16:26,513 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2018-02-04 04:16:26,513 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 3 states
[2018-02-04 04:16:26,519 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2018-02-04 04:16:26,519 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2018-02-04 04:16:26,519 INFO  L87              Difference]: Start difference. First operand 157 states and 165 transitions. Second operand 3 states.
[2018-02-04 04:16:26,594 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:26,594 INFO  L93              Difference]: Finished difference Result 174 states and 183 transitions.
[2018-02-04 04:16:26,595 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2018-02-04 04:16:26,595 INFO  L78                 Accepts]: Start accepts. Automaton has 3 states. Word has length 34
[2018-02-04 04:16:26,595 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:26,596 INFO  L225             Difference]: With dead ends: 174
[2018-02-04 04:16:26,596 INFO  L226             Difference]: Without dead ends: 161
[2018-02-04 04:16:26,596 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2018-02-04 04:16:26,596 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 161 states.
[2018-02-04 04:16:26,600 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 153.
[2018-02-04 04:16:26,600 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 153 states.
[2018-02-04 04:16:26,601 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 160 transitions.
[2018-02-04 04:16:26,601 INFO  L78                 Accepts]: Start accepts. Automaton has 153 states and 160 transitions. Word has length 34
[2018-02-04 04:16:26,601 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:26,601 INFO  L432      AbstractCegarLoop]: Abstraction has 153 states and 160 transitions.
[2018-02-04 04:16:26,601 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 3 states.
[2018-02-04 04:16:26,601 INFO  L276                IsEmpty]: Start isEmpty. Operand 153 states and 160 transitions.
[2018-02-04 04:16:26,601 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 37
[2018-02-04 04:16:26,601 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:26,602 INFO  L351         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:26,602 INFO  L371      AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:26,602 INFO  L82        PathProgramCache]: Analyzing trace with hash 515535126, now seen corresponding path program 1 times
[2018-02-04 04:16:26,602 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:26,602 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:26,603 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:26,603 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:26,603 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:26,607 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:26,608 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:26,628 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:26,628 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:16:26,628 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2018-02-04 04:16:26,628 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-02-04 04:16:26,628 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-02-04 04:16:26,628 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2018-02-04 04:16:26,629 INFO  L87              Difference]: Start difference. First operand 153 states and 160 transitions. Second operand 6 states.
[2018-02-04 04:16:26,642 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:26,642 INFO  L93              Difference]: Finished difference Result 138 states and 144 transitions.
[2018-02-04 04:16:26,642 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2018-02-04 04:16:26,642 INFO  L78                 Accepts]: Start accepts. Automaton has 6 states. Word has length 36
[2018-02-04 04:16:26,643 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:26,643 INFO  L225             Difference]: With dead ends: 138
[2018-02-04 04:16:26,643 INFO  L226             Difference]: Without dead ends: 138
[2018-02-04 04:16:26,643 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42
[2018-02-04 04:16:26,644 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 138 states.
[2018-02-04 04:16:26,645 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138.
[2018-02-04 04:16:26,645 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 138 states.
[2018-02-04 04:16:26,646 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 144 transitions.
[2018-02-04 04:16:26,646 INFO  L78                 Accepts]: Start accepts. Automaton has 138 states and 144 transitions. Word has length 36
[2018-02-04 04:16:26,646 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:26,647 INFO  L432      AbstractCegarLoop]: Abstraction has 138 states and 144 transitions.
[2018-02-04 04:16:26,647 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-02-04 04:16:26,647 INFO  L276                IsEmpty]: Start isEmpty. Operand 138 states and 144 transitions.
[2018-02-04 04:16:26,647 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 43
[2018-02-04 04:16:26,647 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:26,648 INFO  L351         BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:26,648 INFO  L371      AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:26,648 INFO  L82        PathProgramCache]: Analyzing trace with hash -723967063, now seen corresponding path program 1 times
[2018-02-04 04:16:26,648 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:26,648 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:26,649 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:26,649 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:26,649 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:26,658 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:26,659 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:26,708 INFO  L134       CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked.
[2018-02-04 04:16:26,709 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:16:26,709 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9
[2018-02-04 04:16:26,709 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 10 states
[2018-02-04 04:16:26,709 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2018-02-04 04:16:26,709 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90
[2018-02-04 04:16:26,710 INFO  L87              Difference]: Start difference. First operand 138 states and 144 transitions. Second operand 10 states.
[2018-02-04 04:16:26,933 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:26,933 INFO  L93              Difference]: Finished difference Result 136 states and 142 transitions.
[2018-02-04 04:16:26,933 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. 
[2018-02-04 04:16:26,934 INFO  L78                 Accepts]: Start accepts. Automaton has 10 states. Word has length 42
[2018-02-04 04:16:26,934 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:26,935 INFO  L225             Difference]: With dead ends: 136
[2018-02-04 04:16:26,935 INFO  L226             Difference]: Without dead ends: 136
[2018-02-04 04:16:26,935 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156
[2018-02-04 04:16:26,935 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 136 states.
[2018-02-04 04:16:26,938 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136.
[2018-02-04 04:16:26,938 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 136 states.
[2018-02-04 04:16:26,938 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 142 transitions.
[2018-02-04 04:16:26,938 INFO  L78                 Accepts]: Start accepts. Automaton has 136 states and 142 transitions. Word has length 42
[2018-02-04 04:16:26,939 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:26,939 INFO  L432      AbstractCegarLoop]: Abstraction has 136 states and 142 transitions.
[2018-02-04 04:16:26,939 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 10 states.
[2018-02-04 04:16:26,939 INFO  L276                IsEmpty]: Start isEmpty. Operand 136 states and 142 transitions.
[2018-02-04 04:16:26,939 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 43
[2018-02-04 04:16:26,940 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:26,940 INFO  L351         BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:26,940 INFO  L371      AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:26,940 INFO  L82        PathProgramCache]: Analyzing trace with hash -723967062, now seen corresponding path program 1 times
[2018-02-04 04:16:26,940 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:26,940 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:26,941 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:26,941 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:26,941 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:26,950 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:26,951 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:26,981 INFO  L134       CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:26,982 INFO  L308   seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:16:26,982 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:16:26,983 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:26,996 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:27,001 INFO  L270         TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:16:27,012 INFO  L134       CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:27,012 INFO  L320   seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 04:16:27,012 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8
[2018-02-04 04:16:27,013 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 8 states
[2018-02-04 04:16:27,013 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2018-02-04 04:16:27,013 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56
[2018-02-04 04:16:27,013 INFO  L87              Difference]: Start difference. First operand 136 states and 142 transitions. Second operand 8 states.
[2018-02-04 04:16:27,041 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:27,041 INFO  L93              Difference]: Finished difference Result 139 states and 145 transitions.
[2018-02-04 04:16:27,041 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 
[2018-02-04 04:16:27,042 INFO  L78                 Accepts]: Start accepts. Automaton has 8 states. Word has length 42
[2018-02-04 04:16:27,042 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:27,042 INFO  L225             Difference]: With dead ends: 139
[2018-02-04 04:16:27,042 INFO  L226             Difference]: Without dead ends: 137
[2018-02-04 04:16:27,042 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72
[2018-02-04 04:16:27,043 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 137 states.
[2018-02-04 04:16:27,044 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137.
[2018-02-04 04:16:27,044 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 137 states.
[2018-02-04 04:16:27,045 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 143 transitions.
[2018-02-04 04:16:27,045 INFO  L78                 Accepts]: Start accepts. Automaton has 137 states and 143 transitions. Word has length 42
[2018-02-04 04:16:27,045 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:27,045 INFO  L432      AbstractCegarLoop]: Abstraction has 137 states and 143 transitions.
[2018-02-04 04:16:27,045 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 8 states.
[2018-02-04 04:16:27,045 INFO  L276                IsEmpty]: Start isEmpty. Operand 137 states and 143 transitions.
[2018-02-04 04:16:27,046 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 44
[2018-02-04 04:16:27,046 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:27,046 INFO  L351         BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:27,046 INFO  L371      AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:27,046 INFO  L82        PathProgramCache]: Analyzing trace with hash -1816266347, now seen corresponding path program 2 times
[2018-02-04 04:16:27,046 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:27,046 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:27,047 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:27,047 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:27,047 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:27,057 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:27,058 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:27,096 INFO  L134       CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:27,096 INFO  L308   seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:16:27,096 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:16:27,097 INFO  L109   rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1
[2018-02-04 04:16:27,114 INFO  L242   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2018-02-04 04:16:27,114 INFO  L243   tOrderPrioritization]: Conjunction of SSA is unsat
[2018-02-04 04:16:27,117 INFO  L270         TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:16:27,129 INFO  L477             Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16
[2018-02-04 04:16:27,129 INFO  L267         ElimStorePlain]: Start of recursive call 2:  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:27,145 INFO  L477             Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19
[2018-02-04 04:16:27,145 INFO  L267         ElimStorePlain]: Start of recursive call 3:  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:27,154 INFO  L267         ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars,  End of recursive call:  and 2 xjuncts.
[2018-02-04 04:16:27,155 INFO  L202         ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36
[2018-02-04 04:16:27,385 INFO  L134       CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked.
[2018-02-04 04:16:27,385 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences.
[2018-02-04 04:16:27,385 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22
[2018-02-04 04:16:27,385 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 22 states
[2018-02-04 04:16:27,385 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants.
[2018-02-04 04:16:27,386 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=400, Unknown=0, NotChecked=0, Total=462
[2018-02-04 04:16:27,386 INFO  L87              Difference]: Start difference. First operand 137 states and 143 transitions. Second operand 22 states.
[2018-02-04 04:16:27,943 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:27,943 INFO  L93              Difference]: Finished difference Result 138 states and 144 transitions.
[2018-02-04 04:16:27,943 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. 
[2018-02-04 04:16:27,944 INFO  L78                 Accepts]: Start accepts. Automaton has 22 states. Word has length 43
[2018-02-04 04:16:27,944 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:27,944 INFO  L225             Difference]: With dead ends: 138
[2018-02-04 04:16:27,944 INFO  L226             Difference]: Without dead ends: 136
[2018-02-04 04:16:27,945 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 28 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=139, Invalid=917, Unknown=0, NotChecked=0, Total=1056
[2018-02-04 04:16:27,945 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 136 states.
[2018-02-04 04:16:27,946 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136.
[2018-02-04 04:16:27,946 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 136 states.
[2018-02-04 04:16:27,947 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 142 transitions.
[2018-02-04 04:16:27,947 INFO  L78                 Accepts]: Start accepts. Automaton has 136 states and 142 transitions. Word has length 43
[2018-02-04 04:16:27,947 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:27,947 INFO  L432      AbstractCegarLoop]: Abstraction has 136 states and 142 transitions.
[2018-02-04 04:16:27,947 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 22 states.
[2018-02-04 04:16:27,947 INFO  L276                IsEmpty]: Start isEmpty. Operand 136 states and 142 transitions.
[2018-02-04 04:16:27,947 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 48
[2018-02-04 04:16:27,947 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:27,948 INFO  L351         BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:27,948 INFO  L371      AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:27,948 INFO  L82        PathProgramCache]: Analyzing trace with hash -2123180192, now seen corresponding path program 1 times
[2018-02-04 04:16:27,948 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:27,948 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:27,949 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:27,949 INFO  L107   rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2018-02-04 04:16:27,949 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:27,954 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:27,955 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:27,990 INFO  L134       CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked.
[2018-02-04 04:16:27,990 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:16:27,990 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8
[2018-02-04 04:16:27,991 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 8 states
[2018-02-04 04:16:27,991 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2018-02-04 04:16:27,991 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56
[2018-02-04 04:16:27,991 INFO  L87              Difference]: Start difference. First operand 136 states and 142 transitions. Second operand 8 states.
[2018-02-04 04:16:28,018 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:28,018 INFO  L93              Difference]: Finished difference Result 138 states and 143 transitions.
[2018-02-04 04:16:28,018 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. 
[2018-02-04 04:16:28,018 INFO  L78                 Accepts]: Start accepts. Automaton has 8 states. Word has length 47
[2018-02-04 04:16:28,018 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:28,019 INFO  L225             Difference]: With dead ends: 138
[2018-02-04 04:16:28,019 INFO  L226             Difference]: Without dead ends: 136
[2018-02-04 04:16:28,019 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90
[2018-02-04 04:16:28,020 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 136 states.
[2018-02-04 04:16:28,022 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136.
[2018-02-04 04:16:28,022 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 136 states.
[2018-02-04 04:16:28,022 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 141 transitions.
[2018-02-04 04:16:28,022 INFO  L78                 Accepts]: Start accepts. Automaton has 136 states and 141 transitions. Word has length 47
[2018-02-04 04:16:28,023 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:28,023 INFO  L432      AbstractCegarLoop]: Abstraction has 136 states and 141 transitions.
[2018-02-04 04:16:28,023 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 8 states.
[2018-02-04 04:16:28,023 INFO  L276                IsEmpty]: Start isEmpty. Operand 136 states and 141 transitions.
[2018-02-04 04:16:28,023 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 53
[2018-02-04 04:16:28,023 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:28,023 INFO  L351         BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:28,023 INFO  L371      AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:28,023 INFO  L82        PathProgramCache]: Analyzing trace with hash -1684319326, now seen corresponding path program 1 times
[2018-02-04 04:16:28,024 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:28,024 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:28,024 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:28,025 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:28,025 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:28,030 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:28,031 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:28,096 INFO  L134       CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked.
[2018-02-04 04:16:28,096 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:16:28,096 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10
[2018-02-04 04:16:28,097 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 10 states
[2018-02-04 04:16:28,097 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2018-02-04 04:16:28,097 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90
[2018-02-04 04:16:28,097 INFO  L87              Difference]: Start difference. First operand 136 states and 141 transitions. Second operand 10 states.
[2018-02-04 04:16:28,163 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:28,163 INFO  L93              Difference]: Finished difference Result 140 states and 144 transitions.
[2018-02-04 04:16:28,163 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. 
[2018-02-04 04:16:28,163 INFO  L78                 Accepts]: Start accepts. Automaton has 10 states. Word has length 52
[2018-02-04 04:16:28,163 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:28,165 INFO  L225             Difference]: With dead ends: 140
[2018-02-04 04:16:28,165 INFO  L226             Difference]: Without dead ends: 136
[2018-02-04 04:16:28,165 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156
[2018-02-04 04:16:28,166 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 136 states.
[2018-02-04 04:16:28,167 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136.
[2018-02-04 04:16:28,168 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 136 states.
[2018-02-04 04:16:28,168 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 140 transitions.
[2018-02-04 04:16:28,168 INFO  L78                 Accepts]: Start accepts. Automaton has 136 states and 140 transitions. Word has length 52
[2018-02-04 04:16:28,168 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:28,168 INFO  L432      AbstractCegarLoop]: Abstraction has 136 states and 140 transitions.
[2018-02-04 04:16:28,168 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 10 states.
[2018-02-04 04:16:28,168 INFO  L276                IsEmpty]: Start isEmpty. Operand 136 states and 140 transitions.
[2018-02-04 04:16:28,169 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 64
[2018-02-04 04:16:28,169 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:28,169 INFO  L351         BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:28,169 INFO  L371      AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:28,169 INFO  L82        PathProgramCache]: Analyzing trace with hash 1703813979, now seen corresponding path program 1 times
[2018-02-04 04:16:28,169 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:28,169 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:28,170 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:28,170 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:28,170 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:28,180 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:28,180 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:28,253 INFO  L134       CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked.
[2018-02-04 04:16:28,253 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:16:28,253 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12
[2018-02-04 04:16:28,254 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 13 states
[2018-02-04 04:16:28,254 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants.
[2018-02-04 04:16:28,254 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156
[2018-02-04 04:16:28,254 INFO  L87              Difference]: Start difference. First operand 136 states and 140 transitions. Second operand 13 states.
[2018-02-04 04:16:28,488 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:28,488 INFO  L93              Difference]: Finished difference Result 134 states and 138 transitions.
[2018-02-04 04:16:28,488 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. 
[2018-02-04 04:16:28,488 INFO  L78                 Accepts]: Start accepts. Automaton has 13 states. Word has length 63
[2018-02-04 04:16:28,489 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:28,489 INFO  L225             Difference]: With dead ends: 134
[2018-02-04 04:16:28,489 INFO  L226             Difference]: Without dead ends: 134
[2018-02-04 04:16:28,490 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272
[2018-02-04 04:16:28,490 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 134 states.
[2018-02-04 04:16:28,492 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134.
[2018-02-04 04:16:28,493 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 134 states.
[2018-02-04 04:16:28,493 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 138 transitions.
[2018-02-04 04:16:28,493 INFO  L78                 Accepts]: Start accepts. Automaton has 134 states and 138 transitions. Word has length 63
[2018-02-04 04:16:28,494 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:28,494 INFO  L432      AbstractCegarLoop]: Abstraction has 134 states and 138 transitions.
[2018-02-04 04:16:28,494 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 13 states.
[2018-02-04 04:16:28,494 INFO  L276                IsEmpty]: Start isEmpty. Operand 134 states and 138 transitions.
[2018-02-04 04:16:28,495 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 64
[2018-02-04 04:16:28,495 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:28,495 INFO  L351         BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:28,495 INFO  L371      AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:28,495 INFO  L82        PathProgramCache]: Analyzing trace with hash 1703813980, now seen corresponding path program 1 times
[2018-02-04 04:16:28,496 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:28,496 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:28,497 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:28,497 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:28,497 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:28,511 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:28,512 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:28,566 INFO  L134       CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:28,566 INFO  L308   seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:16:28,566 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:16:28,567 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:28,586 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:28,590 INFO  L270         TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:16:28,613 INFO  L134       CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:28,613 INFO  L320   seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 04:16:28,614 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10
[2018-02-04 04:16:28,614 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 10 states
[2018-02-04 04:16:28,614 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2018-02-04 04:16:28,614 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90
[2018-02-04 04:16:28,615 INFO  L87              Difference]: Start difference. First operand 134 states and 138 transitions. Second operand 10 states.
[2018-02-04 04:16:28,638 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:28,638 INFO  L93              Difference]: Finished difference Result 137 states and 141 transitions.
[2018-02-04 04:16:28,639 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. 
[2018-02-04 04:16:28,639 INFO  L78                 Accepts]: Start accepts. Automaton has 10 states. Word has length 63
[2018-02-04 04:16:28,639 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:28,640 INFO  L225             Difference]: With dead ends: 137
[2018-02-04 04:16:28,640 INFO  L226             Difference]: Without dead ends: 135
[2018-02-04 04:16:28,640 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110
[2018-02-04 04:16:28,640 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 135 states.
[2018-02-04 04:16:28,642 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135.
[2018-02-04 04:16:28,642 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 135 states.
[2018-02-04 04:16:28,644 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 139 transitions.
[2018-02-04 04:16:28,644 INFO  L78                 Accepts]: Start accepts. Automaton has 135 states and 139 transitions. Word has length 63
[2018-02-04 04:16:28,646 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:28,646 INFO  L432      AbstractCegarLoop]: Abstraction has 135 states and 139 transitions.
[2018-02-04 04:16:28,647 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 10 states.
[2018-02-04 04:16:28,647 INFO  L276                IsEmpty]: Start isEmpty. Operand 135 states and 139 transitions.
[2018-02-04 04:16:28,647 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 65
[2018-02-04 04:16:28,647 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:28,647 INFO  L351         BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:28,647 INFO  L371      AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:28,648 INFO  L82        PathProgramCache]: Analyzing trace with hash 1580383825, now seen corresponding path program 2 times
[2018-02-04 04:16:28,648 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:28,651 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:28,652 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:28,653 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:28,653 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:28,667 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:28,668 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:28,731 INFO  L134       CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:28,732 INFO  L308   seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:16:28,732 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:16:28,733 INFO  L109   rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1
[2018-02-04 04:16:28,760 INFO  L242   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2018-02-04 04:16:28,761 INFO  L243   tOrderPrioritization]: Conjunction of SSA is unsat
[2018-02-04 04:16:28,765 INFO  L270         TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:16:28,777 INFO  L477             Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19
[2018-02-04 04:16:28,777 INFO  L267         ElimStorePlain]: Start of recursive call 2:  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:28,791 INFO  L477             Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16
[2018-02-04 04:16:28,792 INFO  L267         ElimStorePlain]: Start of recursive call 3:  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:28,808 INFO  L267         ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars,  End of recursive call:  and 2 xjuncts.
[2018-02-04 04:16:28,808 INFO  L202         ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36
[2018-02-04 04:16:29,239 INFO  L134       CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked.
[2018-02-04 04:16:29,239 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences.
[2018-02-04 04:16:29,239 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [10] total 27
[2018-02-04 04:16:29,240 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 27 states
[2018-02-04 04:16:29,240 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants.
[2018-02-04 04:16:29,240 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=616, Unknown=0, NotChecked=0, Total=702
[2018-02-04 04:16:29,241 INFO  L87              Difference]: Start difference. First operand 135 states and 139 transitions. Second operand 27 states.
[2018-02-04 04:16:29,901 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:29,901 INFO  L93              Difference]: Finished difference Result 136 states and 140 transitions.
[2018-02-04 04:16:29,901 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. 
[2018-02-04 04:16:29,901 INFO  L78                 Accepts]: Start accepts. Automaton has 27 states. Word has length 64
[2018-02-04 04:16:29,901 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:29,902 INFO  L225             Difference]: With dead ends: 136
[2018-02-04 04:16:29,902 INFO  L226             Difference]: Without dead ends: 134
[2018-02-04 04:16:29,903 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 260 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=201, Invalid=1439, Unknown=0, NotChecked=0, Total=1640
[2018-02-04 04:16:29,903 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 134 states.
[2018-02-04 04:16:29,905 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134.
[2018-02-04 04:16:29,905 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 134 states.
[2018-02-04 04:16:29,906 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 138 transitions.
[2018-02-04 04:16:29,906 INFO  L78                 Accepts]: Start accepts. Automaton has 134 states and 138 transitions. Word has length 64
[2018-02-04 04:16:29,906 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:29,906 INFO  L432      AbstractCegarLoop]: Abstraction has 134 states and 138 transitions.
[2018-02-04 04:16:29,907 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 27 states.
[2018-02-04 04:16:29,907 INFO  L276                IsEmpty]: Start isEmpty. Operand 134 states and 138 transitions.
[2018-02-04 04:16:29,907 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 75
[2018-02-04 04:16:29,907 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:29,908 INFO  L351         BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:29,908 INFO  L371      AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:29,908 INFO  L82        PathProgramCache]: Analyzing trace with hash -1086612526, now seen corresponding path program 1 times
[2018-02-04 04:16:29,908 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:29,908 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:29,909 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:29,909 INFO  L107   rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2018-02-04 04:16:29,909 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:29,923 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:29,924 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:30,005 INFO  L134       CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked.
[2018-02-04 04:16:30,006 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:16:30,006 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11
[2018-02-04 04:16:30,006 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 11 states
[2018-02-04 04:16:30,006 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants.
[2018-02-04 04:16:30,006 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110
[2018-02-04 04:16:30,006 INFO  L87              Difference]: Start difference. First operand 134 states and 138 transitions. Second operand 11 states.
[2018-02-04 04:16:30,057 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:30,057 INFO  L93              Difference]: Finished difference Result 137 states and 140 transitions.
[2018-02-04 04:16:30,057 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. 
[2018-02-04 04:16:30,057 INFO  L78                 Accepts]: Start accepts. Automaton has 11 states. Word has length 74
[2018-02-04 04:16:30,057 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:30,058 INFO  L225             Difference]: With dead ends: 137
[2018-02-04 04:16:30,058 INFO  L226             Difference]: Without dead ends: 134
[2018-02-04 04:16:30,058 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182
[2018-02-04 04:16:30,058 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 134 states.
[2018-02-04 04:16:30,059 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134.
[2018-02-04 04:16:30,059 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 134 states.
[2018-02-04 04:16:30,060 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 137 transitions.
[2018-02-04 04:16:30,060 INFO  L78                 Accepts]: Start accepts. Automaton has 134 states and 137 transitions. Word has length 74
[2018-02-04 04:16:30,060 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:30,060 INFO  L432      AbstractCegarLoop]: Abstraction has 134 states and 137 transitions.
[2018-02-04 04:16:30,060 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 11 states.
[2018-02-04 04:16:30,060 INFO  L276                IsEmpty]: Start isEmpty. Operand 134 states and 137 transitions.
[2018-02-04 04:16:30,061 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 88
[2018-02-04 04:16:30,061 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:30,061 INFO  L351         BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:30,061 INFO  L371      AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:30,061 INFO  L82        PathProgramCache]: Analyzing trace with hash 27384906, now seen corresponding path program 1 times
[2018-02-04 04:16:30,061 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:30,061 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:30,062 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:30,062 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:30,062 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:30,071 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:30,072 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:30,236 INFO  L134       CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked.
[2018-02-04 04:16:30,237 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:16:30,237 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17
[2018-02-04 04:16:30,237 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 18 states
[2018-02-04 04:16:30,237 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants.
[2018-02-04 04:16:30,238 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=271, Unknown=0, NotChecked=0, Total=306
[2018-02-04 04:16:30,238 INFO  L87              Difference]: Start difference. First operand 134 states and 137 transitions. Second operand 18 states.
[2018-02-04 04:16:30,583 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:30,583 INFO  L93              Difference]: Finished difference Result 141 states and 144 transitions.
[2018-02-04 04:16:30,583 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. 
[2018-02-04 04:16:30,583 INFO  L78                 Accepts]: Start accepts. Automaton has 18 states. Word has length 87
[2018-02-04 04:16:30,583 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:30,584 INFO  L225             Difference]: With dead ends: 141
[2018-02-04 04:16:30,584 INFO  L226             Difference]: Without dead ends: 141
[2018-02-04 04:16:30,584 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=493, Unknown=0, NotChecked=0, Total=552
[2018-02-04 04:16:30,584 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 141 states.
[2018-02-04 04:16:30,585 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 132.
[2018-02-04 04:16:30,585 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 132 states.
[2018-02-04 04:16:30,586 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 135 transitions.
[2018-02-04 04:16:30,586 INFO  L78                 Accepts]: Start accepts. Automaton has 132 states and 135 transitions. Word has length 87
[2018-02-04 04:16:30,586 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:30,586 INFO  L432      AbstractCegarLoop]: Abstraction has 132 states and 135 transitions.
[2018-02-04 04:16:30,586 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 18 states.
[2018-02-04 04:16:30,586 INFO  L276                IsEmpty]: Start isEmpty. Operand 132 states and 135 transitions.
[2018-02-04 04:16:30,586 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 88
[2018-02-04 04:16:30,586 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:30,586 INFO  L351         BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:30,586 INFO  L371      AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:30,587 INFO  L82        PathProgramCache]: Analyzing trace with hash 27384907, now seen corresponding path program 1 times
[2018-02-04 04:16:30,587 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:30,587 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:30,588 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:30,588 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:30,588 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:30,596 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:30,597 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:30,644 INFO  L134       CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:30,644 INFO  L308   seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:16:30,644 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:16:30,645 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:30,658 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:30,662 INFO  L270         TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:16:30,674 INFO  L134       CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:30,674 INFO  L320   seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 04:16:30,675 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12
[2018-02-04 04:16:30,675 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 12 states
[2018-02-04 04:16:30,675 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants.
[2018-02-04 04:16:30,675 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132
[2018-02-04 04:16:30,675 INFO  L87              Difference]: Start difference. First operand 132 states and 135 transitions. Second operand 12 states.
[2018-02-04 04:16:30,703 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:30,703 INFO  L93              Difference]: Finished difference Result 135 states and 138 transitions.
[2018-02-04 04:16:30,704 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. 
[2018-02-04 04:16:30,704 INFO  L78                 Accepts]: Start accepts. Automaton has 12 states. Word has length 87
[2018-02-04 04:16:30,704 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:30,704 INFO  L225             Difference]: With dead ends: 135
[2018-02-04 04:16:30,704 INFO  L226             Difference]: Without dead ends: 133
[2018-02-04 04:16:30,705 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156
[2018-02-04 04:16:30,705 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 133 states.
[2018-02-04 04:16:30,707 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133.
[2018-02-04 04:16:30,707 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 133 states.
[2018-02-04 04:16:30,707 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 136 transitions.
[2018-02-04 04:16:30,707 INFO  L78                 Accepts]: Start accepts. Automaton has 133 states and 136 transitions. Word has length 87
[2018-02-04 04:16:30,708 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:30,708 INFO  L432      AbstractCegarLoop]: Abstraction has 133 states and 136 transitions.
[2018-02-04 04:16:30,708 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 12 states.
[2018-02-04 04:16:30,708 INFO  L276                IsEmpty]: Start isEmpty. Operand 133 states and 136 transitions.
[2018-02-04 04:16:30,708 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 89
[2018-02-04 04:16:30,708 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:30,709 INFO  L351         BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:30,709 INFO  L371      AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:30,709 INFO  L82        PathProgramCache]: Analyzing trace with hash -556652480, now seen corresponding path program 2 times
[2018-02-04 04:16:30,709 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:30,709 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:30,710 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:30,710 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:30,710 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:30,724 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:30,725 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:30,812 INFO  L134       CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:30,812 INFO  L308   seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:16:30,812 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:16:30,813 INFO  L109   rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1
[2018-02-04 04:16:30,839 INFO  L242   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2018-02-04 04:16:30,839 INFO  L243   tOrderPrioritization]: Conjunction of SSA is unsat
[2018-02-04 04:16:30,844 INFO  L270         TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:16:30,858 INFO  L477             Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16
[2018-02-04 04:16:30,858 INFO  L267         ElimStorePlain]: Start of recursive call 2:  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:30,874 INFO  L477             Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19
[2018-02-04 04:16:30,874 INFO  L267         ElimStorePlain]: Start of recursive call 3:  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:30,888 INFO  L267         ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars,  End of recursive call:  and 2 xjuncts.
[2018-02-04 04:16:30,889 INFO  L202         ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36
[2018-02-04 04:16:31,305 INFO  L134       CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked.
[2018-02-04 04:16:31,306 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences.
[2018-02-04 04:16:31,306 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [12] total 31
[2018-02-04 04:16:31,306 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 31 states
[2018-02-04 04:16:31,307 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants.
[2018-02-04 04:16:31,307 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=111, Invalid=819, Unknown=0, NotChecked=0, Total=930
[2018-02-04 04:16:31,307 INFO  L87              Difference]: Start difference. First operand 133 states and 136 transitions. Second operand 31 states.
[2018-02-04 04:16:32,115 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:32,115 INFO  L93              Difference]: Finished difference Result 134 states and 137 transitions.
[2018-02-04 04:16:32,115 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. 
[2018-02-04 04:16:32,115 INFO  L78                 Accepts]: Start accepts. Automaton has 31 states. Word has length 88
[2018-02-04 04:16:32,116 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:32,116 INFO  L225             Difference]: With dead ends: 134
[2018-02-04 04:16:32,116 INFO  L226             Difference]: Without dead ends: 132
[2018-02-04 04:16:32,117 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 67 SyntacticMatches, 3 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 394 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=271, Invalid=1985, Unknown=0, NotChecked=0, Total=2256
[2018-02-04 04:16:32,117 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 132 states.
[2018-02-04 04:16:32,119 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132.
[2018-02-04 04:16:32,119 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 132 states.
[2018-02-04 04:16:32,119 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 135 transitions.
[2018-02-04 04:16:32,120 INFO  L78                 Accepts]: Start accepts. Automaton has 132 states and 135 transitions. Word has length 88
[2018-02-04 04:16:32,120 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:32,120 INFO  L432      AbstractCegarLoop]: Abstraction has 132 states and 135 transitions.
[2018-02-04 04:16:32,120 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 31 states.
[2018-02-04 04:16:32,120 INFO  L276                IsEmpty]: Start isEmpty. Operand 132 states and 135 transitions.
[2018-02-04 04:16:32,121 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 88
[2018-02-04 04:16:32,133 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:32,134 INFO  L351         BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:32,134 INFO  L371      AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:32,134 INFO  L82        PathProgramCache]: Analyzing trace with hash -2005833160, now seen corresponding path program 1 times
[2018-02-04 04:16:32,134 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:32,134 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:32,135 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:32,135 INFO  L107   rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2018-02-04 04:16:32,135 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:32,147 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:32,148 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:32,228 INFO  L134       CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked.
[2018-02-04 04:16:32,229 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:16:32,229 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11
[2018-02-04 04:16:32,229 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 11 states
[2018-02-04 04:16:32,229 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants.
[2018-02-04 04:16:32,229 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110
[2018-02-04 04:16:32,230 INFO  L87              Difference]: Start difference. First operand 132 states and 135 transitions. Second operand 11 states.
[2018-02-04 04:16:32,298 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:32,298 INFO  L93              Difference]: Finished difference Result 134 states and 136 transitions.
[2018-02-04 04:16:32,299 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. 
[2018-02-04 04:16:32,299 INFO  L78                 Accepts]: Start accepts. Automaton has 11 states. Word has length 87
[2018-02-04 04:16:32,299 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:32,300 INFO  L225             Difference]: With dead ends: 134
[2018-02-04 04:16:32,300 INFO  L226             Difference]: Without dead ends: 132
[2018-02-04 04:16:32,300 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182
[2018-02-04 04:16:32,300 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 132 states.
[2018-02-04 04:16:32,302 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132.
[2018-02-04 04:16:32,302 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 132 states.
[2018-02-04 04:16:32,304 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 134 transitions.
[2018-02-04 04:16:32,304 INFO  L78                 Accepts]: Start accepts. Automaton has 132 states and 134 transitions. Word has length 87
[2018-02-04 04:16:32,304 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:32,304 INFO  L432      AbstractCegarLoop]: Abstraction has 132 states and 134 transitions.
[2018-02-04 04:16:32,305 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 11 states.
[2018-02-04 04:16:32,305 INFO  L276                IsEmpty]: Start isEmpty. Operand 132 states and 134 transitions.
[2018-02-04 04:16:32,305 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 104
[2018-02-04 04:16:32,305 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:32,306 INFO  L351         BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:32,306 INFO  L371      AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:32,306 INFO  L82        PathProgramCache]: Analyzing trace with hash -1275758021, now seen corresponding path program 1 times
[2018-02-04 04:16:32,306 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:32,306 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:32,307 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:32,307 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:32,307 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:32,322 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:32,323 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:32,553 INFO  L134       CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked.
[2018-02-04 04:16:32,554 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:16:32,554 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21
[2018-02-04 04:16:32,554 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 22 states
[2018-02-04 04:16:32,554 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants.
[2018-02-04 04:16:32,555 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=419, Unknown=0, NotChecked=0, Total=462
[2018-02-04 04:16:32,555 INFO  L87              Difference]: Start difference. First operand 132 states and 134 transitions. Second operand 22 states.
[2018-02-04 04:16:32,862 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:32,863 INFO  L93              Difference]: Finished difference Result 135 states and 137 transitions.
[2018-02-04 04:16:32,863 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. 
[2018-02-04 04:16:32,863 INFO  L78                 Accepts]: Start accepts. Automaton has 22 states. Word has length 103
[2018-02-04 04:16:32,863 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:32,863 INFO  L225             Difference]: With dead ends: 135
[2018-02-04 04:16:32,863 INFO  L226             Difference]: Without dead ends: 135
[2018-02-04 04:16:32,864 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=75, Invalid=795, Unknown=0, NotChecked=0, Total=870
[2018-02-04 04:16:32,864 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 135 states.
[2018-02-04 04:16:32,865 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 130.
[2018-02-04 04:16:32,865 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 130 states.
[2018-02-04 04:16:32,866 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 132 transitions.
[2018-02-04 04:16:32,866 INFO  L78                 Accepts]: Start accepts. Automaton has 130 states and 132 transitions. Word has length 103
[2018-02-04 04:16:32,867 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:32,867 INFO  L432      AbstractCegarLoop]: Abstraction has 130 states and 132 transitions.
[2018-02-04 04:16:32,867 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 22 states.
[2018-02-04 04:16:32,867 INFO  L276                IsEmpty]: Start isEmpty. Operand 130 states and 132 transitions.
[2018-02-04 04:16:32,868 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 104
[2018-02-04 04:16:32,868 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:32,868 INFO  L351         BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:32,868 INFO  L371      AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:32,868 INFO  L82        PathProgramCache]: Analyzing trace with hash -1275758020, now seen corresponding path program 1 times
[2018-02-04 04:16:32,868 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:32,868 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:32,869 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:32,869 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:32,869 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:32,880 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:32,880 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:32,980 INFO  L134       CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:32,980 INFO  L308   seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:16:32,981 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:16:32,981 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:33,004 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:33,009 INFO  L270         TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:16:33,028 INFO  L134       CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:33,028 INFO  L320   seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 04:16:33,028 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14
[2018-02-04 04:16:33,028 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 14 states
[2018-02-04 04:16:33,029 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants.
[2018-02-04 04:16:33,029 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182
[2018-02-04 04:16:33,029 INFO  L87              Difference]: Start difference. First operand 130 states and 132 transitions. Second operand 14 states.
[2018-02-04 04:16:33,070 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:33,070 INFO  L93              Difference]: Finished difference Result 133 states and 135 transitions.
[2018-02-04 04:16:33,070 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. 
[2018-02-04 04:16:33,071 INFO  L78                 Accepts]: Start accepts. Automaton has 14 states. Word has length 103
[2018-02-04 04:16:33,071 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:33,071 INFO  L225             Difference]: With dead ends: 133
[2018-02-04 04:16:33,071 INFO  L226             Difference]: Without dead ends: 131
[2018-02-04 04:16:33,072 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 103 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210
[2018-02-04 04:16:33,072 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 131 states.
[2018-02-04 04:16:33,074 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131.
[2018-02-04 04:16:33,074 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 131 states.
[2018-02-04 04:16:33,074 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 133 transitions.
[2018-02-04 04:16:33,074 INFO  L78                 Accepts]: Start accepts. Automaton has 131 states and 133 transitions. Word has length 103
[2018-02-04 04:16:33,075 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:33,075 INFO  L432      AbstractCegarLoop]: Abstraction has 131 states and 133 transitions.
[2018-02-04 04:16:33,075 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 14 states.
[2018-02-04 04:16:33,075 INFO  L276                IsEmpty]: Start isEmpty. Operand 131 states and 133 transitions.
[2018-02-04 04:16:33,075 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 105
[2018-02-04 04:16:33,075 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:33,076 INFO  L351         BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:33,076 INFO  L371      AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:33,076 INFO  L82        PathProgramCache]: Analyzing trace with hash 666975281, now seen corresponding path program 2 times
[2018-02-04 04:16:33,076 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:33,076 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:33,077 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:33,077 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:33,077 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:33,092 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:33,093 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:33,194 INFO  L134       CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:33,194 INFO  L308   seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:16:33,194 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:16:33,195 INFO  L109   rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1
[2018-02-04 04:16:33,225 INFO  L242   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2018-02-04 04:16:33,225 INFO  L243   tOrderPrioritization]: Conjunction of SSA is unsat
[2018-02-04 04:16:33,232 INFO  L270         TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:16:33,243 INFO  L477             Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16
[2018-02-04 04:16:33,244 INFO  L267         ElimStorePlain]: Start of recursive call 2:  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:33,258 INFO  L477             Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19
[2018-02-04 04:16:33,259 INFO  L267         ElimStorePlain]: Start of recursive call 3:  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:33,272 INFO  L267         ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars,  End of recursive call:  and 2 xjuncts.
[2018-02-04 04:16:33,273 INFO  L202         ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36
[2018-02-04 04:16:33,864 INFO  L134       CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked.
[2018-02-04 04:16:33,865 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences.
[2018-02-04 04:16:33,865 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [14] total 37
[2018-02-04 04:16:33,865 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 37 states
[2018-02-04 04:16:33,865 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants.
[2018-02-04 04:16:33,866 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=146, Invalid=1186, Unknown=0, NotChecked=0, Total=1332
[2018-02-04 04:16:33,866 INFO  L87              Difference]: Start difference. First operand 131 states and 133 transitions. Second operand 37 states.
[2018-02-04 04:16:34,900 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:34,900 INFO  L93              Difference]: Finished difference Result 132 states and 134 transitions.
[2018-02-04 04:16:34,900 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. 
[2018-02-04 04:16:34,900 INFO  L78                 Accepts]: Start accepts. Automaton has 37 states. Word has length 104
[2018-02-04 04:16:34,900 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:34,901 INFO  L225             Difference]: With dead ends: 132
[2018-02-04 04:16:34,901 INFO  L226             Difference]: Without dead ends: 130
[2018-02-04 04:16:34,902 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 77 SyntacticMatches, 5 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 608 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=364, Invalid=2942, Unknown=0, NotChecked=0, Total=3306
[2018-02-04 04:16:34,902 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 130 states.
[2018-02-04 04:16:34,904 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 130.
[2018-02-04 04:16:34,904 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 130 states.
[2018-02-04 04:16:34,904 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 132 transitions.
[2018-02-04 04:16:34,905 INFO  L78                 Accepts]: Start accepts. Automaton has 130 states and 132 transitions. Word has length 104
[2018-02-04 04:16:34,905 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:34,905 INFO  L432      AbstractCegarLoop]: Abstraction has 130 states and 132 transitions.
[2018-02-04 04:16:34,905 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 37 states.
[2018-02-04 04:16:34,905 INFO  L276                IsEmpty]: Start isEmpty. Operand 130 states and 132 transitions.
[2018-02-04 04:16:34,906 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 110
[2018-02-04 04:16:34,906 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:34,906 INFO  L351         BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:34,906 INFO  L371      AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:34,906 INFO  L82        PathProgramCache]: Analyzing trace with hash -603686051, now seen corresponding path program 1 times
[2018-02-04 04:16:34,906 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:34,906 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:34,907 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:34,907 INFO  L107   rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2018-02-04 04:16:34,907 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:34,925 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:34,926 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:35,055 INFO  L134       CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:35,055 INFO  L308   seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:16:35,055 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:16:35,056 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:35,079 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:35,086 INFO  L270         TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:16:35,099 INFO  L134       CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:35,100 INFO  L320   seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 04:16:35,100 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16
[2018-02-04 04:16:35,100 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 16 states
[2018-02-04 04:16:35,101 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants.
[2018-02-04 04:16:35,101 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240
[2018-02-04 04:16:35,101 INFO  L87              Difference]: Start difference. First operand 130 states and 132 transitions. Second operand 16 states.
[2018-02-04 04:16:35,135 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:35,135 INFO  L93              Difference]: Finished difference Result 133 states and 135 transitions.
[2018-02-04 04:16:35,135 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. 
[2018-02-04 04:16:35,135 INFO  L78                 Accepts]: Start accepts. Automaton has 16 states. Word has length 109
[2018-02-04 04:16:35,135 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:35,136 INFO  L225             Difference]: With dead ends: 133
[2018-02-04 04:16:35,136 INFO  L226             Difference]: Without dead ends: 131
[2018-02-04 04:16:35,136 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272
[2018-02-04 04:16:35,137 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 131 states.
[2018-02-04 04:16:35,138 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131.
[2018-02-04 04:16:35,139 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 131 states.
[2018-02-04 04:16:35,139 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 133 transitions.
[2018-02-04 04:16:35,139 INFO  L78                 Accepts]: Start accepts. Automaton has 131 states and 133 transitions. Word has length 109
[2018-02-04 04:16:35,139 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:35,139 INFO  L432      AbstractCegarLoop]: Abstraction has 131 states and 133 transitions.
[2018-02-04 04:16:35,140 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 16 states.
[2018-02-04 04:16:35,140 INFO  L276                IsEmpty]: Start isEmpty. Operand 131 states and 133 transitions.
[2018-02-04 04:16:35,140 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 111
[2018-02-04 04:16:35,140 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:35,140 INFO  L351         BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:35,140 INFO  L371      AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:35,141 INFO  L82        PathProgramCache]: Analyzing trace with hash 1049768338, now seen corresponding path program 2 times
[2018-02-04 04:16:35,141 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:35,141 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:35,141 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:35,142 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:35,142 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:35,157 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:35,158 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:35,277 INFO  L134       CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:35,278 INFO  L308   seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:16:35,278 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:16:35,279 INFO  L109   rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1
[2018-02-04 04:16:35,310 INFO  L242   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2018-02-04 04:16:35,310 INFO  L243   tOrderPrioritization]: Conjunction of SSA is unsat
[2018-02-04 04:16:35,317 INFO  L270         TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:16:35,400 INFO  L477             Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-02-04 04:16:35,401 INFO  L477             Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-02-04 04:16:35,401 INFO  L267         ElimStorePlain]: Start of recursive call 3:  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:35,402 INFO  L267         ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars,  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:35,404 INFO  L267         ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars,  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:35,404 INFO  L202         ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7
[2018-02-04 04:16:35,532 INFO  L267         ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars,  End of recursive call: 1 dim-0 vars,  and 1 xjuncts.
[2018-02-04 04:16:35,535 INFO  L267         ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars,  End of recursive call: 1 dim-0 vars,  and 1 xjuncts.
[2018-02-04 04:16:35,543 INFO  L267         ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars,  End of recursive call: 2 dim-0 vars,  and 1 xjuncts.
[2018-02-04 04:16:35,543 INFO  L202         ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26
[2018-02-04 04:16:35,545 WARN  L1033  $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true
[2018-02-04 04:16:35,551 INFO  L477             Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27
[2018-02-04 04:16:35,553 INFO  L700             Elim1Store]: detected not equals via solver
[2018-02-04 04:16:35,556 INFO  L477             Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35
[2018-02-04 04:16:35,588 INFO  L700             Elim1Store]: detected not equals via solver
[2018-02-04 04:16:35,589 INFO  L700             Elim1Store]: detected not equals via solver
[2018-02-04 04:16:35,592 INFO  L477             Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37
[2018-02-04 04:16:35,593 INFO  L267         ElimStorePlain]: Start of recursive call 4:  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:35,605 INFO  L267         ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars,  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:35,608 INFO  L267         ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars,  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:35,611 INFO  L267         ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars,  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:35,611 INFO  L202         ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9
[2018-02-04 04:16:35,814 WARN  L1033  $PredicateComparison]: unable to prove that (exists ((ldv_atomic_add_return_~temp~0 Int)) (let ((.cse0 (select |c_old(#memory_int)| |c_ldv_atomic_add_return_#in~v.base|))) (and (<= (+ |c_ldv_atomic_add_return_#in~i| (select .cse0 |c_ldv_atomic_add_return_#in~v.offset|)) ldv_atomic_add_return_~temp~0) (= |c_#memory_int| (store |c_old(#memory_int)| |c_ldv_atomic_add_return_#in~v.base| (store .cse0 |c_ldv_atomic_add_return_#in~v.offset| ldv_atomic_add_return_~temp~0)))))) is different from true
[2018-02-04 04:16:35,818 WARN  L1033  $PredicateComparison]: unable to prove that (exists ((ldv_atomic_add_return_~temp~0 Int)) (let ((.cse0 (select |c_old(#memory_int)| |c_ldv_kref_get_#in~kref.base|))) (and (= (store |c_old(#memory_int)| |c_ldv_kref_get_#in~kref.base| (store .cse0 |c_ldv_kref_get_#in~kref.offset| ldv_atomic_add_return_~temp~0)) |c_#memory_int|) (<= (+ (select .cse0 |c_ldv_kref_get_#in~kref.offset|) 1) ldv_atomic_add_return_~temp~0)))) is different from true
[2018-02-04 04:16:35,822 WARN  L1033  $PredicateComparison]: unable to prove that (exists ((ldv_atomic_add_return_~temp~0 Int)) (let ((.cse0 (select |c_old(#memory_int)| |c_ldv_kobject_get_#in~kobj.base|)) (.cse1 (+ |c_ldv_kobject_get_#in~kobj.offset| 12))) (and (= (store |c_old(#memory_int)| |c_ldv_kobject_get_#in~kobj.base| (store .cse0 .cse1 ldv_atomic_add_return_~temp~0)) |c_#memory_int|) (<= (+ (select .cse0 .cse1) 1) ldv_atomic_add_return_~temp~0)))) is different from true
[2018-02-04 04:16:35,827 INFO  L700             Elim1Store]: detected not equals via solver
[2018-02-04 04:16:35,828 INFO  L477             Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27
[2018-02-04 04:16:35,830 INFO  L477             Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 15
[2018-02-04 04:16:35,830 INFO  L267         ElimStorePlain]: Start of recursive call 3:  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:35,833 INFO  L267         ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars,  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:35,835 INFO  L267         ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars,  End of recursive call:  and 1 xjuncts.
[2018-02-04 04:16:35,835 INFO  L202         ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:7
[2018-02-04 04:16:36,101 INFO  L477             Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13
[2018-02-04 04:16:36,108 INFO  L477             Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 17
[2018-02-04 04:16:36,109 INFO  L267         ElimStorePlain]: Start of recursive call 3:  End of recursive call:  and 2 xjuncts.
[2018-02-04 04:16:36,111 INFO  L267         ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars,  End of recursive call:  and 2 xjuncts.
[2018-02-04 04:16:36,112 INFO  L267         ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars,  End of recursive call:  and 2 xjuncts.
[2018-02-04 04:16:36,113 INFO  L202         ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:8
[2018-02-04 04:16:36,383 INFO  L134       CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked.
[2018-02-04 04:16:36,383 INFO  L320   seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences.
[2018-02-04 04:16:36,383 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [49] imperfect sequences [16] total 63
[2018-02-04 04:16:36,383 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 63 states
[2018-02-04 04:16:36,384 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants.
[2018-02-04 04:16:36,385 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=215, Invalid=3219, Unknown=4, NotChecked=468, Total=3906
[2018-02-04 04:16:36,385 INFO  L87              Difference]: Start difference. First operand 131 states and 133 transitions. Second operand 63 states.
[2018-02-04 04:16:37,988 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:37,988 INFO  L93              Difference]: Finished difference Result 123 states and 123 transitions.
[2018-02-04 04:16:37,988 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. 
[2018-02-04 04:16:37,988 INFO  L78                 Accepts]: Start accepts. Automaton has 63 states. Word has length 110
[2018-02-04 04:16:37,988 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:37,988 INFO  L225             Difference]: With dead ends: 123
[2018-02-04 04:16:37,989 INFO  L226             Difference]: Without dead ends: 112
[2018-02-04 04:16:37,990 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 64 SyntacticMatches, 0 SemanticMatches, 90 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 1359 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=365, Invalid=7303, Unknown=4, NotChecked=700, Total=8372
[2018-02-04 04:16:37,990 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 112 states.
[2018-02-04 04:16:37,992 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112.
[2018-02-04 04:16:37,992 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 112 states.
[2018-02-04 04:16:37,992 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 112 transitions.
[2018-02-04 04:16:37,992 INFO  L78                 Accepts]: Start accepts. Automaton has 112 states and 112 transitions. Word has length 110
[2018-02-04 04:16:37,992 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:37,992 INFO  L432      AbstractCegarLoop]: Abstraction has 112 states and 112 transitions.
[2018-02-04 04:16:37,992 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 63 states.
[2018-02-04 04:16:37,992 INFO  L276                IsEmpty]: Start isEmpty. Operand 112 states and 112 transitions.
[2018-02-04 04:16:37,993 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 112
[2018-02-04 04:16:37,993 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:37,993 INFO  L351         BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:37,993 INFO  L371      AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:37,993 INFO  L82        PathProgramCache]: Analyzing trace with hash 1499710248, now seen corresponding path program 1 times
[2018-02-04 04:16:37,993 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:37,993 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:37,994 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:37,994 INFO  L107   rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2018-02-04 04:16:37,994 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:38,011 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:38,012 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:38,146 INFO  L134       CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:38,147 INFO  L308   seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:16:38,147 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:16:38,147 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:38,169 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:38,174 INFO  L270         TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:16:38,190 INFO  L134       CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:38,190 INFO  L320   seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 04:16:38,190 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18
[2018-02-04 04:16:38,190 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 18 states
[2018-02-04 04:16:38,191 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants.
[2018-02-04 04:16:38,191 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306
[2018-02-04 04:16:38,191 INFO  L87              Difference]: Start difference. First operand 112 states and 112 transitions. Second operand 18 states.
[2018-02-04 04:16:38,226 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:38,226 INFO  L93              Difference]: Finished difference Result 115 states and 115 transitions.
[2018-02-04 04:16:38,226 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. 
[2018-02-04 04:16:38,226 INFO  L78                 Accepts]: Start accepts. Automaton has 18 states. Word has length 111
[2018-02-04 04:16:38,226 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:38,227 INFO  L225             Difference]: With dead ends: 115
[2018-02-04 04:16:38,227 INFO  L226             Difference]: Without dead ends: 113
[2018-02-04 04:16:38,227 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 111 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342
[2018-02-04 04:16:38,228 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 113 states.
[2018-02-04 04:16:38,229 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113.
[2018-02-04 04:16:38,229 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 113 states.
[2018-02-04 04:16:38,229 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 113 transitions.
[2018-02-04 04:16:38,229 INFO  L78                 Accepts]: Start accepts. Automaton has 113 states and 113 transitions. Word has length 111
[2018-02-04 04:16:38,230 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:38,230 INFO  L432      AbstractCegarLoop]: Abstraction has 113 states and 113 transitions.
[2018-02-04 04:16:38,230 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 18 states.
[2018-02-04 04:16:38,230 INFO  L276                IsEmpty]: Start isEmpty. Operand 113 states and 113 transitions.
[2018-02-04 04:16:38,230 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 113
[2018-02-04 04:16:38,230 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:38,230 INFO  L351         BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:38,231 INFO  L371      AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:38,231 INFO  L82        PathProgramCache]: Analyzing trace with hash 1331478557, now seen corresponding path program 2 times
[2018-02-04 04:16:38,231 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:38,231 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:38,231 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:38,232 INFO  L109   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:16:38,232 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:38,247 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:38,248 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:38,385 INFO  L134       CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:38,385 INFO  L308   seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:16:38,385 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:16:38,403 INFO  L109   rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1
[2018-02-04 04:16:38,428 INFO  L242   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s)
[2018-02-04 04:16:38,428 INFO  L243   tOrderPrioritization]: Conjunction of SSA is unsat
[2018-02-04 04:16:38,434 INFO  L270         TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:16:38,444 INFO  L134       CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:38,444 INFO  L320   seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 04:16:38,444 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19
[2018-02-04 04:16:38,444 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 19 states
[2018-02-04 04:16:38,445 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants.
[2018-02-04 04:16:38,445 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342
[2018-02-04 04:16:38,445 INFO  L87              Difference]: Start difference. First operand 113 states and 113 transitions. Second operand 19 states.
[2018-02-04 04:16:38,476 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:38,476 INFO  L93              Difference]: Finished difference Result 116 states and 116 transitions.
[2018-02-04 04:16:38,476 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. 
[2018-02-04 04:16:38,476 INFO  L78                 Accepts]: Start accepts. Automaton has 19 states. Word has length 112
[2018-02-04 04:16:38,476 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:38,476 INFO  L225             Difference]: With dead ends: 116
[2018-02-04 04:16:38,476 INFO  L226             Difference]: Without dead ends: 114
[2018-02-04 04:16:38,477 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380
[2018-02-04 04:16:38,477 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 114 states.
[2018-02-04 04:16:38,478 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114.
[2018-02-04 04:16:38,478 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 114 states.
[2018-02-04 04:16:38,478 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 114 transitions.
[2018-02-04 04:16:38,478 INFO  L78                 Accepts]: Start accepts. Automaton has 114 states and 114 transitions. Word has length 112
[2018-02-04 04:16:38,478 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:38,478 INFO  L432      AbstractCegarLoop]: Abstraction has 114 states and 114 transitions.
[2018-02-04 04:16:38,478 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 19 states.
[2018-02-04 04:16:38,478 INFO  L276                IsEmpty]: Start isEmpty. Operand 114 states and 114 transitions.
[2018-02-04 04:16:38,479 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 114
[2018-02-04 04:16:38,479 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:38,479 INFO  L351         BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:38,479 INFO  L371      AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:38,479 INFO  L82        PathProgramCache]: Analyzing trace with hash 411263432, now seen corresponding path program 3 times
[2018-02-04 04:16:38,479 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:38,479 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:38,480 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:38,480 INFO  L107   rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2018-02-04 04:16:38,480 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:38,491 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:16:38,492 WARN  L137   erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level).  Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:16:38,633 INFO  L134       CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:38,633 INFO  L308   seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:16:38,633 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:16:38,634 INFO  L109   rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2
[2018-02-04 04:16:38,678 INFO  L242   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s)
[2018-02-04 04:16:38,678 INFO  L243   tOrderPrioritization]: Conjunction of SSA is unsat
[2018-02-04 04:16:38,684 INFO  L270         TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:16:38,703 INFO  L134       CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:16:38,704 INFO  L320   seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 04:16:38,704 INFO  L335   seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20
[2018-02-04 04:16:38,704 INFO  L409      AbstractCegarLoop]: Interpolant automaton has 20 states
[2018-02-04 04:16:38,705 INFO  L132   InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants.
[2018-02-04 04:16:38,705 INFO  L133   InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=207, Unknown=0, NotChecked=0, Total=380
[2018-02-04 04:16:38,705 INFO  L87              Difference]: Start difference. First operand 114 states and 114 transitions. Second operand 20 states.
[2018-02-04 04:16:38,735 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:16:38,735 INFO  L93              Difference]: Finished difference Result 117 states and 117 transitions.
[2018-02-04 04:16:38,739 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. 
[2018-02-04 04:16:38,739 INFO  L78                 Accepts]: Start accepts. Automaton has 20 states. Word has length 113
[2018-02-04 04:16:38,739 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:16:38,739 INFO  L225             Difference]: With dead ends: 117
[2018-02-04 04:16:38,739 INFO  L226             Difference]: Without dead ends: 115
[2018-02-04 04:16:38,739 INFO  L554         BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 113 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=177, Invalid=243, Unknown=0, NotChecked=0, Total=420
[2018-02-04 04:16:38,740 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 115 states.
[2018-02-04 04:16:38,740 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115.
[2018-02-04 04:16:38,741 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 115 states.
[2018-02-04 04:16:38,741 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 115 transitions.
[2018-02-04 04:16:38,741 INFO  L78                 Accepts]: Start accepts. Automaton has 115 states and 115 transitions. Word has length 113
[2018-02-04 04:16:38,741 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:16:38,741 INFO  L432      AbstractCegarLoop]: Abstraction has 115 states and 115 transitions.
[2018-02-04 04:16:38,741 INFO  L433      AbstractCegarLoop]: Interpolant automaton has 20 states.
[2018-02-04 04:16:38,741 INFO  L276                IsEmpty]: Start isEmpty. Operand 115 states and 115 transitions.
[2018-02-04 04:16:38,741 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 115
[2018-02-04 04:16:38,742 INFO  L343         BasicCegarLoop]: Found error trace
[2018-02-04 04:16:38,742 INFO  L351         BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:16:38,742 INFO  L371      AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:16:38,742 INFO  L82        PathProgramCache]: Analyzing trace with hash 1949365629, now seen corresponding path program 4 times
[2018-02-04 04:16:38,742 INFO  L213   onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:16:38,742 INFO  L67    tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:16:38,742 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:38,742 INFO  L107   rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2018-02-04 04:16:38,743 INFO  L125   rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:16:38,779 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2018-02-04 04:16:38,827 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2018-02-04 04:16:38,855 INFO  L410         BasicCegarLoop]: Counterexample might be feasible
[2018-02-04 04:16:38,871 WARN  L343   cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true)
[2018-02-04 04:16:38,876 WARN  L343   cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true)
[2018-02-04 04:16:38,892 INFO  L202        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.02 04:16:38 BoogieIcfgContainer
[2018-02-04 04:16:38,892 INFO  L132        PluginConnector]: ------------------------ END TraceAbstraction----------------------------
[2018-02-04 04:16:38,893 INFO  L168              Benchmark]: Toolchain (without parser) took 15744.24 ms. Allocated memory was 401.1 MB in the beginning and 932.2 MB in the end (delta: 531.1 MB). Free memory was 357.8 MB in the beginning and 664.8 MB in the end (delta: -307.1 MB). Peak memory consumption was 224.0 MB. Max. memory is 5.3 GB.
[2018-02-04 04:16:38,894 INFO  L168              Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 401.1 MB. Free memory is still 363.0 MB. There was no memory consumed. Max. memory is 5.3 GB.
[2018-02-04 04:16:38,894 INFO  L168              Benchmark]: CACSL2BoogieTranslator took 184.35 ms. Allocated memory is still 401.1 MB. Free memory was 357.8 MB in the beginning and 341.9 MB in the end (delta: 15.9 MB). Peak memory consumption was 15.9 MB. Max. memory is 5.3 GB.
[2018-02-04 04:16:38,894 INFO  L168              Benchmark]: Boogie Preprocessor took 32.69 ms. Allocated memory is still 401.1 MB. Free memory is still 341.9 MB. There was no memory consumed. Max. memory is 5.3 GB.
[2018-02-04 04:16:38,894 INFO  L168              Benchmark]: RCFGBuilder took 331.76 ms. Allocated memory is still 401.1 MB. Free memory was 341.9 MB in the beginning and 303.5 MB in the end (delta: 38.4 MB). Peak memory consumption was 38.4 MB. Max. memory is 5.3 GB.
[2018-02-04 04:16:38,894 INFO  L168              Benchmark]: TraceAbstraction took 15192.58 ms. Allocated memory was 401.1 MB in the beginning and 932.2 MB in the end (delta: 531.1 MB). Free memory was 303.5 MB in the beginning and 664.8 MB in the end (delta: -361.3 MB). Peak memory consumption was 169.8 MB. Max. memory is 5.3 GB.
[2018-02-04 04:16:38,896 INFO  L344   ainManager$Toolchain]: #######################  End [Toolchain 1] #######################
 --- Results ---
 * Results from de.uni_freiburg.informatik.ultimate.core:
  - StatisticsResult: Toolchain Benchmarks
    Benchmark results are:
 * CDTParser took 0.12 ms. Allocated memory is still 401.1 MB. Free memory is still 363.0 MB. There was no memory consumed. Max. memory is 5.3 GB.
 * CACSL2BoogieTranslator took 184.35 ms. Allocated memory is still 401.1 MB. Free memory was 357.8 MB in the beginning and 341.9 MB in the end (delta: 15.9 MB). Peak memory consumption was 15.9 MB. Max. memory is 5.3 GB.
 * Boogie Preprocessor took 32.69 ms. Allocated memory is still 401.1 MB. Free memory is still 341.9 MB. There was no memory consumed. Max. memory is 5.3 GB.
 * RCFGBuilder took 331.76 ms. Allocated memory is still 401.1 MB. Free memory was 341.9 MB in the beginning and 303.5 MB in the end (delta: 38.4 MB). Peak memory consumption was 38.4 MB. Max. memory is 5.3 GB.
 * TraceAbstraction took 15192.58 ms. Allocated memory was 401.1 MB in the beginning and 932.2 MB in the end (delta: 531.1 MB). Free memory was 303.5 MB in the beginning and 664.8 MB in the end (delta: -361.3 MB). Peak memory consumption was 169.8 MB. Max. memory is 5.3 GB.
 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor:
  - GenericResult: Unfinished Backtranslation
    Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true)
  - GenericResult: Unfinished Backtranslation
    Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true)
 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
  - UnprovableResult [Line: 1443]: Unable to prove that all allocated memory was freed
    Unable to prove that all allocated memory was freed
 Reason: overapproximation of memtrack at line 1443. 
Possible FailurePath: 
[L1444]  CALL         entry_point()
[L1436]               struct ldv_kobject *kobj;
[L1437]  CALL, EXPR   ldv_kobject_create()
[L1406]               struct ldv_kobject *kobj;
[L1408]  CALL, EXPR   ldv_malloc(sizeof(*kobj))
         VAL          [\old(size)=16]
[L1073]  COND TRUE    __VERIFIER_nondet_int()
[L1074]  EXPR, FCALL  malloc(size)
         VAL          [\old(size)=16, malloc(size)={19:0}, size=16]
[L1074]  RET          return malloc(size);
         VAL          [\old(size)=16, \result={19:0}, malloc(size)={19:0}, size=16]
[L1408]  EXPR         ldv_malloc(sizeof(*kobj))
         VAL          [ldv_malloc(sizeof(*kobj))={19:0}]
[L1408]               kobj = ldv_malloc(sizeof(*kobj))
[L1409]  COND FALSE   !(!kobj)
         VAL          [kobj={19:0}]
[L1411]  FCALL        memset(kobj, 0, sizeof(*kobj))
         VAL          [kobj={19:0}, memset(kobj, 0, sizeof(*kobj))={19:0}]
[L1413]  CALL         ldv_kobject_init(kobj)
         VAL          [kobj={19:0}]
[L1394]  COND FALSE   !(!kobj)
         VAL          [kobj={19:0}, kobj={19:0}]
[L1398]  CALL         ldv_kobject_init_internal(kobj)
         VAL          [kobj={19:0}]
[L1380]  COND FALSE   !(!kobj)
         VAL          [kobj={19:0}, kobj={19:0}]
[L1382]  CALL         ldv_kref_init(&kobj->kref)
         VAL          [kref={19:12}]
[L1294]  RET, FCALL   ((&kref->refcount)->counter) = (1)
         VAL          [kref={19:12}, kref={19:12}]
[L1382]               ldv_kref_init(&kobj->kref)
         VAL          [kobj={19:0}, kobj={19:0}]
[L1383]  CALL         LDV_INIT_LIST_HEAD(&kobj->entry)
         VAL          [list={19:4}]
[L1099]  FCALL        list->next = list
         VAL          [list={19:4}, list={19:4}]
[L1100]  FCALL        list->prev = list
         VAL          [list={19:4}, list={19:4}]
[L1383]  RET, FCALL   LDV_INIT_LIST_HEAD(&kobj->entry)
         VAL          [kobj={19:0}, kobj={19:0}]
[L1413]               ldv_kobject_init(kobj)
         VAL          [kobj={19:0}]
[L1414]  RET          return kobj;
         VAL          [\result={19:0}, kobj={19:0}]
[L1437]  EXPR         ldv_kobject_create()
         VAL          [ldv_kobject_create()={19:0}]
[L1437]               kobj = ldv_kobject_create()
[L1438]  CALL         ldv_kobject_get(kobj)
         VAL          [kobj={19:0}]
[L1373]  COND TRUE    \read(*kobj)
         VAL          [kobj={19:0}, kobj={19:0}]
[L1374]  CALL         ldv_kref_get(&kobj->kref)
         VAL          [kref={19:12}]
[L1308]  CALL         ldv_atomic_add_return(1, (&kref->refcount))
         VAL          [\old(i)=1, v={19:12}]
[L1255]               int temp;
         VAL          [\old(i)=1, i=1, v={19:12}, v={19:12}]
[L1256]  EXPR, FCALL  v->counter
         VAL          [\old(i)=1, i=1, v={19:12}, v={19:12}, v->counter=1]
[L1256]               temp = v->counter
[L1257]               temp += i
         VAL          [\old(i)=1, i=1, temp=2, v={19:12}, v={19:12}]
[L1258]  FCALL        v->counter = temp
         VAL          [\old(i)=1, i=1, temp=2, v={19:12}, v={19:12}]
[L1259]  RET          return temp;
         VAL          [\old(i)=1, \result=2, i=1, temp=2, v={19:12}, v={19:12}]
[L1308]  RET          ldv_atomic_add_return(1, (&kref->refcount))
         VAL          [kref={19:12}, kref={19:12}, ldv_atomic_add_return(1, (&kref->refcount))=2]
[L1374]               ldv_kref_get(&kobj->kref)
         VAL          [kobj={19:0}, kobj={19:0}]
[L1375]  RET          return kobj;
         VAL          [\result={19:0}, kobj={19:0}, kobj={19:0}]
[L1438]               ldv_kobject_get(kobj)
         VAL          [kobj={19:0}, ldv_kobject_get(kobj)={19:0}]
[L1440]  CALL         ldv_kobject_put(kobj)
         VAL          [kobj={19:0}]
[L1361]  COND TRUE    \read(*kobj)
         VAL          [kobj={19:0}, kobj={19:0}]
[L1363]  CALL         ldv_kref_put(&kobj->kref, ldv_kobject_release)
         VAL          [kref={19:12}, release={-1:0}]
[L1313]  CALL, EXPR   ldv_kref_sub(kref, 1, release)
         VAL          [\old(count)=1, kref={19:12}, release={-1:0}]
[L1281]  CALL, EXPR   ldv_atomic_sub_return(((int) count), (&kref->refcount))
         VAL          [\old(i)=1, v={19:12}]
[L1264]               int temp;
         VAL          [\old(i)=1, i=1, v={19:12}, v={19:12}]
[L1265]  EXPR, FCALL  v->counter
         VAL          [\old(i)=1, i=1, v={19:12}, v={19:12}, v->counter=2]
[L1265]               temp = v->counter
[L1266]               temp -= i
         VAL          [\old(i)=1, i=1, temp=1, v={19:12}, v={19:12}]
[L1267]  FCALL        v->counter = temp
         VAL          [\old(i)=1, i=1, temp=1, v={19:12}, v={19:12}]
[L1268]  RET          return temp;
         VAL          [\old(i)=1, \result=1, i=1, temp=1, v={19:12}, v={19:12}]
[L1281]  EXPR         ldv_atomic_sub_return(((int) count), (&kref->refcount))
         VAL          [\old(count)=1, count=1, kref={19:12}, kref={19:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, release={-1:0}, release={-1:0}]
[L1281]  COND FALSE   !((ldv_atomic_sub_return(((int) count), (&kref->refcount)) == 0))
[L1285]  RET          return 0;
         VAL          [\old(count)=1, \result=0, count=1, kref={19:12}, kref={19:12}, release={-1:0}, release={-1:0}]
[L1313]  EXPR         ldv_kref_sub(kref, 1, release)
         VAL          [kref={19:12}, kref={19:12}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}]
[L1313]  RET          return ldv_kref_sub(kref, 1, release);
[L1363]               ldv_kref_put(&kobj->kref, ldv_kobject_release)
         VAL          [kobj={19:0}, kobj={19:0}, ldv_kref_put(&kobj->kref, ldv_kobject_release)=0]
[L1440]  FCALL        ldv_kobject_put(kobj)

  - StatisticsResult: Ultimate Automizer benchmark data
    CFG has 21 procedures, 142 locations, 23 error locations. UNSAFE Result, 15.1s OverallTime, 33 OverallIterations, 16 TraceHistogramMax, 7.6s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3824 SDtfs, 931 SDslu, 33622 SDs, 0 SdLazy, 12028 SolverSat, 217 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1696 GetRequests, 1116 SyntacticMatches, 11 SemanticMatches, 569 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 3250 ImplicationChecksByTransitivity, 6.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=157occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 32 MinimizatonAttempts, 58 StatesRemovedByMinimization, 9 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 6.0s InterpolantComputationTime, 3365 NumberOfCodeBlocks, 3323 NumberOfCodeBlocksAsserted, 57 NumberOfCheckSat, 3204 ConstructedInterpolants, 173 QuantifiedInterpolants, 634873 SizeOfPredicates, 113 NumberOfNonLiveVariables, 5589 ConjunctsInSsa, 545 ConjunctsInUnsatCore, 47 InterpolantComputations, 23 PerfectInterpolantSequences, 400/1557 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available
RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces
Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-04_04-16-38-901.csv
Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-04_04-16-38-901.csv
Received shutdown request...