java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_2_false-valid-memtrack_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-ccafca9-m [2018-02-04 04:16:24,193 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-04 04:16:24,194 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-04 04:16:24,204 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-04 04:16:24,204 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-04 04:16:24,205 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-04 04:16:24,206 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-04 04:16:24,208 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-04 04:16:24,209 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-04 04:16:24,209 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-04 04:16:24,210 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-04 04:16:24,210 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-04 04:16:24,211 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-04 04:16:24,212 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-04 04:16:24,212 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-04 04:16:24,214 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-04 04:16:24,216 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-04 04:16:24,217 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-04 04:16:24,218 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-04 04:16:24,219 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-04 04:16:24,221 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-02-04 04:16:24,221 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-02-04 04:16:24,222 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-02-04 04:16:24,223 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-02-04 04:16:24,223 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-02-04 04:16:24,224 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-02-04 04:16:24,225 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-02-04 04:16:24,225 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-02-04 04:16:24,225 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-02-04 04:16:24,225 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-04 04:16:24,226 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-04 04:16:24,226 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf [2018-02-04 04:16:24,236 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-04 04:16:24,237 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-04 04:16:24,238 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-04 04:16:24,238 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-04 04:16:24,238 INFO L133 SettingsManager]: * Use SBE=true [2018-02-04 04:16:24,238 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-04 04:16:24,238 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-04 04:16:24,239 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-04 04:16:24,239 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-04 04:16:24,239 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-04 04:16:24,239 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-04 04:16:24,239 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-04 04:16:24,239 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-04 04:16:24,239 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-02-04 04:16:24,240 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-04 04:16:24,240 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-04 04:16:24,240 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-04 04:16:24,240 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-04 04:16:24,240 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-04 04:16:24,240 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-04 04:16:24,241 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 04:16:24,241 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-04 04:16:24,241 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-02-04 04:16:24,241 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-02-04 04:16:24,241 INFO L133 SettingsManager]: * Trace refinement strategy=SMTINTERPOL [2018-02-04 04:16:24,274 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-04 04:16:24,284 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-04 04:16:24,288 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-04 04:16:24,289 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-04 04:16:24,289 INFO L276 PluginConnector]: CDTParser initialized [2018-02-04 04:16:24,290 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_2_false-valid-memtrack_true-termination.i [2018-02-04 04:16:24,444 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-04 04:16:24,445 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-04 04:16:24,446 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-04 04:16:24,446 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-04 04:16:24,450 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-04 04:16:24,451 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 04:16:24" (1/1) ... [2018-02-04 04:16:24,453 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4b275d44 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:24, skipping insertion in model container [2018-02-04 04:16:24,453 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 04:16:24" (1/1) ... [2018-02-04 04:16:24,464 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 04:16:24,503 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 04:16:24,589 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 04:16:24,604 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 04:16:24,610 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:24 WrapperNode [2018-02-04 04:16:24,611 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-04 04:16:24,611 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-04 04:16:24,611 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-04 04:16:24,611 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-04 04:16:24,622 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:24" (1/1) ... [2018-02-04 04:16:24,622 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:24" (1/1) ... [2018-02-04 04:16:24,633 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:24" (1/1) ... [2018-02-04 04:16:24,633 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:24" (1/1) ... [2018-02-04 04:16:24,637 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:24" (1/1) ... [2018-02-04 04:16:24,639 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:24" (1/1) ... [2018-02-04 04:16:24,640 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:24" (1/1) ... [2018-02-04 04:16:24,642 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-04 04:16:24,642 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-04 04:16:24,642 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-04 04:16:24,642 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-04 04:16:24,643 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:24" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 04:16:24,680 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-04 04:16:24,680 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-04 04:16:24,681 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-02-04 04:16:24,681 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-02-04 04:16:24,681 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-02-04 04:16:24,681 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-02-04 04:16:24,681 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-02-04 04:16:24,681 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-02-04 04:16:24,681 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-02-04 04:16:24,682 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-04 04:16:24,682 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-02-04 04:16:24,682 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-02-04 04:16:24,682 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-02-04 04:16:24,682 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-02-04 04:16:24,682 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-02-04 04:16:24,682 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-02-04 04:16:24,683 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-02-04 04:16:24,683 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-02-04 04:16:24,683 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-02-04 04:16:24,683 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-02-04 04:16:24,683 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-02-04 04:16:24,683 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-02-04 04:16:24,683 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-02-04 04:16:24,683 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-02-04 04:16:24,683 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-02-04 04:16:24,684 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-02-04 04:16:24,684 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-02-04 04:16:24,684 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-02-04 04:16:24,684 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-02-04 04:16:24,684 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-04 04:16:24,684 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-04 04:16:24,684 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-04 04:16:24,785 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-02-04 04:16:24,848 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-04 04:16:24,850 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 04:16:24 BoogieIcfgContainer [2018-02-04 04:16:24,850 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-04 04:16:24,851 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-04 04:16:24,851 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-04 04:16:24,853 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-04 04:16:24,853 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 04.02 04:16:24" (1/3) ... [2018-02-04 04:16:24,854 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4deae993 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 04:16:24, skipping insertion in model container [2018-02-04 04:16:24,854 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:24" (2/3) ... [2018-02-04 04:16:24,854 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4deae993 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 04:16:24, skipping insertion in model container [2018-02-04 04:16:24,854 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 04:16:24" (3/3) ... [2018-02-04 04:16:24,855 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_2_false-valid-memtrack_true-termination.i [2018-02-04 04:16:24,861 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-02-04 04:16:24,866 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 9 error locations. [2018-02-04 04:16:24,890 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-04 04:16:24,890 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-04 04:16:24,890 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-02-04 04:16:24,890 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-02-04 04:16:24,890 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-04 04:16:24,890 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-04 04:16:24,890 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-04 04:16:24,890 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-04 04:16:24,891 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-04 04:16:24,900 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states. [2018-02-04 04:16:24,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-02-04 04:16:24,908 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:24,908 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:24,909 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:24,912 INFO L82 PathProgramCache]: Analyzing trace with hash 13572496, now seen corresponding path program 1 times [2018-02-04 04:16:24,913 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:24,913 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:24,949 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:24,949 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:24,949 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:24,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:24,994 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:25,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:25,117 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:25,118 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 04:16:25,121 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 04:16:25,134 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 04:16:25,134 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 04:16:25,136 INFO L87 Difference]: Start difference. First operand 65 states. Second operand 5 states. [2018-02-04 04:16:25,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:25,231 INFO L93 Difference]: Finished difference Result 71 states and 75 transitions. [2018-02-04 04:16:25,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 04:16:25,232 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-02-04 04:16:25,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:25,243 INFO L225 Difference]: With dead ends: 71 [2018-02-04 04:16:25,243 INFO L226 Difference]: Without dead ends: 68 [2018-02-04 04:16:25,244 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 04:16:25,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2018-02-04 04:16:25,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 66. [2018-02-04 04:16:25,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-02-04 04:16:25,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 70 transitions. [2018-02-04 04:16:25,272 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 70 transitions. Word has length 17 [2018-02-04 04:16:25,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:25,273 INFO L432 AbstractCegarLoop]: Abstraction has 66 states and 70 transitions. [2018-02-04 04:16:25,273 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 04:16:25,273 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 70 transitions. [2018-02-04 04:16:25,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-04 04:16:25,274 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:25,274 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:25,274 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:25,275 INFO L82 PathProgramCache]: Analyzing trace with hash 64872882, now seen corresponding path program 1 times [2018-02-04 04:16:25,275 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:25,275 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:25,277 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:25,277 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:25,277 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:25,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:25,295 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:25,344 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:25,345 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:25,345 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 04:16:25,346 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 04:16:25,346 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 04:16:25,346 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 04:16:25,347 INFO L87 Difference]: Start difference. First operand 66 states and 70 transitions. Second operand 6 states. [2018-02-04 04:16:25,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:25,439 INFO L93 Difference]: Finished difference Result 67 states and 71 transitions. [2018-02-04 04:16:25,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 04:16:25,439 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-02-04 04:16:25,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:25,441 INFO L225 Difference]: With dead ends: 67 [2018-02-04 04:16:25,441 INFO L226 Difference]: Without dead ends: 67 [2018-02-04 04:16:25,442 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 04:16:25,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-02-04 04:16:25,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 65. [2018-02-04 04:16:25,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65 states. [2018-02-04 04:16:25,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 69 transitions. [2018-02-04 04:16:25,449 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 69 transitions. Word has length 19 [2018-02-04 04:16:25,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:25,449 INFO L432 AbstractCegarLoop]: Abstraction has 65 states and 69 transitions. [2018-02-04 04:16:25,450 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 04:16:25,450 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 69 transitions. [2018-02-04 04:16:25,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-04 04:16:25,450 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:25,451 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:25,451 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:25,451 INFO L82 PathProgramCache]: Analyzing trace with hash 64872883, now seen corresponding path program 1 times [2018-02-04 04:16:25,451 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:25,451 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:25,452 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:25,453 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:25,453 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:25,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:25,472 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:25,628 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:25,628 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:25,628 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 04:16:25,628 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 04:16:25,628 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 04:16:25,629 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 04:16:25,629 INFO L87 Difference]: Start difference. First operand 65 states and 69 transitions. Second operand 7 states. [2018-02-04 04:16:25,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:25,760 INFO L93 Difference]: Finished difference Result 66 states and 70 transitions. [2018-02-04 04:16:25,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 04:16:25,760 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-02-04 04:16:25,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:25,761 INFO L225 Difference]: With dead ends: 66 [2018-02-04 04:16:25,761 INFO L226 Difference]: Without dead ends: 66 [2018-02-04 04:16:25,762 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-02-04 04:16:25,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-02-04 04:16:25,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 64. [2018-02-04 04:16:25,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-02-04 04:16:25,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 68 transitions. [2018-02-04 04:16:25,767 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 68 transitions. Word has length 19 [2018-02-04 04:16:25,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:25,767 INFO L432 AbstractCegarLoop]: Abstraction has 64 states and 68 transitions. [2018-02-04 04:16:25,767 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 04:16:25,768 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 68 transitions. [2018-02-04 04:16:25,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-02-04 04:16:25,768 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:25,768 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:25,769 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:25,769 INFO L82 PathProgramCache]: Analyzing trace with hash -1610907055, now seen corresponding path program 1 times [2018-02-04 04:16:25,769 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:25,769 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:25,770 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:25,771 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:25,771 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:25,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:25,781 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:25,806 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:25,806 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:25,807 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-04 04:16:25,807 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-04 04:16:25,807 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-04 04:16:25,807 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 04:16:25,808 INFO L87 Difference]: Start difference. First operand 64 states and 68 transitions. Second operand 3 states. [2018-02-04 04:16:25,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:25,841 INFO L93 Difference]: Finished difference Result 70 states and 73 transitions. [2018-02-04 04:16:25,842 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-04 04:16:25,842 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 22 [2018-02-04 04:16:25,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:25,843 INFO L225 Difference]: With dead ends: 70 [2018-02-04 04:16:25,843 INFO L226 Difference]: Without dead ends: 60 [2018-02-04 04:16:25,843 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 04:16:25,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-02-04 04:16:25,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2018-02-04 04:16:25,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-02-04 04:16:25,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 63 transitions. [2018-02-04 04:16:25,847 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 63 transitions. Word has length 22 [2018-02-04 04:16:25,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:25,848 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 63 transitions. [2018-02-04 04:16:25,848 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-04 04:16:25,848 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 63 transitions. [2018-02-04 04:16:25,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-02-04 04:16:25,850 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:25,850 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:25,850 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:25,850 INFO L82 PathProgramCache]: Analyzing trace with hash -655458449, now seen corresponding path program 1 times [2018-02-04 04:16:25,850 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:25,850 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:25,851 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:25,851 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:25,851 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:25,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:25,857 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:25,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:25,887 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:25,887 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 04:16:25,887 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 04:16:25,888 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 04:16:25,888 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 04:16:25,888 INFO L87 Difference]: Start difference. First operand 60 states and 63 transitions. Second operand 6 states. [2018-02-04 04:16:25,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:25,904 INFO L93 Difference]: Finished difference Result 60 states and 62 transitions. [2018-02-04 04:16:25,905 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 04:16:25,905 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 24 [2018-02-04 04:16:25,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:25,905 INFO L225 Difference]: With dead ends: 60 [2018-02-04 04:16:25,905 INFO L226 Difference]: Without dead ends: 60 [2018-02-04 04:16:25,906 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 04:16:25,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-02-04 04:16:25,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2018-02-04 04:16:25,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-02-04 04:16:25,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 62 transitions. [2018-02-04 04:16:25,908 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 62 transitions. Word has length 24 [2018-02-04 04:16:25,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:25,908 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 62 transitions. [2018-02-04 04:16:25,908 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 04:16:25,908 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 62 transitions. [2018-02-04 04:16:25,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-04 04:16:25,909 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:25,909 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:25,909 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:25,909 INFO L82 PathProgramCache]: Analyzing trace with hash -1673666846, now seen corresponding path program 1 times [2018-02-04 04:16:25,909 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:25,909 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:25,910 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:25,910 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:25,910 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:25,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:25,922 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:25,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:25,987 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:25,987 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 04:16:25,987 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 04:16:25,987 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 04:16:25,988 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 04:16:25,988 INFO L87 Difference]: Start difference. First operand 60 states and 62 transitions. Second operand 10 states. [2018-02-04 04:16:26,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:26,141 INFO L93 Difference]: Finished difference Result 59 states and 61 transitions. [2018-02-04 04:16:26,141 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 04:16:26,141 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-02-04 04:16:26,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:26,141 INFO L225 Difference]: With dead ends: 59 [2018-02-04 04:16:26,142 INFO L226 Difference]: Without dead ends: 59 [2018-02-04 04:16:26,142 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 04:16:26,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-02-04 04:16:26,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-02-04 04:16:26,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-02-04 04:16:26,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 61 transitions. [2018-02-04 04:16:26,144 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 61 transitions. Word has length 34 [2018-02-04 04:16:26,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:26,144 INFO L432 AbstractCegarLoop]: Abstraction has 59 states and 61 transitions. [2018-02-04 04:16:26,144 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 04:16:26,145 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 61 transitions. [2018-02-04 04:16:26,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-04 04:16:26,145 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:26,145 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:26,145 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:26,146 INFO L82 PathProgramCache]: Analyzing trace with hash -1673666845, now seen corresponding path program 1 times [2018-02-04 04:16:26,146 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:26,146 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:26,147 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:26,147 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:26,147 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:26,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:26,159 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:26,200 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:26,200 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:26,200 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-04 04:16:26,201 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 04:16:26,201 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 04:16:26,201 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 04:16:26,201 INFO L87 Difference]: Start difference. First operand 59 states and 61 transitions. Second operand 4 states. [2018-02-04 04:16:26,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:26,217 INFO L93 Difference]: Finished difference Result 62 states and 64 transitions. [2018-02-04 04:16:26,225 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 04:16:26,225 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-02-04 04:16:26,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:26,226 INFO L225 Difference]: With dead ends: 62 [2018-02-04 04:16:26,226 INFO L226 Difference]: Without dead ends: 60 [2018-02-04 04:16:26,227 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 04:16:26,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-02-04 04:16:26,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2018-02-04 04:16:26,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-02-04 04:16:26,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 62 transitions. [2018-02-04 04:16:26,230 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 62 transitions. Word has length 34 [2018-02-04 04:16:26,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:26,230 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 62 transitions. [2018-02-04 04:16:26,230 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 04:16:26,231 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 62 transitions. [2018-02-04 04:16:26,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-02-04 04:16:26,231 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:26,231 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:26,231 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:26,232 INFO L82 PathProgramCache]: Analyzing trace with hash -1908152085, now seen corresponding path program 1 times [2018-02-04 04:16:26,232 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:26,232 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:26,233 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:26,233 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:26,233 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:26,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:26,246 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:26,270 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:26,270 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:26,270 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:26,271 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:26,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:26,300 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:26,324 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:26,324 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:26,325 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-02-04 04:16:26,325 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 04:16:26,325 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 04:16:26,325 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-02-04 04:16:26,325 INFO L87 Difference]: Start difference. First operand 60 states and 62 transitions. Second operand 6 states. [2018-02-04 04:16:26,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:26,349 INFO L93 Difference]: Finished difference Result 63 states and 65 transitions. [2018-02-04 04:16:26,350 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 04:16:26,350 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-02-04 04:16:26,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:26,351 INFO L225 Difference]: With dead ends: 63 [2018-02-04 04:16:26,351 INFO L226 Difference]: Without dead ends: 61 [2018-02-04 04:16:26,352 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-02-04 04:16:26,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-02-04 04:16:26,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2018-02-04 04:16:26,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-02-04 04:16:26,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 63 transitions. [2018-02-04 04:16:26,355 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 63 transitions. Word has length 35 [2018-02-04 04:16:26,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:26,355 INFO L432 AbstractCegarLoop]: Abstraction has 61 states and 63 transitions. [2018-02-04 04:16:26,355 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 04:16:26,355 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 63 transitions. [2018-02-04 04:16:26,356 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-04 04:16:26,356 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:26,356 INFO L351 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:26,356 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:26,356 INFO L82 PathProgramCache]: Analyzing trace with hash -587259933, now seen corresponding path program 2 times [2018-02-04 04:16:26,356 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:26,357 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:26,358 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:26,358 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:26,358 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:26,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:26,371 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:26,402 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:26,402 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:26,402 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:26,403 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 04:16:26,428 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 04:16:26,428 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 04:16:26,432 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:26,464 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 04:16:26,466 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 04:16:26,480 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 04:16:26,480 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 04:16:26,492 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 04:16:26,492 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 04:16:26,751 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 04:16:26,751 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 04:16:26,751 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [6] total 20 [2018-02-04 04:16:26,752 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 04:16:26,752 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 04:16:26,752 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=329, Unknown=0, NotChecked=0, Total=380 [2018-02-04 04:16:26,752 INFO L87 Difference]: Start difference. First operand 61 states and 63 transitions. Second operand 20 states. [2018-02-04 04:16:27,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:27,121 INFO L93 Difference]: Finished difference Result 63 states and 65 transitions. [2018-02-04 04:16:27,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-02-04 04:16:27,122 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 36 [2018-02-04 04:16:27,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:27,122 INFO L225 Difference]: With dead ends: 63 [2018-02-04 04:16:27,122 INFO L226 Difference]: Without dead ends: 61 [2018-02-04 04:16:27,123 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=104, Invalid=708, Unknown=0, NotChecked=0, Total=812 [2018-02-04 04:16:27,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-02-04 04:16:27,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2018-02-04 04:16:27,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-02-04 04:16:27,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 63 transitions. [2018-02-04 04:16:27,125 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 63 transitions. Word has length 36 [2018-02-04 04:16:27,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:27,125 INFO L432 AbstractCegarLoop]: Abstraction has 61 states and 63 transitions. [2018-02-04 04:16:27,125 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 04:16:27,125 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 63 transitions. [2018-02-04 04:16:27,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-04 04:16:27,126 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:27,126 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:27,130 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:27,130 INFO L82 PathProgramCache]: Analyzing trace with hash -1225463170, now seen corresponding path program 1 times [2018-02-04 04:16:27,130 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:27,130 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:27,131 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:27,131 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 04:16:27,131 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:27,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:27,142 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:27,209 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-02-04 04:16:27,209 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:27,210 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 04:16:27,210 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 04:16:27,210 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 04:16:27,211 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 04:16:27,211 INFO L87 Difference]: Start difference. First operand 61 states and 63 transitions. Second operand 10 states. [2018-02-04 04:16:27,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:27,329 INFO L93 Difference]: Finished difference Result 59 states and 61 transitions. [2018-02-04 04:16:27,330 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 04:16:27,330 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-02-04 04:16:27,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:27,331 INFO L225 Difference]: With dead ends: 59 [2018-02-04 04:16:27,331 INFO L226 Difference]: Without dead ends: 59 [2018-02-04 04:16:27,332 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 04:16:27,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-02-04 04:16:27,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-02-04 04:16:27,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-02-04 04:16:27,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 61 transitions. [2018-02-04 04:16:27,333 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 61 transitions. Word has length 42 [2018-02-04 04:16:27,334 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:27,334 INFO L432 AbstractCegarLoop]: Abstraction has 59 states and 61 transitions. [2018-02-04 04:16:27,334 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 04:16:27,334 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 61 transitions. [2018-02-04 04:16:27,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-04 04:16:27,334 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:27,334 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:27,334 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:27,334 INFO L82 PathProgramCache]: Analyzing trace with hash -1225463169, now seen corresponding path program 1 times [2018-02-04 04:16:27,335 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:27,335 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:27,335 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:27,335 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:27,335 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:27,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:27,343 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:27,367 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:27,367 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:27,367 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:27,368 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:27,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:27,384 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:27,393 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:27,393 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:27,394 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-02-04 04:16:27,394 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 04:16:27,394 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 04:16:27,394 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-02-04 04:16:27,394 INFO L87 Difference]: Start difference. First operand 59 states and 61 transitions. Second operand 8 states. [2018-02-04 04:16:27,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:27,410 INFO L93 Difference]: Finished difference Result 62 states and 64 transitions. [2018-02-04 04:16:27,411 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 04:16:27,411 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-02-04 04:16:27,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:27,412 INFO L225 Difference]: With dead ends: 62 [2018-02-04 04:16:27,412 INFO L226 Difference]: Without dead ends: 60 [2018-02-04 04:16:27,412 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-02-04 04:16:27,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-02-04 04:16:27,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2018-02-04 04:16:27,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-02-04 04:16:27,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 62 transitions. [2018-02-04 04:16:27,415 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 62 transitions. Word has length 42 [2018-02-04 04:16:27,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:27,415 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 62 transitions. [2018-02-04 04:16:27,415 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 04:16:27,415 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 62 transitions. [2018-02-04 04:16:27,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-02-04 04:16:27,416 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:27,416 INFO L351 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:27,416 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:27,416 INFO L82 PathProgramCache]: Analyzing trace with hash -1854641017, now seen corresponding path program 2 times [2018-02-04 04:16:27,417 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:27,417 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:27,418 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:27,418 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:27,418 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:27,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:27,428 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:27,459 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:27,459 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:27,459 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:27,460 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 04:16:27,475 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 04:16:27,475 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 04:16:27,479 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:27,489 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 04:16:27,489 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 04:16:27,500 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 04:16:27,500 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 04:16:27,509 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 04:16:27,509 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 04:16:27,714 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-04 04:16:27,714 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 04:16:27,715 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-02-04 04:16:27,715 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-04 04:16:27,715 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-04 04:16:27,715 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=400, Unknown=0, NotChecked=0, Total=462 [2018-02-04 04:16:27,716 INFO L87 Difference]: Start difference. First operand 60 states and 62 transitions. Second operand 22 states. [2018-02-04 04:16:28,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:28,114 INFO L93 Difference]: Finished difference Result 61 states and 63 transitions. [2018-02-04 04:16:28,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 04:16:28,114 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 43 [2018-02-04 04:16:28,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:28,114 INFO L225 Difference]: With dead ends: 61 [2018-02-04 04:16:28,114 INFO L226 Difference]: Without dead ends: 59 [2018-02-04 04:16:28,115 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 28 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=139, Invalid=917, Unknown=0, NotChecked=0, Total=1056 [2018-02-04 04:16:28,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-02-04 04:16:28,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-02-04 04:16:28,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-02-04 04:16:28,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 61 transitions. [2018-02-04 04:16:28,117 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 61 transitions. Word has length 43 [2018-02-04 04:16:28,117 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:28,117 INFO L432 AbstractCegarLoop]: Abstraction has 59 states and 61 transitions. [2018-02-04 04:16:28,117 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-04 04:16:28,117 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 61 transitions. [2018-02-04 04:16:28,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-04 04:16:28,118 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:28,118 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:28,118 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:28,118 INFO L82 PathProgramCache]: Analyzing trace with hash -796850259, now seen corresponding path program 1 times [2018-02-04 04:16:28,118 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:28,118 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:28,119 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:28,119 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 04:16:28,119 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:28,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:28,124 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:28,156 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 04:16:28,156 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:28,156 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-02-04 04:16:28,157 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 04:16:28,157 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 04:16:28,157 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-04 04:16:28,157 INFO L87 Difference]: Start difference. First operand 59 states and 61 transitions. Second operand 8 states. [2018-02-04 04:16:28,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:28,184 INFO L93 Difference]: Finished difference Result 61 states and 62 transitions. [2018-02-04 04:16:28,184 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 04:16:28,184 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-02-04 04:16:28,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:28,185 INFO L225 Difference]: With dead ends: 61 [2018-02-04 04:16:28,185 INFO L226 Difference]: Without dead ends: 59 [2018-02-04 04:16:28,185 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-02-04 04:16:28,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-02-04 04:16:28,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-02-04 04:16:28,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-02-04 04:16:28,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 60 transitions. [2018-02-04 04:16:28,186 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 60 transitions. Word has length 42 [2018-02-04 04:16:28,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:28,187 INFO L432 AbstractCegarLoop]: Abstraction has 59 states and 60 transitions. [2018-02-04 04:16:28,187 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 04:16:28,187 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 60 transitions. [2018-02-04 04:16:28,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-02-04 04:16:28,187 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:28,187 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:28,187 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:28,187 INFO L82 PathProgramCache]: Analyzing trace with hash -1073611946, now seen corresponding path program 1 times [2018-02-04 04:16:28,188 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:28,188 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:28,188 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:28,188 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:28,188 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:28,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:28,196 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:28,265 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 04:16:28,265 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:28,265 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-02-04 04:16:28,265 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 04:16:28,265 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 04:16:28,266 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 04:16:28,266 INFO L87 Difference]: Start difference. First operand 59 states and 60 transitions. Second operand 10 states. [2018-02-04 04:16:28,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:28,325 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-02-04 04:16:28,325 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 04:16:28,325 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 47 [2018-02-04 04:16:28,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:28,325 INFO L225 Difference]: With dead ends: 63 [2018-02-04 04:16:28,326 INFO L226 Difference]: Without dead ends: 59 [2018-02-04 04:16:28,326 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 04:16:28,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-02-04 04:16:28,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-02-04 04:16:28,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-02-04 04:16:28,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 59 transitions. [2018-02-04 04:16:28,327 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 59 transitions. Word has length 47 [2018-02-04 04:16:28,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:28,328 INFO L432 AbstractCegarLoop]: Abstraction has 59 states and 59 transitions. [2018-02-04 04:16:28,328 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 04:16:28,328 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 59 transitions. [2018-02-04 04:16:28,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-02-04 04:16:28,328 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:28,328 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:28,328 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:28,329 INFO L82 PathProgramCache]: Analyzing trace with hash 348696970, now seen corresponding path program 1 times [2018-02-04 04:16:28,329 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:28,329 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:28,329 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:28,329 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:28,329 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:28,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:28,339 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:28,384 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:28,384 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:28,384 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:28,385 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:28,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:28,412 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:28,429 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:28,429 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:28,429 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-02-04 04:16:28,429 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 04:16:28,430 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 04:16:28,430 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-02-04 04:16:28,430 INFO L87 Difference]: Start difference. First operand 59 states and 59 transitions. Second operand 10 states. [2018-02-04 04:16:28,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:28,451 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-02-04 04:16:28,451 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 04:16:28,451 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 58 [2018-02-04 04:16:28,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:28,452 INFO L225 Difference]: With dead ends: 62 [2018-02-04 04:16:28,452 INFO L226 Difference]: Without dead ends: 60 [2018-02-04 04:16:28,452 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 58 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-02-04 04:16:28,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-02-04 04:16:28,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2018-02-04 04:16:28,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-02-04 04:16:28,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 60 transitions. [2018-02-04 04:16:28,454 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 60 transitions. Word has length 58 [2018-02-04 04:16:28,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:28,455 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 60 transitions. [2018-02-04 04:16:28,455 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 04:16:28,455 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 60 transitions. [2018-02-04 04:16:28,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-02-04 04:16:28,456 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:28,456 INFO L351 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:28,456 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:28,456 INFO L82 PathProgramCache]: Analyzing trace with hash -648862830, now seen corresponding path program 2 times [2018-02-04 04:16:28,456 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:28,456 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:28,457 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:28,457 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:28,457 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:28,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:28,469 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:28,534 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:28,534 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:28,534 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:28,535 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 04:16:28,557 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 04:16:28,558 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 04:16:28,562 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:28,584 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:28,585 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:28,585 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 11 [2018-02-04 04:16:28,585 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 04:16:28,585 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 04:16:28,586 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-02-04 04:16:28,586 INFO L87 Difference]: Start difference. First operand 60 states and 60 transitions. Second operand 11 states. [2018-02-04 04:16:28,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:28,611 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-02-04 04:16:28,611 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 04:16:28,611 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 59 [2018-02-04 04:16:28,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:28,612 INFO L225 Difference]: With dead ends: 63 [2018-02-04 04:16:28,612 INFO L226 Difference]: Without dead ends: 61 [2018-02-04 04:16:28,613 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=51, Invalid=81, Unknown=0, NotChecked=0, Total=132 [2018-02-04 04:16:28,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-02-04 04:16:28,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2018-02-04 04:16:28,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-02-04 04:16:28,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 61 transitions. [2018-02-04 04:16:28,615 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 61 transitions. Word has length 59 [2018-02-04 04:16:28,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:28,616 INFO L432 AbstractCegarLoop]: Abstraction has 61 states and 61 transitions. [2018-02-04 04:16:28,616 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 04:16:28,616 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 61 transitions. [2018-02-04 04:16:28,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-02-04 04:16:28,617 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:28,617 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:28,617 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:28,617 INFO L82 PathProgramCache]: Analyzing trace with hash -1508445558, now seen corresponding path program 3 times [2018-02-04 04:16:28,617 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:28,617 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:28,618 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:28,618 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 04:16:28,618 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:28,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:28,631 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:28,693 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:28,693 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:28,693 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:28,694 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 04:16:28,723 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-02-04 04:16:28,723 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 04:16:28,727 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:28,740 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:28,740 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:28,740 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-02-04 04:16:28,741 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-04 04:16:28,741 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-04 04:16:28,741 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-02-04 04:16:28,741 INFO L87 Difference]: Start difference. First operand 61 states and 61 transitions. Second operand 12 states. [2018-02-04 04:16:28,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:28,766 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-02-04 04:16:28,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 04:16:28,767 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 60 [2018-02-04 04:16:28,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:28,767 INFO L225 Difference]: With dead ends: 64 [2018-02-04 04:16:28,767 INFO L226 Difference]: Without dead ends: 62 [2018-02-04 04:16:28,768 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 60 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-02-04 04:16:28,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2018-02-04 04:16:28,769 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 62. [2018-02-04 04:16:28,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-02-04 04:16:28,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 62 transitions. [2018-02-04 04:16:28,770 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 62 transitions. Word has length 60 [2018-02-04 04:16:28,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:28,770 INFO L432 AbstractCegarLoop]: Abstraction has 62 states and 62 transitions. [2018-02-04 04:16:28,770 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-04 04:16:28,770 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 62 transitions. [2018-02-04 04:16:28,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-02-04 04:16:28,772 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:28,773 INFO L351 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:28,773 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:28,773 INFO L82 PathProgramCache]: Analyzing trace with hash 1909260946, now seen corresponding path program 4 times [2018-02-04 04:16:28,773 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:28,773 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:28,774 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:28,774 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 04:16:28,774 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:28,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:28,789 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:28,867 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:28,867 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:28,867 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:28,868 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 04:16:28,884 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 04:16:28,884 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 04:16:28,887 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:28,900 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:28,901 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:28,901 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-02-04 04:16:28,901 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-04 04:16:28,901 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-04 04:16:28,902 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-02-04 04:16:28,902 INFO L87 Difference]: Start difference. First operand 62 states and 62 transitions. Second operand 13 states. [2018-02-04 04:16:28,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:28,922 INFO L93 Difference]: Finished difference Result 65 states and 65 transitions. [2018-02-04 04:16:28,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-02-04 04:16:28,923 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 61 [2018-02-04 04:16:28,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:28,923 INFO L225 Difference]: With dead ends: 65 [2018-02-04 04:16:28,923 INFO L226 Difference]: Without dead ends: 63 [2018-02-04 04:16:28,924 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 61 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=72, Invalid=110, Unknown=0, NotChecked=0, Total=182 [2018-02-04 04:16:28,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-02-04 04:16:28,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2018-02-04 04:16:28,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-02-04 04:16:28,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 63 transitions. [2018-02-04 04:16:28,925 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 63 transitions. Word has length 61 [2018-02-04 04:16:28,925 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:28,925 INFO L432 AbstractCegarLoop]: Abstraction has 63 states and 63 transitions. [2018-02-04 04:16:28,926 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-04 04:16:28,926 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 63 transitions. [2018-02-04 04:16:28,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-02-04 04:16:28,926 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:28,926 INFO L351 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:28,926 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:28,927 INFO L82 PathProgramCache]: Analyzing trace with hash 483980170, now seen corresponding path program 5 times [2018-02-04 04:16:28,927 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:28,927 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:28,928 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:28,928 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 04:16:28,928 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:28,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:28,937 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:29,004 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:29,005 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:29,005 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:29,005 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 04:16:29,021 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-02-04 04:16:29,021 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 04:16:29,023 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:29,034 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:29,035 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:29,035 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-02-04 04:16:29,035 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-02-04 04:16:29,035 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-02-04 04:16:29,036 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-02-04 04:16:29,036 INFO L87 Difference]: Start difference. First operand 63 states and 63 transitions. Second operand 14 states. [2018-02-04 04:16:29,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:29,057 INFO L93 Difference]: Finished difference Result 66 states and 66 transitions. [2018-02-04 04:16:29,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-04 04:16:29,057 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 62 [2018-02-04 04:16:29,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:29,058 INFO L225 Difference]: With dead ends: 66 [2018-02-04 04:16:29,058 INFO L226 Difference]: Without dead ends: 64 [2018-02-04 04:16:29,058 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 62 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-02-04 04:16:29,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-02-04 04:16:29,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 64. [2018-02-04 04:16:29,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-02-04 04:16:29,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 64 transitions. [2018-02-04 04:16:29,060 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 64 transitions. Word has length 62 [2018-02-04 04:16:29,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:29,060 INFO L432 AbstractCegarLoop]: Abstraction has 64 states and 64 transitions. [2018-02-04 04:16:29,060 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-02-04 04:16:29,060 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 64 transitions. [2018-02-04 04:16:29,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-02-04 04:16:29,061 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:29,061 INFO L351 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:29,061 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:29,061 INFO L82 PathProgramCache]: Analyzing trace with hash -750050926, now seen corresponding path program 6 times [2018-02-04 04:16:29,061 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:29,061 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:29,062 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:29,062 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 04:16:29,062 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:29,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:29,071 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:29,146 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:29,146 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:29,146 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:29,147 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-04 04:16:29,168 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2018-02-04 04:16:29,168 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 04:16:29,170 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:29,181 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:29,181 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:29,182 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2018-02-04 04:16:29,182 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-04 04:16:29,182 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-04 04:16:29,182 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-02-04 04:16:29,183 INFO L87 Difference]: Start difference. First operand 64 states and 64 transitions. Second operand 15 states. [2018-02-04 04:16:29,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:29,207 INFO L93 Difference]: Finished difference Result 67 states and 67 transitions. [2018-02-04 04:16:29,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-02-04 04:16:29,207 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 63 [2018-02-04 04:16:29,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:29,207 INFO L225 Difference]: With dead ends: 67 [2018-02-04 04:16:29,208 INFO L226 Difference]: Without dead ends: 65 [2018-02-04 04:16:29,208 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=97, Invalid=143, Unknown=0, NotChecked=0, Total=240 [2018-02-04 04:16:29,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2018-02-04 04:16:29,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 65. [2018-02-04 04:16:29,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65 states. [2018-02-04 04:16:29,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 65 transitions. [2018-02-04 04:16:29,209 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 65 transitions. Word has length 63 [2018-02-04 04:16:29,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:29,209 INFO L432 AbstractCegarLoop]: Abstraction has 65 states and 65 transitions. [2018-02-04 04:16:29,209 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-04 04:16:29,209 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 65 transitions. [2018-02-04 04:16:29,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-02-04 04:16:29,210 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:29,210 INFO L351 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:29,210 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:29,210 INFO L82 PathProgramCache]: Analyzing trace with hash -350309238, now seen corresponding path program 7 times [2018-02-04 04:16:29,210 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:29,210 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:29,211 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:29,211 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 04:16:29,211 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:29,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:29,219 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:29,292 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:29,292 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:29,292 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:29,293 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:29,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:29,313 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:29,337 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:29,337 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:29,337 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-02-04 04:16:29,338 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-04 04:16:29,338 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-04 04:16:29,338 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-02-04 04:16:29,338 INFO L87 Difference]: Start difference. First operand 65 states and 65 transitions. Second operand 16 states. [2018-02-04 04:16:29,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:29,371 INFO L93 Difference]: Finished difference Result 68 states and 68 transitions. [2018-02-04 04:16:29,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-04 04:16:29,371 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 64 [2018-02-04 04:16:29,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:29,372 INFO L225 Difference]: With dead ends: 68 [2018-02-04 04:16:29,372 INFO L226 Difference]: Without dead ends: 66 [2018-02-04 04:16:29,372 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 64 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-02-04 04:16:29,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-02-04 04:16:29,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2018-02-04 04:16:29,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-02-04 04:16:29,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 66 transitions. [2018-02-04 04:16:29,374 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 66 transitions. Word has length 64 [2018-02-04 04:16:29,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:29,375 INFO L432 AbstractCegarLoop]: Abstraction has 66 states and 66 transitions. [2018-02-04 04:16:29,375 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-04 04:16:29,375 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 66 transitions. [2018-02-04 04:16:29,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-04 04:16:29,375 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:29,375 INFO L351 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:29,376 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:29,376 INFO L82 PathProgramCache]: Analyzing trace with hash -843218798, now seen corresponding path program 8 times [2018-02-04 04:16:29,376 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:29,376 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:29,377 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:29,377 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:29,377 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:29,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:29,390 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:29,525 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:29,526 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:29,526 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:29,526 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 04:16:29,550 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 04:16:29,551 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 04:16:29,555 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:29,568 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:29,569 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:29,569 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 17 [2018-02-04 04:16:29,569 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-02-04 04:16:29,569 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-02-04 04:16:29,570 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-02-04 04:16:29,570 INFO L87 Difference]: Start difference. First operand 66 states and 66 transitions. Second operand 17 states. [2018-02-04 04:16:29,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:29,614 INFO L93 Difference]: Finished difference Result 69 states and 69 transitions. [2018-02-04 04:16:29,615 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-02-04 04:16:29,615 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 65 [2018-02-04 04:16:29,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:29,615 INFO L225 Difference]: With dead ends: 69 [2018-02-04 04:16:29,615 INFO L226 Difference]: Without dead ends: 67 [2018-02-04 04:16:29,615 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=126, Invalid=180, Unknown=0, NotChecked=0, Total=306 [2018-02-04 04:16:29,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-02-04 04:16:29,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 67. [2018-02-04 04:16:29,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2018-02-04 04:16:29,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 67 transitions. [2018-02-04 04:16:29,617 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 67 transitions. Word has length 65 [2018-02-04 04:16:29,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:29,617 INFO L432 AbstractCegarLoop]: Abstraction has 67 states and 67 transitions. [2018-02-04 04:16:29,617 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-02-04 04:16:29,617 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 67 transitions. [2018-02-04 04:16:29,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-02-04 04:16:29,617 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:29,618 INFO L351 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:29,618 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:29,618 INFO L82 PathProgramCache]: Analyzing trace with hash 1056454026, now seen corresponding path program 9 times [2018-02-04 04:16:29,618 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:29,618 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:29,618 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:29,619 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 04:16:29,619 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:29,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:29,628 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:29,729 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:29,729 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:29,729 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:29,730 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 04:16:29,748 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2018-02-04 04:16:29,748 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 04:16:29,750 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:29,774 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:29,774 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:29,774 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-02-04 04:16:29,774 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-02-04 04:16:29,774 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-02-04 04:16:29,774 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-02-04 04:16:29,775 INFO L87 Difference]: Start difference. First operand 67 states and 67 transitions. Second operand 18 states. [2018-02-04 04:16:29,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:29,800 INFO L93 Difference]: Finished difference Result 70 states and 70 transitions. [2018-02-04 04:16:29,801 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-02-04 04:16:29,801 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 66 [2018-02-04 04:16:29,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:29,801 INFO L225 Difference]: With dead ends: 70 [2018-02-04 04:16:29,801 INFO L226 Difference]: Without dead ends: 68 [2018-02-04 04:16:29,801 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 66 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-02-04 04:16:29,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2018-02-04 04:16:29,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 68. [2018-02-04 04:16:29,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-02-04 04:16:29,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 68 transitions. [2018-02-04 04:16:29,803 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 68 transitions. Word has length 66 [2018-02-04 04:16:29,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:29,804 INFO L432 AbstractCegarLoop]: Abstraction has 68 states and 68 transitions. [2018-02-04 04:16:29,804 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-02-04 04:16:29,804 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 68 transitions. [2018-02-04 04:16:29,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-02-04 04:16:29,804 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:29,804 INFO L351 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:29,805 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:29,805 INFO L82 PathProgramCache]: Analyzing trace with hash -183230574, now seen corresponding path program 10 times [2018-02-04 04:16:29,805 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:29,805 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:29,805 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:29,805 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 04:16:29,806 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:29,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:29,814 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:29,941 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:29,941 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:29,942 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:29,943 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 04:16:29,968 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 04:16:29,968 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 04:16:29,972 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:29,982 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:29,983 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:29,983 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-02-04 04:16:29,983 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-04 04:16:29,983 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-04 04:16:29,983 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-02-04 04:16:29,983 INFO L87 Difference]: Start difference. First operand 68 states and 68 transitions. Second operand 19 states. [2018-02-04 04:16:30,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:30,007 INFO L93 Difference]: Finished difference Result 71 states and 71 transitions. [2018-02-04 04:16:30,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-04 04:16:30,008 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 67 [2018-02-04 04:16:30,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:30,008 INFO L225 Difference]: With dead ends: 71 [2018-02-04 04:16:30,008 INFO L226 Difference]: Without dead ends: 69 [2018-02-04 04:16:30,009 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 67 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-02-04 04:16:30,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-02-04 04:16:30,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 69. [2018-02-04 04:16:30,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-02-04 04:16:30,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 69 transitions. [2018-02-04 04:16:30,010 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 69 transitions. Word has length 67 [2018-02-04 04:16:30,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:30,011 INFO L432 AbstractCegarLoop]: Abstraction has 69 states and 69 transitions. [2018-02-04 04:16:30,011 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-04 04:16:30,011 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 69 transitions. [2018-02-04 04:16:30,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-02-04 04:16:30,011 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:30,011 INFO L351 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:30,011 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:30,012 INFO L82 PathProgramCache]: Analyzing trace with hash 41252490, now seen corresponding path program 11 times [2018-02-04 04:16:30,012 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:30,012 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:30,012 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:30,013 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 04:16:30,013 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:30,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:30,026 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:30,164 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:30,165 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:30,165 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:30,166 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 04:16:30,210 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2018-02-04 04:16:30,210 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 04:16:30,214 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:30,226 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:30,227 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:30,227 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20 [2018-02-04 04:16:30,227 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 04:16:30,227 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 04:16:30,228 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=207, Unknown=0, NotChecked=0, Total=380 [2018-02-04 04:16:30,228 INFO L87 Difference]: Start difference. First operand 69 states and 69 transitions. Second operand 20 states. [2018-02-04 04:16:30,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:30,265 INFO L93 Difference]: Finished difference Result 72 states and 72 transitions. [2018-02-04 04:16:30,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 04:16:30,266 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 68 [2018-02-04 04:16:30,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:30,267 INFO L225 Difference]: With dead ends: 72 [2018-02-04 04:16:30,267 INFO L226 Difference]: Without dead ends: 70 [2018-02-04 04:16:30,267 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=177, Invalid=243, Unknown=0, NotChecked=0, Total=420 [2018-02-04 04:16:30,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-02-04 04:16:30,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 70. [2018-02-04 04:16:30,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-02-04 04:16:30,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 70 transitions. [2018-02-04 04:16:30,269 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 70 transitions. Word has length 68 [2018-02-04 04:16:30,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:30,269 INFO L432 AbstractCegarLoop]: Abstraction has 70 states and 70 transitions. [2018-02-04 04:16:30,270 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 04:16:30,270 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 70 transitions. [2018-02-04 04:16:30,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-02-04 04:16:30,270 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:30,270 INFO L351 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:30,270 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:30,271 INFO L82 PathProgramCache]: Analyzing trace with hash -1589707118, now seen corresponding path program 12 times [2018-02-04 04:16:30,271 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:30,271 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:30,271 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:30,272 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 04:16:30,272 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:30,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-02-04 04:16:30,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-02-04 04:16:30,339 INFO L410 BasicCegarLoop]: Counterexample might be feasible [2018-02-04 04:16:30,351 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-02-04 04:16:30,354 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-02-04 04:16:30,367 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.02 04:16:30 BoogieIcfgContainer [2018-02-04 04:16:30,367 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-02-04 04:16:30,368 INFO L168 Benchmark]: Toolchain (without parser) took 5922.90 ms. Allocated memory was 402.7 MB in the beginning and 794.8 MB in the end (delta: 392.2 MB). Free memory was 359.3 MB in the beginning and 711.4 MB in the end (delta: -352.1 MB). Peak memory consumption was 40.1 MB. Max. memory is 5.3 GB. [2018-02-04 04:16:30,369 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 402.7 MB. Free memory is still 365.9 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-04 04:16:30,369 INFO L168 Benchmark]: CACSL2BoogieTranslator took 165.03 ms. Allocated memory is still 402.7 MB. Free memory was 359.3 MB in the beginning and 346.1 MB in the end (delta: 13.2 MB). Peak memory consumption was 13.2 MB. Max. memory is 5.3 GB. [2018-02-04 04:16:30,369 INFO L168 Benchmark]: Boogie Preprocessor took 30.93 ms. Allocated memory is still 402.7 MB. Free memory was 346.1 MB in the beginning and 344.8 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. [2018-02-04 04:16:30,370 INFO L168 Benchmark]: RCFGBuilder took 208.21 ms. Allocated memory is still 402.7 MB. Free memory was 344.8 MB in the beginning and 321.0 MB in the end (delta: 23.8 MB). Peak memory consumption was 23.8 MB. Max. memory is 5.3 GB. [2018-02-04 04:16:30,370 INFO L168 Benchmark]: TraceAbstraction took 5516.06 ms. Allocated memory was 402.7 MB in the beginning and 794.8 MB in the end (delta: 392.2 MB). Free memory was 321.0 MB in the beginning and 711.4 MB in the end (delta: -390.4 MB). Peak memory consumption was 1.7 MB. Max. memory is 5.3 GB. [2018-02-04 04:16:30,371 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 402.7 MB. Free memory is still 365.9 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 165.03 ms. Allocated memory is still 402.7 MB. Free memory was 359.3 MB in the beginning and 346.1 MB in the end (delta: 13.2 MB). Peak memory consumption was 13.2 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 30.93 ms. Allocated memory is still 402.7 MB. Free memory was 346.1 MB in the beginning and 344.8 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. * RCFGBuilder took 208.21 ms. Allocated memory is still 402.7 MB. Free memory was 344.8 MB in the beginning and 321.0 MB in the end (delta: 23.8 MB). Peak memory consumption was 23.8 MB. Max. memory is 5.3 GB. * TraceAbstraction took 5516.06 ms. Allocated memory was 402.7 MB in the beginning and 794.8 MB in the end (delta: 392.2 MB). Free memory was 321.0 MB in the beginning and 711.4 MB in the end (delta: -390.4 MB). Peak memory consumption was 1.7 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1441]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1441. Possible FailurePath: [L1442] CALL entry_point() [L1436] struct ldv_kobject *kobj; [L1437] CALL, EXPR ldv_kobject_create() [L1406] struct ldv_kobject *kobj; [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] EXPR, FCALL malloc(size) VAL [\old(size)=16, malloc(size)={19:0}, size=16] [L1074] RET return malloc(size); VAL [\old(size)=16, \result={19:0}, malloc(size)={19:0}, size=16] [L1408] EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_malloc(sizeof(*kobj))={19:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) [L1409] COND FALSE !(!kobj) VAL [kobj={19:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={19:0}, memset(kobj, 0, sizeof(*kobj))={19:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={19:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={19:0}, kobj={19:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={19:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={19:0}, kobj={19:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={19:12}] [L1294] RET, FCALL ((&kref->refcount)->counter) = (1) VAL [kref={19:12}, kref={19:12}] [L1382] ldv_kref_init(&kobj->kref) VAL [kobj={19:0}, kobj={19:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [list={19:4}] [L1099] FCALL list->next = list VAL [list={19:4}, list={19:4}] [L1100] FCALL list->prev = list VAL [list={19:4}, list={19:4}] [L1383] RET, FCALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={19:0}, kobj={19:0}] [L1413] ldv_kobject_init(kobj) VAL [kobj={19:0}] [L1414] RET return kobj; VAL [\result={19:0}, kobj={19:0}] [L1437] EXPR ldv_kobject_create() VAL [ldv_kobject_create()={19:0}] [L1437] RET kobj = ldv_kobject_create() [L1442] entry_point() - StatisticsResult: Ultimate Automizer benchmark data CFG has 11 procedures, 65 locations, 9 error locations. UNSAFE Result, 5.4s OverallTime, 26 OverallIterations, 16 TraceHistogramMax, 1.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1291 SDtfs, 251 SDslu, 7944 SDs, 0 SdLazy, 2139 SolverSat, 77 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1134 GetRequests, 843 SyntacticMatches, 2 SemanticMatches, 289 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 610 ImplicationChecksByTransitivity, 2.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=70occurred in iteration=25, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 25 MinimizatonAttempts, 6 StatesRemovedByMinimization, 3 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 2.5s InterpolantComputationTime, 2067 NumberOfCodeBlocks, 2061 NumberOfCodeBlocksAsserted, 74 NumberOfCheckSat, 1958 ConstructedInterpolants, 20 QuantifiedInterpolants, 181342 SizeOfPredicates, 31 NumberOfNonLiveVariables, 3798 ConjunctsInSsa, 238 ConjunctsInUnsatCore, 40 InterpolantComputations, 12 PerfectInterpolantSequences, 49/1396 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-04_04-16-30-377.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-04_04-16-30-377.csv Received shutdown request...