java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_true-valid-memsafety_true-termination.i
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This is Ultimate 0.1.23-ccafca9-m
[2018-02-04 04:17:56,082 INFO L170 SettingsManager]: Resetting all preferences to default values...
[2018-02-04 04:17:56,083 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values
[2018-02-04 04:17:56,095 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring...
[2018-02-04 04:17:56,095 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values
[2018-02-04 04:17:56,096 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values
[2018-02-04 04:17:56,096 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values
[2018-02-04 04:17:56,098 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values
[2018-02-04 04:17:56,099 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values
[2018-02-04 04:17:56,100 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values
[2018-02-04 04:17:56,101 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring...
[2018-02-04 04:17:56,101 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values
[2018-02-04 04:17:56,102 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values
[2018-02-04 04:17:56,103 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values
[2018-02-04 04:17:56,103 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values
[2018-02-04 04:17:56,105 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values
[2018-02-04 04:17:56,107 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values
[2018-02-04 04:17:56,108 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values
[2018-02-04 04:17:56,109 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values
[2018-02-04 04:17:56,110 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values
[2018-02-04 04:17:56,111 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring...
[2018-02-04 04:17:56,112 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring...
[2018-02-04 04:17:56,112 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values
[2018-02-04 04:17:56,113 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values
[2018-02-04 04:17:56,113 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values
[2018-02-04 04:17:56,114 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring...
[2018-02-04 04:17:56,114 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values
[2018-02-04 04:17:56,115 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring...
[2018-02-04 04:17:56,115 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring...
[2018-02-04 04:17:56,115 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values
[2018-02-04 04:17:56,115 INFO L181 SettingsManager]: Finished resetting all preferences to default values...
[2018-02-04 04:17:56,116 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf
[2018-02-04 04:17:56,124 INFO L110 SettingsManager]: Loading preferences was successful
[2018-02-04 04:17:56,125 INFO L112 SettingsManager]: Preferences different from defaults after loading the file:
[2018-02-04 04:17:56,125 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2018-02-04 04:17:56,125 INFO L133 SettingsManager]: * Create parallel compositions if possible=false
[2018-02-04 04:17:56,126 INFO L133 SettingsManager]: * Use SBE=true
[2018-02-04 04:17:56,126 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2018-02-04 04:17:56,126 INFO L133 SettingsManager]: * sizeof long=4
[2018-02-04 04:17:56,126 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false
[2018-02-04 04:17:56,126 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true
[2018-02-04 04:17:56,126 INFO L133 SettingsManager]: * sizeof POINTER=4
[2018-02-04 04:17:56,126 INFO L133 SettingsManager]: * Check division by zero=IGNORE
[2018-02-04 04:17:56,126 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true
[2018-02-04 04:17:56,126 INFO L133 SettingsManager]: * Bitprecise bitfields=true
[2018-02-04 04:17:56,127 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true
[2018-02-04 04:17:56,127 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE
[2018-02-04 04:17:56,127 INFO L133 SettingsManager]: * sizeof long double=12
[2018-02-04 04:17:56,127 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2018-02-04 04:17:56,127 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements
[2018-02-04 04:17:56,127 INFO L133 SettingsManager]: * To the following directory=./dump/
[2018-02-04 04:17:56,127 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode
[2018-02-04 04:17:56,127 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2018-02-04 04:17:56,127 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2018-02-04 04:17:56,127 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK
[2018-02-04 04:17:56,128 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP
[2018-02-04 04:17:56,128 INFO L133 SettingsManager]: * Trace refinement strategy=SMTINTERPOL
[2018-02-04 04:17:56,154 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp
[2018-02-04 04:17:56,161 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized
[2018-02-04 04:17:56,163 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected.
[2018-02-04 04:17:56,164 INFO L271 PluginConnector]: Initializing CDTParser...
[2018-02-04 04:17:56,164 INFO L276 PluginConnector]: CDTParser initialized
[2018-02-04 04:17:56,165 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_true-valid-memsafety_true-termination.i
[2018-02-04 04:17:56,303 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2018-02-04 04:17:56,304 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements.
[2018-02-04 04:17:56,305 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2018-02-04 04:17:56,305 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator...
[2018-02-04 04:17:56,309 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized
[2018-02-04 04:17:56,310 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 04:17:56" (1/1) ...
[2018-02-04 04:17:56,312 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4b089594 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:17:56, skipping insertion in model container
[2018-02-04 04:17:56,312 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 04:17:56" (1/1) ...
[2018-02-04 04:17:56,322 INFO L153 Dispatcher]: Using SV-COMP mode
[2018-02-04 04:17:56,356 INFO L153 Dispatcher]: Using SV-COMP mode
[2018-02-04 04:17:56,452 INFO L450 PostProcessor]: Settings: Checked method=main
[2018-02-04 04:17:56,471 INFO L450 PostProcessor]: Settings: Checked method=main
[2018-02-04 04:17:56,481 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:17:56 WrapperNode
[2018-02-04 04:17:56,481 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2018-02-04 04:17:56,481 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2018-02-04 04:17:56,482 INFO L271 PluginConnector]: Initializing Boogie Preprocessor...
[2018-02-04 04:17:56,482 INFO L276 PluginConnector]: Boogie Preprocessor initialized
[2018-02-04 04:17:56,490 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:17:56" (1/1) ...
[2018-02-04 04:17:56,490 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:17:56" (1/1) ...
[2018-02-04 04:17:56,499 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:17:56" (1/1) ...
[2018-02-04 04:17:56,499 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:17:56" (1/1) ...
[2018-02-04 04:17:56,506 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:17:56" (1/1) ...
[2018-02-04 04:17:56,509 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:17:56" (1/1) ...
[2018-02-04 04:17:56,510 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:17:56" (1/1) ...
[2018-02-04 04:17:56,513 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2018-02-04 04:17:56,513 INFO L113 PluginConnector]: ------------------------RCFGBuilder----------------------------
[2018-02-04 04:17:56,514 INFO L271 PluginConnector]: Initializing RCFGBuilder...
[2018-02-04 04:17:56,514 INFO L276 PluginConnector]: RCFGBuilder initialized
[2018-02-04 04:17:56,514 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:17:56" (1/1) ...
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2018-02-04 04:17:56,551 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init
[2018-02-04 04:17:56,552 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2018-02-04 04:17:56,552 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID
[2018-02-04 04:17:56,552 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc
[2018-02-04 04:17:56,552 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD
[2018-02-04 04:17:56,552 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return
[2018-02-04 04:17:56,552 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return
[2018-02-04 04:17:56,552 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub
[2018-02-04 04:17:56,552 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init
[2018-02-04 04:17:56,552 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get
[2018-02-04 04:17:56,552 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put
[2018-02-04 04:17:56,552 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup
[2018-02-04 04:17:56,553 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release
[2018-02-04 04:17:56,553 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put
[2018-02-04 04:17:56,553 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get
[2018-02-04 04:17:56,553 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal
[2018-02-04 04:17:56,553 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init
[2018-02-04 04:17:56,553 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create
[2018-02-04 04:17:56,553 INFO L136 BoogieDeclarations]: Found implementation of procedure f_22_get
[2018-02-04 04:17:56,553 INFO L136 BoogieDeclarations]: Found implementation of procedure f_22_put
[2018-02-04 04:17:56,553 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point
[2018-02-04 04:17:56,553 INFO L136 BoogieDeclarations]: Found implementation of procedure main
[2018-02-04 04:17:56,553 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$
[2018-02-04 04:17:56,553 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$
[2018-02-04 04:17:56,553 INFO L128 BoogieDeclarations]: Found specification of procedure write~int
[2018-02-04 04:17:56,553 INFO L128 BoogieDeclarations]: Found specification of procedure read~int
[2018-02-04 04:17:56,553 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free
[2018-02-04 04:17:56,554 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc
[2018-02-04 04:17:56,554 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc
[2018-02-04 04:17:56,554 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset
[2018-02-04 04:17:56,554 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset
[2018-02-04 04:17:56,554 INFO L128 BoogieDeclarations]: Found specification of procedure malloc
[2018-02-04 04:17:56,554 INFO L128 BoogieDeclarations]: Found specification of procedure free
[2018-02-04 04:17:56,554 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int
[2018-02-04 04:17:56,554 INFO L128 BoogieDeclarations]: Found specification of procedure memset
[2018-02-04 04:17:56,554 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc
[2018-02-04 04:17:56,554 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD
[2018-02-04 04:17:56,554 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return
[2018-02-04 04:17:56,554 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return
[2018-02-04 04:17:56,554 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub
[2018-02-04 04:17:56,555 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID
[2018-02-04 04:17:56,555 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init
[2018-02-04 04:17:56,555 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get
[2018-02-04 04:17:56,555 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put
[2018-02-04 04:17:56,555 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup
[2018-02-04 04:17:56,555 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release
[2018-02-04 04:17:56,555 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put
[2018-02-04 04:17:56,555 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get
[2018-02-04 04:17:56,555 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal
[2018-02-04 04:17:56,555 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init
[2018-02-04 04:17:56,555 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create
[2018-02-04 04:17:56,555 INFO L128 BoogieDeclarations]: Found specification of procedure f_22_get
[2018-02-04 04:17:56,555 INFO L128 BoogieDeclarations]: Found specification of procedure f_22_put
[2018-02-04 04:17:56,555 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point
[2018-02-04 04:17:56,555 INFO L128 BoogieDeclarations]: Found specification of procedure main
[2018-02-04 04:17:56,555 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init
[2018-02-04 04:17:56,555 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2018-02-04 04:17:56,756 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2018-02-04 04:17:56,862 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2018-02-04 04:17:56,862 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 04:17:56 BoogieIcfgContainer
[2018-02-04 04:17:56,862 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2018-02-04 04:17:56,863 INFO L113 PluginConnector]: ------------------------TraceAbstraction----------------------------
[2018-02-04 04:17:56,863 INFO L271 PluginConnector]: Initializing TraceAbstraction...
[2018-02-04 04:17:56,866 INFO L276 PluginConnector]: TraceAbstraction initialized
[2018-02-04 04:17:56,866 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 04.02 04:17:56" (1/3) ...
[2018-02-04 04:17:56,867 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6252fe68 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 04:17:56, skipping insertion in model container
[2018-02-04 04:17:56,867 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:17:56" (2/3) ...
[2018-02-04 04:17:56,867 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6252fe68 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 04:17:56, skipping insertion in model container
[2018-02-04 04:17:56,868 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 04:17:56" (3/3) ...
[2018-02-04 04:17:56,869 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_3_true-valid-memsafety_true-termination.i
[2018-02-04 04:17:56,875 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION
[2018-02-04 04:17:56,880 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations.
[2018-02-04 04:17:56,903 INFO L322 AbstractCegarLoop]: Interprodecural is true
[2018-02-04 04:17:56,903 INFO L323 AbstractCegarLoop]: Hoare is false
[2018-02-04 04:17:56,903 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP
[2018-02-04 04:17:56,903 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK
[2018-02-04 04:17:56,903 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2018-02-04 04:17:56,903 INFO L327 AbstractCegarLoop]: Difference is false
[2018-02-04 04:17:56,903 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA
[2018-02-04 04:17:56,903 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce========
[2018-02-04 04:17:56,904 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure
[2018-02-04 04:17:56,914 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states.
[2018-02-04 04:17:56,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18
[2018-02-04 04:17:56,921 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:17:56,922 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:17:56,922 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:17:56,924 INFO L82 PathProgramCache]: Analyzing trace with hash 1245228870, now seen corresponding path program 1 times
[2018-02-04 04:17:56,925 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:17:56,926 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:17:56,958 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:56,959 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:17:56,959 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:56,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:17:56,996 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:17:57,162 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:17:57,164 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:17:57,164 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2018-02-04 04:17:57,165 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states
[2018-02-04 04:17:57,173 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2018-02-04 04:17:57,173 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2018-02-04 04:17:57,175 INFO L87 Difference]: Start difference. First operand 151 states. Second operand 5 states.
[2018-02-04 04:17:57,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:17:57,220 INFO L93 Difference]: Finished difference Result 157 states and 166 transitions.
[2018-02-04 04:17:57,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states.
[2018-02-04 04:17:57,221 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17
[2018-02-04 04:17:57,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:17:57,231 INFO L225 Difference]: With dead ends: 157
[2018-02-04 04:17:57,231 INFO L226 Difference]: Without dead ends: 154
[2018-02-04 04:17:57,232 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2018-02-04 04:17:57,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states.
[2018-02-04 04:17:57,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 152.
[2018-02-04 04:17:57,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states.
[2018-02-04 04:17:57,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 161 transitions.
[2018-02-04 04:17:57,266 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 161 transitions. Word has length 17
[2018-02-04 04:17:57,266 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:17:57,266 INFO L432 AbstractCegarLoop]: Abstraction has 152 states and 161 transitions.
[2018-02-04 04:17:57,267 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states.
[2018-02-04 04:17:57,267 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 161 transitions.
[2018-02-04 04:17:57,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20
[2018-02-04 04:17:57,267 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:17:57,267 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:17:57,268 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:17:57,268 INFO L82 PathProgramCache]: Analyzing trace with hash -1572748952, now seen corresponding path program 1 times
[2018-02-04 04:17:57,268 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:17:57,268 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:17:57,269 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:57,269 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:17:57,270 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:57,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:17:57,289 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:17:57,329 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:17:57,330 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:17:57,330 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2018-02-04 04:17:57,331 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-02-04 04:17:57,331 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-02-04 04:17:57,331 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2018-02-04 04:17:57,331 INFO L87 Difference]: Start difference. First operand 152 states and 161 transitions. Second operand 6 states.
[2018-02-04 04:17:57,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:17:57,477 INFO L93 Difference]: Finished difference Result 153 states and 162 transitions.
[2018-02-04 04:17:57,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-02-04 04:17:57,477 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19
[2018-02-04 04:17:57,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:17:57,479 INFO L225 Difference]: With dead ends: 153
[2018-02-04 04:17:57,479 INFO L226 Difference]: Without dead ends: 153
[2018-02-04 04:17:57,479 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42
[2018-02-04 04:17:57,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states.
[2018-02-04 04:17:57,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 151.
[2018-02-04 04:17:57,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states.
[2018-02-04 04:17:57,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 160 transitions.
[2018-02-04 04:17:57,488 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 160 transitions. Word has length 19
[2018-02-04 04:17:57,488 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:17:57,488 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 160 transitions.
[2018-02-04 04:17:57,488 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-02-04 04:17:57,488 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 160 transitions.
[2018-02-04 04:17:57,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20
[2018-02-04 04:17:57,488 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:17:57,488 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:17:57,488 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:17:57,488 INFO L82 PathProgramCache]: Analyzing trace with hash -1572748951, now seen corresponding path program 1 times
[2018-02-04 04:17:57,489 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:17:57,489 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:17:57,490 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:57,490 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:17:57,490 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:57,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:17:57,509 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:17:57,641 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:17:57,642 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:17:57,642 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2018-02-04 04:17:57,642 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states
[2018-02-04 04:17:57,642 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2018-02-04 04:17:57,642 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2018-02-04 04:17:57,643 INFO L87 Difference]: Start difference. First operand 151 states and 160 transitions. Second operand 7 states.
[2018-02-04 04:17:57,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:17:57,850 INFO L93 Difference]: Finished difference Result 152 states and 161 transitions.
[2018-02-04 04:17:57,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states.
[2018-02-04 04:17:57,851 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19
[2018-02-04 04:17:57,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:17:57,852 INFO L225 Difference]: With dead ends: 152
[2018-02-04 04:17:57,853 INFO L226 Difference]: Without dead ends: 152
[2018-02-04 04:17:57,853 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72
[2018-02-04 04:17:57,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states.
[2018-02-04 04:17:57,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 150.
[2018-02-04 04:17:57,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states.
[2018-02-04 04:17:57,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 159 transitions.
[2018-02-04 04:17:57,861 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 159 transitions. Word has length 19
[2018-02-04 04:17:57,861 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:17:57,861 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 159 transitions.
[2018-02-04 04:17:57,861 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states.
[2018-02-04 04:17:57,861 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 159 transitions.
[2018-02-04 04:17:57,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30
[2018-02-04 04:17:57,862 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:17:57,862 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:17:57,862 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:17:57,862 INFO L82 PathProgramCache]: Analyzing trace with hash -336004596, now seen corresponding path program 1 times
[2018-02-04 04:17:57,862 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:17:57,862 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:17:57,864 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:57,864 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:17:57,864 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:57,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:17:57,876 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:17:57,950 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:17:57,950 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:17:57,950 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9
[2018-02-04 04:17:57,950 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states
[2018-02-04 04:17:57,950 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants.
[2018-02-04 04:17:57,950 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72
[2018-02-04 04:17:57,951 INFO L87 Difference]: Start difference. First operand 150 states and 159 transitions. Second operand 9 states.
[2018-02-04 04:17:58,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:17:58,029 INFO L93 Difference]: Finished difference Result 171 states and 182 transitions.
[2018-02-04 04:17:58,029 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states.
[2018-02-04 04:17:58,029 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29
[2018-02-04 04:17:58,029 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:17:58,031 INFO L225 Difference]: With dead ends: 171
[2018-02-04 04:17:58,031 INFO L226 Difference]: Without dead ends: 171
[2018-02-04 04:17:58,031 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110
[2018-02-04 04:17:58,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states.
[2018-02-04 04:17:58,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 164.
[2018-02-04 04:17:58,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states.
[2018-02-04 04:17:58,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 173 transitions.
[2018-02-04 04:17:58,048 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 173 transitions. Word has length 29
[2018-02-04 04:17:58,048 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:17:58,048 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 173 transitions.
[2018-02-04 04:17:58,048 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states.
[2018-02-04 04:17:58,048 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 173 transitions.
[2018-02-04 04:17:58,049 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35
[2018-02-04 04:17:58,049 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:17:58,049 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:17:58,049 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:17:58,050 INFO L82 PathProgramCache]: Analyzing trace with hash 610577100, now seen corresponding path program 1 times
[2018-02-04 04:17:58,050 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:17:58,050 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:17:58,051 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:58,051 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:17:58,051 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:58,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:17:58,064 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:17:58,129 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:17:58,129 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:17:58,129 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9
[2018-02-04 04:17:58,129 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states
[2018-02-04 04:17:58,130 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2018-02-04 04:17:58,130 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90
[2018-02-04 04:17:58,130 INFO L87 Difference]: Start difference. First operand 164 states and 173 transitions. Second operand 10 states.
[2018-02-04 04:17:58,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:17:58,313 INFO L93 Difference]: Finished difference Result 163 states and 172 transitions.
[2018-02-04 04:17:58,313 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states.
[2018-02-04 04:17:58,313 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34
[2018-02-04 04:17:58,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:17:58,314 INFO L225 Difference]: With dead ends: 163
[2018-02-04 04:17:58,314 INFO L226 Difference]: Without dead ends: 163
[2018-02-04 04:17:58,314 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156
[2018-02-04 04:17:58,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states.
[2018-02-04 04:17:58,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163.
[2018-02-04 04:17:58,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states.
[2018-02-04 04:17:58,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 172 transitions.
[2018-02-04 04:17:58,326 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 172 transitions. Word has length 34
[2018-02-04 04:17:58,327 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:17:58,327 INFO L432 AbstractCegarLoop]: Abstraction has 163 states and 172 transitions.
[2018-02-04 04:17:58,327 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states.
[2018-02-04 04:17:58,327 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 172 transitions.
[2018-02-04 04:17:58,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35
[2018-02-04 04:17:58,328 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:17:58,328 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:17:58,328 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:17:58,328 INFO L82 PathProgramCache]: Analyzing trace with hash 610577101, now seen corresponding path program 1 times
[2018-02-04 04:17:58,328 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:17:58,328 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:17:58,330 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:58,330 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:17:58,330 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:58,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:17:58,343 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:17:58,364 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:17:58,364 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:17:58,365 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2018-02-04 04:17:58,365 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states
[2018-02-04 04:17:58,365 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2018-02-04 04:17:58,365 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2018-02-04 04:17:58,365 INFO L87 Difference]: Start difference. First operand 163 states and 172 transitions. Second operand 4 states.
[2018-02-04 04:17:58,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:17:58,377 INFO L93 Difference]: Finished difference Result 166 states and 175 transitions.
[2018-02-04 04:17:58,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2018-02-04 04:17:58,378 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34
[2018-02-04 04:17:58,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:17:58,379 INFO L225 Difference]: With dead ends: 166
[2018-02-04 04:17:58,379 INFO L226 Difference]: Without dead ends: 164
[2018-02-04 04:17:58,379 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2018-02-04 04:17:58,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states.
[2018-02-04 04:17:58,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 164.
[2018-02-04 04:17:58,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states.
[2018-02-04 04:17:58,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 173 transitions.
[2018-02-04 04:17:58,386 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 173 transitions. Word has length 34
[2018-02-04 04:17:58,386 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:17:58,386 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 173 transitions.
[2018-02-04 04:17:58,386 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states.
[2018-02-04 04:17:58,386 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 173 transitions.
[2018-02-04 04:17:58,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36
[2018-02-04 04:17:58,387 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:17:58,387 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:17:58,388 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:17:58,388 INFO L82 PathProgramCache]: Analyzing trace with hash -838244594, now seen corresponding path program 1 times
[2018-02-04 04:17:58,388 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:17:58,388 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:17:58,389 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:58,389 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:17:58,389 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:58,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:17:58,402 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:17:58,425 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:17:58,425 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:17:58,426 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:17:58,427 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:17:58,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:17:58,455 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:17:58,485 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:17:58,485 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 04:17:58,486 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6
[2018-02-04 04:17:58,486 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-02-04 04:17:58,486 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-02-04 04:17:58,486 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30
[2018-02-04 04:17:58,487 INFO L87 Difference]: Start difference. First operand 164 states and 173 transitions. Second operand 6 states.
[2018-02-04 04:17:58,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:17:58,506 INFO L93 Difference]: Finished difference Result 167 states and 176 transitions.
[2018-02-04 04:17:58,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states.
[2018-02-04 04:17:58,508 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35
[2018-02-04 04:17:58,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:17:58,509 INFO L225 Difference]: With dead ends: 167
[2018-02-04 04:17:58,509 INFO L226 Difference]: Without dead ends: 165
[2018-02-04 04:17:58,510 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42
[2018-02-04 04:17:58,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states.
[2018-02-04 04:17:58,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 165.
[2018-02-04 04:17:58,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states.
[2018-02-04 04:17:58,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 174 transitions.
[2018-02-04 04:17:58,522 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 174 transitions. Word has length 35
[2018-02-04 04:17:58,522 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:17:58,522 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 174 transitions.
[2018-02-04 04:17:58,523 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-02-04 04:17:58,523 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 174 transitions.
[2018-02-04 04:17:58,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37
[2018-02-04 04:17:58,524 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:17:58,524 INFO L351 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:17:58,524 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:17:58,524 INFO L82 PathProgramCache]: Analyzing trace with hash 1492923117, now seen corresponding path program 2 times
[2018-02-04 04:17:58,524 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:17:58,524 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:17:58,525 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:58,525 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:17:58,525 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:58,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:17:58,536 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:17:58,566 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:17:58,566 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:17:58,567 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:17:58,568 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1
[2018-02-04 04:17:58,595 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2018-02-04 04:17:58,595 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat
[2018-02-04 04:17:58,599 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:17:58,629 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13
[2018-02-04 04:17:58,631 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-02-04 04:17:58,641 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16
[2018-02-04 04:17:58,642 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-02-04 04:17:58,649 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts.
[2018-02-04 04:17:58,649 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:30
[2018-02-04 04:17:58,843 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked.
[2018-02-04 04:17:58,843 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences.
[2018-02-04 04:17:58,843 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [6] total 20
[2018-02-04 04:17:58,844 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states
[2018-02-04 04:17:58,844 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants.
[2018-02-04 04:17:58,844 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=329, Unknown=0, NotChecked=0, Total=380
[2018-02-04 04:17:58,845 INFO L87 Difference]: Start difference. First operand 165 states and 174 transitions. Second operand 20 states.
[2018-02-04 04:17:59,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:17:59,584 INFO L93 Difference]: Finished difference Result 243 states and 255 transitions.
[2018-02-04 04:17:59,585 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states.
[2018-02-04 04:17:59,585 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 36
[2018-02-04 04:17:59,586 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:17:59,586 INFO L225 Difference]: With dead ends: 243
[2018-02-04 04:17:59,586 INFO L226 Difference]: Without dead ends: 241
[2018-02-04 04:17:59,587 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=104, Invalid=708, Unknown=0, NotChecked=0, Total=812
[2018-02-04 04:17:59,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 241 states.
[2018-02-04 04:17:59,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 241 to 165.
[2018-02-04 04:17:59,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states.
[2018-02-04 04:17:59,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 174 transitions.
[2018-02-04 04:17:59,592 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 174 transitions. Word has length 36
[2018-02-04 04:17:59,592 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:17:59,592 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 174 transitions.
[2018-02-04 04:17:59,593 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states.
[2018-02-04 04:17:59,593 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 174 transitions.
[2018-02-04 04:17:59,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43
[2018-02-04 04:17:59,594 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:17:59,594 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:17:59,595 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:17:59,595 INFO L82 PathProgramCache]: Analyzing trace with hash 278126369, now seen corresponding path program 1 times
[2018-02-04 04:17:59,595 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:17:59,595 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:17:59,596 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:59,596 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2018-02-04 04:17:59,596 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:59,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:17:59,605 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:17:59,677 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:17:59,677 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:17:59,677 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9
[2018-02-04 04:17:59,677 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states
[2018-02-04 04:17:59,677 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants.
[2018-02-04 04:17:59,678 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72
[2018-02-04 04:17:59,678 INFO L87 Difference]: Start difference. First operand 165 states and 174 transitions. Second operand 9 states.
[2018-02-04 04:17:59,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:17:59,739 INFO L93 Difference]: Finished difference Result 179 states and 190 transitions.
[2018-02-04 04:17:59,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states.
[2018-02-04 04:17:59,739 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 42
[2018-02-04 04:17:59,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:17:59,741 INFO L225 Difference]: With dead ends: 179
[2018-02-04 04:17:59,741 INFO L226 Difference]: Without dead ends: 179
[2018-02-04 04:17:59,741 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110
[2018-02-04 04:17:59,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states.
[2018-02-04 04:17:59,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 175.
[2018-02-04 04:17:59,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states.
[2018-02-04 04:17:59,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 185 transitions.
[2018-02-04 04:17:59,747 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 185 transitions. Word has length 42
[2018-02-04 04:17:59,747 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:17:59,747 INFO L432 AbstractCegarLoop]: Abstraction has 175 states and 185 transitions.
[2018-02-04 04:17:59,747 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states.
[2018-02-04 04:17:59,747 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 185 transitions.
[2018-02-04 04:17:59,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43
[2018-02-04 04:17:59,749 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:17:59,749 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:17:59,749 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:17:59,749 INFO L82 PathProgramCache]: Analyzing trace with hash 2131974142, now seen corresponding path program 1 times
[2018-02-04 04:17:59,749 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:17:59,749 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:17:59,750 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:59,750 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:17:59,750 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:59,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:17:59,762 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:17:59,825 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked.
[2018-02-04 04:17:59,826 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:17:59,826 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9
[2018-02-04 04:17:59,826 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states
[2018-02-04 04:17:59,827 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2018-02-04 04:17:59,827 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90
[2018-02-04 04:17:59,827 INFO L87 Difference]: Start difference. First operand 175 states and 185 transitions. Second operand 10 states.
[2018-02-04 04:17:59,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:17:59,979 INFO L93 Difference]: Finished difference Result 173 states and 183 transitions.
[2018-02-04 04:17:59,979 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states.
[2018-02-04 04:17:59,979 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42
[2018-02-04 04:17:59,979 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:17:59,980 INFO L225 Difference]: With dead ends: 173
[2018-02-04 04:17:59,980 INFO L226 Difference]: Without dead ends: 173
[2018-02-04 04:17:59,981 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156
[2018-02-04 04:17:59,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states.
[2018-02-04 04:17:59,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 173.
[2018-02-04 04:17:59,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states.
[2018-02-04 04:17:59,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 183 transitions.
[2018-02-04 04:17:59,985 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 183 transitions. Word has length 42
[2018-02-04 04:17:59,986 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:17:59,986 INFO L432 AbstractCegarLoop]: Abstraction has 173 states and 183 transitions.
[2018-02-04 04:17:59,986 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states.
[2018-02-04 04:17:59,986 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 183 transitions.
[2018-02-04 04:17:59,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43
[2018-02-04 04:17:59,987 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:17:59,987 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:17:59,987 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:17:59,987 INFO L82 PathProgramCache]: Analyzing trace with hash 2131974143, now seen corresponding path program 1 times
[2018-02-04 04:17:59,987 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:17:59,987 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:17:59,988 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:59,988 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:17:59,988 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:17:59,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:17:59,999 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:00,032 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:18:00,032 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:18:00,032 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:18:00,033 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:00,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:00,044 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:18:00,051 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:18:00,051 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 04:18:00,052 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8
[2018-02-04 04:18:00,052 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states
[2018-02-04 04:18:00,052 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2018-02-04 04:18:00,053 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56
[2018-02-04 04:18:00,053 INFO L87 Difference]: Start difference. First operand 173 states and 183 transitions. Second operand 8 states.
[2018-02-04 04:18:00,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:00,069 INFO L93 Difference]: Finished difference Result 176 states and 186 transitions.
[2018-02-04 04:18:00,069 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states.
[2018-02-04 04:18:00,070 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42
[2018-02-04 04:18:00,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:00,070 INFO L225 Difference]: With dead ends: 176
[2018-02-04 04:18:00,070 INFO L226 Difference]: Without dead ends: 174
[2018-02-04 04:18:00,071 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72
[2018-02-04 04:18:00,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states.
[2018-02-04 04:18:00,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 174.
[2018-02-04 04:18:00,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states.
[2018-02-04 04:18:00,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 184 transitions.
[2018-02-04 04:18:00,075 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 184 transitions. Word has length 42
[2018-02-04 04:18:00,075 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:00,075 INFO L432 AbstractCegarLoop]: Abstraction has 174 states and 184 transitions.
[2018-02-04 04:18:00,076 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states.
[2018-02-04 04:18:00,076 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 184 transitions.
[2018-02-04 04:18:00,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44
[2018-02-04 04:18:00,076 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:00,077 INFO L351 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:00,077 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:00,077 INFO L82 PathProgramCache]: Analyzing trace with hash 731661120, now seen corresponding path program 2 times
[2018-02-04 04:18:00,077 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:00,077 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:00,078 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:00,078 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:00,078 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:00,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:00,087 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:00,122 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:18:00,122 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:18:00,122 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:18:00,123 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1
[2018-02-04 04:18:00,137 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2018-02-04 04:18:00,138 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat
[2018-02-04 04:18:00,142 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:18:00,164 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16
[2018-02-04 04:18:00,164 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-02-04 04:18:00,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19
[2018-02-04 04:18:00,180 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-02-04 04:18:00,205 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts.
[2018-02-04 04:18:00,205 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36
[2018-02-04 04:18:00,472 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked.
[2018-02-04 04:18:00,472 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences.
[2018-02-04 04:18:00,472 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22
[2018-02-04 04:18:00,473 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states
[2018-02-04 04:18:00,473 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants.
[2018-02-04 04:18:00,473 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=400, Unknown=0, NotChecked=0, Total=462
[2018-02-04 04:18:00,473 INFO L87 Difference]: Start difference. First operand 174 states and 184 transitions. Second operand 22 states.
[2018-02-04 04:18:01,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:01,050 INFO L93 Difference]: Finished difference Result 203 states and 213 transitions.
[2018-02-04 04:18:01,050 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states.
[2018-02-04 04:18:01,050 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 43
[2018-02-04 04:18:01,051 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:01,051 INFO L225 Difference]: With dead ends: 203
[2018-02-04 04:18:01,051 INFO L226 Difference]: Without dead ends: 201
[2018-02-04 04:18:01,052 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 28 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=139, Invalid=917, Unknown=0, NotChecked=0, Total=1056
[2018-02-04 04:18:01,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states.
[2018-02-04 04:18:01,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 173.
[2018-02-04 04:18:01,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states.
[2018-02-04 04:18:01,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 183 transitions.
[2018-02-04 04:18:01,057 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 183 transitions. Word has length 43
[2018-02-04 04:18:01,058 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:01,058 INFO L432 AbstractCegarLoop]: Abstraction has 173 states and 183 transitions.
[2018-02-04 04:18:01,058 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states.
[2018-02-04 04:18:01,058 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 183 transitions.
[2018-02-04 04:18:01,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48
[2018-02-04 04:18:01,059 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:01,059 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:01,059 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:01,059 INFO L82 PathProgramCache]: Analyzing trace with hash 689381786, now seen corresponding path program 1 times
[2018-02-04 04:18:01,059 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:01,059 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:01,060 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:01,061 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2018-02-04 04:18:01,061 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:01,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:01,068 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:01,089 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked.
[2018-02-04 04:18:01,090 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:18:01,090 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2018-02-04 04:18:01,090 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states
[2018-02-04 04:18:01,091 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2018-02-04 04:18:01,091 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2018-02-04 04:18:01,091 INFO L87 Difference]: Start difference. First operand 173 states and 183 transitions. Second operand 3 states.
[2018-02-04 04:18:01,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:01,300 INFO L93 Difference]: Finished difference Result 192 states and 205 transitions.
[2018-02-04 04:18:01,300 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states.
[2018-02-04 04:18:01,300 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 47
[2018-02-04 04:18:01,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:01,301 INFO L225 Difference]: With dead ends: 192
[2018-02-04 04:18:01,301 INFO L226 Difference]: Without dead ends: 179
[2018-02-04 04:18:01,301 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2018-02-04 04:18:01,302 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states.
[2018-02-04 04:18:01,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 169.
[2018-02-04 04:18:01,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states.
[2018-02-04 04:18:01,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 178 transitions.
[2018-02-04 04:18:01,307 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 178 transitions. Word has length 47
[2018-02-04 04:18:01,307 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:01,307 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 178 transitions.
[2018-02-04 04:18:01,308 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states.
[2018-02-04 04:18:01,308 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 178 transitions.
[2018-02-04 04:18:01,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50
[2018-02-04 04:18:01,308 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:01,308 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:01,309 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:01,309 INFO L82 PathProgramCache]: Analyzing trace with hash 2000778853, now seen corresponding path program 1 times
[2018-02-04 04:18:01,309 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:01,309 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:01,310 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:01,310 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:01,310 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:01,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:01,320 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:01,397 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked.
[2018-02-04 04:18:01,397 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:18:01,397 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8
[2018-02-04 04:18:01,397 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states
[2018-02-04 04:18:01,398 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2018-02-04 04:18:01,398 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56
[2018-02-04 04:18:01,398 INFO L87 Difference]: Start difference. First operand 169 states and 178 transitions. Second operand 8 states.
[2018-02-04 04:18:01,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:01,430 INFO L93 Difference]: Finished difference Result 147 states and 153 transitions.
[2018-02-04 04:18:01,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states.
[2018-02-04 04:18:01,431 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 49
[2018-02-04 04:18:01,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:01,431 INFO L225 Difference]: With dead ends: 147
[2018-02-04 04:18:01,431 INFO L226 Difference]: Without dead ends: 145
[2018-02-04 04:18:01,432 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90
[2018-02-04 04:18:01,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states.
[2018-02-04 04:18:01,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 145.
[2018-02-04 04:18:01,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states.
[2018-02-04 04:18:01,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 151 transitions.
[2018-02-04 04:18:01,436 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 151 transitions. Word has length 49
[2018-02-04 04:18:01,436 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:01,436 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 151 transitions.
[2018-02-04 04:18:01,436 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states.
[2018-02-04 04:18:01,437 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 151 transitions.
[2018-02-04 04:18:01,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55
[2018-02-04 04:18:01,437 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:01,437 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:01,438 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:01,438 INFO L82 PathProgramCache]: Analyzing trace with hash 2066481475, now seen corresponding path program 1 times
[2018-02-04 04:18:01,438 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:01,438 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:01,439 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:01,439 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:01,439 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:01,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:01,449 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:01,497 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked.
[2018-02-04 04:18:01,498 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:18:01,498 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10
[2018-02-04 04:18:01,498 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states
[2018-02-04 04:18:01,498 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2018-02-04 04:18:01,498 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90
[2018-02-04 04:18:01,498 INFO L87 Difference]: Start difference. First operand 145 states and 151 transitions. Second operand 10 states.
[2018-02-04 04:18:01,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:01,535 INFO L93 Difference]: Finished difference Result 149 states and 154 transitions.
[2018-02-04 04:18:01,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states.
[2018-02-04 04:18:01,539 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 54
[2018-02-04 04:18:01,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:01,539 INFO L225 Difference]: With dead ends: 149
[2018-02-04 04:18:01,540 INFO L226 Difference]: Without dead ends: 145
[2018-02-04 04:18:01,540 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156
[2018-02-04 04:18:01,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states.
[2018-02-04 04:18:01,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 145.
[2018-02-04 04:18:01,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states.
[2018-02-04 04:18:01,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 150 transitions.
[2018-02-04 04:18:01,544 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 150 transitions. Word has length 54
[2018-02-04 04:18:01,544 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:01,545 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 150 transitions.
[2018-02-04 04:18:01,545 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states.
[2018-02-04 04:18:01,545 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 150 transitions.
[2018-02-04 04:18:01,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66
[2018-02-04 04:18:01,545 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:01,546 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:01,546 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:01,546 INFO L82 PathProgramCache]: Analyzing trace with hash 1850180082, now seen corresponding path program 1 times
[2018-02-04 04:18:01,546 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:01,546 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:01,547 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:01,547 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:01,547 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:01,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:01,560 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:01,681 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked.
[2018-02-04 04:18:01,681 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:18:01,682 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14
[2018-02-04 04:18:01,682 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states
[2018-02-04 04:18:01,682 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants.
[2018-02-04 04:18:01,682 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210
[2018-02-04 04:18:01,683 INFO L87 Difference]: Start difference. First operand 145 states and 150 transitions. Second operand 15 states.
[2018-02-04 04:18:01,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:01,940 INFO L93 Difference]: Finished difference Result 143 states and 148 transitions.
[2018-02-04 04:18:01,941 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states.
[2018-02-04 04:18:01,941 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 65
[2018-02-04 04:18:01,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:01,941 INFO L225 Difference]: With dead ends: 143
[2018-02-04 04:18:01,941 INFO L226 Difference]: Without dead ends: 143
[2018-02-04 04:18:01,942 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=47, Invalid=333, Unknown=0, NotChecked=0, Total=380
[2018-02-04 04:18:01,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states.
[2018-02-04 04:18:01,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143.
[2018-02-04 04:18:01,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states.
[2018-02-04 04:18:01,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 148 transitions.
[2018-02-04 04:18:01,944 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 148 transitions. Word has length 65
[2018-02-04 04:18:01,945 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:01,945 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 148 transitions.
[2018-02-04 04:18:01,945 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states.
[2018-02-04 04:18:01,945 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 148 transitions.
[2018-02-04 04:18:01,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66
[2018-02-04 04:18:01,945 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:01,946 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:01,946 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:01,946 INFO L82 PathProgramCache]: Analyzing trace with hash 1850180083, now seen corresponding path program 1 times
[2018-02-04 04:18:01,946 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:01,946 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:01,947 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:01,947 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:01,947 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:01,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:01,961 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:02,046 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:18:02,047 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:18:02,047 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:18:02,047 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:02,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:02,063 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:18:02,127 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:18:02,128 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 04:18:02,128 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10
[2018-02-04 04:18:02,128 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states
[2018-02-04 04:18:02,128 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2018-02-04 04:18:02,129 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90
[2018-02-04 04:18:02,129 INFO L87 Difference]: Start difference. First operand 143 states and 148 transitions. Second operand 10 states.
[2018-02-04 04:18:02,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:02,169 INFO L93 Difference]: Finished difference Result 146 states and 151 transitions.
[2018-02-04 04:18:02,171 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states.
[2018-02-04 04:18:02,171 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 65
[2018-02-04 04:18:02,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:02,172 INFO L225 Difference]: With dead ends: 146
[2018-02-04 04:18:02,172 INFO L226 Difference]: Without dead ends: 144
[2018-02-04 04:18:02,172 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110
[2018-02-04 04:18:02,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states.
[2018-02-04 04:18:02,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 144.
[2018-02-04 04:18:02,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states.
[2018-02-04 04:18:02,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 149 transitions.
[2018-02-04 04:18:02,176 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 149 transitions. Word has length 65
[2018-02-04 04:18:02,176 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:02,177 INFO L432 AbstractCegarLoop]: Abstraction has 144 states and 149 transitions.
[2018-02-04 04:18:02,177 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states.
[2018-02-04 04:18:02,177 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 149 transitions.
[2018-02-04 04:18:02,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67
[2018-02-04 04:18:02,177 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:02,178 INFO L351 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:02,178 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:02,178 INFO L82 PathProgramCache]: Analyzing trace with hash -1823769198, now seen corresponding path program 2 times
[2018-02-04 04:18:02,178 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:02,178 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:02,179 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:02,179 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:02,179 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:02,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:02,193 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:02,312 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:18:02,312 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:18:02,312 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:18:02,312 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1
[2018-02-04 04:18:02,361 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2018-02-04 04:18:02,362 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat
[2018-02-04 04:18:02,371 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:18:02,448 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19
[2018-02-04 04:18:02,449 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-02-04 04:18:02,460 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16
[2018-02-04 04:18:02,460 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-02-04 04:18:02,469 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts.
[2018-02-04 04:18:02,469 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36
[2018-02-04 04:18:02,816 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked.
[2018-02-04 04:18:02,816 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences.
[2018-02-04 04:18:02,816 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [10] total 29
[2018-02-04 04:18:02,817 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states
[2018-02-04 04:18:02,817 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants.
[2018-02-04 04:18:02,817 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=720, Unknown=0, NotChecked=0, Total=812
[2018-02-04 04:18:02,817 INFO L87 Difference]: Start difference. First operand 144 states and 149 transitions. Second operand 29 states.
[2018-02-04 04:18:04,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:04,075 INFO L93 Difference]: Finished difference Result 145 states and 150 transitions.
[2018-02-04 04:18:04,075 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states.
[2018-02-04 04:18:04,075 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 66
[2018-02-04 04:18:04,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:04,076 INFO L225 Difference]: With dead ends: 145
[2018-02-04 04:18:04,076 INFO L226 Difference]: Without dead ends: 143
[2018-02-04 04:18:04,077 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 295 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=212, Invalid=1680, Unknown=0, NotChecked=0, Total=1892
[2018-02-04 04:18:04,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states.
[2018-02-04 04:18:04,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143.
[2018-02-04 04:18:04,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states.
[2018-02-04 04:18:04,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 148 transitions.
[2018-02-04 04:18:04,080 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 148 transitions. Word has length 66
[2018-02-04 04:18:04,080 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:04,080 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 148 transitions.
[2018-02-04 04:18:04,080 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states.
[2018-02-04 04:18:04,080 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 148 transitions.
[2018-02-04 04:18:04,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81
[2018-02-04 04:18:04,081 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:04,081 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:04,081 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:04,081 INFO L82 PathProgramCache]: Analyzing trace with hash -920668901, now seen corresponding path program 1 times
[2018-02-04 04:18:04,081 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:04,082 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:04,083 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:04,083 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2018-02-04 04:18:04,083 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:04,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:04,100 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:04,184 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked.
[2018-02-04 04:18:04,184 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:18:04,185 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13
[2018-02-04 04:18:04,185 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states
[2018-02-04 04:18:04,185 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants.
[2018-02-04 04:18:04,185 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156
[2018-02-04 04:18:04,185 INFO L87 Difference]: Start difference. First operand 143 states and 148 transitions. Second operand 13 states.
[2018-02-04 04:18:04,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:04,262 INFO L93 Difference]: Finished difference Result 149 states and 153 transitions.
[2018-02-04 04:18:04,262 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states.
[2018-02-04 04:18:04,262 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 80
[2018-02-04 04:18:04,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:04,263 INFO L225 Difference]: With dead ends: 149
[2018-02-04 04:18:04,263 INFO L226 Difference]: Without dead ends: 143
[2018-02-04 04:18:04,263 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272
[2018-02-04 04:18:04,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states.
[2018-02-04 04:18:04,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143.
[2018-02-04 04:18:04,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states.
[2018-02-04 04:18:04,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 147 transitions.
[2018-02-04 04:18:04,267 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 147 transitions. Word has length 80
[2018-02-04 04:18:04,267 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:04,267 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 147 transitions.
[2018-02-04 04:18:04,267 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states.
[2018-02-04 04:18:04,267 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 147 transitions.
[2018-02-04 04:18:04,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94
[2018-02-04 04:18:04,268 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:04,268 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:04,268 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:04,268 INFO L82 PathProgramCache]: Analyzing trace with hash -773057741, now seen corresponding path program 1 times
[2018-02-04 04:18:04,268 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:04,269 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:04,269 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:04,269 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:04,270 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:04,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:04,285 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:04,492 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked.
[2018-02-04 04:18:04,492 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:18:04,492 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21
[2018-02-04 04:18:04,492 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states
[2018-02-04 04:18:04,492 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants.
[2018-02-04 04:18:04,493 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=419, Unknown=0, NotChecked=0, Total=462
[2018-02-04 04:18:04,493 INFO L87 Difference]: Start difference. First operand 143 states and 147 transitions. Second operand 22 states.
[2018-02-04 04:18:04,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:04,860 INFO L93 Difference]: Finished difference Result 170 states and 179 transitions.
[2018-02-04 04:18:04,860 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states.
[2018-02-04 04:18:04,860 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 93
[2018-02-04 04:18:04,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:04,861 INFO L225 Difference]: With dead ends: 170
[2018-02-04 04:18:04,861 INFO L226 Difference]: Without dead ends: 170
[2018-02-04 04:18:04,862 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=75, Invalid=795, Unknown=0, NotChecked=0, Total=870
[2018-02-04 04:18:04,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states.
[2018-02-04 04:18:04,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 165.
[2018-02-04 04:18:04,865 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states.
[2018-02-04 04:18:04,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 175 transitions.
[2018-02-04 04:18:04,866 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 175 transitions. Word has length 93
[2018-02-04 04:18:04,866 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:04,866 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 175 transitions.
[2018-02-04 04:18:04,866 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states.
[2018-02-04 04:18:04,866 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 175 transitions.
[2018-02-04 04:18:04,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94
[2018-02-04 04:18:04,867 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:04,867 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:04,867 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:04,868 INFO L82 PathProgramCache]: Analyzing trace with hash -773057740, now seen corresponding path program 1 times
[2018-02-04 04:18:04,868 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:04,868 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:04,869 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:04,869 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:04,869 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:04,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:04,900 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:04,973 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:18:04,973 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:18:04,973 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:18:04,974 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:04,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:05,001 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:18:05,015 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:18:05,015 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 04:18:05,015 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12
[2018-02-04 04:18:05,016 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states
[2018-02-04 04:18:05,016 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants.
[2018-02-04 04:18:05,016 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132
[2018-02-04 04:18:05,016 INFO L87 Difference]: Start difference. First operand 165 states and 175 transitions. Second operand 12 states.
[2018-02-04 04:18:05,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:05,039 INFO L93 Difference]: Finished difference Result 168 states and 178 transitions.
[2018-02-04 04:18:05,039 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states.
[2018-02-04 04:18:05,039 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 93
[2018-02-04 04:18:05,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:05,040 INFO L225 Difference]: With dead ends: 168
[2018-02-04 04:18:05,041 INFO L226 Difference]: Without dead ends: 166
[2018-02-04 04:18:05,041 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156
[2018-02-04 04:18:05,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states.
[2018-02-04 04:18:05,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 166.
[2018-02-04 04:18:05,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states.
[2018-02-04 04:18:05,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 176 transitions.
[2018-02-04 04:18:05,045 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 176 transitions. Word has length 93
[2018-02-04 04:18:05,045 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:05,045 INFO L432 AbstractCegarLoop]: Abstraction has 166 states and 176 transitions.
[2018-02-04 04:18:05,045 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states.
[2018-02-04 04:18:05,045 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 176 transitions.
[2018-02-04 04:18:05,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95
[2018-02-04 04:18:05,046 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:05,046 INFO L351 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:05,046 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:05,046 INFO L82 PathProgramCache]: Analyzing trace with hash 572029523, now seen corresponding path program 2 times
[2018-02-04 04:18:05,046 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:05,047 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:05,047 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:05,047 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:05,047 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:05,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:05,063 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:05,141 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:18:05,141 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:18:05,141 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:18:05,142 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1
[2018-02-04 04:18:05,172 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2018-02-04 04:18:05,173 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat
[2018-02-04 04:18:05,179 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:18:05,196 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13
[2018-02-04 04:18:05,196 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-02-04 04:18:05,209 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16
[2018-02-04 04:18:05,209 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-02-04 04:18:05,218 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts.
[2018-02-04 04:18:05,219 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:30
[2018-02-04 04:18:05,653 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked.
[2018-02-04 04:18:05,653 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences.
[2018-02-04 04:18:05,654 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [12] total 33
[2018-02-04 04:18:05,654 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states
[2018-02-04 04:18:05,654 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants.
[2018-02-04 04:18:05,654 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=939, Unknown=0, NotChecked=0, Total=1056
[2018-02-04 04:18:05,654 INFO L87 Difference]: Start difference. First operand 166 states and 176 transitions. Second operand 33 states.
[2018-02-04 04:18:06,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:06,587 INFO L93 Difference]: Finished difference Result 167 states and 175 transitions.
[2018-02-04 04:18:06,588 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states.
[2018-02-04 04:18:06,588 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 94
[2018-02-04 04:18:06,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:06,588 INFO L225 Difference]: With dead ends: 167
[2018-02-04 04:18:06,588 INFO L226 Difference]: Without dead ends: 165
[2018-02-04 04:18:06,589 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 71 SyntacticMatches, 3 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 436 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=282, Invalid=2268, Unknown=0, NotChecked=0, Total=2550
[2018-02-04 04:18:06,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states.
[2018-02-04 04:18:06,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 165.
[2018-02-04 04:18:06,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states.
[2018-02-04 04:18:06,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 173 transitions.
[2018-02-04 04:18:06,591 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 173 transitions. Word has length 94
[2018-02-04 04:18:06,591 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:06,592 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 173 transitions.
[2018-02-04 04:18:06,592 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states.
[2018-02-04 04:18:06,592 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 173 transitions.
[2018-02-04 04:18:06,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103
[2018-02-04 04:18:06,592 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:06,592 INFO L351 BasicCegarLoop]: trace histogram [9, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:06,593 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:06,593 INFO L82 PathProgramCache]: Analyzing trace with hash 700888674, now seen corresponding path program 1 times
[2018-02-04 04:18:06,593 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:06,593 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:06,594 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:06,594 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2018-02-04 04:18:06,594 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:06,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:06,607 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:06,700 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked.
[2018-02-04 04:18:06,700 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:18:06,701 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13
[2018-02-04 04:18:06,701 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states
[2018-02-04 04:18:06,701 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants.
[2018-02-04 04:18:06,701 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156
[2018-02-04 04:18:06,701 INFO L87 Difference]: Start difference. First operand 165 states and 173 transitions. Second operand 13 states.
[2018-02-04 04:18:06,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:06,787 INFO L93 Difference]: Finished difference Result 169 states and 175 transitions.
[2018-02-04 04:18:06,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states.
[2018-02-04 04:18:06,788 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 102
[2018-02-04 04:18:06,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:06,789 INFO L225 Difference]: With dead ends: 169
[2018-02-04 04:18:06,789 INFO L226 Difference]: Without dead ends: 163
[2018-02-04 04:18:06,789 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272
[2018-02-04 04:18:06,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states.
[2018-02-04 04:18:06,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163.
[2018-02-04 04:18:06,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states.
[2018-02-04 04:18:06,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 169 transitions.
[2018-02-04 04:18:06,792 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 169 transitions. Word has length 102
[2018-02-04 04:18:06,793 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:06,793 INFO L432 AbstractCegarLoop]: Abstraction has 163 states and 169 transitions.
[2018-02-04 04:18:06,793 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states.
[2018-02-04 04:18:06,793 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 169 transitions.
[2018-02-04 04:18:06,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110
[2018-02-04 04:18:06,793 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:06,794 INFO L351 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:06,794 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:06,794 INFO L82 PathProgramCache]: Analyzing trace with hash 1156968532, now seen corresponding path program 1 times
[2018-02-04 04:18:06,794 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:06,794 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:06,795 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:06,795 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:06,795 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:06,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:06,811 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:07,131 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked.
[2018-02-04 04:18:07,131 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-02-04 04:18:07,131 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24
[2018-02-04 04:18:07,131 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states
[2018-02-04 04:18:07,131 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants.
[2018-02-04 04:18:07,132 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=553, Unknown=0, NotChecked=0, Total=600
[2018-02-04 04:18:07,132 INFO L87 Difference]: Start difference. First operand 163 states and 169 transitions. Second operand 25 states.
[2018-02-04 04:18:07,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:07,620 INFO L93 Difference]: Finished difference Result 173 states and 182 transitions.
[2018-02-04 04:18:07,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states.
[2018-02-04 04:18:07,621 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 109
[2018-02-04 04:18:07,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:07,622 INFO L225 Difference]: With dead ends: 173
[2018-02-04 04:18:07,622 INFO L226 Difference]: Without dead ends: 173
[2018-02-04 04:18:07,622 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=91, Invalid=1169, Unknown=0, NotChecked=0, Total=1260
[2018-02-04 04:18:07,623 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states.
[2018-02-04 04:18:07,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 169.
[2018-02-04 04:18:07,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states.
[2018-02-04 04:18:07,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 179 transitions.
[2018-02-04 04:18:07,626 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 179 transitions. Word has length 109
[2018-02-04 04:18:07,626 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:07,626 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 179 transitions.
[2018-02-04 04:18:07,626 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states.
[2018-02-04 04:18:07,626 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 179 transitions.
[2018-02-04 04:18:07,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110
[2018-02-04 04:18:07,627 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:07,627 INFO L351 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:07,627 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:07,627 INFO L82 PathProgramCache]: Analyzing trace with hash 1156968533, now seen corresponding path program 1 times
[2018-02-04 04:18:07,627 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:07,628 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:07,628 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:07,628 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:07,629 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:07,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:07,644 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:07,729 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:18:07,730 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:18:07,730 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:18:07,730 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:07,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:07,760 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:18:07,776 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:18:07,777 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 04:18:07,777 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14
[2018-02-04 04:18:07,777 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states
[2018-02-04 04:18:07,777 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants.
[2018-02-04 04:18:07,778 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182
[2018-02-04 04:18:07,778 INFO L87 Difference]: Start difference. First operand 169 states and 179 transitions. Second operand 14 states.
[2018-02-04 04:18:07,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:07,804 INFO L93 Difference]: Finished difference Result 172 states and 182 transitions.
[2018-02-04 04:18:07,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states.
[2018-02-04 04:18:07,804 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 109
[2018-02-04 04:18:07,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:07,805 INFO L225 Difference]: With dead ends: 172
[2018-02-04 04:18:07,805 INFO L226 Difference]: Without dead ends: 170
[2018-02-04 04:18:07,806 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210
[2018-02-04 04:18:07,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states.
[2018-02-04 04:18:07,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 170.
[2018-02-04 04:18:07,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states.
[2018-02-04 04:18:07,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 180 transitions.
[2018-02-04 04:18:07,810 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 180 transitions. Word has length 109
[2018-02-04 04:18:07,810 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:07,810 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 180 transitions.
[2018-02-04 04:18:07,810 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states.
[2018-02-04 04:18:07,810 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 180 transitions.
[2018-02-04 04:18:07,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111
[2018-02-04 04:18:07,811 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:07,811 INFO L351 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:07,811 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:07,811 INFO L82 PathProgramCache]: Analyzing trace with hash -637126284, now seen corresponding path program 2 times
[2018-02-04 04:18:07,811 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:07,811 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:07,812 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:07,812 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:07,812 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:07,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:07,828 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:07,953 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:18:07,954 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:18:07,954 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:18:07,956 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1
[2018-02-04 04:18:07,986 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2018-02-04 04:18:07,986 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat
[2018-02-04 04:18:07,994 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:18:08,005 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13
[2018-02-04 04:18:08,005 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-02-04 04:18:08,017 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16
[2018-02-04 04:18:08,017 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-02-04 04:18:08,026 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts.
[2018-02-04 04:18:08,026 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:30
[2018-02-04 04:18:08,666 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked.
[2018-02-04 04:18:08,666 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences.
[2018-02-04 04:18:08,666 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [14] total 39
[2018-02-04 04:18:08,666 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states
[2018-02-04 04:18:08,667 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants.
[2018-02-04 04:18:08,667 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=152, Invalid=1330, Unknown=0, NotChecked=0, Total=1482
[2018-02-04 04:18:08,667 INFO L87 Difference]: Start difference. First operand 170 states and 180 transitions. Second operand 39 states.
[2018-02-04 04:18:09,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:09,902 INFO L93 Difference]: Finished difference Result 171 states and 180 transitions.
[2018-02-04 04:18:09,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states.
[2018-02-04 04:18:09,902 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 110
[2018-02-04 04:18:09,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:09,903 INFO L225 Difference]: With dead ends: 171
[2018-02-04 04:18:09,903 INFO L226 Difference]: Without dead ends: 169
[2018-02-04 04:18:09,904 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 81 SyntacticMatches, 5 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 660 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=375, Invalid=3285, Unknown=0, NotChecked=0, Total=3660
[2018-02-04 04:18:09,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states.
[2018-02-04 04:18:09,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 169.
[2018-02-04 04:18:09,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states.
[2018-02-04 04:18:09,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 178 transitions.
[2018-02-04 04:18:09,906 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 178 transitions. Word has length 110
[2018-02-04 04:18:09,906 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:09,906 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 178 transitions.
[2018-02-04 04:18:09,906 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states.
[2018-02-04 04:18:09,906 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 178 transitions.
[2018-02-04 04:18:09,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116
[2018-02-04 04:18:09,907 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:09,907 INFO L351 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:09,907 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:09,907 INFO L82 PathProgramCache]: Analyzing trace with hash 1817608758, now seen corresponding path program 1 times
[2018-02-04 04:18:09,907 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:09,907 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:09,908 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:09,908 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2018-02-04 04:18:09,908 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:09,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:09,925 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:10,044 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:18:10,044 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:18:10,044 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:18:10,045 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:10,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:10,074 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:18:10,091 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:18:10,091 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 04:18:10,091 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16
[2018-02-04 04:18:10,092 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states
[2018-02-04 04:18:10,092 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants.
[2018-02-04 04:18:10,092 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240
[2018-02-04 04:18:10,092 INFO L87 Difference]: Start difference. First operand 169 states and 178 transitions. Second operand 16 states.
[2018-02-04 04:18:10,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:10,137 INFO L93 Difference]: Finished difference Result 172 states and 181 transitions.
[2018-02-04 04:18:10,137 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states.
[2018-02-04 04:18:10,137 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 115
[2018-02-04 04:18:10,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:10,138 INFO L225 Difference]: With dead ends: 172
[2018-02-04 04:18:10,138 INFO L226 Difference]: Without dead ends: 170
[2018-02-04 04:18:10,139 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272
[2018-02-04 04:18:10,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states.
[2018-02-04 04:18:10,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 170.
[2018-02-04 04:18:10,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states.
[2018-02-04 04:18:10,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 179 transitions.
[2018-02-04 04:18:10,143 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 179 transitions. Word has length 115
[2018-02-04 04:18:10,143 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:10,143 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 179 transitions.
[2018-02-04 04:18:10,143 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states.
[2018-02-04 04:18:10,143 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 179 transitions.
[2018-02-04 04:18:10,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117
[2018-02-04 04:18:10,144 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:10,144 INFO L351 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:10,144 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:10,144 INFO L82 PathProgramCache]: Analyzing trace with hash 70072341, now seen corresponding path program 2 times
[2018-02-04 04:18:10,144 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:10,144 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:10,145 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:10,145 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:10,145 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:10,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:10,161 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:10,291 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-02-04 04:18:10,291 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:18:10,291 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:18:10,292 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1
[2018-02-04 04:18:10,338 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2018-02-04 04:18:10,339 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat
[2018-02-04 04:18:10,346 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:18:10,427 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-02-04 04:18:10,429 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-02-04 04:18:10,429 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-02-04 04:18:10,430 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-02-04 04:18:10,432 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-02-04 04:18:10,432 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7
[2018-02-04 04:18:10,559 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-02-04 04:18:10,561 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-02-04 04:18:10,566 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts.
[2018-02-04 04:18:10,566 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26
[2018-02-04 04:18:10,569 WARN L1033 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true
[2018-02-04 04:18:10,580 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27
[2018-02-04 04:18:10,582 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 04:18:10,586 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35
[2018-02-04 04:18:10,589 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 04:18:10,590 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 04:18:10,594 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37
[2018-02-04 04:18:10,594 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts.
[2018-02-04 04:18:10,601 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-02-04 04:18:10,604 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-02-04 04:18:10,609 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-02-04 04:18:10,610 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9
[2018-02-04 04:18:10,977 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 04:18:10,977 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 28
[2018-02-04 04:18:10,982 INFO L700 Elim1Store]: detected not equals via solver
[2018-02-04 04:18:10,983 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 7
[2018-02-04 04:18:10,983 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-02-04 04:18:10,984 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-02-04 04:18:10,984 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-02-04 04:18:10,985 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:25, output treesize:7
[2018-02-04 04:18:11,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13
[2018-02-04 04:18:11,365 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 10
[2018-02-04 04:18:11,365 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts.
[2018-02-04 04:18:11,367 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts.
[2018-02-04 04:18:11,370 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts.
[2018-02-04 04:18:11,370 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:10
[2018-02-04 04:18:11,643 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked.
[2018-02-04 04:18:11,644 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences.
[2018-02-04 04:18:11,644 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [53] imperfect sequences [16] total 67
[2018-02-04 04:18:11,644 INFO L409 AbstractCegarLoop]: Interpolant automaton has 67 states
[2018-02-04 04:18:11,644 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 67 interpolants.
[2018-02-04 04:18:11,645 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=224, Invalid=4069, Unknown=1, NotChecked=128, Total=4422
[2018-02-04 04:18:11,645 INFO L87 Difference]: Start difference. First operand 170 states and 179 transitions. Second operand 67 states.
[2018-02-04 04:18:13,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:13,986 INFO L93 Difference]: Finished difference Result 175 states and 178 transitions.
[2018-02-04 04:18:13,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states.
[2018-02-04 04:18:13,987 INFO L78 Accepts]: Start accepts. Automaton has 67 states. Word has length 116
[2018-02-04 04:18:13,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:13,987 INFO L225 Difference]: With dead ends: 175
[2018-02-04 04:18:13,987 INFO L226 Difference]: Without dead ends: 164
[2018-02-04 04:18:13,989 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 66 SyntacticMatches, 0 SemanticMatches, 96 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1605 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=384, Invalid=8931, Unknown=1, NotChecked=190, Total=9506
[2018-02-04 04:18:13,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states.
[2018-02-04 04:18:13,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 164.
[2018-02-04 04:18:13,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states.
[2018-02-04 04:18:13,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 167 transitions.
[2018-02-04 04:18:13,991 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 167 transitions. Word has length 116
[2018-02-04 04:18:13,991 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:13,991 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 167 transitions.
[2018-02-04 04:18:13,991 INFO L433 AbstractCegarLoop]: Interpolant automaton has 67 states.
[2018-02-04 04:18:13,991 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 167 transitions.
[2018-02-04 04:18:13,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127
[2018-02-04 04:18:13,992 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:13,992 INFO L351 BasicCegarLoop]: trace histogram [13, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:13,992 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:13,992 INFO L82 PathProgramCache]: Analyzing trace with hash -2129620089, now seen corresponding path program 1 times
[2018-02-04 04:18:13,992 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:13,992 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:13,993 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:13,993 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2018-02-04 04:18:13,993 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:14,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:14,011 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:14,203 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked.
[2018-02-04 04:18:14,203 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:18:14,203 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:18:14,204 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:14,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:14,234 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:18:14,520 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked.
[2018-02-04 04:18:14,521 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 04:18:14,521 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 17] total 36
[2018-02-04 04:18:14,521 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states
[2018-02-04 04:18:14,521 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants.
[2018-02-04 04:18:14,522 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=162, Invalid=1098, Unknown=0, NotChecked=0, Total=1260
[2018-02-04 04:18:14,522 INFO L87 Difference]: Start difference. First operand 164 states and 167 transitions. Second operand 36 states.
[2018-02-04 04:18:15,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:15,559 INFO L93 Difference]: Finished difference Result 179 states and 181 transitions.
[2018-02-04 04:18:15,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states.
[2018-02-04 04:18:15,560 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 126
[2018-02-04 04:18:15,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:15,560 INFO L225 Difference]: With dead ends: 179
[2018-02-04 04:18:15,560 INFO L226 Difference]: Without dead ends: 177
[2018-02-04 04:18:15,561 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 118 SyntacticMatches, 0 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 586 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=492, Invalid=4064, Unknown=0, NotChecked=0, Total=4556
[2018-02-04 04:18:15,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states.
[2018-02-04 04:18:15,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 167.
[2018-02-04 04:18:15,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states.
[2018-02-04 04:18:15,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 169 transitions.
[2018-02-04 04:18:15,564 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 169 transitions. Word has length 126
[2018-02-04 04:18:15,564 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:15,564 INFO L432 AbstractCegarLoop]: Abstraction has 167 states and 169 transitions.
[2018-02-04 04:18:15,564 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states.
[2018-02-04 04:18:15,564 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 169 transitions.
[2018-02-04 04:18:15,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142
[2018-02-04 04:18:15,564 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:15,565 INFO L351 BasicCegarLoop]: trace histogram [14, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:15,565 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:15,565 INFO L82 PathProgramCache]: Analyzing trace with hash 1333200073, now seen corresponding path program 1 times
[2018-02-04 04:18:15,565 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:15,565 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:15,566 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:15,566 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:15,566 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:15,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:15,584 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:15,911 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked.
[2018-02-04 04:18:15,911 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:18:15,911 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:18:15,912 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:15,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:15,948 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:18:16,303 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked.
[2018-02-04 04:18:16,304 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 04:18:16,304 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 18] total 40
[2018-02-04 04:18:16,305 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states
[2018-02-04 04:18:16,305 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants.
[2018-02-04 04:18:16,305 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=182, Invalid=1378, Unknown=0, NotChecked=0, Total=1560
[2018-02-04 04:18:16,305 INFO L87 Difference]: Start difference. First operand 167 states and 169 transitions. Second operand 40 states.
[2018-02-04 04:18:17,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:17,415 INFO L93 Difference]: Finished difference Result 179 states and 181 transitions.
[2018-02-04 04:18:17,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states.
[2018-02-04 04:18:17,415 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 141
[2018-02-04 04:18:17,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:17,416 INFO L225 Difference]: With dead ends: 179
[2018-02-04 04:18:17,416 INFO L226 Difference]: Without dead ends: 177
[2018-02-04 04:18:17,417 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 132 SyntacticMatches, 0 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 633 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=558, Invalid=5142, Unknown=0, NotChecked=0, Total=5700
[2018-02-04 04:18:17,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states.
[2018-02-04 04:18:17,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 167.
[2018-02-04 04:18:17,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states.
[2018-02-04 04:18:17,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 169 transitions.
[2018-02-04 04:18:17,420 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 169 transitions. Word has length 141
[2018-02-04 04:18:17,420 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:17,420 INFO L432 AbstractCegarLoop]: Abstraction has 167 states and 169 transitions.
[2018-02-04 04:18:17,420 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states.
[2018-02-04 04:18:17,420 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 169 transitions.
[2018-02-04 04:18:17,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147
[2018-02-04 04:18:17,420 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:17,420 INFO L351 BasicCegarLoop]: trace histogram [15, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:17,420 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:17,421 INFO L82 PathProgramCache]: Analyzing trace with hash -1992522262, now seen corresponding path program 1 times
[2018-02-04 04:18:17,421 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:17,421 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:17,421 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:17,421 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:17,421 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:17,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:17,436 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:17,594 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 9 proven. 120 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked.
[2018-02-04 04:18:17,595 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-02-04 04:18:17,595 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP
[2018-02-04 04:18:17,596 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:17,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:17,650 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-02-04 04:18:17,671 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked.
[2018-02-04 04:18:17,671 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-02-04 04:18:17,671 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20
[2018-02-04 04:18:17,672 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states
[2018-02-04 04:18:17,672 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants.
[2018-02-04 04:18:17,672 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=207, Unknown=0, NotChecked=0, Total=380
[2018-02-04 04:18:17,672 INFO L87 Difference]: Start difference. First operand 167 states and 169 transitions. Second operand 20 states.
[2018-02-04 04:18:17,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-02-04 04:18:17,713 INFO L93 Difference]: Finished difference Result 170 states and 172 transitions.
[2018-02-04 04:18:17,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states.
[2018-02-04 04:18:17,713 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 146
[2018-02-04 04:18:17,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-02-04 04:18:17,714 INFO L225 Difference]: With dead ends: 170
[2018-02-04 04:18:17,714 INFO L226 Difference]: Without dead ends: 168
[2018-02-04 04:18:17,715 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 146 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=177, Invalid=243, Unknown=0, NotChecked=0, Total=420
[2018-02-04 04:18:17,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states.
[2018-02-04 04:18:17,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 168.
[2018-02-04 04:18:17,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states.
[2018-02-04 04:18:17,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 170 transitions.
[2018-02-04 04:18:17,718 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 170 transitions. Word has length 146
[2018-02-04 04:18:17,718 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-02-04 04:18:17,718 INFO L432 AbstractCegarLoop]: Abstraction has 168 states and 170 transitions.
[2018-02-04 04:18:17,718 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states.
[2018-02-04 04:18:17,718 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 170 transitions.
[2018-02-04 04:18:17,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148
[2018-02-04 04:18:17,719 INFO L343 BasicCegarLoop]: Found error trace
[2018-02-04 04:18:17,720 INFO L351 BasicCegarLoop]: trace histogram [16, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-02-04 04:18:17,720 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]===
[2018-02-04 04:18:17,720 INFO L82 PathProgramCache]: Analyzing trace with hash 903271467, now seen corresponding path program 2 times
[2018-02-04 04:18:17,720 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY
[2018-02-04 04:18:17,720 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy
[2018-02-04 04:18:17,721 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:17,721 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-02-04 04:18:17,721 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-02-04 04:18:17,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-02-04 04:18:17,796 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-02-04 04:18:17,827 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception:
java.lang.UnsupportedOperationException: Unknown lemma type!
at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.walkLeafNode(Interpolator.java:299)
at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.access$1(Interpolator.java:263)
at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator$ProofTreeWalker.walk(Interpolator.java:132)
at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:122)
at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:113)
at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.interpolate(Interpolator.java:220)
at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.getInterpolants(Interpolator.java:201)
at de.uni_freiburg.informatik.ultimate.smtinterpol.smtlib2.SMTInterpol.getInterpolants(SMTInterpol.java:915)
at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.managedscript.ManagedScript.getInterpolants(ManagedScript.java:192)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.NestedInterpolantsBuilder.computeCraigInterpolants(NestedInterpolantsBuilder.java:281)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.NestedInterpolantsBuilder.<init>(NestedInterpolantsBuilder.java:164)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.InterpolatingTraceCheckCraig.computeInterpolantsTree(InterpolatingTraceCheckCraig.java:263)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.InterpolatingTraceCheckCraig.computeInterpolants(InterpolatingTraceCheckCraig.java:199)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.InterpolatingTraceCheckCraig.<init>(InterpolatingTraceCheckCraig.java:106)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructCraig(TraceCheckConstructor.java:222)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:179)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.MultiTrackTraceAbstractionRefinementStrategy.getTraceCheck(MultiTrackTraceAbstractionRefinementStrategy.java:222)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:231)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:205)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.<init>(TraceAbstractionRefinementEngine.java:68)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:397)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:381)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:316)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:292)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:147)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.<init>(TraceAbstractionStarter.java:115)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:119)
at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168)
at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151)
at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128)
at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232)
at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226)
at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142)
at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104)
at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:324)
at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.runToolchainDefault(DefaultToolchainJob.java:221)
at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.BasicToolchainJob.run(BasicToolchainJob.java:134)
at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55)
[2018-02-04 04:18:17,831 INFO L168 Benchmark]: Toolchain (without parser) took 21527.32 ms. Allocated memory was 397.9 MB in the beginning and 977.3 MB in the end (delta: 579.3 MB). Free memory was 352.0 MB in the beginning and 826.1 MB in the end (delta: -474.2 MB). Peak memory consumption was 105.2 MB. Max. memory is 5.3 GB.
[2018-02-04 04:18:17,833 INFO L168 Benchmark]: CDTParser took 0.10 ms. Allocated memory is still 397.9 MB. Free memory is still 358.6 MB. There was no memory consumed. Max. memory is 5.3 GB.
[2018-02-04 04:18:17,833 INFO L168 Benchmark]: CACSL2BoogieTranslator took 176.24 ms. Allocated memory is still 397.9 MB. Free memory was 352.0 MB in the beginning and 337.4 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB.
[2018-02-04 04:18:17,833 INFO L168 Benchmark]: Boogie Preprocessor took 31.67 ms. Allocated memory is still 397.9 MB. Free memory was 337.4 MB in the beginning and 336.1 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB.
[2018-02-04 04:18:17,834 INFO L168 Benchmark]: RCFGBuilder took 349.19 ms. Allocated memory is still 397.9 MB. Free memory was 336.1 MB in the beginning and 297.5 MB in the end (delta: 38.6 MB). Peak memory consumption was 38.6 MB. Max. memory is 5.3 GB.
[2018-02-04 04:18:17,834 INFO L168 Benchmark]: TraceAbstraction took 20967.38 ms. Allocated memory was 397.9 MB in the beginning and 977.3 MB in the end (delta: 579.3 MB). Free memory was 297.5 MB in the beginning and 826.1 MB in the end (delta: -528.7 MB). Peak memory consumption was 50.7 MB. Max. memory is 5.3 GB.
[2018-02-04 04:18:17,835 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] #######################
--- Results ---
* Results from de.uni_freiburg.informatik.ultimate.core:
- StatisticsResult: Toolchain Benchmarks
Benchmark results are:
* CDTParser took 0.10 ms. Allocated memory is still 397.9 MB. Free memory is still 358.6 MB. There was no memory consumed. Max. memory is 5.3 GB.
* CACSL2BoogieTranslator took 176.24 ms. Allocated memory is still 397.9 MB. Free memory was 352.0 MB in the beginning and 337.4 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB.
* Boogie Preprocessor took 31.67 ms. Allocated memory is still 397.9 MB. Free memory was 337.4 MB in the beginning and 336.1 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB.
* RCFGBuilder took 349.19 ms. Allocated memory is still 397.9 MB. Free memory was 336.1 MB in the beginning and 297.5 MB in the end (delta: 38.6 MB). Peak memory consumption was 38.6 MB. Max. memory is 5.3 GB.
* TraceAbstraction took 20967.38 ms. Allocated memory was 397.9 MB in the beginning and 977.3 MB in the end (delta: 579.3 MB). Free memory was 297.5 MB in the beginning and 826.1 MB in the end (delta: -528.7 MB). Peak memory consumption was 50.7 MB. Max. memory is 5.3 GB.
* Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
- ExceptionOrErrorResult: UnsupportedOperationException: Unknown lemma type!
de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: UnsupportedOperationException: Unknown lemma type!: de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.walkLeafNode(Interpolator.java:299)
RESULT: Ultimate could not prove your program: Toolchain returned no result.
Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-04_04-18-17-842.csv
Received shutdown request...