java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-ccafca9-m [2018-02-04 04:16:31,841 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-04 04:16:31,842 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-04 04:16:31,851 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-04 04:16:31,852 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-04 04:16:31,852 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-04 04:16:31,853 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-04 04:16:31,854 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-04 04:16:31,855 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-04 04:16:31,856 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-04 04:16:31,856 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-04 04:16:31,856 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-04 04:16:31,857 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-04 04:16:31,858 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-04 04:16:31,859 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-04 04:16:31,860 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-04 04:16:31,862 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-04 04:16:31,863 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-04 04:16:31,864 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-04 04:16:31,865 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-04 04:16:31,866 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-02-04 04:16:31,867 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-02-04 04:16:31,867 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-02-04 04:16:31,868 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-02-04 04:16:31,868 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-02-04 04:16:31,869 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-02-04 04:16:31,869 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-02-04 04:16:31,870 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-02-04 04:16:31,870 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-02-04 04:16:31,870 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-04 04:16:31,871 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-04 04:16:31,871 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf [2018-02-04 04:16:31,880 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-04 04:16:31,880 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-04 04:16:31,881 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-04 04:16:31,881 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-04 04:16:31,881 INFO L133 SettingsManager]: * Use SBE=true [2018-02-04 04:16:31,881 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-04 04:16:31,882 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-04 04:16:31,882 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-04 04:16:31,882 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-04 04:16:31,882 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-04 04:16:31,882 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-04 04:16:31,882 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-04 04:16:31,882 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-04 04:16:31,882 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-02-04 04:16:31,883 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-04 04:16:31,883 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-04 04:16:31,883 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-04 04:16:31,883 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-04 04:16:31,883 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-04 04:16:31,883 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-04 04:16:31,883 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 04:16:31,884 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-04 04:16:31,884 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-02-04 04:16:31,884 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-02-04 04:16:31,884 INFO L133 SettingsManager]: * Trace refinement strategy=SMTINTERPOL [2018-02-04 04:16:31,915 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-04 04:16:31,925 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-04 04:16:31,928 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-04 04:16:31,929 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-04 04:16:31,930 INFO L276 PluginConnector]: CDTParser initialized [2018-02-04 04:16:31,930 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-02-04 04:16:32,102 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-04 04:16:32,103 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-04 04:16:32,104 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-04 04:16:32,104 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-04 04:16:32,110 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-04 04:16:32,111 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 04:16:32" (1/1) ... [2018-02-04 04:16:32,114 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4b089594 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:32, skipping insertion in model container [2018-02-04 04:16:32,114 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 04:16:32" (1/1) ... [2018-02-04 04:16:32,129 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 04:16:32,166 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 04:16:32,265 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 04:16:32,282 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 04:16:32,291 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:32 WrapperNode [2018-02-04 04:16:32,291 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-04 04:16:32,292 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-04 04:16:32,292 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-04 04:16:32,292 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-04 04:16:32,308 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:32" (1/1) ... [2018-02-04 04:16:32,309 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:32" (1/1) ... [2018-02-04 04:16:32,317 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:32" (1/1) ... [2018-02-04 04:16:32,318 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:32" (1/1) ... [2018-02-04 04:16:32,322 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:32" (1/1) ... [2018-02-04 04:16:32,325 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:32" (1/1) ... [2018-02-04 04:16:32,326 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:32" (1/1) ... [2018-02-04 04:16:32,329 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-04 04:16:32,329 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-04 04:16:32,329 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-04 04:16:32,329 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-04 04:16:32,331 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:32" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 04:16:32,368 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-04 04:16:32,368 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-04 04:16:32,368 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-02-04 04:16:32,368 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-02-04 04:16:32,368 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-02-04 04:16:32,368 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-02-04 04:16:32,368 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-02-04 04:16:32,368 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-02-04 04:16:32,368 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-02-04 04:16:32,368 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-02-04 04:16:32,369 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-02-04 04:16:32,369 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-02-04 04:16:32,369 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-02-04 04:16:32,369 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-02-04 04:16:32,369 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-02-04 04:16:32,369 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-02-04 04:16:32,369 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-02-04 04:16:32,369 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-02-04 04:16:32,369 INFO L136 BoogieDeclarations]: Found implementation of procedure f_22_get [2018-02-04 04:16:32,369 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-02-04 04:16:32,369 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-04 04:16:32,369 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-02-04 04:16:32,369 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-02-04 04:16:32,369 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-02-04 04:16:32,370 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-02-04 04:16:32,370 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-02-04 04:16:32,370 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-02-04 04:16:32,370 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-02-04 04:16:32,370 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-02-04 04:16:32,370 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-02-04 04:16:32,370 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-02-04 04:16:32,370 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-02-04 04:16:32,370 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-02-04 04:16:32,370 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-02-04 04:16:32,370 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-02-04 04:16:32,370 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-02-04 04:16:32,370 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-02-04 04:16:32,371 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-02-04 04:16:32,371 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-02-04 04:16:32,371 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-02-04 04:16:32,371 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-02-04 04:16:32,371 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-02-04 04:16:32,371 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-02-04 04:16:32,371 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-02-04 04:16:32,371 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-02-04 04:16:32,371 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-02-04 04:16:32,371 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-02-04 04:16:32,371 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-02-04 04:16:32,371 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-02-04 04:16:32,371 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-02-04 04:16:32,371 INFO L128 BoogieDeclarations]: Found specification of procedure f_22_get [2018-02-04 04:16:32,371 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-02-04 04:16:32,371 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-04 04:16:32,372 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-04 04:16:32,372 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-04 04:16:32,565 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-02-04 04:16:32,696 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-04 04:16:32,697 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 04:16:32 BoogieIcfgContainer [2018-02-04 04:16:32,697 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-04 04:16:32,697 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-04 04:16:32,697 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-04 04:16:32,699 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-04 04:16:32,699 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 04.02 04:16:32" (1/3) ... [2018-02-04 04:16:32,700 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1389ab20 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 04:16:32, skipping insertion in model container [2018-02-04 04:16:32,700 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 04:16:32" (2/3) ... [2018-02-04 04:16:32,700 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1389ab20 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 04:16:32, skipping insertion in model container [2018-02-04 04:16:32,700 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 04:16:32" (3/3) ... [2018-02-04 04:16:32,701 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-02-04 04:16:32,706 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-02-04 04:16:32,711 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-02-04 04:16:32,733 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-04 04:16:32,734 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-04 04:16:32,734 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-02-04 04:16:32,734 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-02-04 04:16:32,734 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-04 04:16:32,734 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-04 04:16:32,734 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-04 04:16:32,734 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-04 04:16:32,734 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-04 04:16:32,745 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states. [2018-02-04 04:16:32,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-02-04 04:16:32,753 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:32,753 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:32,753 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:32,756 INFO L82 PathProgramCache]: Analyzing trace with hash -367619766, now seen corresponding path program 1 times [2018-02-04 04:16:32,757 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:32,757 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:32,792 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:32,792 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:32,792 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:32,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:32,833 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:33,003 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:33,006 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:33,006 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 04:16:33,008 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 04:16:33,021 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 04:16:33,022 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 04:16:33,024 INFO L87 Difference]: Start difference. First operand 146 states. Second operand 5 states. [2018-02-04 04:16:33,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:33,067 INFO L93 Difference]: Finished difference Result 152 states and 160 transitions. [2018-02-04 04:16:33,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 04:16:33,068 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-02-04 04:16:33,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:33,079 INFO L225 Difference]: With dead ends: 152 [2018-02-04 04:16:33,079 INFO L226 Difference]: Without dead ends: 149 [2018-02-04 04:16:33,080 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 04:16:33,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-02-04 04:16:33,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 147. [2018-02-04 04:16:33,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-02-04 04:16:33,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 155 transitions. [2018-02-04 04:16:33,115 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 155 transitions. Word has length 17 [2018-02-04 04:16:33,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:33,115 INFO L432 AbstractCegarLoop]: Abstraction has 147 states and 155 transitions. [2018-02-04 04:16:33,115 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 04:16:33,115 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 155 transitions. [2018-02-04 04:16:33,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-04 04:16:33,116 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:33,116 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:33,116 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:33,116 INFO L82 PathProgramCache]: Analyzing trace with hash -1040907540, now seen corresponding path program 1 times [2018-02-04 04:16:33,116 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:33,116 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:33,118 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:33,118 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:33,118 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:33,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:33,135 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:33,175 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:33,176 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:33,176 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 04:16:33,177 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 04:16:33,177 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 04:16:33,177 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 04:16:33,177 INFO L87 Difference]: Start difference. First operand 147 states and 155 transitions. Second operand 6 states. [2018-02-04 04:16:33,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:33,305 INFO L93 Difference]: Finished difference Result 148 states and 156 transitions. [2018-02-04 04:16:33,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 04:16:33,306 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-02-04 04:16:33,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:33,307 INFO L225 Difference]: With dead ends: 148 [2018-02-04 04:16:33,307 INFO L226 Difference]: Without dead ends: 148 [2018-02-04 04:16:33,308 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 04:16:33,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-02-04 04:16:33,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 146. [2018-02-04 04:16:33,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-02-04 04:16:33,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 154 transitions. [2018-02-04 04:16:33,315 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 154 transitions. Word has length 19 [2018-02-04 04:16:33,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:33,315 INFO L432 AbstractCegarLoop]: Abstraction has 146 states and 154 transitions. [2018-02-04 04:16:33,315 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 04:16:33,315 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 154 transitions. [2018-02-04 04:16:33,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-04 04:16:33,316 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:33,316 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:33,316 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:33,316 INFO L82 PathProgramCache]: Analyzing trace with hash -1040907539, now seen corresponding path program 1 times [2018-02-04 04:16:33,316 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:33,316 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:33,317 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:33,317 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:33,317 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:33,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:33,334 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:33,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:33,473 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:33,474 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 04:16:33,474 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 04:16:33,474 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 04:16:33,474 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 04:16:33,474 INFO L87 Difference]: Start difference. First operand 146 states and 154 transitions. Second operand 7 states. [2018-02-04 04:16:33,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:33,659 INFO L93 Difference]: Finished difference Result 147 states and 155 transitions. [2018-02-04 04:16:33,659 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 04:16:33,659 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-02-04 04:16:33,659 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:33,660 INFO L225 Difference]: With dead ends: 147 [2018-02-04 04:16:33,661 INFO L226 Difference]: Without dead ends: 147 [2018-02-04 04:16:33,661 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-02-04 04:16:33,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-02-04 04:16:33,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 145. [2018-02-04 04:16:33,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-02-04 04:16:33,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 153 transitions. [2018-02-04 04:16:33,674 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 153 transitions. Word has length 19 [2018-02-04 04:16:33,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:33,674 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 153 transitions. [2018-02-04 04:16:33,674 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 04:16:33,674 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 153 transitions. [2018-02-04 04:16:33,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-02-04 04:16:33,675 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:33,675 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:33,675 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:33,676 INFO L82 PathProgramCache]: Analyzing trace with hash -1287954832, now seen corresponding path program 1 times [2018-02-04 04:16:33,676 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:33,676 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:33,677 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:33,677 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:33,677 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:33,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:33,689 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:33,764 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:33,764 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:33,765 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 04:16:33,765 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-02-04 04:16:33,765 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-02-04 04:16:33,765 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-02-04 04:16:33,766 INFO L87 Difference]: Start difference. First operand 145 states and 153 transitions. Second operand 9 states. [2018-02-04 04:16:33,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:33,835 INFO L93 Difference]: Finished difference Result 165 states and 174 transitions. [2018-02-04 04:16:33,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 04:16:33,836 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-02-04 04:16:33,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:33,838 INFO L225 Difference]: With dead ends: 165 [2018-02-04 04:16:33,838 INFO L226 Difference]: Without dead ends: 165 [2018-02-04 04:16:33,838 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-02-04 04:16:33,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-02-04 04:16:33,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 159. [2018-02-04 04:16:33,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-02-04 04:16:33,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 167 transitions. [2018-02-04 04:16:33,851 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 167 transitions. Word has length 29 [2018-02-04 04:16:33,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:33,852 INFO L432 AbstractCegarLoop]: Abstraction has 159 states and 167 transitions. [2018-02-04 04:16:33,852 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-02-04 04:16:33,852 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 167 transitions. [2018-02-04 04:16:33,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-04 04:16:33,853 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:33,853 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:33,853 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:33,853 INFO L82 PathProgramCache]: Analyzing trace with hash 1025625474, now seen corresponding path program 1 times [2018-02-04 04:16:33,853 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:33,854 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:33,855 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:33,855 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:33,855 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:33,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:33,868 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:33,932 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:33,933 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:33,933 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 04:16:33,933 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 04:16:33,933 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 04:16:33,933 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 04:16:33,933 INFO L87 Difference]: Start difference. First operand 159 states and 167 transitions. Second operand 10 states. [2018-02-04 04:16:34,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:34,140 INFO L93 Difference]: Finished difference Result 158 states and 166 transitions. [2018-02-04 04:16:34,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 04:16:34,140 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-02-04 04:16:34,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:34,141 INFO L225 Difference]: With dead ends: 158 [2018-02-04 04:16:34,142 INFO L226 Difference]: Without dead ends: 158 [2018-02-04 04:16:34,142 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 04:16:34,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-02-04 04:16:34,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 158. [2018-02-04 04:16:34,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-02-04 04:16:34,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 166 transitions. [2018-02-04 04:16:34,149 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 166 transitions. Word has length 34 [2018-02-04 04:16:34,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:34,149 INFO L432 AbstractCegarLoop]: Abstraction has 158 states and 166 transitions. [2018-02-04 04:16:34,149 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 04:16:34,149 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 166 transitions. [2018-02-04 04:16:34,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-04 04:16:34,150 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:34,150 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:34,150 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:34,151 INFO L82 PathProgramCache]: Analyzing trace with hash 1025625475, now seen corresponding path program 1 times [2018-02-04 04:16:34,151 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:34,151 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:34,152 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:34,152 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:34,152 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:34,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:34,164 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:34,186 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:34,186 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:34,186 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-04 04:16:34,186 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 04:16:34,187 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 04:16:34,187 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 04:16:34,187 INFO L87 Difference]: Start difference. First operand 158 states and 166 transitions. Second operand 4 states. [2018-02-04 04:16:34,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:34,203 INFO L93 Difference]: Finished difference Result 161 states and 169 transitions. [2018-02-04 04:16:34,204 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 04:16:34,204 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-02-04 04:16:34,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:34,206 INFO L225 Difference]: With dead ends: 161 [2018-02-04 04:16:34,206 INFO L226 Difference]: Without dead ends: 159 [2018-02-04 04:16:34,206 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 04:16:34,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-02-04 04:16:34,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 159. [2018-02-04 04:16:34,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-02-04 04:16:34,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 167 transitions. [2018-02-04 04:16:34,212 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 167 transitions. Word has length 34 [2018-02-04 04:16:34,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:34,213 INFO L432 AbstractCegarLoop]: Abstraction has 159 states and 167 transitions. [2018-02-04 04:16:34,213 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 04:16:34,213 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 167 transitions. [2018-02-04 04:16:34,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-02-04 04:16:34,214 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:34,214 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:34,214 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:34,214 INFO L82 PathProgramCache]: Analyzing trace with hash -553427227, now seen corresponding path program 1 times [2018-02-04 04:16:34,214 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:34,214 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:34,216 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:34,216 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:34,216 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:34,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:34,229 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:34,255 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:34,255 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:34,255 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:34,256 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:34,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:34,290 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:34,316 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:34,316 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:34,316 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-02-04 04:16:34,317 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 04:16:34,317 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 04:16:34,317 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-02-04 04:16:34,317 INFO L87 Difference]: Start difference. First operand 159 states and 167 transitions. Second operand 6 states. [2018-02-04 04:16:34,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:34,337 INFO L93 Difference]: Finished difference Result 162 states and 170 transitions. [2018-02-04 04:16:34,338 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 04:16:34,338 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-02-04 04:16:34,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:34,339 INFO L225 Difference]: With dead ends: 162 [2018-02-04 04:16:34,339 INFO L226 Difference]: Without dead ends: 160 [2018-02-04 04:16:34,339 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-02-04 04:16:34,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-02-04 04:16:34,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 160. [2018-02-04 04:16:34,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-02-04 04:16:34,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 168 transitions. [2018-02-04 04:16:34,346 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 168 transitions. Word has length 35 [2018-02-04 04:16:34,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:34,346 INFO L432 AbstractCegarLoop]: Abstraction has 160 states and 168 transitions. [2018-02-04 04:16:34,346 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 04:16:34,346 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 168 transitions. [2018-02-04 04:16:34,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-04 04:16:34,347 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:34,347 INFO L351 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:34,348 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:34,348 INFO L82 PathProgramCache]: Analyzing trace with hash 2035546563, now seen corresponding path program 2 times [2018-02-04 04:16:34,348 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:34,348 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:34,349 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:34,349 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:34,350 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:34,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:34,370 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:34,411 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:34,412 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:34,412 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:34,413 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 04:16:34,439 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 04:16:34,439 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 04:16:34,443 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:34,474 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 04:16:34,476 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 04:16:34,499 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 04:16:34,500 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 04:16:34,510 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 04:16:34,510 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 04:16:34,704 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 04:16:34,704 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 04:16:34,705 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [6] total 20 [2018-02-04 04:16:34,705 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 04:16:34,705 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 04:16:34,706 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=329, Unknown=0, NotChecked=0, Total=380 [2018-02-04 04:16:34,706 INFO L87 Difference]: Start difference. First operand 160 states and 168 transitions. Second operand 20 states. [2018-02-04 04:16:35,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:35,348 INFO L93 Difference]: Finished difference Result 233 states and 243 transitions. [2018-02-04 04:16:35,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-02-04 04:16:35,348 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 36 [2018-02-04 04:16:35,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:35,349 INFO L225 Difference]: With dead ends: 233 [2018-02-04 04:16:35,349 INFO L226 Difference]: Without dead ends: 231 [2018-02-04 04:16:35,350 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=104, Invalid=708, Unknown=0, NotChecked=0, Total=812 [2018-02-04 04:16:35,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231 states. [2018-02-04 04:16:35,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231 to 160. [2018-02-04 04:16:35,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-02-04 04:16:35,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 168 transitions. [2018-02-04 04:16:35,356 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 168 transitions. Word has length 36 [2018-02-04 04:16:35,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:35,356 INFO L432 AbstractCegarLoop]: Abstraction has 160 states and 168 transitions. [2018-02-04 04:16:35,356 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 04:16:35,356 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 168 transitions. [2018-02-04 04:16:35,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-02-04 04:16:35,357 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:35,357 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:35,357 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:35,357 INFO L82 PathProgramCache]: Analyzing trace with hash -2073429328, now seen corresponding path program 1 times [2018-02-04 04:16:35,357 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:35,358 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:35,358 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:35,358 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 04:16:35,359 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:35,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:35,369 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:35,426 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:35,427 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:35,427 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 04:16:35,427 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 04:16:35,427 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 04:16:35,428 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 04:16:35,428 INFO L87 Difference]: Start difference. First operand 160 states and 168 transitions. Second operand 7 states. [2018-02-04 04:16:35,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:35,457 INFO L93 Difference]: Finished difference Result 169 states and 177 transitions. [2018-02-04 04:16:35,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 04:16:35,457 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 40 [2018-02-04 04:16:35,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:35,459 INFO L225 Difference]: With dead ends: 169 [2018-02-04 04:16:35,459 INFO L226 Difference]: Without dead ends: 169 [2018-02-04 04:16:35,459 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-02-04 04:16:35,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-02-04 04:16:35,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 165. [2018-02-04 04:16:35,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-02-04 04:16:35,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 173 transitions. [2018-02-04 04:16:35,464 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 173 transitions. Word has length 40 [2018-02-04 04:16:35,464 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:35,464 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 173 transitions. [2018-02-04 04:16:35,465 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 04:16:35,465 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 173 transitions. [2018-02-04 04:16:35,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-02-04 04:16:35,466 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:35,466 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:35,466 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:35,466 INFO L82 PathProgramCache]: Analyzing trace with hash 2040053740, now seen corresponding path program 1 times [2018-02-04 04:16:35,466 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:35,467 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:35,467 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:35,468 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:35,468 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:35,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:35,474 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:35,496 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:35,496 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:35,496 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-04 04:16:35,496 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-04 04:16:35,497 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-04 04:16:35,497 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 04:16:35,497 INFO L87 Difference]: Start difference. First operand 165 states and 173 transitions. Second operand 3 states. [2018-02-04 04:16:35,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:35,588 INFO L93 Difference]: Finished difference Result 181 states and 190 transitions. [2018-02-04 04:16:35,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-04 04:16:35,589 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 38 [2018-02-04 04:16:35,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:35,590 INFO L225 Difference]: With dead ends: 181 [2018-02-04 04:16:35,590 INFO L226 Difference]: Without dead ends: 169 [2018-02-04 04:16:35,591 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 04:16:35,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-02-04 04:16:35,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 161. [2018-02-04 04:16:35,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-02-04 04:16:35,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 168 transitions. [2018-02-04 04:16:35,596 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 168 transitions. Word has length 38 [2018-02-04 04:16:35,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:35,596 INFO L432 AbstractCegarLoop]: Abstraction has 161 states and 168 transitions. [2018-02-04 04:16:35,597 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-04 04:16:35,597 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 168 transitions. [2018-02-04 04:16:35,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-02-04 04:16:35,597 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:35,598 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:35,598 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:35,598 INFO L82 PathProgramCache]: Analyzing trace with hash 8062858, now seen corresponding path program 1 times [2018-02-04 04:16:35,598 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:35,598 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:35,599 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:35,599 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:35,599 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:35,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:35,605 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:35,628 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:35,628 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:35,629 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 04:16:35,629 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 04:16:35,629 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 04:16:35,629 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 04:16:35,629 INFO L87 Difference]: Start difference. First operand 161 states and 168 transitions. Second operand 6 states. [2018-02-04 04:16:35,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:35,646 INFO L93 Difference]: Finished difference Result 142 states and 148 transitions. [2018-02-04 04:16:35,646 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 04:16:35,646 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2018-02-04 04:16:35,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:35,647 INFO L225 Difference]: With dead ends: 142 [2018-02-04 04:16:35,647 INFO L226 Difference]: Without dead ends: 142 [2018-02-04 04:16:35,647 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 04:16:35,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-02-04 04:16:35,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-02-04 04:16:35,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-02-04 04:16:35,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 148 transitions. [2018-02-04 04:16:35,651 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 148 transitions. Word has length 40 [2018-02-04 04:16:35,651 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:35,651 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 148 transitions. [2018-02-04 04:16:35,651 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 04:16:35,651 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 148 transitions. [2018-02-04 04:16:35,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-04 04:16:35,652 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:35,652 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:35,652 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:35,652 INFO L82 PathProgramCache]: Analyzing trace with hash -1805397434, now seen corresponding path program 1 times [2018-02-04 04:16:35,652 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:35,653 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:35,653 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:35,653 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:35,653 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:35,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:35,663 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:35,727 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-02-04 04:16:35,727 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:35,728 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 04:16:35,728 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 04:16:35,728 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 04:16:35,728 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 04:16:35,728 INFO L87 Difference]: Start difference. First operand 142 states and 148 transitions. Second operand 10 states. [2018-02-04 04:16:35,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:35,915 INFO L93 Difference]: Finished difference Result 140 states and 146 transitions. [2018-02-04 04:16:35,915 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 04:16:35,915 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-02-04 04:16:35,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:35,916 INFO L225 Difference]: With dead ends: 140 [2018-02-04 04:16:35,916 INFO L226 Difference]: Without dead ends: 140 [2018-02-04 04:16:35,916 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 04:16:35,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-02-04 04:16:35,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-02-04 04:16:35,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-02-04 04:16:35,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 146 transitions. [2018-02-04 04:16:35,920 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 146 transitions. Word has length 42 [2018-02-04 04:16:35,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:35,921 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 146 transitions. [2018-02-04 04:16:35,921 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 04:16:35,921 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 146 transitions. [2018-02-04 04:16:35,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-04 04:16:35,922 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:35,922 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:35,922 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:35,922 INFO L82 PathProgramCache]: Analyzing trace with hash -1805397433, now seen corresponding path program 1 times [2018-02-04 04:16:35,922 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:35,922 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:35,923 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:35,923 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:35,924 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:35,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:35,936 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:35,971 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:35,971 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:35,972 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:35,972 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:35,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:35,990 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:36,006 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:36,006 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:36,006 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-02-04 04:16:36,007 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 04:16:36,007 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 04:16:36,007 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-02-04 04:16:36,007 INFO L87 Difference]: Start difference. First operand 140 states and 146 transitions. Second operand 8 states. [2018-02-04 04:16:36,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:36,027 INFO L93 Difference]: Finished difference Result 143 states and 149 transitions. [2018-02-04 04:16:36,027 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 04:16:36,028 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-02-04 04:16:36,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:36,029 INFO L225 Difference]: With dead ends: 143 [2018-02-04 04:16:36,029 INFO L226 Difference]: Without dead ends: 141 [2018-02-04 04:16:36,029 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-02-04 04:16:36,029 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-02-04 04:16:36,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2018-02-04 04:16:36,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-02-04 04:16:36,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 147 transitions. [2018-02-04 04:16:36,033 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 147 transitions. Word has length 42 [2018-02-04 04:16:36,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:36,034 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 147 transitions. [2018-02-04 04:16:36,034 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 04:16:36,034 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 147 transitions. [2018-02-04 04:16:36,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-02-04 04:16:36,034 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:36,035 INFO L351 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:36,035 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:36,035 INFO L82 PathProgramCache]: Analyzing trace with hash 1247207849, now seen corresponding path program 2 times [2018-02-04 04:16:36,035 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:36,035 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:36,036 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:36,036 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:36,036 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:36,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:36,061 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:36,100 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:36,101 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:36,101 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:36,102 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 04:16:36,122 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 04:16:36,122 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 04:16:36,126 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:36,139 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 04:16:36,139 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 04:16:36,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 04:16:36,153 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 04:16:36,163 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 04:16:36,163 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 04:16:36,416 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-04 04:16:36,416 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 04:16:36,417 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-02-04 04:16:36,417 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-04 04:16:36,417 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-04 04:16:36,417 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=400, Unknown=0, NotChecked=0, Total=462 [2018-02-04 04:16:36,418 INFO L87 Difference]: Start difference. First operand 141 states and 147 transitions. Second operand 22 states. [2018-02-04 04:16:37,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:37,002 INFO L93 Difference]: Finished difference Result 142 states and 148 transitions. [2018-02-04 04:16:37,002 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 04:16:37,002 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 43 [2018-02-04 04:16:37,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:37,003 INFO L225 Difference]: With dead ends: 142 [2018-02-04 04:16:37,003 INFO L226 Difference]: Without dead ends: 140 [2018-02-04 04:16:37,004 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 28 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=139, Invalid=917, Unknown=0, NotChecked=0, Total=1056 [2018-02-04 04:16:37,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-02-04 04:16:37,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-02-04 04:16:37,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-02-04 04:16:37,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 146 transitions. [2018-02-04 04:16:37,006 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 146 transitions. Word has length 43 [2018-02-04 04:16:37,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:37,007 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 146 transitions. [2018-02-04 04:16:37,007 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-04 04:16:37,007 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 146 transitions. [2018-02-04 04:16:37,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-02-04 04:16:37,007 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:37,008 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:37,008 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:37,008 INFO L82 PathProgramCache]: Analyzing trace with hash 414207770, now seen corresponding path program 1 times [2018-02-04 04:16:37,008 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:37,008 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:37,009 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:37,010 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 04:16:37,010 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:37,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:37,018 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:37,068 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 04:16:37,069 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:37,069 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-02-04 04:16:37,069 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 04:16:37,069 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 04:16:37,070 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-04 04:16:37,070 INFO L87 Difference]: Start difference. First operand 140 states and 146 transitions. Second operand 8 states. [2018-02-04 04:16:37,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:37,094 INFO L93 Difference]: Finished difference Result 142 states and 147 transitions. [2018-02-04 04:16:37,094 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 04:16:37,094 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 49 [2018-02-04 04:16:37,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:37,094 INFO L225 Difference]: With dead ends: 142 [2018-02-04 04:16:37,095 INFO L226 Difference]: Without dead ends: 140 [2018-02-04 04:16:37,095 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-02-04 04:16:37,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-02-04 04:16:37,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-02-04 04:16:37,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-02-04 04:16:37,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 145 transitions. [2018-02-04 04:16:37,098 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 145 transitions. Word has length 49 [2018-02-04 04:16:37,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:37,099 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 145 transitions. [2018-02-04 04:16:37,099 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 04:16:37,099 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 145 transitions. [2018-02-04 04:16:37,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-02-04 04:16:37,099 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:37,100 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:37,100 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:37,100 INFO L82 PathProgramCache]: Analyzing trace with hash -673829217, now seen corresponding path program 1 times [2018-02-04 04:16:37,100 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:37,100 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:37,101 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:37,101 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:37,101 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:37,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:37,110 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:37,162 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 04:16:37,162 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:37,162 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-02-04 04:16:37,163 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 04:16:37,163 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 04:16:37,163 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 04:16:37,163 INFO L87 Difference]: Start difference. First operand 140 states and 145 transitions. Second operand 10 states. [2018-02-04 04:16:37,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:37,199 INFO L93 Difference]: Finished difference Result 144 states and 148 transitions. [2018-02-04 04:16:37,199 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 04:16:37,199 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 54 [2018-02-04 04:16:37,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:37,200 INFO L225 Difference]: With dead ends: 144 [2018-02-04 04:16:37,200 INFO L226 Difference]: Without dead ends: 140 [2018-02-04 04:16:37,200 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 04:16:37,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-02-04 04:16:37,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-02-04 04:16:37,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-02-04 04:16:37,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 144 transitions. [2018-02-04 04:16:37,203 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 144 transitions. Word has length 54 [2018-02-04 04:16:37,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:37,203 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 144 transitions. [2018-02-04 04:16:37,203 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 04:16:37,203 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 144 transitions. [2018-02-04 04:16:37,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-04 04:16:37,204 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:37,204 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:37,204 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:37,204 INFO L82 PathProgramCache]: Analyzing trace with hash 367813469, now seen corresponding path program 1 times [2018-02-04 04:16:37,205 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:37,205 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:37,205 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:37,205 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:37,205 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:37,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:37,217 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:37,330 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 04:16:37,331 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:37,331 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-02-04 04:16:37,331 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-04 04:16:37,331 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-04 04:16:37,331 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-02-04 04:16:37,332 INFO L87 Difference]: Start difference. First operand 140 states and 144 transitions. Second operand 15 states. [2018-02-04 04:16:37,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:37,576 INFO L93 Difference]: Finished difference Result 138 states and 142 transitions. [2018-02-04 04:16:37,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-04 04:16:37,577 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 65 [2018-02-04 04:16:37,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:37,578 INFO L225 Difference]: With dead ends: 138 [2018-02-04 04:16:37,578 INFO L226 Difference]: Without dead ends: 138 [2018-02-04 04:16:37,578 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=47, Invalid=333, Unknown=0, NotChecked=0, Total=380 [2018-02-04 04:16:37,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-02-04 04:16:37,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-02-04 04:16:37,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-02-04 04:16:37,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 142 transitions. [2018-02-04 04:16:37,580 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 142 transitions. Word has length 65 [2018-02-04 04:16:37,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:37,581 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 142 transitions. [2018-02-04 04:16:37,581 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-04 04:16:37,581 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 142 transitions. [2018-02-04 04:16:37,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-04 04:16:37,581 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:37,581 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:37,581 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:37,581 INFO L82 PathProgramCache]: Analyzing trace with hash 367813470, now seen corresponding path program 1 times [2018-02-04 04:16:37,581 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:37,582 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:37,582 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:37,582 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:37,582 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:37,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:37,595 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:37,645 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:37,646 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:37,646 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:37,647 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:37,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:37,668 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:37,681 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:37,681 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:37,681 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-02-04 04:16:37,682 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 04:16:37,682 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 04:16:37,682 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-02-04 04:16:37,682 INFO L87 Difference]: Start difference. First operand 138 states and 142 transitions. Second operand 10 states. [2018-02-04 04:16:37,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:37,705 INFO L93 Difference]: Finished difference Result 141 states and 145 transitions. [2018-02-04 04:16:37,705 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 04:16:37,705 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 65 [2018-02-04 04:16:37,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:37,706 INFO L225 Difference]: With dead ends: 141 [2018-02-04 04:16:37,706 INFO L226 Difference]: Without dead ends: 139 [2018-02-04 04:16:37,706 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-02-04 04:16:37,707 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-02-04 04:16:37,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 139. [2018-02-04 04:16:37,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-02-04 04:16:37,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 143 transitions. [2018-02-04 04:16:37,710 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 143 transitions. Word has length 65 [2018-02-04 04:16:37,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:37,710 INFO L432 AbstractCegarLoop]: Abstraction has 139 states and 143 transitions. [2018-02-04 04:16:37,710 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 04:16:37,710 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 143 transitions. [2018-02-04 04:16:37,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-02-04 04:16:37,711 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:37,711 INFO L351 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:37,711 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:37,711 INFO L82 PathProgramCache]: Analyzing trace with hash -292477508, now seen corresponding path program 2 times [2018-02-04 04:16:37,711 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:37,711 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:37,712 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:37,712 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:37,712 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:37,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:37,724 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:37,783 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:37,783 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:37,784 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:37,784 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 04:16:37,804 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 04:16:37,805 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 04:16:37,809 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:37,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 04:16:37,830 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 04:16:37,843 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 04:16:37,843 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 04:16:37,854 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 04:16:37,854 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 04:16:38,175 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-02-04 04:16:38,175 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 04:16:38,175 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [10] total 29 [2018-02-04 04:16:38,176 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-02-04 04:16:38,176 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-02-04 04:16:38,176 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=720, Unknown=0, NotChecked=0, Total=812 [2018-02-04 04:16:38,176 INFO L87 Difference]: Start difference. First operand 139 states and 143 transitions. Second operand 29 states. [2018-02-04 04:16:39,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:39,035 INFO L93 Difference]: Finished difference Result 140 states and 144 transitions. [2018-02-04 04:16:39,040 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-02-04 04:16:39,040 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 66 [2018-02-04 04:16:39,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:39,041 INFO L225 Difference]: With dead ends: 140 [2018-02-04 04:16:39,041 INFO L226 Difference]: Without dead ends: 138 [2018-02-04 04:16:39,041 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 295 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=212, Invalid=1680, Unknown=0, NotChecked=0, Total=1892 [2018-02-04 04:16:39,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-02-04 04:16:39,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-02-04 04:16:39,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-02-04 04:16:39,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 142 transitions. [2018-02-04 04:16:39,043 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 142 transitions. Word has length 66 [2018-02-04 04:16:39,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:39,043 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 142 transitions. [2018-02-04 04:16:39,043 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-02-04 04:16:39,043 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 142 transitions. [2018-02-04 04:16:39,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-02-04 04:16:39,044 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:39,044 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:39,044 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:39,044 INFO L82 PathProgramCache]: Analyzing trace with hash -1942262813, now seen corresponding path program 1 times [2018-02-04 04:16:39,044 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:39,044 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:39,045 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:39,045 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 04:16:39,045 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:39,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:39,056 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:39,155 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-02-04 04:16:39,156 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:39,156 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-02-04 04:16:39,156 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-04 04:16:39,156 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-04 04:16:39,157 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-02-04 04:16:39,157 INFO L87 Difference]: Start difference. First operand 138 states and 142 transitions. Second operand 13 states. [2018-02-04 04:16:39,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:39,241 INFO L93 Difference]: Finished difference Result 144 states and 147 transitions. [2018-02-04 04:16:39,241 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-04 04:16:39,242 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 78 [2018-02-04 04:16:39,242 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:39,242 INFO L225 Difference]: With dead ends: 144 [2018-02-04 04:16:39,242 INFO L226 Difference]: Without dead ends: 138 [2018-02-04 04:16:39,243 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-02-04 04:16:39,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-02-04 04:16:39,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-02-04 04:16:39,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-02-04 04:16:39,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 141 transitions. [2018-02-04 04:16:39,245 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 141 transitions. Word has length 78 [2018-02-04 04:16:39,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:39,245 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 141 transitions. [2018-02-04 04:16:39,245 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-04 04:16:39,246 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 141 transitions. [2018-02-04 04:16:39,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-02-04 04:16:39,246 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:39,246 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:39,247 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:39,247 INFO L82 PathProgramCache]: Analyzing trace with hash -240207015, now seen corresponding path program 1 times [2018-02-04 04:16:39,247 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:39,247 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:39,248 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:39,248 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:39,248 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:39,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:39,261 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:39,463 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-02-04 04:16:39,463 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:39,463 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-02-04 04:16:39,464 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 04:16:39,464 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 04:16:39,464 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=341, Unknown=0, NotChecked=0, Total=380 [2018-02-04 04:16:39,464 INFO L87 Difference]: Start difference. First operand 138 states and 141 transitions. Second operand 20 states. [2018-02-04 04:16:39,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:39,823 INFO L93 Difference]: Finished difference Result 145 states and 148 transitions. [2018-02-04 04:16:39,823 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-02-04 04:16:39,823 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 91 [2018-02-04 04:16:39,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:39,824 INFO L225 Difference]: With dead ends: 145 [2018-02-04 04:16:39,824 INFO L226 Difference]: Without dead ends: 145 [2018-02-04 04:16:39,824 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=67, Invalid=635, Unknown=0, NotChecked=0, Total=702 [2018-02-04 04:16:39,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-02-04 04:16:39,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 136. [2018-02-04 04:16:39,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-02-04 04:16:39,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 139 transitions. [2018-02-04 04:16:39,827 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 139 transitions. Word has length 91 [2018-02-04 04:16:39,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:39,827 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 139 transitions. [2018-02-04 04:16:39,827 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 04:16:39,827 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 139 transitions. [2018-02-04 04:16:39,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-02-04 04:16:39,828 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:39,828 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:39,828 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:39,829 INFO L82 PathProgramCache]: Analyzing trace with hash -240207014, now seen corresponding path program 1 times [2018-02-04 04:16:39,829 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:39,829 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:39,830 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:39,830 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:39,830 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:39,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:39,846 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:39,921 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:39,921 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:39,921 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:39,922 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:39,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:39,947 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:39,961 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:39,961 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:39,961 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-02-04 04:16:39,961 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-04 04:16:39,961 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-04 04:16:39,962 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-02-04 04:16:39,962 INFO L87 Difference]: Start difference. First operand 136 states and 139 transitions. Second operand 12 states. [2018-02-04 04:16:39,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:39,987 INFO L93 Difference]: Finished difference Result 139 states and 142 transitions. [2018-02-04 04:16:39,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 04:16:39,989 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 91 [2018-02-04 04:16:39,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:39,990 INFO L225 Difference]: With dead ends: 139 [2018-02-04 04:16:39,990 INFO L226 Difference]: Without dead ends: 137 [2018-02-04 04:16:39,990 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-02-04 04:16:39,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-02-04 04:16:39,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-02-04 04:16:39,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-02-04 04:16:39,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 140 transitions. [2018-02-04 04:16:39,993 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 140 transitions. Word has length 91 [2018-02-04 04:16:39,993 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:39,993 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 140 transitions. [2018-02-04 04:16:39,993 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-04 04:16:39,993 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 140 transitions. [2018-02-04 04:16:39,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-02-04 04:16:39,994 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:39,994 INFO L351 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:39,994 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:39,994 INFO L82 PathProgramCache]: Analyzing trace with hash -3595208, now seen corresponding path program 2 times [2018-02-04 04:16:39,995 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:39,995 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:39,995 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:39,995 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:39,995 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:40,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:40,011 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:40,117 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:40,117 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:40,117 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:40,118 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 04:16:40,147 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 04:16:40,147 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 04:16:40,153 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:40,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 04:16:40,171 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 04:16:40,186 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 04:16:40,186 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 04:16:40,199 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 04:16:40,199 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 04:16:40,594 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-02-04 04:16:40,594 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 04:16:40,595 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [12] total 31 [2018-02-04 04:16:40,595 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-02-04 04:16:40,595 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-02-04 04:16:40,595 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=111, Invalid=819, Unknown=0, NotChecked=0, Total=930 [2018-02-04 04:16:40,595 INFO L87 Difference]: Start difference. First operand 137 states and 140 transitions. Second operand 31 states. [2018-02-04 04:16:41,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:41,538 INFO L93 Difference]: Finished difference Result 138 states and 141 transitions. [2018-02-04 04:16:41,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-02-04 04:16:41,538 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 92 [2018-02-04 04:16:41,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:41,539 INFO L225 Difference]: With dead ends: 138 [2018-02-04 04:16:41,539 INFO L226 Difference]: Without dead ends: 136 [2018-02-04 04:16:41,539 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 71 SyntacticMatches, 3 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 394 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=271, Invalid=1985, Unknown=0, NotChecked=0, Total=2256 [2018-02-04 04:16:41,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-02-04 04:16:41,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-02-04 04:16:41,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-02-04 04:16:41,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 139 transitions. [2018-02-04 04:16:41,541 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 139 transitions. Word has length 92 [2018-02-04 04:16:41,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:41,541 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 139 transitions. [2018-02-04 04:16:41,541 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-02-04 04:16:41,541 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 139 transitions. [2018-02-04 04:16:41,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-02-04 04:16:41,542 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:41,542 INFO L351 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:41,542 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:41,542 INFO L82 PathProgramCache]: Analyzing trace with hash -359095659, now seen corresponding path program 1 times [2018-02-04 04:16:41,542 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:41,542 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:41,543 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:41,543 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 04:16:41,543 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:41,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:41,551 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:41,638 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-02-04 04:16:41,638 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:41,638 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-02-04 04:16:41,639 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 04:16:41,639 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 04:16:41,639 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-02-04 04:16:41,639 INFO L87 Difference]: Start difference. First operand 136 states and 139 transitions. Second operand 11 states. [2018-02-04 04:16:41,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:41,689 INFO L93 Difference]: Finished difference Result 138 states and 140 transitions. [2018-02-04 04:16:41,689 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 04:16:41,689 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 91 [2018-02-04 04:16:41,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:41,690 INFO L225 Difference]: With dead ends: 138 [2018-02-04 04:16:41,690 INFO L226 Difference]: Without dead ends: 136 [2018-02-04 04:16:41,690 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-02-04 04:16:41,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-02-04 04:16:41,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-02-04 04:16:41,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-02-04 04:16:41,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 138 transitions. [2018-02-04 04:16:41,693 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 138 transitions. Word has length 91 [2018-02-04 04:16:41,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:41,693 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 138 transitions. [2018-02-04 04:16:41,693 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 04:16:41,693 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 138 transitions. [2018-02-04 04:16:41,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-02-04 04:16:41,694 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:41,694 INFO L351 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:41,694 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:41,694 INFO L82 PathProgramCache]: Analyzing trace with hash 2073607857, now seen corresponding path program 1 times [2018-02-04 04:16:41,694 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:41,694 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:41,694 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:41,695 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:41,695 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:41,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:41,710 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:41,939 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-02-04 04:16:41,939 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 04:16:41,940 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-02-04 04:16:41,940 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-02-04 04:16:41,940 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-02-04 04:16:41,940 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=505, Unknown=0, NotChecked=0, Total=552 [2018-02-04 04:16:41,940 INFO L87 Difference]: Start difference. First operand 136 states and 138 transitions. Second operand 24 states. [2018-02-04 04:16:42,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:42,260 INFO L93 Difference]: Finished difference Result 139 states and 141 transitions. [2018-02-04 04:16:42,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-02-04 04:16:42,261 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 107 [2018-02-04 04:16:42,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:42,261 INFO L225 Difference]: With dead ends: 139 [2018-02-04 04:16:42,261 INFO L226 Difference]: Without dead ends: 139 [2018-02-04 04:16:42,262 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=83, Invalid=973, Unknown=0, NotChecked=0, Total=1056 [2018-02-04 04:16:42,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-02-04 04:16:42,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 134. [2018-02-04 04:16:42,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-02-04 04:16:42,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 136 transitions. [2018-02-04 04:16:42,264 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 136 transitions. Word has length 107 [2018-02-04 04:16:42,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:42,265 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 136 transitions. [2018-02-04 04:16:42,265 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-02-04 04:16:42,265 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 136 transitions. [2018-02-04 04:16:42,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-02-04 04:16:42,266 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:42,266 INFO L351 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:42,266 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:42,266 INFO L82 PathProgramCache]: Analyzing trace with hash 2073607858, now seen corresponding path program 1 times [2018-02-04 04:16:42,266 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:42,266 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:42,267 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:42,267 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:42,267 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:42,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:42,283 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:42,398 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:42,398 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:42,398 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:42,399 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:42,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:42,427 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:42,443 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:42,444 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:42,444 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-02-04 04:16:42,444 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-02-04 04:16:42,445 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-02-04 04:16:42,445 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-02-04 04:16:42,445 INFO L87 Difference]: Start difference. First operand 134 states and 136 transitions. Second operand 14 states. [2018-02-04 04:16:42,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:42,475 INFO L93 Difference]: Finished difference Result 137 states and 139 transitions. [2018-02-04 04:16:42,475 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-04 04:16:42,475 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 107 [2018-02-04 04:16:42,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:42,476 INFO L225 Difference]: With dead ends: 137 [2018-02-04 04:16:42,476 INFO L226 Difference]: Without dead ends: 135 [2018-02-04 04:16:42,476 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 107 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-02-04 04:16:42,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-02-04 04:16:42,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-02-04 04:16:42,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-02-04 04:16:42,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 137 transitions. [2018-02-04 04:16:42,479 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 137 transitions. Word has length 107 [2018-02-04 04:16:42,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:42,479 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 137 transitions. [2018-02-04 04:16:42,479 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-02-04 04:16:42,479 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 137 transitions. [2018-02-04 04:16:42,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2018-02-04 04:16:42,480 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:42,480 INFO L351 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:42,480 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:42,481 INFO L82 PathProgramCache]: Analyzing trace with hash 187804560, now seen corresponding path program 2 times [2018-02-04 04:16:42,481 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:42,481 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:42,481 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:42,482 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:42,482 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:42,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:42,497 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:42,602 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:42,603 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:42,603 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:42,604 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 04:16:42,631 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 04:16:42,631 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 04:16:42,637 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:42,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 04:16:42,649 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 04:16:42,663 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 04:16:42,663 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 04:16:42,675 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 04:16:42,675 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 04:16:43,161 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-02-04 04:16:43,161 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 04:16:43,161 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [14] total 37 [2018-02-04 04:16:43,161 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-02-04 04:16:43,162 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-02-04 04:16:43,162 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=146, Invalid=1186, Unknown=0, NotChecked=0, Total=1332 [2018-02-04 04:16:43,162 INFO L87 Difference]: Start difference. First operand 135 states and 137 transitions. Second operand 37 states. [2018-02-04 04:16:44,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:44,233 INFO L93 Difference]: Finished difference Result 136 states and 138 transitions. [2018-02-04 04:16:44,234 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-02-04 04:16:44,234 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 108 [2018-02-04 04:16:44,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:44,234 INFO L225 Difference]: With dead ends: 136 [2018-02-04 04:16:44,234 INFO L226 Difference]: Without dead ends: 134 [2018-02-04 04:16:44,235 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 81 SyntacticMatches, 5 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 608 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=364, Invalid=2942, Unknown=0, NotChecked=0, Total=3306 [2018-02-04 04:16:44,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-02-04 04:16:44,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-02-04 04:16:44,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-02-04 04:16:44,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 136 transitions. [2018-02-04 04:16:44,237 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 136 transitions. Word has length 108 [2018-02-04 04:16:44,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:44,238 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 136 transitions. [2018-02-04 04:16:44,238 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-02-04 04:16:44,238 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 136 transitions. [2018-02-04 04:16:44,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-02-04 04:16:44,238 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:44,238 INFO L351 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:44,239 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:44,239 INFO L82 PathProgramCache]: Analyzing trace with hash 508946867, now seen corresponding path program 1 times [2018-02-04 04:16:44,239 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:44,239 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:44,239 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:44,240 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 04:16:44,240 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:44,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:44,251 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:44,376 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:44,376 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:44,376 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:44,377 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:44,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:44,397 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:44,408 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:44,409 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:44,409 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-02-04 04:16:44,409 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-04 04:16:44,409 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-04 04:16:44,410 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-02-04 04:16:44,410 INFO L87 Difference]: Start difference. First operand 134 states and 136 transitions. Second operand 16 states. [2018-02-04 04:16:44,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:44,445 INFO L93 Difference]: Finished difference Result 137 states and 139 transitions. [2018-02-04 04:16:44,446 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-04 04:16:44,446 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 113 [2018-02-04 04:16:44,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:44,446 INFO L225 Difference]: With dead ends: 137 [2018-02-04 04:16:44,447 INFO L226 Difference]: Without dead ends: 135 [2018-02-04 04:16:44,447 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 113 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-02-04 04:16:44,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-02-04 04:16:44,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-02-04 04:16:44,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-02-04 04:16:44,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 137 transitions. [2018-02-04 04:16:44,449 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 137 transitions. Word has length 113 [2018-02-04 04:16:44,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:44,449 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 137 transitions. [2018-02-04 04:16:44,449 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-04 04:16:44,449 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 137 transitions. [2018-02-04 04:16:44,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-02-04 04:16:44,449 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:44,449 INFO L351 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:44,449 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:44,450 INFO L82 PathProgramCache]: Analyzing trace with hash -1170917359, now seen corresponding path program 2 times [2018-02-04 04:16:44,450 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:44,450 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:44,450 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:44,450 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:44,450 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:44,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:44,461 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:44,618 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:44,618 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:44,618 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:44,619 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 04:16:44,649 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 04:16:44,650 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 04:16:44,662 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:44,736 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-02-04 04:16:44,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 04:16:44,738 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 04:16:44,739 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 04:16:44,740 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 04:16:44,740 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-02-04 04:16:44,823 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 04:16:44,825 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 04:16:44,829 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 04:16:44,829 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-02-04 04:16:44,831 WARN L1033 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-02-04 04:16:44,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-02-04 04:16:44,839 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 04:16:44,843 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-02-04 04:16:44,851 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 04:16:44,852 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 04:16:44,855 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-02-04 04:16:44,856 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 04:16:44,861 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 04:16:44,863 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 04:16:44,867 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 04:16:44,867 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-02-04 04:16:45,098 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_atomic_add_return_~temp~0 Int)) (let ((.cse0 (select |c_old(#memory_int)| |c_ldv_atomic_add_return_#in~v.base|))) (and (<= (+ |c_ldv_atomic_add_return_#in~i| (select .cse0 |c_ldv_atomic_add_return_#in~v.offset|)) ldv_atomic_add_return_~temp~0) (= |c_#memory_int| (store |c_old(#memory_int)| |c_ldv_atomic_add_return_#in~v.base| (store .cse0 |c_ldv_atomic_add_return_#in~v.offset| ldv_atomic_add_return_~temp~0)))))) is different from true [2018-02-04 04:16:45,111 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_atomic_add_return_~temp~0 Int)) (let ((.cse0 (select |c_old(#memory_int)| |c_ldv_kref_get_#in~kref.base|))) (and (= (store |c_old(#memory_int)| |c_ldv_kref_get_#in~kref.base| (store .cse0 |c_ldv_kref_get_#in~kref.offset| ldv_atomic_add_return_~temp~0)) |c_#memory_int|) (<= (+ (select .cse0 |c_ldv_kref_get_#in~kref.offset|) 1) ldv_atomic_add_return_~temp~0)))) is different from true [2018-02-04 04:16:45,121 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_atomic_add_return_~temp~0 Int)) (let ((.cse0 (select |c_old(#memory_int)| |c_ldv_kobject_get_#in~kobj.base|)) (.cse1 (+ |c_ldv_kobject_get_#in~kobj.offset| 12))) (and (= (store |c_old(#memory_int)| |c_ldv_kobject_get_#in~kobj.base| (store .cse0 .cse1 ldv_atomic_add_return_~temp~0)) |c_#memory_int|) (<= (+ (select .cse0 .cse1) 1) ldv_atomic_add_return_~temp~0)))) is different from true [2018-02-04 04:16:45,125 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_atomic_add_return_~temp~0 Int)) (let ((.cse0 (select |c_old(#memory_int)| |c_f_22_get_#in~kobj.base|)) (.cse1 (+ |c_f_22_get_#in~kobj.offset| 12))) (and (<= (+ (select .cse0 .cse1) 1) ldv_atomic_add_return_~temp~0) (= (store |c_old(#memory_int)| |c_f_22_get_#in~kobj.base| (store .cse0 .cse1 ldv_atomic_add_return_~temp~0)) |c_#memory_int|)))) is different from true [2018-02-04 04:16:45,130 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 04:16:45,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 33 [2018-02-04 04:16:45,141 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 33 treesize of output 42 [2018-02-04 04:16:45,143 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 3 xjuncts. [2018-02-04 04:16:45,156 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 04:16:45,164 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-02-04 04:16:45,164 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:30 [2018-02-04 04:16:45,521 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2018-02-04 04:16:45,522 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-02-04 04:16:45,522 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 04:16:45,524 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 04:16:45,530 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-02-04 04:16:45,532 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 04:16:45,532 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 04:16:45,533 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 04:16:45,536 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-02-04 04:16:45,536 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:42, output treesize:8 [2018-02-04 04:16:45,771 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-02-04 04:16:45,771 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 04:16:45,771 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [51] imperfect sequences [16] total 65 [2018-02-04 04:16:45,771 INFO L409 AbstractCegarLoop]: Interpolant automaton has 65 states [2018-02-04 04:16:45,772 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2018-02-04 04:16:45,772 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=219, Invalid=3336, Unknown=5, NotChecked=600, Total=4160 [2018-02-04 04:16:45,772 INFO L87 Difference]: Start difference. First operand 135 states and 137 transitions. Second operand 65 states. [2018-02-04 04:16:47,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:47,524 INFO L93 Difference]: Finished difference Result 127 states and 127 transitions. [2018-02-04 04:16:47,524 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2018-02-04 04:16:47,524 INFO L78 Accepts]: Start accepts. Automaton has 65 states. Word has length 114 [2018-02-04 04:16:47,525 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:47,525 INFO L225 Difference]: With dead ends: 127 [2018-02-04 04:16:47,525 INFO L226 Difference]: Without dead ends: 116 [2018-02-04 04:16:47,526 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 66 SyntacticMatches, 0 SemanticMatches, 93 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 1382 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=374, Invalid=7651, Unknown=5, NotChecked=900, Total=8930 [2018-02-04 04:16:47,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-02-04 04:16:47,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2018-02-04 04:16:47,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-02-04 04:16:47,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 116 transitions. [2018-02-04 04:16:47,528 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 116 transitions. Word has length 114 [2018-02-04 04:16:47,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:47,528 INFO L432 AbstractCegarLoop]: Abstraction has 116 states and 116 transitions. [2018-02-04 04:16:47,528 INFO L433 AbstractCegarLoop]: Interpolant automaton has 65 states. [2018-02-04 04:16:47,528 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 116 transitions. [2018-02-04 04:16:47,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-02-04 04:16:47,528 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:47,529 INFO L351 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:47,529 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:47,529 INFO L82 PathProgramCache]: Analyzing trace with hash -1784564, now seen corresponding path program 1 times [2018-02-04 04:16:47,529 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:47,529 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:47,529 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:47,529 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 04:16:47,530 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:47,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:47,541 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:47,711 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:47,711 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:47,711 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:47,712 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:47,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:47,739 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:47,757 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:47,757 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:47,757 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-02-04 04:16:47,758 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-02-04 04:16:47,758 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-02-04 04:16:47,758 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-02-04 04:16:47,758 INFO L87 Difference]: Start difference. First operand 116 states and 116 transitions. Second operand 18 states. [2018-02-04 04:16:47,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:47,788 INFO L93 Difference]: Finished difference Result 119 states and 119 transitions. [2018-02-04 04:16:47,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-02-04 04:16:47,788 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 115 [2018-02-04 04:16:47,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:47,789 INFO L225 Difference]: With dead ends: 119 [2018-02-04 04:16:47,789 INFO L226 Difference]: Without dead ends: 117 [2018-02-04 04:16:47,789 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-02-04 04:16:47,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-02-04 04:16:47,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2018-02-04 04:16:47,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-02-04 04:16:47,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 117 transitions. [2018-02-04 04:16:47,792 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 117 transitions. Word has length 115 [2018-02-04 04:16:47,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:47,792 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 117 transitions. [2018-02-04 04:16:47,792 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-02-04 04:16:47,792 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 117 transitions. [2018-02-04 04:16:47,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-02-04 04:16:47,793 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:47,793 INFO L351 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:47,793 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:47,793 INFO L82 PathProgramCache]: Analyzing trace with hash 556397546, now seen corresponding path program 2 times [2018-02-04 04:16:47,793 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:47,793 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:47,794 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:47,794 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 04:16:47,794 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:47,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:47,812 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:47,948 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:47,948 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:47,948 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:47,949 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 04:16:47,977 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 04:16:47,977 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 04:16:47,981 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:47,996 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:47,997 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:47,997 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-02-04 04:16:47,997 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-04 04:16:47,997 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-04 04:16:47,998 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-02-04 04:16:47,998 INFO L87 Difference]: Start difference. First operand 117 states and 117 transitions. Second operand 19 states. [2018-02-04 04:16:48,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:48,036 INFO L93 Difference]: Finished difference Result 120 states and 120 transitions. [2018-02-04 04:16:48,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-04 04:16:48,037 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 116 [2018-02-04 04:16:48,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:48,038 INFO L225 Difference]: With dead ends: 120 [2018-02-04 04:16:48,038 INFO L226 Difference]: Without dead ends: 118 [2018-02-04 04:16:48,038 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 116 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-02-04 04:16:48,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-02-04 04:16:48,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 118. [2018-02-04 04:16:48,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-02-04 04:16:48,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 118 transitions. [2018-02-04 04:16:48,041 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 118 transitions. Word has length 116 [2018-02-04 04:16:48,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:48,041 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 118 transitions. [2018-02-04 04:16:48,041 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-04 04:16:48,041 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 118 transitions. [2018-02-04 04:16:48,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-02-04 04:16:48,042 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:48,042 INFO L351 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:48,042 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:48,043 INFO L82 PathProgramCache]: Analyzing trace with hash 680173772, now seen corresponding path program 3 times [2018-02-04 04:16:48,043 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:48,043 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:48,044 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:48,044 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 04:16:48,044 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:48,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 04:16:48,060 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 04:16:48,231 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:48,231 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 04:16:48,232 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 04:16:48,232 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 04:16:48,278 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-02-04 04:16:48,279 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 04:16:48,284 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 04:16:48,300 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 04:16:48,301 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 04:16:48,301 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20 [2018-02-04 04:16:48,301 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 04:16:48,302 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 04:16:48,302 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=207, Unknown=0, NotChecked=0, Total=380 [2018-02-04 04:16:48,302 INFO L87 Difference]: Start difference. First operand 118 states and 118 transitions. Second operand 20 states. [2018-02-04 04:16:48,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 04:16:48,339 INFO L93 Difference]: Finished difference Result 121 states and 121 transitions. [2018-02-04 04:16:48,343 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 04:16:48,343 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 117 [2018-02-04 04:16:48,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 04:16:48,344 INFO L225 Difference]: With dead ends: 121 [2018-02-04 04:16:48,344 INFO L226 Difference]: Without dead ends: 119 [2018-02-04 04:16:48,344 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 117 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=177, Invalid=243, Unknown=0, NotChecked=0, Total=420 [2018-02-04 04:16:48,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-02-04 04:16:48,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2018-02-04 04:16:48,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-02-04 04:16:48,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 119 transitions. [2018-02-04 04:16:48,347 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 119 transitions. Word has length 117 [2018-02-04 04:16:48,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 04:16:48,347 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 119 transitions. [2018-02-04 04:16:48,347 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 04:16:48,347 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 119 transitions. [2018-02-04 04:16:48,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2018-02-04 04:16:48,348 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 04:16:48,348 INFO L351 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 04:16:48,348 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 04:16:48,348 INFO L82 PathProgramCache]: Analyzing trace with hash 222269482, now seen corresponding path program 4 times [2018-02-04 04:16:48,348 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 04:16:48,348 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 04:16:48,349 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:48,349 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 04:16:48,349 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 04:16:48,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-02-04 04:16:48,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-02-04 04:16:48,442 INFO L410 BasicCegarLoop]: Counterexample might be feasible [2018-02-04 04:16:48,457 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-02-04 04:16:48,463 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-02-04 04:16:48,480 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.02 04:16:48 BoogieIcfgContainer [2018-02-04 04:16:48,480 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-02-04 04:16:48,481 INFO L168 Benchmark]: Toolchain (without parser) took 16378.97 ms. Allocated memory was 393.2 MB in the beginning and 906.0 MB in the end (delta: 512.8 MB). Free memory was 349.9 MB in the beginning and 457.1 MB in the end (delta: -107.2 MB). Peak memory consumption was 405.6 MB. Max. memory is 5.3 GB. [2018-02-04 04:16:48,482 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 393.2 MB. Free memory is still 356.5 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-04 04:16:48,482 INFO L168 Benchmark]: CACSL2BoogieTranslator took 187.79 ms. Allocated memory is still 393.2 MB. Free memory was 349.9 MB in the beginning and 335.4 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB. [2018-02-04 04:16:48,482 INFO L168 Benchmark]: Boogie Preprocessor took 37.01 ms. Allocated memory is still 393.2 MB. Free memory was 335.4 MB in the beginning and 334.0 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. [2018-02-04 04:16:48,483 INFO L168 Benchmark]: RCFGBuilder took 367.81 ms. Allocated memory is still 393.2 MB. Free memory was 334.0 MB in the beginning and 295.6 MB in the end (delta: 38.5 MB). Peak memory consumption was 38.5 MB. Max. memory is 5.3 GB. [2018-02-04 04:16:48,483 INFO L168 Benchmark]: TraceAbstraction took 15783.20 ms. Allocated memory was 393.2 MB in the beginning and 906.0 MB in the end (delta: 512.8 MB). Free memory was 295.6 MB in the beginning and 457.1 MB in the end (delta: -161.5 MB). Peak memory consumption was 351.2 MB. Max. memory is 5.3 GB. [2018-02-04 04:16:48,484 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 393.2 MB. Free memory is still 356.5 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 187.79 ms. Allocated memory is still 393.2 MB. Free memory was 349.9 MB in the beginning and 335.4 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 37.01 ms. Allocated memory is still 393.2 MB. Free memory was 335.4 MB in the beginning and 334.0 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. * RCFGBuilder took 367.81 ms. Allocated memory is still 393.2 MB. Free memory was 334.0 MB in the beginning and 295.6 MB in the end (delta: 38.5 MB). Peak memory consumption was 38.5 MB. Max. memory is 5.3 GB. * TraceAbstraction took 15783.20 ms. Allocated memory was 393.2 MB in the beginning and 906.0 MB in the end (delta: 512.8 MB). Free memory was 295.6 MB in the beginning and 457.1 MB in the end (delta: -161.5 MB). Peak memory consumption was 351.2 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1452]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1452. Possible FailurePath: [L1453] CALL entry_point() [L1445] struct ldv_kobject *kobj; [L1446] CALL, EXPR ldv_kobject_create() [L1406] struct ldv_kobject *kobj; [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] EXPR, FCALL malloc(size) VAL [\old(size)=16, malloc(size)={20:0}, size=16] [L1074] RET return malloc(size); VAL [\old(size)=16, \result={20:0}, malloc(size)={20:0}, size=16] [L1408] EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_malloc(sizeof(*kobj))={20:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) [L1409] COND FALSE !(!kobj) VAL [kobj={20:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={20:0}, memset(kobj, 0, sizeof(*kobj))={20:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={20:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={20:0}, kobj={20:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={20:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={20:0}, kobj={20:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={20:12}] [L1294] RET, FCALL ((&kref->refcount)->counter) = (1) VAL [kref={20:12}, kref={20:12}] [L1382] ldv_kref_init(&kobj->kref) VAL [kobj={20:0}, kobj={20:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [list={20:4}] [L1099] FCALL list->next = list VAL [list={20:4}, list={20:4}] [L1100] FCALL list->prev = list VAL [list={20:4}, list={20:4}] [L1383] RET, FCALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={20:0}, kobj={20:0}] [L1413] ldv_kobject_init(kobj) VAL [kobj={20:0}] [L1414] RET return kobj; VAL [\result={20:0}, kobj={20:0}] [L1446] EXPR ldv_kobject_create() VAL [ldv_kobject_create()={20:0}] [L1446] kobj = ldv_kobject_create() [L1447] CALL f_22_get(kobj) VAL [kobj={20:0}] [L1437] CALL ldv_kobject_get(kobj) VAL [kobj={20:0}] [L1373] COND TRUE \read(*kobj) VAL [kobj={20:0}, kobj={20:0}] [L1374] CALL ldv_kref_get(&kobj->kref) VAL [kref={20:12}] [L1308] CALL ldv_atomic_add_return(1, (&kref->refcount)) VAL [\old(i)=1, v={20:12}] [L1255] int temp; VAL [\old(i)=1, i=1, v={20:12}, v={20:12}] [L1256] EXPR, FCALL v->counter VAL [\old(i)=1, i=1, v={20:12}, v={20:12}, v->counter=1] [L1256] temp = v->counter [L1257] temp += i VAL [\old(i)=1, i=1, temp=2, v={20:12}, v={20:12}] [L1258] FCALL v->counter = temp VAL [\old(i)=1, i=1, temp=2, v={20:12}, v={20:12}] [L1259] RET return temp; VAL [\old(i)=1, \result=2, i=1, temp=2, v={20:12}, v={20:12}] [L1308] RET ldv_atomic_add_return(1, (&kref->refcount)) VAL [kref={20:12}, kref={20:12}, ldv_atomic_add_return(1, (&kref->refcount))=2] [L1374] ldv_kref_get(&kobj->kref) VAL [kobj={20:0}, kobj={20:0}] [L1375] RET return kobj; VAL [\result={20:0}, kobj={20:0}, kobj={20:0}] [L1437] RET ldv_kobject_get(kobj) VAL [kobj={20:0}, kobj={20:0}, ldv_kobject_get(kobj)={20:0}] [L1447] f_22_get(kobj) VAL [kobj={20:0}] [L1449] CALL ldv_kobject_put(kobj) VAL [kobj={20:0}] [L1361] COND TRUE \read(*kobj) VAL [kobj={20:0}, kobj={20:0}] [L1363] CALL ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kref={20:12}, release={-1:0}] [L1313] CALL, EXPR ldv_kref_sub(kref, 1, release) VAL [\old(count)=1, kref={20:12}, release={-1:0}] [L1281] CALL, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(i)=1, v={20:12}] [L1264] int temp; VAL [\old(i)=1, i=1, v={20:12}, v={20:12}] [L1265] EXPR, FCALL v->counter VAL [\old(i)=1, i=1, v={20:12}, v={20:12}, v->counter=2] [L1265] temp = v->counter [L1266] temp -= i VAL [\old(i)=1, i=1, temp=1, v={20:12}, v={20:12}] [L1267] FCALL v->counter = temp VAL [\old(i)=1, i=1, temp=1, v={20:12}, v={20:12}] [L1268] RET return temp; VAL [\old(i)=1, \result=1, i=1, temp=1, v={20:12}, v={20:12}] [L1281] EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(count)=1, count=1, kref={20:12}, kref={20:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, release={-1:0}, release={-1:0}] [L1281] COND FALSE !((ldv_atomic_sub_return(((int) count), (&kref->refcount)) == 0)) [L1285] RET return 0; VAL [\old(count)=1, \result=0, count=1, kref={20:12}, kref={20:12}, release={-1:0}, release={-1:0}] [L1313] EXPR ldv_kref_sub(kref, 1, release) VAL [kref={20:12}, kref={20:12}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1313] RET return ldv_kref_sub(kref, 1, release); [L1363] ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kobj={20:0}, kobj={20:0}, ldv_kref_put(&kobj->kref, ldv_kobject_release)=0] [L1449] FCALL ldv_kobject_put(kobj) - StatisticsResult: Ultimate Automizer benchmark data CFG has 22 procedures, 146 locations, 23 error locations. UNSAFE Result, 15.7s OverallTime, 33 OverallIterations, 16 TraceHistogramMax, 8.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3996 SDtfs, 981 SDslu, 36692 SDs, 0 SdLazy, 12668 SolverSat, 230 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1753 GetRequests, 1152 SyntacticMatches, 11 SemanticMatches, 590 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 3336 ImplicationChecksByTransitivity, 6.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=165occurred in iteration=9, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 32 MinimizatonAttempts, 109 StatesRemovedByMinimization, 9 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 5.9s InterpolantComputationTime, 3485 NumberOfCodeBlocks, 3443 NumberOfCodeBlocksAsserted, 57 NumberOfCheckSat, 3320 ConstructedInterpolants, 186 QuantifiedInterpolants, 698633 SizeOfPredicates, 119 NumberOfNonLiveVariables, 5761 ConjunctsInSsa, 569 ConjunctsInUnsatCore, 47 InterpolantComputations, 23 PerfectInterpolantSequences, 400/1557 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_4_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-04_04-16-48-489.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_4_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-04_04-16-48-489.csv Received shutdown request...