java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test15_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-c17473d-m [2018-02-04 13:59:37,267 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-04 13:59:37,269 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-04 13:59:37,281 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-04 13:59:37,281 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-04 13:59:37,282 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-04 13:59:37,283 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-04 13:59:37,284 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-04 13:59:37,286 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-04 13:59:37,287 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-04 13:59:37,287 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-04 13:59:37,288 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-04 13:59:37,288 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-04 13:59:37,289 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-04 13:59:37,290 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-04 13:59:37,291 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-04 13:59:37,293 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-04 13:59:37,294 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-04 13:59:37,295 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-04 13:59:37,296 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-04 13:59:37,297 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-02-04 13:59:37,298 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-02-04 13:59:37,298 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-02-04 13:59:37,298 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-02-04 13:59:37,299 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-02-04 13:59:37,300 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-02-04 13:59:37,300 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-02-04 13:59:37,300 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-02-04 13:59:37,301 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-02-04 13:59:37,301 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-04 13:59:37,301 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-04 13:59:37,301 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-02-04 13:59:37,310 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-04 13:59:37,310 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-04 13:59:37,311 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-04 13:59:37,311 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-04 13:59:37,312 INFO L133 SettingsManager]: * Use SBE=true [2018-02-04 13:59:37,312 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-04 13:59:37,312 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-04 13:59:37,312 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-04 13:59:37,312 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-04 13:59:37,312 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-04 13:59:37,312 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-04 13:59:37,313 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-04 13:59:37,313 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-04 13:59:37,313 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-04 13:59:37,313 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-04 13:59:37,313 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-04 13:59:37,313 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-04 13:59:37,313 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-04 13:59:37,314 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-04 13:59:37,314 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 13:59:37,314 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-04 13:59:37,314 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-02-04 13:59:37,314 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-02-04 13:59:37,314 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-02-04 13:59:37,342 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-04 13:59:37,352 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-04 13:59:37,355 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-04 13:59:37,356 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-04 13:59:37,357 INFO L276 PluginConnector]: CDTParser initialized [2018-02-04 13:59:37,358 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test15_true-valid-memsafety_true-termination.i [2018-02-04 13:59:37,502 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-04 13:59:37,504 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-04 13:59:37,504 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-04 13:59:37,504 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-04 13:59:37,511 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-04 13:59:37,512 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 01:59:37" (1/1) ... [2018-02-04 13:59:37,514 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4b089594 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:59:37, skipping insertion in model container [2018-02-04 13:59:37,514 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 01:59:37" (1/1) ... [2018-02-04 13:59:37,525 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 13:59:37,559 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 13:59:37,650 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 13:59:37,667 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 13:59:37,677 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:59:37 WrapperNode [2018-02-04 13:59:37,677 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-04 13:59:37,677 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-04 13:59:37,677 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-04 13:59:37,678 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-04 13:59:37,689 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:59:37" (1/1) ... [2018-02-04 13:59:37,689 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:59:37" (1/1) ... [2018-02-04 13:59:37,697 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:59:37" (1/1) ... [2018-02-04 13:59:37,697 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:59:37" (1/1) ... [2018-02-04 13:59:37,702 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:59:37" (1/1) ... [2018-02-04 13:59:37,704 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:59:37" (1/1) ... [2018-02-04 13:59:37,705 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:59:37" (1/1) ... [2018-02-04 13:59:37,707 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-04 13:59:37,707 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-04 13:59:37,707 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-04 13:59:37,708 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-04 13:59:37,708 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:59:37" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 13:59:37,742 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-04 13:59:37,742 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-04 13:59:37,742 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-02-04 13:59:37,742 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-02-04 13:59:37,743 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-02-04 13:59:37,743 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-02-04 13:59:37,743 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-02-04 13:59:37,743 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_hid_get_drvdata [2018-02-04 13:59:37,743 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_hid_set_drvdata [2018-02-04 13:59:37,743 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_init_arvo_device_struct [2018-02-04 13:59:37,743 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_init_specials [2018-02-04 13:59:37,743 INFO L136 BoogieDeclarations]: Found implementation of procedure lvd_arvo_remove_specials [2018-02-04 13:59:37,743 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_probe [2018-02-04 13:59:37,743 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_remove [2018-02-04 13:59:37,743 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-02-04 13:59:37,743 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-04 13:59:37,743 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-02-04 13:59:37,744 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-02-04 13:59:37,744 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-02-04 13:59:37,744 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-02-04 13:59:37,744 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-02-04 13:59:37,744 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-02-04 13:59:37,744 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-02-04 13:59:37,744 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-02-04 13:59:37,744 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-02-04 13:59:37,744 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-02-04 13:59:37,744 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-02-04 13:59:37,744 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-02-04 13:59:37,744 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-02-04 13:59:37,744 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-02-04 13:59:37,744 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-02-04 13:59:37,744 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-02-04 13:59:37,745 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-02-04 13:59:37,745 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-02-04 13:59:37,745 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_hid_get_drvdata [2018-02-04 13:59:37,745 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_hid_set_drvdata [2018-02-04 13:59:37,745 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_init_arvo_device_struct [2018-02-04 13:59:37,745 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_init_specials [2018-02-04 13:59:37,745 INFO L128 BoogieDeclarations]: Found specification of procedure lvd_arvo_remove_specials [2018-02-04 13:59:37,745 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_probe [2018-02-04 13:59:37,745 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_remove [2018-02-04 13:59:37,745 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-02-04 13:59:37,745 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-04 13:59:37,745 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-04 13:59:37,745 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-04 13:59:38,085 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-04 13:59:38,085 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 01:59:38 BoogieIcfgContainer [2018-02-04 13:59:38,085 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-04 13:59:38,086 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-04 13:59:38,086 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-04 13:59:38,089 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-04 13:59:38,089 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 04.02 01:59:37" (1/3) ... [2018-02-04 13:59:38,090 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@47e68a8e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 01:59:38, skipping insertion in model container [2018-02-04 13:59:38,090 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 01:59:37" (2/3) ... [2018-02-04 13:59:38,090 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@47e68a8e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 01:59:38, skipping insertion in model container [2018-02-04 13:59:38,090 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 01:59:38" (3/3) ... [2018-02-04 13:59:38,091 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test15_true-valid-memsafety_true-termination.i [2018-02-04 13:59:38,097 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-02-04 13:59:38,102 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 45 error locations. [2018-02-04 13:59:38,124 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-04 13:59:38,124 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-04 13:59:38,124 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-02-04 13:59:38,124 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-02-04 13:59:38,124 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-04 13:59:38,124 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-04 13:59:38,124 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-04 13:59:38,124 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-04 13:59:38,125 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-04 13:59:38,135 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states. [2018-02-04 13:59:38,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-02-04 13:59:38,143 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 13:59:38,143 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 13:59:38,143 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 13:59:38,146 INFO L82 PathProgramCache]: Analyzing trace with hash -26265707, now seen corresponding path program 1 times [2018-02-04 13:59:38,147 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 13:59:38,147 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 13:59:38,179 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:38,180 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:38,180 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:38,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:38,217 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 13:59:38,266 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 13:59:38,268 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 13:59:38,268 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-04 13:59:38,269 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-04 13:59:38,332 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-04 13:59:38,332 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 13:59:38,334 INFO L87 Difference]: Start difference. First operand 173 states. Second operand 3 states. [2018-02-04 13:59:38,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 13:59:38,530 INFO L93 Difference]: Finished difference Result 230 states and 259 transitions. [2018-02-04 13:59:38,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-04 13:59:38,531 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2018-02-04 13:59:38,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 13:59:38,547 INFO L225 Difference]: With dead ends: 230 [2018-02-04 13:59:38,547 INFO L226 Difference]: Without dead ends: 224 [2018-02-04 13:59:38,548 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 13:59:38,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-02-04 13:59:38,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 174. [2018-02-04 13:59:38,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-02-04 13:59:38,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 190 transitions. [2018-02-04 13:59:38,588 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 190 transitions. Word has length 16 [2018-02-04 13:59:38,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 13:59:38,589 INFO L432 AbstractCegarLoop]: Abstraction has 174 states and 190 transitions. [2018-02-04 13:59:38,589 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-04 13:59:38,589 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 190 transitions. [2018-02-04 13:59:38,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-02-04 13:59:38,590 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 13:59:38,590 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 13:59:38,590 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 13:59:38,591 INFO L82 PathProgramCache]: Analyzing trace with hash -325108585, now seen corresponding path program 1 times [2018-02-04 13:59:38,591 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 13:59:38,591 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 13:59:38,592 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:38,592 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:38,593 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:38,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:38,607 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 13:59:38,645 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 13:59:38,645 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 13:59:38,646 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 13:59:38,647 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 13:59:38,647 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 13:59:38,647 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 13:59:38,648 INFO L87 Difference]: Start difference. First operand 174 states and 190 transitions. Second operand 6 states. [2018-02-04 13:59:38,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 13:59:38,703 INFO L93 Difference]: Finished difference Result 215 states and 240 transitions. [2018-02-04 13:59:38,703 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 13:59:38,704 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-02-04 13:59:38,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 13:59:38,705 INFO L225 Difference]: With dead ends: 215 [2018-02-04 13:59:38,705 INFO L226 Difference]: Without dead ends: 215 [2018-02-04 13:59:38,706 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 13:59:38,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 215 states. [2018-02-04 13:59:38,714 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 215 to 170. [2018-02-04 13:59:38,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-02-04 13:59:38,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 183 transitions. [2018-02-04 13:59:38,716 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 183 transitions. Word has length 18 [2018-02-04 13:59:38,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 13:59:38,717 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 183 transitions. [2018-02-04 13:59:38,717 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 13:59:38,717 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 183 transitions. [2018-02-04 13:59:38,717 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-02-04 13:59:38,717 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 13:59:38,718 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 13:59:38,718 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 13:59:38,718 INFO L82 PathProgramCache]: Analyzing trace with hash 743711378, now seen corresponding path program 1 times [2018-02-04 13:59:38,718 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 13:59:38,718 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 13:59:38,719 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:38,720 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:38,720 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:38,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:38,730 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 13:59:38,770 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 13:59:38,770 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 13:59:38,770 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 13:59:38,779 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:38,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:38,807 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 13:59:38,835 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 13:59:38,864 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 13:59:38,864 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4] total 8 [2018-02-04 13:59:38,864 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 13:59:38,864 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 13:59:38,865 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-02-04 13:59:38,865 INFO L87 Difference]: Start difference. First operand 170 states and 183 transitions. Second operand 8 states. [2018-02-04 13:59:38,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 13:59:38,912 INFO L93 Difference]: Finished difference Result 174 states and 188 transitions. [2018-02-04 13:59:38,915 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 13:59:38,916 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 21 [2018-02-04 13:59:38,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 13:59:38,917 INFO L225 Difference]: With dead ends: 174 [2018-02-04 13:59:38,917 INFO L226 Difference]: Without dead ends: 172 [2018-02-04 13:59:38,917 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-02-04 13:59:38,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-02-04 13:59:38,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 172. [2018-02-04 13:59:38,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-02-04 13:59:38,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 186 transitions. [2018-02-04 13:59:38,925 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 186 transitions. Word has length 21 [2018-02-04 13:59:38,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 13:59:38,926 INFO L432 AbstractCegarLoop]: Abstraction has 172 states and 186 transitions. [2018-02-04 13:59:38,926 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 13:59:38,926 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 186 transitions. [2018-02-04 13:59:38,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-02-04 13:59:38,926 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 13:59:38,927 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 13:59:38,927 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 13:59:38,927 INFO L82 PathProgramCache]: Analyzing trace with hash 667479760, now seen corresponding path program 1 times [2018-02-04 13:59:38,927 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 13:59:38,927 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 13:59:38,928 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:38,928 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:38,928 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:38,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:38,940 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 13:59:38,984 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 13:59:38,984 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 13:59:38,984 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 13:59:38,992 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:39,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:39,012 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 13:59:39,024 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 13:59:39,044 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 13:59:39,044 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-02-04 13:59:39,044 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 13:59:39,044 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 13:59:39,044 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 13:59:39,045 INFO L87 Difference]: Start difference. First operand 172 states and 186 transitions. Second operand 6 states. [2018-02-04 13:59:39,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 13:59:39,076 INFO L93 Difference]: Finished difference Result 171 states and 185 transitions. [2018-02-04 13:59:39,077 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 13:59:39,077 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-02-04 13:59:39,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 13:59:39,078 INFO L225 Difference]: With dead ends: 171 [2018-02-04 13:59:39,078 INFO L226 Difference]: Without dead ends: 171 [2018-02-04 13:59:39,078 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 21 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 13:59:39,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-02-04 13:59:39,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 171. [2018-02-04 13:59:39,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-02-04 13:59:39,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 185 transitions. [2018-02-04 13:59:39,089 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 185 transitions. Word has length 23 [2018-02-04 13:59:39,089 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 13:59:39,089 INFO L432 AbstractCegarLoop]: Abstraction has 171 states and 185 transitions. [2018-02-04 13:59:39,089 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 13:59:39,089 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 185 transitions. [2018-02-04 13:59:39,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-02-04 13:59:39,090 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 13:59:39,090 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 13:59:39,090 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 13:59:39,090 INFO L82 PathProgramCache]: Analyzing trace with hash 667479761, now seen corresponding path program 1 times [2018-02-04 13:59:39,090 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 13:59:39,090 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 13:59:39,092 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:39,092 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:39,092 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:39,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:39,102 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 13:59:39,146 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 13:59:39,146 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 13:59:39,146 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 13:59:39,151 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:39,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:39,165 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 13:59:39,183 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 13:59:39,184 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:39,186 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 13:59:39,186 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-04 13:59:39,192 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 13:59:39,208 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 13:59:39,208 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-02-04 13:59:39,208 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 13:59:39,208 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 13:59:39,209 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 13:59:39,209 INFO L87 Difference]: Start difference. First operand 171 states and 185 transitions. Second operand 7 states. [2018-02-04 13:59:39,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 13:59:39,521 INFO L93 Difference]: Finished difference Result 216 states and 238 transitions. [2018-02-04 13:59:39,521 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 13:59:39,521 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-02-04 13:59:39,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 13:59:39,523 INFO L225 Difference]: With dead ends: 216 [2018-02-04 13:59:39,523 INFO L226 Difference]: Without dead ends: 216 [2018-02-04 13:59:39,523 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-02-04 13:59:39,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-02-04 13:59:39,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 184. [2018-02-04 13:59:39,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-02-04 13:59:39,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 211 transitions. [2018-02-04 13:59:39,532 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 211 transitions. Word has length 23 [2018-02-04 13:59:39,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 13:59:39,532 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 211 transitions. [2018-02-04 13:59:39,532 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 13:59:39,533 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 211 transitions. [2018-02-04 13:59:39,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-02-04 13:59:39,533 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 13:59:39,533 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 13:59:39,533 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 13:59:39,534 INFO L82 PathProgramCache]: Analyzing trace with hash -314305773, now seen corresponding path program 1 times [2018-02-04 13:59:39,534 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 13:59:39,534 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 13:59:39,535 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:39,535 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:39,535 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:39,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:39,544 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 13:59:39,570 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 13:59:39,571 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 13:59:39,571 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 13:59:39,571 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 13:59:39,571 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 13:59:39,571 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 13:59:39,572 INFO L87 Difference]: Start difference. First operand 184 states and 211 transitions. Second operand 6 states. [2018-02-04 13:59:39,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 13:59:39,637 INFO L93 Difference]: Finished difference Result 220 states and 251 transitions. [2018-02-04 13:59:39,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 13:59:39,638 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-02-04 13:59:39,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 13:59:39,639 INFO L225 Difference]: With dead ends: 220 [2018-02-04 13:59:39,639 INFO L226 Difference]: Without dead ends: 220 [2018-02-04 13:59:39,639 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 13:59:39,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-02-04 13:59:39,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 184. [2018-02-04 13:59:39,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-02-04 13:59:39,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 210 transitions. [2018-02-04 13:59:39,646 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 210 transitions. Word has length 25 [2018-02-04 13:59:39,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 13:59:39,646 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 210 transitions. [2018-02-04 13:59:39,646 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 13:59:39,647 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 210 transitions. [2018-02-04 13:59:39,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-02-04 13:59:39,647 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 13:59:39,647 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 13:59:39,647 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 13:59:39,648 INFO L82 PathProgramCache]: Analyzing trace with hash -808960356, now seen corresponding path program 1 times [2018-02-04 13:59:39,648 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 13:59:39,648 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 13:59:39,649 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:39,649 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:39,649 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:39,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:39,660 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 13:59:39,783 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 13:59:39,784 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 13:59:39,784 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 13:59:39,788 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:39,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:39,799 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 13:59:39,888 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 13:59:39,917 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 13:59:39,917 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 8] total 12 [2018-02-04 13:59:39,918 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-04 13:59:39,918 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-04 13:59:39,918 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=122, Unknown=9, NotChecked=0, Total=156 [2018-02-04 13:59:39,918 INFO L87 Difference]: Start difference. First operand 184 states and 210 transitions. Second operand 13 states. [2018-02-04 13:59:40,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 13:59:40,777 INFO L93 Difference]: Finished difference Result 220 states and 242 transitions. [2018-02-04 13:59:40,778 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 13:59:40,778 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 26 [2018-02-04 13:59:40,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 13:59:40,779 INFO L225 Difference]: With dead ends: 220 [2018-02-04 13:59:40,779 INFO L226 Difference]: Without dead ends: 216 [2018-02-04 13:59:40,780 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 24 SyntacticMatches, 3 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=50, Invalid=247, Unknown=9, NotChecked=0, Total=306 [2018-02-04 13:59:40,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-02-04 13:59:40,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 183. [2018-02-04 13:59:40,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-02-04 13:59:40,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 208 transitions. [2018-02-04 13:59:40,787 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 208 transitions. Word has length 26 [2018-02-04 13:59:40,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 13:59:40,788 INFO L432 AbstractCegarLoop]: Abstraction has 183 states and 208 transitions. [2018-02-04 13:59:40,788 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-04 13:59:40,788 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 208 transitions. [2018-02-04 13:59:40,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-02-04 13:59:40,789 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 13:59:40,789 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 13:59:40,789 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 13:59:40,790 INFO L82 PathProgramCache]: Analyzing trace with hash 437179314, now seen corresponding path program 1 times [2018-02-04 13:59:40,790 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 13:59:40,790 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 13:59:40,791 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:40,791 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:40,791 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:40,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:40,800 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 13:59:40,842 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-02-04 13:59:40,842 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 13:59:40,842 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 13:59:40,850 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:40,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:40,867 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 13:59:40,873 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 13:59:40,890 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 13:59:40,890 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 5 [2018-02-04 13:59:40,890 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 13:59:40,890 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 13:59:40,890 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 13:59:40,890 INFO L87 Difference]: Start difference. First operand 183 states and 208 transitions. Second operand 5 states. [2018-02-04 13:59:40,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 13:59:40,909 INFO L93 Difference]: Finished difference Result 173 states and 185 transitions. [2018-02-04 13:59:40,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 13:59:40,910 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2018-02-04 13:59:40,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 13:59:40,911 INFO L225 Difference]: With dead ends: 173 [2018-02-04 13:59:40,911 INFO L226 Difference]: Without dead ends: 171 [2018-02-04 13:59:40,911 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 27 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 13:59:40,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-02-04 13:59:40,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 171. [2018-02-04 13:59:40,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-02-04 13:59:40,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 183 transitions. [2018-02-04 13:59:40,915 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 183 transitions. Word has length 28 [2018-02-04 13:59:40,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 13:59:40,915 INFO L432 AbstractCegarLoop]: Abstraction has 171 states and 183 transitions. [2018-02-04 13:59:40,916 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 13:59:40,916 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 183 transitions. [2018-02-04 13:59:40,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-02-04 13:59:40,916 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 13:59:40,916 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 13:59:40,916 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 13:59:40,917 INFO L82 PathProgramCache]: Analyzing trace with hash 1753876656, now seen corresponding path program 2 times [2018-02-04 13:59:40,917 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 13:59:40,917 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 13:59:40,918 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:40,918 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:40,918 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:40,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:40,925 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 13:59:40,960 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 9 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 13:59:40,960 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 13:59:40,960 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 13:59:40,966 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 13:59:40,983 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 13:59:40,983 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 13:59:40,985 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 13:59:41,003 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 13:59:41,004 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:41,005 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 13:59:41,005 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-04 13:59:41,011 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 9 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 13:59:41,028 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 13:59:41,028 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-02-04 13:59:41,029 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 13:59:41,029 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 13:59:41,029 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 13:59:41,029 INFO L87 Difference]: Start difference. First operand 171 states and 183 transitions. Second operand 7 states. [2018-02-04 13:59:41,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 13:59:41,346 INFO L93 Difference]: Finished difference Result 189 states and 205 transitions. [2018-02-04 13:59:41,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 13:59:41,347 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 30 [2018-02-04 13:59:41,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 13:59:41,348 INFO L225 Difference]: With dead ends: 189 [2018-02-04 13:59:41,348 INFO L226 Difference]: Without dead ends: 189 [2018-02-04 13:59:41,349 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-02-04 13:59:41,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-02-04 13:59:41,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 186. [2018-02-04 13:59:41,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-02-04 13:59:41,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 205 transitions. [2018-02-04 13:59:41,354 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 205 transitions. Word has length 30 [2018-02-04 13:59:41,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 13:59:41,354 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 205 transitions. [2018-02-04 13:59:41,354 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 13:59:41,354 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 205 transitions. [2018-02-04 13:59:41,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-02-04 13:59:41,355 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 13:59:41,355 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 13:59:41,355 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 13:59:41,355 INFO L82 PathProgramCache]: Analyzing trace with hash 1753876657, now seen corresponding path program 1 times [2018-02-04 13:59:41,355 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 13:59:41,356 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 13:59:41,356 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:41,357 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 13:59:41,357 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:41,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:41,366 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 13:59:41,500 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 10 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-02-04 13:59:41,500 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 13:59:41,501 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 13:59:41,509 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:41,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:41,534 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 13:59:41,559 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 13:59:41,559 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:41,571 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 13:59:41,571 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:41,580 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 13:59:41,580 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 13:59:41,639 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 10 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-02-04 13:59:41,672 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 13:59:41,673 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-02-04 13:59:41,673 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-04 13:59:41,673 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-04 13:59:41,673 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2018-02-04 13:59:41,674 INFO L87 Difference]: Start difference. First operand 186 states and 205 transitions. Second operand 13 states. [2018-02-04 13:59:42,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 13:59:42,125 INFO L93 Difference]: Finished difference Result 216 states and 240 transitions. [2018-02-04 13:59:42,125 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 13:59:42,125 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 30 [2018-02-04 13:59:42,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 13:59:42,126 INFO L225 Difference]: With dead ends: 216 [2018-02-04 13:59:42,126 INFO L226 Difference]: Without dead ends: 216 [2018-02-04 13:59:42,127 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2018-02-04 13:59:42,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-02-04 13:59:42,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 204. [2018-02-04 13:59:42,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-02-04 13:59:42,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 236 transitions. [2018-02-04 13:59:42,132 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 236 transitions. Word has length 30 [2018-02-04 13:59:42,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 13:59:42,133 INFO L432 AbstractCegarLoop]: Abstraction has 204 states and 236 transitions. [2018-02-04 13:59:42,133 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-04 13:59:42,133 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 236 transitions. [2018-02-04 13:59:42,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-02-04 13:59:42,133 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 13:59:42,134 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 13:59:42,134 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 13:59:42,134 INFO L82 PathProgramCache]: Analyzing trace with hash 1756950194, now seen corresponding path program 1 times [2018-02-04 13:59:42,134 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 13:59:42,134 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 13:59:42,135 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:42,135 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:42,135 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:42,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:42,143 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 13:59:42,205 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 13:59:42,205 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 13:59:42,205 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 13:59:42,210 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:42,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:42,222 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 13:59:42,225 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 13:59:42,225 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:42,226 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 13:59:42,226 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-04 13:59:42,240 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:42,241 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:42,242 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 13:59:42,243 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:42,246 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 13:59:42,246 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-02-04 13:59:42,265 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 13:59:42,287 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 13:59:42,288 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 10 [2018-02-04 13:59:42,288 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 13:59:42,288 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 13:59:42,288 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=86, Unknown=1, NotChecked=0, Total=110 [2018-02-04 13:59:42,289 INFO L87 Difference]: Start difference. First operand 204 states and 236 transitions. Second operand 11 states. [2018-02-04 13:59:42,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 13:59:42,695 INFO L93 Difference]: Finished difference Result 223 states and 255 transitions. [2018-02-04 13:59:42,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 13:59:42,695 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-02-04 13:59:42,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 13:59:42,696 INFO L225 Difference]: With dead ends: 223 [2018-02-04 13:59:42,696 INFO L226 Difference]: Without dead ends: 223 [2018-02-04 13:59:42,696 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 29 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=118, Unknown=1, NotChecked=0, Total=156 [2018-02-04 13:59:42,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2018-02-04 13:59:42,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 210. [2018-02-04 13:59:42,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2018-02-04 13:59:42,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 244 transitions. [2018-02-04 13:59:42,700 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 244 transitions. Word has length 32 [2018-02-04 13:59:42,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 13:59:42,700 INFO L432 AbstractCegarLoop]: Abstraction has 210 states and 244 transitions. [2018-02-04 13:59:42,700 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 13:59:42,700 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 244 transitions. [2018-02-04 13:59:42,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-02-04 13:59:42,701 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 13:59:42,701 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 13:59:42,701 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 13:59:42,701 INFO L82 PathProgramCache]: Analyzing trace with hash 1756950195, now seen corresponding path program 1 times [2018-02-04 13:59:42,701 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 13:59:42,702 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 13:59:42,702 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:42,702 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:42,702 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:42,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:42,710 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 13:59:42,895 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 5 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-02-04 13:59:42,896 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 13:59:42,896 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 13:59:42,902 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:42,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:42,918 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 13:59:42,928 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-02-04 13:59:42,929 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:42,942 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-02-04 13:59:42,942 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:42,955 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-02-04 13:59:42,956 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:42,957 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-02-04 13:59:42,957 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:42,969 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 13:59:42,969 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46 [2018-02-04 13:59:43,084 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:43,085 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:43,085 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 28 [2018-02-04 13:59:43,086 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:43,103 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:43,103 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 37 [2018-02-04 13:59:43,104 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:43,121 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:43,122 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:43,122 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 26 [2018-02-04 13:59:43,123 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:43,136 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-02-04 13:59:43,137 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:43,150 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-02-04 13:59:43,150 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:67, output treesize:49 [2018-02-04 13:59:43,184 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 5 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-02-04 13:59:43,202 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 13:59:43,202 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 17 [2018-02-04 13:59:43,202 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-02-04 13:59:43,202 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-02-04 13:59:43,202 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=261, Unknown=1, NotChecked=0, Total=306 [2018-02-04 13:59:43,202 INFO L87 Difference]: Start difference. First operand 210 states and 244 transitions. Second operand 18 states. [2018-02-04 13:59:55,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 13:59:55,331 INFO L93 Difference]: Finished difference Result 224 states and 251 transitions. [2018-02-04 13:59:55,331 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-02-04 13:59:55,331 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 32 [2018-02-04 13:59:55,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 13:59:55,332 INFO L225 Difference]: With dead ends: 224 [2018-02-04 13:59:55,332 INFO L226 Difference]: Without dead ends: 224 [2018-02-04 13:59:55,333 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=77, Invalid=384, Unknown=1, NotChecked=0, Total=462 [2018-02-04 13:59:55,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-02-04 13:59:55,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 179. [2018-02-04 13:59:55,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-02-04 13:59:55,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 195 transitions. [2018-02-04 13:59:55,338 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 195 transitions. Word has length 32 [2018-02-04 13:59:55,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 13:59:55,338 INFO L432 AbstractCegarLoop]: Abstraction has 179 states and 195 transitions. [2018-02-04 13:59:55,338 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-02-04 13:59:55,338 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 195 transitions. [2018-02-04 13:59:55,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-02-04 13:59:55,339 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 13:59:55,339 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 13:59:55,339 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 13:59:55,339 INFO L82 PathProgramCache]: Analyzing trace with hash 860002885, now seen corresponding path program 1 times [2018-02-04 13:59:55,339 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 13:59:55,339 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 13:59:55,340 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:55,340 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:55,340 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:55,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:55,347 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 13:59:55,478 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 13:59:55,478 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 13:59:55,478 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 13:59:55,486 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:55,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:55,508 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 13:59:55,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 13:59:55,513 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:55,515 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 13:59:55,515 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-04 13:59:55,544 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:55,545 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:55,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 13:59:55,546 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:55,550 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 13:59:55,550 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-02-04 13:59:55,596 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:55,596 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-02-04 13:59:55,597 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:55,601 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 13:59:55,601 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:25, output treesize:15 [2018-02-04 13:59:55,634 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 8 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 13:59:55,667 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 13:59:55,667 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 16 [2018-02-04 13:59:55,668 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-02-04 13:59:55,668 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-02-04 13:59:55,668 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=232, Unknown=0, NotChecked=0, Total=272 [2018-02-04 13:59:55,668 INFO L87 Difference]: Start difference. First operand 179 states and 195 transitions. Second operand 17 states. [2018-02-04 13:59:56,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 13:59:56,220 INFO L93 Difference]: Finished difference Result 193 states and 213 transitions. [2018-02-04 13:59:56,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 13:59:56,221 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 35 [2018-02-04 13:59:56,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 13:59:56,221 INFO L225 Difference]: With dead ends: 193 [2018-02-04 13:59:56,222 INFO L226 Difference]: Without dead ends: 193 [2018-02-04 13:59:56,222 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 29 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=70, Invalid=392, Unknown=0, NotChecked=0, Total=462 [2018-02-04 13:59:56,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-02-04 13:59:56,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 179. [2018-02-04 13:59:56,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-02-04 13:59:56,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 195 transitions. [2018-02-04 13:59:56,225 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 195 transitions. Word has length 35 [2018-02-04 13:59:56,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 13:59:56,225 INFO L432 AbstractCegarLoop]: Abstraction has 179 states and 195 transitions. [2018-02-04 13:59:56,225 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-02-04 13:59:56,225 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 195 transitions. [2018-02-04 13:59:56,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-04 13:59:56,226 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 13:59:56,226 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 13:59:56,226 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 13:59:56,226 INFO L82 PathProgramCache]: Analyzing trace with hash 890317459, now seen corresponding path program 1 times [2018-02-04 13:59:56,226 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 13:59:56,226 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 13:59:56,227 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:56,227 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:56,227 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:56,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:56,232 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 13:59:56,271 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-04 13:59:56,272 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 13:59:56,272 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 13:59:56,272 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 13:59:56,272 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 13:59:56,272 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 13:59:56,272 INFO L87 Difference]: Start difference. First operand 179 states and 195 transitions. Second operand 6 states. [2018-02-04 13:59:56,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 13:59:56,319 INFO L93 Difference]: Finished difference Result 187 states and 203 transitions. [2018-02-04 13:59:56,319 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 13:59:56,319 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 36 [2018-02-04 13:59:56,319 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 13:59:56,320 INFO L225 Difference]: With dead ends: 187 [2018-02-04 13:59:56,320 INFO L226 Difference]: Without dead ends: 187 [2018-02-04 13:59:56,320 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-02-04 13:59:56,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-02-04 13:59:56,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 183. [2018-02-04 13:59:56,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-02-04 13:59:56,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 199 transitions. [2018-02-04 13:59:56,323 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 199 transitions. Word has length 36 [2018-02-04 13:59:56,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 13:59:56,323 INFO L432 AbstractCegarLoop]: Abstraction has 183 states and 199 transitions. [2018-02-04 13:59:56,323 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 13:59:56,323 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 199 transitions. [2018-02-04 13:59:56,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-02-04 13:59:56,323 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 13:59:56,323 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 13:59:56,323 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 13:59:56,323 INFO L82 PathProgramCache]: Analyzing trace with hash 866086568, now seen corresponding path program 1 times [2018-02-04 13:59:56,323 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 13:59:56,324 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 13:59:56,324 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:56,324 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:56,324 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:56,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:56,334 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 13:59:56,624 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-04 13:59:56,625 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 13:59:56,625 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 13:59:56,630 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:56,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:56,647 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 13:59:56,915 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-04 13:59:56,946 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 13:59:56,946 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 12] total 19 [2018-02-04 13:59:56,946 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 13:59:56,946 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 13:59:56,946 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=327, Unknown=10, NotChecked=0, Total=380 [2018-02-04 13:59:56,946 INFO L87 Difference]: Start difference. First operand 183 states and 199 transitions. Second operand 20 states. [2018-02-04 13:59:58,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 13:59:58,129 INFO L93 Difference]: Finished difference Result 195 states and 211 transitions. [2018-02-04 13:59:58,130 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-02-04 13:59:58,130 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 38 [2018-02-04 13:59:58,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 13:59:58,130 INFO L225 Difference]: With dead ends: 195 [2018-02-04 13:59:58,130 INFO L226 Difference]: Without dead ends: 184 [2018-02-04 13:59:58,131 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 33 SyntacticMatches, 6 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=89, Invalid=657, Unknown=10, NotChecked=0, Total=756 [2018-02-04 13:59:58,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-02-04 13:59:58,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 177. [2018-02-04 13:59:58,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-02-04 13:59:58,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 192 transitions. [2018-02-04 13:59:58,133 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 192 transitions. Word has length 38 [2018-02-04 13:59:58,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 13:59:58,133 INFO L432 AbstractCegarLoop]: Abstraction has 177 states and 192 transitions. [2018-02-04 13:59:58,133 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 13:59:58,133 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 192 transitions. [2018-02-04 13:59:58,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-02-04 13:59:58,134 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 13:59:58,134 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 13:59:58,134 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 13:59:58,134 INFO L82 PathProgramCache]: Analyzing trace with hash 499648277, now seen corresponding path program 1 times [2018-02-04 13:59:58,134 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 13:59:58,134 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 13:59:58,135 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:58,135 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:58,135 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:58,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:58,139 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 13:59:58,163 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 13:59:58,163 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 13:59:58,163 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 13:59:58,163 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 13:59:58,163 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 13:59:58,163 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 13:59:58,163 INFO L87 Difference]: Start difference. First operand 177 states and 192 transitions. Second operand 7 states. [2018-02-04 13:59:58,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 13:59:58,309 INFO L93 Difference]: Finished difference Result 176 states and 191 transitions. [2018-02-04 13:59:58,310 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 13:59:58,310 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 38 [2018-02-04 13:59:58,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 13:59:58,311 INFO L225 Difference]: With dead ends: 176 [2018-02-04 13:59:58,311 INFO L226 Difference]: Without dead ends: 176 [2018-02-04 13:59:58,311 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-02-04 13:59:58,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-02-04 13:59:58,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2018-02-04 13:59:58,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-02-04 13:59:58,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 191 transitions. [2018-02-04 13:59:58,315 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 191 transitions. Word has length 38 [2018-02-04 13:59:58,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 13:59:58,315 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 191 transitions. [2018-02-04 13:59:58,315 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 13:59:58,315 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 191 transitions. [2018-02-04 13:59:58,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-02-04 13:59:58,316 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 13:59:58,316 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 13:59:58,316 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 13:59:58,316 INFO L82 PathProgramCache]: Analyzing trace with hash 499648278, now seen corresponding path program 1 times [2018-02-04 13:59:58,316 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 13:59:58,316 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 13:59:58,317 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:58,317 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:58,317 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:58,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:58,326 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 13:59:58,440 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-02-04 13:59:58,440 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 13:59:58,440 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 13:59:58,441 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 13:59:58,441 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 13:59:58,441 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-04 13:59:58,441 INFO L87 Difference]: Start difference. First operand 176 states and 191 transitions. Second operand 8 states. [2018-02-04 13:59:58,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 13:59:58,622 INFO L93 Difference]: Finished difference Result 177 states and 192 transitions. [2018-02-04 13:59:58,622 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 13:59:58,622 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 38 [2018-02-04 13:59:58,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 13:59:58,623 INFO L225 Difference]: With dead ends: 177 [2018-02-04 13:59:58,623 INFO L226 Difference]: Without dead ends: 177 [2018-02-04 13:59:58,624 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2018-02-04 13:59:58,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-02-04 13:59:58,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 175. [2018-02-04 13:59:58,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-02-04 13:59:58,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 190 transitions. [2018-02-04 13:59:58,630 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 190 transitions. Word has length 38 [2018-02-04 13:59:58,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 13:59:58,630 INFO L432 AbstractCegarLoop]: Abstraction has 175 states and 190 transitions. [2018-02-04 13:59:58,630 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 13:59:58,630 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 190 transitions. [2018-02-04 13:59:58,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-02-04 13:59:58,631 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 13:59:58,631 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 13:59:58,631 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 13:59:58,631 INFO L82 PathProgramCache]: Analyzing trace with hash -874341065, now seen corresponding path program 1 times [2018-02-04 13:59:58,631 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 13:59:58,631 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 13:59:58,632 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:58,632 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:58,632 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 13:59:58,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:58,645 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 13:59:58,962 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 13:59:58,962 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 13:59:58,962 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 13:59:58,970 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 13:59:58,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 13:59:59,001 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 13:59:59,018 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-02-04 13:59:59,019 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:59,040 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-02-04 13:59:59,040 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:59,056 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-02-04 13:59:59,056 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:59,059 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-02-04 13:59:59,059 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:59,070 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 13:59:59,070 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46 [2018-02-04 13:59:59,268 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,268 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,269 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 44 [2018-02-04 13:59:59,269 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:59,316 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,317 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 41 [2018-02-04 13:59:59,318 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:59,349 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,350 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 47 [2018-02-04 13:59:59,350 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:59,382 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,383 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,383 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 41 [2018-02-04 13:59:59,384 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:59,409 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 4 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 13:59:59,409 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:79, output treesize:69 [2018-02-04 13:59:59,631 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,632 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,632 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 46 [2018-02-04 13:59:59,633 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:59,694 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 45 [2018-02-04 13:59:59,695 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:59,756 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,756 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,757 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,757 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,758 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-02-04 13:59:59,758 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:59,817 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,818 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,818 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,819 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 48 [2018-02-04 13:59:59,820 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:59,881 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,881 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,882 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 67 [2018-02-04 13:59:59,882 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-02-04 13:59:59,941 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,942 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 13:59:59,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 63 [2018-02-04 13:59:59,945 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 14:00:00,007 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:00:00,007 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:00:00,008 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:00:00,008 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:00:00,009 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 50 [2018-02-04 14:00:00,009 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-02-04 14:00:00,057 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:00:00,058 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:00:00,060 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:00:00,060 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 67 [2018-02-04 14:00:00,061 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-02-04 14:00:00,109 INFO L267 ElimStorePlain]: Start of recursive call 1: 8 dim-0 vars, 8 dim-1 vars, End of recursive call: 8 dim-0 vars, and 4 xjuncts. [2018-02-04 14:00:00,109 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 16 variables, input treesize:213, output treesize:165 [2018-02-04 14:00:04,211 WARN L143 SmtUtils]: Spent 4064ms on a formula simplification that was a NOOP. DAG size: 75 [2018-02-04 14:00:04,218 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 49 [2018-02-04 14:00:04,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:00:04,220 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:00:04,234 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:00:04,295 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 49 [2018-02-04 14:00:04,297 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:00:04,298 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:00:04,306 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:00:04,361 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 51 [2018-02-04 14:00:04,363 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:00:04,363 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 14:00:04,375 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:00:04,424 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 55 [2018-02-04 14:00:04,426 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:00:04,426 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-02-04 14:00:04,437 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:00:04,484 INFO L267 ElimStorePlain]: Start of recursive call 1: 12 dim-0 vars, 4 dim-2 vars, End of recursive call: 8 dim-0 vars, and 4 xjuncts. [2018-02-04 14:00:04,484 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 16 variables, input treesize:217, output treesize:213 [2018-02-04 14:00:04,594 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-02-04 14:00:04,599 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2018-02-04 14:00:04,599 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:00:04,609 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:00:04,652 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 43 [2018-02-04 14:00:04,653 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-02-04 14:00:04,654 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:00:04,660 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:00:04,702 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 49 [2018-02-04 14:00:04,704 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 14 [2018-02-04 14:00:04,704 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:00:04,711 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:00:04,751 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 47 [2018-02-04 14:00:04,753 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 12 [2018-02-04 14:00:04,753 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:00:04,760 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:00:04,805 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 4 dim-2 vars, End of recursive call: 16 dim-0 vars, and 4 xjuncts. [2018-02-04 14:00:04,805 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 20 variables, input treesize:213, output treesize:165 [2018-02-04 14:00:25,994 WARN L146 SmtUtils]: Spent 19119ms on a formula simplification. DAG size of input: 91 DAG size of output 71 [2018-02-04 14:00:26,022 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 14:00:26,043 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 14:00:26,043 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 16] total 26 [2018-02-04 14:00:26,044 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-02-04 14:00:26,044 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-02-04 14:00:26,044 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=612, Unknown=3, NotChecked=0, Total=702 [2018-02-04 14:00:26,044 INFO L87 Difference]: Start difference. First operand 175 states and 190 transitions. Second operand 27 states. [2018-02-04 14:00:38,655 WARN L146 SmtUtils]: Spent 2099ms on a formula simplification. DAG size of input: 85 DAG size of output 59 [2018-02-04 14:00:40,984 WARN L146 SmtUtils]: Spent 2273ms on a formula simplification. DAG size of input: 114 DAG size of output 80 [2018-02-04 14:00:43,169 WARN L146 SmtUtils]: Spent 2157ms on a formula simplification. DAG size of input: 90 DAG size of output 64 [2018-02-04 14:00:45,360 WARN L146 SmtUtils]: Spent 2121ms on a formula simplification. DAG size of input: 85 DAG size of output 85 [2018-02-04 14:00:55,851 WARN L146 SmtUtils]: Spent 10425ms on a formula simplification. DAG size of input: 91 DAG size of output 91 [2018-02-04 14:01:03,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:01:03,084 INFO L93 Difference]: Finished difference Result 205 states and 224 transitions. [2018-02-04 14:01:03,084 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 14:01:03,084 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 40 [2018-02-04 14:01:03,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:01:03,085 INFO L225 Difference]: With dead ends: 205 [2018-02-04 14:01:03,085 INFO L226 Difference]: Without dead ends: 205 [2018-02-04 14:01:03,086 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 27 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 286 ImplicationChecksByTransitivity, 47.4s TimeCoverageRelationStatistics Valid=182, Invalid=1146, Unknown=4, NotChecked=0, Total=1332 [2018-02-04 14:01:03,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-02-04 14:01:03,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 174. [2018-02-04 14:01:03,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-02-04 14:01:03,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 189 transitions. [2018-02-04 14:01:03,090 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 189 transitions. Word has length 40 [2018-02-04 14:01:03,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:01:03,091 INFO L432 AbstractCegarLoop]: Abstraction has 174 states and 189 transitions. [2018-02-04 14:01:03,091 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-02-04 14:01:03,091 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 189 transitions. [2018-02-04 14:01:03,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-02-04 14:01:03,091 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:01:03,091 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:01:03,091 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:01:03,092 INFO L82 PathProgramCache]: Analyzing trace with hash -904842582, now seen corresponding path program 1 times [2018-02-04 14:01:03,092 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:01:03,092 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:01:03,093 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:03,093 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:03,093 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:03,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:03,101 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:01:03,137 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 14:01:03,138 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:01:03,138 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 14:01:03,138 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 14:01:03,138 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 14:01:03,139 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 14:01:03,139 INFO L87 Difference]: Start difference. First operand 174 states and 189 transitions. Second operand 7 states. [2018-02-04 14:01:03,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:01:03,230 INFO L93 Difference]: Finished difference Result 172 states and 186 transitions. [2018-02-04 14:01:03,230 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 14:01:03,230 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 40 [2018-02-04 14:01:03,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:01:03,231 INFO L225 Difference]: With dead ends: 172 [2018-02-04 14:01:03,231 INFO L226 Difference]: Without dead ends: 172 [2018-02-04 14:01:03,231 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-02-04 14:01:03,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-02-04 14:01:03,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 172. [2018-02-04 14:01:03,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-02-04 14:01:03,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 186 transitions. [2018-02-04 14:01:03,235 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 186 transitions. Word has length 40 [2018-02-04 14:01:03,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:01:03,236 INFO L432 AbstractCegarLoop]: Abstraction has 172 states and 186 transitions. [2018-02-04 14:01:03,236 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 14:01:03,236 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 186 transitions. [2018-02-04 14:01:03,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-02-04 14:01:03,236 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:01:03,237 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:01:03,237 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:01:03,237 INFO L82 PathProgramCache]: Analyzing trace with hash -1596182576, now seen corresponding path program 1 times [2018-02-04 14:01:03,237 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:01:03,237 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:01:03,238 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:03,238 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:03,238 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:03,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:03,247 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:01:03,294 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 14:01:03,295 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:01:03,295 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 14:01:03,295 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 14:01:03,295 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 14:01:03,295 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 14:01:03,295 INFO L87 Difference]: Start difference. First operand 172 states and 186 transitions. Second operand 7 states. [2018-02-04 14:01:03,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:01:03,432 INFO L93 Difference]: Finished difference Result 178 states and 193 transitions. [2018-02-04 14:01:03,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 14:01:03,433 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 45 [2018-02-04 14:01:03,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:01:03,433 INFO L225 Difference]: With dead ends: 178 [2018-02-04 14:01:03,434 INFO L226 Difference]: Without dead ends: 178 [2018-02-04 14:01:03,434 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-02-04 14:01:03,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-02-04 14:01:03,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 171. [2018-02-04 14:01:03,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-02-04 14:01:03,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 185 transitions. [2018-02-04 14:01:03,436 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 185 transitions. Word has length 45 [2018-02-04 14:01:03,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:01:03,436 INFO L432 AbstractCegarLoop]: Abstraction has 171 states and 185 transitions. [2018-02-04 14:01:03,436 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 14:01:03,436 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 185 transitions. [2018-02-04 14:01:03,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-02-04 14:01:03,436 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:01:03,437 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:01:03,437 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:01:03,437 INFO L82 PathProgramCache]: Analyzing trace with hash -1596182575, now seen corresponding path program 1 times [2018-02-04 14:01:03,437 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:01:03,437 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:01:03,438 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:03,438 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:03,438 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:03,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:03,452 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:01:03,550 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 14:01:03,551 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:01:03,551 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:01:03,560 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:03,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:03,593 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:01:03,656 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 14:01:03,687 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:01:03,687 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2018-02-04 14:01:03,687 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-04 14:01:03,688 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-04 14:01:03,688 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=205, Unknown=0, NotChecked=0, Total=240 [2018-02-04 14:01:03,688 INFO L87 Difference]: Start difference. First operand 171 states and 185 transitions. Second operand 16 states. [2018-02-04 14:01:03,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:01:03,893 INFO L93 Difference]: Finished difference Result 177 states and 192 transitions. [2018-02-04 14:01:03,893 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-02-04 14:01:03,894 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 45 [2018-02-04 14:01:03,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:01:03,895 INFO L225 Difference]: With dead ends: 177 [2018-02-04 14:01:03,895 INFO L226 Difference]: Without dead ends: 177 [2018-02-04 14:01:03,895 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 40 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-02-04 14:01:03,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-02-04 14:01:03,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 170. [2018-02-04 14:01:03,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-02-04 14:01:03,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 184 transitions. [2018-02-04 14:01:03,899 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 184 transitions. Word has length 45 [2018-02-04 14:01:03,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:01:03,899 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 184 transitions. [2018-02-04 14:01:03,899 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-04 14:01:03,899 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 184 transitions. [2018-02-04 14:01:03,900 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-02-04 14:01:03,900 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:01:03,900 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:01:03,900 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:01:03,900 INFO L82 PathProgramCache]: Analyzing trace with hash -628127471, now seen corresponding path program 1 times [2018-02-04 14:01:03,900 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:01:03,901 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:01:03,901 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:03,902 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:03,902 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:03,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:03,917 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:01:04,062 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 14:01:04,062 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:01:04,062 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:01:04,073 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:04,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:04,097 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:01:04,111 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:01:04,112 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:01:04,112 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:04,113 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:04,116 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:04,116 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:11 [2018-02-04 14:01:04,176 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-02-04 14:01:04,177 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5 [2018-02-04 14:01:04,177 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:04,178 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:04,179 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:04,179 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:21, output treesize:5 [2018-02-04 14:01:04,181 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 14:01:04,199 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:01:04,199 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [13] total 19 [2018-02-04 14:01:04,199 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 14:01:04,199 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 14:01:04,199 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=335, Unknown=0, NotChecked=0, Total=380 [2018-02-04 14:01:04,199 INFO L87 Difference]: Start difference. First operand 170 states and 184 transitions. Second operand 20 states. [2018-02-04 14:01:04,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:01:04,552 INFO L93 Difference]: Finished difference Result 171 states and 185 transitions. [2018-02-04 14:01:04,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-04 14:01:04,552 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 47 [2018-02-04 14:01:04,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:01:04,553 INFO L225 Difference]: With dead ends: 171 [2018-02-04 14:01:04,553 INFO L226 Difference]: Without dead ends: 171 [2018-02-04 14:01:04,554 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 41 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=84, Invalid=566, Unknown=0, NotChecked=0, Total=650 [2018-02-04 14:01:04,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-02-04 14:01:04,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 169. [2018-02-04 14:01:04,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-02-04 14:01:04,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 183 transitions. [2018-02-04 14:01:04,556 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 183 transitions. Word has length 47 [2018-02-04 14:01:04,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:01:04,556 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 183 transitions. [2018-02-04 14:01:04,556 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 14:01:04,556 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 183 transitions. [2018-02-04 14:01:04,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-02-04 14:01:04,556 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:01:04,556 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:01:04,556 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:01:04,557 INFO L82 PathProgramCache]: Analyzing trace with hash -628127470, now seen corresponding path program 1 times [2018-02-04 14:01:04,557 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:01:04,557 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:01:04,557 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:04,557 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:04,557 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:04,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:04,572 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:01:04,833 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-02-04 14:01:04,833 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:01:04,834 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:01:04,838 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:04,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:04,858 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:01:04,881 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:01:04,883 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:01:04,884 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:04,893 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:04,901 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-02-04 14:01:04,903 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-02-04 14:01:04,903 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:04,914 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:04,920 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:04,920 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:41, output treesize:27 [2018-02-04 14:01:05,018 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2018-02-04 14:01:05,020 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2018-02-04 14:01:05,020 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:05,021 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:05,024 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-02-04 14:01:05,025 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 9 [2018-02-04 14:01:05,025 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:05,027 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:05,029 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:05,029 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:45, output treesize:9 [2018-02-04 14:01:05,059 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 14:01:05,076 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:01:05,076 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [18] total 26 [2018-02-04 14:01:05,076 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-02-04 14:01:05,076 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-02-04 14:01:05,077 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=636, Unknown=0, NotChecked=0, Total=702 [2018-02-04 14:01:05,077 INFO L87 Difference]: Start difference. First operand 169 states and 183 transitions. Second operand 27 states. [2018-02-04 14:01:05,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:01:05,517 INFO L93 Difference]: Finished difference Result 170 states and 184 transitions. [2018-02-04 14:01:05,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-04 14:01:05,518 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 47 [2018-02-04 14:01:05,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:01:05,518 INFO L225 Difference]: With dead ends: 170 [2018-02-04 14:01:05,518 INFO L226 Difference]: Without dead ends: 170 [2018-02-04 14:01:05,519 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 39 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 164 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=117, Invalid=1005, Unknown=0, NotChecked=0, Total=1122 [2018-02-04 14:01:05,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2018-02-04 14:01:05,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 168. [2018-02-04 14:01:05,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-02-04 14:01:05,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 182 transitions. [2018-02-04 14:01:05,521 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 182 transitions. Word has length 47 [2018-02-04 14:01:05,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:01:05,521 INFO L432 AbstractCegarLoop]: Abstraction has 168 states and 182 transitions. [2018-02-04 14:01:05,521 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-02-04 14:01:05,521 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 182 transitions. [2018-02-04 14:01:05,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-02-04 14:01:05,521 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:01:05,521 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:01:05,521 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:01:05,522 INFO L82 PathProgramCache]: Analyzing trace with hash 2002884989, now seen corresponding path program 1 times [2018-02-04 14:01:05,522 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:01:05,522 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:01:05,522 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:05,522 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:05,522 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:05,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:05,534 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:01:05,880 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-02-04 14:01:05,881 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:01:05,881 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:01:05,886 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:05,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:05,906 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:01:05,909 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 14:01:05,909 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:05,910 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:05,910 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-04 14:01:06,016 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:06,016 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:06,017 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 14:01:06,017 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:06,021 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:06,021 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-02-04 14:01:06,065 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:06,065 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:06,066 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:06,066 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 34 [2018-02-04 14:01:06,067 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:06,071 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:06,072 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:26, output treesize:28 [2018-02-04 14:01:06,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:01:06,115 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:01:06,115 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:06,116 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:06,122 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:06,123 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:46 [2018-02-04 14:01:06,238 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 63 [2018-02-04 14:01:06,240 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 14:01:06,240 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:06,243 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:06,248 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:06,248 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:83, output treesize:46 [2018-02-04 14:01:06,279 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-02-04 14:01:06,280 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-02-04 14:01:06,281 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:06,283 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:06,296 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 46 [2018-02-04 14:01:06,298 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:01:06,298 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:06,304 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:06,313 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:06,313 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:74, output treesize:100 [2018-02-04 14:01:06,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 75 [2018-02-04 14:01:06,525 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 56 [2018-02-04 14:01:06,526 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:06,530 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:06,538 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:06,538 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:118, output treesize:91 [2018-02-04 14:01:06,705 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 61 [2018-02-04 14:01:06,707 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 18 [2018-02-04 14:01:06,707 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:06,715 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 14 [2018-02-04 14:01:06,715 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:06,720 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:06,725 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:06,725 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:97, output treesize:28 [2018-02-04 14:01:06,763 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-02-04 14:01:06,779 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:01:06,779 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [22] total 41 [2018-02-04 14:01:06,779 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-02-04 14:01:06,779 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-02-04 14:01:06,780 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=1616, Unknown=0, NotChecked=0, Total=1722 [2018-02-04 14:01:06,780 INFO L87 Difference]: Start difference. First operand 168 states and 182 transitions. Second operand 42 states. [2018-02-04 14:01:08,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:01:08,839 INFO L93 Difference]: Finished difference Result 181 states and 199 transitions. [2018-02-04 14:01:08,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-02-04 14:01:08,839 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 48 [2018-02-04 14:01:08,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:01:08,839 INFO L225 Difference]: With dead ends: 181 [2018-02-04 14:01:08,840 INFO L226 Difference]: Without dead ends: 181 [2018-02-04 14:01:08,840 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 30 SyntacticMatches, 3 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 404 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=256, Invalid=3050, Unknown=0, NotChecked=0, Total=3306 [2018-02-04 14:01:08,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-02-04 14:01:08,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 167. [2018-02-04 14:01:08,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-02-04 14:01:08,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 181 transitions. [2018-02-04 14:01:08,843 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 181 transitions. Word has length 48 [2018-02-04 14:01:08,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:01:08,844 INFO L432 AbstractCegarLoop]: Abstraction has 167 states and 181 transitions. [2018-02-04 14:01:08,844 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-02-04 14:01:08,844 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 181 transitions. [2018-02-04 14:01:08,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-02-04 14:01:08,844 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:01:08,844 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:01:08,844 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:01:08,845 INFO L82 PathProgramCache]: Analyzing trace with hash 2002884990, now seen corresponding path program 1 times [2018-02-04 14:01:08,845 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:01:08,845 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:01:08,846 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:08,846 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:08,846 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:08,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:08,862 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:01:09,590 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-02-04 14:01:09,590 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:01:09,590 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:01:09,595 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:09,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:09,617 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:01:09,622 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 14:01:09,622 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:09,623 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:09,623 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-04 14:01:09,749 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:09,749 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:09,750 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 14:01:09,750 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:09,753 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:09,753 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-02-04 14:01:09,809 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-02-04 14:01:09,809 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:09,821 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-02-04 14:01:09,822 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:09,833 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 14:01:09,833 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:48, output treesize:46 [2018-02-04 14:01:11,971 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:11,975 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:11,976 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:11,976 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-02-04 14:01:11,976 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:11,993 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:11,993 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:11,994 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:11,994 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 28 [2018-02-04 14:01:11,994 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:12,009 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 14:01:12,009 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:73, output treesize:59 [2018-02-04 14:01:12,074 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-02-04 14:01:12,076 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:01:12,076 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:12,087 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:12,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 50 [2018-02-04 14:01:12,117 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:01:12,117 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:12,125 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:12,149 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 44 [2018-02-04 14:01:12,150 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:01:12,151 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:12,157 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:12,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 46 [2018-02-04 14:01:12,181 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:01:12,181 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:12,191 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:12,208 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 14:01:12,208 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 8 variables, input treesize:105, output treesize:107 [2018-02-04 14:01:12,389 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 148 treesize of output 139 [2018-02-04 14:01:12,392 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 14:01:12,392 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:12,403 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:12,450 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 78 [2018-02-04 14:01:12,451 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 14:01:12,451 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:12,456 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:12,466 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 4 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:12,466 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 7 variables, input treesize:299, output treesize:71 [2018-02-04 14:01:12,529 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 45 [2018-02-04 14:01:12,531 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-02-04 14:01:12,532 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:12,536 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:12,552 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 67 [2018-02-04 14:01:12,554 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:01:12,554 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:12,561 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:12,579 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:12,579 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:99, output treesize:155 [2018-02-04 14:01:13,112 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 192 treesize of output 149 [2018-02-04 14:01:13,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 78 [2018-02-04 14:01:13,114 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:13,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 35 [2018-02-04 14:01:13,125 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:13,132 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:13,142 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 42 [2018-02-04 14:01:13,143 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 26 [2018-02-04 14:01:13,143 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:13,149 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 11 [2018-02-04 14:01:13,149 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:13,151 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:13,157 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:13,157 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:197, output treesize:23 [2018-02-04 14:01:13,221 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 9 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 14:01:13,238 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 14:01:13,238 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 24] total 47 [2018-02-04 14:01:13,238 INFO L409 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-02-04 14:01:13,239 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-02-04 14:01:13,239 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=2148, Unknown=1, NotChecked=0, Total=2256 [2018-02-04 14:01:13,239 INFO L87 Difference]: Start difference. First operand 167 states and 181 transitions. Second operand 48 states. [2018-02-04 14:01:17,018 WARN L146 SmtUtils]: Spent 3651ms on a formula simplification. DAG size of input: 45 DAG size of output 39 [2018-02-04 14:01:19,145 WARN L146 SmtUtils]: Spent 2061ms on a formula simplification. DAG size of input: 74 DAG size of output 44 [2018-02-04 14:01:22,830 WARN L146 SmtUtils]: Spent 3454ms on a formula simplification. DAG size of input: 55 DAG size of output 48 [2018-02-04 14:01:26,769 WARN L146 SmtUtils]: Spent 3861ms on a formula simplification. DAG size of input: 87 DAG size of output 77 [2018-02-04 14:01:28,305 WARN L146 SmtUtils]: Spent 113ms on a formula simplification. DAG size of input: 115 DAG size of output 102 [2018-02-04 14:01:29,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:01:29,625 INFO L93 Difference]: Finished difference Result 180 states and 198 transitions. [2018-02-04 14:01:29,625 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-02-04 14:01:29,625 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 48 [2018-02-04 14:01:29,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:01:29,626 INFO L225 Difference]: With dead ends: 180 [2018-02-04 14:01:29,626 INFO L226 Difference]: Without dead ends: 180 [2018-02-04 14:01:29,626 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 27 SyntacticMatches, 1 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 385 ImplicationChecksByTransitivity, 18.3s TimeCoverageRelationStatistics Valid=294, Invalid=4127, Unknown=1, NotChecked=0, Total=4422 [2018-02-04 14:01:29,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-02-04 14:01:29,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 166. [2018-02-04 14:01:29,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-02-04 14:01:29,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 180 transitions. [2018-02-04 14:01:29,628 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 180 transitions. Word has length 48 [2018-02-04 14:01:29,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:01:29,629 INFO L432 AbstractCegarLoop]: Abstraction has 166 states and 180 transitions. [2018-02-04 14:01:29,629 INFO L433 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-02-04 14:01:29,629 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 180 transitions. [2018-02-04 14:01:29,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-02-04 14:01:29,629 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:01:29,629 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:01:29,629 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:01:29,629 INFO L82 PathProgramCache]: Analyzing trace with hash -411236025, now seen corresponding path program 1 times [2018-02-04 14:01:29,629 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:01:29,629 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:01:29,630 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:29,630 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:29,630 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:29,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:29,636 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:01:29,714 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 14:01:29,714 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:01:29,715 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-02-04 14:01:29,715 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 14:01:29,715 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 14:01:29,715 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-02-04 14:01:29,715 INFO L87 Difference]: Start difference. First operand 166 states and 180 transitions. Second operand 11 states. [2018-02-04 14:01:29,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:01:29,892 INFO L93 Difference]: Finished difference Result 182 states and 196 transitions. [2018-02-04 14:01:29,892 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-04 14:01:29,892 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 54 [2018-02-04 14:01:29,892 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:01:29,893 INFO L225 Difference]: With dead ends: 182 [2018-02-04 14:01:29,893 INFO L226 Difference]: Without dead ends: 182 [2018-02-04 14:01:29,893 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2018-02-04 14:01:29,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-02-04 14:01:29,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 174. [2018-02-04 14:01:29,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-02-04 14:01:29,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 188 transitions. [2018-02-04 14:01:29,896 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 188 transitions. Word has length 54 [2018-02-04 14:01:29,897 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:01:29,897 INFO L432 AbstractCegarLoop]: Abstraction has 174 states and 188 transitions. [2018-02-04 14:01:29,897 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 14:01:29,897 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 188 transitions. [2018-02-04 14:01:29,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-02-04 14:01:29,897 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:01:29,898 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:01:29,898 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:01:29,898 INFO L82 PathProgramCache]: Analyzing trace with hash -411236024, now seen corresponding path program 1 times [2018-02-04 14:01:29,898 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:01:29,898 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:01:29,899 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:29,899 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:29,899 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:29,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:29,908 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:01:30,030 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 14:01:30,030 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:01:30,030 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:01:30,035 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:30,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:30,061 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:01:30,120 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 14:01:30,137 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 14:01:30,137 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 18 [2018-02-04 14:01:30,137 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-04 14:01:30,137 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-04 14:01:30,137 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=302, Unknown=0, NotChecked=0, Total=342 [2018-02-04 14:01:30,137 INFO L87 Difference]: Start difference. First operand 174 states and 188 transitions. Second operand 19 states. [2018-02-04 14:01:30,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:01:30,348 INFO L93 Difference]: Finished difference Result 181 states and 195 transitions. [2018-02-04 14:01:30,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-04 14:01:30,348 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 54 [2018-02-04 14:01:30,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:01:30,349 INFO L225 Difference]: With dead ends: 181 [2018-02-04 14:01:30,349 INFO L226 Difference]: Without dead ends: 181 [2018-02-04 14:01:30,349 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 45 SyntacticMatches, 5 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=621, Unknown=0, NotChecked=0, Total=702 [2018-02-04 14:01:30,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-02-04 14:01:30,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 174. [2018-02-04 14:01:30,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-02-04 14:01:30,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 187 transitions. [2018-02-04 14:01:30,352 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 187 transitions. Word has length 54 [2018-02-04 14:01:30,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:01:30,353 INFO L432 AbstractCegarLoop]: Abstraction has 174 states and 187 transitions. [2018-02-04 14:01:30,353 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-04 14:01:30,353 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 187 transitions. [2018-02-04 14:01:30,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-04 14:01:30,353 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:01:30,353 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:01:30,354 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:01:30,354 INFO L82 PathProgramCache]: Analyzing trace with hash -473136990, now seen corresponding path program 1 times [2018-02-04 14:01:30,354 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:01:30,354 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:01:30,355 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:30,355 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:30,355 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:30,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:30,365 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:01:30,415 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 14:01:30,415 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:01:30,415 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 14:01:30,415 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 14:01:30,416 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 14:01:30,416 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-04 14:01:30,416 INFO L87 Difference]: Start difference. First operand 174 states and 187 transitions. Second operand 8 states. [2018-02-04 14:01:30,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:01:30,581 INFO L93 Difference]: Finished difference Result 172 states and 185 transitions. [2018-02-04 14:01:30,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 14:01:30,581 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 65 [2018-02-04 14:01:30,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:01:30,582 INFO L225 Difference]: With dead ends: 172 [2018-02-04 14:01:30,582 INFO L226 Difference]: Without dead ends: 172 [2018-02-04 14:01:30,582 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-02-04 14:01:30,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-02-04 14:01:30,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 170. [2018-02-04 14:01:30,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-02-04 14:01:30,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 183 transitions. [2018-02-04 14:01:30,584 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 183 transitions. Word has length 65 [2018-02-04 14:01:30,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:01:30,585 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 183 transitions. [2018-02-04 14:01:30,585 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 14:01:30,585 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 183 transitions. [2018-02-04 14:01:30,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-04 14:01:30,585 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:01:30,585 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:01:30,585 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:01:30,585 INFO L82 PathProgramCache]: Analyzing trace with hash -473136989, now seen corresponding path program 1 times [2018-02-04 14:01:30,585 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:01:30,585 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:01:30,586 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:30,586 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:30,586 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:30,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:30,593 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:01:30,791 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 14:01:30,792 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:01:30,792 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 14:01:30,792 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 14:01:30,792 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 14:01:30,792 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2018-02-04 14:01:30,793 INFO L87 Difference]: Start difference. First operand 170 states and 183 transitions. Second operand 10 states. [2018-02-04 14:01:31,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:01:31,143 INFO L93 Difference]: Finished difference Result 168 states and 181 transitions. [2018-02-04 14:01:31,144 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 14:01:31,144 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 65 [2018-02-04 14:01:31,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:01:31,144 INFO L225 Difference]: With dead ends: 168 [2018-02-04 14:01:31,145 INFO L226 Difference]: Without dead ends: 168 [2018-02-04 14:01:31,145 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=34, Invalid=122, Unknown=0, NotChecked=0, Total=156 [2018-02-04 14:01:31,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-02-04 14:01:31,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 166. [2018-02-04 14:01:31,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-02-04 14:01:31,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 179 transitions. [2018-02-04 14:01:31,148 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 179 transitions. Word has length 65 [2018-02-04 14:01:31,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:01:31,148 INFO L432 AbstractCegarLoop]: Abstraction has 166 states and 179 transitions. [2018-02-04 14:01:31,148 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 14:01:31,148 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 179 transitions. [2018-02-04 14:01:31,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-02-04 14:01:31,149 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:01:31,149 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:01:31,149 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:01:31,149 INFO L82 PathProgramCache]: Analyzing trace with hash -288623325, now seen corresponding path program 1 times [2018-02-04 14:01:31,149 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:01:31,149 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:01:31,150 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:31,150 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:31,150 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:31,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:31,159 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:01:31,194 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 14:01:31,194 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:01:31,194 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-04 14:01:31,195 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 14:01:31,195 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 14:01:31,195 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 14:01:31,195 INFO L87 Difference]: Start difference. First operand 166 states and 179 transitions. Second operand 4 states. [2018-02-04 14:01:31,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:01:31,210 INFO L93 Difference]: Finished difference Result 174 states and 187 transitions. [2018-02-04 14:01:31,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 14:01:31,210 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 69 [2018-02-04 14:01:31,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:01:31,211 INFO L225 Difference]: With dead ends: 174 [2018-02-04 14:01:31,211 INFO L226 Difference]: Without dead ends: 174 [2018-02-04 14:01:31,211 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 14:01:31,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-02-04 14:01:31,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 174. [2018-02-04 14:01:31,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-02-04 14:01:31,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 187 transitions. [2018-02-04 14:01:31,214 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 187 transitions. Word has length 69 [2018-02-04 14:01:31,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:01:31,214 INFO L432 AbstractCegarLoop]: Abstraction has 174 states and 187 transitions. [2018-02-04 14:01:31,214 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 14:01:31,215 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 187 transitions. [2018-02-04 14:01:31,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-02-04 14:01:31,215 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:01:31,215 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:01:31,215 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:01:31,215 INFO L82 PathProgramCache]: Analyzing trace with hash -804539978, now seen corresponding path program 1 times [2018-02-04 14:01:31,216 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:01:31,216 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:01:31,216 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:31,216 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:31,216 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:31,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:31,226 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:01:31,253 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 14:01:31,254 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:01:31,254 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 14:01:31,254 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 14:01:31,254 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 14:01:31,254 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 14:01:31,255 INFO L87 Difference]: Start difference. First operand 174 states and 187 transitions. Second operand 5 states. [2018-02-04 14:01:31,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:01:31,262 INFO L93 Difference]: Finished difference Result 178 states and 191 transitions. [2018-02-04 14:01:31,263 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 14:01:31,263 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 70 [2018-02-04 14:01:31,264 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:01:31,264 INFO L225 Difference]: With dead ends: 178 [2018-02-04 14:01:31,264 INFO L226 Difference]: Without dead ends: 178 [2018-02-04 14:01:31,264 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 14:01:31,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-02-04 14:01:31,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 178. [2018-02-04 14:01:31,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-02-04 14:01:31,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 191 transitions. [2018-02-04 14:01:31,266 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 191 transitions. Word has length 70 [2018-02-04 14:01:31,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:01:31,266 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 191 transitions. [2018-02-04 14:01:31,266 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 14:01:31,266 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 191 transitions. [2018-02-04 14:01:31,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-02-04 14:01:31,267 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:01:31,267 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:01:31,267 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:01:31,267 INFO L82 PathProgramCache]: Analyzing trace with hash 172589229, now seen corresponding path program 1 times [2018-02-04 14:01:31,267 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:01:31,267 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:01:31,268 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:31,268 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:31,268 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:31,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:31,274 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:01:31,315 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 14:01:31,315 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:01:31,315 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 14:01:31,315 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 14:01:31,315 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 14:01:31,315 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-04 14:01:31,316 INFO L87 Difference]: Start difference. First operand 178 states and 191 transitions. Second operand 8 states. [2018-02-04 14:01:31,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:01:31,600 INFO L93 Difference]: Finished difference Result 213 states and 230 transitions. [2018-02-04 14:01:31,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 14:01:31,601 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 72 [2018-02-04 14:01:31,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:01:31,601 INFO L225 Difference]: With dead ends: 213 [2018-02-04 14:01:31,601 INFO L226 Difference]: Without dead ends: 213 [2018-02-04 14:01:31,602 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2018-02-04 14:01:31,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-02-04 14:01:31,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 199. [2018-02-04 14:01:31,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199 states. [2018-02-04 14:01:31,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 220 transitions. [2018-02-04 14:01:31,606 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 220 transitions. Word has length 72 [2018-02-04 14:01:31,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:01:31,606 INFO L432 AbstractCegarLoop]: Abstraction has 199 states and 220 transitions. [2018-02-04 14:01:31,606 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 14:01:31,606 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 220 transitions. [2018-02-04 14:01:31,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-02-04 14:01:31,607 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:01:31,607 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:01:31,607 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:01:31,607 INFO L82 PathProgramCache]: Analyzing trace with hash 172589230, now seen corresponding path program 1 times [2018-02-04 14:01:31,607 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:01:31,608 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:01:31,608 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:31,608 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:31,608 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:31,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:31,618 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:01:31,815 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 14:01:31,815 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:01:31,815 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:01:31,823 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:31,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:31,865 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:01:31,944 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 14:01:31,962 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:01:31,962 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [15] total 21 [2018-02-04 14:01:31,962 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-04 14:01:31,962 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-04 14:01:31,963 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=413, Unknown=0, NotChecked=0, Total=462 [2018-02-04 14:01:31,963 INFO L87 Difference]: Start difference. First operand 199 states and 220 transitions. Second operand 22 states. [2018-02-04 14:01:32,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:01:32,605 INFO L93 Difference]: Finished difference Result 225 states and 240 transitions. [2018-02-04 14:01:32,605 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 14:01:32,605 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 72 [2018-02-04 14:01:32,605 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:01:32,606 INFO L225 Difference]: With dead ends: 225 [2018-02-04 14:01:32,606 INFO L226 Difference]: Without dead ends: 225 [2018-02-04 14:01:32,606 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 66 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 106 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=105, Invalid=887, Unknown=0, NotChecked=0, Total=992 [2018-02-04 14:01:32,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2018-02-04 14:01:32,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 206. [2018-02-04 14:01:32,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2018-02-04 14:01:32,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 227 transitions. [2018-02-04 14:01:32,609 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 227 transitions. Word has length 72 [2018-02-04 14:01:32,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:01:32,609 INFO L432 AbstractCegarLoop]: Abstraction has 206 states and 227 transitions. [2018-02-04 14:01:32,609 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-04 14:01:32,609 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 227 transitions. [2018-02-04 14:01:32,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-02-04 14:01:32,610 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:01:32,610 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:01:32,610 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:01:32,610 INFO L82 PathProgramCache]: Analyzing trace with hash -1645476210, now seen corresponding path program 1 times [2018-02-04 14:01:32,610 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:01:32,610 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:01:32,611 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:32,611 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:32,611 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:32,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:32,623 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:01:32,964 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 14:01:32,965 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:01:32,994 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:01:32,999 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:33,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:33,041 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:01:33,054 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:01:33,056 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:01:33,056 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:33,057 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:33,059 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:33,060 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:11 [2018-02-04 14:01:33,145 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_dev_set_drvdata_~data.base Int) (ldv_dev_set_drvdata_~dev.offset Int)) (and (= |c_#memory_$Pointer$.base| (store |c_old(#memory_$Pointer$.base)| |c_ldv_dev_set_drvdata_#in~dev.base| (store (select |c_old(#memory_$Pointer$.base)| |c_ldv_dev_set_drvdata_#in~dev.base|) (+ ldv_dev_set_drvdata_~dev.offset 4) ldv_dev_set_drvdata_~data.base))) (<= ldv_dev_set_drvdata_~dev.offset |c_ldv_dev_set_drvdata_#in~dev.offset|))) is different from true [2018-02-04 14:01:33,168 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_dev_set_drvdata_~data.base Int) (ldv_dev_set_drvdata_~dev.offset Int)) (and (<= ldv_dev_set_drvdata_~dev.offset |c_ldv_hid_set_drvdata_#in~hdev.offset|) (= |c_#memory_$Pointer$.base| (store |c_old(#memory_$Pointer$.base)| |c_ldv_hid_set_drvdata_#in~hdev.base| (store (select |c_old(#memory_$Pointer$.base)| |c_ldv_hid_set_drvdata_#in~hdev.base|) (+ ldv_dev_set_drvdata_~dev.offset 4) ldv_dev_set_drvdata_~data.base))))) is different from true [2018-02-04 14:01:33,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-02-04 14:01:33,250 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:33,251 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 29 [2018-02-04 14:01:33,251 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:33,254 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:33,258 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:33,258 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:28, output treesize:11 [2018-02-04 14:01:33,329 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-02-04 14:01:33,335 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5 [2018-02-04 14:01:33,335 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:33,336 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:33,337 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:33,337 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:21, output treesize:5 [2018-02-04 14:01:33,342 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 14:01:33,365 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:01:33,365 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [23] total 37 [2018-02-04 14:01:33,366 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-02-04 14:01:33,366 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-02-04 14:01:33,366 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=129, Invalid=1122, Unknown=17, NotChecked=138, Total=1406 [2018-02-04 14:01:33,366 INFO L87 Difference]: Start difference. First operand 206 states and 227 transitions. Second operand 38 states. [2018-02-04 14:01:34,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:01:34,599 INFO L93 Difference]: Finished difference Result 233 states and 252 transitions. [2018-02-04 14:01:34,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-02-04 14:01:34,599 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 74 [2018-02-04 14:01:34,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:01:34,600 INFO L225 Difference]: With dead ends: 233 [2018-02-04 14:01:34,600 INFO L226 Difference]: Without dead ends: 233 [2018-02-04 14:01:34,600 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 62 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 521 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=274, Invalid=2303, Unknown=83, NotChecked=202, Total=2862 [2018-02-04 14:01:34,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-02-04 14:01:34,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 206. [2018-02-04 14:01:34,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2018-02-04 14:01:34,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 226 transitions. [2018-02-04 14:01:34,604 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 226 transitions. Word has length 74 [2018-02-04 14:01:34,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:01:34,605 INFO L432 AbstractCegarLoop]: Abstraction has 206 states and 226 transitions. [2018-02-04 14:01:34,605 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-02-04 14:01:34,605 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 226 transitions. [2018-02-04 14:01:34,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-02-04 14:01:34,605 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:01:34,605 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:01:34,606 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:01:34,606 INFO L82 PathProgramCache]: Analyzing trace with hash -1645476209, now seen corresponding path program 1 times [2018-02-04 14:01:34,606 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:01:34,606 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:01:34,607 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:34,607 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:34,607 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:34,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:34,623 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:01:35,299 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-02-04 14:01:35,300 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:01:35,300 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:01:35,305 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:35,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:35,336 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:01:35,358 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:01:35,359 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:01:35,359 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:35,360 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:35,374 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-02-04 14:01:35,375 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-02-04 14:01:35,375 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:35,376 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:35,380 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:35,380 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:41, output treesize:27 [2018-02-04 14:01:35,518 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_dev_set_drvdata_~data.base Int) (ldv_dev_set_drvdata_~dev.offset Int) (ldv_dev_set_drvdata_~data.offset Int)) (let ((.cse0 (+ ldv_dev_set_drvdata_~dev.offset 4))) (and (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_dev_set_drvdata_#in~dev.base| (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_dev_set_drvdata_#in~dev.base|) .cse0 ldv_dev_set_drvdata_~data.offset)) |c_#memory_$Pointer$.offset|) (= |c_#memory_$Pointer$.base| (store |c_old(#memory_$Pointer$.base)| |c_ldv_dev_set_drvdata_#in~dev.base| (store (select |c_old(#memory_$Pointer$.base)| |c_ldv_dev_set_drvdata_#in~dev.base|) .cse0 ldv_dev_set_drvdata_~data.base))) (<= ldv_dev_set_drvdata_~dev.offset |c_ldv_dev_set_drvdata_#in~dev.offset|)))) is different from true [2018-02-04 14:01:35,521 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_dev_set_drvdata_~data.base Int) (ldv_dev_set_drvdata_~dev.offset Int) (ldv_dev_set_drvdata_~data.offset Int)) (let ((.cse0 (+ ldv_dev_set_drvdata_~dev.offset 4))) (and (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_hid_set_drvdata_#in~hdev.base| (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_hid_set_drvdata_#in~hdev.base|) .cse0 ldv_dev_set_drvdata_~data.offset)) |c_#memory_$Pointer$.offset|) (<= ldv_dev_set_drvdata_~dev.offset |c_ldv_hid_set_drvdata_#in~hdev.offset|) (= |c_#memory_$Pointer$.base| (store |c_old(#memory_$Pointer$.base)| |c_ldv_hid_set_drvdata_#in~hdev.base| (store (select |c_old(#memory_$Pointer$.base)| |c_ldv_hid_set_drvdata_#in~hdev.base|) .cse0 ldv_dev_set_drvdata_~data.base)))))) is different from true [2018-02-04 14:01:35,606 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2018-02-04 14:01:35,608 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:35,609 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 35 [2018-02-04 14:01:35,609 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:35,614 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:35,623 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 33 [2018-02-04 14:01:35,625 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:35,626 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 44 [2018-02-04 14:01:35,626 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:35,631 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:35,637 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:35,637 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:56, output treesize:27 [2018-02-04 14:01:35,748 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2018-02-04 14:01:35,749 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2018-02-04 14:01:35,749 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:35,750 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:35,755 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-02-04 14:01:35,756 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 9 [2018-02-04 14:01:35,756 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:35,758 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:35,760 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:35,760 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:45, output treesize:9 [2018-02-04 14:01:35,816 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 14:01:35,834 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:01:35,834 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [26] total 42 [2018-02-04 14:01:35,834 INFO L409 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-02-04 14:01:35,834 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-02-04 14:01:35,835 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=144, Invalid=1487, Unknown=17, NotChecked=158, Total=1806 [2018-02-04 14:01:35,835 INFO L87 Difference]: Start difference. First operand 206 states and 226 transitions. Second operand 43 states. [2018-02-04 14:01:38,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:01:38,100 INFO L93 Difference]: Finished difference Result 241 states and 260 transitions. [2018-02-04 14:01:38,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-02-04 14:01:38,136 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 74 [2018-02-04 14:01:38,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:01:38,137 INFO L225 Difference]: With dead ends: 241 [2018-02-04 14:01:38,137 INFO L226 Difference]: Without dead ends: 241 [2018-02-04 14:01:38,138 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 63 SyntacticMatches, 2 SemanticMatches, 61 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 759 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=327, Invalid=3248, Unknown=93, NotChecked=238, Total=3906 [2018-02-04 14:01:38,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 241 states. [2018-02-04 14:01:38,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 241 to 206. [2018-02-04 14:01:38,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2018-02-04 14:01:38,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 225 transitions. [2018-02-04 14:01:38,142 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 225 transitions. Word has length 74 [2018-02-04 14:01:38,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:01:38,143 INFO L432 AbstractCegarLoop]: Abstraction has 206 states and 225 transitions. [2018-02-04 14:01:38,143 INFO L433 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-02-04 14:01:38,143 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 225 transitions. [2018-02-04 14:01:38,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-02-04 14:01:38,144 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:01:38,144 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:01:38,144 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:01:38,144 INFO L82 PathProgramCache]: Analyzing trace with hash 529845023, now seen corresponding path program 1 times [2018-02-04 14:01:38,144 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:01:38,144 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:01:38,145 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:38,145 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:38,145 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:38,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:38,160 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:01:39,089 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-02-04 14:01:39,089 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:01:39,089 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:01:39,095 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:39,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:39,139 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:01:39,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 14:01:39,153 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,156 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,157 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-04 14:01:39,312 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:39,312 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:39,313 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 14:01:39,313 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,316 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,316 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-02-04 14:01:39,375 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:39,376 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:39,376 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:39,377 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 34 [2018-02-04 14:01:39,377 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,382 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,382 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:26, output treesize:28 [2018-02-04 14:01:39,417 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:01:39,418 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:01:39,418 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,423 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,429 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,429 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:46 [2018-02-04 14:01:39,507 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 63 [2018-02-04 14:01:39,508 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 14:01:39,508 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,511 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,516 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,517 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:83, output treesize:46 [2018-02-04 14:01:39,521 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 46 [2018-02-04 14:01:39,523 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:01:39,523 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,527 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,537 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-02-04 14:01:39,538 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-02-04 14:01:39,538 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,539 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,547 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,548 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:74, output treesize:100 [2018-02-04 14:01:39,706 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_dev_set_drvdata_~data.base Int) (ldv_dev_set_drvdata_~dev.offset Int) (ldv_dev_set_drvdata_~data.offset Int)) (let ((.cse0 (+ ldv_dev_set_drvdata_~dev.offset 4))) (and (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_dev_set_drvdata_#in~dev.base| (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_dev_set_drvdata_#in~dev.base|) .cse0 ldv_dev_set_drvdata_~data.offset)) |c_#memory_$Pointer$.offset|) (= |c_#memory_$Pointer$.base| (store |c_old(#memory_$Pointer$.base)| |c_ldv_dev_set_drvdata_#in~dev.base| (store (select |c_old(#memory_$Pointer$.base)| |c_ldv_dev_set_drvdata_#in~dev.base|) .cse0 ldv_dev_set_drvdata_~data.base))) (<= ldv_dev_set_drvdata_~dev.offset |c_ldv_dev_set_drvdata_#in~dev.offset|)))) is different from true [2018-02-04 14:01:39,709 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_dev_set_drvdata_~data.base Int) (ldv_dev_set_drvdata_~dev.offset Int) (ldv_dev_set_drvdata_~data.offset Int)) (let ((.cse0 (+ ldv_dev_set_drvdata_~dev.offset 4))) (and (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_hid_set_drvdata_#in~hdev.base| (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_hid_set_drvdata_#in~hdev.base|) .cse0 ldv_dev_set_drvdata_~data.offset)) |c_#memory_$Pointer$.offset|) (<= ldv_dev_set_drvdata_~dev.offset |c_ldv_hid_set_drvdata_#in~hdev.offset|) (= |c_#memory_$Pointer$.base| (store |c_old(#memory_$Pointer$.base)| |c_ldv_hid_set_drvdata_#in~hdev.base| (store (select |c_old(#memory_$Pointer$.base)| |c_ldv_hid_set_drvdata_#in~hdev.base|) .cse0 ldv_dev_set_drvdata_~data.base)))))) is different from true [2018-02-04 14:01:39,818 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 78 [2018-02-04 14:01:39,820 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:39,831 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 91 [2018-02-04 14:01:39,832 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,840 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,855 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 108 treesize of output 88 [2018-02-04 14:01:39,860 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:39,861 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 112 [2018-02-04 14:01:39,861 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,869 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,878 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:39,878 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:129, output treesize:100 [2018-02-04 14:01:40,068 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 75 [2018-02-04 14:01:40,069 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 56 [2018-02-04 14:01:40,069 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:40,073 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:40,080 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:40,080 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:118, output treesize:91 [2018-02-04 14:01:40,196 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 61 [2018-02-04 14:01:40,197 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 18 [2018-02-04 14:01:40,197 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:40,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 14 [2018-02-04 14:01:40,204 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:40,210 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:40,216 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:40,216 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:97, output treesize:28 [2018-02-04 14:01:40,274 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-02-04 14:01:40,291 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:01:40,291 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [32] imperfect sequences [33] total 59 [2018-02-04 14:01:40,291 INFO L409 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-02-04 14:01:40,292 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-02-04 14:01:40,292 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=3111, Unknown=13, NotChecked=226, Total=3540 [2018-02-04 14:01:40,292 INFO L87 Difference]: Start difference. First operand 206 states and 225 transitions. Second operand 60 states. [2018-02-04 14:01:43,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:01:43,377 INFO L93 Difference]: Finished difference Result 215 states and 229 transitions. [2018-02-04 14:01:43,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-02-04 14:01:43,378 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 75 [2018-02-04 14:01:43,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:01:43,378 INFO L225 Difference]: With dead ends: 215 [2018-02-04 14:01:43,378 INFO L226 Difference]: Without dead ends: 215 [2018-02-04 14:01:43,379 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 50 SyntacticMatches, 5 SemanticMatches, 82 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 1396 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=428, Invalid=6163, Unknown=59, NotChecked=322, Total=6972 [2018-02-04 14:01:43,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 215 states. [2018-02-04 14:01:43,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 215 to 212. [2018-02-04 14:01:43,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 212 states. [2018-02-04 14:01:43,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 229 transitions. [2018-02-04 14:01:43,382 INFO L78 Accepts]: Start accepts. Automaton has 212 states and 229 transitions. Word has length 75 [2018-02-04 14:01:43,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:01:43,382 INFO L432 AbstractCegarLoop]: Abstraction has 212 states and 229 transitions. [2018-02-04 14:01:43,382 INFO L433 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-02-04 14:01:43,382 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 229 transitions. [2018-02-04 14:01:43,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-02-04 14:01:43,382 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:01:43,383 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:01:43,383 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:01:43,383 INFO L82 PathProgramCache]: Analyzing trace with hash 529845024, now seen corresponding path program 1 times [2018-02-04 14:01:43,383 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:01:43,383 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:01:43,383 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:43,384 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:43,384 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:01:43,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:43,398 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:01:44,826 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 14:01:44,826 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:01:44,826 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:01:44,831 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:01:44,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:01:44,863 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:01:44,865 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 14:01:44,865 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:44,866 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:44,866 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-04 14:01:44,982 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:44,983 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:44,983 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-02-04 14:01:44,983 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:44,985 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:44,985 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:8 [2018-02-04 14:01:45,040 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:01:45,041 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:01:45,041 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:45,042 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:45,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:01:45,048 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:01:45,048 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:45,049 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:45,052 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:45,052 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:31, output treesize:20 [2018-02-04 14:01:45,297 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 59 [2018-02-04 14:01:45,302 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 45 treesize of output 40 [2018-02-04 14:01:45,303 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 14:01:45,314 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 39 [2018-02-04 14:01:45,314 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:45,323 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 28 [2018-02-04 14:01:45,324 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:45,333 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: 3 dim-0 vars, and 3 xjuncts. [2018-02-04 14:01:45,347 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 30 [2018-02-04 14:01:45,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-02-04 14:01:45,349 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:45,355 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 13 [2018-02-04 14:01:45,356 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:45,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 13 [2018-02-04 14:01:45,366 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:45,371 INFO L267 ElimStorePlain]: Start of recursive call 6: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 14:01:45,373 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 25 [2018-02-04 14:01:45,374 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 5 [2018-02-04 14:01:45,374 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:45,377 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2018-02-04 14:01:45,377 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:45,378 INFO L267 ElimStorePlain]: Start of recursive call 10: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:45,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 29 [2018-02-04 14:01:45,384 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2018-02-04 14:01:45,384 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:45,391 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2018-02-04 14:01:45,391 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:45,406 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2018-02-04 14:01:45,406 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:45,412 INFO L267 ElimStorePlain]: Start of recursive call 13: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 14:01:45,440 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 5 dim-0 vars, and 5 xjuncts. [2018-02-04 14:01:45,440 INFO L202 ElimStorePlain]: Needed 16 recursive calls to eliminate 4 variables, input treesize:73, output treesize:61 [2018-02-04 14:01:47,667 WARN L143 SmtUtils]: Spent 2005ms on a formula simplification that was a NOOP. DAG size: 29 [2018-02-04 14:01:49,754 WARN L143 SmtUtils]: Spent 2004ms on a formula simplification that was a NOOP. DAG size: 29 [2018-02-04 14:01:49,909 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 88 [2018-02-04 14:01:49,911 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:49,912 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 93 [2018-02-04 14:01:49,912 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:49,920 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:49,931 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 82 [2018-02-04 14:01:49,933 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:01:49,934 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 94 [2018-02-04 14:01:49,934 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:49,940 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:49,947 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:49,947 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:115, output treesize:86 [2018-02-04 14:01:50,324 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 102 [2018-02-04 14:01:50,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 66 [2018-02-04 14:01:50,326 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:50,332 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 19 [2018-02-04 14:01:50,332 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:50,336 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:01:50,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2018-02-04 14:01:50,343 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 13 [2018-02-04 14:01:50,343 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:50,347 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-02-04 14:01:50,348 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 14:01:50,350 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:50,352 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:01:50,352 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:128, output treesize:13 [2018-02-04 14:01:50,373 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 14:01:50,390 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 14:01:50,390 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 33] total 58 [2018-02-04 14:01:50,390 INFO L409 AbstractCegarLoop]: Interpolant automaton has 59 states [2018-02-04 14:01:50,390 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2018-02-04 14:01:50,391 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=183, Invalid=3145, Unknown=94, NotChecked=0, Total=3422 [2018-02-04 14:01:50,391 INFO L87 Difference]: Start difference. First operand 212 states and 229 transitions. Second operand 59 states. [2018-02-04 14:01:59,719 WARN L143 SmtUtils]: Spent 2005ms on a formula simplification that was a NOOP. DAG size: 32 [2018-02-04 14:02:01,891 WARN L143 SmtUtils]: Spent 2017ms on a formula simplification that was a NOOP. DAG size: 32 [2018-02-04 14:02:05,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:02:05,320 INFO L93 Difference]: Finished difference Result 266 states and 287 transitions. [2018-02-04 14:02:05,320 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-02-04 14:02:05,320 INFO L78 Accepts]: Start accepts. Automaton has 59 states. Word has length 75 [2018-02-04 14:02:05,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:02:05,321 INFO L225 Difference]: With dead ends: 266 [2018-02-04 14:02:05,321 INFO L226 Difference]: Without dead ends: 266 [2018-02-04 14:02:05,322 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 50 SyntacticMatches, 5 SemanticMatches, 96 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1783 ImplicationChecksByTransitivity, 12.1s TimeCoverageRelationStatistics Valid=635, Invalid=8669, Unknown=202, NotChecked=0, Total=9506 [2018-02-04 14:02:05,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 266 states. [2018-02-04 14:02:05,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 266 to 212. [2018-02-04 14:02:05,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 212 states. [2018-02-04 14:02:05,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 228 transitions. [2018-02-04 14:02:05,326 INFO L78 Accepts]: Start accepts. Automaton has 212 states and 228 transitions. Word has length 75 [2018-02-04 14:02:05,326 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:02:05,327 INFO L432 AbstractCegarLoop]: Abstraction has 212 states and 228 transitions. [2018-02-04 14:02:05,327 INFO L433 AbstractCegarLoop]: Interpolant automaton has 59 states. [2018-02-04 14:02:05,327 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 228 transitions. [2018-02-04 14:02:05,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-02-04 14:02:05,327 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:02:05,327 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:02:05,327 INFO L371 AbstractCegarLoop]: === Iteration 38 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:02:05,328 INFO L82 PathProgramCache]: Analyzing trace with hash -90629135, now seen corresponding path program 1 times [2018-02-04 14:02:05,328 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:02:05,328 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:02:05,329 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:02:05,329 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:02:05,329 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:02:05,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:02:05,338 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:02:05,387 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 14:02:05,387 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:02:05,387 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 14:02:05,388 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 14:02:05,388 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 14:02:05,388 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 14:02:05,388 INFO L87 Difference]: Start difference. First operand 212 states and 228 transitions. Second operand 6 states. [2018-02-04 14:02:05,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:02:05,404 INFO L93 Difference]: Finished difference Result 203 states and 216 transitions. [2018-02-04 14:02:05,404 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 14:02:05,404 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 73 [2018-02-04 14:02:05,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:02:05,405 INFO L225 Difference]: With dead ends: 203 [2018-02-04 14:02:05,405 INFO L226 Difference]: Without dead ends: 203 [2018-02-04 14:02:05,405 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 14:02:05,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203 states. [2018-02-04 14:02:05,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203 to 203. [2018-02-04 14:02:05,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-02-04 14:02:05,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 216 transitions. [2018-02-04 14:02:05,409 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 216 transitions. Word has length 73 [2018-02-04 14:02:05,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:02:05,409 INFO L432 AbstractCegarLoop]: Abstraction has 203 states and 216 transitions. [2018-02-04 14:02:05,409 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 14:02:05,409 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 216 transitions. [2018-02-04 14:02:05,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-02-04 14:02:05,410 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:02:05,410 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:02:05,410 INFO L371 AbstractCegarLoop]: === Iteration 39 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:02:05,410 INFO L82 PathProgramCache]: Analyzing trace with hash 217510894, now seen corresponding path program 1 times [2018-02-04 14:02:05,410 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:02:05,410 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:02:05,411 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:02:05,411 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:02:05,411 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:02:05,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:02:05,421 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:02:05,459 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 14:02:05,460 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:02:05,460 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 14:02:05,460 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 14:02:05,460 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 14:02:05,460 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 14:02:05,460 INFO L87 Difference]: Start difference. First operand 203 states and 216 transitions. Second operand 7 states. [2018-02-04 14:02:05,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:02:05,573 INFO L93 Difference]: Finished difference Result 202 states and 215 transitions. [2018-02-04 14:02:05,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 14:02:05,573 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 81 [2018-02-04 14:02:05,573 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:02:05,574 INFO L225 Difference]: With dead ends: 202 [2018-02-04 14:02:05,574 INFO L226 Difference]: Without dead ends: 202 [2018-02-04 14:02:05,574 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-02-04 14:02:05,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states. [2018-02-04 14:02:05,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 202. [2018-02-04 14:02:05,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202 states. [2018-02-04 14:02:05,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 215 transitions. [2018-02-04 14:02:05,576 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 215 transitions. Word has length 81 [2018-02-04 14:02:05,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:02:05,576 INFO L432 AbstractCegarLoop]: Abstraction has 202 states and 215 transitions. [2018-02-04 14:02:05,576 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 14:02:05,576 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 215 transitions. [2018-02-04 14:02:05,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-02-04 14:02:05,577 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:02:05,577 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:02:05,577 INFO L371 AbstractCegarLoop]: === Iteration 40 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:02:05,577 INFO L82 PathProgramCache]: Analyzing trace with hash 217510895, now seen corresponding path program 1 times [2018-02-04 14:02:05,577 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:02:05,577 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:02:05,578 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:02:05,578 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:02:05,578 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:02:05,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:02:05,584 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:02:05,799 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 14:02:05,799 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:02:05,799 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:02:05,805 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:02:05,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:02:05,835 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:02:05,895 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 14:02:05,913 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 14:02:05,913 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 15] total 20 [2018-02-04 14:02:05,914 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-02-04 14:02:05,914 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-02-04 14:02:05,914 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=378, Unknown=0, NotChecked=0, Total=420 [2018-02-04 14:02:05,914 INFO L87 Difference]: Start difference. First operand 202 states and 215 transitions. Second operand 21 states. [2018-02-04 14:02:06,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:02:06,559 INFO L93 Difference]: Finished difference Result 227 states and 237 transitions. [2018-02-04 14:02:06,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 14:02:06,559 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 81 [2018-02-04 14:02:06,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:02:06,560 INFO L225 Difference]: With dead ends: 227 [2018-02-04 14:02:06,560 INFO L226 Difference]: Without dead ends: 227 [2018-02-04 14:02:06,560 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 73 SyntacticMatches, 7 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=107, Invalid=1015, Unknown=0, NotChecked=0, Total=1122 [2018-02-04 14:02:06,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states. [2018-02-04 14:02:06,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 212. [2018-02-04 14:02:06,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 212 states. [2018-02-04 14:02:06,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 224 transitions. [2018-02-04 14:02:06,562 INFO L78 Accepts]: Start accepts. Automaton has 212 states and 224 transitions. Word has length 81 [2018-02-04 14:02:06,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:02:06,563 INFO L432 AbstractCegarLoop]: Abstraction has 212 states and 224 transitions. [2018-02-04 14:02:06,563 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-02-04 14:02:06,563 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 224 transitions. [2018-02-04 14:02:06,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-02-04 14:02:06,563 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:02:06,563 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:02:06,563 INFO L371 AbstractCegarLoop]: === Iteration 41 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:02:06,563 INFO L82 PathProgramCache]: Analyzing trace with hash 790903974, now seen corresponding path program 1 times [2018-02-04 14:02:06,563 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:02:06,563 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:02:06,564 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:02:06,564 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:02:06,564 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:02:06,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:02:06,571 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:02:07,053 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 9 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 14:02:07,053 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:02:07,053 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:02:07,058 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:02:07,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:02:07,090 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:02:07,092 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 14:02:07,092 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,093 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,093 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-04 14:02:07,133 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:02:07,133 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:02:07,133 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 14:02:07,134 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,136 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,136 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-02-04 14:02:07,180 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:02:07,181 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:02:07,182 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:02:07,182 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-02-04 14:02:07,182 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,185 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,185 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:23, output treesize:16 [2018-02-04 14:02:07,204 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:02:07,205 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:02:07,205 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,207 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,212 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:02:07,213 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:02:07,213 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,214 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,218 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,218 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:39, output treesize:34 [2018-02-04 14:02:07,239 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-02-04 14:02:07,240 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 9 [2018-02-04 14:02:07,240 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,241 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,244 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,245 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:22 [2018-02-04 14:02:07,267 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 30 [2018-02-04 14:02:07,269 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 1 [2018-02-04 14:02:07,270 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,272 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,276 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,276 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:41, output treesize:14 [2018-02-04 14:02:07,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 26 [2018-02-04 14:02:07,329 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-02-04 14:02:07,329 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,333 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,340 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:02:07,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:02:07,342 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,343 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,348 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,348 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:54, output treesize:34 [2018-02-04 14:02:07,488 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_dev_set_drvdata_~dev.offset Int) (ldv_dev_set_drvdata_~data.offset Int)) (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_dev_set_drvdata_#in~dev.base| (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_dev_set_drvdata_#in~dev.base|) (+ ldv_dev_set_drvdata_~dev.offset 4) ldv_dev_set_drvdata_~data.offset)) |c_#memory_$Pointer$.offset|)) is different from true [2018-02-04 14:02:07,490 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_dev_set_drvdata_~dev.offset Int) (ldv_dev_set_drvdata_~data.offset Int)) (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_hid_set_drvdata_#in~hdev.base| (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_hid_set_drvdata_#in~hdev.base|) (+ ldv_dev_set_drvdata_~dev.offset 4) ldv_dev_set_drvdata_~data.offset)) |c_#memory_$Pointer$.offset|)) is different from true [2018-02-04 14:02:07,492 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_dev_set_drvdata_~dev.offset Int) (ldv_dev_set_drvdata_~data.offset Int)) (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_arvo_init_specials_#in~hdev.base| (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_arvo_init_specials_#in~hdev.base|) (+ ldv_dev_set_drvdata_~dev.offset 4) ldv_dev_set_drvdata_~data.offset)) |c_#memory_$Pointer$.offset|)) is different from true [2018-02-04 14:02:07,494 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_dev_set_drvdata_~dev.offset Int) (ldv_dev_set_drvdata_~data.offset Int)) (= |c_#memory_$Pointer$.offset| (store |c_old(#memory_$Pointer$.offset)| |c_ldv_arvo_probe_#in~hdev.base| (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_arvo_probe_#in~hdev.base|) (+ ldv_dev_set_drvdata_~dev.offset 4) ldv_dev_set_drvdata_~data.offset)))) is different from true [2018-02-04 14:02:07,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-02-04 14:02:07,498 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-02-04 14:02:07,498 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,499 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,507 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-02-04 14:02:07,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 29 [2018-02-04 14:02:07,514 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-02-04 14:02:07,521 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 14:02:07,531 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 14:02:07,531 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:47, output treesize:35 [2018-02-04 14:02:07,600 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-02-04 14:02:07,601 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 14:02:07,601 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,602 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,602 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:07,602 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-02-04 14:02:07,629 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 9 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 14:02:07,658 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 14:02:07,659 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 32] total 44 [2018-02-04 14:02:07,659 INFO L409 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-02-04 14:02:07,659 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-02-04 14:02:07,659 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=1485, Unknown=4, NotChecked=324, Total=1980 [2018-02-04 14:02:07,660 INFO L87 Difference]: Start difference. First operand 212 states and 224 transitions. Second operand 45 states. [2018-02-04 14:02:09,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:02:09,260 INFO L93 Difference]: Finished difference Result 239 states and 250 transitions. [2018-02-04 14:02:09,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-02-04 14:02:09,261 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 82 [2018-02-04 14:02:09,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:02:09,261 INFO L225 Difference]: With dead ends: 239 [2018-02-04 14:02:09,261 INFO L226 Difference]: Without dead ends: 239 [2018-02-04 14:02:09,262 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 148 GetRequests, 61 SyntacticMatches, 13 SemanticMatches, 74 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 1353 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=508, Invalid=4580, Unknown=40, NotChecked=572, Total=5700 [2018-02-04 14:02:09,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2018-02-04 14:02:09,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 215. [2018-02-04 14:02:09,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 215 states. [2018-02-04 14:02:09,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 215 states to 215 states and 229 transitions. [2018-02-04 14:02:09,264 INFO L78 Accepts]: Start accepts. Automaton has 215 states and 229 transitions. Word has length 82 [2018-02-04 14:02:09,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:02:09,264 INFO L432 AbstractCegarLoop]: Abstraction has 215 states and 229 transitions. [2018-02-04 14:02:09,264 INFO L433 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-02-04 14:02:09,264 INFO L276 IsEmpty]: Start isEmpty. Operand 215 states and 229 transitions. [2018-02-04 14:02:09,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-02-04 14:02:09,265 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:02:09,265 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:02:09,265 INFO L371 AbstractCegarLoop]: === Iteration 42 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:02:09,265 INFO L82 PathProgramCache]: Analyzing trace with hash 790903975, now seen corresponding path program 1 times [2018-02-04 14:02:09,265 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:02:09,265 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:02:09,266 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:02:09,266 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:02:09,266 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:02:09,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:02:09,273 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:02:09,748 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-02-04 14:02:09,748 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:02:09,748 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2018-02-04 14:02:09,748 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-02-04 14:02:09,748 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-02-04 14:02:09,748 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=614, Unknown=0, NotChecked=0, Total=702 [2018-02-04 14:02:09,748 INFO L87 Difference]: Start difference. First operand 215 states and 229 transitions. Second operand 27 states. [2018-02-04 14:02:10,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:02:10,607 INFO L93 Difference]: Finished difference Result 225 states and 241 transitions. [2018-02-04 14:02:10,607 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-02-04 14:02:10,607 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 82 [2018-02-04 14:02:10,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:02:10,607 INFO L225 Difference]: With dead ends: 225 [2018-02-04 14:02:10,607 INFO L226 Difference]: Without dead ends: 225 [2018-02-04 14:02:10,608 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 8 SyntacticMatches, 3 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 354 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=213, Invalid=1593, Unknown=0, NotChecked=0, Total=1806 [2018-02-04 14:02:10,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2018-02-04 14:02:10,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 216. [2018-02-04 14:02:10,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 216 states. [2018-02-04 14:02:10,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 216 states to 216 states and 230 transitions. [2018-02-04 14:02:10,610 INFO L78 Accepts]: Start accepts. Automaton has 216 states and 230 transitions. Word has length 82 [2018-02-04 14:02:10,610 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:02:10,611 INFO L432 AbstractCegarLoop]: Abstraction has 216 states and 230 transitions. [2018-02-04 14:02:10,611 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-02-04 14:02:10,611 INFO L276 IsEmpty]: Start isEmpty. Operand 216 states and 230 transitions. [2018-02-04 14:02:10,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-02-04 14:02:10,611 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:02:10,612 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:02:10,612 INFO L371 AbstractCegarLoop]: === Iteration 43 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:02:10,612 INFO L82 PathProgramCache]: Analyzing trace with hash -1859667754, now seen corresponding path program 1 times [2018-02-04 14:02:10,612 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:02:10,612 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:02:10,612 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:02:10,613 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:02:10,613 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:02:10,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:02:10,622 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:02:10,663 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 14:02:10,664 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:02:10,664 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 14:02:10,664 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 14:02:10,664 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 14:02:10,664 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 14:02:10,665 INFO L87 Difference]: Start difference. First operand 216 states and 230 transitions. Second operand 7 states. [2018-02-04 14:02:10,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:02:10,679 INFO L93 Difference]: Finished difference Result 223 states and 237 transitions. [2018-02-04 14:02:10,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 14:02:10,691 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 85 [2018-02-04 14:02:10,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:02:10,692 INFO L225 Difference]: With dead ends: 223 [2018-02-04 14:02:10,692 INFO L226 Difference]: Without dead ends: 223 [2018-02-04 14:02:10,692 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 14:02:10,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2018-02-04 14:02:10,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 223. [2018-02-04 14:02:10,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-02-04 14:02:10,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 237 transitions. [2018-02-04 14:02:10,696 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 237 transitions. Word has length 85 [2018-02-04 14:02:10,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:02:10,696 INFO L432 AbstractCegarLoop]: Abstraction has 223 states and 237 transitions. [2018-02-04 14:02:10,696 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 14:02:10,696 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 237 transitions. [2018-02-04 14:02:10,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-02-04 14:02:10,697 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:02:10,697 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:02:10,697 INFO L371 AbstractCegarLoop]: === Iteration 44 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:02:10,697 INFO L82 PathProgramCache]: Analyzing trace with hash 2141896535, now seen corresponding path program 1 times [2018-02-04 14:02:10,697 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:02:10,697 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:02:10,698 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:02:10,698 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:02:10,698 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:02:10,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:02:10,709 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:02:10,847 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 14:02:10,847 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:02:10,847 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-02-04 14:02:10,847 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 14:02:10,847 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 14:02:10,848 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-02-04 14:02:10,848 INFO L87 Difference]: Start difference. First operand 223 states and 237 transitions. Second operand 11 states. [2018-02-04 14:02:11,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:02:11,098 INFO L93 Difference]: Finished difference Result 232 states and 247 transitions. [2018-02-04 14:02:11,098 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 14:02:11,099 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 85 [2018-02-04 14:02:11,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:02:11,100 INFO L225 Difference]: With dead ends: 232 [2018-02-04 14:02:11,100 INFO L226 Difference]: Without dead ends: 224 [2018-02-04 14:02:11,100 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2018-02-04 14:02:11,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-02-04 14:02:11,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 224. [2018-02-04 14:02:11,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224 states. [2018-02-04 14:02:11,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 238 transitions. [2018-02-04 14:02:11,104 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 238 transitions. Word has length 85 [2018-02-04 14:02:11,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:02:11,104 INFO L432 AbstractCegarLoop]: Abstraction has 224 states and 238 transitions. [2018-02-04 14:02:11,104 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 14:02:11,104 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 238 transitions. [2018-02-04 14:02:11,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-02-04 14:02:11,105 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:02:11,105 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:02:11,105 INFO L371 AbstractCegarLoop]: === Iteration 45 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 14:02:11,105 INFO L82 PathProgramCache]: Analyzing trace with hash -150489879, now seen corresponding path program 1 times [2018-02-04 14:02:11,105 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:02:11,105 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:02:11,106 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:02:11,106 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:02:11,106 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:02:11,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:02:11,118 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:02:11,598 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 9 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 14:02:11,599 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:02:11,599 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:02:11,606 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:02:11,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:02:11,643 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:02:11,644 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 14:02:11,644 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:11,645 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:11,645 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-04 14:02:11,678 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:02:11,679 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:02:11,679 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 14:02:11,680 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:11,683 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:11,683 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-02-04 14:02:11,739 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:02:11,740 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:02:11,741 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:02:11,741 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-02-04 14:02:11,742 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:11,744 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:11,744 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:13 [2018-02-04 14:02:11,761 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:02:11,761 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:02:11,762 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:11,763 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:11,766 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:11,766 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:30 [2018-02-04 14:02:11,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 52 [2018-02-04 14:02:11,814 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 14:02:11,814 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:11,816 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:11,820 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:11,820 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:67, output treesize:30 [2018-02-04 14:02:11,823 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 35 [2018-02-04 14:02:11,825 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:02:11,825 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:11,828 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:11,833 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:02:11,833 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:43, output treesize:39 [2018-02-04 14:02:11,892 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_dev_set_drvdata_~data.base Int) (ldv_dev_set_drvdata_~dev.offset Int)) (= |c_#memory_$Pointer$.base| (store |c_old(#memory_$Pointer$.base)| |c_ldv_dev_set_drvdata_#in~dev.base| (store (select |c_old(#memory_$Pointer$.base)| |c_ldv_dev_set_drvdata_#in~dev.base|) (+ ldv_dev_set_drvdata_~dev.offset 4) ldv_dev_set_drvdata_~data.base)))) is different from true [2018-02-04 14:02:11,894 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_dev_set_drvdata_~data.base Int) (ldv_dev_set_drvdata_~dev.offset Int)) (= |c_#memory_$Pointer$.base| (store |c_old(#memory_$Pointer$.base)| |c_ldv_hid_set_drvdata_#in~hdev.base| (store (select |c_old(#memory_$Pointer$.base)| |c_ldv_hid_set_drvdata_#in~hdev.base|) (+ ldv_dev_set_drvdata_~dev.offset 4) ldv_dev_set_drvdata_~data.base)))) is different from true [2018-02-04 14:02:11,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 42 [2018-02-04 14:02:11,956 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 27 [2018-02-04 14:02:11,957 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-02-04 14:02:11,965 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 14:02:11,977 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 14:02:11,978 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:52, output treesize:56 [2018-02-04 14:02:12,006 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-02-04 14:02:12,007 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:12,008 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 14:02:12,009 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-02-04 14:02:30,049 WARN L143 SmtUtils]: Spent 2003ms on a formula simplification that was a NOOP. DAG size: 14 [2018-02-04 14:02:30,089 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2018-02-04 14:02:30,090 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 4 [2018-02-04 14:02:30,090 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:30,091 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:30,093 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:02:30,093 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:25, output treesize:10 [2018-02-04 14:02:30,106 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:02:30,106 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 29 [2018-02-04 14:02:30,106 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:02:30,115 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-02-04 14:02:30,115 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:46, output treesize:22 [2018-02-04 14:02:30,150 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 9 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 14:02:30,166 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 14:02:30,167 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 30] total 45 [2018-02-04 14:02:30,167 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-02-04 14:02:30,167 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-02-04 14:02:30,167 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=1710, Unknown=23, NotChecked=170, Total=2070 [2018-02-04 14:02:30,167 INFO L87 Difference]: Start difference. First operand 224 states and 238 transitions. Second operand 46 states. [2018-02-04 14:02:48,623 WARN L143 SmtUtils]: Spent 1938ms on a formula simplification that was a NOOP. DAG size: 16 [2018-02-04 14:02:50,525 WARN L143 SmtUtils]: Spent 1882ms on a formula simplification that was a NOOP. DAG size: 19 [2018-02-04 14:02:52,429 WARN L143 SmtUtils]: Spent 1874ms on a formula simplification that was a NOOP. DAG size: 19 Received shutdown request... [2018-02-04 14:02:54,431 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-04 14:02:54,431 WARN L491 AbstractCegarLoop]: Verification canceled [2018-02-04 14:02:54,435 WARN L185 ceAbstractionStarter]: Timeout [2018-02-04 14:02:54,435 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.02 02:02:54 BoogieIcfgContainer [2018-02-04 14:02:54,435 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-02-04 14:02:54,435 INFO L168 Benchmark]: Toolchain (without parser) took 196932.59 ms. Allocated memory was 402.7 MB in the beginning and 835.7 MB in the end (delta: 433.1 MB). Free memory was 359.3 MB in the beginning and 782.6 MB in the end (delta: -423.3 MB). Peak memory consumption was 401.1 MB. Max. memory is 5.3 GB. [2018-02-04 14:02:54,437 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 402.7 MB. Free memory is still 365.9 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-04 14:02:54,437 INFO L168 Benchmark]: CACSL2BoogieTranslator took 172.79 ms. Allocated memory is still 402.7 MB. Free memory was 359.3 MB in the beginning and 344.6 MB in the end (delta: 14.7 MB). Peak memory consumption was 14.7 MB. Max. memory is 5.3 GB. [2018-02-04 14:02:54,437 INFO L168 Benchmark]: Boogie Preprocessor took 29.74 ms. Allocated memory is still 402.7 MB. Free memory was 344.6 MB in the beginning and 342.0 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 5.3 GB. [2018-02-04 14:02:54,437 INFO L168 Benchmark]: RCFGBuilder took 378.11 ms. Allocated memory is still 402.7 MB. Free memory was 342.0 MB in the beginning and 299.1 MB in the end (delta: 42.8 MB). Peak memory consumption was 42.8 MB. Max. memory is 5.3 GB. [2018-02-04 14:02:54,437 INFO L168 Benchmark]: TraceAbstraction took 196348.93 ms. Allocated memory was 402.7 MB in the beginning and 835.7 MB in the end (delta: 433.1 MB). Free memory was 299.1 MB in the beginning and 782.6 MB in the end (delta: -483.5 MB). Peak memory consumption was 340.9 MB. Max. memory is 5.3 GB. [2018-02-04 14:02:54,439 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 402.7 MB. Free memory is still 365.9 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 172.79 ms. Allocated memory is still 402.7 MB. Free memory was 359.3 MB in the beginning and 344.6 MB in the end (delta: 14.7 MB). Peak memory consumption was 14.7 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 29.74 ms. Allocated memory is still 402.7 MB. Free memory was 344.6 MB in the beginning and 342.0 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 5.3 GB. * RCFGBuilder took 378.11 ms. Allocated memory is still 402.7 MB. Free memory was 342.0 MB in the beginning and 299.1 MB in the end (delta: 42.8 MB). Peak memory consumption was 42.8 MB. Max. memory is 5.3 GB. * TraceAbstraction took 196348.93 ms. Allocated memory was 402.7 MB in the beginning and 835.7 MB in the end (delta: 433.1 MB). Free memory was 299.1 MB in the beginning and 782.6 MB in the end (delta: -483.5 MB). Peak memory consumption was 340.9 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1463). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1479). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1463). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1479). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1198). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1198). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1193). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1193). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1533]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1533). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1526). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1513). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1513). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1524). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1517). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1524). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1514). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1528). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1524). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1526). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1528). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1514). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1517). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1524). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1454). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1455). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1456). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1456). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1454). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1455). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1484). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1484). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1490). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1490). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was constructing difference of abstraction (224states) and interpolant automaton (currently 18 states, 46 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 19. - StatisticsResult: Ultimate Automizer benchmark data CFG has 17 procedures, 173 locations, 45 error locations. TIMEOUT Result, 196.3s OverallTime, 45 OverallIterations, 3 TraceHistogramMax, 125.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 6223 SDtfs, 4455 SDslu, 42002 SDs, 0 SdLazy, 45679 SolverSat, 1351 SolverUnsat, 848 SolverUnknown, 0 SolverNotchecked, 66.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2200 GetRequests, 1077 SyntacticMatches, 81 SemanticMatches, 1041 ConstructedPredicates, 12 IntricatePredicates, 0 DeprecatedPredicates, 9071 ImplicationChecksByTransitivity, 116.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=224occurred in iteration=44, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 44 MinimizatonAttempts, 592 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 0.7s SatisfiabilityAnalysisTime, 68.9s InterpolantComputationTime, 3585 NumberOfCodeBlocks, 3585 NumberOfCodeBlocksAsserted, 72 NumberOfCheckSat, 3514 ConstructedInterpolants, 159 QuantifiedInterpolants, 2217534 SizeOfPredicates, 310 NumberOfNonLiveVariables, 5913 ConjunctsInSsa, 1182 ConjunctsInUnsatCore, 71 InterpolantComputations, 28 PerfectInterpolantSequences, 837/1070 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test15_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-04_14-02-54-445.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test15_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-04_14-02-54-445.csv Completed graceful shutdown