java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/heap-manipulation/merge_sort_true-unreach-call_true-valid-memsafety.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-c17473d-m [2018-02-04 14:14:40,515 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-04 14:14:40,516 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-04 14:14:40,527 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-04 14:14:40,528 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-04 14:14:40,528 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-04 14:14:40,529 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-04 14:14:40,531 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-04 14:14:40,533 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-04 14:14:40,533 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-04 14:14:40,534 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-04 14:14:40,534 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-04 14:14:40,535 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-04 14:14:40,536 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-04 14:14:40,537 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-04 14:14:40,539 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-04 14:14:40,540 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-04 14:14:40,542 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-04 14:14:40,543 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-04 14:14:40,544 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-04 14:14:40,545 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-02-04 14:14:40,546 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-02-04 14:14:40,546 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-02-04 14:14:40,547 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-02-04 14:14:40,548 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-02-04 14:14:40,549 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-02-04 14:14:40,549 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-02-04 14:14:40,549 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-02-04 14:14:40,550 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-02-04 14:14:40,550 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-04 14:14:40,550 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-04 14:14:40,550 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-02-04 14:14:40,560 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-04 14:14:40,560 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-04 14:14:40,561 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-04 14:14:40,562 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-04 14:14:40,562 INFO L133 SettingsManager]: * Use SBE=true [2018-02-04 14:14:40,562 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-04 14:14:40,562 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-04 14:14:40,562 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-04 14:14:40,562 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-04 14:14:40,563 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-04 14:14:40,563 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-04 14:14:40,563 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-04 14:14:40,563 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-04 14:14:40,563 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-04 14:14:40,563 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-04 14:14:40,563 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-04 14:14:40,564 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-04 14:14:40,564 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-04 14:14:40,564 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-04 14:14:40,564 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 14:14:40,564 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-04 14:14:40,564 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-02-04 14:14:40,565 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-02-04 14:14:40,565 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-02-04 14:14:40,592 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-04 14:14:40,599 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-04 14:14:40,601 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-04 14:14:40,602 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-04 14:14:40,602 INFO L276 PluginConnector]: CDTParser initialized [2018-02-04 14:14:40,602 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/heap-manipulation/merge_sort_true-unreach-call_true-valid-memsafety.i [2018-02-04 14:14:40,739 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-04 14:14:40,740 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-04 14:14:40,741 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-04 14:14:40,741 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-04 14:14:40,747 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-04 14:14:40,748 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 02:14:40" (1/1) ... [2018-02-04 14:14:40,750 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@a688c53 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:14:40, skipping insertion in model container [2018-02-04 14:14:40,751 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 02:14:40" (1/1) ... [2018-02-04 14:14:40,765 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 14:14:40,797 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 14:14:40,892 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 14:14:40,916 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 14:14:40,925 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:14:40 WrapperNode [2018-02-04 14:14:40,926 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-04 14:14:40,926 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-04 14:14:40,926 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-04 14:14:40,927 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-04 14:14:40,935 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:14:40" (1/1) ... [2018-02-04 14:14:40,935 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:14:40" (1/1) ... [2018-02-04 14:14:40,942 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:14:40" (1/1) ... [2018-02-04 14:14:40,943 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:14:40" (1/1) ... [2018-02-04 14:14:40,949 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:14:40" (1/1) ... [2018-02-04 14:14:40,953 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:14:40" (1/1) ... [2018-02-04 14:14:40,954 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:14:40" (1/1) ... [2018-02-04 14:14:40,956 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-04 14:14:40,956 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-04 14:14:40,956 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-04 14:14:40,957 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-04 14:14:40,957 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:14:40" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 14:14:40,994 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-04 14:14:40,994 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-04 14:14:40,994 INFO L136 BoogieDeclarations]: Found implementation of procedure fail [2018-02-04 14:14:40,994 INFO L136 BoogieDeclarations]: Found implementation of procedure merge_single_node [2018-02-04 14:14:40,994 INFO L136 BoogieDeclarations]: Found implementation of procedure merge_pair [2018-02-04 14:14:40,994 INFO L136 BoogieDeclarations]: Found implementation of procedure seq_sort_core [2018-02-04 14:14:40,994 INFO L136 BoogieDeclarations]: Found implementation of procedure inspect_before [2018-02-04 14:14:40,994 INFO L136 BoogieDeclarations]: Found implementation of procedure inspect_after [2018-02-04 14:14:40,994 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-04 14:14:40,994 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-02-04 14:14:40,995 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-02-04 14:14:40,995 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-02-04 14:14:40,995 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-02-04 14:14:40,995 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-02-04 14:14:40,995 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-02-04 14:14:40,995 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-02-04 14:14:40,995 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-02-04 14:14:40,995 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-02-04 14:14:40,995 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-02-04 14:14:40,995 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-02-04 14:14:40,995 INFO L128 BoogieDeclarations]: Found specification of procedure fail [2018-02-04 14:14:40,995 INFO L128 BoogieDeclarations]: Found specification of procedure merge_single_node [2018-02-04 14:14:40,995 INFO L128 BoogieDeclarations]: Found specification of procedure merge_pair [2018-02-04 14:14:40,995 INFO L128 BoogieDeclarations]: Found specification of procedure seq_sort_core [2018-02-04 14:14:40,996 INFO L128 BoogieDeclarations]: Found specification of procedure inspect_before [2018-02-04 14:14:40,996 INFO L128 BoogieDeclarations]: Found specification of procedure inspect_after [2018-02-04 14:14:40,996 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-04 14:14:40,996 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-04 14:14:40,996 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-04 14:14:41,587 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-04 14:14:41,588 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 02:14:41 BoogieIcfgContainer [2018-02-04 14:14:41,588 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-04 14:14:41,589 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-04 14:14:41,589 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-04 14:14:41,591 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-04 14:14:41,591 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 04.02 02:14:40" (1/3) ... [2018-02-04 14:14:41,592 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7bd3f319 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 02:14:41, skipping insertion in model container [2018-02-04 14:14:41,592 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:14:40" (2/3) ... [2018-02-04 14:14:41,593 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7bd3f319 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 02:14:41, skipping insertion in model container [2018-02-04 14:14:41,593 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 02:14:41" (3/3) ... [2018-02-04 14:14:41,594 INFO L107 eAbstractionObserver]: Analyzing ICFG merge_sort_true-unreach-call_true-valid-memsafety.i [2018-02-04 14:14:41,602 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-02-04 14:14:41,609 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 109 error locations. [2018-02-04 14:14:41,638 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-04 14:14:41,638 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-04 14:14:41,639 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-02-04 14:14:41,639 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-02-04 14:14:41,639 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-04 14:14:41,639 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-04 14:14:41,639 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-04 14:14:41,639 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-04 14:14:41,639 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-04 14:14:41,654 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states. [2018-02-04 14:14:41,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-02-04 14:14:41,662 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:41,662 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:41,662 INFO L371 AbstractCegarLoop]: === Iteration 1 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:41,665 INFO L82 PathProgramCache]: Analyzing trace with hash 1556477250, now seen corresponding path program 1 times [2018-02-04 14:14:41,666 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:41,666 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:41,696 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:41,696 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:41,696 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:41,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:41,730 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:41,752 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:41,755 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:41,755 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-04 14:14:41,756 INFO L409 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-02-04 14:14:41,842 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-02-04 14:14:41,842 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-02-04 14:14:41,844 INFO L87 Difference]: Start difference. First operand 315 states. Second operand 2 states. [2018-02-04 14:14:41,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:41,866 INFO L93 Difference]: Finished difference Result 313 states and 338 transitions. [2018-02-04 14:14:41,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-02-04 14:14:41,867 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 9 [2018-02-04 14:14:41,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:41,875 INFO L225 Difference]: With dead ends: 313 [2018-02-04 14:14:41,876 INFO L226 Difference]: Without dead ends: 296 [2018-02-04 14:14:41,877 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-02-04 14:14:41,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 296 states. [2018-02-04 14:14:41,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 296 to 296. [2018-02-04 14:14:41,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 296 states. [2018-02-04 14:14:41,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 296 states to 296 states and 309 transitions. [2018-02-04 14:14:41,909 INFO L78 Accepts]: Start accepts. Automaton has 296 states and 309 transitions. Word has length 9 [2018-02-04 14:14:41,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:41,910 INFO L432 AbstractCegarLoop]: Abstraction has 296 states and 309 transitions. [2018-02-04 14:14:41,910 INFO L433 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-02-04 14:14:41,910 INFO L276 IsEmpty]: Start isEmpty. Operand 296 states and 309 transitions. [2018-02-04 14:14:41,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-02-04 14:14:41,910 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:41,910 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:41,910 INFO L371 AbstractCegarLoop]: === Iteration 2 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:41,911 INFO L82 PathProgramCache]: Analyzing trace with hash 1087749341, now seen corresponding path program 1 times [2018-02-04 14:14:41,911 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:41,911 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:41,912 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:41,912 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:41,912 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:41,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:41,922 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:41,948 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:41,948 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:41,948 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-04 14:14:41,950 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-04 14:14:41,950 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-04 14:14:41,950 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 14:14:41,950 INFO L87 Difference]: Start difference. First operand 296 states and 309 transitions. Second operand 3 states. [2018-02-04 14:14:42,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:42,204 INFO L93 Difference]: Finished difference Result 339 states and 361 transitions. [2018-02-04 14:14:42,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-04 14:14:42,207 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-02-04 14:14:42,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:42,209 INFO L225 Difference]: With dead ends: 339 [2018-02-04 14:14:42,209 INFO L226 Difference]: Without dead ends: 338 [2018-02-04 14:14:42,210 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 14:14:42,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 338 states. [2018-02-04 14:14:42,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 338 to 300. [2018-02-04 14:14:42,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 300 states. [2018-02-04 14:14:42,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 300 states to 300 states and 314 transitions. [2018-02-04 14:14:42,226 INFO L78 Accepts]: Start accepts. Automaton has 300 states and 314 transitions. Word has length 11 [2018-02-04 14:14:42,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:42,226 INFO L432 AbstractCegarLoop]: Abstraction has 300 states and 314 transitions. [2018-02-04 14:14:42,226 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-04 14:14:42,227 INFO L276 IsEmpty]: Start isEmpty. Operand 300 states and 314 transitions. [2018-02-04 14:14:42,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-02-04 14:14:42,227 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:42,227 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:42,227 INFO L371 AbstractCegarLoop]: === Iteration 3 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:42,227 INFO L82 PathProgramCache]: Analyzing trace with hash 1650764336, now seen corresponding path program 1 times [2018-02-04 14:14:42,228 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:42,228 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:42,229 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:42,229 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:42,229 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:42,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:42,244 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:42,306 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:42,307 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:42,307 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-02-04 14:14:42,307 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 14:14:42,307 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 14:14:42,307 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 14:14:42,308 INFO L87 Difference]: Start difference. First operand 300 states and 314 transitions. Second operand 4 states. [2018-02-04 14:14:42,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:42,496 INFO L93 Difference]: Finished difference Result 328 states and 346 transitions. [2018-02-04 14:14:42,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 14:14:42,497 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2018-02-04 14:14:42,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:42,498 INFO L225 Difference]: With dead ends: 328 [2018-02-04 14:14:42,498 INFO L226 Difference]: Without dead ends: 328 [2018-02-04 14:14:42,499 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 14:14:42,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 328 states. [2018-02-04 14:14:42,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 328 to 298. [2018-02-04 14:14:42,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 298 states. [2018-02-04 14:14:42,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 298 states to 298 states and 312 transitions. [2018-02-04 14:14:42,508 INFO L78 Accepts]: Start accepts. Automaton has 298 states and 312 transitions. Word has length 13 [2018-02-04 14:14:42,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:42,509 INFO L432 AbstractCegarLoop]: Abstraction has 298 states and 312 transitions. [2018-02-04 14:14:42,509 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 14:14:42,509 INFO L276 IsEmpty]: Start isEmpty. Operand 298 states and 312 transitions. [2018-02-04 14:14:42,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-02-04 14:14:42,509 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:42,509 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:42,510 INFO L371 AbstractCegarLoop]: === Iteration 4 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:42,510 INFO L82 PathProgramCache]: Analyzing trace with hash 1650764335, now seen corresponding path program 1 times [2018-02-04 14:14:42,510 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:42,510 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:42,511 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:42,511 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:42,511 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:42,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:42,517 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:42,531 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:42,532 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:42,532 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-02-04 14:14:42,532 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 14:14:42,532 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 14:14:42,532 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 14:14:42,533 INFO L87 Difference]: Start difference. First operand 298 states and 312 transitions. Second operand 4 states. [2018-02-04 14:14:42,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:42,684 INFO L93 Difference]: Finished difference Result 315 states and 332 transitions. [2018-02-04 14:14:42,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 14:14:42,684 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2018-02-04 14:14:42,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:42,685 INFO L225 Difference]: With dead ends: 315 [2018-02-04 14:14:42,685 INFO L226 Difference]: Without dead ends: 315 [2018-02-04 14:14:42,685 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 14:14:42,686 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2018-02-04 14:14:42,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 296. [2018-02-04 14:14:42,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 296 states. [2018-02-04 14:14:42,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 296 states to 296 states and 310 transitions. [2018-02-04 14:14:42,690 INFO L78 Accepts]: Start accepts. Automaton has 296 states and 310 transitions. Word has length 13 [2018-02-04 14:14:42,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:42,690 INFO L432 AbstractCegarLoop]: Abstraction has 296 states and 310 transitions. [2018-02-04 14:14:42,690 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 14:14:42,691 INFO L276 IsEmpty]: Start isEmpty. Operand 296 states and 310 transitions. [2018-02-04 14:14:42,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-02-04 14:14:42,691 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:42,691 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:42,691 INFO L371 AbstractCegarLoop]: === Iteration 5 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:42,691 INFO L82 PathProgramCache]: Analyzing trace with hash 45229303, now seen corresponding path program 1 times [2018-02-04 14:14:42,692 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:42,692 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:42,693 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:42,693 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:42,693 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:42,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:42,698 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:42,718 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:42,718 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:42,718 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-02-04 14:14:42,719 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-04 14:14:42,719 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-04 14:14:42,719 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 14:14:42,719 INFO L87 Difference]: Start difference. First operand 296 states and 310 transitions. Second operand 3 states. [2018-02-04 14:14:42,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:42,737 INFO L93 Difference]: Finished difference Result 315 states and 327 transitions. [2018-02-04 14:14:42,737 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-04 14:14:42,737 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2018-02-04 14:14:42,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:42,738 INFO L225 Difference]: With dead ends: 315 [2018-02-04 14:14:42,738 INFO L226 Difference]: Without dead ends: 314 [2018-02-04 14:14:42,739 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 14:14:42,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 314 states. [2018-02-04 14:14:42,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 314 to 295. [2018-02-04 14:14:42,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 295 states. [2018-02-04 14:14:42,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 295 states to 295 states and 308 transitions. [2018-02-04 14:14:42,744 INFO L78 Accepts]: Start accepts. Automaton has 295 states and 308 transitions. Word has length 17 [2018-02-04 14:14:42,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:42,744 INFO L432 AbstractCegarLoop]: Abstraction has 295 states and 308 transitions. [2018-02-04 14:14:42,744 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-04 14:14:42,744 INFO L276 IsEmpty]: Start isEmpty. Operand 295 states and 308 transitions. [2018-02-04 14:14:42,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-02-04 14:14:42,744 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:42,744 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:42,745 INFO L371 AbstractCegarLoop]: === Iteration 6 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:42,745 INFO L82 PathProgramCache]: Analyzing trace with hash 963226955, now seen corresponding path program 1 times [2018-02-04 14:14:42,745 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:42,745 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:42,745 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:42,746 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:42,746 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:42,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:42,758 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:42,811 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:42,811 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:42,811 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-02-04 14:14:42,811 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 14:14:42,812 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 14:14:42,812 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 14:14:42,812 INFO L87 Difference]: Start difference. First operand 295 states and 308 transitions. Second operand 4 states. [2018-02-04 14:14:42,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:42,969 INFO L93 Difference]: Finished difference Result 329 states and 345 transitions. [2018-02-04 14:14:42,969 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 14:14:42,969 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2018-02-04 14:14:42,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:42,971 INFO L225 Difference]: With dead ends: 329 [2018-02-04 14:14:42,971 INFO L226 Difference]: Without dead ends: 329 [2018-02-04 14:14:42,971 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 14:14:42,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 329 states. [2018-02-04 14:14:42,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 329 to 293. [2018-02-04 14:14:42,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 293 states. [2018-02-04 14:14:42,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 306 transitions. [2018-02-04 14:14:42,977 INFO L78 Accepts]: Start accepts. Automaton has 293 states and 306 transitions. Word has length 20 [2018-02-04 14:14:42,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:42,977 INFO L432 AbstractCegarLoop]: Abstraction has 293 states and 306 transitions. [2018-02-04 14:14:42,977 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 14:14:42,977 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states and 306 transitions. [2018-02-04 14:14:42,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-02-04 14:14:42,977 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:42,978 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:42,978 INFO L371 AbstractCegarLoop]: === Iteration 7 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:42,978 INFO L82 PathProgramCache]: Analyzing trace with hash 963226954, now seen corresponding path program 1 times [2018-02-04 14:14:42,978 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:42,978 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:42,979 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:42,979 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:42,979 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:42,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:42,988 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:43,014 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:43,014 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:43,014 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-02-04 14:14:43,015 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 14:14:43,015 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 14:14:43,015 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 14:14:43,015 INFO L87 Difference]: Start difference. First operand 293 states and 306 transitions. Second operand 4 states. [2018-02-04 14:14:43,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:43,149 INFO L93 Difference]: Finished difference Result 316 states and 331 transitions. [2018-02-04 14:14:43,152 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 14:14:43,152 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2018-02-04 14:14:43,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:43,153 INFO L225 Difference]: With dead ends: 316 [2018-02-04 14:14:43,153 INFO L226 Difference]: Without dead ends: 316 [2018-02-04 14:14:43,154 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 14:14:43,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 316 states. [2018-02-04 14:14:43,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 316 to 291. [2018-02-04 14:14:43,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 291 states. [2018-02-04 14:14:43,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 304 transitions. [2018-02-04 14:14:43,160 INFO L78 Accepts]: Start accepts. Automaton has 291 states and 304 transitions. Word has length 20 [2018-02-04 14:14:43,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:43,161 INFO L432 AbstractCegarLoop]: Abstraction has 291 states and 304 transitions. [2018-02-04 14:14:43,161 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 14:14:43,161 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 304 transitions. [2018-02-04 14:14:43,161 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-02-04 14:14:43,161 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:43,161 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:43,161 INFO L371 AbstractCegarLoop]: === Iteration 8 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:43,162 INFO L82 PathProgramCache]: Analyzing trace with hash 1725402921, now seen corresponding path program 1 times [2018-02-04 14:14:43,162 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:43,162 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:43,162 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:43,162 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:43,162 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:43,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:43,174 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:43,203 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:43,203 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:43,203 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 14:14:43,204 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 14:14:43,204 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 14:14:43,204 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 14:14:43,204 INFO L87 Difference]: Start difference. First operand 291 states and 304 transitions. Second operand 5 states. [2018-02-04 14:14:43,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:43,266 INFO L93 Difference]: Finished difference Result 331 states and 347 transitions. [2018-02-04 14:14:43,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 14:14:43,267 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2018-02-04 14:14:43,267 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:43,268 INFO L225 Difference]: With dead ends: 331 [2018-02-04 14:14:43,268 INFO L226 Difference]: Without dead ends: 331 [2018-02-04 14:14:43,268 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-02-04 14:14:43,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2018-02-04 14:14:43,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 291. [2018-02-04 14:14:43,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 291 states. [2018-02-04 14:14:43,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 303 transitions. [2018-02-04 14:14:43,274 INFO L78 Accepts]: Start accepts. Automaton has 291 states and 303 transitions. Word has length 27 [2018-02-04 14:14:43,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:43,275 INFO L432 AbstractCegarLoop]: Abstraction has 291 states and 303 transitions. [2018-02-04 14:14:43,275 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 14:14:43,275 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 303 transitions. [2018-02-04 14:14:43,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-02-04 14:14:43,275 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:43,276 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:43,276 INFO L371 AbstractCegarLoop]: === Iteration 9 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:43,276 INFO L82 PathProgramCache]: Analyzing trace with hash 1961365059, now seen corresponding path program 1 times [2018-02-04 14:14:43,276 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:43,276 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:43,277 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:43,277 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:43,277 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:43,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:43,287 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:43,320 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:43,321 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:43,321 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 14:14:43,321 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 14:14:43,321 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 14:14:43,321 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 14:14:43,322 INFO L87 Difference]: Start difference. First operand 291 states and 303 transitions. Second operand 6 states. [2018-02-04 14:14:43,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:43,631 INFO L93 Difference]: Finished difference Result 309 states and 324 transitions. [2018-02-04 14:14:43,631 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 14:14:43,632 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2018-02-04 14:14:43,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:43,633 INFO L225 Difference]: With dead ends: 309 [2018-02-04 14:14:43,633 INFO L226 Difference]: Without dead ends: 309 [2018-02-04 14:14:43,633 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-02-04 14:14:43,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states. [2018-02-04 14:14:43,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 286. [2018-02-04 14:14:43,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 286 states. [2018-02-04 14:14:43,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 286 states to 286 states and 300 transitions. [2018-02-04 14:14:43,639 INFO L78 Accepts]: Start accepts. Automaton has 286 states and 300 transitions. Word has length 33 [2018-02-04 14:14:43,639 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:43,639 INFO L432 AbstractCegarLoop]: Abstraction has 286 states and 300 transitions. [2018-02-04 14:14:43,639 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 14:14:43,640 INFO L276 IsEmpty]: Start isEmpty. Operand 286 states and 300 transitions. [2018-02-04 14:14:43,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-02-04 14:14:43,640 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:43,640 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:43,641 INFO L371 AbstractCegarLoop]: === Iteration 10 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:43,641 INFO L82 PathProgramCache]: Analyzing trace with hash 1961365060, now seen corresponding path program 1 times [2018-02-04 14:14:43,641 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:43,641 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:43,642 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:43,642 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:43,642 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:43,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:43,653 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:43,735 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:43,735 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:43,736 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 14:14:43,736 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 14:14:43,736 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 14:14:43,736 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 14:14:43,737 INFO L87 Difference]: Start difference. First operand 286 states and 300 transitions. Second operand 7 states. [2018-02-04 14:14:44,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:44,098 INFO L93 Difference]: Finished difference Result 359 states and 375 transitions. [2018-02-04 14:14:44,099 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 14:14:44,099 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2018-02-04 14:14:44,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:44,100 INFO L225 Difference]: With dead ends: 359 [2018-02-04 14:14:44,100 INFO L226 Difference]: Without dead ends: 359 [2018-02-04 14:14:44,101 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-02-04 14:14:44,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 359 states. [2018-02-04 14:14:44,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 359 to 322. [2018-02-04 14:14:44,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 322 states. [2018-02-04 14:14:44,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 322 states to 322 states and 339 transitions. [2018-02-04 14:14:44,106 INFO L78 Accepts]: Start accepts. Automaton has 322 states and 339 transitions. Word has length 33 [2018-02-04 14:14:44,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:44,106 INFO L432 AbstractCegarLoop]: Abstraction has 322 states and 339 transitions. [2018-02-04 14:14:44,107 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 14:14:44,107 INFO L276 IsEmpty]: Start isEmpty. Operand 322 states and 339 transitions. [2018-02-04 14:14:44,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-02-04 14:14:44,108 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:44,108 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:44,108 INFO L371 AbstractCegarLoop]: === Iteration 11 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:44,108 INFO L82 PathProgramCache]: Analyzing trace with hash 816569686, now seen corresponding path program 1 times [2018-02-04 14:14:44,108 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:44,108 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:44,109 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:44,109 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:44,110 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:44,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:44,125 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:44,254 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:44,254 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:44,254 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-02-04 14:14:44,254 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 14:14:44,255 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 14:14:44,255 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2018-02-04 14:14:44,255 INFO L87 Difference]: Start difference. First operand 322 states and 339 transitions. Second operand 11 states. [2018-02-04 14:14:44,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:44,846 INFO L93 Difference]: Finished difference Result 336 states and 352 transitions. [2018-02-04 14:14:44,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 14:14:44,846 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 48 [2018-02-04 14:14:44,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:44,847 INFO L225 Difference]: With dead ends: 336 [2018-02-04 14:14:44,847 INFO L226 Difference]: Without dead ends: 336 [2018-02-04 14:14:44,848 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2018-02-04 14:14:44,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 336 states. [2018-02-04 14:14:44,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 336 to 323. [2018-02-04 14:14:44,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 323 states. [2018-02-04 14:14:44,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 323 states to 323 states and 341 transitions. [2018-02-04 14:14:44,852 INFO L78 Accepts]: Start accepts. Automaton has 323 states and 341 transitions. Word has length 48 [2018-02-04 14:14:44,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:44,852 INFO L432 AbstractCegarLoop]: Abstraction has 323 states and 341 transitions. [2018-02-04 14:14:44,853 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 14:14:44,853 INFO L276 IsEmpty]: Start isEmpty. Operand 323 states and 341 transitions. [2018-02-04 14:14:44,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-02-04 14:14:44,853 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:44,853 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:44,853 INFO L371 AbstractCegarLoop]: === Iteration 12 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:44,854 INFO L82 PathProgramCache]: Analyzing trace with hash 816569687, now seen corresponding path program 1 times [2018-02-04 14:14:44,854 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:44,854 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:44,854 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:44,854 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:44,855 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:44,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:44,866 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:45,039 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:45,040 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:45,040 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 14:14:45,040 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 14:14:45,040 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 14:14:45,041 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2018-02-04 14:14:45,041 INFO L87 Difference]: Start difference. First operand 323 states and 341 transitions. Second operand 10 states. [2018-02-04 14:14:45,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:45,578 INFO L93 Difference]: Finished difference Result 348 states and 364 transitions. [2018-02-04 14:14:45,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 14:14:45,578 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 48 [2018-02-04 14:14:45,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:45,580 INFO L225 Difference]: With dead ends: 348 [2018-02-04 14:14:45,580 INFO L226 Difference]: Without dead ends: 348 [2018-02-04 14:14:45,580 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=64, Invalid=208, Unknown=0, NotChecked=0, Total=272 [2018-02-04 14:14:45,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 348 states. [2018-02-04 14:14:45,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 348 to 323. [2018-02-04 14:14:45,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 323 states. [2018-02-04 14:14:45,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 323 states to 323 states and 340 transitions. [2018-02-04 14:14:45,585 INFO L78 Accepts]: Start accepts. Automaton has 323 states and 340 transitions. Word has length 48 [2018-02-04 14:14:45,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:45,586 INFO L432 AbstractCegarLoop]: Abstraction has 323 states and 340 transitions. [2018-02-04 14:14:45,586 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 14:14:45,586 INFO L276 IsEmpty]: Start isEmpty. Operand 323 states and 340 transitions. [2018-02-04 14:14:45,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-02-04 14:14:45,586 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:45,586 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:45,587 INFO L371 AbstractCegarLoop]: === Iteration 13 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:45,587 INFO L82 PathProgramCache]: Analyzing trace with hash 1119918648, now seen corresponding path program 1 times [2018-02-04 14:14:45,587 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:45,587 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:45,588 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:45,588 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:45,588 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:45,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:45,597 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:45,721 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:45,721 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:45,721 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-02-04 14:14:45,722 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 14:14:45,722 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 14:14:45,722 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2018-02-04 14:14:45,722 INFO L87 Difference]: Start difference. First operand 323 states and 340 transitions. Second operand 11 states. [2018-02-04 14:14:46,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:46,267 INFO L93 Difference]: Finished difference Result 334 states and 350 transitions. [2018-02-04 14:14:46,267 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 14:14:46,267 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 48 [2018-02-04 14:14:46,267 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:46,268 INFO L225 Difference]: With dead ends: 334 [2018-02-04 14:14:46,268 INFO L226 Difference]: Without dead ends: 334 [2018-02-04 14:14:46,269 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2018-02-04 14:14:46,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 334 states. [2018-02-04 14:14:46,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 334 to 323. [2018-02-04 14:14:46,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 323 states. [2018-02-04 14:14:46,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 323 states to 323 states and 339 transitions. [2018-02-04 14:14:46,274 INFO L78 Accepts]: Start accepts. Automaton has 323 states and 339 transitions. Word has length 48 [2018-02-04 14:14:46,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:46,274 INFO L432 AbstractCegarLoop]: Abstraction has 323 states and 339 transitions. [2018-02-04 14:14:46,274 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 14:14:46,274 INFO L276 IsEmpty]: Start isEmpty. Operand 323 states and 339 transitions. [2018-02-04 14:14:46,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-02-04 14:14:46,275 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:46,275 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:46,275 INFO L371 AbstractCegarLoop]: === Iteration 14 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:46,275 INFO L82 PathProgramCache]: Analyzing trace with hash 1119918649, now seen corresponding path program 1 times [2018-02-04 14:14:46,275 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:46,275 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:46,276 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:46,276 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:46,276 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:46,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:46,286 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:46,434 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:46,434 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:46,434 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 14:14:46,435 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 14:14:46,435 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 14:14:46,435 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2018-02-04 14:14:46,435 INFO L87 Difference]: Start difference. First operand 323 states and 339 transitions. Second operand 10 states. [2018-02-04 14:14:46,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:46,986 INFO L93 Difference]: Finished difference Result 346 states and 362 transitions. [2018-02-04 14:14:46,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 14:14:46,986 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 48 [2018-02-04 14:14:46,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:46,987 INFO L225 Difference]: With dead ends: 346 [2018-02-04 14:14:46,987 INFO L226 Difference]: Without dead ends: 346 [2018-02-04 14:14:46,987 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=64, Invalid=208, Unknown=0, NotChecked=0, Total=272 [2018-02-04 14:14:46,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346 states. [2018-02-04 14:14:46,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346 to 323. [2018-02-04 14:14:46,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 323 states. [2018-02-04 14:14:46,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 323 states to 323 states and 338 transitions. [2018-02-04 14:14:46,990 INFO L78 Accepts]: Start accepts. Automaton has 323 states and 338 transitions. Word has length 48 [2018-02-04 14:14:46,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:46,991 INFO L432 AbstractCegarLoop]: Abstraction has 323 states and 338 transitions. [2018-02-04 14:14:46,991 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 14:14:46,991 INFO L276 IsEmpty]: Start isEmpty. Operand 323 states and 338 transitions. [2018-02-04 14:14:46,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-02-04 14:14:46,991 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:46,992 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:46,992 INFO L371 AbstractCegarLoop]: === Iteration 15 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:46,992 INFO L82 PathProgramCache]: Analyzing trace with hash 1300121728, now seen corresponding path program 1 times [2018-02-04 14:14:46,992 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:46,992 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:46,993 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:46,993 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:46,993 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:47,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:47,004 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:47,251 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:47,252 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:14:47,252 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:14:47,262 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:47,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:47,323 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:14:47,402 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:14:47,406 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:14:47,406 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:47,408 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:47,413 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:14:47,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:14:47,417 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:47,421 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:47,429 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:47,429 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:30, output treesize:22 [2018-02-04 14:14:47,462 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-02-04 14:14:47,470 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 14:14:47,470 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:47,472 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:47,479 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-02-04 14:14:47,481 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 14:14:47,481 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:47,482 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:47,486 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:47,487 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:40, output treesize:10 [2018-02-04 14:14:47,510 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:47,540 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 14:14:47,541 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 11] total 16 [2018-02-04 14:14:47,541 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-04 14:14:47,541 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-04 14:14:47,541 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=197, Unknown=0, NotChecked=0, Total=240 [2018-02-04 14:14:47,541 INFO L87 Difference]: Start difference. First operand 323 states and 338 transitions. Second operand 16 states. [2018-02-04 14:14:47,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:47,983 INFO L93 Difference]: Finished difference Result 393 states and 412 transitions. [2018-02-04 14:14:47,983 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-02-04 14:14:47,983 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 54 [2018-02-04 14:14:47,983 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:47,984 INFO L225 Difference]: With dead ends: 393 [2018-02-04 14:14:47,984 INFO L226 Difference]: Without dead ends: 393 [2018-02-04 14:14:47,984 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 47 SyntacticMatches, 9 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 138 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=97, Invalid=409, Unknown=0, NotChecked=0, Total=506 [2018-02-04 14:14:47,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2018-02-04 14:14:47,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 366. [2018-02-04 14:14:48,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 366 states. [2018-02-04 14:14:48,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 366 states to 366 states and 382 transitions. [2018-02-04 14:14:48,001 INFO L78 Accepts]: Start accepts. Automaton has 366 states and 382 transitions. Word has length 54 [2018-02-04 14:14:48,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:48,001 INFO L432 AbstractCegarLoop]: Abstraction has 366 states and 382 transitions. [2018-02-04 14:14:48,001 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-04 14:14:48,002 INFO L276 IsEmpty]: Start isEmpty. Operand 366 states and 382 transitions. [2018-02-04 14:14:48,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-02-04 14:14:48,002 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:48,002 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:48,002 INFO L371 AbstractCegarLoop]: === Iteration 16 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:48,003 INFO L82 PathProgramCache]: Analyzing trace with hash 387977136, now seen corresponding path program 1 times [2018-02-04 14:14:48,003 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:48,003 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:48,003 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:48,004 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:48,004 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:48,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:48,016 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:48,047 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 14:14:48,047 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:48,047 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-04 14:14:48,048 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 14:14:48,048 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 14:14:48,048 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 14:14:48,048 INFO L87 Difference]: Start difference. First operand 366 states and 382 transitions. Second operand 5 states. [2018-02-04 14:14:48,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:48,301 INFO L93 Difference]: Finished difference Result 386 states and 405 transitions. [2018-02-04 14:14:48,301 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 14:14:48,301 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 60 [2018-02-04 14:14:48,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:48,302 INFO L225 Difference]: With dead ends: 386 [2018-02-04 14:14:48,302 INFO L226 Difference]: Without dead ends: 386 [2018-02-04 14:14:48,303 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-02-04 14:14:48,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 386 states. [2018-02-04 14:14:48,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 386 to 367. [2018-02-04 14:14:48,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 367 states. [2018-02-04 14:14:48,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 367 states to 367 states and 385 transitions. [2018-02-04 14:14:48,312 INFO L78 Accepts]: Start accepts. Automaton has 367 states and 385 transitions. Word has length 60 [2018-02-04 14:14:48,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:48,313 INFO L432 AbstractCegarLoop]: Abstraction has 367 states and 385 transitions. [2018-02-04 14:14:48,313 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 14:14:48,313 INFO L276 IsEmpty]: Start isEmpty. Operand 367 states and 385 transitions. [2018-02-04 14:14:48,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-02-04 14:14:48,314 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:48,314 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:48,314 INFO L371 AbstractCegarLoop]: === Iteration 17 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:48,314 INFO L82 PathProgramCache]: Analyzing trace with hash 387977137, now seen corresponding path program 1 times [2018-02-04 14:14:48,314 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:48,314 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:48,316 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:48,317 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:48,317 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:48,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:48,332 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:48,421 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:48,422 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:48,422 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 14:14:48,422 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 14:14:48,422 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 14:14:48,422 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 14:14:48,423 INFO L87 Difference]: Start difference. First operand 367 states and 385 transitions. Second operand 7 states. [2018-02-04 14:14:48,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:48,772 INFO L93 Difference]: Finished difference Result 398 states and 420 transitions. [2018-02-04 14:14:48,773 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 14:14:48,773 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 60 [2018-02-04 14:14:48,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:48,774 INFO L225 Difference]: With dead ends: 398 [2018-02-04 14:14:48,775 INFO L226 Difference]: Without dead ends: 398 [2018-02-04 14:14:48,775 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-02-04 14:14:48,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 398 states. [2018-02-04 14:14:48,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 398 to 380. [2018-02-04 14:14:48,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 380 states. [2018-02-04 14:14:48,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 380 states to 380 states and 401 transitions. [2018-02-04 14:14:48,782 INFO L78 Accepts]: Start accepts. Automaton has 380 states and 401 transitions. Word has length 60 [2018-02-04 14:14:48,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:48,783 INFO L432 AbstractCegarLoop]: Abstraction has 380 states and 401 transitions. [2018-02-04 14:14:48,783 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 14:14:48,783 INFO L276 IsEmpty]: Start isEmpty. Operand 380 states and 401 transitions. [2018-02-04 14:14:48,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-02-04 14:14:48,783 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:48,784 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:48,784 INFO L371 AbstractCegarLoop]: === Iteration 18 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:48,784 INFO L82 PathProgramCache]: Analyzing trace with hash -555377704, now seen corresponding path program 1 times [2018-02-04 14:14:48,784 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:48,784 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:48,785 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:48,785 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:48,785 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:48,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:48,794 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:48,828 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 14:14:48,829 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:48,829 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-04 14:14:48,829 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 14:14:48,829 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 14:14:48,829 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 14:14:48,830 INFO L87 Difference]: Start difference. First operand 380 states and 401 transitions. Second operand 5 states. [2018-02-04 14:14:49,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:49,009 INFO L93 Difference]: Finished difference Result 377 states and 398 transitions. [2018-02-04 14:14:49,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 14:14:49,009 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 62 [2018-02-04 14:14:49,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:49,010 INFO L225 Difference]: With dead ends: 377 [2018-02-04 14:14:49,010 INFO L226 Difference]: Without dead ends: 377 [2018-02-04 14:14:49,011 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-02-04 14:14:49,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 377 states. [2018-02-04 14:14:49,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 377 to 377. [2018-02-04 14:14:49,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 377 states. [2018-02-04 14:14:49,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 377 states to 377 states and 398 transitions. [2018-02-04 14:14:49,017 INFO L78 Accepts]: Start accepts. Automaton has 377 states and 398 transitions. Word has length 62 [2018-02-04 14:14:49,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:49,017 INFO L432 AbstractCegarLoop]: Abstraction has 377 states and 398 transitions. [2018-02-04 14:14:49,017 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 14:14:49,017 INFO L276 IsEmpty]: Start isEmpty. Operand 377 states and 398 transitions. [2018-02-04 14:14:49,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-02-04 14:14:49,018 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:49,018 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:49,018 INFO L371 AbstractCegarLoop]: === Iteration 19 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:49,018 INFO L82 PathProgramCache]: Analyzing trace with hash -555377703, now seen corresponding path program 1 times [2018-02-04 14:14:49,018 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:49,018 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:49,019 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:49,019 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:49,019 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:49,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:49,029 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:49,097 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:49,097 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:49,098 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 14:14:49,099 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 14:14:49,099 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 14:14:49,099 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 14:14:49,099 INFO L87 Difference]: Start difference. First operand 377 states and 398 transitions. Second operand 7 states. [2018-02-04 14:14:49,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:49,529 INFO L93 Difference]: Finished difference Result 422 states and 443 transitions. [2018-02-04 14:14:49,529 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 14:14:49,530 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 62 [2018-02-04 14:14:49,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:49,531 INFO L225 Difference]: With dead ends: 422 [2018-02-04 14:14:49,531 INFO L226 Difference]: Without dead ends: 422 [2018-02-04 14:14:49,531 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-02-04 14:14:49,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 422 states. [2018-02-04 14:14:49,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 422 to 403. [2018-02-04 14:14:49,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 403 states. [2018-02-04 14:14:49,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 403 states to 403 states and 430 transitions. [2018-02-04 14:14:49,538 INFO L78 Accepts]: Start accepts. Automaton has 403 states and 430 transitions. Word has length 62 [2018-02-04 14:14:49,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:49,538 INFO L432 AbstractCegarLoop]: Abstraction has 403 states and 430 transitions. [2018-02-04 14:14:49,538 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 14:14:49,538 INFO L276 IsEmpty]: Start isEmpty. Operand 403 states and 430 transitions. [2018-02-04 14:14:49,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-02-04 14:14:49,539 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:49,540 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:49,540 INFO L371 AbstractCegarLoop]: === Iteration 20 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:49,540 INFO L82 PathProgramCache]: Analyzing trace with hash 1681231164, now seen corresponding path program 1 times [2018-02-04 14:14:49,540 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:49,540 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:49,541 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:49,541 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:49,541 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:49,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:49,552 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:49,749 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:49,749 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:14:49,749 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:14:49,758 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:49,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:49,792 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:14:49,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:14:49,856 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:14:49,856 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:49,857 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:49,863 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:14:49,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:14:49,864 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:49,865 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:49,869 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:49,869 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:30, output treesize:22 [2018-02-04 14:14:49,937 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-02-04 14:14:49,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-02-04 14:14:49,939 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:49,939 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:49,942 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-02-04 14:14:49,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-02-04 14:14:49,944 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:49,944 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:49,946 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:49,946 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:29, output treesize:7 [2018-02-04 14:14:49,969 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:49,998 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 14:14:49,998 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10] total 15 [2018-02-04 14:14:49,999 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-04 14:14:49,999 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-04 14:14:49,999 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=166, Unknown=1, NotChecked=0, Total=210 [2018-02-04 14:14:49,999 INFO L87 Difference]: Start difference. First operand 403 states and 430 transitions. Second operand 15 states. [2018-02-04 14:14:50,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:50,346 INFO L93 Difference]: Finished difference Result 461 states and 489 transitions. [2018-02-04 14:14:50,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 14:14:50,346 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 64 [2018-02-04 14:14:50,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:50,348 INFO L225 Difference]: With dead ends: 461 [2018-02-04 14:14:50,348 INFO L226 Difference]: Without dead ends: 461 [2018-02-04 14:14:50,348 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 57 SyntacticMatches, 8 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=96, Invalid=323, Unknown=1, NotChecked=0, Total=420 [2018-02-04 14:14:50,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 461 states. [2018-02-04 14:14:50,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 461 to 406. [2018-02-04 14:14:50,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 406 states. [2018-02-04 14:14:50,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 406 states to 406 states and 433 transitions. [2018-02-04 14:14:50,354 INFO L78 Accepts]: Start accepts. Automaton has 406 states and 433 transitions. Word has length 64 [2018-02-04 14:14:50,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:50,354 INFO L432 AbstractCegarLoop]: Abstraction has 406 states and 433 transitions. [2018-02-04 14:14:50,354 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-04 14:14:50,354 INFO L276 IsEmpty]: Start isEmpty. Operand 406 states and 433 transitions. [2018-02-04 14:14:50,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-02-04 14:14:50,355 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:50,355 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:50,355 INFO L371 AbstractCegarLoop]: === Iteration 21 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:50,355 INFO L82 PathProgramCache]: Analyzing trace with hash -1652785484, now seen corresponding path program 2 times [2018-02-04 14:14:50,355 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:50,356 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:50,356 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:50,356 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:50,356 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:50,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:50,373 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:50,641 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 7 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:50,641 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:14:50,641 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:14:50,646 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 14:14:50,668 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 14:14:50,668 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 14:14:50,670 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:14:50,675 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-02-04 14:14:50,676 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:50,678 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:50,678 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-02-04 14:14:50,707 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-02-04 14:14:50,708 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:50,712 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:50,712 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:14 [2018-02-04 14:14:50,780 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:14:50,782 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:14:50,782 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:50,784 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:50,790 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:50,790 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:30, output treesize:23 [2018-02-04 14:14:50,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-02-04 14:14:50,961 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 14:14:50,962 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-02-04 14:14:50,962 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:50,965 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:50,971 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:14:50,971 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:11 [2018-02-04 14:14:50,999 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 22 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:51,019 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 14:14:51,019 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15] total 26 [2018-02-04 14:14:51,019 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-02-04 14:14:51,019 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-02-04 14:14:51,020 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=629, Unknown=0, NotChecked=0, Total=702 [2018-02-04 14:14:51,020 INFO L87 Difference]: Start difference. First operand 406 states and 433 transitions. Second operand 27 states. [2018-02-04 14:14:52,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:52,388 INFO L93 Difference]: Finished difference Result 427 states and 455 transitions. [2018-02-04 14:14:52,388 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 14:14:52,388 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 70 [2018-02-04 14:14:52,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:52,389 INFO L225 Difference]: With dead ends: 427 [2018-02-04 14:14:52,389 INFO L226 Difference]: Without dead ends: 427 [2018-02-04 14:14:52,390 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 109 GetRequests, 63 SyntacticMatches, 6 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 304 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=272, Invalid=1450, Unknown=0, NotChecked=0, Total=1722 [2018-02-04 14:14:52,390 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 427 states. [2018-02-04 14:14:52,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 427 to 409. [2018-02-04 14:14:52,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 409 states. [2018-02-04 14:14:52,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 409 states to 409 states and 437 transitions. [2018-02-04 14:14:52,395 INFO L78 Accepts]: Start accepts. Automaton has 409 states and 437 transitions. Word has length 70 [2018-02-04 14:14:52,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:52,395 INFO L432 AbstractCegarLoop]: Abstraction has 409 states and 437 transitions. [2018-02-04 14:14:52,395 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-02-04 14:14:52,395 INFO L276 IsEmpty]: Start isEmpty. Operand 409 states and 437 transitions. [2018-02-04 14:14:52,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-02-04 14:14:52,396 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:52,396 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:52,396 INFO L371 AbstractCegarLoop]: === Iteration 22 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:52,397 INFO L82 PathProgramCache]: Analyzing trace with hash -1652785483, now seen corresponding path program 1 times [2018-02-04 14:14:52,397 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:52,397 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:52,397 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:52,397 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 14:14:52,398 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:52,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:52,411 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:52,781 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 7 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:52,782 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:14:52,782 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:14:52,787 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:52,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:52,817 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:14:52,951 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:14:52,955 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-02-04 14:14:52,955 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:52,967 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:14:52,968 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:14:52,969 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 14:14:52,969 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:52,976 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:52,976 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:28 [2018-02-04 14:14:53,019 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:14:53,019 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:14:53,020 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:14:53,020 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-02-04 14:14:53,020 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:53,033 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 28 [2018-02-04 14:14:53,033 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:53,040 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:14:53,040 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:42, output treesize:34 [2018-02-04 14:14:53,109 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:14:53,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:14:53,110 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:53,112 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:53,124 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:14:53,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:14:53,126 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:53,127 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:53,135 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:14:53,136 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:60, output treesize:61 [2018-02-04 14:14:53,280 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 33 [2018-02-04 14:14:53,284 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 14 [2018-02-04 14:14:53,284 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:53,289 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:53,304 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-02-04 14:14:53,306 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 14:14:53,306 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:53,308 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:53,319 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 14:14:53,320 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:79, output treesize:31 [2018-02-04 14:14:53,430 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 17 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:53,451 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 14:14:53,451 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 32 [2018-02-04 14:14:53,451 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-02-04 14:14:53,451 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-02-04 14:14:53,452 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=954, Unknown=0, NotChecked=0, Total=1056 [2018-02-04 14:14:53,452 INFO L87 Difference]: Start difference. First operand 409 states and 437 transitions. Second operand 33 states. [2018-02-04 14:14:55,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:55,740 INFO L93 Difference]: Finished difference Result 490 states and 519 transitions. [2018-02-04 14:14:55,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-02-04 14:14:55,740 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 70 [2018-02-04 14:14:55,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:55,741 INFO L225 Difference]: With dead ends: 490 [2018-02-04 14:14:55,741 INFO L226 Difference]: Without dead ends: 490 [2018-02-04 14:14:55,742 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 60 SyntacticMatches, 4 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 666 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=482, Invalid=2380, Unknown=0, NotChecked=0, Total=2862 [2018-02-04 14:14:55,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 490 states. [2018-02-04 14:14:55,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 490 to 440. [2018-02-04 14:14:55,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 440 states. [2018-02-04 14:14:55,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 440 states to 440 states and 470 transitions. [2018-02-04 14:14:55,745 INFO L78 Accepts]: Start accepts. Automaton has 440 states and 470 transitions. Word has length 70 [2018-02-04 14:14:55,746 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:55,746 INFO L432 AbstractCegarLoop]: Abstraction has 440 states and 470 transitions. [2018-02-04 14:14:55,746 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-02-04 14:14:55,746 INFO L276 IsEmpty]: Start isEmpty. Operand 440 states and 470 transitions. [2018-02-04 14:14:55,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-02-04 14:14:55,746 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:55,746 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:55,746 INFO L371 AbstractCegarLoop]: === Iteration 23 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:55,746 INFO L82 PathProgramCache]: Analyzing trace with hash -416395486, now seen corresponding path program 1 times [2018-02-04 14:14:55,747 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:55,747 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:55,747 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:55,747 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:55,747 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:55,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:55,753 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:55,830 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 14:14:55,830 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:55,830 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 14:14:55,830 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 14:14:55,831 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 14:14:55,831 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 14:14:55,831 INFO L87 Difference]: Start difference. First operand 440 states and 470 transitions. Second operand 10 states. [2018-02-04 14:14:56,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:56,222 INFO L93 Difference]: Finished difference Result 483 states and 515 transitions. [2018-02-04 14:14:56,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-02-04 14:14:56,222 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 73 [2018-02-04 14:14:56,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:56,223 INFO L225 Difference]: With dead ends: 483 [2018-02-04 14:14:56,223 INFO L226 Difference]: Without dead ends: 483 [2018-02-04 14:14:56,224 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2018-02-04 14:14:56,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 483 states. [2018-02-04 14:14:56,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 483 to 474. [2018-02-04 14:14:56,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 474 states. [2018-02-04 14:14:56,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 474 states to 474 states and 509 transitions. [2018-02-04 14:14:56,228 INFO L78 Accepts]: Start accepts. Automaton has 474 states and 509 transitions. Word has length 73 [2018-02-04 14:14:56,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:56,229 INFO L432 AbstractCegarLoop]: Abstraction has 474 states and 509 transitions. [2018-02-04 14:14:56,229 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 14:14:56,229 INFO L276 IsEmpty]: Start isEmpty. Operand 474 states and 509 transitions. [2018-02-04 14:14:56,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-02-04 14:14:56,229 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:56,229 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:56,229 INFO L371 AbstractCegarLoop]: === Iteration 24 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:56,229 INFO L82 PathProgramCache]: Analyzing trace with hash -416395485, now seen corresponding path program 1 times [2018-02-04 14:14:56,230 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:56,230 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:56,230 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:56,230 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:56,230 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:56,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:56,236 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:56,356 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:56,356 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:56,356 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-02-04 14:14:56,356 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-02-04 14:14:56,356 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-02-04 14:14:56,356 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=156, Unknown=0, NotChecked=0, Total=182 [2018-02-04 14:14:56,356 INFO L87 Difference]: Start difference. First operand 474 states and 509 transitions. Second operand 14 states. [2018-02-04 14:14:56,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:56,943 INFO L93 Difference]: Finished difference Result 517 states and 550 transitions. [2018-02-04 14:14:56,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-04 14:14:56,943 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 73 [2018-02-04 14:14:56,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:56,944 INFO L225 Difference]: With dead ends: 517 [2018-02-04 14:14:56,944 INFO L226 Difference]: Without dead ends: 517 [2018-02-04 14:14:56,944 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=85, Invalid=467, Unknown=0, NotChecked=0, Total=552 [2018-02-04 14:14:56,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 517 states. [2018-02-04 14:14:56,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 517 to 478. [2018-02-04 14:14:56,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 478 states. [2018-02-04 14:14:56,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 478 states to 478 states and 513 transitions. [2018-02-04 14:14:56,950 INFO L78 Accepts]: Start accepts. Automaton has 478 states and 513 transitions. Word has length 73 [2018-02-04 14:14:56,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:56,950 INFO L432 AbstractCegarLoop]: Abstraction has 478 states and 513 transitions. [2018-02-04 14:14:56,951 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-02-04 14:14:56,951 INFO L276 IsEmpty]: Start isEmpty. Operand 478 states and 513 transitions. [2018-02-04 14:14:56,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-02-04 14:14:56,951 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:56,952 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:56,952 INFO L371 AbstractCegarLoop]: === Iteration 25 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:56,952 INFO L82 PathProgramCache]: Analyzing trace with hash -2030774639, now seen corresponding path program 1 times [2018-02-04 14:14:56,952 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:56,952 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:56,953 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:56,953 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:56,953 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:56,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:56,963 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:57,129 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 14:14:57,129 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:57,129 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-02-04 14:14:57,130 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-04 14:14:57,130 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-04 14:14:57,130 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-02-04 14:14:57,130 INFO L87 Difference]: Start difference. First operand 478 states and 513 transitions. Second operand 12 states. [2018-02-04 14:14:57,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:57,459 INFO L93 Difference]: Finished difference Result 487 states and 518 transitions. [2018-02-04 14:14:57,459 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-02-04 14:14:57,459 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 78 [2018-02-04 14:14:57,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:57,460 INFO L225 Difference]: With dead ends: 487 [2018-02-04 14:14:57,460 INFO L226 Difference]: Without dead ends: 487 [2018-02-04 14:14:57,460 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=283, Unknown=0, NotChecked=0, Total=342 [2018-02-04 14:14:57,461 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 487 states. [2018-02-04 14:14:57,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 487 to 470. [2018-02-04 14:14:57,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 470 states. [2018-02-04 14:14:57,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 470 states to 470 states and 499 transitions. [2018-02-04 14:14:57,466 INFO L78 Accepts]: Start accepts. Automaton has 470 states and 499 transitions. Word has length 78 [2018-02-04 14:14:57,466 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:57,466 INFO L432 AbstractCegarLoop]: Abstraction has 470 states and 499 transitions. [2018-02-04 14:14:57,466 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-04 14:14:57,466 INFO L276 IsEmpty]: Start isEmpty. Operand 470 states and 499 transitions. [2018-02-04 14:14:57,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-02-04 14:14:57,467 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:57,467 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:57,467 INFO L371 AbstractCegarLoop]: === Iteration 26 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:57,467 INFO L82 PathProgramCache]: Analyzing trace with hash -891514256, now seen corresponding path program 2 times [2018-02-04 14:14:57,467 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:57,467 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:57,468 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:57,468 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:57,468 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:57,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:57,478 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:57,737 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 7 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:57,737 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:14:57,737 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:14:57,743 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 14:14:57,768 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 14:14:57,768 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 14:14:57,771 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:14:57,844 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-02-04 14:14:57,846 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 14:14:57,846 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:57,847 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:57,850 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-02-04 14:14:57,851 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 14:14:57,852 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:14:57,852 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:57,854 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:14:57,854 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:37, output treesize:7 [2018-02-04 14:14:57,889 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-02-04 14:14:57,907 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:14:57,907 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [17] total 25 [2018-02-04 14:14:57,907 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-02-04 14:14:57,908 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-02-04 14:14:57,908 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=541, Unknown=0, NotChecked=0, Total=600 [2018-02-04 14:14:57,908 INFO L87 Difference]: Start difference. First operand 470 states and 499 transitions. Second operand 25 states. [2018-02-04 14:14:58,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:58,533 INFO L93 Difference]: Finished difference Result 512 states and 540 transitions. [2018-02-04 14:14:58,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-02-04 14:14:58,533 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 80 [2018-02-04 14:14:58,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:58,534 INFO L225 Difference]: With dead ends: 512 [2018-02-04 14:14:58,534 INFO L226 Difference]: Without dead ends: 494 [2018-02-04 14:14:58,535 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 77 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 214 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=180, Invalid=1080, Unknown=0, NotChecked=0, Total=1260 [2018-02-04 14:14:58,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 494 states. [2018-02-04 14:14:58,538 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 494 to 449. [2018-02-04 14:14:58,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 449 states. [2018-02-04 14:14:58,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 449 states to 449 states and 476 transitions. [2018-02-04 14:14:58,540 INFO L78 Accepts]: Start accepts. Automaton has 449 states and 476 transitions. Word has length 80 [2018-02-04 14:14:58,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:58,540 INFO L432 AbstractCegarLoop]: Abstraction has 449 states and 476 transitions. [2018-02-04 14:14:58,540 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-02-04 14:14:58,540 INFO L276 IsEmpty]: Start isEmpty. Operand 449 states and 476 transitions. [2018-02-04 14:14:58,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-02-04 14:14:58,540 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:58,541 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:58,541 INFO L371 AbstractCegarLoop]: === Iteration 27 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:58,541 INFO L82 PathProgramCache]: Analyzing trace with hash -2087785373, now seen corresponding path program 1 times [2018-02-04 14:14:58,541 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:58,541 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:58,541 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:58,541 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 14:14:58,541 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:58,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:58,548 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:58,800 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:58,801 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:58,801 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-02-04 14:14:58,801 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-02-04 14:14:58,801 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-02-04 14:14:58,801 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=155, Unknown=0, NotChecked=0, Total=182 [2018-02-04 14:14:58,802 INFO L87 Difference]: Start difference. First operand 449 states and 476 transitions. Second operand 14 states. [2018-02-04 14:14:59,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:14:59,527 INFO L93 Difference]: Finished difference Result 473 states and 500 transitions. [2018-02-04 14:14:59,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-02-04 14:14:59,527 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 86 [2018-02-04 14:14:59,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:14:59,529 INFO L225 Difference]: With dead ends: 473 [2018-02-04 14:14:59,529 INFO L226 Difference]: Without dead ends: 473 [2018-02-04 14:14:59,529 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 129 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=185, Invalid=745, Unknown=0, NotChecked=0, Total=930 [2018-02-04 14:14:59,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 473 states. [2018-02-04 14:14:59,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 473 to 454. [2018-02-04 14:14:59,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 454 states. [2018-02-04 14:14:59,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 454 states to 454 states and 483 transitions. [2018-02-04 14:14:59,536 INFO L78 Accepts]: Start accepts. Automaton has 454 states and 483 transitions. Word has length 86 [2018-02-04 14:14:59,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:14:59,537 INFO L432 AbstractCegarLoop]: Abstraction has 454 states and 483 transitions. [2018-02-04 14:14:59,537 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-02-04 14:14:59,537 INFO L276 IsEmpty]: Start isEmpty. Operand 454 states and 483 transitions. [2018-02-04 14:14:59,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-02-04 14:14:59,537 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:14:59,538 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:14:59,538 INFO L371 AbstractCegarLoop]: === Iteration 28 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:14:59,538 INFO L82 PathProgramCache]: Analyzing trace with hash -2087785372, now seen corresponding path program 1 times [2018-02-04 14:14:59,538 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:14:59,538 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:14:59,539 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:59,539 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:14:59,539 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:14:59,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:14:59,547 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:14:59,692 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:14:59,692 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:14:59,692 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-02-04 14:14:59,692 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-04 14:14:59,692 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-04 14:14:59,692 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2018-02-04 14:14:59,692 INFO L87 Difference]: Start difference. First operand 454 states and 483 transitions. Second operand 12 states. [2018-02-04 14:15:00,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:15:00,037 INFO L93 Difference]: Finished difference Result 484 states and 511 transitions. [2018-02-04 14:15:00,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-04 14:15:00,038 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 86 [2018-02-04 14:15:00,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:15:00,039 INFO L225 Difference]: With dead ends: 484 [2018-02-04 14:15:00,039 INFO L226 Difference]: Without dead ends: 484 [2018-02-04 14:15:00,039 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=331, Unknown=0, NotChecked=0, Total=420 [2018-02-04 14:15:00,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 484 states. [2018-02-04 14:15:00,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 484 to 456. [2018-02-04 14:15:00,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 456 states. [2018-02-04 14:15:00,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 456 states to 456 states and 484 transitions. [2018-02-04 14:15:00,042 INFO L78 Accepts]: Start accepts. Automaton has 456 states and 484 transitions. Word has length 86 [2018-02-04 14:15:00,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:15:00,043 INFO L432 AbstractCegarLoop]: Abstraction has 456 states and 484 transitions. [2018-02-04 14:15:00,043 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-04 14:15:00,043 INFO L276 IsEmpty]: Start isEmpty. Operand 456 states and 484 transitions. [2018-02-04 14:15:00,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-02-04 14:15:00,043 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:15:00,043 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:15:00,043 INFO L371 AbstractCegarLoop]: === Iteration 29 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:15:00,043 INFO L82 PathProgramCache]: Analyzing trace with hash -1341367099, now seen corresponding path program 1 times [2018-02-04 14:15:00,043 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:15:00,043 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:15:00,044 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:15:00,044 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:15:00,044 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:15:00,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:15:00,062 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:15:00,972 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 7 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:15:00,972 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:15:00,972 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:15:00,977 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:15:01,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:15:01,011 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:15:01,035 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-02-04 14:15:01,036 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:01,047 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:01,048 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:14 [2018-02-04 14:15:01,136 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 29 [2018-02-04 14:15:01,137 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 14:15:01,137 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:01,142 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:01,143 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-02-04 14:15:01,143 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:01,148 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:01,148 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:65, output treesize:25 [2018-02-04 14:15:01,185 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-02-04 14:15:01,188 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:01,189 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 25 [2018-02-04 14:15:01,189 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:01,192 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:01,197 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:01,198 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:25 [2018-02-04 14:15:01,230 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:01,230 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:01,232 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:01,232 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 38 [2018-02-04 14:15:01,232 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:01,240 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:01,240 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:36, output treesize:42 [2018-02-04 14:15:01,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 30 [2018-02-04 14:15:01,344 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 14:15:01,344 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:01,349 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:01,363 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:01,363 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:53, output treesize:49 [2018-02-04 14:15:01,402 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 43 [2018-02-04 14:15:01,404 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:01,405 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 14 [2018-02-04 14:15:01,405 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:01,409 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:01,419 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:15:01,419 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:68, output treesize:49 [2018-02-04 14:15:01,468 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 37 [2018-02-04 14:15:01,469 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:01,491 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:15:01,491 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:58, output treesize:57 [2018-02-04 14:15:01,601 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:01,614 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 36 treesize of output 72 [2018-02-04 14:15:01,618 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 14:15:01,619 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 38 [2018-02-04 14:15:01,619 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:15:01,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 32 [2018-02-04 14:15:01,696 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:01,735 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 39 [2018-02-04 14:15:01,735 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-02-04 14:15:01,807 INFO L267 ElimStorePlain]: Start of recursive call 2: 4 dim-1 vars, End of recursive call: 1 dim-0 vars, and 4 xjuncts. [2018-02-04 14:15:01,844 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 4 xjuncts. [2018-02-04 14:15:01,845 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:71, output treesize:276 [2018-02-04 14:15:02,051 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 99 [2018-02-04 14:15:02,052 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:15:02,052 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:02,068 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:02,070 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 74 [2018-02-04 14:15:02,072 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:15:02,072 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:02,085 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:02,087 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 73 [2018-02-04 14:15:02,089 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:15:02,089 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:02,104 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:02,165 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 66 [2018-02-04 14:15:02,167 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:02,167 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 44 [2018-02-04 14:15:02,167 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:02,177 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:02,234 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:02,235 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:02,236 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:02,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 89 [2018-02-04 14:15:02,240 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:02,246 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 33 treesize of output 52 [2018-02-04 14:15:02,247 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-02-04 14:15:02,264 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:02,312 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:02,314 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:02,315 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:02,331 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 98 treesize of output 126 [2018-02-04 14:15:02,335 INFO L267 ElimStorePlain]: Start of recursive call 13: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 14:15:02,424 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:02,424 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 5 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 108 [2018-02-04 14:15:02,425 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:02,481 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:02,483 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:02,488 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 75 treesize of output 100 [2018-02-04 14:15:02,488 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 2 xjuncts. [2018-02-04 14:15:02,529 INFO L267 ElimStorePlain]: Start of recursive call 12: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 14:15:02,577 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-2 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-02-04 14:15:02,577 INFO L202 ElimStorePlain]: Needed 15 recursive calls to eliminate 8 variables, input treesize:256, output treesize:301 [2018-02-04 14:15:02,970 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 83 [2018-02-04 14:15:02,975 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 7 [2018-02-04 14:15:02,975 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:02,986 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:03,028 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 148 treesize of output 138 [2018-02-04 14:15:03,030 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 40 [2018-02-04 14:15:03,030 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:03,043 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:03,086 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 117 treesize of output 107 [2018-02-04 14:15:03,087 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 36 [2018-02-04 14:15:03,087 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:03,097 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:03,134 INFO L267 ElimStorePlain]: Start of recursive call 1: 8 dim-0 vars, 3 dim-2 vars, End of recursive call: 8 dim-0 vars, and 3 xjuncts. [2018-02-04 14:15:03,135 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 11 variables, input treesize:355, output treesize:268 [2018-02-04 14:15:03,649 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:03,650 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:03,651 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 84 [2018-02-04 14:15:03,654 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:03,662 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 30 treesize of output 40 [2018-02-04 14:15:03,663 INFO L267 ElimStorePlain]: Start of recursive call 3: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 4 xjuncts. [2018-02-04 14:15:03,683 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 20 [2018-02-04 14:15:03,683 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:15:03,693 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:15:03,720 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:03,721 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:03,725 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 5 new quantified variables, introduced 1 case distinctions, treesize of input 134 treesize of output 116 [2018-02-04 14:15:03,732 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 97 [2018-02-04 14:15:03,732 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:03,795 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:03,797 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 83 [2018-02-04 14:15:03,797 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:03,848 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 59 [2018-02-04 14:15:03,849 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 14:15:03,899 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:03,901 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 82 [2018-02-04 14:15:03,901 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:03,956 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 76 treesize of output 69 [2018-02-04 14:15:03,957 INFO L267 ElimStorePlain]: Start of recursive call 10: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-02-04 14:15:04,025 INFO L267 ElimStorePlain]: Start of recursive call 5: 5 dim-1 vars, End of recursive call: 5 dim-0 vars, and 3 xjuncts. [2018-02-04 14:15:04,077 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 2 dim-2 vars, End of recursive call: 10 dim-0 vars, and 4 xjuncts. [2018-02-04 14:15:04,077 INFO L202 ElimStorePlain]: Needed 10 recursive calls to eliminate 9 variables, input treesize:238, output treesize:140 [2018-02-04 14:15:04,205 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 16 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:15:04,222 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 14:15:04,222 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 45 [2018-02-04 14:15:04,223 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-02-04 14:15:04,223 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-02-04 14:15:04,223 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=1903, Unknown=0, NotChecked=0, Total=2070 [2018-02-04 14:15:04,223 INFO L87 Difference]: Start difference. First operand 456 states and 484 transitions. Second operand 46 states. [2018-02-04 14:15:05,023 WARN L146 SmtUtils]: Spent 121ms on a formula simplification. DAG size of input: 94 DAG size of output 69 [2018-02-04 14:15:05,430 WARN L146 SmtUtils]: Spent 272ms on a formula simplification. DAG size of input: 124 DAG size of output 94 [2018-02-04 14:15:05,716 WARN L146 SmtUtils]: Spent 250ms on a formula simplification. DAG size of input: 148 DAG size of output 114 [2018-02-04 14:15:06,012 WARN L146 SmtUtils]: Spent 232ms on a formula simplification. DAG size of input: 152 DAG size of output 118 [2018-02-04 14:15:06,482 WARN L146 SmtUtils]: Spent 388ms on a formula simplification. DAG size of input: 156 DAG size of output 122 [2018-02-04 14:15:06,857 WARN L143 SmtUtils]: Spent 256ms on a formula simplification that was a NOOP. DAG size: 101 [2018-02-04 14:15:07,289 WARN L146 SmtUtils]: Spent 279ms on a formula simplification. DAG size of input: 110 DAG size of output 102 [2018-02-04 14:15:07,690 WARN L143 SmtUtils]: Spent 250ms on a formula simplification that was a NOOP. DAG size: 164 [2018-02-04 14:15:07,856 WARN L143 SmtUtils]: Spent 118ms on a formula simplification that was a NOOP. DAG size: 140 [2018-02-04 14:15:08,065 WARN L143 SmtUtils]: Spent 147ms on a formula simplification that was a NOOP. DAG size: 145 [2018-02-04 14:15:09,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:15:09,492 INFO L93 Difference]: Finished difference Result 469 states and 495 transitions. [2018-02-04 14:15:09,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-02-04 14:15:09,492 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 85 [2018-02-04 14:15:09,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:15:09,493 INFO L225 Difference]: With dead ends: 469 [2018-02-04 14:15:09,493 INFO L226 Difference]: Without dead ends: 469 [2018-02-04 14:15:09,494 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 67 SyntacticMatches, 6 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 983 ImplicationChecksByTransitivity, 5.6s TimeCoverageRelationStatistics Valid=577, Invalid=4115, Unknown=0, NotChecked=0, Total=4692 [2018-02-04 14:15:09,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 469 states. [2018-02-04 14:15:09,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 469 to 457. [2018-02-04 14:15:09,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 457 states. [2018-02-04 14:15:09,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 457 states to 457 states and 486 transitions. [2018-02-04 14:15:09,497 INFO L78 Accepts]: Start accepts. Automaton has 457 states and 486 transitions. Word has length 85 [2018-02-04 14:15:09,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:15:09,498 INFO L432 AbstractCegarLoop]: Abstraction has 457 states and 486 transitions. [2018-02-04 14:15:09,498 INFO L433 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-02-04 14:15:09,498 INFO L276 IsEmpty]: Start isEmpty. Operand 457 states and 486 transitions. [2018-02-04 14:15:09,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-02-04 14:15:09,498 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:15:09,498 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:15:09,498 INFO L371 AbstractCegarLoop]: === Iteration 30 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:15:09,498 INFO L82 PathProgramCache]: Analyzing trace with hash -1341367098, now seen corresponding path program 1 times [2018-02-04 14:15:09,498 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:15:09,498 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:15:09,499 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:15:09,499 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:15:09,499 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:15:09,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:15:09,510 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:15:10,595 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 14 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:15:10,596 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:15:10,596 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:15:10,601 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:15:10,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:15:10,625 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:15:10,627 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 14:15:10,627 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:10,630 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:10,630 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-02-04 14:15:10,684 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:10,685 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-02-04 14:15:10,685 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:10,692 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:10,693 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:10,693 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 14:15:10,694 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:10,699 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:10,699 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:34, output treesize:31 [2018-02-04 14:15:10,752 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-02-04 14:15:10,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 14:15:10,754 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:10,757 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:10,774 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-02-04 14:15:10,776 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 14:15:10,776 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:10,778 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:10,791 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:10,791 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:53, output treesize:50 [2018-02-04 14:15:10,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-02-04 14:15:10,839 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:10,840 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-02-04 14:15:10,841 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:10,845 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:10,858 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 31 [2018-02-04 14:15:10,859 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:10,860 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 42 [2018-02-04 14:15:10,860 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:10,866 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:10,876 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:10,876 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:76, output treesize:50 [2018-02-04 14:15:10,908 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:10,908 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:10,909 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 40 [2018-02-04 14:15:10,909 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:10,923 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:10,923 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:10,924 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:10,924 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 46 [2018-02-04 14:15:10,924 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:10,935 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:10,936 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:67, output treesize:72 [2018-02-04 14:15:11,013 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 47 [2018-02-04 14:15:11,014 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 14:15:11,014 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,020 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,036 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-02-04 14:15:11,037 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 14:15:11,038 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,041 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,054 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,054 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:94, output treesize:86 [2018-02-04 14:15:11,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 60 [2018-02-04 14:15:11,117 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:11,118 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 14 [2018-02-04 14:15:11,118 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,126 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,158 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-02-04 14:15:11,161 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:11,162 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 14 [2018-02-04 14:15:11,162 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,166 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,183 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,183 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:124, output treesize:86 [2018-02-04 14:15:11,209 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:11,210 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:11,210 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:11,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 61 [2018-02-04 14:15:11,211 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,248 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:11,249 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:11,249 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:11,250 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:11,250 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 37 [2018-02-04 14:15:11,250 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,269 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,269 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:100, output treesize:91 [2018-02-04 14:15:11,376 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:11,379 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 70 [2018-02-04 14:15:11,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2018-02-04 14:15:11,382 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,392 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,419 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:11,423 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 39 [2018-02-04 14:15:11,425 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 14:15:11,425 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,431 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,451 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,451 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:116, output treesize:122 [2018-02-04 14:15:11,505 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:11,506 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:11,507 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:11,510 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 115 [2018-02-04 14:15:11,514 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:11,521 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 83 treesize of output 112 [2018-02-04 14:15:11,521 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-02-04 14:15:11,546 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,569 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:11,574 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 70 [2018-02-04 14:15:11,576 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:11,577 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 46 [2018-02-04 14:15:11,577 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,584 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,604 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:11,604 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:148, output treesize:212 [2018-02-04 14:15:11,992 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:11,993 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:11,995 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 221 treesize of output 179 [2018-02-04 14:15:11,997 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 1 [2018-02-04 14:15:11,997 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:12,016 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 24 [2018-02-04 14:15:12,016 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:12,032 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 74 [2018-02-04 14:15:12,032 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 14:15:12,046 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 14:15:12,068 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 52 [2018-02-04 14:15:12,071 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:12,071 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 28 [2018-02-04 14:15:12,072 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 14:15:12,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-02-04 14:15:12,082 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:12,087 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-02-04 14:15:12,087 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:12,091 INFO L267 ElimStorePlain]: Start of recursive call 6: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:12,104 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-02-04 14:15:12,104 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 4 variables, input treesize:250, output treesize:48 [2018-02-04 14:15:12,222 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 7 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:15:12,240 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 14:15:12,240 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 21] total 44 [2018-02-04 14:15:12,240 INFO L409 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-02-04 14:15:12,240 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-02-04 14:15:12,241 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=135, Invalid=1845, Unknown=0, NotChecked=0, Total=1980 [2018-02-04 14:15:12,241 INFO L87 Difference]: Start difference. First operand 457 states and 486 transitions. Second operand 45 states. [2018-02-04 14:15:17,479 WARN L146 SmtUtils]: Spent 141ms on a formula simplification. DAG size of input: 132 DAG size of output 100 [2018-02-04 14:15:17,728 WARN L146 SmtUtils]: Spent 195ms on a formula simplification. DAG size of input: 155 DAG size of output 123 [2018-02-04 14:15:17,986 WARN L146 SmtUtils]: Spent 214ms on a formula simplification. DAG size of input: 170 DAG size of output 130 [2018-02-04 14:15:20,296 WARN L146 SmtUtils]: Spent 223ms on a formula simplification. DAG size of input: 176 DAG size of output 136 [2018-02-04 14:15:20,572 WARN L146 SmtUtils]: Spent 207ms on a formula simplification. DAG size of input: 171 DAG size of output 129 [2018-02-04 14:15:20,911 WARN L146 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 101 DAG size of output 92 [2018-02-04 14:15:21,107 WARN L146 SmtUtils]: Spent 107ms on a formula simplification. DAG size of input: 97 DAG size of output 93 [2018-02-04 14:15:22,596 WARN L146 SmtUtils]: Spent 157ms on a formula simplification. DAG size of input: 150 DAG size of output 112 [2018-02-04 14:15:22,880 WARN L146 SmtUtils]: Spent 148ms on a formula simplification. DAG size of input: 159 DAG size of output 108 [2018-02-04 14:15:23,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:15:23,202 INFO L93 Difference]: Finished difference Result 506 states and 531 transitions. [2018-02-04 14:15:23,202 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-02-04 14:15:23,202 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 85 [2018-02-04 14:15:23,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:15:23,203 INFO L225 Difference]: With dead ends: 506 [2018-02-04 14:15:23,204 INFO L226 Difference]: Without dead ends: 506 [2018-02-04 14:15:23,205 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 66 SyntacticMatches, 8 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1107 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=669, Invalid=4301, Unknown=0, NotChecked=0, Total=4970 [2018-02-04 14:15:23,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 506 states. [2018-02-04 14:15:23,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 506 to 457. [2018-02-04 14:15:23,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 457 states. [2018-02-04 14:15:23,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 457 states to 457 states and 485 transitions. [2018-02-04 14:15:23,209 INFO L78 Accepts]: Start accepts. Automaton has 457 states and 485 transitions. Word has length 85 [2018-02-04 14:15:23,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:15:23,209 INFO L432 AbstractCegarLoop]: Abstraction has 457 states and 485 transitions. [2018-02-04 14:15:23,209 INFO L433 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-02-04 14:15:23,209 INFO L276 IsEmpty]: Start isEmpty. Operand 457 states and 485 transitions. [2018-02-04 14:15:23,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-02-04 14:15:23,209 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:15:23,210 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:15:23,210 INFO L371 AbstractCegarLoop]: === Iteration 31 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:15:23,210 INFO L82 PathProgramCache]: Analyzing trace with hash -1038018137, now seen corresponding path program 1 times [2018-02-04 14:15:23,210 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:15:23,210 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:15:23,210 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:15:23,210 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:15:23,210 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:15:23,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:15:23,221 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:15:23,961 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 7 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:15:23,961 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:15:23,962 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:15:23,967 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:15:23,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:15:23,989 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:15:24,065 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:15:24,066 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:15:24,067 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,068 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,074 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:15:24,075 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:15:24,075 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,076 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,080 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,080 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:38, output treesize:30 [2018-02-04 14:15:24,126 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:24,126 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:24,126 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-02-04 14:15:24,127 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,131 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,131 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:35, output treesize:29 [2018-02-04 14:15:24,192 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-02-04 14:15:24,194 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 14:15:24,194 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,197 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,206 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-02-04 14:15:24,207 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 14:15:24,208 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,211 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,217 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,217 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:51, output treesize:43 [2018-02-04 14:15:24,251 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 35 [2018-02-04 14:15:24,253 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:24,254 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 14 [2018-02-04 14:15:24,254 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,258 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 35 [2018-02-04 14:15:24,271 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:24,272 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 14 [2018-02-04 14:15:24,272 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,276 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,281 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,282 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:81, output treesize:43 [2018-02-04 14:15:24,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 28 treesize of output 59 [2018-02-04 14:15:24,369 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-02-04 14:15:24,369 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,413 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-02-04 14:15:24,413 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,425 INFO L267 ElimStorePlain]: Start of recursive call 2: 4 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,455 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 28 treesize of output 59 [2018-02-04 14:15:24,467 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 36 [2018-02-04 14:15:24,467 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,506 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 26 treesize of output 39 [2018-02-04 14:15:24,507 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-02-04 14:15:24,536 INFO L267 ElimStorePlain]: Start of recursive call 5: 4 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 14:15:24,553 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-02-04 14:15:24,553 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:71, output treesize:130 [2018-02-04 14:15:24,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 70 [2018-02-04 14:15:24,634 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:24,634 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 14:15:24,635 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 30 [2018-02-04 14:15:24,635 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,649 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,706 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 95 treesize of output 119 [2018-02-04 14:15:24,720 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:24,721 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:24,721 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 14:15:24,724 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 112 [2018-02-04 14:15:24,724 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,844 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:24,844 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 105 [2018-02-04 14:15:24,845 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:24,938 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:24,946 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 85 treesize of output 106 [2018-02-04 14:15:24,946 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-02-04 14:15:25,067 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-0 vars, 4 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-02-04 14:15:25,149 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 66 [2018-02-04 14:15:25,151 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:25,152 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-02-04 14:15:25,152 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:25,164 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:25,266 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 91 treesize of output 130 [2018-02-04 14:15:25,269 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:25,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 108 treesize of output 117 [2018-02-04 14:15:25,271 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:25,328 INFO L267 ElimStorePlain]: Start of recursive call 10: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:25,333 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 14:15:25,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 98 [2018-02-04 14:15:25,336 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:25,337 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:25,337 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 14:15:25,347 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 83 [2018-02-04 14:15:25,347 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:25,363 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:25,366 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 14:15:25,368 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 100 [2018-02-04 14:15:25,371 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:25,371 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:25,372 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 54 [2018-02-04 14:15:25,372 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:25,387 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:25,437 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-02-04 14:15:25,437 INFO L202 ElimStorePlain]: Needed 15 recursive calls to eliminate 8 variables, input treesize:171, output treesize:390 [2018-02-04 14:15:26,793 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 156 treesize of output 160 [2018-02-04 14:15:26,796 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 14:15:26,796 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 152 treesize of output 148 [2018-02-04 14:15:26,796 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:26,879 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:26,880 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 123 treesize of output 106 [2018-02-04 14:15:26,880 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:15:26,953 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 14:15:26,953 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 130 treesize of output 126 [2018-02-04 14:15:26,953 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:27,026 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:27,027 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 14:15:27,029 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 115 treesize of output 99 [2018-02-04 14:15:27,029 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:15:27,096 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 117 treesize of output 110 [2018-02-04 14:15:27,097 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:27,159 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 95 [2018-02-04 14:15:27,159 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:27,224 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:27,224 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 14:15:27,226 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 98 [2018-02-04 14:15:27,226 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:15:27,289 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:27,290 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 14:15:27,290 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 14:15:27,293 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 109 treesize of output 96 [2018-02-04 14:15:27,293 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:15:27,349 INFO L267 ElimStorePlain]: Start of recursive call 2: 8 dim-1 vars, End of recursive call: 4 dim-0 vars, and 4 xjuncts. [2018-02-04 14:15:27,472 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 145 treesize of output 117 [2018-02-04 14:15:27,474 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:27,475 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:27,475 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 38 [2018-02-04 14:15:27,475 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:27,487 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 14:15:27,488 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:27,496 INFO L267 ElimStorePlain]: Start of recursive call 11: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:27,605 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 126 treesize of output 118 [2018-02-04 14:15:27,606 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 14:15:27,607 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:27,608 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 36 [2018-02-04 14:15:27,609 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:15:27,622 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-02-04 14:15:27,622 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:27,630 INFO L267 ElimStorePlain]: Start of recursive call 14: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:15:27,737 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 142 treesize of output 128 [2018-02-04 14:15:27,738 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 14:15:27,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-02-04 14:15:27,739 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:27,752 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:15:27,753 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 28 [2018-02-04 14:15:27,753 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:27,764 INFO L267 ElimStorePlain]: Start of recursive call 17: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:27,861 INFO L267 ElimStorePlain]: Start of recursive call 1: 8 dim-0 vars, 4 dim-2 vars, End of recursive call: 18 dim-0 vars, and 7 xjuncts. [2018-02-04 14:15:27,861 INFO L202 ElimStorePlain]: Needed 19 recursive calls to eliminate 12 variables, input treesize:570, output treesize:551 [2018-02-04 14:15:28,215 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 48 [2018-02-04 14:15:28,217 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 20 [2018-02-04 14:15:28,217 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:28,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-02-04 14:15:28,221 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 14:15:28,223 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:28,227 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:15:28,227 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:79, output treesize:5 [2018-02-04 14:15:28,285 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:15:28,302 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 14:15:28,302 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 24] total 45 [2018-02-04 14:15:28,302 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-02-04 14:15:28,302 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-02-04 14:15:28,303 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=109, Invalid=1961, Unknown=0, NotChecked=0, Total=2070 [2018-02-04 14:15:28,303 INFO L87 Difference]: Start difference. First operand 457 states and 485 transitions. Second operand 46 states. [2018-02-04 14:16:02,776 WARN L146 SmtUtils]: Spent 139ms on a formula simplification. DAG size of input: 133 DAG size of output 94 [2018-02-04 14:16:03,280 WARN L146 SmtUtils]: Spent 342ms on a formula simplification. DAG size of input: 178 DAG size of output 149 [2018-02-04 14:16:07,853 WARN L146 SmtUtils]: Spent 265ms on a formula simplification. DAG size of input: 182 DAG size of output 148 [2018-02-04 14:16:08,515 WARN L146 SmtUtils]: Spent 255ms on a formula simplification. DAG size of input: 193 DAG size of output 150 [2018-02-04 14:16:08,807 WARN L146 SmtUtils]: Spent 189ms on a formula simplification. DAG size of input: 133 DAG size of output 124 [2018-02-04 14:16:13,150 WARN L146 SmtUtils]: Spent 131ms on a formula simplification. DAG size of input: 122 DAG size of output 84 [2018-02-04 14:16:17,790 WARN L146 SmtUtils]: Spent 203ms on a formula simplification. DAG size of input: 135 DAG size of output 126 [2018-02-04 14:16:29,671 WARN L146 SmtUtils]: Spent 225ms on a formula simplification. DAG size of input: 140 DAG size of output 126 [2018-02-04 14:16:34,141 WARN L146 SmtUtils]: Spent 200ms on a formula simplification. DAG size of input: 137 DAG size of output 126 [2018-02-04 14:16:34,412 WARN L146 SmtUtils]: Spent 190ms on a formula simplification. DAG size of input: 133 DAG size of output 124 [2018-02-04 14:16:35,289 WARN L146 SmtUtils]: Spent 619ms on a formula simplification. DAG size of input: 240 DAG size of output 230 [2018-02-04 14:16:35,720 WARN L146 SmtUtils]: Spent 292ms on a formula simplification. DAG size of input: 205 DAG size of output 196 [2018-02-04 14:16:36,256 WARN L146 SmtUtils]: Spent 343ms on a formula simplification. DAG size of input: 261 DAG size of output 203 [2018-02-04 14:16:36,877 WARN L146 SmtUtils]: Spent 219ms on a formula simplification. DAG size of input: 274 DAG size of output 101 [2018-02-04 14:16:40,292 WARN L146 SmtUtils]: Spent 191ms on a formula simplification. DAG size of input: 278 DAG size of output 104 [2018-02-04 14:16:41,402 WARN L146 SmtUtils]: Spent 658ms on a formula simplification. DAG size of input: 298 DAG size of output 227 [2018-02-04 14:17:16,719 WARN L143 SmtUtils]: Spent 133ms on a formula simplification that was a NOOP. DAG size: 113 [2018-02-04 14:17:38,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:17:38,271 INFO L93 Difference]: Finished difference Result 617 states and 651 transitions. [2018-02-04 14:17:38,271 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-02-04 14:17:38,271 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 85 [2018-02-04 14:17:38,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:17:38,273 INFO L225 Difference]: With dead ends: 617 [2018-02-04 14:17:38,273 INFO L226 Difference]: Without dead ends: 617 [2018-02-04 14:17:38,274 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 66 SyntacticMatches, 7 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1696 ImplicationChecksByTransitivity, 11.6s TimeCoverageRelationStatistics Valid=734, Invalid=7455, Unknown=1, NotChecked=0, Total=8190 [2018-02-04 14:17:38,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 617 states. [2018-02-04 14:17:38,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 617 to 573. [2018-02-04 14:17:38,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 573 states. [2018-02-04 14:17:38,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 573 states to 573 states and 616 transitions. [2018-02-04 14:17:38,279 INFO L78 Accepts]: Start accepts. Automaton has 573 states and 616 transitions. Word has length 85 [2018-02-04 14:17:38,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:17:38,279 INFO L432 AbstractCegarLoop]: Abstraction has 573 states and 616 transitions. [2018-02-04 14:17:38,279 INFO L433 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-02-04 14:17:38,279 INFO L276 IsEmpty]: Start isEmpty. Operand 573 states and 616 transitions. [2018-02-04 14:17:38,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-02-04 14:17:38,279 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:17:38,279 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:17:38,279 INFO L371 AbstractCegarLoop]: === Iteration 32 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:17:38,279 INFO L82 PathProgramCache]: Analyzing trace with hash -1038018136, now seen corresponding path program 1 times [2018-02-04 14:17:38,280 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:17:38,280 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:17:38,280 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:17:38,280 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:17:38,280 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:17:38,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:17:38,298 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:17:39,398 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 15 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:17:39,398 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:17:39,398 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:17:39,403 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:17:39,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:17:39,430 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:17:39,512 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:17:39,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:17:39,513 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,514 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,521 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:17:39,522 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:17:39,522 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,531 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,536 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,536 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:38, output treesize:30 [2018-02-04 14:17:39,588 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:17:39,588 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:17:39,589 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 14:17:39,589 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,596 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,597 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:41, output treesize:39 [2018-02-04 14:17:39,657 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-02-04 14:17:39,658 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 14:17:39,659 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,661 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,673 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-02-04 14:17:39,674 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 14:17:39,674 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,677 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,684 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,684 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:61, output treesize:53 [2018-02-04 14:17:39,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 35 [2018-02-04 14:17:39,722 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:17:39,723 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 14 [2018-02-04 14:17:39,723 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,727 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,741 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 35 [2018-02-04 14:17:39,743 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:17:39,743 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 14 [2018-02-04 14:17:39,744 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,747 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,755 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,756 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:91, output treesize:53 [2018-02-04 14:17:39,757 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:17:39,758 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:17:39,758 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:17:39,759 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-02-04 14:17:39,759 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,767 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,768 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:61, output treesize:54 [2018-02-04 14:17:39,842 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 37 [2018-02-04 14:17:39,844 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 14:17:39,844 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,877 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,896 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 41 [2018-02-04 14:17:39,898 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 14:17:39,898 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,903 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,914 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,914 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:79, output treesize:81 [2018-02-04 14:17:39,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 65 [2018-02-04 14:17:39,962 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:17:39,963 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 62 [2018-02-04 14:17:39,963 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,972 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:39,992 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 72 [2018-02-04 14:17:39,994 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:17:39,995 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 46 [2018-02-04 14:17:39,995 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:40,010 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:40,023 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:40,024 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:107, output treesize:129 [2018-02-04 14:17:40,346 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 135 treesize of output 111 [2018-02-04 14:17:40,348 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 14:17:40,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-02-04 14:17:40,349 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:40,359 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 54 [2018-02-04 14:17:40,360 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 14:17:40,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 1 [2018-02-04 14:17:40,379 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:40,385 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 14:17:40,400 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 59 [2018-02-04 14:17:40,402 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 14:17:40,402 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-02-04 14:17:40,402 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:40,410 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:17:40,411 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 18 [2018-02-04 14:17:40,412 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:17:40,421 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-02-04 14:17:40,421 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:40,423 INFO L267 ElimStorePlain]: Start of recursive call 6: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:40,430 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:40,430 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 4 variables, input treesize:168, output treesize:13 [2018-02-04 14:17:40,487 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 14 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:17:40,504 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 14:17:40,504 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 21] total 43 [2018-02-04 14:17:40,504 INFO L409 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-02-04 14:17:40,505 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-02-04 14:17:40,505 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=1687, Unknown=14, NotChecked=0, Total=1806 [2018-02-04 14:17:40,505 INFO L87 Difference]: Start difference. First operand 573 states and 616 transitions. Second operand 43 states. [2018-02-04 14:17:42,107 WARN L146 SmtUtils]: Spent 142ms on a formula simplification. DAG size of input: 141 DAG size of output 111 [2018-02-04 14:17:42,299 WARN L146 SmtUtils]: Spent 137ms on a formula simplification. DAG size of input: 146 DAG size of output 119 [2018-02-04 14:17:42,534 WARN L146 SmtUtils]: Spent 147ms on a formula simplification. DAG size of input: 148 DAG size of output 122 [2018-02-04 14:17:42,826 WARN L146 SmtUtils]: Spent 146ms on a formula simplification. DAG size of input: 159 DAG size of output 120 [2018-02-04 14:17:44,256 WARN L146 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 104 DAG size of output 99 [2018-02-04 14:17:45,762 WARN L146 SmtUtils]: Spent 127ms on a formula simplification. DAG size of input: 137 DAG size of output 109 [2018-02-04 14:17:46,126 WARN L146 SmtUtils]: Spent 126ms on a formula simplification. DAG size of input: 146 DAG size of output 109 [2018-02-04 14:17:46,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:17:46,611 INFO L93 Difference]: Finished difference Result 587 states and 618 transitions. [2018-02-04 14:17:46,611 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-02-04 14:17:46,611 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 85 [2018-02-04 14:17:46,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:17:46,612 INFO L225 Difference]: With dead ends: 587 [2018-02-04 14:17:46,612 INFO L226 Difference]: Without dead ends: 587 [2018-02-04 14:17:46,614 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 69 SyntacticMatches, 8 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1582 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=737, Invalid=6221, Unknown=14, NotChecked=0, Total=6972 [2018-02-04 14:17:46,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 587 states. [2018-02-04 14:17:46,617 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 587 to 521. [2018-02-04 14:17:46,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 521 states. [2018-02-04 14:17:46,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 521 states to 521 states and 548 transitions. [2018-02-04 14:17:46,619 INFO L78 Accepts]: Start accepts. Automaton has 521 states and 548 transitions. Word has length 85 [2018-02-04 14:17:46,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:17:46,619 INFO L432 AbstractCegarLoop]: Abstraction has 521 states and 548 transitions. [2018-02-04 14:17:46,619 INFO L433 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-02-04 14:17:46,619 INFO L276 IsEmpty]: Start isEmpty. Operand 521 states and 548 transitions. [2018-02-04 14:17:46,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-02-04 14:17:46,620 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:17:46,620 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:17:46,620 INFO L371 AbstractCegarLoop]: === Iteration 33 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:17:46,620 INFO L82 PathProgramCache]: Analyzing trace with hash -296838353, now seen corresponding path program 1 times [2018-02-04 14:17:46,620 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:17:46,621 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:17:46,621 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:17:46,621 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:17:46,621 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:17:46,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:17:46,626 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:17:46,702 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:17:46,703 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:17:46,703 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 14:17:46,703 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-02-04 14:17:46,703 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-02-04 14:17:46,703 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-02-04 14:17:46,704 INFO L87 Difference]: Start difference. First operand 521 states and 548 transitions. Second operand 9 states. [2018-02-04 14:17:46,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:17:46,880 INFO L93 Difference]: Finished difference Result 542 states and 568 transitions. [2018-02-04 14:17:46,880 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 14:17:46,880 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 87 [2018-02-04 14:17:46,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:17:46,882 INFO L225 Difference]: With dead ends: 542 [2018-02-04 14:17:46,882 INFO L226 Difference]: Without dead ends: 542 [2018-02-04 14:17:46,883 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=53, Invalid=129, Unknown=0, NotChecked=0, Total=182 [2018-02-04 14:17:46,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 542 states. [2018-02-04 14:17:46,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 542 to 523. [2018-02-04 14:17:46,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 523 states. [2018-02-04 14:17:46,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 523 states to 523 states and 549 transitions. [2018-02-04 14:17:46,888 INFO L78 Accepts]: Start accepts. Automaton has 523 states and 549 transitions. Word has length 87 [2018-02-04 14:17:46,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:17:46,889 INFO L432 AbstractCegarLoop]: Abstraction has 523 states and 549 transitions. [2018-02-04 14:17:46,889 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-02-04 14:17:46,889 INFO L276 IsEmpty]: Start isEmpty. Operand 523 states and 549 transitions. [2018-02-04 14:17:46,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-02-04 14:17:46,889 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:17:46,890 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:17:46,890 INFO L371 AbstractCegarLoop]: === Iteration 34 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:17:46,890 INFO L82 PathProgramCache]: Analyzing trace with hash 802425175, now seen corresponding path program 1 times [2018-02-04 14:17:46,890 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:17:46,890 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:17:46,891 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:17:46,891 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:17:46,891 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:17:46,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:17:46,899 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:17:47,157 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:17:47,157 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:17:47,157 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:17:47,164 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:17:47,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:17:47,186 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:17:47,189 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:17:47,190 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:17:47,190 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:47,192 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:47,195 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:17:47,196 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:17:47,196 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:47,197 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:47,199 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:47,199 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:27, output treesize:1 [2018-02-04 14:17:47,351 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 53 treesize of output 50 [2018-02-04 14:17:47,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 37 [2018-02-04 14:17:47,352 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:17:47,362 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2018-02-04 14:17:47,363 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:47,376 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 37 treesize of output 41 [2018-02-04 14:17:47,377 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-02-04 14:17:47,390 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-02-04 14:17:47,410 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 29 [2018-02-04 14:17:47,411 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 16 [2018-02-04 14:17:47,411 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:47,424 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 21 treesize of output 15 [2018-02-04 14:17:47,424 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 2 xjuncts. [2018-02-04 14:17:47,431 INFO L267 ElimStorePlain]: Start of recursive call 6: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:47,435 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 37 treesize of output 35 [2018-02-04 14:17:47,437 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 22 [2018-02-04 14:17:47,437 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:47,447 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 15 [2018-02-04 14:17:47,447 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:47,456 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:17:47,456 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 15 [2018-02-04 14:17:47,457 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:47,462 INFO L267 ElimStorePlain]: Start of recursive call 9: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:47,463 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 25 [2018-02-04 14:17:47,464 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-02-04 14:17:47,465 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:47,468 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-02-04 14:17:47,469 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:47,471 INFO L267 ElimStorePlain]: Start of recursive call 13: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:47,478 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:47,478 INFO L202 ElimStorePlain]: Needed 15 recursive calls to eliminate 4 variables, input treesize:69, output treesize:10 [2018-02-04 14:17:47,531 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 14:17:47,548 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 14:17:47,548 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 15] total 25 [2018-02-04 14:17:47,548 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-02-04 14:17:47,548 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-02-04 14:17:47,548 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=539, Unknown=2, NotChecked=0, Total=600 [2018-02-04 14:17:47,549 INFO L87 Difference]: Start difference. First operand 523 states and 549 transitions. Second operand 25 states. [2018-02-04 14:17:48,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:17:48,521 INFO L93 Difference]: Finished difference Result 541 states and 566 transitions. [2018-02-04 14:17:48,521 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 14:17:48,521 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 92 [2018-02-04 14:17:48,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:17:48,523 INFO L225 Difference]: With dead ends: 541 [2018-02-04 14:17:48,523 INFO L226 Difference]: Without dead ends: 541 [2018-02-04 14:17:48,523 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 84 SyntacticMatches, 6 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 208 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=253, Invalid=1467, Unknown=2, NotChecked=0, Total=1722 [2018-02-04 14:17:48,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 541 states. [2018-02-04 14:17:48,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 541 to 526. [2018-02-04 14:17:48,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 526 states. [2018-02-04 14:17:48,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 526 states to 526 states and 552 transitions. [2018-02-04 14:17:48,529 INFO L78 Accepts]: Start accepts. Automaton has 526 states and 552 transitions. Word has length 92 [2018-02-04 14:17:48,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:17:48,529 INFO L432 AbstractCegarLoop]: Abstraction has 526 states and 552 transitions. [2018-02-04 14:17:48,529 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-02-04 14:17:48,529 INFO L276 IsEmpty]: Start isEmpty. Operand 526 states and 552 transitions. [2018-02-04 14:17:48,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-02-04 14:17:48,529 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:17:48,529 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:17:48,529 INFO L371 AbstractCegarLoop]: === Iteration 35 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:17:48,529 INFO L82 PathProgramCache]: Analyzing trace with hash -894624581, now seen corresponding path program 1 times [2018-02-04 14:17:48,530 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:17:48,530 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:17:48,530 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:17:48,530 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:17:48,530 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:17:48,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:17:48,540 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:17:48,860 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:17:48,861 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:17:48,861 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:17:48,865 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:17:48,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:17:48,886 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:17:48,956 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-02-04 14:17:48,957 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 14:17:48,958 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:48,958 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:48,964 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:48,964 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:40, output treesize:41 [2018-02-04 14:17:48,988 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 39 [2018-02-04 14:17:48,990 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:17:48,991 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 50 [2018-02-04 14:17:48,991 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:48,996 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:49,002 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:17:49,002 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:54, output treesize:41 [2018-02-04 14:17:49,096 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:17:49,097 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 39 [2018-02-04 14:17:49,098 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:17:49,099 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 33 [2018-02-04 14:17:49,099 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:49,105 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:49,124 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:17:49,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 35 [2018-02-04 14:17:49,126 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:17:49,126 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 33 [2018-02-04 14:17:49,126 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:49,131 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:49,142 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-02-04 14:17:49,142 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:87, output treesize:63 [2018-02-04 14:17:49,355 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:17:49,355 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 45 [2018-02-04 14:17:49,357 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2018-02-04 14:17:49,357 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:49,363 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:49,388 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:17:49,389 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 41 [2018-02-04 14:17:49,391 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2018-02-04 14:17:49,391 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:49,396 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:49,408 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-02-04 14:17:49,408 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:87, output treesize:63 [2018-02-04 14:17:49,486 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2018-02-04 14:17:49,491 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 31 [2018-02-04 14:17:49,491 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-02-04 14:17:49,504 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-02-04 14:17:49,538 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2018-02-04 14:17:49,540 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 14:17:49,541 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-02-04 14:17:49,541 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:17:49,549 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 14:17:49,581 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-02-04 14:17:49,581 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:111, output treesize:105 [2018-02-04 14:17:49,826 WARN L1033 $PredicateComparison]: unable to prove that (exists ((main_~node~2.base Int) (v_prenex_73 Int)) (let ((.cse0 (store |c_old(#valid)| main_~node~2.base 1))) (and (not (= v_prenex_73 0)) (not (= 0 main_~node~2.base)) (= (store (store .cse0 v_prenex_73 0) main_~node~2.base 0) |c_#valid|) (= 0 (select .cse0 v_prenex_73)) (= 0 (select |c_old(#valid)| main_~node~2.base))))) is different from true [2018-02-04 14:17:49,852 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-02-04 14:17:49,869 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 14:17:49,869 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 18] total 30 [2018-02-04 14:17:49,869 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-02-04 14:17:49,869 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-02-04 14:17:49,870 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=786, Unknown=6, NotChecked=56, Total=930 [2018-02-04 14:17:49,870 INFO L87 Difference]: Start difference. First operand 526 states and 552 transitions. Second operand 31 states. [2018-02-04 14:17:51,128 WARN L146 SmtUtils]: Spent 138ms on a formula simplification. DAG size of input: 113 DAG size of output 61 [2018-02-04 14:17:51,292 WARN L146 SmtUtils]: Spent 126ms on a formula simplification. DAG size of input: 111 DAG size of output 62 [2018-02-04 14:17:52,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:17:52,954 INFO L93 Difference]: Finished difference Result 543 states and 569 transitions. [2018-02-04 14:17:52,955 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 14:17:52,955 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 93 [2018-02-04 14:17:52,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:17:52,956 INFO L225 Difference]: With dead ends: 543 [2018-02-04 14:17:52,956 INFO L226 Difference]: Without dead ends: 475 [2018-02-04 14:17:52,956 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 73 SyntacticMatches, 9 SemanticMatches, 44 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 329 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=236, Invalid=1738, Unknown=10, NotChecked=86, Total=2070 [2018-02-04 14:17:52,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 475 states. [2018-02-04 14:17:52,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 475 to 467. [2018-02-04 14:17:52,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 467 states. [2018-02-04 14:17:52,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 467 states to 467 states and 494 transitions. [2018-02-04 14:17:52,960 INFO L78 Accepts]: Start accepts. Automaton has 467 states and 494 transitions. Word has length 93 [2018-02-04 14:17:52,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:17:52,960 INFO L432 AbstractCegarLoop]: Abstraction has 467 states and 494 transitions. [2018-02-04 14:17:52,960 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-02-04 14:17:52,960 INFO L276 IsEmpty]: Start isEmpty. Operand 467 states and 494 transitions. [2018-02-04 14:17:52,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-02-04 14:17:52,960 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:17:52,960 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:17:52,961 INFO L371 AbstractCegarLoop]: === Iteration 36 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:17:52,961 INFO L82 PathProgramCache]: Analyzing trace with hash 1650413227, now seen corresponding path program 1 times [2018-02-04 14:17:52,961 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:17:52,961 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:17:52,961 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:17:52,961 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:17:52,961 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:17:52,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:17:52,975 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:17:53,191 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 8 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-02-04 14:17:53,191 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:17:53,191 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:17:53,196 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:17:53,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:17:53,227 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:17:53,250 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:17:53,251 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:17:53,252 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:53,252 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:53,255 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:53,255 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:3 [2018-02-04 14:17:53,355 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-02-04 14:17:53,356 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5 [2018-02-04 14:17:53,356 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:53,357 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:53,359 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:53,359 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:9 [2018-02-04 14:17:53,368 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 11 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-02-04 14:17:53,386 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 14:17:53,386 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 16] total 25 [2018-02-04 14:17:53,386 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-02-04 14:17:53,386 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-02-04 14:17:53,387 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=586, Unknown=0, NotChecked=0, Total=650 [2018-02-04 14:17:53,387 INFO L87 Difference]: Start difference. First operand 467 states and 494 transitions. Second operand 26 states. [2018-02-04 14:17:54,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:17:54,217 INFO L93 Difference]: Finished difference Result 479 states and 507 transitions. [2018-02-04 14:17:54,217 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-02-04 14:17:54,217 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 101 [2018-02-04 14:17:54,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:17:54,218 INFO L225 Difference]: With dead ends: 479 [2018-02-04 14:17:54,218 INFO L226 Difference]: Without dead ends: 479 [2018-02-04 14:17:54,218 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 94 SyntacticMatches, 5 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 221 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=151, Invalid=1181, Unknown=0, NotChecked=0, Total=1332 [2018-02-04 14:17:54,219 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 479 states. [2018-02-04 14:17:54,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 479 to 467. [2018-02-04 14:17:54,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 467 states. [2018-02-04 14:17:54,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 467 states to 467 states and 495 transitions. [2018-02-04 14:17:54,222 INFO L78 Accepts]: Start accepts. Automaton has 467 states and 495 transitions. Word has length 101 [2018-02-04 14:17:54,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:17:54,222 INFO L432 AbstractCegarLoop]: Abstraction has 467 states and 495 transitions. [2018-02-04 14:17:54,222 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-02-04 14:17:54,222 INFO L276 IsEmpty]: Start isEmpty. Operand 467 states and 495 transitions. [2018-02-04 14:17:54,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-02-04 14:17:54,222 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:17:54,222 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:17:54,223 INFO L371 AbstractCegarLoop]: === Iteration 37 === [merge_pairErr19RequiresViolation, merge_pairErr24RequiresViolation, merge_pairErr4RequiresViolation, merge_pairErr11RequiresViolation, merge_pairErr16RequiresViolation, merge_pairErr7RequiresViolation, merge_pairErr9RequiresViolation, merge_pairErr2RequiresViolation, merge_pairErr14RequiresViolation, merge_pairErr29RequiresViolation, merge_pairErr17RequiresViolation, merge_pairErr6RequiresViolation, merge_pairErr27RequiresViolation, merge_pairErr26RequiresViolation, merge_pairErr3RequiresViolation, merge_pairErr13RequiresViolation, merge_pairErr23RequiresViolation, merge_pairErr15RequiresViolation, merge_pairErr0RequiresViolation, merge_pairErr10RequiresViolation, merge_pairErr25RequiresViolation, merge_pairErr20RequiresViolation, merge_pairErr22RequiresViolation, merge_pairErr12RequiresViolation, merge_pairErr5RequiresViolation, merge_pairErr18RequiresViolation, merge_pairErr21RequiresViolation, merge_pairErr1RequiresViolation, merge_pairErr28RequiresViolation, merge_pairErr8RequiresViolation, merge_single_nodeErr4RequiresViolation, merge_single_nodeErr0RequiresViolation, merge_single_nodeErr9RequiresViolation, merge_single_nodeErr7RequiresViolation, merge_single_nodeErr11RequiresViolation, merge_single_nodeErr2RequiresViolation, merge_single_nodeErr1RequiresViolation, merge_single_nodeErr13RequiresViolation, merge_single_nodeErr6RequiresViolation, merge_single_nodeErr5RequiresViolation, merge_single_nodeErr10RequiresViolation, merge_single_nodeErr3RequiresViolation, merge_single_nodeErr12RequiresViolation, merge_single_nodeErr8RequiresViolation, seq_sort_coreErr13RequiresViolation, seq_sort_coreErr7RequiresViolation, seq_sort_coreErr6RequiresViolation, seq_sort_coreErr10RequiresViolation, seq_sort_coreErr1RequiresViolation, seq_sort_coreErr3RequiresViolation, seq_sort_coreErr8RequiresViolation, seq_sort_coreErr12RequiresViolation, seq_sort_coreErr11RequiresViolation, seq_sort_coreErr0RequiresViolation, seq_sort_coreErr4RequiresViolation, seq_sort_coreErr5RequiresViolation, seq_sort_coreErr2RequiresViolation, seq_sort_coreErr9RequiresViolation, inspect_beforeErr15RequiresViolation, inspect_beforeErr7RequiresViolation, inspect_beforeErr11RequiresViolation, inspect_beforeErr3RequiresViolation, inspect_beforeErr2RequiresViolation, inspect_beforeErr10RequiresViolation, inspect_beforeErr16RequiresViolation, inspect_beforeErr1RequiresViolation, inspect_beforeErr6RequiresViolation, inspect_beforeErr18RequiresViolation, inspect_beforeErr13RequiresViolation, inspect_beforeErr0RequiresViolation, inspect_beforeErr9RequiresViolation, inspect_beforeErr4RequiresViolation, inspect_beforeErr17RequiresViolation, inspect_beforeErr8RequiresViolation, inspect_beforeErr12RequiresViolation, inspect_beforeErr14RequiresViolation, inspect_beforeErr5RequiresViolation, inspect_beforeErr19RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, inspect_afterErr8RequiresViolation, inspect_afterErr10RequiresViolation, inspect_afterErr1RequiresViolation, inspect_afterErr0RequiresViolation, inspect_afterErr6RequiresViolation, inspect_afterErr7RequiresViolation, inspect_afterErr11RequiresViolation, inspect_afterErr5RequiresViolation, inspect_afterErr2RequiresViolation, inspect_afterErr4RequiresViolation, inspect_afterErr3RequiresViolation, inspect_afterErr9RequiresViolation]=== [2018-02-04 14:17:54,223 INFO L82 PathProgramCache]: Analyzing trace with hash 1650413228, now seen corresponding path program 1 times [2018-02-04 14:17:54,223 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 14:17:54,223 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 14:17:54,223 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:17:54,224 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:17:54,224 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 14:17:54,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:17:54,234 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:17:54,945 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 7 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:17:54,945 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 14:17:54,945 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 14:17:54,952 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 14:17:54,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:17:54,997 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 14:17:55,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:17:55,126 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:17:55,154 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:55,156 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:55,164 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 14:17:55,167 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 14:17:55,167 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:55,168 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:55,174 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:55,174 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:39, output treesize:25 [2018-02-04 14:17:55,484 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-02-04 14:17:55,485 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5 [2018-02-04 14:17:55,485 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:55,486 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:55,493 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 22 [2018-02-04 14:17:55,494 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 7 [2018-02-04 14:17:55,494 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 14:17:55,496 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:55,501 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 14:17:55,501 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:54, output treesize:18 [2018-02-04 14:17:55,592 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 22 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:17:55,622 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 14:17:55,623 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 43 [2018-02-04 14:17:55,623 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-02-04 14:17:55,623 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-02-04 14:17:55,624 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=154, Invalid=1738, Unknown=0, NotChecked=0, Total=1892 [2018-02-04 14:17:55,624 INFO L87 Difference]: Start difference. First operand 467 states and 495 transitions. Second operand 44 states. Received shutdown request... [2018-02-04 14:17:56,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-02-04 14:17:56,775 WARN L491 AbstractCegarLoop]: Verification canceled [2018-02-04 14:17:56,780 WARN L185 ceAbstractionStarter]: Timeout [2018-02-04 14:17:56,780 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.02 02:17:56 BoogieIcfgContainer [2018-02-04 14:17:56,780 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-02-04 14:17:56,781 INFO L168 Benchmark]: Toolchain (without parser) took 196041.86 ms. Allocated memory was 396.4 MB in the beginning and 809.5 MB in the end (delta: 413.1 MB). Free memory was 350.4 MB in the beginning and 563.7 MB in the end (delta: -213.3 MB). Peak memory consumption was 199.8 MB. Max. memory is 5.3 GB. [2018-02-04 14:17:56,782 INFO L168 Benchmark]: CDTParser took 0.11 ms. Allocated memory is still 396.4 MB. Free memory is still 357.0 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-04 14:17:56,782 INFO L168 Benchmark]: CACSL2BoogieTranslator took 185.33 ms. Allocated memory is still 396.4 MB. Free memory was 350.4 MB in the beginning and 338.5 MB in the end (delta: 11.9 MB). Peak memory consumption was 11.9 MB. Max. memory is 5.3 GB. [2018-02-04 14:17:56,783 INFO L168 Benchmark]: Boogie Preprocessor took 29.79 ms. Allocated memory is still 396.4 MB. Free memory was 338.5 MB in the beginning and 335.9 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. [2018-02-04 14:17:56,783 INFO L168 Benchmark]: RCFGBuilder took 631.70 ms. Allocated memory is still 396.4 MB. Free memory was 335.9 MB in the beginning and 263.6 MB in the end (delta: 72.3 MB). Peak memory consumption was 72.3 MB. Max. memory is 5.3 GB. [2018-02-04 14:17:56,783 INFO L168 Benchmark]: TraceAbstraction took 195191.75 ms. Allocated memory was 396.4 MB in the beginning and 809.5 MB in the end (delta: 413.1 MB). Free memory was 263.6 MB in the beginning and 563.7 MB in the end (delta: -300.1 MB). Peak memory consumption was 113.0 MB. Max. memory is 5.3 GB. [2018-02-04 14:17:56,784 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11 ms. Allocated memory is still 396.4 MB. Free memory is still 357.0 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 185.33 ms. Allocated memory is still 396.4 MB. Free memory was 350.4 MB in the beginning and 338.5 MB in the end (delta: 11.9 MB). Peak memory consumption was 11.9 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 29.79 ms. Allocated memory is still 396.4 MB. Free memory was 338.5 MB in the beginning and 335.9 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. * RCFGBuilder took 631.70 ms. Allocated memory is still 396.4 MB. Free memory was 335.9 MB in the beginning and 263.6 MB in the end (delta: 72.3 MB). Peak memory consumption was 72.3 MB. Max. memory is 5.3 GB. * TraceAbstraction took 195191.75 ms. Allocated memory was 396.4 MB in the beginning and 809.5 MB in the end (delta: 413.1 MB). Free memory was 263.6 MB in the beginning and 563.7 MB in the end (delta: -300.1 MB). Peak memory consumption was 113.0 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 573). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 573). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 573). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 573). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 573). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 573). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 573). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 573). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 573). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 573). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 573). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 573). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 573). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 573). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 568). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 567). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 570). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 569). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 570). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 568). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 567). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 571). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 569). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 568). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 570). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 568). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 571). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 570). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 598). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 594). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 594). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 597). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 588). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 590). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 595). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 598). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 597). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 588). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 594). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 594). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 590). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 595). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 613). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 609). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 605). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 607). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 607). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 605). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 614). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 605). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 609). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 614). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 612). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 605). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 609). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 608). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 614). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 609). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 612). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 613). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 608). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 614). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 637). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 648). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 632). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 651). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 644). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 625]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 625). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 632). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 633). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 638). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 647). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 644). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 647). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 650). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 651). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 633). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 637). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 648). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 638). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 650). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 622). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 623). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 619). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 619). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 622). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 622). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 623). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 622). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 620). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 622). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 620). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 622). Cancelled while BasicCegarLoop was constructing difference of abstraction (467states) and interpolant automaton (currently 27 states, 44 states before enhancement), while ReachableStatesComputation was computing reachable states (193 states constructedinput type IntersectNwa). - StatisticsResult: Ultimate Automizer benchmark data CFG has 9 procedures, 315 locations, 109 error locations. TIMEOUT Result, 195.1s OverallTime, 37 OverallIterations, 3 TraceHistogramMax, 171.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 10127 SDtfs, 10648 SDslu, 71818 SDs, 0 SdLazy, 44410 SolverSat, 2373 SolverUnsat, 69 SolverUnknown, 0 SolverNotchecked, 142.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1943 GetRequests, 960 SyntacticMatches, 99 SemanticMatches, 884 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 8820 ImplicationChecksByTransitivity, 36.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=573occurred in iteration=31, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 36 MinimizatonAttempts, 927 StatesRemovedByMinimization, 34 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 22.0s InterpolantComputationTime, 3245 NumberOfCodeBlocks, 3213 NumberOfCodeBlocksAsserted, 51 NumberOfCheckSat, 3195 ConstructedInterpolants, 336 QuantifiedInterpolants, 6764272 SizeOfPredicates, 231 NumberOfNonLiveVariables, 3672 ConjunctsInSsa, 644 ConjunctsInUnsatCore, 50 InterpolantComputations, 25 PerfectInterpolantSequences, 290/587 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/merge_sort_true-unreach-call_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-04_14-17-56-792.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/merge_sort_true-unreach-call_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-04_14-17-56-792.csv Completed graceful shutdown