java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_Array.epf -i ../../../trunk/examples/svcomp/array-memsafety/cstrncat-alloca_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-c17473d-m [2018-02-04 14:58:45,260 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-04 14:58:45,261 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-04 14:58:45,271 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-04 14:58:45,271 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-04 14:58:45,272 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-04 14:58:45,273 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-04 14:58:45,275 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-04 14:58:45,277 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-04 14:58:45,277 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-04 14:58:45,278 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-04 14:58:45,278 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-04 14:58:45,279 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-04 14:58:45,279 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-04 14:58:45,280 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-04 14:58:45,282 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-04 14:58:45,284 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-04 14:58:45,285 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-04 14:58:45,286 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-04 14:58:45,287 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-04 14:58:45,289 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-02-04 14:58:45,292 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-04 14:58:45,293 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-04 14:58:45,293 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_Array.epf [2018-02-04 14:58:45,302 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-04 14:58:45,303 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-04 14:58:45,304 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-04 14:58:45,304 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-04 14:58:45,304 INFO L133 SettingsManager]: * Use SBE=true [2018-02-04 14:58:45,304 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-04 14:58:45,304 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-04 14:58:45,305 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-04 14:58:45,305 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-04 14:58:45,305 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-04 14:58:45,305 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-04 14:58:45,305 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-04 14:58:45,305 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-04 14:58:45,306 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-04 14:58:45,306 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-04 14:58:45,306 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-04 14:58:45,306 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-04 14:58:45,306 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-04 14:58:45,306 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-04 14:58:45,306 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 14:58:45,307 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-04 14:58:45,307 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=Craig_TreeInterpolation [2018-02-04 14:58:45,338 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-04 14:58:45,348 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-04 14:58:45,351 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-04 14:58:45,352 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-04 14:58:45,353 INFO L276 PluginConnector]: CDTParser initialized [2018-02-04 14:58:45,353 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-memsafety/cstrncat-alloca_true-valid-memsafety_true-termination.i [2018-02-04 14:58:45,482 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-04 14:58:45,484 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-04 14:58:45,484 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-04 14:58:45,485 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-04 14:58:45,490 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-04 14:58:45,491 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 02:58:45" (1/1) ... [2018-02-04 14:58:45,494 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4d3ffa22 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:58:45, skipping insertion in model container [2018-02-04 14:58:45,494 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 02:58:45" (1/1) ... [2018-02-04 14:58:45,509 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 14:58:45,538 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 14:58:45,626 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 14:58:45,638 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 14:58:45,642 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:58:45 WrapperNode [2018-02-04 14:58:45,642 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-04 14:58:45,643 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-04 14:58:45,643 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-04 14:58:45,643 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-04 14:58:45,651 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:58:45" (1/1) ... [2018-02-04 14:58:45,651 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:58:45" (1/1) ... [2018-02-04 14:58:45,661 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:58:45" (1/1) ... [2018-02-04 14:58:45,661 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:58:45" (1/1) ... [2018-02-04 14:58:45,664 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:58:45" (1/1) ... [2018-02-04 14:58:45,666 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:58:45" (1/1) ... [2018-02-04 14:58:45,667 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:58:45" (1/1) ... [2018-02-04 14:58:45,668 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-04 14:58:45,668 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-04 14:58:45,668 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-04 14:58:45,668 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-04 14:58:45,669 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:58:45" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 14:58:45,703 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-04 14:58:45,703 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-04 14:58:45,704 INFO L136 BoogieDeclarations]: Found implementation of procedure cstrncat [2018-02-04 14:58:45,704 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-04 14:58:45,704 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-02-04 14:58:45,704 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-02-04 14:58:45,704 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-02-04 14:58:45,704 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-02-04 14:58:45,704 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-02-04 14:58:45,704 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-02-04 14:58:45,705 INFO L128 BoogieDeclarations]: Found specification of procedure cstrncat [2018-02-04 14:58:45,705 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-04 14:58:45,705 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-04 14:58:45,705 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-04 14:58:45,878 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-04 14:58:45,878 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 02:58:45 BoogieIcfgContainer [2018-02-04 14:58:45,878 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-04 14:58:45,879 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-04 14:58:45,879 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-04 14:58:45,880 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-04 14:58:45,880 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 04.02 02:58:45" (1/3) ... [2018-02-04 14:58:45,881 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@258be78a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 02:58:45, skipping insertion in model container [2018-02-04 14:58:45,881 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 02:58:45" (2/3) ... [2018-02-04 14:58:45,881 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@258be78a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 02:58:45, skipping insertion in model container [2018-02-04 14:58:45,881 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 02:58:45" (3/3) ... [2018-02-04 14:58:45,882 INFO L107 eAbstractionObserver]: Analyzing ICFG cstrncat-alloca_true-valid-memsafety_true-termination.i [2018-02-04 14:58:45,887 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:Craig_TreeInterpolation Determinization: PREDICATE_ABSTRACTION [2018-02-04 14:58:45,892 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 15 error locations. [2018-02-04 14:58:45,922 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-04 14:58:45,923 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-04 14:58:45,923 INFO L324 AbstractCegarLoop]: Compute interpolants for Craig_TreeInterpolation [2018-02-04 14:58:45,923 INFO L325 AbstractCegarLoop]: Backedges is CANONICAL [2018-02-04 14:58:45,923 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-04 14:58:45,923 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-04 14:58:45,923 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-04 14:58:45,923 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-04 14:58:45,924 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-04 14:58:45,935 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states. [2018-02-04 14:58:45,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-02-04 14:58:45,943 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:45,944 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:45,944 INFO L371 AbstractCegarLoop]: === Iteration 1 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:45,947 INFO L82 PathProgramCache]: Analyzing trace with hash 1927484354, now seen corresponding path program 1 times [2018-02-04 14:58:45,986 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:46,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:46,028 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:46,089 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,091 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:58:46,092 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-04 14:58:46,093 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:46,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,094 INFO L182 omatonBuilderFactory]: Interpolants [61#true, 62#false, 63#(= |#valid| |old(#valid)|)] [2018-02-04 14:58:46,094 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,095 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-04 14:58:46,106 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-04 14:58:46,107 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 14:58:46,108 INFO L87 Difference]: Start difference. First operand 58 states. Second operand 3 states. [2018-02-04 14:58:46,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:46,185 INFO L93 Difference]: Finished difference Result 59 states and 66 transitions. [2018-02-04 14:58:46,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-04 14:58:46,240 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-02-04 14:58:46,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:46,248 INFO L225 Difference]: With dead ends: 59 [2018-02-04 14:58:46,250 INFO L226 Difference]: Without dead ends: 55 [2018-02-04 14:58:46,252 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 14:58:46,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-02-04 14:58:46,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-02-04 14:58:46,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-02-04 14:58:46,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 61 transitions. [2018-02-04 14:58:46,278 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 61 transitions. Word has length 11 [2018-02-04 14:58:46,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:46,278 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 61 transitions. [2018-02-04 14:58:46,278 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-04 14:58:46,278 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 61 transitions. [2018-02-04 14:58:46,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-02-04 14:58:46,279 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:46,279 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:46,279 INFO L371 AbstractCegarLoop]: === Iteration 2 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:46,279 INFO L82 PathProgramCache]: Analyzing trace with hash 1621249811, now seen corresponding path program 1 times [2018-02-04 14:58:46,280 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:46,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:46,292 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:46,323 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,323 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:58:46,323 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 14:58:46,323 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:46,324 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,324 INFO L182 omatonBuilderFactory]: Interpolants [178#true, 179#false, 180#(<= main_~length1~0 1), 181#(<= main_~length1~0 main_~length2~0), 182#(<= (+ main_~length1~0 1) (+ main_~n~0 main_~length2~0))] [2018-02-04 14:58:46,324 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,325 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 14:58:46,325 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 14:58:46,325 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 14:58:46,325 INFO L87 Difference]: Start difference. First operand 55 states and 61 transitions. Second operand 5 states. [2018-02-04 14:58:46,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:46,363 INFO L93 Difference]: Finished difference Result 58 states and 65 transitions. [2018-02-04 14:58:46,363 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 14:58:46,363 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 15 [2018-02-04 14:58:46,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:46,364 INFO L225 Difference]: With dead ends: 58 [2018-02-04 14:58:46,364 INFO L226 Difference]: Without dead ends: 55 [2018-02-04 14:58:46,364 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-02-04 14:58:46,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-02-04 14:58:46,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-02-04 14:58:46,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-02-04 14:58:46,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 60 transitions. [2018-02-04 14:58:46,368 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 60 transitions. Word has length 15 [2018-02-04 14:58:46,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:46,368 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 60 transitions. [2018-02-04 14:58:46,368 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 14:58:46,369 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 60 transitions. [2018-02-04 14:58:46,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-02-04 14:58:46,369 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:46,369 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:46,369 INFO L371 AbstractCegarLoop]: === Iteration 3 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:46,369 INFO L82 PathProgramCache]: Analyzing trace with hash -1993659115, now seen corresponding path program 1 times [2018-02-04 14:58:46,370 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:46,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:46,386 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:46,438 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,438 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:58:46,438 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-02-04 14:58:46,438 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:46,439 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,439 INFO L182 omatonBuilderFactory]: Interpolants [300#true, 301#false, 302#(= 1 (select |#valid| |main_#t~malloc13.base|)), 303#(= 1 (select |#valid| main_~nondetString1~0.base))] [2018-02-04 14:58:46,439 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,439 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 14:58:46,439 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 14:58:46,439 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 14:58:46,440 INFO L87 Difference]: Start difference. First operand 55 states and 60 transitions. Second operand 4 states. [2018-02-04 14:58:46,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:46,507 INFO L93 Difference]: Finished difference Result 54 states and 59 transitions. [2018-02-04 14:58:46,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 14:58:46,507 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-02-04 14:58:46,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:46,508 INFO L225 Difference]: With dead ends: 54 [2018-02-04 14:58:46,508 INFO L226 Difference]: Without dead ends: 54 [2018-02-04 14:58:46,508 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 14:58:46,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-02-04 14:58:46,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-02-04 14:58:46,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-02-04 14:58:46,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 59 transitions. [2018-02-04 14:58:46,514 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 59 transitions. Word has length 15 [2018-02-04 14:58:46,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:46,514 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 59 transitions. [2018-02-04 14:58:46,514 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 14:58:46,515 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 59 transitions. [2018-02-04 14:58:46,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-02-04 14:58:46,515 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:46,515 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:46,515 INFO L371 AbstractCegarLoop]: === Iteration 4 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:46,515 INFO L82 PathProgramCache]: Analyzing trace with hash -1993659114, now seen corresponding path program 1 times [2018-02-04 14:58:46,516 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:46,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:46,528 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:46,616 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,616 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:58:46,616 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 14:58:46,617 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:46,617 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,617 INFO L182 omatonBuilderFactory]: Interpolants [416#(<= 1 main_~length2~0), 417#(and (<= 1 main_~length2~0) (<= 1 main_~n~0)), 418#(and (<= 1 main_~n~0) (<= (+ main_~n~0 1) main_~length1~0)), 419#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (<= (+ main_~n~0 1) main_~length1~0) (= 0 |main_#t~malloc13.offset|)), 420#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 1) main_~length1~0)), 421#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 1) main_~length1~0)), 414#true, 415#false] [2018-02-04 14:58:46,617 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,617 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 14:58:46,617 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 14:58:46,617 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-02-04 14:58:46,617 INFO L87 Difference]: Start difference. First operand 54 states and 59 transitions. Second operand 8 states. [2018-02-04 14:58:46,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:46,712 INFO L93 Difference]: Finished difference Result 53 states and 58 transitions. [2018-02-04 14:58:46,712 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 14:58:46,713 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 15 [2018-02-04 14:58:46,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:46,713 INFO L225 Difference]: With dead ends: 53 [2018-02-04 14:58:46,713 INFO L226 Difference]: Without dead ends: 53 [2018-02-04 14:58:46,714 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=84, Unknown=0, NotChecked=0, Total=132 [2018-02-04 14:58:46,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-02-04 14:58:46,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-02-04 14:58:46,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-02-04 14:58:46,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 58 transitions. [2018-02-04 14:58:46,718 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 58 transitions. Word has length 15 [2018-02-04 14:58:46,718 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:46,718 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 58 transitions. [2018-02-04 14:58:46,718 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 14:58:46,718 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 58 transitions. [2018-02-04 14:58:46,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-02-04 14:58:46,719 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:46,719 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:46,719 INFO L371 AbstractCegarLoop]: === Iteration 5 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:46,719 INFO L82 PathProgramCache]: Analyzing trace with hash -1673890416, now seen corresponding path program 1 times [2018-02-04 14:58:46,720 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:46,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:46,733 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:46,764 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,764 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:58:46,764 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-02-04 14:58:46,765 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:46,765 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,765 INFO L182 omatonBuilderFactory]: Interpolants [536#true, 537#false, 538#(= 1 (select |#valid| |main_#t~malloc14.base|)), 539#(= 1 (select |#valid| main_~nondetString2~0.base))] [2018-02-04 14:58:46,765 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,765 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 14:58:46,766 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 14:58:46,766 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 14:58:46,766 INFO L87 Difference]: Start difference. First operand 53 states and 58 transitions. Second operand 4 states. [2018-02-04 14:58:46,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:46,800 INFO L93 Difference]: Finished difference Result 52 states and 57 transitions. [2018-02-04 14:58:46,800 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 14:58:46,801 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-02-04 14:58:46,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:46,801 INFO L225 Difference]: With dead ends: 52 [2018-02-04 14:58:46,801 INFO L226 Difference]: Without dead ends: 52 [2018-02-04 14:58:46,802 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 14:58:46,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-02-04 14:58:46,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-02-04 14:58:46,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-02-04 14:58:46,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 57 transitions. [2018-02-04 14:58:46,805 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 57 transitions. Word has length 16 [2018-02-04 14:58:46,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:46,806 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 57 transitions. [2018-02-04 14:58:46,806 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 14:58:46,806 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 57 transitions. [2018-02-04 14:58:46,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-02-04 14:58:46,806 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:46,806 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:46,806 INFO L371 AbstractCegarLoop]: === Iteration 6 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:46,807 INFO L82 PathProgramCache]: Analyzing trace with hash -1673890415, now seen corresponding path program 1 times [2018-02-04 14:58:46,807 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:46,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:46,819 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:46,873 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,874 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:58:46,874 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-04 14:58:46,874 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:46,874 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,874 INFO L182 omatonBuilderFactory]: Interpolants [646#true, 647#false, 648#(<= 1 main_~length2~0), 649#(and (= 0 |main_#t~malloc14.offset|) (<= 1 main_~length2~0) (= main_~length2~0 (select |#length| |main_#t~malloc14.base|))), 650#(and (= main_~nondetString2~0.offset 0) (<= 1 main_~length2~0) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)))] [2018-02-04 14:58:46,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,875 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 14:58:46,875 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 14:58:46,875 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 14:58:46,875 INFO L87 Difference]: Start difference. First operand 52 states and 57 transitions. Second operand 5 states. [2018-02-04 14:58:46,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:46,901 INFO L93 Difference]: Finished difference Result 51 states and 56 transitions. [2018-02-04 14:58:46,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 14:58:46,901 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-02-04 14:58:46,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:46,902 INFO L225 Difference]: With dead ends: 51 [2018-02-04 14:58:46,902 INFO L226 Difference]: Without dead ends: 51 [2018-02-04 14:58:46,902 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-02-04 14:58:46,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-02-04 14:58:46,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-02-04 14:58:46,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-02-04 14:58:46,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 56 transitions. [2018-02-04 14:58:46,904 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 56 transitions. Word has length 16 [2018-02-04 14:58:46,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:46,904 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 56 transitions. [2018-02-04 14:58:46,904 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 14:58:46,904 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 56 transitions. [2018-02-04 14:58:46,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-02-04 14:58:46,905 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:46,905 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:46,905 INFO L371 AbstractCegarLoop]: === Iteration 7 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:46,905 INFO L82 PathProgramCache]: Analyzing trace with hash 1745382581, now seen corresponding path program 1 times [2018-02-04 14:58:46,906 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:46,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:46,912 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:46,931 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,931 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:58:46,931 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-04 14:58:46,932 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:46,932 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,932 INFO L182 omatonBuilderFactory]: Interpolants [755#true, 756#false, 757#(= 1 (select |#valid| main_~nondetString1~0.base)), 758#(= 1 (select |#valid| |cstrncat_#in~s1.base|)), 759#(= 1 (select |#valid| cstrncat_~s~0.base))] [2018-02-04 14:58:46,932 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:46,932 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 14:58:46,932 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 14:58:46,932 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 14:58:46,933 INFO L87 Difference]: Start difference. First operand 51 states and 56 transitions. Second operand 5 states. [2018-02-04 14:58:46,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:46,975 INFO L93 Difference]: Finished difference Result 47 states and 52 transitions. [2018-02-04 14:58:46,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 14:58:46,975 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2018-02-04 14:58:46,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:46,975 INFO L225 Difference]: With dead ends: 47 [2018-02-04 14:58:46,975 INFO L226 Difference]: Without dead ends: 47 [2018-02-04 14:58:46,976 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-02-04 14:58:46,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-02-04 14:58:46,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-02-04 14:58:46,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-02-04 14:58:46,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 52 transitions. [2018-02-04 14:58:46,978 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 52 transitions. Word has length 20 [2018-02-04 14:58:46,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:46,978 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 52 transitions. [2018-02-04 14:58:46,978 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 14:58:46,978 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 52 transitions. [2018-02-04 14:58:46,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-02-04 14:58:46,978 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:46,978 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:46,978 INFO L371 AbstractCegarLoop]: === Iteration 8 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:46,978 INFO L82 PathProgramCache]: Analyzing trace with hash 1745382582, now seen corresponding path program 1 times [2018-02-04 14:58:46,979 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:46,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:46,987 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:47,074 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:47,074 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:58:47,074 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-02-04 14:58:47,074 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:47,074 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:47,074 INFO L182 omatonBuilderFactory]: Interpolants [864#(and (= cstrncat_~s~0.offset 0) (<= 1 (select |#length| cstrncat_~s~0.base))), 856#true, 857#false, 858#(<= 1 main_~length2~0), 859#(<= (+ main_~n~0 1) main_~length1~0), 860#(and (<= (+ main_~n~0 1) main_~length1~0) (= 0 |main_#t~malloc13.offset|)), 861#(and (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 1) main_~length1~0)), 862#(and (<= (+ main_~nondetString1~0.offset 1) (select |#length| main_~nondetString1~0.base)) (= main_~nondetString1~0.offset 0)), 863#(and (= 0 |cstrncat_#in~s1.offset|) (<= 1 (select |#length| |cstrncat_#in~s1.base|)))] [2018-02-04 14:58:47,074 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:47,075 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-02-04 14:58:47,075 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-02-04 14:58:47,075 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-02-04 14:58:47,075 INFO L87 Difference]: Start difference. First operand 47 states and 52 transitions. Second operand 9 states. [2018-02-04 14:58:47,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:47,207 INFO L93 Difference]: Finished difference Result 65 states and 74 transitions. [2018-02-04 14:58:47,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 14:58:47,207 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 20 [2018-02-04 14:58:47,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:47,209 INFO L225 Difference]: With dead ends: 65 [2018-02-04 14:58:47,209 INFO L226 Difference]: Without dead ends: 65 [2018-02-04 14:58:47,210 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2018-02-04 14:58:47,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2018-02-04 14:58:47,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 60. [2018-02-04 14:58:47,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-02-04 14:58:47,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 71 transitions. [2018-02-04 14:58:47,213 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 71 transitions. Word has length 20 [2018-02-04 14:58:47,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:47,214 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 71 transitions. [2018-02-04 14:58:47,214 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-02-04 14:58:47,214 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 71 transitions. [2018-02-04 14:58:47,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-02-04 14:58:47,214 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:47,215 INFO L351 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:47,215 INFO L371 AbstractCegarLoop]: === Iteration 9 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:47,215 INFO L82 PathProgramCache]: Analyzing trace with hash 1818413707, now seen corresponding path program 1 times [2018-02-04 14:58:47,216 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:47,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:47,230 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:47,335 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:47,335 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:58:47,335 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11] total 11 [2018-02-04 14:58:47,335 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:47,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:47,335 INFO L182 omatonBuilderFactory]: Interpolants [1008#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 2 main_~length1~0)), 1009#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 2 main_~length1~0)), 1010#(and (= 0 main_~nondetString1~0.offset) (<= 2 (select |#length| main_~nondetString1~0.base))), 1011#(and (= 0 |cstrncat_#in~s1.offset|) (<= 2 (select |#length| |cstrncat_#in~s1.base|))), 1012#(and (<= 2 (select |#length| cstrncat_~s~0.base)) (= cstrncat_~s~0.offset 0)), 1013#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))), 1002#true, 1003#false, 1004#(<= 1 main_~length2~0), 1005#(<= 2 (+ main_~n~0 main_~length2~0)), 1006#(<= 2 main_~length1~0), 1007#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 2 main_~length1~0) (= 0 |main_#t~malloc13.offset|))] [2018-02-04 14:58:47,335 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:47,336 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-04 14:58:47,336 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-04 14:58:47,336 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2018-02-04 14:58:47,336 INFO L87 Difference]: Start difference. First operand 60 states and 71 transitions. Second operand 12 states. [2018-02-04 14:58:47,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:47,651 INFO L93 Difference]: Finished difference Result 83 states and 96 transitions. [2018-02-04 14:58:47,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 14:58:47,652 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 23 [2018-02-04 14:58:47,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:47,653 INFO L225 Difference]: With dead ends: 83 [2018-02-04 14:58:47,653 INFO L226 Difference]: Without dead ends: 83 [2018-02-04 14:58:47,653 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=75, Invalid=267, Unknown=0, NotChecked=0, Total=342 [2018-02-04 14:58:47,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-02-04 14:58:47,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 70. [2018-02-04 14:58:47,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-02-04 14:58:47,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 86 transitions. [2018-02-04 14:58:47,657 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 86 transitions. Word has length 23 [2018-02-04 14:58:47,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:47,657 INFO L432 AbstractCegarLoop]: Abstraction has 70 states and 86 transitions. [2018-02-04 14:58:47,657 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-04 14:58:47,658 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 86 transitions. [2018-02-04 14:58:47,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-02-04 14:58:47,658 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:47,658 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:47,658 INFO L371 AbstractCegarLoop]: === Iteration 10 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:47,659 INFO L82 PathProgramCache]: Analyzing trace with hash -557502487, now seen corresponding path program 1 times [2018-02-04 14:58:47,659 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:47,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:47,668 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:47,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:47,707 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:58:47,707 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 14:58:47,708 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:47,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:47,708 INFO L182 omatonBuilderFactory]: Interpolants [1184#(= 1 (select |#valid| |cstrncat_#in~s2.base|)), 1185#(= 1 (select |#valid| cstrncat_~s2.base)), 1186#(= 1 (select |#valid| |cstrncat_#t~post2.base|)), 1181#true, 1182#false, 1183#(= 1 (select |#valid| main_~nondetString2~0.base))] [2018-02-04 14:58:47,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:47,708 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 14:58:47,708 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 14:58:47,708 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 14:58:47,709 INFO L87 Difference]: Start difference. First operand 70 states and 86 transitions. Second operand 6 states. [2018-02-04 14:58:47,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:47,761 INFO L93 Difference]: Finished difference Result 72 states and 89 transitions. [2018-02-04 14:58:47,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 14:58:47,761 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-02-04 14:58:47,761 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:47,762 INFO L225 Difference]: With dead ends: 72 [2018-02-04 14:58:47,762 INFO L226 Difference]: Without dead ends: 72 [2018-02-04 14:58:47,762 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-02-04 14:58:47,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2018-02-04 14:58:47,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 69. [2018-02-04 14:58:47,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-02-04 14:58:47,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 83 transitions. [2018-02-04 14:58:47,765 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 83 transitions. Word has length 25 [2018-02-04 14:58:47,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:47,765 INFO L432 AbstractCegarLoop]: Abstraction has 69 states and 83 transitions. [2018-02-04 14:58:47,765 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 14:58:47,766 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 83 transitions. [2018-02-04 14:58:47,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-02-04 14:58:47,766 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:47,766 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:47,766 INFO L371 AbstractCegarLoop]: === Iteration 11 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:47,766 INFO L82 PathProgramCache]: Analyzing trace with hash -557502486, now seen corresponding path program 1 times [2018-02-04 14:58:47,767 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:47,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:47,773 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:47,822 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:47,822 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:58:47,822 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-02-04 14:58:47,822 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:47,822 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:47,823 INFO L182 omatonBuilderFactory]: Interpolants [1332#true, 1333#false, 1334#(<= 1 main_~length2~0), 1335#(and (= 0 |main_#t~malloc14.offset|) (<= 1 main_~length2~0) (= main_~length2~0 (select |#length| |main_#t~malloc14.base|))), 1336#(and (= 0 main_~nondetString2~0.offset) (<= 1 main_~length2~0) (= main_~length2~0 (select |#length| main_~nondetString2~0.base))), 1337#(and (= 0 main_~nondetString2~0.offset) (<= 1 (select |#length| main_~nondetString2~0.base))), 1338#(and (= 0 |cstrncat_#in~s2.offset|) (<= 1 (select |#length| |cstrncat_#in~s2.base|))), 1339#(and (<= 1 (select |#length| cstrncat_~s2.base)) (= 0 cstrncat_~s2.offset)), 1340#(and (<= 1 (select |#length| |cstrncat_#t~post2.base|)) (= |cstrncat_#t~post2.offset| 0))] [2018-02-04 14:58:47,823 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:47,823 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-02-04 14:58:47,823 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-02-04 14:58:47,823 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-02-04 14:58:47,823 INFO L87 Difference]: Start difference. First operand 69 states and 83 transitions. Second operand 9 states. [2018-02-04 14:58:47,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:47,905 INFO L93 Difference]: Finished difference Result 98 states and 120 transitions. [2018-02-04 14:58:47,905 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 14:58:47,906 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 25 [2018-02-04 14:58:47,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:47,906 INFO L225 Difference]: With dead ends: 98 [2018-02-04 14:58:47,906 INFO L226 Difference]: Without dead ends: 98 [2018-02-04 14:58:47,906 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=100, Unknown=0, NotChecked=0, Total=132 [2018-02-04 14:58:47,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-02-04 14:58:47,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 80. [2018-02-04 14:58:47,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-02-04 14:58:47,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 98 transitions. [2018-02-04 14:58:47,909 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 98 transitions. Word has length 25 [2018-02-04 14:58:47,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:47,910 INFO L432 AbstractCegarLoop]: Abstraction has 80 states and 98 transitions. [2018-02-04 14:58:47,910 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-02-04 14:58:47,910 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 98 transitions. [2018-02-04 14:58:47,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-02-04 14:58:47,911 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:47,911 INFO L351 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:47,911 INFO L371 AbstractCegarLoop]: === Iteration 12 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:47,911 INFO L82 PathProgramCache]: Analyzing trace with hash -59760490, now seen corresponding path program 2 times [2018-02-04 14:58:47,912 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:47,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:47,925 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:48,129 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:48,129 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:58:48,130 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12] total 12 [2018-02-04 14:58:48,130 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:48,130 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:48,130 INFO L182 omatonBuilderFactory]: Interpolants [1536#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base))), 1537#(and (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= 2 cstrncat_~s~0.offset)), 1525#true, 1526#false, 1527#(<= 1 main_~n~0), 1528#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (= 0 |main_#t~malloc13.offset|)), 1529#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (or (<= 1 main_~n~0) (<= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1))) (= main_~nondetString1~0.offset 0)), 1530#(and (not (= main_~nondetString1~0.base |main_#t~malloc14.base|)) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (or (<= 1 main_~n~0) (<= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1))) (= main_~nondetString1~0.offset 0)), 1531#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (or (<= 1 main_~n~0) (<= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1))) (= main_~nondetString1~0.offset 0)), 1532#(and (or (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~nondetString1~0.offset)) (<= 3 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 1533#(and (= 0 |cstrncat_#in~s1.offset|) (or (<= 3 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) |cstrncat_#in~s1.offset|)))), 1534#(and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= 3 (select |#length| cstrncat_~s~0.base))) (= cstrncat_~s~0.offset 0)), 1535#(and (= cstrncat_~s~0.offset 0) (or (<= 3 (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))))] [2018-02-04 14:58:48,130 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:48,130 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-04 14:58:48,130 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-04 14:58:48,130 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2018-02-04 14:58:48,130 INFO L87 Difference]: Start difference. First operand 80 states and 98 transitions. Second operand 13 states. [2018-02-04 14:58:48,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:48,562 INFO L93 Difference]: Finished difference Result 149 states and 181 transitions. [2018-02-04 14:58:48,563 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-02-04 14:58:48,563 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 26 [2018-02-04 14:58:48,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:48,564 INFO L225 Difference]: With dead ends: 149 [2018-02-04 14:58:48,564 INFO L226 Difference]: Without dead ends: 149 [2018-02-04 14:58:48,564 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=106, Invalid=494, Unknown=0, NotChecked=0, Total=600 [2018-02-04 14:58:48,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-02-04 14:58:48,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 83. [2018-02-04 14:58:48,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2018-02-04 14:58:48,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 102 transitions. [2018-02-04 14:58:48,568 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 102 transitions. Word has length 26 [2018-02-04 14:58:48,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:48,569 INFO L432 AbstractCegarLoop]: Abstraction has 83 states and 102 transitions. [2018-02-04 14:58:48,569 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-04 14:58:48,569 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 102 transitions. [2018-02-04 14:58:48,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-02-04 14:58:48,569 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:48,570 INFO L351 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:48,570 INFO L371 AbstractCegarLoop]: === Iteration 13 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:48,570 INFO L82 PathProgramCache]: Analyzing trace with hash 2086668971, now seen corresponding path program 3 times [2018-02-04 14:58:48,571 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:48,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:48,589 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:49,028 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:49,029 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:58:49,029 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14] total 14 [2018-02-04 14:58:49,029 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:49,029 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:49,029 INFO L182 omatonBuilderFactory]: Interpolants [1794#true, 1795#false, 1796#(and (<= 1 main_~n~0) (<= main_~n~0 1)), 1797#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (<= main_~n~0 1) (= 0 |main_#t~malloc13.offset|)), 1798#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (= main_~nondetString1~0.offset 0) (or (and (or (<= 1 main_~n~0) (<= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1))) (or (< (+ main_~n~0 1) (+ main_~nondetString1~0.offset main_~length1~0)) (<= main_~n~0 1))) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2)))), 1799#(and (not (= main_~nondetString1~0.base |main_#t~malloc14.base|)) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~nondetString1~0.offset 0) (or (and (or (<= 1 main_~n~0) (<= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1))) (or (< (+ main_~n~0 1) (+ main_~nondetString1~0.offset main_~length1~0)) (<= main_~n~0 1))) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2)))), 1800#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0) (or (and (or (<= 1 main_~n~0) (<= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1))) (or (< (+ main_~n~0 1) (+ main_~nondetString1~0.offset main_~length1~0)) (<= main_~n~0 1))) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2)))), 1801#(and (or (<= 4 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) 1)) (<= (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)) 2)) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 1802#(and (or (<= 4 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) 1)) (<= (select |#length| |cstrncat_#in~s1.base|) 2)) (= 0 |cstrncat_#in~s1.offset|)), 1803#(and (= cstrncat_~s~0.offset 0) (or (<= (select |#length| cstrncat_~s~0.base) 2) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (<= 4 (select |#length| cstrncat_~s~0.base)))), 1804#(and (= cstrncat_~s~0.offset 1) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)))), 1805#(and (= cstrncat_~s~0.offset 1) (or (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))))), 1806#(or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset)), 1807#(and (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= 0 cstrncat_~s~0.offset)), 1808#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)))] [2018-02-04 14:58:49,030 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:49,030 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-04 14:58:49,030 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-04 14:58:49,030 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2018-02-04 14:58:49,030 INFO L87 Difference]: Start difference. First operand 83 states and 102 transitions. Second operand 15 states. [2018-02-04 14:58:49,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:49,677 INFO L93 Difference]: Finished difference Result 244 states and 300 transitions. [2018-02-04 14:58:49,678 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 14:58:49,678 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 29 [2018-02-04 14:58:49,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:49,679 INFO L225 Difference]: With dead ends: 244 [2018-02-04 14:58:49,679 INFO L226 Difference]: Without dead ends: 244 [2018-02-04 14:58:49,680 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 146 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=131, Invalid=739, Unknown=0, NotChecked=0, Total=870 [2018-02-04 14:58:49,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 244 states. [2018-02-04 14:58:49,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 244 to 166. [2018-02-04 14:58:49,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-02-04 14:58:49,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 216 transitions. [2018-02-04 14:58:49,689 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 216 transitions. Word has length 29 [2018-02-04 14:58:49,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:49,689 INFO L432 AbstractCegarLoop]: Abstraction has 166 states and 216 transitions. [2018-02-04 14:58:49,689 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-04 14:58:49,689 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 216 transitions. [2018-02-04 14:58:49,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-02-04 14:58:49,691 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:49,691 INFO L351 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:49,691 INFO L371 AbstractCegarLoop]: === Iteration 14 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:49,691 INFO L82 PathProgramCache]: Analyzing trace with hash -1785596499, now seen corresponding path program 1 times [2018-02-04 14:58:49,691 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:49,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:49,705 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:50,137 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:50,137 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:58:50,138 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2018-02-04 14:58:50,138 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:50,138 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:50,138 INFO L182 omatonBuilderFactory]: Interpolants [2249#true, 2250#false, 2251#(<= 1 main_~n~0), 2252#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (= 0 |main_#t~malloc13.offset|)), 2253#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (or (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1)) (<= 1 main_~n~0)) (= main_~nondetString1~0.offset 0)), 2254#(and (not (= main_~nondetString1~0.base |main_#t~malloc14.base|)) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (or (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1)) (<= 1 main_~n~0)) (= main_~nondetString1~0.offset 0)), 2255#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (or (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1)) (<= 1 main_~n~0)) (= main_~nondetString1~0.offset 0)), 2256#(and (or (not (= main_~n~0 1)) (<= 4 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) 1)) (<= (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)) (* 2 main_~n~0))) (or (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~nondetString1~0.offset)) (and (<= 1 main_~n~0) (<= (+ main_~n~0 2) (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (= main_~n~0 1)) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 2257#(and (= 0 |cstrncat_#in~s1.offset|) (or (<= 4 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) 1)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) |cstrncat_#in~s1.offset|)) (<= (select |#length| |cstrncat_#in~s1.base|) 2))), 2258#(and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (select |#length| cstrncat_~s~0.base) 2) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (<= 4 (select |#length| cstrncat_~s~0.base))) (= cstrncat_~s~0.offset 0)), 2259#(and (or (<= (select |#length| cstrncat_~s~0.base) 2) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (<= 4 (select |#length| cstrncat_~s~0.base))) (= cstrncat_~s~0.offset 0)), 2260#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))), 2261#(or (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 2262#(or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset)), 2263#(and (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= 0 cstrncat_~s~0.offset)), 2264#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)))] [2018-02-04 14:58:50,139 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:50,139 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-04 14:58:50,139 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-04 14:58:50,139 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-02-04 14:58:50,140 INFO L87 Difference]: Start difference. First operand 166 states and 216 transitions. Second operand 16 states. [2018-02-04 14:58:50,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:50,807 INFO L93 Difference]: Finished difference Result 340 states and 424 transitions. [2018-02-04 14:58:50,807 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-02-04 14:58:50,808 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 29 [2018-02-04 14:58:50,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:50,809 INFO L225 Difference]: With dead ends: 340 [2018-02-04 14:58:50,809 INFO L226 Difference]: Without dead ends: 340 [2018-02-04 14:58:50,809 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 213 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=147, Invalid=975, Unknown=0, NotChecked=0, Total=1122 [2018-02-04 14:58:50,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 340 states. [2018-02-04 14:58:50,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 340 to 86. [2018-02-04 14:58:50,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-02-04 14:58:50,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 106 transitions. [2018-02-04 14:58:50,814 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 106 transitions. Word has length 29 [2018-02-04 14:58:50,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:50,814 INFO L432 AbstractCegarLoop]: Abstraction has 86 states and 106 transitions. [2018-02-04 14:58:50,814 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-04 14:58:50,814 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 106 transitions. [2018-02-04 14:58:50,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-02-04 14:58:50,815 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:50,815 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:50,815 INFO L371 AbstractCegarLoop]: === Iteration 15 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:50,815 INFO L82 PathProgramCache]: Analyzing trace with hash 933708271, now seen corresponding path program 1 times [2018-02-04 14:58:50,816 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:50,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:50,826 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:50,907 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:50,907 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:58:50,907 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2018-02-04 14:58:50,907 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:50,907 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:50,907 INFO L182 omatonBuilderFactory]: Interpolants [2727#true, 2728#false, 2729#(and (<= 1 main_~n~0) (<= main_~n~0 1)), 2730#(and (<= |cstrncat_#in~n| 1) (<= 1 |cstrncat_#in~n|)), 2731#(and (<= 1 cstrncat_~n) (<= cstrncat_~n 1)), 2732#(and (<= cstrncat_~n 0) (<= 0 cstrncat_~n)), 2733#(not |cstrncat_#t~short5|)] [2018-02-04 14:58:50,907 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:50,907 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 14:58:50,908 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 14:58:50,908 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 14:58:50,908 INFO L87 Difference]: Start difference. First operand 86 states and 106 transitions. Second operand 7 states. [2018-02-04 14:58:50,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:50,952 INFO L93 Difference]: Finished difference Result 175 states and 206 transitions. [2018-02-04 14:58:50,952 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 14:58:50,952 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 32 [2018-02-04 14:58:50,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:50,952 INFO L225 Difference]: With dead ends: 175 [2018-02-04 14:58:50,953 INFO L226 Difference]: Without dead ends: 175 [2018-02-04 14:58:50,953 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2018-02-04 14:58:50,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-02-04 14:58:50,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 147. [2018-02-04 14:58:50,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-02-04 14:58:50,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 181 transitions. [2018-02-04 14:58:50,955 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 181 transitions. Word has length 32 [2018-02-04 14:58:50,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:50,955 INFO L432 AbstractCegarLoop]: Abstraction has 147 states and 181 transitions. [2018-02-04 14:58:50,955 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 14:58:50,955 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 181 transitions. [2018-02-04 14:58:50,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-02-04 14:58:50,956 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:50,956 INFO L351 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:50,956 INFO L371 AbstractCegarLoop]: === Iteration 16 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:50,956 INFO L82 PathProgramCache]: Analyzing trace with hash -1401328522, now seen corresponding path program 4 times [2018-02-04 14:58:50,957 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:50,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:50,963 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:51,195 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:51,196 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:58:51,196 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2018-02-04 14:58:51,196 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:51,196 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:51,196 INFO L182 omatonBuilderFactory]: Interpolants [3072#(and (= 0 |cstrncat_#in~s1.offset|) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1))))), 3073#(and (= cstrncat_~s~0.offset 0) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 3074#(and (<= 1 cstrncat_~s~0.offset) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 3075#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (or (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (<= 2 cstrncat_~s~0.offset))), 3076#(or (and (or (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (<= 2 cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 3077#(and (<= 3 cstrncat_~s~0.offset) (or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset))), 3078#(and (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= 3 cstrncat_~s~0.offset)), 3079#(and (<= 4 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))), 3064#true, 3065#false, 3066#(and (<= 1 main_~n~0) (<= main_~n~0 1)), 3067#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (<= main_~n~0 1) (= 0 |main_#t~malloc13.offset|)), 3068#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~n~0) (<= main_~n~0 1) (= main_~nondetString1~0.offset 0)), 3069#(and (not (= main_~nondetString1~0.base |main_#t~malloc14.base|)) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (<= main_~n~0 1) (= main_~nondetString1~0.offset 0)), 3070#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (<= main_~n~0 1) (= main_~nondetString1~0.offset 0)), 3071#(and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (+ (select |#length| main_~nondetString1~0.base) (+ main_~n~0 (- 1))) (+ main_~nondetString1~0.offset (+ (- main_~n~0) (- 1)))))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0))] [2018-02-04 14:58:51,197 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:51,197 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-04 14:58:51,197 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-04 14:58:51,197 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=205, Unknown=0, NotChecked=0, Total=240 [2018-02-04 14:58:51,197 INFO L87 Difference]: Start difference. First operand 147 states and 181 transitions. Second operand 16 states. [2018-02-04 14:58:51,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:51,847 INFO L93 Difference]: Finished difference Result 239 states and 276 transitions. [2018-02-04 14:58:51,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-02-04 14:58:51,847 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 32 [2018-02-04 14:58:51,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:51,848 INFO L225 Difference]: With dead ends: 239 [2018-02-04 14:58:51,848 INFO L226 Difference]: Without dead ends: 239 [2018-02-04 14:58:51,848 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 308 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=209, Invalid=1123, Unknown=0, NotChecked=0, Total=1332 [2018-02-04 14:58:51,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2018-02-04 14:58:51,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 114. [2018-02-04 14:58:51,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-02-04 14:58:51,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 135 transitions. [2018-02-04 14:58:51,852 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 135 transitions. Word has length 32 [2018-02-04 14:58:51,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:51,853 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 135 transitions. [2018-02-04 14:58:51,853 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-04 14:58:51,853 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 135 transitions. [2018-02-04 14:58:51,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-02-04 14:58:51,853 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:51,853 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:51,853 INFO L371 AbstractCegarLoop]: === Iteration 17 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:51,854 INFO L82 PathProgramCache]: Analyzing trace with hash 799694765, now seen corresponding path program 1 times [2018-02-04 14:58:51,854 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:51,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:51,861 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:51,966 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:51,967 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:58:51,967 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12] total 12 [2018-02-04 14:58:51,967 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:51,967 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:51,967 INFO L182 omatonBuilderFactory]: Interpolants [3475#true, 3476#false, 3477#(<= 1 main_~length2~0), 3478#(and (= 0 |main_#t~malloc14.offset|) (<= 1 main_~length2~0) (= main_~length2~0 (select |#length| |main_#t~malloc14.base|))), 3479#(and (= 0 main_~nondetString2~0.offset) (or (= (+ main_~nondetString2~0.offset main_~length2~0) 1) (and (<= 1 main_~length2~0) (= main_~length2~0 (select |#length| main_~nondetString2~0.base))))), 3480#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString2~0.base) main_~nondetString2~0.offset)) (<= 2 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))))), 3481#(and (= 0 |cstrncat_#in~s2.offset|) (or (= 0 (select (select |#memory_int| |cstrncat_#in~s2.base|) |cstrncat_#in~s2.offset|)) (<= 2 (select |#length| |cstrncat_#in~s2.base|)))), 3482#(and (= 0 cstrncat_~s2.offset) (or (= 0 (select (select |#memory_int| cstrncat_~s2.base) cstrncat_~s2.offset)) (<= 2 (select |#length| cstrncat_~s2.base)))), 3483#(and (= |cstrncat_#t~post2.offset| 0) (<= (+ |cstrncat_#t~post2.offset| 1) cstrncat_~s2.offset) (or (<= (+ cstrncat_~s2.offset 1) (+ (select |#length| cstrncat_~s2.base) |cstrncat_#t~post2.offset|)) (= 0 (select (select |#memory_int| |cstrncat_#t~post2.base|) |cstrncat_#t~post2.offset|)))), 3484#(and (or (= 0 |cstrncat_#t~mem4|) (<= (+ cstrncat_~s2.offset 1) (select |#length| cstrncat_~s2.base))) (<= 1 cstrncat_~s2.offset)), 3485#(and (<= 1 cstrncat_~s2.offset) (or (not |cstrncat_#t~short5|) (<= (+ cstrncat_~s2.offset 1) (select |#length| cstrncat_~s2.base)))), 3486#(and (<= 1 cstrncat_~s2.offset) (<= (+ cstrncat_~s2.offset 1) (select |#length| cstrncat_~s2.base))), 3487#(and (<= (+ |cstrncat_#t~post2.offset| 1) (select |#length| |cstrncat_#t~post2.base|)) (<= 1 |cstrncat_#t~post2.offset|))] [2018-02-04 14:58:51,967 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:51,967 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-04 14:58:51,967 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-04 14:58:51,968 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2018-02-04 14:58:51,968 INFO L87 Difference]: Start difference. First operand 114 states and 135 transitions. Second operand 13 states. [2018-02-04 14:58:52,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:52,268 INFO L93 Difference]: Finished difference Result 174 states and 203 transitions. [2018-02-04 14:58:52,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-02-04 14:58:52,268 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 32 [2018-02-04 14:58:52,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:52,269 INFO L225 Difference]: With dead ends: 174 [2018-02-04 14:58:52,269 INFO L226 Difference]: Without dead ends: 174 [2018-02-04 14:58:52,269 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=70, Invalid=350, Unknown=0, NotChecked=0, Total=420 [2018-02-04 14:58:52,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-02-04 14:58:52,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 124. [2018-02-04 14:58:52,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-02-04 14:58:52,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 148 transitions. [2018-02-04 14:58:52,272 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 148 transitions. Word has length 32 [2018-02-04 14:58:52,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:52,272 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 148 transitions. [2018-02-04 14:58:52,272 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-04 14:58:52,272 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 148 transitions. [2018-02-04 14:58:52,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-02-04 14:58:52,273 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:52,273 INFO L351 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:52,273 INFO L371 AbstractCegarLoop]: === Iteration 18 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:52,273 INFO L82 PathProgramCache]: Analyzing trace with hash -1535342028, now seen corresponding path program 2 times [2018-02-04 14:58:52,273 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:52,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:52,282 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:52,671 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:52,671 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:58:52,671 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16] total 16 [2018-02-04 14:58:52,671 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:52,671 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:52,672 INFO L182 omatonBuilderFactory]: Interpolants [3808#(and (= 0 main_~nondetString1~0.offset) (or (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base))), 3809#(and (= 0 main_~nondetString1~0.offset) (or (and (<= 4 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (or (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (+ main_~nondetString1~0.offset (- 1)))))) (<= 5 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~nondetString1~0.offset)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) 1))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base))), 3810#(and (= 0 |cstrncat_#in~s1.offset|) (or (and (<= 4 (select |#length| |cstrncat_#in~s1.base|)) (or (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)))) (<= 5 (select |#length| |cstrncat_#in~s1.base|)))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) 1)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) |cstrncat_#in~s1.offset|)))), 3811#(and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (or (<= 5 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (<= 4 (select |#length| cstrncat_~s~0.base)))) (= cstrncat_~s~0.offset 0)), 3812#(and (= cstrncat_~s~0.offset 0) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (or (<= 5 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (<= 4 (select |#length| cstrncat_~s~0.base))))), 3813#(and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))))) (= cstrncat_~s~0.offset 1)), 3814#(and (or (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))) (= cstrncat_~s~0.offset 1)), 3815#(or (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (<= 2 cstrncat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))), 3816#(or (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (<= 2 cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 3817#(and (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= 3 cstrncat_~s~0.offset)), 3818#(and (<= 4 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))), 3802#true, 3803#false, 3804#(<= 1 main_~n~0), 3805#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (= 0 |main_#t~malloc13.offset|)), 3806#(and (= 0 main_~nondetString1~0.offset) (or (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (= (select |#valid| main_~nondetString1~0.base) 1)), 3807#(and (= 0 main_~nondetString1~0.offset) (not (= main_~nondetString1~0.base |main_#t~malloc14.base|)) (or (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))))] [2018-02-04 14:58:52,672 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:52,672 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-02-04 14:58:52,672 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-02-04 14:58:52,672 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2018-02-04 14:58:52,673 INFO L87 Difference]: Start difference. First operand 124 states and 148 transitions. Second operand 17 states. [2018-02-04 14:58:53,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:53,592 INFO L93 Difference]: Finished difference Result 335 states and 391 transitions. [2018-02-04 14:58:53,592 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-02-04 14:58:53,592 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 32 [2018-02-04 14:58:53,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:53,593 INFO L225 Difference]: With dead ends: 335 [2018-02-04 14:58:53,593 INFO L226 Difference]: Without dead ends: 335 [2018-02-04 14:58:53,594 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 261 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=164, Invalid=1168, Unknown=0, NotChecked=0, Total=1332 [2018-02-04 14:58:53,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 335 states. [2018-02-04 14:58:53,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 335 to 127. [2018-02-04 14:58:53,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-02-04 14:58:53,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 152 transitions. [2018-02-04 14:58:53,599 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 152 transitions. Word has length 32 [2018-02-04 14:58:53,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:53,599 INFO L432 AbstractCegarLoop]: Abstraction has 127 states and 152 transitions. [2018-02-04 14:58:53,599 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-02-04 14:58:53,600 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 152 transitions. [2018-02-04 14:58:53,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-02-04 14:58:53,600 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:53,600 INFO L351 BasicCegarLoop]: trace histogram [6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:53,600 INFO L371 AbstractCegarLoop]: === Iteration 19 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:53,601 INFO L82 PathProgramCache]: Analyzing trace with hash 2027344973, now seen corresponding path program 3 times [2018-02-04 14:58:53,601 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:53,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:53,618 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:54,350 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:54,351 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:58:54,351 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19] total 19 [2018-02-04 14:58:54,351 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:54,351 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:54,351 INFO L182 omatonBuilderFactory]: Interpolants [4321#true, 4322#false, 4323#(<= 1 main_~n~0), 4324#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (= 0 |main_#t~malloc13.offset|)), 4325#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0)), 4326#(and (not (= main_~nondetString1~0.base |main_#t~malloc14.base|)) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0)), 4327#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 4328#(and (or (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~nondetString1~0.offset)) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~n~0)) (<= 1 main_~n~0) (<= (+ (* 2 main_~n~0) 1) (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) 1)) (and (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 1) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (or (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ main_~nondetString1~0.offset (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)))))) (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 2) (+ main_~n~0 (select |#length| main_~nondetString1~0.base)))))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 4329#(and (= 0 |cstrncat_#in~s1.offset|) (or (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) 2))) (<= 1 (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) 2))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) 1)) (<= 6 (select |#length| |cstrncat_#in~s1.base|)) (and (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) 1) (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1))))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) |cstrncat_#in~s1.offset|)))), 4330#(and (or (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (<= 1 (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2)))) (<= 6 (select |#length| cstrncat_~s~0.base))) (= cstrncat_~s~0.offset 0)), 4331#(and (or (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (<= 1 (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (<= 6 (select |#length| cstrncat_~s~0.base))) (= cstrncat_~s~0.offset 0)), 4332#(and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2))) (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) 2) 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))))) (= cstrncat_~s~0.offset 1)), 4333#(and (or (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) 2) 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2))) (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (or (<= (+ cstrncat_~s~0.offset 1) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))))) (= cstrncat_~s~0.offset 1)), 4334#(or (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 4335#(or (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 2) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 4336#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))), 4337#(or (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 4338#(or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset)), 4339#(and (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= 0 cstrncat_~s~0.offset)), 4340#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)))] [2018-02-04 14:58:54,351 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:54,352 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 14:58:54,352 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 14:58:54,352 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=327, Unknown=0, NotChecked=0, Total=380 [2018-02-04 14:58:54,352 INFO L87 Difference]: Start difference. First operand 127 states and 152 transitions. Second operand 20 states. [2018-02-04 14:58:54,800 WARN L146 SmtUtils]: Spent 124ms on a formula simplification. DAG size of input: 75 DAG size of output 68 [2018-02-04 14:58:55,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:55,610 INFO L93 Difference]: Finished difference Result 392 states and 461 transitions. [2018-02-04 14:58:55,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-02-04 14:58:55,610 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 35 [2018-02-04 14:58:55,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:55,611 INFO L225 Difference]: With dead ends: 392 [2018-02-04 14:58:55,611 INFO L226 Difference]: Without dead ends: 392 [2018-02-04 14:58:55,612 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 469 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=248, Invalid=1474, Unknown=0, NotChecked=0, Total=1722 [2018-02-04 14:58:55,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 392 states. [2018-02-04 14:58:55,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 130. [2018-02-04 14:58:55,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-02-04 14:58:55,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 156 transitions. [2018-02-04 14:58:55,616 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 156 transitions. Word has length 35 [2018-02-04 14:58:55,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:55,616 INFO L432 AbstractCegarLoop]: Abstraction has 130 states and 156 transitions. [2018-02-04 14:58:55,617 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 14:58:55,617 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 156 transitions. [2018-02-04 14:58:55,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-04 14:58:55,617 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:55,617 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:55,617 INFO L371 AbstractCegarLoop]: === Iteration 20 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:55,617 INFO L82 PathProgramCache]: Analyzing trace with hash -1376138118, now seen corresponding path program 1 times [2018-02-04 14:58:55,618 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:55,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:55,626 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:55,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:55,703 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:58:55,704 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 14:58:55,704 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:55,704 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:55,704 INFO L182 omatonBuilderFactory]: Interpolants [4912#(<= |cstrncat_#in~n| 0), 4907#true, 4908#false, 4909#(<= 1 main_~n~0), 4910#(<= |cstrncat_#in~n| cstrncat_~n), 4911#(or |cstrncat_#t~short5| (<= |cstrncat_#in~n| 0))] [2018-02-04 14:58:55,704 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:55,704 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 14:58:55,705 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 14:58:55,705 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-02-04 14:58:55,705 INFO L87 Difference]: Start difference. First operand 130 states and 156 transitions. Second operand 6 states. [2018-02-04 14:58:55,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:55,750 INFO L93 Difference]: Finished difference Result 168 states and 197 transitions. [2018-02-04 14:58:55,756 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 14:58:55,756 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 36 [2018-02-04 14:58:55,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:55,756 INFO L225 Difference]: With dead ends: 168 [2018-02-04 14:58:55,757 INFO L226 Difference]: Without dead ends: 154 [2018-02-04 14:58:55,757 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-02-04 14:58:55,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-02-04 14:58:55,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 134. [2018-02-04 14:58:55,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-02-04 14:58:55,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 158 transitions. [2018-02-04 14:58:55,760 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 158 transitions. Word has length 36 [2018-02-04 14:58:55,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:55,760 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 158 transitions. [2018-02-04 14:58:55,760 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 14:58:55,760 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 158 transitions. [2018-02-04 14:58:55,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-02-04 14:58:55,761 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:55,761 INFO L351 BasicCegarLoop]: trace histogram [7, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:55,761 INFO L371 AbstractCegarLoop]: === Iteration 21 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:55,761 INFO L82 PathProgramCache]: Analyzing trace with hash 803973012, now seen corresponding path program 4 times [2018-02-04 14:58:55,761 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:55,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:55,778 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:56,233 WARN L146 SmtUtils]: Spent 177ms on a formula simplification. DAG size of input: 69 DAG size of output 61 [2018-02-04 14:58:56,710 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:56,710 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:58:56,711 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20] total 20 [2018-02-04 14:58:56,711 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:56,711 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:56,711 INFO L182 omatonBuilderFactory]: Interpolants [5219#true, 5220#false, 5221#(<= 1 main_~n~0), 5222#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (= 0 |main_#t~malloc13.offset|)), 5223#(and (= 0 main_~nondetString1~0.offset) (or (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (= (select |#valid| main_~nondetString1~0.base) 1)), 5224#(and (= 0 main_~nondetString1~0.offset) (not (= main_~nondetString1~0.base |main_#t~malloc14.base|)) (or (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2)))), 5225#(and (= 0 main_~nondetString1~0.offset) (or (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base))), 5226#(and (= 0 main_~nondetString1~0.offset) (or (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (+ main_~nondetString1~0.offset (- 1)))))) (<= 4 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (<= 6 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (or (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 7 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~nondetString1~0.offset)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) 1)) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (- main_~nondetString1~0.offset) 3)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 5 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base))), 5227#(and (= 0 |cstrncat_#in~s1.offset|) (or (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ 3 (- 1)))) (<= 5 (select |#length| |cstrncat_#in~s1.base|))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) 1)) (and (<= 6 (select |#length| |cstrncat_#in~s1.base|)) (or (<= 7 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)))))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) |cstrncat_#in~s1.offset|)) (and (<= 4 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1))))))), 5228#(and (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= 4 (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (<= 5 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ 3 (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= 7 (select |#length| cstrncat_~s~0.base))) (<= 6 (select |#length| cstrncat_~s~0.base)))) (= cstrncat_~s~0.offset 0)), 5229#(and (= cstrncat_~s~0.offset 0) (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= 4 (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= 5 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ 3 (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= 7 (select |#length| cstrncat_~s~0.base))) (<= 6 (select |#length| cstrncat_~s~0.base))))), 5230#(and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))))) (= cstrncat_~s~0.offset 1)), 5231#(and (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))))) (= cstrncat_~s~0.offset 1)), 5232#(or (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)))), 5233#(or (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 5234#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)))), 5235#(or (and (or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 5236#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))), 5237#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (<= 0 cstrncat_~s~0.offset))), 5238#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base))), 5239#(and (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= 2 cstrncat_~s~0.offset))] [2018-02-04 14:58:56,711 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:56,711 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-02-04 14:58:56,712 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-02-04 14:58:56,712 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=359, Unknown=0, NotChecked=0, Total=420 [2018-02-04 14:58:56,712 INFO L87 Difference]: Start difference. First operand 134 states and 158 transitions. Second operand 21 states. [2018-02-04 14:58:57,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:57,930 INFO L93 Difference]: Finished difference Result 298 states and 340 transitions. [2018-02-04 14:58:57,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-02-04 14:58:57,931 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 38 [2018-02-04 14:58:57,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:57,931 INFO L225 Difference]: With dead ends: 298 [2018-02-04 14:58:57,931 INFO L226 Difference]: Without dead ends: 294 [2018-02-04 14:58:57,932 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 377 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=248, Invalid=1474, Unknown=0, NotChecked=0, Total=1722 [2018-02-04 14:58:57,932 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 294 states. [2018-02-04 14:58:57,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 294 to 137. [2018-02-04 14:58:57,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-02-04 14:58:57,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 162 transitions. [2018-02-04 14:58:57,935 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 162 transitions. Word has length 38 [2018-02-04 14:58:57,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:57,935 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 162 transitions. [2018-02-04 14:58:57,935 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-02-04 14:58:57,935 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 162 transitions. [2018-02-04 14:58:57,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-02-04 14:58:57,936 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:57,936 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:57,936 INFO L371 AbstractCegarLoop]: === Iteration 22 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:57,936 INFO L82 PathProgramCache]: Analyzing trace with hash 336762589, now seen corresponding path program 1 times [2018-02-04 14:58:57,937 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:57,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:57,943 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:58,007 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:58,007 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 14:58:58,007 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 14:58:58,007 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:58,008 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:58,008 INFO L182 omatonBuilderFactory]: Interpolants [5717#true, 5718#false, 5719#(= |#valid| |old(#valid)|), 5720#(and (= (select |#valid| |main_#t~malloc13.base|) 1) (= |old(#valid)| (store |#valid| |main_#t~malloc13.base| 0))), 5721#(and (= (store (store |#valid| |main_#t~malloc13.base| 0) |main_#t~malloc14.base| 0) |old(#valid)|) (not (= |main_#t~malloc13.base| |main_#t~malloc14.base|))), 5722#(= (store |#valid| |main_#t~malloc14.base| 0) |old(#valid)|)] [2018-02-04 14:58:58,008 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:58,008 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 14:58:58,008 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 14:58:58,008 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 14:58:58,009 INFO L87 Difference]: Start difference. First operand 137 states and 162 transitions. Second operand 6 states. [2018-02-04 14:58:58,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:58,089 INFO L93 Difference]: Finished difference Result 136 states and 161 transitions. [2018-02-04 14:58:58,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 14:58:58,091 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 39 [2018-02-04 14:58:58,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:58,091 INFO L225 Difference]: With dead ends: 136 [2018-02-04 14:58:58,091 INFO L226 Difference]: Without dead ends: 94 [2018-02-04 14:58:58,091 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-02-04 14:58:58,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-02-04 14:58:58,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 90. [2018-02-04 14:58:58,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-02-04 14:58:58,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 104 transitions. [2018-02-04 14:58:58,095 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 104 transitions. Word has length 39 [2018-02-04 14:58:58,095 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:58,095 INFO L432 AbstractCegarLoop]: Abstraction has 90 states and 104 transitions. [2018-02-04 14:58:58,095 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 14:58:58,095 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 104 transitions. [2018-02-04 14:58:58,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-02-04 14:58:58,095 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:58,095 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:58,095 INFO L371 AbstractCegarLoop]: === Iteration 23 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:58,095 INFO L82 PathProgramCache]: Analyzing trace with hash -2098962228, now seen corresponding path program 2 times [2018-02-04 14:58:58,096 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:58,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:58,103 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:58,565 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:58,565 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:58:58,565 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16] total 16 [2018-02-04 14:58:58,565 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:58,566 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:58,566 INFO L182 omatonBuilderFactory]: Interpolants [5953#true, 5954#false, 5955#(= (select |#valid| |main_#t~malloc13.base|) 1), 5956#(= (select |#valid| main_~nondetString1~0.base) 1), 5957#(and (not (= main_~nondetString1~0.base |main_#t~malloc14.base|)) (= 0 |main_#t~malloc14.offset|) (= main_~length2~0 (select |#length| |main_#t~malloc14.base|))), 5958#(and (= 0 main_~nondetString2~0.offset) (or (not (= (+ main_~nondetString2~0.offset main_~length2~0) 2)) (not (= main_~nondetString1~0.base main_~nondetString2~0.base))) (= main_~length2~0 (select |#length| main_~nondetString2~0.base))), 5959#(and (= 0 main_~nondetString2~0.offset) (or (and (= 0 (select (select |#memory_int| main_~nondetString2~0.base) 1)) (not (= main_~nondetString1~0.base main_~nondetString2~0.base))) (<= (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base)) 1) (<= 3 (+ main_~nondetString2~0.offset (select |#length| main_~nondetString2~0.base))))), 5960#(and (= 0 |cstrncat_#in~s2.offset|) (or (and (not (= |cstrncat_#in~s1.base| |cstrncat_#in~s2.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s2.base|) 1))) (<= (select |#length| |cstrncat_#in~s2.base|) 1) (<= 3 (select |#length| |cstrncat_#in~s2.base|)))), 5961#(and (= 0 cstrncat_~s2.offset) (or (<= 3 (select |#length| cstrncat_~s2.base)) (<= (select |#length| cstrncat_~s2.base) 1) (and (= 0 (select (select |#memory_int| cstrncat_~s2.base) 1)) (not (= cstrncat_~s~0.base cstrncat_~s2.base))))), 5962#(and (= |cstrncat_#t~post2.offset| 0) (or (and (not (= |cstrncat_#t~post2.base| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| |cstrncat_#t~post2.base|) 1)) (<= cstrncat_~s2.offset (+ |cstrncat_#t~post2.offset| 1)) (= |cstrncat_#t~post2.base| cstrncat_~s2.base) (<= (+ |cstrncat_#t~post2.offset| 1) cstrncat_~s2.offset)) (and (or (<= (+ (select |#length| cstrncat_~s2.base) |cstrncat_#t~post2.offset|) cstrncat_~s2.offset) (<= (+ cstrncat_~s2.offset 2) (+ (select |#length| cstrncat_~s2.base) |cstrncat_#t~post2.offset|))) (<= (+ |cstrncat_#t~post2.offset| 1) cstrncat_~s2.offset)))), 5963#(or (and (<= 1 cstrncat_~s2.offset) (= 0 (select (select (store |#memory_int| cstrncat_~s~0.base (store (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset |cstrncat_#t~mem4|)) cstrncat_~s2.base) 1)) (<= cstrncat_~s2.offset 1)) (and (<= 1 cstrncat_~s2.offset) (or (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset) (<= (+ cstrncat_~s2.offset 2) (select |#length| cstrncat_~s2.base))))), 5964#(or (and (<= 1 cstrncat_~s2.offset) (or (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset) (<= (+ cstrncat_~s2.offset 2) (select |#length| cstrncat_~s2.base)))) (and (= 0 (select (select |#memory_int| cstrncat_~s2.base) 1)) (<= 1 cstrncat_~s2.offset) (<= cstrncat_~s2.offset 1))), 5965#(or (and (= 1 |cstrncat_#t~post2.offset|) (= 0 (select (select |#memory_int| |cstrncat_#t~post2.base|) |cstrncat_#t~post2.offset|))) (and (<= 2 cstrncat_~s2.offset) (or (<= (select |#length| |cstrncat_#t~post2.base|) |cstrncat_#t~post2.offset|) (<= (+ cstrncat_~s2.offset 1) (select |#length| cstrncat_~s2.base))))), 5966#(or (= 0 |cstrncat_#t~mem4|) (and (<= 2 cstrncat_~s2.offset) (<= (+ cstrncat_~s2.offset 1) (select |#length| cstrncat_~s2.base)))), 5967#(or (not |cstrncat_#t~short5|) (and (<= 2 cstrncat_~s2.offset) (<= (+ cstrncat_~s2.offset 1) (select |#length| cstrncat_~s2.base)))), 5968#(and (<= 2 cstrncat_~s2.offset) (<= (+ cstrncat_~s2.offset 1) (select |#length| cstrncat_~s2.base))), 5969#(and (<= (+ |cstrncat_#t~post2.offset| 1) (select |#length| |cstrncat_#t~post2.base|)) (<= 2 |cstrncat_#t~post2.offset|))] [2018-02-04 14:58:58,566 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:58,566 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-02-04 14:58:58,566 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-02-04 14:58:58,566 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2018-02-04 14:58:58,566 INFO L87 Difference]: Start difference. First operand 90 states and 104 transitions. Second operand 17 states. [2018-02-04 14:58:59,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:59,199 INFO L93 Difference]: Finished difference Result 124 states and 138 transitions. [2018-02-04 14:58:59,199 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-02-04 14:58:59,199 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 39 [2018-02-04 14:58:59,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:59,199 INFO L225 Difference]: With dead ends: 124 [2018-02-04 14:58:59,199 INFO L226 Difference]: Without dead ends: 124 [2018-02-04 14:58:59,200 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=104, Invalid=652, Unknown=0, NotChecked=0, Total=756 [2018-02-04 14:58:59,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-02-04 14:58:59,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 97. [2018-02-04 14:58:59,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-02-04 14:58:59,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 114 transitions. [2018-02-04 14:58:59,201 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 114 transitions. Word has length 39 [2018-02-04 14:58:59,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:59,201 INFO L432 AbstractCegarLoop]: Abstraction has 97 states and 114 transitions. [2018-02-04 14:58:59,201 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-02-04 14:58:59,201 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 114 transitions. [2018-02-04 14:58:59,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-02-04 14:58:59,202 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:59,202 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:59,202 INFO L371 AbstractCegarLoop]: === Iteration 24 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:59,202 INFO L82 PathProgramCache]: Analyzing trace with hash -643319614, now seen corresponding path program 1 times [2018-02-04 14:58:59,202 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:59,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:59,207 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:58:59,422 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:59,423 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:58:59,423 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17] total 17 [2018-02-04 14:58:59,423 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:58:59,423 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:59,423 INFO L182 omatonBuilderFactory]: Interpolants [6213#true, 6214#false, 6215#(<= (+ main_~n~0 main_~length2~0) main_~length1~0), 6216#(and (<= (+ main_~n~0 main_~length2~0) main_~length1~0) (= 0 |main_#t~malloc13.offset|)), 6217#(and (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 6218#(and (= 0 |main_#t~malloc14.offset|) (= main_~length2~0 (select |#length| |main_#t~malloc14.base|)) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 6219#(and (= 0 main_~nondetString2~0.offset) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 6220#(and (= 0 main_~nondetString2~0.offset) (<= (+ main_~length2~0 main_~nondetString1~0.offset) (select |#length| main_~nondetString1~0.base)) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 6221#(and (= 0 main_~nondetString2~0.offset) (<= (+ (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset) (select |#length| main_~nondetString1~0.base)) (= main_~nondetString1~0.offset 0)), 6222#(and (= 0 |cstrncat_#in~s1.offset|) (= 0 |cstrncat_#in~s2.offset|) (<= (select |#length| |cstrncat_#in~s2.base|) (select |#length| |cstrncat_#in~s1.base|))), 6223#(and (= 0 cstrncat_~s2.offset) (= cstrncat_~s~0.offset 0) (<= (select |#length| cstrncat_~s2.base) (select |#length| cstrncat_~s~0.base))), 6224#(and (= |cstrncat_#t~post2.offset| 0) (= cstrncat_~s~0.offset 0) (<= (+ (select |#length| cstrncat_~s2.base) |cstrncat_#t~post2.offset| 1) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset))), 6225#(and (<= (+ (select |#length| cstrncat_~s2.base) 1) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset)) (= cstrncat_~s~0.offset 0)), 6226#(and (<= 1 cstrncat_~s~0.offset) (<= (+ (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset))), 6227#(and (<= 1 cstrncat_~s~0.offset) (<= (+ (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset 1) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset))), 6228#(and (<= (+ (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset)) (<= 2 cstrncat_~s~0.offset)), 6229#(and (<= (+ (select |#length| |cstrncat_#t~post2.base|) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) |cstrncat_#t~post2.offset|)) (<= 2 cstrncat_~s~0.offset)), 6230#(and (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= 2 cstrncat_~s~0.offset))] [2018-02-04 14:58:59,423 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:58:59,424 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-02-04 14:58:59,424 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-02-04 14:58:59,424 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=263, Unknown=0, NotChecked=0, Total=306 [2018-02-04 14:58:59,424 INFO L87 Difference]: Start difference. First operand 97 states and 114 transitions. Second operand 18 states. [2018-02-04 14:58:59,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:58:59,838 INFO L93 Difference]: Finished difference Result 131 states and 149 transitions. [2018-02-04 14:58:59,838 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-04 14:58:59,839 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 40 [2018-02-04 14:58:59,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:58:59,839 INFO L225 Difference]: With dead ends: 131 [2018-02-04 14:58:59,839 INFO L226 Difference]: Without dead ends: 126 [2018-02-04 14:58:59,839 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=144, Invalid=786, Unknown=0, NotChecked=0, Total=930 [2018-02-04 14:58:59,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-02-04 14:58:59,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 124. [2018-02-04 14:58:59,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-02-04 14:58:59,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 144 transitions. [2018-02-04 14:58:59,842 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 144 transitions. Word has length 40 [2018-02-04 14:58:59,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:58:59,842 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 144 transitions. [2018-02-04 14:58:59,842 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-02-04 14:58:59,842 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 144 transitions. [2018-02-04 14:58:59,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-02-04 14:58:59,842 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:58:59,843 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:58:59,843 INFO L371 AbstractCegarLoop]: === Iteration 25 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:58:59,843 INFO L82 PathProgramCache]: Analyzing trace with hash -643310578, now seen corresponding path program 1 times [2018-02-04 14:58:59,843 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:58:59,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:58:59,853 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:59:00,064 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:00,065 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:59:00,065 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18] total 18 [2018-02-04 14:59:00,065 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:59:00,065 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:00,065 INFO L182 omatonBuilderFactory]: Interpolants [6528#(and (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= 2 cstrncat_~s~0.offset)), 6529#(and (<= 2 cstrncat_~s~0.offset) (or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) |cstrncat_#t~short5|)), 6530#(and (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= 2 cstrncat_~s~0.offset)), 6512#true, 6513#false, 6514#(<= (+ main_~n~0 main_~length2~0) main_~length1~0), 6515#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= (+ main_~n~0 main_~length2~0) main_~length1~0) (= 0 |main_#t~malloc13.offset|)), 6516#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 6517#(and (= 0 main_~nondetString1~0.offset) (= 0 |main_#t~malloc14.offset|) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~length2~0 (select |#length| |main_#t~malloc14.base|)) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 6518#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 6519#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (<= (+ main_~n~0 main_~length2~0) (select |#length| main_~nondetString1~0.base))), 6520#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base)) (select |#length| main_~nondetString1~0.base))), 6521#(and (= 0 |cstrncat_#in~s1.offset|) (= 0 |cstrncat_#in~s2.offset|) (<= (+ (select |#length| |cstrncat_#in~s2.base|) |cstrncat_#in~n|) (select |#length| |cstrncat_#in~s1.base|))), 6522#(and (= 0 cstrncat_~s2.offset) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base)) (select |#length| cstrncat_~s~0.base)) (= cstrncat_~s~0.offset 0)), 6523#(and (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) |cstrncat_#t~post2.offset| 1) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset)) (= |cstrncat_#t~post2.offset| 0) (= cstrncat_~s~0.offset 0)), 6524#(and (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) 1) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset)) (= cstrncat_~s~0.offset 0)), 6525#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset 1) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset))), 6526#(and (<= (+ cstrncat_~n (select |#length| |cstrncat_#t~post2.base|) cstrncat_~s~0.offset 1) (+ (select |#length| cstrncat_~s~0.base) |cstrncat_#t~post2.offset|)) (<= 1 cstrncat_~s~0.offset)), 6527#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)))] [2018-02-04 14:59:00,065 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:00,066 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-04 14:59:00,066 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-04 14:59:00,066 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=297, Unknown=0, NotChecked=0, Total=342 [2018-02-04 14:59:00,066 INFO L87 Difference]: Start difference. First operand 124 states and 144 transitions. Second operand 19 states. [2018-02-04 14:59:00,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:59:00,468 INFO L93 Difference]: Finished difference Result 125 states and 143 transitions. [2018-02-04 14:59:00,468 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-04 14:59:00,468 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 40 [2018-02-04 14:59:00,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:59:00,468 INFO L225 Difference]: With dead ends: 125 [2018-02-04 14:59:00,468 INFO L226 Difference]: Without dead ends: 123 [2018-02-04 14:59:00,469 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 190 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=147, Invalid=845, Unknown=0, NotChecked=0, Total=992 [2018-02-04 14:59:00,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-02-04 14:59:00,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 122. [2018-02-04 14:59:00,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-02-04 14:59:00,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 140 transitions. [2018-02-04 14:59:00,470 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 140 transitions. Word has length 40 [2018-02-04 14:59:00,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:59:00,470 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 140 transitions. [2018-02-04 14:59:00,470 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-04 14:59:00,470 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 140 transitions. [2018-02-04 14:59:00,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-02-04 14:59:00,471 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:59:00,471 INFO L351 BasicCegarLoop]: trace histogram [8, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:59:00,471 INFO L371 AbstractCegarLoop]: === Iteration 26 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:59:00,471 INFO L82 PathProgramCache]: Analyzing trace with hash -1872610579, now seen corresponding path program 5 times [2018-02-04 14:59:00,471 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:59:00,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:59:00,483 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:59:01,672 WARN L146 SmtUtils]: Spent 340ms on a formula simplification. DAG size of input: 101 DAG size of output 60 [2018-02-04 14:59:02,066 WARN L146 SmtUtils]: Spent 270ms on a formula simplification. DAG size of input: 104 DAG size of output 63 [2018-02-04 14:59:02,721 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:02,721 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:59:02,721 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23] total 23 [2018-02-04 14:59:02,721 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:59:02,721 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:02,721 INFO L182 omatonBuilderFactory]: Interpolants [6816#(or (and (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= cstrncat_~s~0.offset 1) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) 2) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2)) (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1)))) (- 1)))) (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2))) (and (<= (+ cstrncat_~s~0.offset 1) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))))), 6817#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) (- 1))))) (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2))) (or (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))))) (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2)) (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 2)))) (- 1)))))), 6818#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 2)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2)) (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 2)))) (- 1)))))), 6819#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 2)) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 6820#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 2)) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) 2) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 6821#(or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 6822#(or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 6823#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))), 6824#(or (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 6825#(or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset)), 6826#(and (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= 0 cstrncat_~s~0.offset)), 6827#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))), 6804#true, 6805#false, 6806#(<= 1 main_~n~0), 6807#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (= 0 |main_#t~malloc13.offset|)), 6808#(and (or (<= (+ main_~nondetString1~0.offset main_~length1~0) (* 2 main_~n~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1)) (<= 1 main_~n~0) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (= main_~nondetString1~0.offset 0)), 6809#(and (or (<= (+ main_~nondetString1~0.offset main_~length1~0) (* 2 main_~n~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1)) (<= 1 main_~n~0) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (not (= main_~nondetString1~0.base |main_#t~malloc14.base|)) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~nondetString1~0.offset 0)), 6810#(and (or (<= (+ main_~nondetString1~0.offset main_~length1~0) (* 2 main_~n~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1)) (<= 1 main_~n~0) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 6811#(and (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0) (or (and (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 1) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) (+ main_~nondetString1~0.offset (- 1))))))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~nondetString1~0.offset)) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~n~0)) (<= 1 main_~n~0) (<= (+ (* 2 main_~n~0) 1) (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) 1)) (and (or (<= (+ main_~n~0 4) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) main_~nondetString1~0.offset)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) (+ main_~nondetString1~0.offset (- 1))))))) (<= (+ main_~n~0 3) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) main_~nondetString1~0.offset))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 5))) 2) 1) (+ main_~n~0 (select |#length| main_~nondetString1~0.base)))))), 6812#(and (= 0 |cstrncat_#in~s1.offset|) (or (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) 2))) (<= 1 (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) 2))) (and (<= 3 (div (select |#length| |cstrncat_#in~s1.base|) 2)) (or (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (select |#length| |cstrncat_#in~s1.base|) 2) (- 1)))) (<= 4 (div (select |#length| |cstrncat_#in~s1.base|) 2)))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) 1)) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)))) (<= 2 (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 3)) 2))) (and (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) 1) (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) (- 1))))) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (- (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 3)) 2)) (select |#length| |cstrncat_#in~s1.base|)) (- 1)))) (<= 1 (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 3)) 2))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) |cstrncat_#in~s1.offset|)))), 6813#(and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 1) (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (<= 1 (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) 1) (select |#length| cstrncat_~s~0.base))) (and (<= 3 (div (select |#length| cstrncat_~s~0.base) 2)) (or (<= 4 (div (select |#length| cstrncat_~s~0.base) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (select |#length| cstrncat_~s~0.base) 2) (- 1))))))) (= cstrncat_~s~0.offset 0)), 6814#(and (= cstrncat_~s~0.offset 0) (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 1) (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (<= 1 (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) 1) (select |#length| cstrncat_~s~0.base))) (and (<= 3 (div (select |#length| cstrncat_~s~0.base) 2)) (or (<= 4 (div (select |#length| cstrncat_~s~0.base) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (select |#length| cstrncat_~s~0.base) 2) (- 1)))))))), 6815#(or (and (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= cstrncat_~s~0.offset 1)) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) 2) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2)) (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1)))) (- 1)))) (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2))) (and (<= (+ cstrncat_~s~0.offset 1) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))))] [2018-02-04 14:59:02,722 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:02,722 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-02-04 14:59:02,722 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-02-04 14:59:02,722 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=476, Unknown=0, NotChecked=0, Total=552 [2018-02-04 14:59:02,722 INFO L87 Difference]: Start difference. First operand 122 states and 140 transitions. Second operand 24 states. [2018-02-04 14:59:03,055 WARN L146 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 102 DAG size of output 95 [2018-02-04 14:59:03,634 WARN L146 SmtUtils]: Spent 184ms on a formula simplification. DAG size of input: 116 DAG size of output 114 [2018-02-04 14:59:03,944 WARN L146 SmtUtils]: Spent 244ms on a formula simplification. DAG size of input: 110 DAG size of output 107 [2018-02-04 14:59:04,130 WARN L146 SmtUtils]: Spent 130ms on a formula simplification. DAG size of input: 113 DAG size of output 102 [2018-02-04 14:59:04,301 WARN L146 SmtUtils]: Spent 121ms on a formula simplification. DAG size of input: 109 DAG size of output 86 [2018-02-04 14:59:04,432 WARN L146 SmtUtils]: Spent 100ms on a formula simplification. DAG size of input: 87 DAG size of output 83 [2018-02-04 14:59:04,620 WARN L146 SmtUtils]: Spent 126ms on a formula simplification. DAG size of input: 94 DAG size of output 89 [2018-02-04 14:59:04,908 WARN L146 SmtUtils]: Spent 102ms on a formula simplification. DAG size of input: 83 DAG size of output 78 [2018-02-04 14:59:05,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:59:05,478 INFO L93 Difference]: Finished difference Result 185 states and 204 transitions. [2018-02-04 14:59:05,478 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-02-04 14:59:05,478 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 41 [2018-02-04 14:59:05,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:59:05,479 INFO L225 Difference]: With dead ends: 185 [2018-02-04 14:59:05,479 INFO L226 Difference]: Without dead ends: 177 [2018-02-04 14:59:05,479 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 410 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=277, Invalid=1615, Unknown=0, NotChecked=0, Total=1892 [2018-02-04 14:59:05,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-02-04 14:59:05,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 125. [2018-02-04 14:59:05,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-02-04 14:59:05,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 144 transitions. [2018-02-04 14:59:05,481 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 144 transitions. Word has length 41 [2018-02-04 14:59:05,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:59:05,481 INFO L432 AbstractCegarLoop]: Abstraction has 125 states and 144 transitions. [2018-02-04 14:59:05,481 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-02-04 14:59:05,481 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 144 transitions. [2018-02-04 14:59:05,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-02-04 14:59:05,481 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:59:05,481 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:59:05,481 INFO L371 AbstractCegarLoop]: === Iteration 27 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:59:05,481 INFO L82 PathProgramCache]: Analyzing trace with hash -154740261, now seen corresponding path program 1 times [2018-02-04 14:59:05,482 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:59:05,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:59:05,487 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:59:05,854 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 5 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:05,855 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:59:05,855 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22] total 22 [2018-02-04 14:59:05,855 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:59:05,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:05,855 INFO L182 omatonBuilderFactory]: Interpolants [7200#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base))), 7178#true, 7179#false, 7180#(<= 1 main_~n~0), 7181#(and (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 7182#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0) (= 0 |main_#t~malloc13.offset|)), 7183#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 7184#(and (= 0 main_~nondetString1~0.offset) (= 0 |main_#t~malloc14.offset|) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~length2~0 (select |#length| |main_#t~malloc14.base|)) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 7185#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 7186#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (<= 1 main_~n~0) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (<= (+ main_~n~0 main_~length2~0) (select |#length| main_~nondetString1~0.base))), 7187#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base)) (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0)), 7188#(and (= 0 |cstrncat_#in~s1.offset|) (= 0 |cstrncat_#in~s2.offset|) (<= (+ (select |#length| |cstrncat_#in~s2.base|) |cstrncat_#in~n|) (select |#length| |cstrncat_#in~s1.base|)) (<= 1 |cstrncat_#in~n|)), 7189#(and (<= 1 cstrncat_~n) (= 0 cstrncat_~s2.offset) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base)) (select |#length| cstrncat_~s~0.base)) (= cstrncat_~s~0.offset 0)), 7190#(and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) 1)) (= 0 cstrncat_~s2.offset)), 7191#(and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n |cstrncat_#t~post2.offset| (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset)) (= |cstrncat_#t~post2.offset| 0)), 7192#(and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset))), 7193#(and (<= 0 cstrncat_~n) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset))), 7194#(and (or (and (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n)) (not |cstrncat_#t~short5|)) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset))), 7195#(and (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset 1) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset))), 7196#(and (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n) (<= 0 cstrncat_~s~0.offset) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset 1) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset))), 7197#(and (<= 1 cstrncat_~s~0.offset) (<= 0 cstrncat_~n) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset 1) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset))), 7198#(and (<= 1 cstrncat_~s~0.offset) (<= (+ (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset 1) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset))), 7199#(and (<= 1 cstrncat_~s~0.offset) (<= (+ (select |#length| |cstrncat_#t~post2.base|) cstrncat_~s~0.offset 1) (+ (select |#length| cstrncat_~s~0.base) |cstrncat_#t~post2.offset|)))] [2018-02-04 14:59:05,855 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 5 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:05,856 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-02-04 14:59:05,856 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-02-04 14:59:05,856 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=431, Unknown=0, NotChecked=0, Total=506 [2018-02-04 14:59:05,856 INFO L87 Difference]: Start difference. First operand 125 states and 144 transitions. Second operand 23 states. [2018-02-04 14:59:06,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:59:06,325 INFO L93 Difference]: Finished difference Result 160 states and 180 transitions. [2018-02-04 14:59:06,325 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 14:59:06,325 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 43 [2018-02-04 14:59:06,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:59:06,326 INFO L225 Difference]: With dead ends: 160 [2018-02-04 14:59:06,326 INFO L226 Difference]: Without dead ends: 157 [2018-02-04 14:59:06,326 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 387 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=240, Invalid=1242, Unknown=0, NotChecked=0, Total=1482 [2018-02-04 14:59:06,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-02-04 14:59:06,328 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 150. [2018-02-04 14:59:06,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-02-04 14:59:06,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 172 transitions. [2018-02-04 14:59:06,328 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 172 transitions. Word has length 43 [2018-02-04 14:59:06,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:59:06,328 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 172 transitions. [2018-02-04 14:59:06,329 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-02-04 14:59:06,329 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 172 transitions. [2018-02-04 14:59:06,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-02-04 14:59:06,329 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:59:06,329 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:59:06,329 INFO L371 AbstractCegarLoop]: === Iteration 28 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:59:06,330 INFO L82 PathProgramCache]: Analyzing trace with hash -154731225, now seen corresponding path program 1 times [2018-02-04 14:59:06,330 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:59:06,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:59:06,338 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:59:06,572 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:06,572 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:59:06,572 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19] total 19 [2018-02-04 14:59:06,572 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:59:06,573 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:06,573 INFO L182 omatonBuilderFactory]: Interpolants [7552#(and (= 0 |cstrncat_#in~s1.offset|) (= 0 |cstrncat_#in~s2.offset|) (<= (+ (select |#length| |cstrncat_#in~s2.base|) |cstrncat_#in~n|) (select |#length| |cstrncat_#in~s1.base|))), 7553#(and (= 0 cstrncat_~s2.offset) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base)) (select |#length| cstrncat_~s~0.base)) (= cstrncat_~s~0.offset 0)), 7554#(and (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) 1)) (= 0 cstrncat_~s2.offset)), 7555#(and (<= (+ cstrncat_~n |cstrncat_#t~post2.offset| (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset)) (= |cstrncat_#t~post2.offset| 0)), 7556#(<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset)), 7557#(<= (+ cstrncat_~n (select |#length| |cstrncat_#t~post2.base|) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) |cstrncat_#t~post2.offset|)), 7558#(<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)), 7559#(and (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= 0 cstrncat_~s~0.offset)), 7560#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))), 7561#(and (<= 1 cstrncat_~s~0.offset) (or (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) |cstrncat_#t~short5|)), 7562#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))), 7543#true, 7544#false, 7545#(<= (+ main_~n~0 main_~length2~0) main_~length1~0), 7546#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= (+ main_~n~0 main_~length2~0) main_~length1~0) (= 0 |main_#t~malloc13.offset|)), 7547#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 7548#(and (= 0 main_~nondetString1~0.offset) (= 0 |main_#t~malloc14.offset|) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~length2~0 (select |#length| |main_#t~malloc14.base|)) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 7549#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 7550#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (<= (+ main_~n~0 main_~length2~0) (select |#length| main_~nondetString1~0.base))), 7551#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base)) (select |#length| main_~nondetString1~0.base)))] [2018-02-04 14:59:06,573 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:06,573 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 14:59:06,573 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 14:59:06,573 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=329, Unknown=0, NotChecked=0, Total=380 [2018-02-04 14:59:06,573 INFO L87 Difference]: Start difference. First operand 150 states and 172 transitions. Second operand 20 states. [2018-02-04 14:59:06,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:59:06,939 INFO L93 Difference]: Finished difference Result 155 states and 175 transitions. [2018-02-04 14:59:06,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-02-04 14:59:06,940 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 43 [2018-02-04 14:59:06,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:59:06,940 INFO L225 Difference]: With dead ends: 155 [2018-02-04 14:59:06,940 INFO L226 Difference]: Without dead ends: 151 [2018-02-04 14:59:06,941 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 330 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=219, Invalid=1187, Unknown=0, NotChecked=0, Total=1406 [2018-02-04 14:59:06,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-02-04 14:59:06,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 125. [2018-02-04 14:59:06,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-02-04 14:59:06,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 144 transitions. [2018-02-04 14:59:06,943 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 144 transitions. Word has length 43 [2018-02-04 14:59:06,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:59:06,943 INFO L432 AbstractCegarLoop]: Abstraction has 125 states and 144 transitions. [2018-02-04 14:59:06,943 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 14:59:06,943 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 144 transitions. [2018-02-04 14:59:06,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-02-04 14:59:06,944 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:59:06,944 INFO L351 BasicCegarLoop]: trace histogram [9, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:59:06,944 INFO L371 AbstractCegarLoop]: === Iteration 29 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:59:06,944 INFO L82 PathProgramCache]: Analyzing trace with hash 388447476, now seen corresponding path program 6 times [2018-02-04 14:59:06,945 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:59:06,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:59:06,962 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:59:07,477 WARN L146 SmtUtils]: Spent 172ms on a formula simplification. DAG size of input: 111 DAG size of output 80 [2018-02-04 14:59:07,806 WARN L146 SmtUtils]: Spent 102ms on a formula simplification. DAG size of input: 79 DAG size of output 54 [2018-02-04 14:59:07,949 WARN L146 SmtUtils]: Spent 121ms on a formula simplification. DAG size of input: 93 DAG size of output 59 [2018-02-04 14:59:08,079 WARN L146 SmtUtils]: Spent 107ms on a formula simplification. DAG size of input: 96 DAG size of output 62 [2018-02-04 14:59:08,616 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:08,616 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:59:08,616 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24] total 24 [2018-02-04 14:59:08,616 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:59:08,616 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:08,616 INFO L182 omatonBuilderFactory]: Interpolants [7879#true, 7880#false, 7881#(<= 1 main_~n~0), 7882#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (= 0 |main_#t~malloc13.offset|)), 7883#(and (or (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (= 0 main_~nondetString1~0.offset) (= (select |#valid| main_~nondetString1~0.base) 1)), 7884#(and (or (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (= 0 main_~nondetString1~0.offset) (not (= main_~nondetString1~0.base |main_#t~malloc14.base|))), 7885#(and (or (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (= 0 main_~nondetString1~0.offset) (not (= main_~nondetString1~0.base main_~nondetString2~0.base))), 7886#(and (= 0 main_~nondetString1~0.offset) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (or (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (- main_~nondetString1~0.offset) 3)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 4 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~nondetString1~0.offset)) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (+ main_~nondetString1~0.offset (- 1)))))) (<= 6 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) 1)) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (- main_~nondetString1~0.offset) 4)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 5 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (or (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ main_~nondetString1~0.offset (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)))))) (<= 9 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (<= 8 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (<= 7 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (- main_~nondetString1~0.offset) 5)) (+ main_~nondetString1~0.offset (- 1))))))))), 7887#(and (= 0 |cstrncat_#in~s1.offset|) (or (and (or (<= 9 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1))))) (<= 8 (select |#length| |cstrncat_#in~s1.base|))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) 1)) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ 3 (- 1)))) (<= 4 (select |#length| |cstrncat_#in~s1.base|))) (and (<= 7 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ 5 (- 1))))) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)))) (<= 6 (select |#length| |cstrncat_#in~s1.base|))) (and (<= 5 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ 4 (- 1))))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) |cstrncat_#in~s1.offset|)))), 7888#(and (= cstrncat_~s~0.offset 0) (or (and (<= 8 (select |#length| cstrncat_~s~0.base)) (or (<= 9 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= 6 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ 3 (- 1)))) (<= 4 (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrncat_~s~0.base))) (and (<= 7 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ 5 (- 1))))))), 7889#(and (or (and (<= 8 (select |#length| cstrncat_~s~0.base)) (or (<= 9 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))))) (and (<= 6 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ 3 (- 1)))) (<= 4 (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ 4 (- 1)))) (<= 5 (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= 7 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ 5 (- 1)))))) (= cstrncat_~s~0.offset 0)), 7890#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= cstrncat_~s~0.offset 1)) (and (<= 1 cstrncat_~s~0.offset) (or (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base))))))), 7891#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= cstrncat_~s~0.offset 1) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= 1 cstrncat_~s~0.offset) (or (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 4) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base))))))), 7892#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (or (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)))) (<= 2 cstrncat_~s~0.offset))), 7893#(or (and (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (or (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)))) (<= 2 cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 7894#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= 3 cstrncat_~s~0.offset) (or (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))))))), 7895#(or (and (<= 3 cstrncat_~s~0.offset) (or (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 7896#(and (<= 4 cstrncat_~s~0.offset) (or (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))))), 7897#(and (<= 4 cstrncat_~s~0.offset) (or (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))))), 7898#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (<= 5 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)))), 7899#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (<= 5 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)))), 7900#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= 6 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)))), 7901#(or (and (<= 6 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 7902#(and (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= 7 cstrncat_~s~0.offset)), 7903#(and (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= 8 cstrncat_~s~0.offset))] [2018-02-04 14:59:08,617 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:08,617 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-02-04 14:59:08,617 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-02-04 14:59:08,617 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=545, Unknown=0, NotChecked=0, Total=600 [2018-02-04 14:59:08,617 INFO L87 Difference]: Start difference. First operand 125 states and 144 transitions. Second operand 25 states. [2018-02-04 14:59:10,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:59:10,102 INFO L93 Difference]: Finished difference Result 188 states and 213 transitions. [2018-02-04 14:59:10,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-02-04 14:59:10,102 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 44 [2018-02-04 14:59:10,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:59:10,103 INFO L225 Difference]: With dead ends: 188 [2018-02-04 14:59:10,103 INFO L226 Difference]: Without dead ends: 184 [2018-02-04 14:59:10,103 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 397 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=165, Invalid=1815, Unknown=0, NotChecked=0, Total=1980 [2018-02-04 14:59:10,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-02-04 14:59:10,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 128. [2018-02-04 14:59:10,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-02-04 14:59:10,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 148 transitions. [2018-02-04 14:59:10,105 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 148 transitions. Word has length 44 [2018-02-04 14:59:10,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:59:10,105 INFO L432 AbstractCegarLoop]: Abstraction has 128 states and 148 transitions. [2018-02-04 14:59:10,105 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-02-04 14:59:10,105 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 148 transitions. [2018-02-04 14:59:10,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-02-04 14:59:10,105 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:59:10,105 INFO L351 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:59:10,105 INFO L371 AbstractCegarLoop]: === Iteration 30 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:59:10,106 INFO L82 PathProgramCache]: Analyzing trace with hash 1876668109, now seen corresponding path program 3 times [2018-02-04 14:59:10,106 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:59:10,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:59:10,112 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:59:10,315 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 14:59:10,315 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:59:10,315 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17] total 17 [2018-02-04 14:59:10,315 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:59:10,316 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:10,316 INFO L182 omatonBuilderFactory]: Interpolants [8260#true, 8261#false, 8262#(= (select |#valid| |main_#t~malloc13.base|) 1), 8263#(= (select |#valid| main_~nondetString1~0.base) 1), 8264#(and (not (= main_~nondetString1~0.base |main_#t~malloc14.base|)) (= 0 |main_#t~malloc14.offset|) (= main_~length2~0 (select |#length| |main_#t~malloc14.base|))), 8265#(and (= main_~nondetString2~0.offset 0) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~length2~0 (select |#length| main_~nondetString2~0.base))), 8266#(and (= main_~nondetString2~0.offset 0) (= 0 (select (select |#memory_int| main_~nondetString2~0.base) (+ (select |#length| main_~nondetString2~0.base) (+ main_~nondetString2~0.offset (- 1))))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base))), 8267#(and (not (= |cstrncat_#in~s1.base| |cstrncat_#in~s2.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s2.base|) (+ (select |#length| |cstrncat_#in~s2.base|) (- 1))))), 8268#(and (= 0 (select (select |#memory_int| cstrncat_~s2.base) (+ (select |#length| cstrncat_~s2.base) (- 1)))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 8269#(and (= |cstrncat_#t~post2.base| cstrncat_~s2.base) (= 0 (select (select |#memory_int| |cstrncat_#t~post2.base|) (+ (select |#length| cstrncat_~s2.base) (- 1)))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 8270#(and (not (= |cstrncat_#t~post2.base| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s2.base) (+ (select |#length| cstrncat_~s2.base) (- 1)))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 8271#(= 0 (select (select (store |#memory_int| cstrncat_~s~0.base (store (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset |cstrncat_#t~mem4|)) cstrncat_~s2.base) (+ (select |#length| cstrncat_~s2.base) (- 1)))), 8272#(= 0 (select (select |#memory_int| cstrncat_~s2.base) (+ (select |#length| cstrncat_~s2.base) (- 1)))), 8273#(or (and (<= (+ |cstrncat_#t~post2.offset| 1) cstrncat_~s2.offset) (or (<= (select |#length| |cstrncat_#t~post2.base|) |cstrncat_#t~post2.offset|) (<= (+ cstrncat_~s2.offset 1) (select |#length| cstrncat_~s2.base)))) (= 0 (select (select |#memory_int| |cstrncat_#t~post2.base|) |cstrncat_#t~post2.offset|))), 8274#(or (and (<= 1 cstrncat_~s2.offset) (<= (+ cstrncat_~s2.offset 1) (select |#length| cstrncat_~s2.base))) (= 0 |cstrncat_#t~mem4|)), 8275#(or (and (<= 1 cstrncat_~s2.offset) (<= (+ cstrncat_~s2.offset 1) (select |#length| cstrncat_~s2.base))) (not |cstrncat_#t~short5|)), 8276#(and (<= 1 cstrncat_~s2.offset) (<= (+ cstrncat_~s2.offset 1) (select |#length| cstrncat_~s2.base))), 8277#(and (<= (+ |cstrncat_#t~post2.offset| 1) (select |#length| |cstrncat_#t~post2.base|)) (<= 1 |cstrncat_#t~post2.offset|))] [2018-02-04 14:59:10,316 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 14:59:10,316 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-02-04 14:59:10,316 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-02-04 14:59:10,316 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=262, Unknown=0, NotChecked=0, Total=306 [2018-02-04 14:59:10,316 INFO L87 Difference]: Start difference. First operand 128 states and 148 transitions. Second operand 18 states. [2018-02-04 14:59:10,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:59:10,722 INFO L93 Difference]: Finished difference Result 139 states and 155 transitions. [2018-02-04 14:59:10,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 14:59:10,723 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 46 [2018-02-04 14:59:10,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:59:10,723 INFO L225 Difference]: With dead ends: 139 [2018-02-04 14:59:10,723 INFO L226 Difference]: Without dead ends: 114 [2018-02-04 14:59:10,723 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 130 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=173, Invalid=819, Unknown=0, NotChecked=0, Total=992 [2018-02-04 14:59:10,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-02-04 14:59:10,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 77. [2018-02-04 14:59:10,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-02-04 14:59:10,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 87 transitions. [2018-02-04 14:59:10,724 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 87 transitions. Word has length 46 [2018-02-04 14:59:10,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:59:10,725 INFO L432 AbstractCegarLoop]: Abstraction has 77 states and 87 transitions. [2018-02-04 14:59:10,725 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-02-04 14:59:10,725 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 87 transitions. [2018-02-04 14:59:10,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-02-04 14:59:10,725 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:59:10,725 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:59:10,725 INFO L371 AbstractCegarLoop]: === Iteration 31 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:59:10,725 INFO L82 PathProgramCache]: Analyzing trace with hash -531401182, now seen corresponding path program 2 times [2018-02-04 14:59:10,725 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:59:10,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:59:10,730 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:59:11,068 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 3 proven. 23 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:11,068 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:59:11,068 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21] total 21 [2018-02-04 14:59:11,068 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:59:11,068 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:11,068 INFO L182 omatonBuilderFactory]: Interpolants [8522#true, 8523#false, 8524#(<= 1 main_~n~0), 8525#(and (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 8526#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0) (= 0 |main_#t~malloc13.offset|)), 8527#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 8528#(and (= 0 main_~nondetString1~0.offset) (= 0 |main_#t~malloc14.offset|) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~length2~0 (select |#length| |main_#t~malloc14.base|)) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 8529#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 8530#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (<= 1 main_~n~0) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (<= (+ main_~n~0 main_~length2~0) (select |#length| main_~nondetString1~0.base))), 8531#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base)) (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0)), 8532#(and (= 0 |cstrncat_#in~s1.offset|) (= 0 |cstrncat_#in~s2.offset|) (<= (+ (select |#length| |cstrncat_#in~s2.base|) |cstrncat_#in~n|) (select |#length| |cstrncat_#in~s1.base|)) (<= 1 |cstrncat_#in~n|)), 8533#(and (<= 1 cstrncat_~n) (= 0 cstrncat_~s2.offset) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base)) (select |#length| cstrncat_~s~0.base)) (= cstrncat_~s~0.offset 0)), 8534#(and (<= 1 cstrncat_~n) (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) 1)) (= 0 cstrncat_~s2.offset)), 8535#(and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) 2)) (= 0 cstrncat_~s2.offset) (<= 2 cstrncat_~s~0.offset)), 8536#(and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n |cstrncat_#t~post2.offset| (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset 1)) (= |cstrncat_#t~post2.offset| 0) (<= 2 cstrncat_~s~0.offset)), 8537#(and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset 1)) (<= 2 cstrncat_~s~0.offset)), 8538#(and (or (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset 1)) (<= cstrncat_~n 0)) (<= 3 cstrncat_~s~0.offset) (<= 0 cstrncat_~n)), 8539#(or (not |cstrncat_#t~short5|) (and (<= 3 cstrncat_~s~0.offset) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset 1)) (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n))), 8540#(and (<= 3 cstrncat_~s~0.offset) (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset))), 8541#(and (<= 4 cstrncat_~s~0.offset) (<= (+ (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset))), 8542#(and (<= 4 cstrncat_~s~0.offset) (<= (+ (select |#length| |cstrncat_#t~post2.base|) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) |cstrncat_#t~post2.offset|))), 8543#(and (<= 4 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)))] [2018-02-04 14:59:11,068 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 3 proven. 23 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:11,069 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-04 14:59:11,069 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-04 14:59:11,069 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=403, Unknown=0, NotChecked=0, Total=462 [2018-02-04 14:59:11,069 INFO L87 Difference]: Start difference. First operand 77 states and 87 transitions. Second operand 22 states. [2018-02-04 14:59:11,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:59:11,595 INFO L93 Difference]: Finished difference Result 106 states and 116 transitions. [2018-02-04 14:59:11,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-02-04 14:59:11,595 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 46 [2018-02-04 14:59:11,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:59:11,596 INFO L225 Difference]: With dead ends: 106 [2018-02-04 14:59:11,596 INFO L226 Difference]: Without dead ends: 101 [2018-02-04 14:59:11,596 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 347 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=201, Invalid=1281, Unknown=0, NotChecked=0, Total=1482 [2018-02-04 14:59:11,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-02-04 14:59:11,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 96. [2018-02-04 14:59:11,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-02-04 14:59:11,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 107 transitions. [2018-02-04 14:59:11,597 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 107 transitions. Word has length 46 [2018-02-04 14:59:11,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:59:11,597 INFO L432 AbstractCegarLoop]: Abstraction has 96 states and 107 transitions. [2018-02-04 14:59:11,597 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-04 14:59:11,597 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 107 transitions. [2018-02-04 14:59:11,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-02-04 14:59:11,598 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:59:11,598 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:59:11,598 INFO L371 AbstractCegarLoop]: === Iteration 32 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:59:11,598 INFO L82 PathProgramCache]: Analyzing trace with hash -531392146, now seen corresponding path program 2 times [2018-02-04 14:59:11,598 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:59:11,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:59:11,606 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:59:12,099 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 19 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:12,099 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:59:12,100 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21] total 21 [2018-02-04 14:59:12,100 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:59:12,100 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:12,100 INFO L182 omatonBuilderFactory]: Interpolants [8800#(and (<= 4 cstrncat_~s~0.offset) (or (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) |cstrncat_#t~short5|)), 8801#(and (<= 4 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))), 8780#true, 8781#false, 8782#(<= (+ main_~n~0 main_~length2~0) main_~length1~0), 8783#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= (+ main_~n~0 main_~length2~0) main_~length1~0) (= 0 |main_#t~malloc13.offset|)), 8784#(and (= (select |#valid| main_~nondetString1~0.base) 1) (or (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (or (< (+ main_~n~0 1) (+ main_~nondetString1~0.offset main_~length1~0)) (<= (+ main_~n~0 main_~length2~0) main_~length1~0))) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (= main_~nondetString1~0.offset 0)), 8785#(and (or (and (= 0 |main_#t~malloc14.offset|) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~length2~0 (select |#length| |main_#t~malloc14.base|)) (or (< (+ main_~n~0 1) (+ main_~nondetString1~0.offset main_~length1~0)) (<= (+ main_~n~0 main_~length2~0) main_~length1~0))) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (not (= main_~nondetString1~0.base |main_#t~malloc14.base|)) (= main_~nondetString1~0.offset 0)), 8786#(and (or (and (= 0 main_~nondetString2~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (or (< (+ main_~n~0 1) (+ main_~nondetString1~0.offset main_~length1~0)) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)) (= main_~length2~0 (select |#length| main_~nondetString2~0.base))) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 8787#(and (or (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) 1)) (and (= 0 main_~nondetString2~0.offset) (or (<= (+ main_~n~0 3) (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (<= (+ main_~length2~0 main_~nondetString1~0.offset) 1)) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 8788#(and (or (and (= 0 main_~nondetString2~0.offset) (or (<= (+ main_~n~0 3) (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (<= (+ (select |#length| main_~nondetString2~0.base) main_~nondetString1~0.offset) 1))) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) 1))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 8789#(and (= 0 |cstrncat_#in~s1.offset|) (or (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) 1)) (and (= 0 |cstrncat_#in~s2.offset|) (or (<= (select |#length| |cstrncat_#in~s2.base|) 1) (<= (+ |cstrncat_#in~n| 3) (select |#length| |cstrncat_#in~s1.base|))))) (not (= |cstrncat_#in~s1.base| |cstrncat_#in~s2.base|))), 8790#(and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (= 0 cstrncat_~s2.offset) (or (<= (+ cstrncat_~n 3) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) 1)))) (= cstrncat_~s~0.offset 0) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 8791#(and (<= 1 cstrncat_~s~0.offset) (or (and (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) 1)) (= 0 cstrncat_~s2.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= 1 cstrncat_~s~0.offset))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 8792#(and (<= 1 cstrncat_~s~0.offset) (or (and (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) 1)) (= 0 cstrncat_~s2.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= 1 cstrncat_~s~0.offset) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 8793#(and (or (<= (select |#length| cstrncat_~s2.base) 1) (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))) (= 0 cstrncat_~s2.offset) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (<= 2 cstrncat_~s~0.offset)), 8794#(and (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= (+ |cstrncat_#t~post2.offset| (select |#length| cstrncat_~s2.base)) cstrncat_~s2.offset)) (not (= |cstrncat_#t~post2.base| cstrncat_~s~0.base)) (= |cstrncat_#t~post2.offset| 0) (<= 2 cstrncat_~s~0.offset)), 8795#(and (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset)) (<= 2 cstrncat_~s~0.offset)), 8796#(and (<= 3 cstrncat_~s~0.offset) (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset))), 8797#(and (<= 3 cstrncat_~s~0.offset) (or (<= (select |#length| |cstrncat_#t~post2.base|) |cstrncat_#t~post2.offset|) (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)))), 8798#(and (<= 3 cstrncat_~s~0.offset) (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))), 8799#(and (<= 4 cstrncat_~s~0.offset) (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)))] [2018-02-04 14:59:12,100 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 5 proven. 19 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:12,100 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-04 14:59:12,100 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-04 14:59:12,100 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=408, Unknown=0, NotChecked=0, Total=462 [2018-02-04 14:59:12,101 INFO L87 Difference]: Start difference. First operand 96 states and 107 transitions. Second operand 22 states. [2018-02-04 14:59:12,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:59:12,843 INFO L93 Difference]: Finished difference Result 117 states and 127 transitions. [2018-02-04 14:59:12,843 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-02-04 14:59:12,843 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 46 [2018-02-04 14:59:12,843 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:59:12,843 INFO L225 Difference]: With dead ends: 117 [2018-02-04 14:59:12,843 INFO L226 Difference]: Without dead ends: 94 [2018-02-04 14:59:12,844 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 202 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=170, Invalid=1162, Unknown=0, NotChecked=0, Total=1332 [2018-02-04 14:59:12,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-02-04 14:59:12,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 77. [2018-02-04 14:59:12,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-02-04 14:59:12,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 86 transitions. [2018-02-04 14:59:12,845 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 86 transitions. Word has length 46 [2018-02-04 14:59:12,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:59:12,845 INFO L432 AbstractCegarLoop]: Abstraction has 77 states and 86 transitions. [2018-02-04 14:59:12,845 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-04 14:59:12,845 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 86 transitions. [2018-02-04 14:59:12,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-02-04 14:59:12,845 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:59:12,845 INFO L351 BasicCegarLoop]: trace histogram [10, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:59:12,845 INFO L371 AbstractCegarLoop]: === Iteration 33 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:59:12,846 INFO L82 PathProgramCache]: Analyzing trace with hash 1596860813, now seen corresponding path program 7 times [2018-02-04 14:59:12,846 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:59:12,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:59:12,863 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:59:13,671 WARN L146 SmtUtils]: Spent 197ms on a formula simplification. DAG size of input: 151 DAG size of output 99 [2018-02-04 14:59:13,870 WARN L146 SmtUtils]: Spent 173ms on a formula simplification. DAG size of input: 135 DAG size of output 92 [2018-02-04 14:59:14,069 WARN L146 SmtUtils]: Spent 159ms on a formula simplification. DAG size of input: 126 DAG size of output 62 [2018-02-04 14:59:14,258 WARN L146 SmtUtils]: Spent 162ms on a formula simplification. DAG size of input: 126 DAG size of output 62 [2018-02-04 14:59:14,446 WARN L146 SmtUtils]: Spent 154ms on a formula simplification. DAG size of input: 129 DAG size of output 65 [2018-02-04 14:59:14,692 WARN L146 SmtUtils]: Spent 188ms on a formula simplification. DAG size of input: 148 DAG size of output 71 [2018-02-04 14:59:14,943 WARN L146 SmtUtils]: Spent 195ms on a formula simplification. DAG size of input: 151 DAG size of output 74 [2018-02-04 14:59:15,283 WARN L146 SmtUtils]: Spent 267ms on a formula simplification. DAG size of input: 132 DAG size of output 78 [2018-02-04 14:59:15,612 WARN L146 SmtUtils]: Spent 251ms on a formula simplification. DAG size of input: 135 DAG size of output 75 [2018-02-04 14:59:15,849 WARN L146 SmtUtils]: Spent 155ms on a formula simplification. DAG size of input: 127 DAG size of output 57 [2018-02-04 14:59:16,073 WARN L146 SmtUtils]: Spent 157ms on a formula simplification. DAG size of input: 130 DAG size of output 60 [2018-02-04 14:59:16,503 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:16,504 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:59:16,504 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30] total 30 [2018-02-04 14:59:16,504 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:59:16,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:16,504 INFO L182 omatonBuilderFactory]: Interpolants [9026#true, 9027#false, 9028#(<= 1 main_~length2~0), 9029#(and (<= 1 main_~length2~0) (<= 1 main_~n~0)), 9030#(and (<= 1 main_~length2~0) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 9031#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (<= 1 main_~length2~0) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0) (= 0 |main_#t~malloc13.offset|)), 9032#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (or (<= 1 main_~n~0) (<= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (or (< (+ main_~n~0 2) (+ main_~nondetString1~0.offset main_~length1~0)) (and (<= 1 main_~length2~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (= main_~nondetString1~0.offset 0)), 9033#(and (not (= main_~nondetString1~0.base |main_#t~malloc14.base|)) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (or (<= 1 main_~n~0) (<= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (or (< (+ main_~n~0 2) (+ main_~nondetString1~0.offset main_~length1~0)) (and (= 0 |main_#t~malloc14.offset|) (<= 1 main_~length2~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (= main_~nondetString1~0.offset 0)), 9034#(and (or (< (+ main_~n~0 2) (+ main_~nondetString1~0.offset main_~length1~0)) (and (= main_~nondetString2~0.offset 0) (= 1 (+ main_~nondetString2~0.offset main_~length2~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~nondetString2~0.offset main_~n~0 main_~length2~0))) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (or (<= 1 main_~n~0) (<= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 9035#(and (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (or (and (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 1) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (+ main_~nondetString1~0.offset (- 1))))))) (and (= main_~nondetString2~0.offset 0) (= 1 (+ main_~nondetString2~0.offset main_~length2~0)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~nondetString1~0.offset))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 5))) 2) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 5))) 2) 2) (+ main_~n~0 (select |#length| main_~nondetString1~0.base)))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) 1)) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (- main_~nondetString1~0.offset) 3)) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 3) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) main_~nondetString1~0.offset))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 2) (+ main_~n~0 (select |#length| main_~nondetString1~0.base)))) (and (or (<= (+ main_~n~0 5) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) main_~nondetString1~0.offset)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) (+ main_~nondetString1~0.offset (- 1))))))) (<= (+ main_~n~0 4) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) main_~nondetString1~0.offset))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~n~0)) (<= 2 main_~n~0) (<= (+ (* 2 main_~n~0) 1) (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))))) (= main_~nondetString1~0.offset 0)), 9036#(and (or (and (or (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 5))) 2) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 5))) 2) 3) (+ main_~n~0 (select |#length| main_~nondetString1~0.base)))) (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 5))) 2) 2) (+ main_~n~0 (select |#length| main_~nondetString1~0.base)))) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) 1)) (and (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 1) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (+ main_~nondetString1~0.offset (- 1))))))) (and (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 2) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) (+ main_~nondetString1~0.offset (- 1))))))) (and (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (- main_~nondetString1~0.offset) 3)) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 3) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) main_~nondetString1~0.offset))) (and (<= (+ main_~n~0 4) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) main_~nondetString1~0.offset)) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) (+ main_~nondetString1~0.offset (- 1))))))) (and (= main_~nondetString2~0.offset 0) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) main_~nondetString1~0.offset))) (and (= 0 (select (select |#memory_int| main_~nondetString1~0.base) main_~n~0)) (<= 2 main_~n~0) (<= (+ (* 2 main_~n~0) 1) (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 9037#(and (= 0 |cstrncat_#in~s1.offset|) (or (and (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) 2) (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) (- 1))))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) 1)) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (select |#length| |cstrncat_#in~s1.base|) 2) (- 1)))) (<= 4 (div (select |#length| |cstrncat_#in~s1.base|) 2))) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ 3 (- 1)))) (<= 3 (div (select |#length| |cstrncat_#in~s1.base|) 2))) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) 2))) (<= 2 (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) 2))) (and (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) 1) (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1))))) (and (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 5) 2) 2) (select |#length| |cstrncat_#in~s1.base|)) (or (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 5) 2) (- 1)))) (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 5) 2) 3) (select |#length| |cstrncat_#in~s1.base|)))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) |cstrncat_#in~s1.offset|)))), 9038#(and (or (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2))) (<= 2 (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (<= 3 (div (select |#length| cstrncat_~s~0.base) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ 3 (- 1))))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) 2) (select |#length| cstrncat_~s~0.base)) (or (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) (- 1)))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 2) (select |#length| cstrncat_~s~0.base))) (and (<= 4 (div (select |#length| cstrncat_~s~0.base) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (select |#length| cstrncat_~s~0.base) 2) (- 1)))))) (= cstrncat_~s~0.offset 0)), 9039#(and (or (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2))) (<= 2 (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (<= 3 (div (select |#length| cstrncat_~s~0.base) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ 3 (- 1))))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) 2) (select |#length| cstrncat_~s~0.base)) (or (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) (- 1)))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 2) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= 4 (div (select |#length| cstrncat_~s~0.base) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (select |#length| cstrncat_~s~0.base) 2) (- 1)))))) (= cstrncat_~s~0.offset 0)), 9040#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= cstrncat_~s~0.offset 1)) (and (or (and (<= cstrncat_~s~0.offset (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrncat_~s~0.offset 1) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 2))) 2))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 2))) 2)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) 2) (select |#length| cstrncat_~s~0.base))) (and (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 4)) 2) 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 4)) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) 1) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2))) (and (<= (+ cstrncat_~s~0.offset 3) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 4) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2))))), 9041#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= cstrncat_~s~0.offset 1) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (or (and (<= cstrncat_~s~0.offset (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrncat_~s~0.offset 1) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 2))) 2))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 2))) 2)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) 2) (select |#length| cstrncat_~s~0.base))) (and (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 4)) 2) 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 4)) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) 1) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2))) (and (<= (+ cstrncat_~s~0.offset 3) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 4) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2))))), 9042#(or (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) (- 1))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2)) (- 2)))) (- 1)))) (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2)) (- 1)))) (- 1)))) (<= (+ cstrncat_~s~0.offset 1) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2))) (or (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) 2) 3) (select |#length| cstrncat_~s~0.base)) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))))), 9043#(or (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2)) (- 2)))) (- 1)))) (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) (- 1))))) (and (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (- 2)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2)) (- 1)))) (- 1)))) (<= (+ cstrncat_~s~0.offset 1) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) 2) 3) (select |#length| cstrncat_~s~0.base))), 9044#(or (and (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) 2) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) 3) (select |#length| cstrncat_~s~0.base)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ (div (+ cstrncat_~s~0.offset (select |#length| cstrncat_~s~0.base)) 2) 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (select |#length| cstrncat_~s~0.base)) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 2))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2)) (- 3)))) (- 1)))))), 9045#(or (and (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) 2) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) 3) (select |#length| cstrncat_~s~0.base)))) (and (<= (+ (div (+ cstrncat_~s~0.offset (select |#length| cstrncat_~s~0.base)) 2) 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (select |#length| cstrncat_~s~0.base)) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2)) (- 3)))) (- 1)))))), 9046#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 2)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 9047#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 2)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 3)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 9048#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3))), 9049#(or (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 9050#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))), 9051#(or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 9052#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))), 9053#(or (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 9054#(or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset)), 9055#(and (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= 0 cstrncat_~s~0.offset)), 9056#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)))] [2018-02-04 14:59:16,505 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:16,505 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-02-04 14:59:16,505 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-02-04 14:59:16,505 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=810, Unknown=0, NotChecked=0, Total=930 [2018-02-04 14:59:16,505 INFO L87 Difference]: Start difference. First operand 77 states and 86 transitions. Second operand 31 states. [2018-02-04 14:59:16,898 WARN L146 SmtUtils]: Spent 160ms on a formula simplification. DAG size of input: 134 DAG size of output 124 [2018-02-04 14:59:17,628 WARN L146 SmtUtils]: Spent 240ms on a formula simplification. DAG size of input: 131 DAG size of output 129 [2018-02-04 14:59:17,908 WARN L146 SmtUtils]: Spent 209ms on a formula simplification. DAG size of input: 136 DAG size of output 132 [2018-02-04 14:59:18,143 WARN L146 SmtUtils]: Spent 194ms on a formula simplification. DAG size of input: 141 DAG size of output 132 [2018-02-04 14:59:18,344 WARN L146 SmtUtils]: Spent 132ms on a formula simplification. DAG size of input: 121 DAG size of output 105 [2018-02-04 14:59:18,555 WARN L146 SmtUtils]: Spent 164ms on a formula simplification. DAG size of input: 138 DAG size of output 120 [2018-02-04 14:59:18,755 WARN L146 SmtUtils]: Spent 117ms on a formula simplification. DAG size of input: 103 DAG size of output 98 [2018-02-04 14:59:18,981 WARN L146 SmtUtils]: Spent 186ms on a formula simplification. DAG size of input: 113 DAG size of output 107 [2018-02-04 14:59:19,133 WARN L146 SmtUtils]: Spent 114ms on a formula simplification. DAG size of input: 92 DAG size of output 86 [2018-02-04 14:59:19,387 WARN L146 SmtUtils]: Spent 164ms on a formula simplification. DAG size of input: 95 DAG size of output 89 [2018-02-04 14:59:19,699 WARN L146 SmtUtils]: Spent 136ms on a formula simplification. DAG size of input: 88 DAG size of output 83 [2018-02-04 14:59:19,833 WARN L146 SmtUtils]: Spent 100ms on a formula simplification. DAG size of input: 78 DAG size of output 74 [2018-02-04 14:59:20,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:59:20,292 INFO L93 Difference]: Finished difference Result 139 states and 150 transitions. [2018-02-04 14:59:20,292 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-02-04 14:59:20,292 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 47 [2018-02-04 14:59:20,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:59:20,293 INFO L225 Difference]: With dead ends: 139 [2018-02-04 14:59:20,293 INFO L226 Difference]: Without dead ends: 131 [2018-02-04 14:59:20,294 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 707 ImplicationChecksByTransitivity, 6.4s TimeCoverageRelationStatistics Valid=420, Invalid=2442, Unknown=0, NotChecked=0, Total=2862 [2018-02-04 14:59:20,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-02-04 14:59:20,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 80. [2018-02-04 14:59:20,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-02-04 14:59:20,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 90 transitions. [2018-02-04 14:59:20,295 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 90 transitions. Word has length 47 [2018-02-04 14:59:20,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:59:20,296 INFO L432 AbstractCegarLoop]: Abstraction has 80 states and 90 transitions. [2018-02-04 14:59:20,296 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-02-04 14:59:20,296 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 90 transitions. [2018-02-04 14:59:20,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-02-04 14:59:20,296 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:59:20,296 INFO L351 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:59:20,297 INFO L371 AbstractCegarLoop]: === Iteration 34 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:59:20,297 INFO L82 PathProgramCache]: Analyzing trace with hash 1112645755, now seen corresponding path program 3 times [2018-02-04 14:59:20,297 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:59:20,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:59:20,306 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:59:20,722 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 3 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:20,722 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:59:20,722 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24] total 24 [2018-02-04 14:59:20,722 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:59:20,722 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:20,722 INFO L182 omatonBuilderFactory]: Interpolants [9344#(and (<= 1 cstrncat_~s~0.offset) (or (not |cstrncat_#t~short5|) (<= (+ (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset)))), 9345#(and (<= 1 cstrncat_~s~0.offset) (<= (+ (select |#length| |cstrncat_#t~post2.base|) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) |cstrncat_#t~post2.offset|))), 9346#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))), 9322#true, 9323#false, 9324#(<= 1 main_~n~0), 9325#(and (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 9326#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0) (= 0 |main_#t~malloc13.offset|)), 9327#(and (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 9328#(and (= 0 main_~nondetString1~0.offset) (= 0 |main_#t~malloc14.offset|) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~length2~0 (select |#length| |main_#t~malloc14.base|)) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 9329#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 9330#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (<= 1 main_~n~0) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (<= (+ main_~n~0 main_~length2~0) (select |#length| main_~nondetString1~0.base))), 9331#(and (= 0 main_~nondetString2~0.offset) (= 0 main_~nondetString1~0.offset) (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base)) (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0)), 9332#(and (= 0 |cstrncat_#in~s1.offset|) (= 0 |cstrncat_#in~s2.offset|) (<= (+ (select |#length| |cstrncat_#in~s2.base|) |cstrncat_#in~n|) (select |#length| |cstrncat_#in~s1.base|)) (<= 1 |cstrncat_#in~n|)), 9333#(and (<= 1 cstrncat_~n) (= 0 cstrncat_~s2.offset) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base)) (select |#length| cstrncat_~s~0.base)) (= cstrncat_~s~0.offset 0)), 9334#(and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) 1)) (= 0 cstrncat_~s2.offset)), 9335#(and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) 2)) (= 0 cstrncat_~s2.offset)), 9336#(and (<= 1 cstrncat_~n) (= 0 cstrncat_~s2.offset) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) 3))), 9337#(and (<= 1 cstrncat_~n) (= |cstrncat_#t~post2.offset| 0) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) |cstrncat_#t~post2.offset| cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset 2))), 9338#(and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset 2))), 9339#(and (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset 2)) (<= 0 cstrncat_~n)), 9340#(and (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset 2)) (or (and (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n)) (not |cstrncat_#t~short5|))), 9341#(and (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset 1)) (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n)), 9342#(and (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset 1)) (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n) (<= 0 cstrncat_~s~0.offset)), 9343#(and (<= 1 cstrncat_~s~0.offset) (or (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s2.offset 1)) (<= cstrncat_~n 0)) (<= 0 cstrncat_~n))] [2018-02-04 14:59:20,723 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 3 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:20,723 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-02-04 14:59:20,723 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-02-04 14:59:20,723 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=509, Unknown=0, NotChecked=0, Total=600 [2018-02-04 14:59:20,723 INFO L87 Difference]: Start difference. First operand 80 states and 90 transitions. Second operand 25 states. [2018-02-04 14:59:21,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:59:21,333 INFO L93 Difference]: Finished difference Result 109 states and 119 transitions. [2018-02-04 14:59:21,334 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-02-04 14:59:21,334 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 49 [2018-02-04 14:59:21,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:59:21,334 INFO L225 Difference]: With dead ends: 109 [2018-02-04 14:59:21,334 INFO L226 Difference]: Without dead ends: 104 [2018-02-04 14:59:21,335 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 475 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=315, Invalid=1577, Unknown=0, NotChecked=0, Total=1892 [2018-02-04 14:59:21,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-02-04 14:59:21,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 99. [2018-02-04 14:59:21,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-02-04 14:59:21,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 110 transitions. [2018-02-04 14:59:21,336 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 110 transitions. Word has length 49 [2018-02-04 14:59:21,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:59:21,336 INFO L432 AbstractCegarLoop]: Abstraction has 99 states and 110 transitions. [2018-02-04 14:59:21,336 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-02-04 14:59:21,336 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 110 transitions. [2018-02-04 14:59:21,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-02-04 14:59:21,337 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:59:21,337 INFO L351 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:59:21,337 INFO L371 AbstractCegarLoop]: === Iteration 35 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:59:21,337 INFO L82 PathProgramCache]: Analyzing trace with hash 1112654791, now seen corresponding path program 3 times [2018-02-04 14:59:21,338 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:59:21,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:59:21,347 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:59:21,759 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 0 proven. 33 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:21,759 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:59:21,759 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19] total 19 [2018-02-04 14:59:21,759 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:59:21,759 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:21,759 INFO L182 omatonBuilderFactory]: Interpolants [9600#(and (= 0 |cstrncat_#in~s1.offset|) (not (= |cstrncat_#in~s1.base| |cstrncat_#in~s2.base|)) (or (<= (+ (* 2 |cstrncat_#in~n|) 2) (select |#length| |cstrncat_#in~s1.base|)) (<= (select |#length| |cstrncat_#in~s1.base|) (* 2 |cstrncat_#in~n|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) |cstrncat_#in~n|)))), 9601#(and (= cstrncat_~s~0.offset 0) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (<= (+ (* 2 cstrncat_~n) 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~n)) (<= (select |#length| cstrncat_~s~0.base) (* 2 cstrncat_~n)))), 9602#(and (or (<= (+ (select |#length| cstrncat_~s~0.base) 1) (+ (* 2 cstrncat_~n) cstrncat_~s~0.offset)) (<= (+ (* 2 cstrncat_~n) cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ cstrncat_~n (+ cstrncat_~s~0.offset (- 1)))))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 9603#(and (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (<= (+ (* 2 cstrncat_~n) cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= cstrncat_~n 1) (<= 3 cstrncat_~n) (<= (+ (select |#length| cstrncat_~s~0.base) 2) (+ (* 2 cstrncat_~n) cstrncat_~s~0.offset)))), 9604#(and (or (<= (+ (* 2 cstrncat_~n) cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base)) (<= cstrncat_~n 1) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (<= 3 cstrncat_~n) (<= (+ (select |#length| cstrncat_~s~0.base) 2) (+ (* 2 cstrncat_~n) cstrncat_~s~0.offset))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 9605#(and (or (<= (+ (select |#length| cstrncat_~s~0.base) 3) (+ (* 2 cstrncat_~n) cstrncat_~s~0.offset)) (<= (+ (* 2 cstrncat_~n) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) 1)) (<= cstrncat_~n 1) (<= 3 cstrncat_~n)) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 9606#(and (not (= |cstrncat_#t~post2.base| cstrncat_~s~0.base)) (or (<= (+ (select |#length| cstrncat_~s~0.base) 3) (+ (* 2 cstrncat_~n) cstrncat_~s~0.offset)) (<= (+ (* 2 cstrncat_~n) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) 1)) (<= cstrncat_~n 1) (<= 3 cstrncat_~n))), 9607#(or (<= (+ (select |#length| cstrncat_~s~0.base) 3) (+ (* 2 cstrncat_~n) cstrncat_~s~0.offset)) (<= (+ (* 2 cstrncat_~n) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) 1)) (<= cstrncat_~n 1) (<= 3 cstrncat_~n)), 9608#(or (<= (+ (* 2 cstrncat_~n) cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base)) (<= cstrncat_~n 0) (<= 2 cstrncat_~n) (<= (+ (select |#length| cstrncat_~s~0.base) 2) (+ (* 2 cstrncat_~n) cstrncat_~s~0.offset))), 9609#(and (or (<= (+ (* 2 cstrncat_~n) cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base)) (<= cstrncat_~n 0) (<= 2 cstrncat_~n)) (<= 0 cstrncat_~s~0.offset)), 9610#(and (<= 1 cstrncat_~s~0.offset) (or (<= 1 cstrncat_~n) (<= (+ cstrncat_~n 1) 0) (<= (+ (* 2 cstrncat_~n) cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)))), 9611#(or (and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))) |cstrncat_#t~short5|), 9612#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))), 9593#true, 9594#false, 9595#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (= 0 |main_#t~malloc13.offset|)), 9596#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (= main_~nondetString1~0.offset 0)), 9597#(and (not (= main_~nondetString1~0.base |main_#t~malloc14.base|)) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~nondetString1~0.offset 0)), 9598#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 9599#(and (or (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~n~0)) (<= (+ (* 2 main_~n~0) 2) (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (<= (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)) (* 2 main_~n~0))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0))] [2018-02-04 14:59:21,759 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 0 proven. 33 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:21,759 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 14:59:21,760 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 14:59:21,760 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=337, Unknown=0, NotChecked=0, Total=380 [2018-02-04 14:59:21,760 INFO L87 Difference]: Start difference. First operand 99 states and 110 transitions. Second operand 20 states. [2018-02-04 14:59:22,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:59:22,361 INFO L93 Difference]: Finished difference Result 129 states and 140 transitions. [2018-02-04 14:59:22,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-02-04 14:59:22,361 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 49 [2018-02-04 14:59:22,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:59:22,362 INFO L225 Difference]: With dead ends: 129 [2018-02-04 14:59:22,362 INFO L226 Difference]: Without dead ends: 127 [2018-02-04 14:59:22,362 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=136, Invalid=1124, Unknown=0, NotChecked=0, Total=1260 [2018-02-04 14:59:22,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-02-04 14:59:22,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 106. [2018-02-04 14:59:22,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-02-04 14:59:22,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 117 transitions. [2018-02-04 14:59:22,363 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 117 transitions. Word has length 49 [2018-02-04 14:59:22,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:59:22,364 INFO L432 AbstractCegarLoop]: Abstraction has 106 states and 117 transitions. [2018-02-04 14:59:22,364 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 14:59:22,364 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 117 transitions. [2018-02-04 14:59:22,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-02-04 14:59:22,364 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:59:22,364 INFO L351 BasicCegarLoop]: trace histogram [11, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:59:22,364 INFO L371 AbstractCegarLoop]: === Iteration 36 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:59:22,364 INFO L82 PathProgramCache]: Analyzing trace with hash 1022708308, now seen corresponding path program 8 times [2018-02-04 14:59:22,364 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:59:22,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:59:22,377 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:59:24,000 WARN L146 SmtUtils]: Spent 423ms on a formula simplification. DAG size of input: 177 DAG size of output 99 [2018-02-04 14:59:24,340 WARN L146 SmtUtils]: Spent 312ms on a formula simplification. DAG size of input: 160 DAG size of output 90 [2018-02-04 14:59:24,595 WARN L146 SmtUtils]: Spent 234ms on a formula simplification. DAG size of input: 109 DAG size of output 63 [2018-02-04 14:59:24,878 WARN L146 SmtUtils]: Spent 256ms on a formula simplification. DAG size of input: 109 DAG size of output 63 [2018-02-04 14:59:25,151 WARN L146 SmtUtils]: Spent 246ms on a formula simplification. DAG size of input: 112 DAG size of output 66 [2018-02-04 14:59:25,439 WARN L146 SmtUtils]: Spent 255ms on a formula simplification. DAG size of input: 126 DAG size of output 70 [2018-02-04 14:59:25,769 WARN L146 SmtUtils]: Spent 292ms on a formula simplification. DAG size of input: 129 DAG size of output 73 [2018-02-04 14:59:25,983 WARN L146 SmtUtils]: Spent 178ms on a formula simplification. DAG size of input: 93 DAG size of output 60 [2018-02-04 14:59:26,197 WARN L146 SmtUtils]: Spent 184ms on a formula simplification. DAG size of input: 96 DAG size of output 63 [2018-02-04 14:59:26,326 WARN L146 SmtUtils]: Spent 104ms on a formula simplification. DAG size of input: 75 DAG size of output 53 [2018-02-04 14:59:26,461 WARN L146 SmtUtils]: Spent 105ms on a formula simplification. DAG size of input: 78 DAG size of output 56 [2018-02-04 14:59:27,022 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:27,022 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:59:27,022 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31] total 31 [2018-02-04 14:59:27,022 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:59:27,023 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:27,023 INFO L182 omatonBuilderFactory]: Interpolants [9880#true, 9881#false, 9882#(<= 1 main_~length2~0), 9883#(and (<= 1 main_~length2~0) (<= 1 main_~n~0)), 9884#(and (<= 1 main_~length2~0) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 9885#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (<= 1 main_~length2~0) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0) (= 0 |main_#t~malloc13.offset|)), 9886#(and (= 0 main_~nondetString1~0.offset) (= (select |#valid| main_~nondetString1~0.base) 1) (or (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~length2~0) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2)))), 9887#(and (= 0 main_~nondetString1~0.offset) (not (= main_~nondetString1~0.base |main_#t~malloc14.base|)) (or (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= 0 |main_#t~malloc14.offset|) (<= 1 main_~length2~0) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2)))), 9888#(and (= 0 main_~nondetString1~0.offset) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (or (and (= main_~nondetString2~0.offset 0) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (or (<= 1 main_~n~0) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~nondetString2~0.offset main_~n~0 main_~length2~0))) (<= 1 main_~length2~0) (or (= 1 (+ main_~nondetString2~0.offset main_~length2~0)) (<= 1 main_~n~0)) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2)))), 9889#(and (= 0 main_~nondetString1~0.offset) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (or (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) 1)) (and (= main_~nondetString2~0.offset 0) (<= 1 main_~length2~0) (or (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (- main_~nondetString1~0.offset) 3)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 9 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (<= 8 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1))))))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (+ main_~nondetString1~0.offset (- 1)))))) (<= 4 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (<= 10 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (or (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 11 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 7 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (= 1 (+ main_~nondetString2~0.offset main_~length2~0)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~nondetString1~0.offset))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 6 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 5 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))))))), 9890#(and (= 0 main_~nondetString1~0.offset) (or (= 0 (select (select |#memory_int| main_~nondetString1~0.base) 1)) (and (= main_~nondetString2~0.offset 0) (or (and (or (<= 11 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1))))))) (<= 10 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (<= 4 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (+ main_~nondetString1~0.offset (- 1))))))) (and (<= 7 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1))))))) (and (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 6 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) main_~nondetString1~0.offset)) (and (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 5 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 8 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (- main_~nondetString1~0.offset) 3)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 9 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))))))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base))), 9891#(and (= 0 |cstrncat_#in~s1.offset|) (or (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ 3 (- 1)))) (<= 9 (select |#length| |cstrncat_#in~s1.base|))) (and (<= 10 (select |#length| |cstrncat_#in~s1.base|)) (or (<= 11 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))))) (and (<= 5 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1))))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) 1)) (and (<= 6 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= 8 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) |cstrncat_#in~s1.offset|)) (and (<= 4 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1))))) (and (<= 7 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))))), 9892#(and (= cstrncat_~s~0.offset 0) (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 7 (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= 4 (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 6 (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= 5 (select |#length| cstrncat_~s~0.base))) (and (<= 8 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= 9 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ 3 (- 1))))) (and (or (<= 11 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (<= 10 (select |#length| cstrncat_~s~0.base))))), 9893#(and (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 7 (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= 4 (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 6 (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= 5 (select |#length| cstrncat_~s~0.base))) (and (<= 8 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= 9 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ 3 (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (or (<= 11 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (<= 10 (select |#length| cstrncat_~s~0.base)))) (= cstrncat_~s~0.offset 0)), 9894#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= cstrncat_~s~0.offset 1)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)))), 9895#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= cstrncat_~s~0.offset 1) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)))), 9896#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (or (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1))))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))))), 9897#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (or (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1))))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))))), 9898#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)))), 9899#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)))), 9900#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))))), 9901#(or (and (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))))), 9902#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))))), 9903#(or (and (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))))), 9904#(or (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)))), 9905#(or (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 9906#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)))), 9907#(or (and (or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 9908#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))), 9909#(and (or (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))) (<= 0 cstrncat_~s~0.offset)), 9910#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base))), 9911#(and (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= 2 cstrncat_~s~0.offset))] [2018-02-04 14:59:27,023 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:27,023 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-02-04 14:59:27,024 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-02-04 14:59:27,024 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=154, Invalid=838, Unknown=0, NotChecked=0, Total=992 [2018-02-04 14:59:27,024 INFO L87 Difference]: Start difference. First operand 106 states and 117 transitions. Second operand 32 states. [2018-02-04 14:59:27,401 WARN L146 SmtUtils]: Spent 136ms on a formula simplification. DAG size of input: 133 DAG size of output 126 [2018-02-04 14:59:27,840 WARN L146 SmtUtils]: Spent 121ms on a formula simplification. DAG size of input: 125 DAG size of output 123 [2018-02-04 14:59:28,113 WARN L146 SmtUtils]: Spent 117ms on a formula simplification. DAG size of input: 119 DAG size of output 114 [2018-02-04 14:59:29,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:59:29,814 INFO L93 Difference]: Finished difference Result 168 states and 181 transitions. [2018-02-04 14:59:29,814 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-02-04 14:59:29,815 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 50 [2018-02-04 14:59:29,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:59:29,815 INFO L225 Difference]: With dead ends: 168 [2018-02-04 14:59:29,815 INFO L226 Difference]: Without dead ends: 160 [2018-02-04 14:59:29,816 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 798 ImplicationChecksByTransitivity, 6.0s TimeCoverageRelationStatistics Valid=491, Invalid=2701, Unknown=0, NotChecked=0, Total=3192 [2018-02-04 14:59:29,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-02-04 14:59:29,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 109. [2018-02-04 14:59:29,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109 states. [2018-02-04 14:59:29,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 121 transitions. [2018-02-04 14:59:29,817 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 121 transitions. Word has length 50 [2018-02-04 14:59:29,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:59:29,817 INFO L432 AbstractCegarLoop]: Abstraction has 109 states and 121 transitions. [2018-02-04 14:59:29,817 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-02-04 14:59:29,817 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 121 transitions. [2018-02-04 14:59:29,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-02-04 14:59:29,817 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:59:29,817 INFO L351 BasicCegarLoop]: trace histogram [5, 5, 4, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:59:29,817 INFO L371 AbstractCegarLoop]: === Iteration 37 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:59:29,818 INFO L82 PathProgramCache]: Analyzing trace with hash -892097662, now seen corresponding path program 4 times [2018-02-04 14:59:29,818 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:59:29,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:59:29,826 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:59:30,473 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 3 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:30,473 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:59:30,474 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26] total 26 [2018-02-04 14:59:30,474 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:59:30,474 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:30,475 INFO L182 omatonBuilderFactory]: Interpolants [10240#false, 10241#(<= 1 main_~n~0), 10242#(and (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 10243#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0) (= 0 |main_#t~malloc13.offset|)), 10244#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 10245#(and (= 0 |main_#t~malloc14.offset|) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~length2~0 (select |#length| |main_#t~malloc14.base|)) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 10246#(and (= 0 main_~nondetString2~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 10247#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 main_~length2~0 1) (select |#length| main_~nondetString1~0.base))) (<= 1 main_~n~0) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (<= (+ main_~n~0 main_~length2~0) (select |#length| main_~nondetString1~0.base)) (= main_~nondetString1~0.offset 0)), 10248#(and (= 0 main_~nondetString2~0.offset) (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base)) (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (or (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base) 1) (select |#length| main_~nondetString1~0.base)) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ main_~nondetString1~0.offset (- 1))))))) (= main_~nondetString1~0.offset 0)), 10249#(and (= 0 |cstrncat_#in~s1.offset|) (= 0 |cstrncat_#in~s2.offset|) (<= (+ (select |#length| |cstrncat_#in~s2.base|) |cstrncat_#in~n|) (select |#length| |cstrncat_#in~s1.base|)) (or (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- |cstrncat_#in~n|)) (- 1)))) (<= (+ (select |#length| |cstrncat_#in~s2.base|) |cstrncat_#in~n| 1) (select |#length| |cstrncat_#in~s1.base|))) (<= 1 |cstrncat_#in~n|)), 10250#(and (<= 1 cstrncat_~n) (= 0 cstrncat_~s2.offset) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base)) (select |#length| cstrncat_~s~0.base)) (= cstrncat_~s~0.offset 0) (or (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))))), 10251#(and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) 1)) (= 0 cstrncat_~s2.offset) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ (- cstrncat_~n) (+ (- (select |#length| cstrncat_~s~0.base)) (select |#length| cstrncat_~s~0.base)))) (- 1)))))), 10252#(and (<= 1 cstrncat_~n) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 10253#(and (<= 1 cstrncat_~n) (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 10254#(and (<= 1 cstrncat_~n) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)))), 10255#(and (<= 1 cstrncat_~n) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base)))), 10256#(and (<= 1 cstrncat_~n) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= 0 cstrncat_~s~0.offset)), 10257#(and (<= 1 cstrncat_~n) (not (= cstrncat_~s~0.base |cstrncat_#t~post2.base|)) (or (and (<= (+ (select |#length| cstrncat_~s2.base) |cstrncat_#t~post2.offset|) (+ cstrncat_~s2.offset 1)) (= |cstrncat_#t~post2.offset| 0)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= 0 cstrncat_~s~0.offset)), 10258#(and (<= 1 cstrncat_~n) (or (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= 0 cstrncat_~s~0.offset)), 10259#(and (<= 1 cstrncat_~s~0.offset) (or (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= 0 cstrncat_~n)), 10260#(and (<= 1 cstrncat_~s~0.offset) (or (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (or (and (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n)) (not |cstrncat_#t~short5|))), 10261#(and (<= 1 cstrncat_~s~0.offset) (not (= cstrncat_~n 0)) (or (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= 0 cstrncat_~n)), 10262#(and (or (<= cstrncat_~n 0) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= 0 cstrncat_~n) (<= 2 cstrncat_~s~0.offset)), 10263#(and (or (not |cstrncat_#t~short5|) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset)) (<= 2 cstrncat_~s~0.offset)), 10264#(and (or (<= (select |#length| |cstrncat_#t~post2.base|) |cstrncat_#t~post2.offset|) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))) (<= 2 cstrncat_~s~0.offset)), 10265#(and (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= 2 cstrncat_~s~0.offset)), 10239#true] [2018-02-04 14:59:30,475 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 3 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:30,475 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-02-04 14:59:30,475 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-02-04 14:59:30,476 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=619, Unknown=0, NotChecked=0, Total=702 [2018-02-04 14:59:30,476 INFO L87 Difference]: Start difference. First operand 109 states and 121 transitions. Second operand 27 states. [2018-02-04 14:59:31,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:59:31,325 INFO L93 Difference]: Finished difference Result 155 states and 167 transitions. [2018-02-04 14:59:31,325 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-02-04 14:59:31,325 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 52 [2018-02-04 14:59:31,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:59:31,326 INFO L225 Difference]: With dead ends: 155 [2018-02-04 14:59:31,326 INFO L226 Difference]: Without dead ends: 150 [2018-02-04 14:59:31,326 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 496 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=248, Invalid=1644, Unknown=0, NotChecked=0, Total=1892 [2018-02-04 14:59:31,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-02-04 14:59:31,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 109. [2018-02-04 14:59:31,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109 states. [2018-02-04 14:59:31,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 121 transitions. [2018-02-04 14:59:31,328 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 121 transitions. Word has length 52 [2018-02-04 14:59:31,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:59:31,328 INFO L432 AbstractCegarLoop]: Abstraction has 109 states and 121 transitions. [2018-02-04 14:59:31,328 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-02-04 14:59:31,328 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 121 transitions. [2018-02-04 14:59:31,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-02-04 14:59:31,328 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:59:31,328 INFO L351 BasicCegarLoop]: trace histogram [5, 5, 4, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:59:31,328 INFO L371 AbstractCegarLoop]: === Iteration 38 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:59:31,329 INFO L82 PathProgramCache]: Analyzing trace with hash -892088626, now seen corresponding path program 4 times [2018-02-04 14:59:31,329 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:59:31,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:59:31,334 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:59:31,696 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 1 proven. 35 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-02-04 14:59:31,697 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:59:31,697 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19] total 19 [2018-02-04 14:59:31,697 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:59:31,697 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:31,697 INFO L182 omatonBuilderFactory]: Interpolants [10564#true, 10565#false, 10566#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (= 0 |main_#t~malloc13.offset|)), 10567#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (= main_~nondetString1~0.offset 0)), 10568#(and (not (= main_~nondetString1~0.base |main_#t~malloc14.base|)) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~nondetString1~0.offset 0)), 10569#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 10570#(and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ main_~nondetString1~0.offset (- 1)))))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 10571#(and (not (= |cstrncat_#in~s1.base| |cstrncat_#in~s2.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (- |cstrncat_#in~n|) (select |#length| |cstrncat_#in~s1.base|)) (- 1))))), 10572#(and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 10573#(and (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~n cstrncat_~s~0.offset)))), 10574#(and (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~n cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))))), 10575#(and (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= (+ (select |#length| cstrncat_~s~0.base) 1) (+ cstrncat_~n cstrncat_~s~0.offset))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 10576#(and (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= (+ (select |#length| cstrncat_~s~0.base) 1) (+ cstrncat_~n cstrncat_~s~0.offset))) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (<= 0 cstrncat_~s~0.offset)), 10577#(and (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= (+ (select |#length| cstrncat_~s~0.base) 1) (+ cstrncat_~n cstrncat_~s~0.offset))) (not (= |cstrncat_#t~post2.base| cstrncat_~s~0.base)) (<= 0 cstrncat_~s~0.offset)), 10578#(and (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= (+ (select |#length| cstrncat_~s~0.base) 1) (+ cstrncat_~n cstrncat_~s~0.offset))) (<= 0 cstrncat_~s~0.offset)), 10579#(and (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= (+ (select |#length| cstrncat_~s~0.base) 1) (+ cstrncat_~n cstrncat_~s~0.offset))) (<= 1 cstrncat_~s~0.offset)), 10580#(and (<= 1 cstrncat_~s~0.offset) (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= 2 cstrncat_~n))), 10581#(and (or (<= 1 cstrncat_~n) (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))) (<= 2 cstrncat_~s~0.offset)), 10582#(and (or (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) |cstrncat_#t~short5|) (<= 2 cstrncat_~s~0.offset)), 10583#(and (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= 2 cstrncat_~s~0.offset))] [2018-02-04 14:59:31,697 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 1 proven. 35 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-02-04 14:59:31,697 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 14:59:31,697 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 14:59:31,697 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=335, Unknown=0, NotChecked=0, Total=380 [2018-02-04 14:59:31,698 INFO L87 Difference]: Start difference. First operand 109 states and 121 transitions. Second operand 20 states. [2018-02-04 14:59:32,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:59:32,270 INFO L93 Difference]: Finished difference Result 126 states and 137 transitions. [2018-02-04 14:59:32,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-02-04 14:59:32,270 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 52 [2018-02-04 14:59:32,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:59:32,271 INFO L225 Difference]: With dead ends: 126 [2018-02-04 14:59:32,271 INFO L226 Difference]: Without dead ends: 87 [2018-02-04 14:59:32,271 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 203 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=269, Invalid=1213, Unknown=0, NotChecked=0, Total=1482 [2018-02-04 14:59:32,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-02-04 14:59:32,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 74. [2018-02-04 14:59:32,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-02-04 14:59:32,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 81 transitions. [2018-02-04 14:59:32,272 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 81 transitions. Word has length 52 [2018-02-04 14:59:32,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:59:32,272 INFO L432 AbstractCegarLoop]: Abstraction has 74 states and 81 transitions. [2018-02-04 14:59:32,272 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 14:59:32,272 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 81 transitions. [2018-02-04 14:59:32,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-02-04 14:59:32,273 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:59:32,273 INFO L351 BasicCegarLoop]: trace histogram [12, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:59:32,273 INFO L371 AbstractCegarLoop]: === Iteration 39 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:59:32,273 INFO L82 PathProgramCache]: Analyzing trace with hash -994795475, now seen corresponding path program 9 times [2018-02-04 14:59:32,273 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:59:32,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:59:32,287 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:59:33,638 WARN L146 SmtUtils]: Spent 471ms on a formula simplification. DAG size of input: 192 DAG size of output 116 [2018-02-04 14:59:34,125 WARN L146 SmtUtils]: Spent 430ms on a formula simplification. DAG size of input: 177 DAG size of output 78 [2018-02-04 14:59:34,535 WARN L146 SmtUtils]: Spent 385ms on a formula simplification. DAG size of input: 177 DAG size of output 79 [2018-02-04 14:59:34,956 WARN L146 SmtUtils]: Spent 386ms on a formula simplification. DAG size of input: 180 DAG size of output 82 [2018-02-04 14:59:37,641 WARN L146 SmtUtils]: Spent 2633ms on a formula simplification. DAG size of input: 197 DAG size of output 90 [2018-02-04 14:59:38,304 WARN L146 SmtUtils]: Spent 607ms on a formula simplification. DAG size of input: 200 DAG size of output 93 [2018-02-04 14:59:38,835 WARN L146 SmtUtils]: Spent 467ms on a formula simplification. DAG size of input: 174 DAG size of output 82 [2018-02-04 14:59:39,460 WARN L146 SmtUtils]: Spent 544ms on a formula simplification. DAG size of input: 177 DAG size of output 82 [2018-02-04 14:59:39,940 WARN L146 SmtUtils]: Spent 399ms on a formula simplification. DAG size of input: 170 DAG size of output 77 [2018-02-04 14:59:40,530 WARN L146 SmtUtils]: Spent 496ms on a formula simplification. DAG size of input: 173 DAG size of output 80 [2018-02-04 14:59:40,936 WARN L146 SmtUtils]: Spent 312ms on a formula simplification. DAG size of input: 163 DAG size of output 72 [2018-02-04 14:59:41,361 WARN L146 SmtUtils]: Spent 324ms on a formula simplification. DAG size of input: 166 DAG size of output 75 [2018-02-04 14:59:42,030 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:42,030 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:59:42,030 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31] total 31 [2018-02-04 14:59:42,030 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:59:42,031 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:42,031 INFO L182 omatonBuilderFactory]: Interpolants [10822#true, 10823#false, 10824#(<= 1 main_~n~0), 10825#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (= 0 |main_#t~malloc13.offset|)), 10826#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0)), 10827#(and (not (= main_~nondetString1~0.base |main_#t~malloc14.base|)) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0)), 10828#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 10829#(and (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (or (and (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 1) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (+ main_~nondetString1~0.offset (- 1))))))) (and (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 3) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ main_~nondetString1~0.offset (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) (- 1))))))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~nondetString1~0.offset)) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 2) (+ main_~n~0 (select |#length| main_~nondetString1~0.base)))) (and (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 5))) 2) 3) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (or (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 5))) 2) 4) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 5))) 2) (+ main_~nondetString1~0.offset (- 1)))))))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) 1)) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 4) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) main_~nondetString1~0.offset))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 3) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) main_~nondetString1~0.offset))) (and (<= (+ main_~n~0 3) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) main_~nondetString1~0.offset)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) (+ main_~nondetString1~0.offset (- 1))))))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~n~0)) (<= 2 main_~n~0) (<= (+ (* 2 main_~n~0) 1) (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))))) (= main_~nondetString1~0.offset 0)), 10830#(and (= 0 |cstrncat_#in~s1.offset|) (or (and (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) 2) (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1))))) (and (<= 2 (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) 2)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) 2))) (- 1))))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) 1)) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 5) 2) (- 1)))) (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 5) 2) 3) (select |#length| |cstrncat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (select |#length| |cstrncat_#in~s1.base|) 2) (- 1)))) (<= 3 (div (select |#length| |cstrncat_#in~s1.base|) 2))) (and (<= 4 (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2)) (or (<= 5 (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2) (- 1)) (- 1)))))) (and (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) 1) (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1))))) (and (<= 3 (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2) (- 1))))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) |cstrncat_#in~s1.offset|)) (and (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) 3) (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) (- 1))))))), 10831#(and (or (and (<= 4 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2) (- 1)) (- 1))))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) (- 1))))) (and (or (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) (- 1))))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2) (- 1)))) (<= 3 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 2) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (select |#length| cstrncat_~s~0.base) 2) (- 1)))) (<= 3 (div (select |#length| cstrncat_~s~0.base) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2))) (- 1)))) (<= 2 (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2)))) (= cstrncat_~s~0.offset 0)), 10832#(and (or (and (<= 4 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2) (- 1)) (- 1))))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) (- 1))))) (and (or (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) (- 1))))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2) (- 1)))) (<= 3 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 2) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (select |#length| cstrncat_~s~0.base) 2) (- 1)))) (<= 3 (div (select |#length| cstrncat_~s~0.base) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2))) (- 1)))) (<= 2 (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2)))) (= cstrncat_~s~0.offset 0)), 10833#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= cstrncat_~s~0.offset 1)) (and (<= (+ cstrncat_~s~0.offset 1) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) 3) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) 4) (select |#length| cstrncat_~s~0.base)))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) 2) 2) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2))) (and (<= (+ cstrncat_~s~0.offset 1) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (+ cstrncat_~s~0.offset (- 1)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)))), 10834#(or (and (<= (+ cstrncat_~s~0.offset 1) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) 3) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) 4) (select |#length| cstrncat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= cstrncat_~s~0.offset 1) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) 2) 2) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2))) (and (<= (+ cstrncat_~s~0.offset 1) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (+ cstrncat_~s~0.offset (- 1)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)))), 10835#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) 2) 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) 2) (- 1))))) (and (or (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrncat_~s~0.offset 1) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2)))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 3) (select |#length| cstrncat_~s~0.base))) (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))))), 10836#(or (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) 2) 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) 2) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (+ cstrncat_~s~0.offset (- 2)))) (- 1)))) (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))))), 10837#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ (div (+ cstrncat_~s~0.offset (select |#length| cstrncat_~s~0.base)) 2) 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (select |#length| cstrncat_~s~0.base)) 2) (- 1))))) (and (or (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) (- 1))))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 2))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2)) (- 3)))) (- 1)))))), 10838#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2))) (and (<= (+ (div (+ cstrncat_~s~0.offset (select |#length| cstrncat_~s~0.base)) 2) 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (select |#length| cstrncat_~s~0.base)) 2) (- 1))))) (and (or (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) (- 1))))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2)) (- 3)))) (- 1)))))), 10839#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2) 2))) (and (<= cstrncat_~s~0.offset (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2)) (- 3)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2)) (- 4)))) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) 2))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) 3)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 1)) 2) 4) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2)) (- 4)))) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2) 1)))), 10840#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2) 2))) (and (<= cstrncat_~s~0.offset (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2)) (- 3)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2)) (- 4)))) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) 2))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) 3)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 1)) 2) 4) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2)) (- 4)))) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2) 1))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 10841#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 4)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 3)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) 2) 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 10842#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 4)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 3)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) 2) 4) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 10843#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 10844#(or (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 10845#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3))), 10846#(or (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 10847#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))), 10848#(or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 10849#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))), 10850#(or (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 10851#(or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset)), 10852#(and (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= 0 cstrncat_~s~0.offset)), 10853#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)))] [2018-02-04 14:59:42,031 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 0 proven. 187 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:42,031 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-02-04 14:59:42,032 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-02-04 14:59:42,032 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=149, Invalid=843, Unknown=0, NotChecked=0, Total=992 [2018-02-04 14:59:42,032 INFO L87 Difference]: Start difference. First operand 74 states and 81 transitions. Second operand 32 states. [2018-02-04 14:59:42,437 WARN L146 SmtUtils]: Spent 169ms on a formula simplification. DAG size of input: 132 DAG size of output 131 [2018-02-04 14:59:42,679 WARN L143 SmtUtils]: Spent 151ms on a formula simplification that was a NOOP. DAG size: 146 [2018-02-04 14:59:42,868 WARN L143 SmtUtils]: Spent 133ms on a formula simplification that was a NOOP. DAG size: 149 [2018-02-04 14:59:43,124 WARN L143 SmtUtils]: Spent 165ms on a formula simplification that was a NOOP. DAG size: 158 [2018-02-04 14:59:43,496 WARN L146 SmtUtils]: Spent 347ms on a formula simplification. DAG size of input: 164 DAG size of output 162 [2018-02-04 14:59:43,867 WARN L146 SmtUtils]: Spent 291ms on a formula simplification. DAG size of input: 155 DAG size of output 151 [2018-02-04 14:59:44,166 WARN L146 SmtUtils]: Spent 264ms on a formula simplification. DAG size of input: 163 DAG size of output 147 [2018-02-04 14:59:44,470 WARN L146 SmtUtils]: Spent 217ms on a formula simplification. DAG size of input: 155 DAG size of output 132 [2018-02-04 14:59:44,758 WARN L146 SmtUtils]: Spent 240ms on a formula simplification. DAG size of input: 172 DAG size of output 147 [2018-02-04 14:59:45,023 WARN L146 SmtUtils]: Spent 185ms on a formula simplification. DAG size of input: 158 DAG size of output 139 [2018-02-04 14:59:45,429 WARN L146 SmtUtils]: Spent 354ms on a formula simplification. DAG size of input: 173 DAG size of output 149 [2018-02-04 14:59:45,657 WARN L146 SmtUtils]: Spent 174ms on a formula simplification. DAG size of input: 130 DAG size of output 124 [2018-02-04 14:59:46,016 WARN L146 SmtUtils]: Spent 305ms on a formula simplification. DAG size of input: 138 DAG size of output 128 [2018-02-04 14:59:46,250 WARN L146 SmtUtils]: Spent 152ms on a formula simplification. DAG size of input: 117 DAG size of output 107 [2018-02-04 14:59:46,528 WARN L146 SmtUtils]: Spent 244ms on a formula simplification. DAG size of input: 120 DAG size of output 110 [2018-02-04 14:59:46,725 WARN L146 SmtUtils]: Spent 149ms on a formula simplification. DAG size of input: 108 DAG size of output 102 [2018-02-04 14:59:46,970 WARN L146 SmtUtils]: Spent 152ms on a formula simplification. DAG size of input: 111 DAG size of output 105 [2018-02-04 14:59:47,162 WARN L146 SmtUtils]: Spent 154ms on a formula simplification. DAG size of input: 101 DAG size of output 96 [2018-02-04 14:59:47,350 WARN L146 SmtUtils]: Spent 135ms on a formula simplification. DAG size of input: 104 DAG size of output 99 [2018-02-04 14:59:47,522 WARN L146 SmtUtils]: Spent 136ms on a formula simplification. DAG size of input: 94 DAG size of output 90 [2018-02-04 14:59:47,709 WARN L146 SmtUtils]: Spent 149ms on a formula simplification. DAG size of input: 97 DAG size of output 93 [2018-02-04 14:59:47,875 WARN L146 SmtUtils]: Spent 122ms on a formula simplification. DAG size of input: 87 DAG size of output 84 [2018-02-04 14:59:48,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:59:48,014 INFO L93 Difference]: Finished difference Result 122 states and 131 transitions. [2018-02-04 14:59:48,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-02-04 14:59:48,014 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 53 [2018-02-04 14:59:48,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:59:48,015 INFO L225 Difference]: With dead ends: 122 [2018-02-04 14:59:48,015 INFO L226 Difference]: Without dead ends: 122 [2018-02-04 14:59:48,015 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1006 ImplicationChecksByTransitivity, 14.3s TimeCoverageRelationStatistics Valid=565, Invalid=2857, Unknown=0, NotChecked=0, Total=3422 [2018-02-04 14:59:48,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-02-04 14:59:48,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 77. [2018-02-04 14:59:48,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-02-04 14:59:48,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 85 transitions. [2018-02-04 14:59:48,016 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 85 transitions. Word has length 53 [2018-02-04 14:59:48,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:59:48,016 INFO L432 AbstractCegarLoop]: Abstraction has 77 states and 85 transitions. [2018-02-04 14:59:48,016 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-02-04 14:59:48,017 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 85 transitions. [2018-02-04 14:59:48,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-02-04 14:59:48,017 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:59:48,017 INFO L351 BasicCegarLoop]: trace histogram [6, 6, 5, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:59:48,017 INFO L371 AbstractCegarLoop]: === Iteration 40 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:59:48,017 INFO L82 PathProgramCache]: Analyzing trace with hash 1611984667, now seen corresponding path program 5 times [2018-02-04 14:59:48,017 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:59:48,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:59:48,023 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:59:48,887 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 0 proven. 62 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:48,887 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:59:48,887 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28] total 28 [2018-02-04 14:59:48,887 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:59:48,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:48,887 INFO L182 omatonBuilderFactory]: Interpolants [11107#true, 11108#false, 11109#(<= 1 main_~n~0), 11110#(and (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 11111#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0) (= 0 |main_#t~malloc13.offset|)), 11112#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 11113#(and (= 0 |main_#t~malloc14.offset|) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~length2~0 (select |#length| |main_#t~malloc14.base|)) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 11114#(and (= 0 main_~nondetString2~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 11115#(and (= 0 main_~nondetString2~0.offset) (or (<= (+ (* 2 main_~n~0) 2) (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~n~0)) (<= (+ (* 2 main_~n~0) 1) (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (<= (+ main_~n~0 main_~length2~0) (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2)) (or (<= (+ main_~n~0 main_~length2~0 1) (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) (+ main_~nondetString1~0.offset (- 1))))))))) (<= 1 main_~n~0) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 11116#(and (or (and (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base)) (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2)) (or (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base) 1) (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2)) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) (+ main_~nondetString1~0.offset (- 1)))))))) (and (= 0 (select (select |#memory_int| main_~nondetString1~0.base) main_~n~0)) (<= (+ (* 2 main_~n~0) 1) (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (<= (+ (* 2 main_~n~0) 2) (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (= 0 main_~nondetString2~0.offset) (<= 1 main_~n~0) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 11117#(and (= 0 |cstrncat_#in~s1.offset|) (= 0 |cstrncat_#in~s2.offset|) (or (and (<= (select |#length| |cstrncat_#in~s2.base|) (div (select |#length| |cstrncat_#in~s1.base|) 2)) (or (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (select |#length| |cstrncat_#in~s1.base|) 2) (- 1)))) (<= (+ (select |#length| |cstrncat_#in~s2.base|) 1) (div (select |#length| |cstrncat_#in~s1.base|) 2)))) (<= |cstrncat_#in~n| (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2)) (and (<= |cstrncat_#in~n| (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) 2)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) |cstrncat_#in~n|)))) (not (= |cstrncat_#in~s1.base| |cstrncat_#in~s2.base|)) (<= 1 |cstrncat_#in~n|)), 11118#(and (<= 1 cstrncat_~n) (= 0 cstrncat_~s2.offset) (= cstrncat_~s~0.offset 0) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (<= cstrncat_~n (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2)) (and (<= (select |#length| cstrncat_~s2.base) (div (select |#length| cstrncat_~s~0.base) 2)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (select |#length| cstrncat_~s~0.base) 2) (- 1)))) (<= (+ (select |#length| cstrncat_~s2.base) 1) (div (select |#length| cstrncat_~s~0.base) 2)))) (and (<= cstrncat_~n (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~n))))), 11119#(and (<= 1 cstrncat_~n) (= 0 cstrncat_~s2.offset) (or (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2) (- 1)))) (<= (+ (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2))) (<= (+ (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2) 1))) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ cstrncat_~n (+ cstrncat_~s~0.offset (- 1)))))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 1))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 11120#(and (<= 1 cstrncat_~n) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ cstrncat_~n (+ cstrncat_~s~0.offset (- 2)))))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2) 2)))), 11121#(and (<= 1 cstrncat_~n) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ cstrncat_~n (+ cstrncat_~s~0.offset (- 2)))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2) 2)))), 11122#(or (and (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)))) (and (<= 1 cstrncat_~n) (<= cstrncat_~n 2))), 11123#(or (and (or (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))) (and (<= 1 cstrncat_~n) (<= cstrncat_~n 2))), 11124#(or (and (or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))) (and (<= 1 cstrncat_~n) (<= cstrncat_~n 2))), 11125#(or (and (or (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))) (and (<= 1 cstrncat_~n) (<= cstrncat_~n 2))), 11126#(or (and (not (= |cstrncat_#t~post2.base| cstrncat_~s~0.base)) (or (and (<= (+ (select |#length| cstrncat_~s2.base) |cstrncat_#t~post2.offset|) (+ cstrncat_~s2.offset 1)) (= |cstrncat_#t~post2.offset| 0)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)))) (and (<= 1 cstrncat_~n) (<= cstrncat_~n 2))), 11127#(or (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1)) (and (<= 1 cstrncat_~n) (<= cstrncat_~n 2))), 11128#(or (and (<= 0 cstrncat_~n) (<= cstrncat_~n 1)) (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1))), 11129#(or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (and (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n) (<= cstrncat_~n 1)) (not |cstrncat_#t~short5|) (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1))), 11130#(or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (and (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n) (<= cstrncat_~n 1)) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset)), 11131#(or (and (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n) (<= cstrncat_~n 1)) (and (or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset)) (<= 0 cstrncat_~s~0.offset))), 11132#(or (and (<= 1 cstrncat_~s~0.offset) (or (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset))) (and (<= cstrncat_~n 0) (<= 0 cstrncat_~n))), 11133#(or (not |cstrncat_#t~short5|) (and (<= 1 cstrncat_~s~0.offset) (or (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset)))), 11134#(and (<= 1 cstrncat_~s~0.offset) (or (<= (select |#length| |cstrncat_#t~post2.base|) |cstrncat_#t~post2.offset|) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)))), 11135#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)))] [2018-02-04 14:59:48,887 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 0 proven. 62 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:48,887 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-02-04 14:59:48,888 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-02-04 14:59:48,888 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=100, Invalid=712, Unknown=0, NotChecked=0, Total=812 [2018-02-04 14:59:48,888 INFO L87 Difference]: Start difference. First operand 77 states and 85 transitions. Second operand 29 states. [2018-02-04 14:59:49,303 WARN L146 SmtUtils]: Spent 113ms on a formula simplification. DAG size of input: 94 DAG size of output 82 [2018-02-04 14:59:50,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 14:59:50,094 INFO L93 Difference]: Finished difference Result 103 states and 111 transitions. [2018-02-04 14:59:50,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-02-04 14:59:50,095 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 55 [2018-02-04 14:59:50,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 14:59:50,095 INFO L225 Difference]: With dead ends: 103 [2018-02-04 14:59:50,095 INFO L226 Difference]: Without dead ends: 103 [2018-02-04 14:59:50,096 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 574 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=284, Invalid=1786, Unknown=0, NotChecked=0, Total=2070 [2018-02-04 14:59:50,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-02-04 14:59:50,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 84. [2018-02-04 14:59:50,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-02-04 14:59:50,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 92 transitions. [2018-02-04 14:59:50,097 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 92 transitions. Word has length 55 [2018-02-04 14:59:50,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 14:59:50,097 INFO L432 AbstractCegarLoop]: Abstraction has 84 states and 92 transitions. [2018-02-04 14:59:50,097 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-02-04 14:59:50,097 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 92 transitions. [2018-02-04 14:59:50,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-02-04 14:59:50,098 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 14:59:50,098 INFO L351 BasicCegarLoop]: trace histogram [13, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 14:59:50,098 INFO L371 AbstractCegarLoop]: === Iteration 41 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 14:59:50,098 INFO L82 PathProgramCache]: Analyzing trace with hash -677654604, now seen corresponding path program 10 times [2018-02-04 14:59:50,098 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 14:59:50,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 14:59:50,111 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 14:59:53,385 WARN L146 SmtUtils]: Spent 724ms on a formula simplification. DAG size of input: 189 DAG size of output 109 [2018-02-04 14:59:53,838 WARN L146 SmtUtils]: Spent 403ms on a formula simplification. DAG size of input: 153 DAG size of output 75 [2018-02-04 14:59:54,277 WARN L146 SmtUtils]: Spent 413ms on a formula simplification. DAG size of input: 153 DAG size of output 75 [2018-02-04 14:59:54,719 WARN L146 SmtUtils]: Spent 412ms on a formula simplification. DAG size of input: 156 DAG size of output 78 [2018-02-04 14:59:55,179 WARN L146 SmtUtils]: Spent 426ms on a formula simplification. DAG size of input: 172 DAG size of output 84 [2018-02-04 14:59:55,637 WARN L146 SmtUtils]: Spent 422ms on a formula simplification. DAG size of input: 175 DAG size of output 87 [2018-02-04 14:59:55,989 WARN L146 SmtUtils]: Spent 314ms on a formula simplification. DAG size of input: 135 DAG size of output 74 [2018-02-04 14:59:56,371 WARN L146 SmtUtils]: Spent 342ms on a formula simplification. DAG size of input: 138 DAG size of output 77 [2018-02-04 14:59:56,624 WARN L146 SmtUtils]: Spent 223ms on a formula simplification. DAG size of input: 113 DAG size of output 67 [2018-02-04 14:59:56,882 WARN L146 SmtUtils]: Spent 227ms on a formula simplification. DAG size of input: 116 DAG size of output 70 [2018-02-04 14:59:57,078 WARN L146 SmtUtils]: Spent 166ms on a formula simplification. DAG size of input: 93 DAG size of output 60 [2018-02-04 14:59:57,279 WARN L146 SmtUtils]: Spent 168ms on a formula simplification. DAG size of input: 96 DAG size of output 63 [2018-02-04 14:59:57,533 WARN L146 SmtUtils]: Spent 101ms on a formula simplification. DAG size of input: 78 DAG size of output 56 [2018-02-04 14:59:58,050 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:58,050 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 14:59:58,050 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32] total 32 [2018-02-04 14:59:58,050 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 14:59:58,050 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:58,051 INFO L182 omatonBuilderFactory]: Interpolants [11357#true, 11358#false, 11359#(<= 1 main_~n~0), 11360#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (= 0 |main_#t~malloc13.offset|)), 11361#(and (or (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (= 0 main_~nondetString1~0.offset) (= (select |#valid| main_~nondetString1~0.base) 1)), 11362#(and (or (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (= 0 main_~nondetString1~0.offset) (not (= main_~nondetString1~0.base |main_#t~malloc14.base|))), 11363#(and (or (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (= 0 main_~nondetString1~0.offset) (not (= main_~nondetString1~0.base main_~nondetString2~0.base))), 11364#(and (= 0 main_~nondetString1~0.offset) (or (and (<= 8 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1))))))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 10 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (+ main_~nondetString1~0.offset (- 1)))))) (<= 4 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (or (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (+ (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 13 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (<= 12 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~nondetString1~0.offset)) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 7 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) 1)) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 6 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 5 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 9 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (- main_~nondetString1~0.offset) 3)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 11 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base))), 11365#(and (= 0 |cstrncat_#in~s1.offset|) (or (and (<= 5 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1))))) (and (<= 10 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) 1)) (and (<= 12 (select |#length| |cstrncat_#in~s1.base|)) (or (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 13 (select |#length| |cstrncat_#in~s1.base|)))) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ 3 (- 1)))) (<= 11 (select |#length| |cstrncat_#in~s1.base|))) (and (<= 6 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= 9 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= 8 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) |cstrncat_#in~s1.offset|)) (and (<= 4 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1))))) (and (<= 7 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))))), 11366#(and (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 7 (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= 4 (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 6 (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= 5 (select |#length| cstrncat_~s~0.base))) (and (<= 11 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ 3 (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 10 (select |#length| cstrncat_~s~0.base))) (and (<= 8 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 13 (select |#length| cstrncat_~s~0.base))) (<= 12 (select |#length| cstrncat_~s~0.base))) (and (<= 9 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))))) (= cstrncat_~s~0.offset 0)), 11367#(and (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 7 (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= 4 (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 6 (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= 5 (select |#length| cstrncat_~s~0.base))) (and (<= 11 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ 3 (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 10 (select |#length| cstrncat_~s~0.base))) (and (<= 8 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 13 (select |#length| cstrncat_~s~0.base))) (<= 12 (select |#length| cstrncat_~s~0.base))) (and (<= 9 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))))) (= cstrncat_~s~0.offset 0)), 11368#(and (= cstrncat_~s~0.offset 1) (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 11) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 12) (select |#length| cstrncat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))))), 11369#(and (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 11) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 12) (select |#length| cstrncat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))))) (= cstrncat_~s~0.offset 1)), 11370#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (or (<= (+ cstrncat_~s~0.offset 11) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1))))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))))), 11371#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (or (<= (+ cstrncat_~s~0.offset 11) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1))))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))))), 11372#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)))), 11373#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)))), 11374#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (or (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1))))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))))), 11375#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (or (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1))))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))))), 11376#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)))), 11377#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)))), 11378#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))))), 11379#(or (and (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))))), 11380#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))))), 11381#(or (and (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))))), 11382#(or (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)))), 11383#(and (or (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))) (<= 0 cstrncat_~s~0.offset)), 11384#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= 1 cstrncat_~s~0.offset) (or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)))), 11385#(or (and (<= 1 cstrncat_~s~0.offset) (or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 11386#(or (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (<= 2 cstrncat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))), 11387#(or (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (<= 2 cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 11388#(and (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= 3 cstrncat_~s~0.offset)), 11389#(and (<= 4 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)))] [2018-02-04 14:59:58,051 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 14:59:58,051 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-02-04 14:59:58,051 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-02-04 14:59:58,051 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=156, Invalid=900, Unknown=0, NotChecked=0, Total=1056 [2018-02-04 14:59:58,052 INFO L87 Difference]: Start difference. First operand 84 states and 92 transitions. Second operand 33 states. [2018-02-04 14:59:58,329 WARN L146 SmtUtils]: Spent 100ms on a formula simplification. DAG size of input: 132 DAG size of output 131 [2018-02-04 14:59:58,883 WARN L146 SmtUtils]: Spent 129ms on a formula simplification. DAG size of input: 143 DAG size of output 138 [2018-02-04 14:59:59,054 WARN L146 SmtUtils]: Spent 148ms on a formula simplification. DAG size of input: 151 DAG size of output 137 [2018-02-04 14:59:59,232 WARN L146 SmtUtils]: Spent 138ms on a formula simplification. DAG size of input: 139 DAG size of output 129 [2018-02-04 14:59:59,447 WARN L146 SmtUtils]: Spent 181ms on a formula simplification. DAG size of input: 150 DAG size of output 136 [2018-02-04 14:59:59,633 WARN L146 SmtUtils]: Spent 134ms on a formula simplification. DAG size of input: 136 DAG size of output 118 [2018-02-04 14:59:59,797 WARN L146 SmtUtils]: Spent 138ms on a formula simplification. DAG size of input: 144 DAG size of output 124 [2018-02-04 14:59:59,938 WARN L146 SmtUtils]: Spent 103ms on a formula simplification. DAG size of input: 130 DAG size of output 118 [2018-02-04 15:00:00,087 WARN L146 SmtUtils]: Spent 125ms on a formula simplification. DAG size of input: 138 DAG size of output 118 [2018-02-04 15:00:00,364 WARN L146 SmtUtils]: Spent 117ms on a formula simplification. DAG size of input: 132 DAG size of output 111 [2018-02-04 15:00:00,684 WARN L146 SmtUtils]: Spent 117ms on a formula simplification. DAG size of input: 126 DAG size of output 108 [2018-02-04 15:00:01,268 WARN L146 SmtUtils]: Spent 161ms on a formula simplification. DAG size of input: 105 DAG size of output 98 [2018-02-04 15:00:01,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 15:00:01,710 INFO L93 Difference]: Finished difference Result 144 states and 154 transitions. [2018-02-04 15:00:01,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-02-04 15:00:01,710 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 56 [2018-02-04 15:00:01,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 15:00:01,711 INFO L225 Difference]: With dead ends: 144 [2018-02-04 15:00:01,711 INFO L226 Difference]: Without dead ends: 144 [2018-02-04 15:00:01,712 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 966 ImplicationChecksByTransitivity, 8.7s TimeCoverageRelationStatistics Valid=580, Invalid=3202, Unknown=0, NotChecked=0, Total=3782 [2018-02-04 15:00:01,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-02-04 15:00:01,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 87. [2018-02-04 15:00:01,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-02-04 15:00:01,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 96 transitions. [2018-02-04 15:00:01,713 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 96 transitions. Word has length 56 [2018-02-04 15:00:01,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 15:00:01,713 INFO L432 AbstractCegarLoop]: Abstraction has 87 states and 96 transitions. [2018-02-04 15:00:01,713 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-02-04 15:00:01,713 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 96 transitions. [2018-02-04 15:00:01,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-02-04 15:00:01,713 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 15:00:01,713 INFO L351 BasicCegarLoop]: trace histogram [7, 7, 6, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 15:00:01,713 INFO L371 AbstractCegarLoop]: === Iteration 42 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 15:00:01,713 INFO L82 PathProgramCache]: Analyzing trace with hash 1441683682, now seen corresponding path program 6 times [2018-02-04 15:00:01,714 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 15:00:01,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 15:00:01,721 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 15:00:02,154 WARN L146 SmtUtils]: Spent 125ms on a formula simplification. DAG size of input: 66 DAG size of output 55 [2018-02-04 15:00:02,947 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 3 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:00:02,948 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 15:00:02,948 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29] total 29 [2018-02-04 15:00:02,948 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 15:00:02,948 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:00:02,948 INFO L182 omatonBuilderFactory]: Interpolants [11679#true, 11680#false, 11681#(<= 1 main_~n~0), 11682#(and (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 11683#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0) (= 0 |main_#t~malloc13.offset|)), 11684#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 11685#(and (= 0 |main_#t~malloc14.offset|) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~length2~0 (select |#length| |main_#t~malloc14.base|)) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 11686#(and (= 0 main_~nondetString2~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 11687#(and (= 0 main_~nondetString2~0.offset) (or (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 main_~length2~0) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 main_~length2~0 1) (select |#length| main_~nondetString1~0.base))) (and (or (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (select |#length| main_~nondetString1~0.base) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 main_~length2~0 3) (select |#length| main_~nondetString1~0.base))) (<= (+ main_~n~0 main_~length2~0 2) (select |#length| main_~nondetString1~0.base))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 main_~length2~0) (select |#length| main_~nondetString1~0.base)))) (<= 1 main_~n~0) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 11688#(and (= 0 main_~nondetString2~0.offset) (<= 1 main_~n~0) (or (and (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base)) (select |#length| main_~nondetString1~0.base)) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ main_~nondetString1~0.offset (- 1))))))) (and (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base) 2) (select |#length| main_~nondetString1~0.base)) (or (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (select |#length| main_~nondetString1~0.base) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base) 3) (select |#length| main_~nondetString1~0.base)))) (and (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (select |#length| main_~nondetString2~0.base)) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base) 1) (select |#length| main_~nondetString1~0.base)))) (= main_~nondetString1~0.offset 0)), 11689#(and (= 0 |cstrncat_#in~s1.offset|) (= 0 |cstrncat_#in~s2.offset|) (or (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- |cstrncat_#in~n|)) (- 1)))) (<= (+ (select |#length| |cstrncat_#in~s2.base|) |cstrncat_#in~n|) (select |#length| |cstrncat_#in~s1.base|))) (and (<= (+ (select |#length| |cstrncat_#in~s2.base|) |cstrncat_#in~n| 2) (select |#length| |cstrncat_#in~s1.base|)) (or (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- |cstrncat_#in~n|)) (- 1)) (- 1)))) (<= (+ (select |#length| |cstrncat_#in~s2.base|) |cstrncat_#in~n| 3) (select |#length| |cstrncat_#in~s1.base|)))) (and (<= (+ (select |#length| |cstrncat_#in~s2.base|) |cstrncat_#in~n| 1) (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (select |#length| |cstrncat_#in~s2.base|) (- 1)))))) (<= 1 |cstrncat_#in~n|)), 11690#(and (<= 1 cstrncat_~n) (= 0 cstrncat_~s2.offset) (= cstrncat_~s~0.offset 0) (or (and (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) 2) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)) (- 1)))) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) 3) (select |#length| cstrncat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base)) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (select |#length| cstrncat_~s2.base) (- 1)))) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) 1) (select |#length| cstrncat_~s~0.base))))), 11691#(and (<= 1 cstrncat_~n) (<= 1 cstrncat_~s~0.offset) (= 0 cstrncat_~s2.offset) (or (and (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (- cstrncat_~n) (select |#length| cstrncat_~s~0.base)) (- 1)) (- 1)))) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)))) (and (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- cstrncat_~n) (select |#length| cstrncat_~s~0.base)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s2.base) (+ cstrncat_~s~0.offset (- 1))) (- 1)))) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))))), 11692#(and (<= 1 cstrncat_~n) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (select |#length| cstrncat_~s2.base) 2) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1))))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)))) (= 0 cstrncat_~s2.offset) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (<= 2 cstrncat_~s~0.offset)), 11693#(and (<= 1 cstrncat_~n) (or (<= (select |#length| cstrncat_~s2.base) 2) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1))))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))) (= 0 cstrncat_~s2.offset) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (<= 2 cstrncat_~s~0.offset)), 11694#(and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= 1 cstrncat_~n) (or (<= (select |#length| cstrncat_~s2.base) 2) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)))) (<= 3 cstrncat_~s~0.offset) (= 0 cstrncat_~s2.offset))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 11695#(and (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= 1 cstrncat_~n) (or (<= (select |#length| cstrncat_~s2.base) 2) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)))) (<= 3 cstrncat_~s~0.offset) (= 0 cstrncat_~s2.offset))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 11696#(and (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (and (<= 1 cstrncat_~n) (<= 4 cstrncat_~s~0.offset) (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base))))), 11697#(and (or (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (and (<= 1 cstrncat_~n) (<= 4 cstrncat_~s~0.offset) (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 11698#(and (or (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= 5 cstrncat_~s~0.offset))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 11699#(and (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (and (<= 1 cstrncat_~n) (<= 6 cstrncat_~s~0.offset) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))))), 11700#(and (not (= |cstrncat_#t~post2.base| cstrncat_~s~0.base)) (or (and (<= (+ (select |#length| cstrncat_~s2.base) |cstrncat_#t~post2.offset|) (+ cstrncat_~s2.offset 1)) (= |cstrncat_#t~post2.offset| 0)) (and (<= 1 cstrncat_~n) (<= 6 cstrncat_~s~0.offset) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))))), 11701#(or (and (<= 1 cstrncat_~n) (<= 6 cstrncat_~s~0.offset) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1))), 11702#(or (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1)) (and (<= 7 cstrncat_~s~0.offset) (<= 0 cstrncat_~n) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base)))), 11703#(or (and (or (and (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n)) (not |cstrncat_#t~short5|)) (<= 7 cstrncat_~s~0.offset) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1))), 11704#(or (and (<= 7 cstrncat_~s~0.offset) (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset)), 11705#(or (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset) (and (or (<= cstrncat_~n 0) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= 8 cstrncat_~s~0.offset) (<= 0 cstrncat_~n))), 11706#(or (not |cstrncat_#t~short5|) (and (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= 8 cstrncat_~s~0.offset)) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset)), 11707#(or (<= (select |#length| |cstrncat_#t~post2.base|) |cstrncat_#t~post2.offset|) (and (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= 8 cstrncat_~s~0.offset))), 11708#(and (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= 8 cstrncat_~s~0.offset))] [2018-02-04 15:00:02,948 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 3 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:00:02,949 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-02-04 15:00:02,949 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-02-04 15:00:02,949 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=792, Unknown=0, NotChecked=0, Total=870 [2018-02-04 15:00:02,949 INFO L87 Difference]: Start difference. First operand 87 states and 96 transitions. Second operand 30 states. [2018-02-04 15:00:03,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 15:00:03,950 INFO L93 Difference]: Finished difference Result 118 states and 127 transitions. [2018-02-04 15:00:03,950 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-02-04 15:00:03,950 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 58 [2018-02-04 15:00:03,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 15:00:03,951 INFO L225 Difference]: With dead ends: 118 [2018-02-04 15:00:03,951 INFO L226 Difference]: Without dead ends: 97 [2018-02-04 15:00:03,951 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 592 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=209, Invalid=2241, Unknown=0, NotChecked=0, Total=2450 [2018-02-04 15:00:03,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-02-04 15:00:03,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 87. [2018-02-04 15:00:03,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-02-04 15:00:03,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 95 transitions. [2018-02-04 15:00:03,953 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 95 transitions. Word has length 58 [2018-02-04 15:00:03,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 15:00:03,953 INFO L432 AbstractCegarLoop]: Abstraction has 87 states and 95 transitions. [2018-02-04 15:00:03,953 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-02-04 15:00:03,953 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 95 transitions. [2018-02-04 15:00:03,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-02-04 15:00:03,953 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 15:00:03,953 INFO L351 BasicCegarLoop]: trace histogram [14, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 15:00:03,953 INFO L371 AbstractCegarLoop]: === Iteration 43 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 15:00:03,953 INFO L82 PathProgramCache]: Analyzing trace with hash -1662017843, now seen corresponding path program 11 times [2018-02-04 15:00:03,954 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 15:00:03,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 15:00:03,971 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 15:00:06,259 WARN L146 SmtUtils]: Spent 761ms on a formula simplification. DAG size of input: 247 DAG size of output 135 [2018-02-04 15:00:07,077 WARN L146 SmtUtils]: Spent 747ms on a formula simplification. DAG size of input: 233 DAG size of output 90 [2018-02-04 15:00:07,958 WARN L146 SmtUtils]: Spent 841ms on a formula simplification. DAG size of input: 234 DAG size of output 89 [2018-02-04 15:00:08,800 WARN L146 SmtUtils]: Spent 803ms on a formula simplification. DAG size of input: 237 DAG size of output 92 [2018-02-04 15:00:09,895 WARN L146 SmtUtils]: Spent 1036ms on a formula simplification. DAG size of input: 252 DAG size of output 97 [2018-02-04 15:00:11,069 WARN L146 SmtUtils]: Spent 1083ms on a formula simplification. DAG size of input: 255 DAG size of output 100 [2018-02-04 15:00:11,937 WARN L146 SmtUtils]: Spent 789ms on a formula simplification. DAG size of input: 226 DAG size of output 96 [2018-02-04 15:00:12,847 WARN L146 SmtUtils]: Spent 818ms on a formula simplification. DAG size of input: 229 DAG size of output 95 [2018-02-04 15:00:15,943 WARN L146 SmtUtils]: Spent 3001ms on a formula simplification. DAG size of input: 218 DAG size of output 94 [2018-02-04 15:00:16,908 WARN L146 SmtUtils]: Spent 846ms on a formula simplification. DAG size of input: 221 DAG size of output 97 [2018-02-04 15:00:17,697 WARN L146 SmtUtils]: Spent 667ms on a formula simplification. DAG size of input: 206 DAG size of output 82 [2018-02-04 15:00:18,745 WARN L146 SmtUtils]: Spent 920ms on a formula simplification. DAG size of input: 209 DAG size of output 85 [2018-02-04 15:00:19,361 WARN L146 SmtUtils]: Spent 517ms on a formula simplification. DAG size of input: 202 DAG size of output 71 [2018-02-04 15:00:19,999 WARN L146 SmtUtils]: Spent 502ms on a formula simplification. DAG size of input: 205 DAG size of output 74 [2018-02-04 15:00:20,913 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:00:20,913 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 15:00:20,913 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35] total 35 [2018-02-04 15:00:20,913 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 15:00:20,913 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:00:20,914 INFO L182 omatonBuilderFactory]: Interpolants [11968#(or (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (or (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) 2) 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) 2) (- 1))))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) 2) 4) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 4) (select |#length| cstrncat_~s~0.base))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 3) (select |#length| cstrncat_~s~0.base)))), 11969#(or (and (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)) (+ (select |#length| cstrncat_~s~0.base) (- 2)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)) (+ (select |#length| cstrncat_~s~0.base) (- 3)))) (- 1)))) (<= (+ cstrncat_~s~0.offset 1) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2)) (+ (select |#length| cstrncat_~s~0.base) (- 3)))) (- 1))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (select |#length| cstrncat_~s~0.base)) 2) 2) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) 5) (select |#length| cstrncat_~s~0.base))), 11970#(or (and (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)) (+ (select |#length| cstrncat_~s~0.base) (- 2)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)) (+ (select |#length| cstrncat_~s~0.base) (- 3)))) (- 1)))) (<= (+ cstrncat_~s~0.offset 1) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2)) (+ (select |#length| cstrncat_~s~0.base) (- 3)))) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (select |#length| cstrncat_~s~0.base)) 2) 2) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) 5) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 11971#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2) 1))) (and (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2) 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2) (- 1))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) 3)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) (- 1))))) (and (or (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 1)) 2) 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 1)) 2) (- 1))))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 1)) 2) 4) (select |#length| cstrncat_~s~0.base))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2)) (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4)))) (- 1)))))), 11972#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2) 1))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2) 3) (select |#length| cstrncat_~s~0.base))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) 3)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (or (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 1)) 2) 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 1)) 2) (- 1))))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 1)) 2) 4) (select |#length| cstrncat_~s~0.base))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2)) (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4)))) (- 1)))))), 11973#(or (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 6))) 2) 4)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) 2) 4) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) 2) 5) (select |#length| cstrncat_~s~0.base)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) 2) 3) (select |#length| cstrncat_~s~0.base))) (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 6))) 2) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 6))) 2)) (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 6))) 2) 3))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) (- 1)))))), 11974#(or (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 6))) 2) 4)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) 2) 4) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) 2) 5) (select |#length| cstrncat_~s~0.base)))) (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 6))) 2) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 6))) 2)) (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 6))) 2) 3))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) (- 1)))))), 11975#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 4)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2) 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 5)) (- 1))))), 11976#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 4)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2) 5) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 5)) (- 1))))), 11977#(or (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 5)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 11978#(or (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 5)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 11979#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 11980#(or (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 11981#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3))), 11982#(or (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 11983#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))), 11984#(or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 11985#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))), 11986#(or (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 11987#(or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset)), 11988#(and (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= 0 cstrncat_~s~0.offset)), 11989#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))), 11954#true, 11955#false, 11956#(<= 1 main_~n~0), 11957#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (<= 1 main_~n~0) (= 1 (select |#valid| |main_#t~malloc13.base|)) (= 0 |main_#t~malloc13.offset|)), 11958#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (= 1 (select |#valid| main_~nondetString1~0.base)) (= main_~nondetString1~0.offset 0)), 11959#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (not (= |main_#t~malloc14.base| main_~nondetString1~0.base)) (= main_~nondetString1~0.offset 0)), 11960#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 11961#(and (or (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 5) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) main_~nondetString1~0.offset))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~nondetString1~0.offset)) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 2) (+ main_~n~0 (select |#length| main_~nondetString1~0.base)))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) 1)) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (- main_~nondetString1~0.offset) 3)) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 3) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) main_~nondetString1~0.offset))) (and (<= 2 main_~n~0) (<= (+ (* 2 main_~n~0) 1) (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ main_~nondetString1~0.offset (+ (select |#length| main_~nondetString1~0.base) (- 1))))))) (and (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 3) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1))))))) (and (<= (+ main_~n~0 3) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) main_~nondetString1~0.offset)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) (+ main_~nondetString1~0.offset (- 1))))))) (and (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 5))) 2) 4) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (or (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 5))) 2) 5) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 5))) 2) (+ main_~nondetString1~0.offset (- 1)))))))) (and (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 1) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ main_~nondetString1~0.offset (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1))))))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 4) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) main_~nondetString1~0.offset))) (and (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 4) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ main_~nondetString1~0.offset (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) (- 1)))))))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 11962#(and (= 0 |cstrncat_#in~s1.offset|) (or (and (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) 2) (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1))))) (and (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) 4) (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) (- 1))))) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2) (- 1)))) (<= 4 (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2))) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ 3 (- 1)))) (<= 3 (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2))) (and (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 5) 2) 4) (select |#length| |cstrncat_#in~s1.base|)) (or (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 5) 2) 5) (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 5) 2) (- 1)))))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) 1)) (and (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) 3) (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (select |#length| |cstrncat_#in~s1.base|) 2) (- 1)))) (<= 3 (div (select |#length| |cstrncat_#in~s1.base|) 2))) (and (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) 1) (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (- (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) 2)) (select |#length| |cstrncat_#in~s1.base|)) (- 1)))) (<= 2 (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) 2))) (and (<= 5 (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2) (- 1)) (- 1))))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) |cstrncat_#in~s1.offset|)))), 11963#(and (or (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= 2 (div (+ (select |#length| cstrncat_~s~0.base) (- 3)) 2))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2) (- 1)) (- 1)))) (<= 6 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2))) (<= 5 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2))) (<= 2 (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2))) (and (<= 3 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) 3) (select |#length| cstrncat_~s~0.base))) (and (<= 4 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2) (- 1))))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 2) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (select |#length| cstrncat_~s~0.base) 2) (- 1)))) (<= 3 (div (select |#length| cstrncat_~s~0.base) 2)))) (= cstrncat_~s~0.offset 0)), 11964#(and (= cstrncat_~s~0.offset 0) (or (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= 2 (div (+ (select |#length| cstrncat_~s~0.base) (- 3)) 2))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2) (- 1)) (- 1)))) (<= 6 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2))) (<= 5 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2))) (<= 2 (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2))) (and (<= 3 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ 3 (- 1))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) 3) (select |#length| cstrncat_~s~0.base))) (and (<= 4 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2) (- 1))))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 2) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (select |#length| cstrncat_~s~0.base) 2) (- 1)))) (<= 3 (div (select |#length| cstrncat_~s~0.base) 2))))), 11965#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= cstrncat_~s~0.offset 1)) (and (<= (+ cstrncat_~s~0.offset 3) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) (- 1))))) (and (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 1) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) 5) (select |#length| cstrncat_~s~0.base))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) 4) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) 2) 2) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 4) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)))), 11966#(or (and (<= (+ cstrncat_~s~0.offset 3) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) (- 1))))) (and (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 1) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= cstrncat_~s~0.offset 1) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) 5) (select |#length| cstrncat_~s~0.base))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) 4) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) 2) 2) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 4) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)))), 11967#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (or (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) 2) 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) 2) (- 1))))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) 2) 4) (select |#length| cstrncat_~s~0.base))) (and (or (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrncat_~s~0.offset 1) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2))) (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 4) (select |#length| cstrncat_~s~0.base))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 3) (select |#length| cstrncat_~s~0.base))))] [2018-02-04 15:00:20,914 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:00:20,914 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-02-04 15:00:20,914 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-02-04 15:00:20,915 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=193, Invalid=1067, Unknown=0, NotChecked=0, Total=1260 [2018-02-04 15:00:20,915 INFO L87 Difference]: Start difference. First operand 87 states and 95 transitions. Second operand 36 states. [2018-02-04 15:00:21,332 WARN L146 SmtUtils]: Spent 188ms on a formula simplification. DAG size of input: 150 DAG size of output 149 [2018-02-04 15:00:21,619 WARN L143 SmtUtils]: Spent 198ms on a formula simplification that was a NOOP. DAG size: 167 [2018-02-04 15:00:21,858 WARN L143 SmtUtils]: Spent 180ms on a formula simplification that was a NOOP. DAG size: 170 [2018-02-04 15:00:22,151 WARN L143 SmtUtils]: Spent 178ms on a formula simplification that was a NOOP. DAG size: 176 [2018-02-04 15:00:22,621 WARN L146 SmtUtils]: Spent 422ms on a formula simplification. DAG size of input: 182 DAG size of output 180 [2018-02-04 15:00:23,090 WARN L146 SmtUtils]: Spent 375ms on a formula simplification. DAG size of input: 179 DAG size of output 175 [2018-02-04 15:00:23,480 WARN L146 SmtUtils]: Spent 349ms on a formula simplification. DAG size of input: 186 DAG size of output 170 [2018-02-04 15:00:23,908 WARN L146 SmtUtils]: Spent 292ms on a formula simplification. DAG size of input: 183 DAG size of output 166 [2018-02-04 15:00:24,337 WARN L146 SmtUtils]: Spent 367ms on a formula simplification. DAG size of input: 200 DAG size of output 177 [2018-02-04 15:00:24,737 WARN L146 SmtUtils]: Spent 279ms on a formula simplification. DAG size of input: 178 DAG size of output 151 [2018-02-04 15:00:25,269 WARN L146 SmtUtils]: Spent 460ms on a formula simplification. DAG size of input: 193 DAG size of output 161 [2018-02-04 15:00:25,633 WARN L146 SmtUtils]: Spent 259ms on a formula simplification. DAG size of input: 175 DAG size of output 151 [2018-02-04 15:00:25,999 WARN L146 SmtUtils]: Spent 268ms on a formula simplification. DAG size of input: 188 DAG size of output 155 [2018-02-04 15:00:26,329 WARN L146 SmtUtils]: Spent 222ms on a formula simplification. DAG size of input: 150 DAG size of output 140 [2018-02-04 15:00:26,646 WARN L146 SmtUtils]: Spent 250ms on a formula simplification. DAG size of input: 158 DAG size of output 143 [2018-02-04 15:00:27,033 WARN L146 SmtUtils]: Spent 324ms on a formula simplification. DAG size of input: 137 DAG size of output 122 [2018-02-04 15:00:27,340 WARN L146 SmtUtils]: Spent 192ms on a formula simplification. DAG size of input: 140 DAG size of output 125 [2018-02-04 15:00:27,602 WARN L146 SmtUtils]: Spent 195ms on a formula simplification. DAG size of input: 129 DAG size of output 119 [2018-02-04 15:00:27,963 WARN L146 SmtUtils]: Spent 305ms on a formula simplification. DAG size of input: 132 DAG size of output 122 [2018-02-04 15:00:28,235 WARN L146 SmtUtils]: Spent 209ms on a formula simplification. DAG size of input: 120 DAG size of output 114 [2018-02-04 15:00:28,491 WARN L146 SmtUtils]: Spent 195ms on a formula simplification. DAG size of input: 123 DAG size of output 117 [2018-02-04 15:00:28,713 WARN L146 SmtUtils]: Spent 172ms on a formula simplification. DAG size of input: 113 DAG size of output 108 [2018-02-04 15:00:28,919 WARN L146 SmtUtils]: Spent 162ms on a formula simplification. DAG size of input: 116 DAG size of output 111 [2018-02-04 15:00:29,131 WARN L146 SmtUtils]: Spent 168ms on a formula simplification. DAG size of input: 106 DAG size of output 102 [2018-02-04 15:00:29,359 WARN L146 SmtUtils]: Spent 180ms on a formula simplification. DAG size of input: 109 DAG size of output 105 [2018-02-04 15:00:29,594 WARN L146 SmtUtils]: Spent 169ms on a formula simplification. DAG size of input: 99 DAG size of output 96 [2018-02-04 15:00:29,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 15:00:29,748 INFO L93 Difference]: Finished difference Result 147 states and 157 transitions. [2018-02-04 15:00:29,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-02-04 15:00:29,749 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 59 [2018-02-04 15:00:29,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 15:00:29,749 INFO L225 Difference]: With dead ends: 147 [2018-02-04 15:00:29,749 INFO L226 Difference]: Without dead ends: 147 [2018-02-04 15:00:29,750 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1335 ImplicationChecksByTransitivity, 23.5s TimeCoverageRelationStatistics Valid=758, Invalid=3664, Unknown=0, NotChecked=0, Total=4422 [2018-02-04 15:00:29,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-02-04 15:00:29,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 90. [2018-02-04 15:00:29,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-02-04 15:00:29,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 99 transitions. [2018-02-04 15:00:29,752 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 99 transitions. Word has length 59 [2018-02-04 15:00:29,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 15:00:29,752 INFO L432 AbstractCegarLoop]: Abstraction has 90 states and 99 transitions. [2018-02-04 15:00:29,752 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-02-04 15:00:29,752 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 99 transitions. [2018-02-04 15:00:29,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-02-04 15:00:29,753 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 15:00:29,753 INFO L351 BasicCegarLoop]: trace histogram [8, 8, 7, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 15:00:29,753 INFO L371 AbstractCegarLoop]: === Iteration 44 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 15:00:29,753 INFO L82 PathProgramCache]: Analyzing trace with hash 361416123, now seen corresponding path program 7 times [2018-02-04 15:00:29,753 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 15:00:29,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 15:00:29,760 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 15:00:30,301 WARN L146 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 70 DAG size of output 68 [2018-02-04 15:00:30,530 WARN L146 SmtUtils]: Spent 103ms on a formula simplification. DAG size of input: 79 DAG size of output 77 [2018-02-04 15:00:31,485 INFO L134 CoverageAnalysis]: Checked inductivity of 101 backedges. 0 proven. 101 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:00:31,486 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 15:00:31,486 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32] total 32 [2018-02-04 15:00:31,486 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 15:00:31,486 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:00:31,487 INFO L182 omatonBuilderFactory]: Interpolants [12289#true, 12290#false, 12291#(<= 1 main_~n~0), 12292#(and (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 12293#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0) (= 0 |main_#t~malloc13.offset|)), 12294#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (or (= (+ main_~nondetString1~0.offset main_~length1~0) (+ (* 2 main_~n~0) 1)) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0)), 12295#(and (not (= main_~nondetString1~0.base |main_#t~malloc14.base|)) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~length2~0 (select |#length| |main_#t~malloc14.base|)) (<= 1 main_~n~0) (or (= (+ main_~nondetString1~0.offset main_~length1~0) (+ (* 2 main_~n~0) 1)) (and (= 0 |main_#t~malloc14.offset|) (<= (+ main_~n~0 main_~length2~0) main_~length1~0))) (= main_~nondetString1~0.offset 0)), 12296#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (or (= (+ main_~nondetString1~0.offset main_~length1~0) (+ (* 2 main_~n~0) 1)) (and (= 0 main_~nondetString2~0.offset) (<= (+ main_~n~0 main_~length2~0) main_~length1~0))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 12297#(and (<= 1 main_~n~0) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0) (or (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~n~0)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ (* 2 main_~n~0) 1) (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (= 0 main_~nondetString2~0.offset) (or (and (<= (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) (select |#length| main_~nondetString1~0.base)) (or (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 1) (select |#length| main_~nondetString1~0.base)))) (and (<= (+ main_~n~0 main_~length2~0) (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2)) (or (<= (+ main_~n~0 main_~length2~0 1) (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ main_~nondetString1~0.offset (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) (- 1)))))))) (and (<= (+ main_~n~0 main_~length2~0) (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) (+ main_~nondetString1~0.offset (- 1))))))))))), 12298#(and (or (and (= 0 (select (select |#memory_int| main_~nondetString1~0.base) main_~n~0)) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ (* 2 main_~n~0) 1) (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (= 0 main_~nondetString2~0.offset) (or (and (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base)) (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2)) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) (+ main_~nondetString1~0.offset (- 1))))))) (and (or (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 1) (select |#length| main_~nondetString1~0.base)) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ main_~nondetString1~0.offset (- 1))))))) (<= (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) (select |#length| main_~nondetString1~0.base))) (and (or (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base) 1) (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2)) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ main_~nondetString1~0.offset (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) (- 1))))))) (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base)) (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2)))))) (<= 1 main_~n~0) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 12299#(and (= 0 |cstrncat_#in~s1.offset|) (or (and (<= |cstrncat_#in~n| (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 3)) 2)) (or (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- |cstrncat_#in~n|)) (- 1)))) (<= (+ |cstrncat_#in~n| 1) (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 3)) 2)))) (and (<= |cstrncat_#in~n| (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) 2)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) 2))) (or (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- |cstrncat_#in~n|)) (- 1)))) (<= (+ |cstrncat_#in~n| 1) (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) 2)))) (and (= 0 |cstrncat_#in~s2.offset|) (or (and (<= (select |#length| |cstrncat_#in~s2.base|) (div (select |#length| |cstrncat_#in~s1.base|) 2)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (select |#length| |cstrncat_#in~s1.base|) 2) (- 1))))) (and (or (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- |cstrncat_#in~n|)) (- 1)))) (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) |cstrncat_#in~n| 1) (select |#length| |cstrncat_#in~s1.base|))) (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) |cstrncat_#in~n|) (select |#length| |cstrncat_#in~s1.base|))) (and (<= (select |#length| |cstrncat_#in~s2.base|) (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2)) (or (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2) (- 1)))) (<= (+ (select |#length| |cstrncat_#in~s2.base|) 1) (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2))))))) (<= 1 |cstrncat_#in~n|)), 12300#(and (<= 1 cstrncat_~n) (or (and (= 0 cstrncat_~s2.offset) (or (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= (+ cstrncat_~n (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 1) (select |#length| cstrncat_~s~0.base))) (<= (+ cstrncat_~n (div (+ (select |#length| cstrncat_~s~0.base) 3) 2)) (select |#length| cstrncat_~s~0.base))) (and (or (<= (+ (select |#length| cstrncat_~s2.base) 1) (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2) (- 1))))) (<= (select |#length| cstrncat_~s2.base) (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2))) (and (<= (select |#length| cstrncat_~s2.base) (div (select |#length| cstrncat_~s~0.base) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (select |#length| cstrncat_~s~0.base) 2) (- 1))))))) (and (or (<= (+ cstrncat_~n 1) (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1))))) (<= cstrncat_~n (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2)))) (and (<= cstrncat_~n (div (+ (select |#length| cstrncat_~s~0.base) (- 3)) 2)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= (+ cstrncat_~n 1) (div (+ (select |#length| cstrncat_~s~0.base) (- 3)) 2))))) (= cstrncat_~s~0.offset 0)), 12301#(and (<= 1 cstrncat_~n) (or (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2) 1)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2)))) (and (= 0 cstrncat_~s2.offset) (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2) (- 1)))) (<= (+ (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2) 1))) (and (<= (+ cstrncat_~n (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2)) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= (+ cstrncat_~n (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) 1) (select |#length| cstrncat_~s~0.base)))) (and (or (<= (+ (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) (- 1))))) (<= (+ (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) 1)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)))))), 12302#(and (<= 1 cstrncat_~n) (or (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2))) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 1)))) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2) 2)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2) 1)))) (and (or (and (or (<= (+ cstrncat_~s~0.offset 3) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) (- 1))))) (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) cstrncat_~n) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) cstrncat_~n 1) (select |#length| cstrncat_~s~0.base)))) (<= (select |#length| cstrncat_~s2.base) 2)) (= 0 cstrncat_~s2.offset)))), 12303#(and (<= 1 cstrncat_~n) (or (and (= 0 cstrncat_~s2.offset) (or (and (or (<= (+ cstrncat_~s~0.offset 3) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) (- 1))))) (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) cstrncat_~n) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) cstrncat_~n 1) (select |#length| cstrncat_~s~0.base)))) (<= (select |#length| cstrncat_~s2.base) 2) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))))) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2))) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 1)))) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2) 2)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2) 1)))))), 12304#(and (<= 1 cstrncat_~n) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2) 3)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2) 2)))) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 3)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2))) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 2)))) (and (= 0 cstrncat_~s2.offset) (or (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= (+ cstrncat_~n (div (+ cstrncat_~s~0.offset (select |#length| cstrncat_~s~0.base)) 2) 1) (select |#length| cstrncat_~s~0.base))) (<= (+ cstrncat_~n (div (+ cstrncat_~s~0.offset (select |#length| cstrncat_~s~0.base)) 2)) (select |#length| cstrncat_~s~0.base))) (<= (select |#length| cstrncat_~s2.base) 2))))), 12305#(and (<= 1 cstrncat_~n) (or (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2) 3)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2) 2)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 3)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2))) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 2)))) (and (= 0 cstrncat_~s2.offset) (or (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= (+ cstrncat_~n (div (+ cstrncat_~s~0.offset (select |#length| cstrncat_~s~0.base)) 2) 1) (select |#length| cstrncat_~s~0.base))) (<= (+ cstrncat_~n (div (+ cstrncat_~s~0.offset (select |#length| cstrncat_~s~0.base)) 2)) (select |#length| cstrncat_~s~0.base))) (<= (select |#length| cstrncat_~s2.base) 2))))), 12306#(and (<= 1 cstrncat_~n) (or (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= cstrncat_~n 2)) (<= cstrncat_~n 3)) (and (= 0 cstrncat_~s2.offset) (or (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) 2))))), 12307#(and (<= 1 cstrncat_~n) (or (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= cstrncat_~n 2)) (<= cstrncat_~n 3)) (and (= 0 cstrncat_~s2.offset) (or (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))))), 12308#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) (and (or (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) 2)) (= 0 cstrncat_~s2.offset))), 12309#(or (and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (or (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) 2)) (= 0 cstrncat_~s2.offset))), 12310#(or (and (= 0 cstrncat_~s2.offset) (or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) 2))) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)))), 12311#(or (and (= 0 cstrncat_~s2.offset) (or (<= (select |#length| cstrncat_~s2.base) 2) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)))) (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base)))), 12312#(or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (and (or (<= (+ (select |#length| cstrncat_~s2.base) |cstrncat_#t~post2.offset|) (+ cstrncat_~s2.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (= |cstrncat_#t~post2.offset| 0))), 12313#(or (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1))), 12314#(or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1)) (and (<= 0 cstrncat_~n) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base)))), 12315#(or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (and (or (and (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n)) (not |cstrncat_#t~short5|)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1))), 12316#(or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (and (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset)), 12317#(and (or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (and (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset)) (<= 0 cstrncat_~s~0.offset)), 12318#(and (<= 1 cstrncat_~s~0.offset) (or (and (<= cstrncat_~n 0) (<= 0 cstrncat_~n)) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset))), 12319#(and (<= 1 cstrncat_~s~0.offset) (or (not |cstrncat_#t~short5|) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset))), 12320#(and (<= 1 cstrncat_~s~0.offset) (or (<= (select |#length| |cstrncat_#t~post2.base|) |cstrncat_#t~post2.offset|) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)))), 12321#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)))] [2018-02-04 15:00:31,487 INFO L134 CoverageAnalysis]: Checked inductivity of 101 backedges. 0 proven. 101 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:00:31,487 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-02-04 15:00:31,487 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-02-04 15:00:31,487 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=113, Invalid=943, Unknown=0, NotChecked=0, Total=1056 [2018-02-04 15:00:31,487 INFO L87 Difference]: Start difference. First operand 90 states and 99 transitions. Second operand 33 states. [2018-02-04 15:00:31,838 WARN L146 SmtUtils]: Spent 105ms on a formula simplification. DAG size of input: 105 DAG size of output 90 [2018-02-04 15:00:32,017 WARN L143 SmtUtils]: Spent 100ms on a formula simplification that was a NOOP. DAG size: 126 [2018-02-04 15:00:32,289 WARN L146 SmtUtils]: Spent 216ms on a formula simplification. DAG size of input: 147 DAG size of output 137 [2018-02-04 15:00:32,432 WARN L143 SmtUtils]: Spent 109ms on a formula simplification that was a NOOP. DAG size: 139 [2018-02-04 15:00:32,772 WARN L146 SmtUtils]: Spent 287ms on a formula simplification. DAG size of input: 167 DAG size of output 148 [2018-02-04 15:00:33,116 WARN L146 SmtUtils]: Spent 300ms on a formula simplification. DAG size of input: 170 DAG size of output 151 [2018-02-04 15:00:33,398 WARN L146 SmtUtils]: Spent 223ms on a formula simplification. DAG size of input: 146 DAG size of output 141 [2018-02-04 15:00:33,737 WARN L146 SmtUtils]: Spent 294ms on a formula simplification. DAG size of input: 159 DAG size of output 151 [2018-02-04 15:00:33,953 WARN L146 SmtUtils]: Spent 167ms on a formula simplification. DAG size of input: 123 DAG size of output 118 [2018-02-04 15:00:34,185 WARN L146 SmtUtils]: Spent 200ms on a formula simplification. DAG size of input: 133 DAG size of output 127 [2018-02-04 15:00:34,375 WARN L146 SmtUtils]: Spent 155ms on a formula simplification. DAG size of input: 115 DAG size of output 113 [2018-02-04 15:00:34,627 WARN L146 SmtUtils]: Spent 211ms on a formula simplification. DAG size of input: 118 DAG size of output 116 [2018-02-04 15:00:34,823 WARN L146 SmtUtils]: Spent 140ms on a formula simplification. DAG size of input: 102 DAG size of output 99 [2018-02-04 15:00:35,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 15:00:35,290 INFO L93 Difference]: Finished difference Result 128 states and 137 transitions. [2018-02-04 15:00:35,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-02-04 15:00:35,291 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 61 [2018-02-04 15:00:35,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 15:00:35,291 INFO L225 Difference]: With dead ends: 128 [2018-02-04 15:00:35,291 INFO L226 Difference]: Without dead ends: 128 [2018-02-04 15:00:35,292 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 812 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=351, Invalid=2511, Unknown=0, NotChecked=0, Total=2862 [2018-02-04 15:00:35,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-02-04 15:00:35,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 90. [2018-02-04 15:00:35,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-02-04 15:00:35,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 99 transitions. [2018-02-04 15:00:35,293 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 99 transitions. Word has length 61 [2018-02-04 15:00:35,293 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 15:00:35,293 INFO L432 AbstractCegarLoop]: Abstraction has 90 states and 99 transitions. [2018-02-04 15:00:35,293 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-02-04 15:00:35,293 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 99 transitions. [2018-02-04 15:00:35,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-02-04 15:00:35,293 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 15:00:35,293 INFO L351 BasicCegarLoop]: trace histogram [6, 6, 5, 4, 4, 4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 15:00:35,293 INFO L371 AbstractCegarLoop]: === Iteration 45 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 15:00:35,293 INFO L82 PathProgramCache]: Analyzing trace with hash -45298072, now seen corresponding path program 8 times [2018-02-04 15:00:35,294 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 15:00:35,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 15:00:35,300 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 15:00:35,946 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 13 proven. 68 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:00:35,947 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 15:00:35,947 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29] total 29 [2018-02-04 15:00:35,947 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 15:00:35,947 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:00:35,947 INFO L182 omatonBuilderFactory]: Interpolants [12608#(and (or (and (or (<= cstrncat_~n 0) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= 0 cstrncat_~n)) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset)) (<= 8 cstrncat_~s~0.offset)), 12609#(or (not |cstrncat_#t~short5|) (and (or (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset)) (<= 8 cstrncat_~s~0.offset))), 12610#(and (<= 8 cstrncat_~s~0.offset) (or (<= (select |#length| |cstrncat_#t~post2.base|) |cstrncat_#t~post2.offset|) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)))), 12611#(and (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= 8 cstrncat_~s~0.offset)), 12582#true, 12583#false, 12584#(<= 1 main_~n~0), 12585#(and (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 12586#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0) (= 0 |main_#t~malloc13.offset|)), 12587#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 12588#(and (= 0 |main_#t~malloc14.offset|) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~length2~0 (select |#length| |main_#t~malloc14.base|)) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 12589#(and (= 0 main_~nondetString2~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 12590#(and (= 0 main_~nondetString2~0.offset) (or (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 main_~length2~0 1) (select |#length| main_~nondetString1~0.base))) (<= 1 main_~n~0) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (<= (+ main_~n~0 main_~length2~0) (select |#length| main_~nondetString1~0.base)) (= main_~nondetString1~0.offset 0)), 12591#(and (= 0 main_~nondetString2~0.offset) (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base)) (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (or (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base) 1) (select |#length| main_~nondetString1~0.base)) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ main_~nondetString1~0.offset (- 1))))))) (= main_~nondetString1~0.offset 0)), 12592#(and (= 0 |cstrncat_#in~s1.offset|) (= 0 |cstrncat_#in~s2.offset|) (or (<= (+ (select |#length| |cstrncat_#in~s2.base|) |cstrncat_#in~n| 1) (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (- |cstrncat_#in~n|) (select |#length| |cstrncat_#in~s1.base|)) (- 1))))) (<= (+ (select |#length| |cstrncat_#in~s2.base|) |cstrncat_#in~n|) (select |#length| |cstrncat_#in~s1.base|)) (<= 1 |cstrncat_#in~n|)), 12593#(and (<= 1 cstrncat_~n) (= 0 cstrncat_~s2.offset) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base)) (select |#length| cstrncat_~s~0.base)) (= cstrncat_~s~0.offset 0) (or (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))))), 12594#(and (<= 1 cstrncat_~n) (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) 1)) (= 0 cstrncat_~s2.offset) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- cstrncat_~n) (select |#length| cstrncat_~s~0.base)) (- 1)))) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base)))), 12595#(and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) 2)) (or (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- cstrncat_~n) (select |#length| cstrncat_~s~0.base)) (- 1))))) (= 0 cstrncat_~s2.offset) (<= 2 cstrncat_~s~0.offset)), 12596#(and (or (and (<= 1 cstrncat_~n) (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) 3))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (<= 3 cstrncat_~s~0.offset) (= 0 cstrncat_~s2.offset)), 12597#(and (<= 3 cstrncat_~s~0.offset) (= 0 cstrncat_~s2.offset) (or (and (<= 1 cstrncat_~n) (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) 3))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))))), 12598#(and (<= 1 cstrncat_~n) (or (<= (select |#length| cstrncat_~s2.base) 3) (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))) (<= 4 cstrncat_~s~0.offset) (= 0 cstrncat_~s2.offset)), 12599#(and (<= 1 cstrncat_~n) (= 0 cstrncat_~s2.offset) (<= 5 cstrncat_~s~0.offset) (or (<= (select |#length| cstrncat_~s2.base) 3) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base)))), 12600#(and (<= 1 cstrncat_~n) (or (<= (+ |cstrncat_#t~post2.offset| (select |#length| cstrncat_~s2.base)) (+ cstrncat_~s2.offset 2)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (= |cstrncat_#t~post2.offset| 0) (<= 5 cstrncat_~s~0.offset)), 12601#(and (<= 1 cstrncat_~n) (or (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 2)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= 5 cstrncat_~s~0.offset)), 12602#(and (or (<= cstrncat_~n 0) (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 2)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= 6 cstrncat_~s~0.offset) (<= 0 cstrncat_~n)), 12603#(or (not |cstrncat_#t~short5|) (and (or (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 2)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (not (= cstrncat_~n 0)) (<= 6 cstrncat_~s~0.offset) (<= 0 cstrncat_~n))), 12604#(and (or (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (not (= cstrncat_~n 0)) (<= 6 cstrncat_~s~0.offset) (<= 0 cstrncat_~n)), 12605#(and (<= 7 cstrncat_~s~0.offset) (or (<= cstrncat_~n 0) (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= 0 cstrncat_~n)), 12606#(and (<= 7 cstrncat_~s~0.offset) (or (not |cstrncat_#t~short5|) (and (or (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n)))), 12607#(and (<= 7 cstrncat_~s~0.offset) (not (= cstrncat_~n 0)) (or (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= 0 cstrncat_~n))] [2018-02-04 15:00:35,947 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 13 proven. 68 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:00:35,948 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-02-04 15:00:35,948 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-02-04 15:00:35,948 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=786, Unknown=0, NotChecked=0, Total=870 [2018-02-04 15:00:35,948 INFO L87 Difference]: Start difference. First operand 90 states and 99 transitions. Second operand 30 states. [2018-02-04 15:00:36,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 15:00:36,687 INFO L93 Difference]: Finished difference Result 128 states and 137 transitions. [2018-02-04 15:00:36,687 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-02-04 15:00:36,687 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 62 [2018-02-04 15:00:36,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 15:00:36,687 INFO L225 Difference]: With dead ends: 128 [2018-02-04 15:00:36,687 INFO L226 Difference]: Without dead ends: 100 [2018-02-04 15:00:36,688 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 532 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=220, Invalid=2036, Unknown=0, NotChecked=0, Total=2256 [2018-02-04 15:00:36,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-02-04 15:00:36,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 90. [2018-02-04 15:00:36,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-02-04 15:00:36,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 98 transitions. [2018-02-04 15:00:36,689 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 98 transitions. Word has length 62 [2018-02-04 15:00:36,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 15:00:36,689 INFO L432 AbstractCegarLoop]: Abstraction has 90 states and 98 transitions. [2018-02-04 15:00:36,689 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-02-04 15:00:36,689 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 98 transitions. [2018-02-04 15:00:36,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-02-04 15:00:36,689 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 15:00:36,689 INFO L351 BasicCegarLoop]: trace histogram [15, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 15:00:36,689 INFO L371 AbstractCegarLoop]: === Iteration 46 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 15:00:36,689 INFO L82 PathProgramCache]: Analyzing trace with hash -790573804, now seen corresponding path program 12 times [2018-02-04 15:00:36,690 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 15:00:36,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 15:00:36,700 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 15:00:48,192 WARN L146 SmtUtils]: Spent 986ms on a formula simplification. DAG size of input: 249 DAG size of output 125 [2018-02-04 15:00:48,962 WARN L146 SmtUtils]: Spent 699ms on a formula simplification. DAG size of input: 205 DAG size of output 87 [2018-02-04 15:00:49,762 WARN L146 SmtUtils]: Spent 763ms on a formula simplification. DAG size of input: 205 DAG size of output 87 [2018-02-04 15:00:50,603 WARN L146 SmtUtils]: Spent 796ms on a formula simplification. DAG size of input: 208 DAG size of output 90 [2018-02-04 15:00:51,456 WARN L146 SmtUtils]: Spent 801ms on a formula simplification. DAG size of input: 226 DAG size of output 98 [2018-02-04 15:00:52,300 WARN L146 SmtUtils]: Spent 793ms on a formula simplification. DAG size of input: 229 DAG size of output 101 [2018-02-04 15:00:52,988 WARN L146 SmtUtils]: Spent 643ms on a formula simplification. DAG size of input: 185 DAG size of output 88 [2018-02-04 15:00:53,659 WARN L146 SmtUtils]: Spent 622ms on a formula simplification. DAG size of input: 188 DAG size of output 91 [2018-02-04 15:00:54,173 WARN L146 SmtUtils]: Spent 470ms on a formula simplification. DAG size of input: 159 DAG size of output 81 [2018-02-04 15:00:54,712 WARN L146 SmtUtils]: Spent 493ms on a formula simplification. DAG size of input: 162 DAG size of output 84 [2018-02-04 15:00:55,172 WARN L146 SmtUtils]: Spent 412ms on a formula simplification. DAG size of input: 135 DAG size of output 74 [2018-02-04 15:00:55,585 WARN L146 SmtUtils]: Spent 352ms on a formula simplification. DAG size of input: 138 DAG size of output 77 [2018-02-04 15:00:55,932 WARN L146 SmtUtils]: Spent 307ms on a formula simplification. DAG size of input: 113 DAG size of output 67 [2018-02-04 15:00:56,282 WARN L146 SmtUtils]: Spent 297ms on a formula simplification. DAG size of input: 116 DAG size of output 70 [2018-02-04 15:00:56,493 WARN L146 SmtUtils]: Spent 171ms on a formula simplification. DAG size of input: 93 DAG size of output 60 [2018-02-04 15:00:56,719 WARN L146 SmtUtils]: Spent 184ms on a formula simplification. DAG size of input: 96 DAG size of output 63 [2018-02-04 15:00:57,000 WARN L146 SmtUtils]: Spent 107ms on a formula simplification. DAG size of input: 78 DAG size of output 56 [2018-02-04 15:00:57,628 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:00:57,628 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 15:00:57,628 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36] total 36 [2018-02-04 15:00:57,628 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 15:00:57,628 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:00:57,629 INFO L182 omatonBuilderFactory]: Interpolants [12866#true, 12867#false, 12868#(<= 1 main_~n~0), 12869#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (<= 1 main_~n~0) (= 1 (select |#valid| |main_#t~malloc13.base|)) (= 0 |main_#t~malloc13.offset|)), 12870#(and (or (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (= 0 main_~nondetString1~0.offset) (= 1 (select |#valid| main_~nondetString1~0.base))), 12871#(and (or (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (= 0 main_~nondetString1~0.offset) (not (= |main_#t~malloc14.base| main_~nondetString1~0.base))), 12872#(and (or (and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 1)) (= (+ main_~nondetString1~0.offset main_~length1~0) (+ main_~n~0 2))) (= 0 main_~nondetString1~0.offset) (not (= main_~nondetString1~0.base main_~nondetString2~0.base))), 12873#(and (= 0 main_~nondetString1~0.offset) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (or (and (<= 8 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1))))))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 10 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (- main_~nondetString1~0.offset) 3)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 13 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~nondetString1~0.offset)) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (+ (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 11 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 6 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 9 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 12 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (<= 14 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (or (<= 15 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))))) (and (<= 4 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ main_~nondetString1~0.offset (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1))))))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 7 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) 1)) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= 5 (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))))), 12874#(and (= 0 |cstrncat_#in~s1.offset|) (or (and (<= 5 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1))))) (and (<= 11 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= 12 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= 9 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) |cstrncat_#in~s1.offset|)) (and (<= 4 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ 3 (- 1)))) (<= 13 (select |#length| |cstrncat_#in~s1.base|))) (and (<= 10 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) 1)) (and (<= 6 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= 8 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (or (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 15 (select |#length| |cstrncat_#in~s1.base|))) (<= 14 (select |#length| |cstrncat_#in~s1.base|))) (and (<= 7 (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))))), 12875#(and (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= 4 (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 6 (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (<= 13 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ 3 (- 1))))) (and (<= 8 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 12 (select |#length| cstrncat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 15 (select |#length| cstrncat_~s~0.base))) (<= 14 (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 7 (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 11 (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= 5 (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 10 (select |#length| cstrncat_~s~0.base))) (and (<= 9 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))))) (= cstrncat_~s~0.offset 0)), 12876#(and (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= 4 (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 6 (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (<= 13 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ 3 (- 1))))) (and (<= 8 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 12 (select |#length| cstrncat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 15 (select |#length| cstrncat_~s~0.base))) (<= 14 (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 7 (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 11 (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= 5 (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= 10 (select |#length| cstrncat_~s~0.base))) (and (<= 9 (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))))) (= cstrncat_~s~0.offset 0)), 12877#(and (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 11) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (or (<= (+ cstrncat_~s~0.offset 14) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (<= (+ cstrncat_~s~0.offset 13) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 12) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))))) (= cstrncat_~s~0.offset 1)), 12878#(and (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 11) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (or (<= (+ cstrncat_~s~0.offset 14) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (<= (+ cstrncat_~s~0.offset 13) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 12) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))))) (= cstrncat_~s~0.offset 1)), 12879#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 12) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 13) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 11) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))))), 12880#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 12) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 13) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 11) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))))), 12881#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 11) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 12) (select |#length| cstrncat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))))), 12882#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 11) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 12) (select |#length| cstrncat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))))), 12883#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (or (<= (+ cstrncat_~s~0.offset 11) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1))))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))))), 12884#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (or (<= (+ cstrncat_~s~0.offset 11) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1))))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))))), 12885#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base)))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)))), 12886#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base)))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)))), 12887#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (or (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1))))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))))), 12888#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (or (<= (+ cstrncat_~s~0.offset 9) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1))))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))))), 12889#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)))), 12890#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)))), 12891#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))))), 12892#(or (and (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))))), 12893#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))))), 12894#(or (and (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))))), 12895#(or (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)))), 12896#(or (and (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 12897#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)))), 12898#(or (and (or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 12899#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))), 12900#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (<= 0 cstrncat_~s~0.offset))), 12901#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base))), 12902#(and (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= 2 cstrncat_~s~0.offset))] [2018-02-04 15:00:57,629 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:00:57,630 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-02-04 15:00:57,630 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-02-04 15:00:57,630 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=273, Invalid=1059, Unknown=0, NotChecked=0, Total=1332 [2018-02-04 15:00:57,630 INFO L87 Difference]: Start difference. First operand 90 states and 98 transitions. Second operand 37 states. [2018-02-04 15:00:57,982 WARN L146 SmtUtils]: Spent 130ms on a formula simplification. DAG size of input: 148 DAG size of output 147 [2018-02-04 15:00:58,710 WARN L146 SmtUtils]: Spent 159ms on a formula simplification. DAG size of input: 165 DAG size of output 160 [2018-02-04 15:00:58,919 WARN L146 SmtUtils]: Spent 187ms on a formula simplification. DAG size of input: 171 DAG size of output 162 [2018-02-04 15:00:59,138 WARN L146 SmtUtils]: Spent 167ms on a formula simplification. DAG size of input: 159 DAG size of output 153 [2018-02-04 15:00:59,343 WARN L146 SmtUtils]: Spent 180ms on a formula simplification. DAG size of input: 165 DAG size of output 156 [2018-02-04 15:00:59,540 WARN L146 SmtUtils]: Spent 154ms on a formula simplification. DAG size of input: 153 DAG size of output 148 [2018-02-04 15:00:59,762 WARN L146 SmtUtils]: Spent 185ms on a formula simplification. DAG size of input: 159 DAG size of output 150 [2018-02-04 15:00:59,940 WARN L146 SmtUtils]: Spent 137ms on a formula simplification. DAG size of input: 147 DAG size of output 142 [2018-02-04 15:01:00,120 WARN L146 SmtUtils]: Spent 149ms on a formula simplification. DAG size of input: 153 DAG size of output 144 [2018-02-04 15:01:00,291 WARN L146 SmtUtils]: Spent 134ms on a formula simplification. DAG size of input: 141 DAG size of output 136 [2018-02-04 15:01:00,473 WARN L146 SmtUtils]: Spent 148ms on a formula simplification. DAG size of input: 147 DAG size of output 138 [2018-02-04 15:01:00,632 WARN L146 SmtUtils]: Spent 118ms on a formula simplification. DAG size of input: 135 DAG size of output 130 [2018-02-04 15:01:00,796 WARN L146 SmtUtils]: Spent 131ms on a formula simplification. DAG size of input: 141 DAG size of output 132 [2018-02-04 15:01:00,960 WARN L146 SmtUtils]: Spent 111ms on a formula simplification. DAG size of input: 129 DAG size of output 124 [2018-02-04 15:01:01,116 WARN L146 SmtUtils]: Spent 122ms on a formula simplification. DAG size of input: 135 DAG size of output 126 [2018-02-04 15:01:01,260 WARN L146 SmtUtils]: Spent 102ms on a formula simplification. DAG size of input: 123 DAG size of output 118 [2018-02-04 15:01:01,467 WARN L146 SmtUtils]: Spent 115ms on a formula simplification. DAG size of input: 129 DAG size of output 120 [2018-02-04 15:01:01,707 WARN L146 SmtUtils]: Spent 174ms on a formula simplification. DAG size of input: 116 DAG size of output 113 [2018-02-04 15:01:01,901 WARN L146 SmtUtils]: Spent 128ms on a formula simplification. DAG size of input: 122 DAG size of output 116 [2018-02-04 15:01:02,199 WARN L146 SmtUtils]: Spent 110ms on a formula simplification. DAG size of input: 116 DAG size of output 110 [2018-02-04 15:01:02,447 WARN L146 SmtUtils]: Spent 190ms on a formula simplification. DAG size of input: 103 DAG size of output 100 [2018-02-04 15:01:02,699 WARN L146 SmtUtils]: Spent 176ms on a formula simplification. DAG size of input: 108 DAG size of output 103 [2018-02-04 15:01:02,852 WARN L146 SmtUtils]: Spent 109ms on a formula simplification. DAG size of input: 97 DAG size of output 94 [2018-02-04 15:01:02,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 15:01:02,984 INFO L93 Difference]: Finished difference Result 150 states and 160 transitions. [2018-02-04 15:01:02,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-02-04 15:01:02,984 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 62 [2018-02-04 15:01:02,984 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 15:01:02,984 INFO L225 Difference]: With dead ends: 150 [2018-02-04 15:01:02,985 INFO L226 Difference]: Without dead ends: 150 [2018-02-04 15:01:02,985 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1287 ImplicationChecksByTransitivity, 15.3s TimeCoverageRelationStatistics Valid=923, Invalid=3907, Unknown=0, NotChecked=0, Total=4830 [2018-02-04 15:01:02,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-02-04 15:01:02,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 93. [2018-02-04 15:01:02,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-02-04 15:01:02,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 102 transitions. [2018-02-04 15:01:02,986 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 102 transitions. Word has length 62 [2018-02-04 15:01:02,986 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 15:01:02,986 INFO L432 AbstractCegarLoop]: Abstraction has 93 states and 102 transitions. [2018-02-04 15:01:02,986 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-02-04 15:01:02,986 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 102 transitions. [2018-02-04 15:01:02,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-02-04 15:01:02,986 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 15:01:02,987 INFO L351 BasicCegarLoop]: trace histogram [9, 9, 8, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 15:01:02,987 INFO L371 AbstractCegarLoop]: === Iteration 47 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 15:01:02,987 INFO L82 PathProgramCache]: Analyzing trace with hash 300514882, now seen corresponding path program 9 times [2018-02-04 15:01:02,987 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 15:01:02,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 15:01:02,994 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 15:01:03,470 WARN L146 SmtUtils]: Spent 173ms on a formula simplification. DAG size of input: 96 DAG size of output 71 [2018-02-04 15:01:03,650 WARN L146 SmtUtils]: Spent 163ms on a formula simplification. DAG size of input: 90 DAG size of output 65 [2018-02-04 15:01:03,800 WARN L146 SmtUtils]: Spent 139ms on a formula simplification. DAG size of input: 79 DAG size of output 57 [2018-02-04 15:01:03,972 WARN L146 SmtUtils]: Spent 159ms on a formula simplification. DAG size of input: 79 DAG size of output 57 [2018-02-04 15:01:04,132 WARN L146 SmtUtils]: Spent 144ms on a formula simplification. DAG size of input: 79 DAG size of output 57 [2018-02-04 15:01:04,254 WARN L146 SmtUtils]: Spent 104ms on a formula simplification. DAG size of input: 70 DAG size of output 57 [2018-02-04 15:01:04,374 WARN L146 SmtUtils]: Spent 101ms on a formula simplification. DAG size of input: 73 DAG size of output 60 [2018-02-04 15:01:04,922 INFO L134 CoverageAnalysis]: Checked inductivity of 125 backedges. 3 proven. 122 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:01:04,922 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 15:01:04,922 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34] total 34 [2018-02-04 15:01:04,922 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 15:01:04,922 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:01:04,922 INFO L182 omatonBuilderFactory]: Interpolants [13212#true, 13213#false, 13214#(<= 1 main_~n~0), 13215#(and (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 13216#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0) (= 0 |main_#t~malloc13.offset|)), 13217#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 13218#(and (= 0 |main_#t~malloc14.offset|) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~length2~0 (select |#length| |main_#t~malloc14.base|)) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 13219#(and (= 0 main_~nondetString2~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 13220#(and (= 0 main_~nondetString2~0.offset) (or (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 main_~length2~0) (select |#length| main_~nondetString1~0.base))) (and (or (<= (+ main_~n~0 main_~length2~0 5) (select |#length| main_~nondetString1~0.base)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (select |#length| main_~nondetString1~0.base) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1))))))) (<= (+ main_~n~0 main_~length2~0 4) (select |#length| main_~nondetString1~0.base))) (and (<= (+ main_~n~0 main_~length2~0 1) (select |#length| main_~nondetString1~0.base)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (select |#length| main_~nondetString1~0.base) (- 1)) (+ main_~nondetString1~0.offset (- 1))))))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 main_~length2~0) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 main_~length2~0 3) (select |#length| main_~nondetString1~0.base))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (select |#length| main_~nondetString1~0.base) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 main_~length2~0 2) (select |#length| main_~nondetString1~0.base)))) (<= 1 main_~n~0) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 13221#(and (= 0 main_~nondetString2~0.offset) (or (and (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base) 2) (select |#length| main_~nondetString1~0.base)) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (select |#length| main_~nondetString1~0.base) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1))))))) (and (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base) 4) (select |#length| main_~nondetString1~0.base)) (or (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base) 5) (select |#length| main_~nondetString1~0.base)) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (select |#length| main_~nondetString1~0.base) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))))) (and (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base)) (select |#length| main_~nondetString1~0.base)) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ main_~nondetString1~0.offset (- 1))))))) (and (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (select |#length| main_~nondetString2~0.base)) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base) 3) (select |#length| main_~nondetString1~0.base))) (and (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (select |#length| main_~nondetString1~0.base) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base) 1) (select |#length| main_~nondetString1~0.base)))) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0)), 13222#(and (= 0 |cstrncat_#in~s1.offset|) (= 0 |cstrncat_#in~s2.offset|) (or (and (or (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- |cstrncat_#in~n|)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (select |#length| |cstrncat_#in~s2.base|) |cstrncat_#in~n| 5) (select |#length| |cstrncat_#in~s1.base|))) (<= (+ (select |#length| |cstrncat_#in~s2.base|) |cstrncat_#in~n| 4) (select |#length| |cstrncat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- |cstrncat_#in~n|)) (- 1)) (- 1)))) (<= (+ (select |#length| |cstrncat_#in~s2.base|) |cstrncat_#in~n| 1) (select |#length| |cstrncat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- |cstrncat_#in~n|)) (- 1)))) (<= (+ (select |#length| |cstrncat_#in~s2.base|) |cstrncat_#in~n|) (select |#length| |cstrncat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- |cstrncat_#in~n|)) (- 1)) (- 1)) (- 1)))) (<= (+ (select |#length| |cstrncat_#in~s2.base|) |cstrncat_#in~n| 2) (select |#length| |cstrncat_#in~s1.base|))) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (select |#length| |cstrncat_#in~s2.base|) (- 1)))) (<= (+ (select |#length| |cstrncat_#in~s2.base|) |cstrncat_#in~n| 3) (select |#length| |cstrncat_#in~s1.base|)))) (<= 1 |cstrncat_#in~n|)), 13223#(and (<= 1 cstrncat_~n) (or (and (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) 4) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) 5) (select |#length| cstrncat_~s~0.base)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)))) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base)) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (select |#length| cstrncat_~s2.base) (- 1)))) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) 2) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)) (- 1)))))) (= 0 cstrncat_~s2.offset) (= cstrncat_~s~0.offset 0)), 13224#(and (<= 1 cstrncat_~n) (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (- cstrncat_~n) (select |#length| cstrncat_~s~0.base)) (- 1)) (- 1)))) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (- cstrncat_~n) (select |#length| cstrncat_~s~0.base)) (- 1)) (- 1)) (- 1)) (- 1)))))) (and (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (select |#length| cstrncat_~s~0.base) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- cstrncat_~n) (select |#length| cstrncat_~s~0.base)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s2.base) (+ cstrncat_~s~0.offset (- 1))) (- 1)))) (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~n (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (- cstrncat_~n) (select |#length| cstrncat_~s~0.base)) (- 1)) (- 1)) (- 1)))))) (= 0 cstrncat_~s2.offset)), 13225#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= 1 cstrncat_~n) (= 0 cstrncat_~s2.offset) (or (and (<= (+ cstrncat_~n cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (<= (select |#length| cstrncat_~s2.base) 2) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base))))))), 13226#(or (and (<= 1 cstrncat_~n) (= 0 cstrncat_~s2.offset) (or (and (<= (+ cstrncat_~n cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (<= (select |#length| cstrncat_~s2.base) 2) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- cstrncat_~n)) (- 1)) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 13227#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= 1 cstrncat_~n) (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (<= (select |#length| cstrncat_~s2.base) 2) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- cstrncat_~n) (select |#length| cstrncat_~s~0.base)) (- 1))))) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (- cstrncat_~n) (select |#length| cstrncat_~s~0.base)) (- 1)) (- 1))))))) (= 0 cstrncat_~s2.offset))), 13228#(or (and (<= 1 cstrncat_~n) (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (<= (select |#length| cstrncat_~s2.base) 2) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (- cstrncat_~n) (select |#length| cstrncat_~s~0.base)) (- 1))))) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (- cstrncat_~n) (select |#length| cstrncat_~s~0.base)) (- 1)) (- 1))))))) (= 0 cstrncat_~s2.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 13229#(and (<= 1 cstrncat_~n) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (select |#length| cstrncat_~s2.base) 2) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1))))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)))) (= 0 cstrncat_~s2.offset)), 13230#(and (<= 1 cstrncat_~n) (or (<= (select |#length| cstrncat_~s2.base) 2) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1))))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))) (= 0 cstrncat_~s2.offset)), 13231#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= 1 cstrncat_~n) (or (<= (select |#length| cstrncat_~s2.base) 2) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)))) (= 0 cstrncat_~s2.offset))), 13232#(or (and (<= 1 cstrncat_~n) (or (<= (select |#length| cstrncat_~s2.base) 2) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)))) (= 0 cstrncat_~s2.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 13233#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 cstrncat_~s2.offset) (or (and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base))) (<= (select |#length| cstrncat_~s2.base) 2)))), 13234#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (= 0 cstrncat_~s2.offset) (or (and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base))) (<= (select |#length| cstrncat_~s2.base) 2)))), 13235#(and (= 0 cstrncat_~s2.offset) (or (and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))) (<= (select |#length| cstrncat_~s2.base) 2))), 13236#(and (= 0 cstrncat_~s2.offset) (or (and (<= 1 cstrncat_~n) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= (select |#length| cstrncat_~s2.base) 2))), 13237#(and (or (and (<= 1 cstrncat_~n) (<= 0 cstrncat_~s~0.offset) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= (select |#length| cstrncat_~s2.base) 2)) (= 0 cstrncat_~s2.offset)), 13238#(and (= |cstrncat_#t~post2.offset| 0) (or (<= (+ (select |#length| cstrncat_~s2.base) |cstrncat_#t~post2.offset|) (+ cstrncat_~s2.offset 1)) (and (<= 1 cstrncat_~n) (<= 0 cstrncat_~s~0.offset) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))))), 13239#(or (and (<= 1 cstrncat_~n) (<= 0 cstrncat_~s~0.offset) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1))), 13240#(or (and (<= 1 cstrncat_~s~0.offset) (<= 0 cstrncat_~n) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1))), 13241#(or (and (<= 1 cstrncat_~s~0.offset) (or (and (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n)) (not |cstrncat_#t~short5|)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1))), 13242#(or (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset) (and (<= 1 cstrncat_~s~0.offset) (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base)))), 13243#(or (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset) (and (or (<= cstrncat_~n 0) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= 0 cstrncat_~n) (<= 2 cstrncat_~s~0.offset))), 13244#(or (and (or (not |cstrncat_#t~short5|) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))) (<= 2 cstrncat_~s~0.offset)) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset)), 13245#(or (<= (select |#length| |cstrncat_#t~post2.base|) |cstrncat_#t~post2.offset|) (and (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= 2 cstrncat_~s~0.offset))), 13246#(and (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= 2 cstrncat_~s~0.offset))] [2018-02-04 15:01:04,923 INFO L134 CoverageAnalysis]: Checked inductivity of 125 backedges. 3 proven. 122 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:01:04,923 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-02-04 15:01:04,923 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-02-04 15:01:04,923 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=1047, Unknown=0, NotChecked=0, Total=1190 [2018-02-04 15:01:04,923 INFO L87 Difference]: Start difference. First operand 93 states and 102 transitions. Second operand 35 states. [2018-02-04 15:01:05,495 WARN L146 SmtUtils]: Spent 121ms on a formula simplification. DAG size of input: 133 DAG size of output 108 [2018-02-04 15:01:05,634 WARN L146 SmtUtils]: Spent 120ms on a formula simplification. DAG size of input: 136 DAG size of output 117 [2018-02-04 15:01:05,767 WARN L146 SmtUtils]: Spent 102ms on a formula simplification. DAG size of input: 114 DAG size of output 95 [2018-02-04 15:01:05,908 WARN L146 SmtUtils]: Spent 116ms on a formula simplification. DAG size of input: 117 DAG size of output 101 [2018-02-04 15:01:07,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 15:01:07,082 INFO L93 Difference]: Finished difference Result 131 states and 140 transitions. [2018-02-04 15:01:07,082 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-02-04 15:01:07,082 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 64 [2018-02-04 15:01:07,083 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 15:01:07,083 INFO L225 Difference]: With dead ends: 131 [2018-02-04 15:01:07,083 INFO L226 Difference]: Without dead ends: 91 [2018-02-04 15:01:07,083 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1023 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=471, Invalid=2951, Unknown=0, NotChecked=0, Total=3422 [2018-02-04 15:01:07,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2018-02-04 15:01:07,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 86. [2018-02-04 15:01:07,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-02-04 15:01:07,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 93 transitions. [2018-02-04 15:01:07,085 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 93 transitions. Word has length 64 [2018-02-04 15:01:07,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 15:01:07,085 INFO L432 AbstractCegarLoop]: Abstraction has 86 states and 93 transitions. [2018-02-04 15:01:07,085 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-02-04 15:01:07,085 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 93 transitions. [2018-02-04 15:01:07,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-04 15:01:07,085 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 15:01:07,085 INFO L351 BasicCegarLoop]: trace histogram [16, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 15:01:07,085 INFO L371 AbstractCegarLoop]: === Iteration 48 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 15:01:07,085 INFO L82 PathProgramCache]: Analyzing trace with hash 1616455021, now seen corresponding path program 13 times [2018-02-04 15:01:07,086 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 15:01:07,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 15:01:07,100 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 15:01:11,019 WARN L146 SmtUtils]: Spent 996ms on a formula simplification. DAG size of input: 309 DAG size of output 151 [2018-02-04 15:01:12,071 WARN L146 SmtUtils]: Spent 969ms on a formula simplification. DAG size of input: 311 DAG size of output 100 [2018-02-04 15:01:13,186 WARN L146 SmtUtils]: Spent 1078ms on a formula simplification. DAG size of input: 311 DAG size of output 102 [2018-02-04 15:01:14,376 WARN L146 SmtUtils]: Spent 1140ms on a formula simplification. DAG size of input: 314 DAG size of output 105 [2018-02-04 15:01:15,686 WARN L146 SmtUtils]: Spent 1230ms on a formula simplification. DAG size of input: 333 DAG size of output 111 [2018-02-04 15:01:17,044 WARN L146 SmtUtils]: Spent 1254ms on a formula simplification. DAG size of input: 336 DAG size of output 114 [2018-02-04 15:01:18,460 WARN L146 SmtUtils]: Spent 1322ms on a formula simplification. DAG size of input: 293 DAG size of output 107 [2018-02-04 15:01:20,017 WARN L146 SmtUtils]: Spent 1439ms on a formula simplification. DAG size of input: 296 DAG size of output 111 [2018-02-04 15:01:21,252 WARN L146 SmtUtils]: Spent 1114ms on a formula simplification. DAG size of input: 282 DAG size of output 106 [2018-02-04 15:01:22,636 WARN L146 SmtUtils]: Spent 1246ms on a formula simplification. DAG size of input: 285 DAG size of output 109 [2018-02-04 15:01:24,005 WARN L146 SmtUtils]: Spent 1240ms on a formula simplification. DAG size of input: 269 DAG size of output 98 [2018-02-04 15:01:25,465 WARN L146 SmtUtils]: Spent 1277ms on a formula simplification. DAG size of input: 272 DAG size of output 100 [2018-02-04 15:01:26,541 WARN L146 SmtUtils]: Spent 936ms on a formula simplification. DAG size of input: 258 DAG size of output 91 [2018-02-04 15:01:27,680 WARN L146 SmtUtils]: Spent 974ms on a formula simplification. DAG size of input: 261 DAG size of output 94 [2018-02-04 15:01:28,630 WARN L146 SmtUtils]: Spent 818ms on a formula simplification. DAG size of input: 254 DAG size of output 79 [2018-02-04 15:01:29,606 WARN L146 SmtUtils]: Spent 830ms on a formula simplification. DAG size of input: 257 DAG size of output 84 [2018-02-04 15:01:29,954 WARN L146 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 127 DAG size of output 45 [2018-02-04 15:01:30,816 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:01:30,816 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 15:01:30,843 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39] total 39 [2018-02-04 15:01:30,843 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 15:01:30,844 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:01:30,844 INFO L182 omatonBuilderFactory]: Interpolants [13512#true, 13513#false, 13514#(<= 1 main_~n~0), 13515#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (<= 1 main_~n~0) (= 1 (select |#valid| |main_#t~malloc13.base|)) (= 0 |main_#t~malloc13.offset|)), 13516#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (= 1 (select |#valid| main_~nondetString1~0.base)) (= main_~nondetString1~0.offset 0)), 13517#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (not (= |main_#t~malloc14.base| main_~nondetString1~0.base)) (= main_~nondetString1~0.offset 0)), 13518#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 13519#(and (or (and (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 4) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1))))))) (and (<= (+ main_~n~0 6) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) main_~nondetString1~0.offset)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) (- 2)) (- 1)) (+ main_~nondetString1~0.offset (- 1))))))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) main_~nondetString1~0.offset)) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 2) (+ main_~n~0 (select |#length| main_~nondetString1~0.base)))) (and (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 5) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) (+ main_~nondetString1~0.offset (- 1))))))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) (- 1)) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 4) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) main_~nondetString1~0.offset))) (and (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 3) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (- 1)) (- 1)) (+ main_~nondetString1~0.offset (- 1))))))) (and (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) 1) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (+ (select |#length| main_~nondetString1~0.base) (- 1))) (+ main_~nondetString1~0.offset (- 1))))))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ main_~nondetString1~0.offset (- 1)))))) (<= 2 main_~n~0) (<= (+ (* 2 main_~n~0) 1) (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) (- 2)) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 5) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) main_~nondetString1~0.offset))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) 1)) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 3) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) main_~nondetString1~0.offset))) (and (<= (+ main_~n~0 3) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) main_~nondetString1~0.offset)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) (+ main_~nondetString1~0.offset (- 1))))))) (and (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 5))) 2) 5) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (or (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 5))) 2) 6) (+ main_~n~0 (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 5))) 2) (+ main_~nondetString1~0.offset (- 1))))))))) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 13520#(and (= 0 |cstrncat_#in~s1.offset|) (or (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (select |#length| |cstrncat_#in~s1.base|) 2) (- 1)))) (<= 3 (div (select |#length| |cstrncat_#in~s1.base|) 2))) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) 2))) (<= 2 (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) 2))) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) 4) (select |#length| |cstrncat_#in~s1.base|))) (and (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) 1) (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1))))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) |cstrncat_#in~s1.offset|)) (and (<= 6 (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2) (- 2)) (- 1)) (- 1))))) (and (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) 2) (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1))))) (and (<= 4 (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2) (- 1)) (- 1))))) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) 1)) (and (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) 3) (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2) (- 2)) (- 1)))) (<= 5 (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2))) (and (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 5) 2) 5) (select |#length| |cstrncat_#in~s1.base|)) (or (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 5) 2) 6) (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 5) 2) (- 1)))))) (and (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) 5) (select |#length| |cstrncat_#in~s1.base|)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 3) 2) (- 1))))) (and (<= 3 (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2) (- 1))))))), 13521#(and (= cstrncat_~s~0.offset 0) (or (and (<= 3 (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= 4 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= 2 (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 4) (select |#length| cstrncat_~s~0.base))) (and (<= 4 (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 5) (select |#length| cstrncat_~s~0.base))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) (- 1))))) (and (<= 6 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2)) (or (<= 7 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2) (- 2)) (- 1)) (- 1)))))) (and (<= 5 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2) (- 2)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2) (- 1)))) (<= 3 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (select |#length| cstrncat_~s~0.base) 2) (- 1)))) (<= 3 (div (select |#length| cstrncat_~s~0.base) 2))))), 13522#(and (= cstrncat_~s~0.offset 0) (or (and (<= 3 (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1))))) (and (<= 4 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= 2 (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) 1)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 4) (select |#length| cstrncat_~s~0.base))) (and (<= 4 (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 5) (select |#length| cstrncat_~s~0.base))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) (- 1))))) (and (<= 6 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2)) (or (<= 7 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2) (- 2)) (- 1)) (- 1)))))) (and (<= 5 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2) (- 2)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2) (- 1)))) (<= 3 (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (select |#length| cstrncat_~s~0.base) 2) (- 1)))) (<= 3 (div (select |#length| cstrncat_~s~0.base) 2))))), 13523#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= cstrncat_~s~0.offset 1)) (and (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) 2) 4) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) 2) 5) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) 5) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2))) (and (<= (+ cstrncat_~s~0.offset 3) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (+ cstrncat_~s~0.offset (- 1)))) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 1) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) (- 2)) (- 1)))) (<= (+ cstrncat_~s~0.offset 4) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2))) (and (or (<= (+ cstrncat_~s~0.offset 6) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) (- 2)) (- 1)) (- 1))))) (<= (+ cstrncat_~s~0.offset 5) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)))), 13524#(or (and (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) 2) 4) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) 2) 5) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) 5) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2))) (and (<= (+ cstrncat_~s~0.offset 3) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (+ cstrncat_~s~0.offset (- 1)))) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 1) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= cstrncat_~s~0.offset 1) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) (- 2)) (- 1)))) (<= (+ cstrncat_~s~0.offset 4) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2))) (and (or (<= (+ cstrncat_~s~0.offset 6) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) (- 2)) (- 1)) (- 1))))) (<= (+ cstrncat_~s~0.offset 5) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)))), 13525#(or (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) (- 1))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) 2) 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) 2) (- 1))))) (and (or (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (<= (+ cstrncat_~s~0.offset 1) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) 2) 4) (select |#length| cstrncat_~s~0.base))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2))) (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2))) (<= (+ cstrncat_~s~0.offset 4) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 3) (select |#length| cstrncat_~s~0.base)))), 13526#(or (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 4) (select |#length| cstrncat_~s~0.base))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) 2) 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (+ cstrncat_~s~0.offset (- 2)))) (- 1)))) (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) (- 1))))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 5) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2))) (<= (+ cstrncat_~s~0.offset 4) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) 2) 3) (select |#length| cstrncat_~s~0.base)))), 13527#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)) (- 3)))) (- 1))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (select |#length| cstrncat_~s~0.base)) 2) 4) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)) (- 2)))) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 4) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2))) (<= (+ cstrncat_~s~0.offset 3) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2)) (- 3)))) (- 1)))))), 13528#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)) (- 3)))) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (select |#length| cstrncat_~s~0.base)) 2) 4) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)) (- 2)))) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) (- 1)) (- 1)))) (<= (+ cstrncat_~s~0.offset 4) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2))) (<= (+ cstrncat_~s~0.offset 3) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2)) (- 3)))) (- 1)))))), 13529#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2) 1))) (and (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2) 4) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2)) (- 4)))) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) 2))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2) 2) (select |#length| cstrncat_~s~0.base))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) 3)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2))) (and (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 1)) 2) 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 1)) 2) (- 1)))))), 13530#(or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2) 1))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2)) (- 4)))) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2) 3) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2) 2) (select |#length| cstrncat_~s~0.base))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) 3)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2))) (and (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 1)) 2) 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 1)) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 13531#(or (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 6))) 2) 4)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 6))) 2)) (+ cstrncat_~s~0.offset (- 5)))) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 6))) 2) 3))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 8))) 2) 3)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 8))) 2) 1))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) 2) 3) (select |#length| cstrncat_~s~0.base))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) 2) 6) (select |#length| cstrncat_~s~0.base))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) 2) 5) (select |#length| cstrncat_~s~0.base))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) (- 1)))))), 13532#(or (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 6))) 2) 4)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 6))) 2)) (+ cstrncat_~s~0.offset (- 5)))) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 6))) 2) 3))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))) (and (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 8))) 2) 3)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 8))) 2) 1))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) 2) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) 2) 6) (select |#length| cstrncat_~s~0.base))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) 2) 5) (select |#length| cstrncat_~s~0.base))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) 3) (select |#length| cstrncat_~s~0.base))) (and (<= (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) (- 1)))))), 13533#(or (and (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2) 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2)) (- 6)))) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2) 4))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2) 5)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 9))) 2) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2) 3) (select |#length| cstrncat_~s~0.base))) (and (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2) 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 9))) 2) 2))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base))), 13534#(or (and (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2) 2) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2)) (- 6)))) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2) 4))) (and (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2) 5)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2) 3) (select |#length| cstrncat_~s~0.base))) (and (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2) 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 1))) 2) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 9))) 2) 2))) (<= (+ cstrncat_~s~0.offset 10) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (<= cstrncat_~s~0.offset (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 9))) 2) 3)))), 13535#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 6)) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 2))) 2) 6) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 5)) (- 1))))), 13536#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 6)) (- 1)))) (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 2))) 2) 6) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 5)) (- 1))))), 13537#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 6))), 13538#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)))) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 6))), 13539#(or (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 5)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 13540#(or (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1)) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 5)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 13541#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 13542#(or (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 1)) (- 1))))), 13543#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3))), 13544#(or (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 3) (- 1)))) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 13545#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1))))), 13546#(or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 13547#(or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))), 13548#(or (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))), 13549#(or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset)), 13550#(and (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= 0 cstrncat_~s~0.offset)), 13551#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)))] [2018-02-04 15:01:30,845 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:01:30,845 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-02-04 15:01:30,845 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-02-04 15:01:30,845 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=243, Invalid=1317, Unknown=0, NotChecked=0, Total=1560 [2018-02-04 15:01:30,845 INFO L87 Difference]: Start difference. First operand 86 states and 93 transitions. Second operand 40 states. [2018-02-04 15:01:31,352 WARN L146 SmtUtils]: Spent 238ms on a formula simplification. DAG size of input: 166 DAG size of output 165 [2018-02-04 15:01:31,700 WARN L143 SmtUtils]: Spent 223ms on a formula simplification that was a NOOP. DAG size: 189 [2018-02-04 15:01:31,983 WARN L143 SmtUtils]: Spent 213ms on a formula simplification that was a NOOP. DAG size: 192 [2018-02-04 15:01:32,317 WARN L143 SmtUtils]: Spent 204ms on a formula simplification that was a NOOP. DAG size: 199 [2018-02-04 15:01:32,842 WARN L146 SmtUtils]: Spent 495ms on a formula simplification. DAG size of input: 205 DAG size of output 203 [2018-02-04 15:01:33,417 WARN L146 SmtUtils]: Spent 471ms on a formula simplification. DAG size of input: 200 DAG size of output 196 [2018-02-04 15:01:33,905 WARN L146 SmtUtils]: Spent 434ms on a formula simplification. DAG size of input: 208 DAG size of output 187 [2018-02-04 15:01:34,381 WARN L146 SmtUtils]: Spent 352ms on a formula simplification. DAG size of input: 204 DAG size of output 189 [2018-02-04 15:01:34,895 WARN L146 SmtUtils]: Spent 462ms on a formula simplification. DAG size of input: 220 DAG size of output 199 [2018-02-04 15:01:35,475 WARN L146 SmtUtils]: Spent 392ms on a formula simplification. DAG size of input: 203 DAG size of output 180 [2018-02-04 15:01:36,112 WARN L146 SmtUtils]: Spent 558ms on a formula simplification. DAG size of input: 217 DAG size of output 183 [2018-02-04 15:01:36,564 WARN L146 SmtUtils]: Spent 313ms on a formula simplification. DAG size of input: 199 DAG size of output 164 [2018-02-04 15:01:36,997 WARN L146 SmtUtils]: Spent 318ms on a formula simplification. DAG size of input: 211 DAG size of output 168 [2018-02-04 15:01:37,427 WARN L146 SmtUtils]: Spent 317ms on a formula simplification. DAG size of input: 198 DAG size of output 165 [2018-02-04 15:01:38,115 WARN L146 SmtUtils]: Spent 554ms on a formula simplification. DAG size of input: 213 DAG size of output 173 [2018-02-04 15:01:38,646 WARN L146 SmtUtils]: Spent 421ms on a formula simplification. DAG size of input: 168 DAG size of output 154 [2018-02-04 15:01:39,194 WARN L146 SmtUtils]: Spent 445ms on a formula simplification. DAG size of input: 176 DAG size of output 161 [2018-02-04 15:01:39,617 WARN L146 SmtUtils]: Spent 349ms on a formula simplification. DAG size of input: 154 DAG size of output 135 [2018-02-04 15:01:39,942 WARN L146 SmtUtils]: Spent 266ms on a formula simplification. DAG size of input: 157 DAG size of output 142 [2018-02-04 15:01:40,349 WARN L146 SmtUtils]: Spent 336ms on a formula simplification. DAG size of input: 146 DAG size of output 132 [2018-02-04 15:01:40,633 WARN L146 SmtUtils]: Spent 223ms on a formula simplification. DAG size of input: 149 DAG size of output 135 [2018-02-04 15:01:40,943 WARN L146 SmtUtils]: Spent 216ms on a formula simplification. DAG size of input: 138 DAG size of output 128 [2018-02-04 15:01:41,355 WARN L146 SmtUtils]: Spent 348ms on a formula simplification. DAG size of input: 141 DAG size of output 131 [2018-02-04 15:01:41,649 WARN L146 SmtUtils]: Spent 224ms on a formula simplification. DAG size of input: 130 DAG size of output 124 [2018-02-04 15:01:42,013 WARN L146 SmtUtils]: Spent 220ms on a formula simplification. DAG size of input: 133 DAG size of output 127 [2018-02-04 15:01:42,262 WARN L146 SmtUtils]: Spent 191ms on a formula simplification. DAG size of input: 123 DAG size of output 118 [2018-02-04 15:01:42,549 WARN L146 SmtUtils]: Spent 214ms on a formula simplification. DAG size of input: 126 DAG size of output 121 [2018-02-04 15:01:42,797 WARN L146 SmtUtils]: Spent 193ms on a formula simplification. DAG size of input: 116 DAG size of output 112 [2018-02-04 15:01:43,075 WARN L146 SmtUtils]: Spent 221ms on a formula simplification. DAG size of input: 119 DAG size of output 115 [2018-02-04 15:01:43,317 WARN L146 SmtUtils]: Spent 184ms on a formula simplification. DAG size of input: 109 DAG size of output 106 [2018-02-04 15:01:43,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 15:01:43,517 INFO L93 Difference]: Finished difference Result 134 states and 143 transitions. [2018-02-04 15:01:43,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-02-04 15:01:43,517 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 65 [2018-02-04 15:01:43,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 15:01:43,518 INFO L225 Difference]: With dead ends: 134 [2018-02-04 15:01:43,518 INFO L226 Difference]: Without dead ends: 134 [2018-02-04 15:01:43,518 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1724 ImplicationChecksByTransitivity, 32.5s TimeCoverageRelationStatistics Valid=981, Invalid=4569, Unknown=0, NotChecked=0, Total=5550 [2018-02-04 15:01:43,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-02-04 15:01:43,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 89. [2018-02-04 15:01:43,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-02-04 15:01:43,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 97 transitions. [2018-02-04 15:01:43,520 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 97 transitions. Word has length 65 [2018-02-04 15:01:43,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 15:01:43,520 INFO L432 AbstractCegarLoop]: Abstraction has 89 states and 97 transitions. [2018-02-04 15:01:43,520 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-02-04 15:01:43,520 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 97 transitions. [2018-02-04 15:01:43,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-02-04 15:01:43,521 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 15:01:43,521 INFO L351 BasicCegarLoop]: trace histogram [10, 10, 9, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 15:01:43,521 INFO L371 AbstractCegarLoop]: === Iteration 49 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 15:01:43,521 INFO L82 PathProgramCache]: Analyzing trace with hash -1532156837, now seen corresponding path program 10 times [2018-02-04 15:01:43,521 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 15:01:43,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 15:01:43,532 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 15:01:44,164 WARN L146 SmtUtils]: Spent 172ms on a formula simplification. DAG size of input: 119 DAG size of output 90 [2018-02-04 15:01:44,336 WARN L146 SmtUtils]: Spent 151ms on a formula simplification. DAG size of input: 113 DAG size of output 83 [2018-02-04 15:01:44,617 WARN L146 SmtUtils]: Spent 268ms on a formula simplification. DAG size of input: 121 DAG size of output 76 [2018-02-04 15:01:44,770 WARN L146 SmtUtils]: Spent 136ms on a formula simplification. DAG size of input: 121 DAG size of output 74 [2018-02-04 15:01:45,007 WARN L146 SmtUtils]: Spent 201ms on a formula simplification. DAG size of input: 135 DAG size of output 85 [2018-02-04 15:01:45,283 WARN L146 SmtUtils]: Spent 232ms on a formula simplification. DAG size of input: 126 DAG size of output 87 [2018-02-04 15:01:45,576 WARN L146 SmtUtils]: Spent 236ms on a formula simplification. DAG size of input: 129 DAG size of output 90 [2018-02-04 15:01:45,854 WARN L146 SmtUtils]: Spent 228ms on a formula simplification. DAG size of input: 121 DAG size of output 82 [2018-02-04 15:01:46,169 WARN L146 SmtUtils]: Spent 261ms on a formula simplification. DAG size of input: 124 DAG size of output 85 [2018-02-04 15:01:46,369 WARN L146 SmtUtils]: Spent 140ms on a formula simplification. DAG size of input: 114 DAG size of output 74 [2018-02-04 15:01:46,578 WARN L146 SmtUtils]: Spent 140ms on a formula simplification. DAG size of input: 117 DAG size of output 77 [2018-02-04 15:01:47,468 INFO L134 CoverageAnalysis]: Checked inductivity of 152 backedges. 0 proven. 152 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:01:47,468 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 15:01:47,469 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36] total 36 [2018-02-04 15:01:47,469 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 15:01:47,469 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:01:47,469 INFO L182 omatonBuilderFactory]: Interpolants [13845#true, 13846#false, 13847#(<= 1 main_~n~0), 13848#(and (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 13849#(and (= main_~length1~0 (select |#length| |main_#t~malloc13.base|)) (= (select |#valid| |main_#t~malloc13.base|) 1) (<= 1 main_~n~0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0) (= 0 |main_#t~malloc13.offset|)), 13850#(and (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= (select |#valid| main_~nondetString1~0.base) 1) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 13851#(and (= 0 |main_#t~malloc14.offset|) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (= main_~length2~0 (select |#length| |main_#t~malloc14.base|)) (<= 1 main_~n~0) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 13852#(and (= 0 main_~nondetString2~0.offset) (= main_~length1~0 (select |#length| main_~nondetString1~0.base)) (<= 1 main_~n~0) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0) (<= (+ main_~n~0 main_~length2~0) main_~length1~0)), 13853#(and (= 0 main_~nondetString2~0.offset) (or (and (<= (+ main_~n~0 main_~length2~0 1) (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2)) (or (<= (+ main_~n~0 main_~length2~0 2) (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) (+ main_~nondetString1~0.offset (- 1)))))))) (and (<= (+ (* 2 main_~n~0) 1) (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base))) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ main_~nondetString1~0.offset (+ (select |#length| main_~nondetString1~0.base) (- 1))))))) (and (<= (+ main_~n~0 main_~length2~0 1) (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) (+ main_~nondetString1~0.offset (- 1))))))) (and (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 main_~length2~0) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 main_~length2~0) (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2))) (and (<= (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) (select |#length| main_~nondetString1~0.base)) (= 0 (select (select (store |#memory_int| main_~nondetString2~0.base (store (select |#memory_int| main_~nondetString2~0.base) (+ main_~length2~0 main_~nondetString2~0.offset (- 1)) 0)) main_~nondetString1~0.base) (+ (- main_~n~0) (+ main_~nondetString1~0.offset (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) (- 1))))))) (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 5))) 2) 1) (select |#length| main_~nondetString1~0.base))) (<= 1 main_~n~0) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (= main_~length2~0 (select |#length| main_~nondetString2~0.base)) (= main_~nondetString1~0.offset 0)), 13854#(and (= 0 main_~nondetString2~0.offset) (<= 1 main_~n~0) (not (= main_~nondetString1~0.base main_~nondetString2~0.base)) (or (and (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base) 1) (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2)) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2) (+ main_~nondetString1~0.offset (- 1))))))) (and (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (+ main_~n~0 (select |#length| main_~nondetString2~0.base)) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base)) (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (- main_~nondetString1~0.offset))) 2))) (and (<= (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) (select |#length| main_~nondetString1~0.base)) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ main_~nondetString1~0.offset (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 3))) 2) (- 1))))))) (and (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ main_~nondetString1~0.offset (- 1)))))) (<= (+ (* 2 main_~n~0) 1) (+ main_~nondetString1~0.offset (select |#length| main_~nondetString1~0.base)))) (and (or (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base) 2) (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2)) (= 0 (select (select |#memory_int| main_~nondetString1~0.base) (+ (- main_~n~0) (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2) (+ main_~nondetString1~0.offset (- 1))))))) (<= (+ main_~n~0 (select |#length| main_~nondetString2~0.base) 1) (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) (- 2)))) 2))) (<= (+ (div (+ (* 2 main_~n~0) (+ (select |#length| main_~nondetString1~0.base) (+ (- main_~nondetString1~0.offset) 5))) 2) 1) (select |#length| main_~nondetString1~0.base))) (= main_~nondetString1~0.offset 0)), 13855#(and (= 0 |cstrncat_#in~s1.offset|) (= 0 |cstrncat_#in~s2.offset|) (or (and (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (select |#length| |cstrncat_#in~s1.base|) 2) (- 1)))) (<= (+ (select |#length| |cstrncat_#in~s2.base|) 1) (div (select |#length| |cstrncat_#in~s1.base|) 2))) (<= (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) 5) 2) |cstrncat_#in~n| 1) (select |#length| |cstrncat_#in~s1.base|)) (and (<= (+ |cstrncat_#in~n| 1) (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 3)) 2)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (+ (- (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 3)) 2)) 1)) (- 1))))) (and (<= (+ (select |#length| |cstrncat_#in~s2.base|) 1) (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2)) (or (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2) (- 1)))) (<= (+ (select |#length| |cstrncat_#in~s2.base|) 2) (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 2)) 2)))) (and (<= |cstrncat_#in~n| (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 3)) 2)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 3)) 2))) (- 1))))) (and (<= |cstrncat_#in~n| (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) 2)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (+ (select |#length| |cstrncat_#in~s1.base|) (- (div (+ (select |#length| |cstrncat_#in~s1.base|) (- 1)) 2))) (- 1))))) (and (<= (select |#length| |cstrncat_#in~s2.base|) (div (select |#length| |cstrncat_#in~s1.base|) 2)) (= 0 (select (select |#memory_int| |cstrncat_#in~s1.base|) (+ (select |#length| |cstrncat_#in~s2.base|) (- 1)))))) (not (= |cstrncat_#in~s1.base| |cstrncat_#in~s2.base|)) (<= 1 |cstrncat_#in~n|)), 13856#(and (<= 1 cstrncat_~n) (= 0 cstrncat_~s2.offset) (= cstrncat_~s~0.offset 0) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 3) 2) (- 1)))) (<= (+ cstrncat_~n (div (+ (select |#length| cstrncat_~s~0.base) 3) 2)) (select |#length| cstrncat_~s~0.base))) (and (<= cstrncat_~n (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- (div (+ (select |#length| cstrncat_~s~0.base) (- 1)) 2))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (select |#length| cstrncat_~s2.base) (- 1)))) (<= (select |#length| cstrncat_~s2.base) (div (select |#length| cstrncat_~s~0.base) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (select |#length| cstrncat_~s~0.base) 2) (- 1)))) (<= (+ (select |#length| cstrncat_~s2.base) 1) (div (select |#length| cstrncat_~s~0.base) 2))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) (- 1)))) (<= (+ cstrncat_~n (div (+ (select |#length| cstrncat_~s~0.base) 5) 2) 1) (select |#length| cstrncat_~s~0.base))) (<= (+ cstrncat_~n (div (+ (select |#length| cstrncat_~s~0.base) 5) 2)) (select |#length| cstrncat_~s~0.base))) (and (<= (+ (select |#length| cstrncat_~s2.base) 1) (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2) (- 1)))) (<= (+ (select |#length| cstrncat_~s2.base) 2) (div (+ (select |#length| cstrncat_~s~0.base) (- 2)) 2)))))), 13857#(and (<= 1 cstrncat_~n) (= 0 cstrncat_~s2.offset) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (+ cstrncat_~s~0.offset (- 1)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2) (- 1)))) (<= (+ (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2))) (and (<= (+ (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 1))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s2.base) (- 1))) (- 1))))) (and (<= (+ cstrncat_~n (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2)) (select |#length| cstrncat_~s~0.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) (- 1)))) (<= (+ cstrncat_~n (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) 2) 1) (select |#length| cstrncat_~s~0.base)))) (and (or (<= (+ (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset 1) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) (- 1))))) (<= (+ (select |#length| cstrncat_~s2.base) cstrncat_~s~0.offset) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) 2) (- 1)))) (<= (+ cstrncat_~n (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) 2)) (select |#length| cstrncat_~s~0.base))))), 13858#(and (<= 1 cstrncat_~n) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2)) (+ cstrncat_~s~0.offset (- 1)))) (- 1))))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2)) (+ cstrncat_~s~0.offset (- 2)))) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2)))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) (- 1))))) (<= (+ cstrncat_~n (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) 2) 1) (select |#length| cstrncat_~s~0.base)) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (+ cstrncat_~s~0.offset (- 2)))) (- 1))))))), 13859#(and (<= 1 cstrncat_~n) (or (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2) 1)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2)) (+ cstrncat_~s~0.offset (- 1)))) (- 1))))) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 5))) 2)) (+ cstrncat_~s~0.offset (- 2)))) (- 1))))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2) (- 1)))) (<= (+ cstrncat_~s~0.offset 3) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 4))) 2)))) (and (<= (+ cstrncat_~s~0.offset 2) (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 2))) 2) (- 1))))) (<= (+ cstrncat_~n (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) 2) 1) (select |#length| cstrncat_~s~0.base)) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset (- 3))) 2)) (+ cstrncat_~s~0.offset (- 2)))) (- 1))))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 13860#(and (<= 1 cstrncat_~n) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (and (or (<= (+ cstrncat_~s~0.offset 3) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2) (- 1))))) (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2))) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)) (- 2)))) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2) 2))) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2) 3)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)) (- 3)))) (- 1))))) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 3)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2)) (- 3)))) (- 1))))) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (<= (+ cstrncat_~n (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) 1) (select |#length| cstrncat_~s~0.base)))), 13861#(and (<= 1 cstrncat_~n) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (and (or (<= (+ cstrncat_~s~0.offset 3) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2) (- 1))))) (<= (+ cstrncat_~s~0.offset 2) (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 3))) 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)) (- 2)))) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2) 2))) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2) 3)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 6))) 2)) (- 3)))) (- 1))))) (and (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2) 3)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 4))) 2)) (- 3)))) (- 1))))) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (<= (+ cstrncat_~n (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 2)) 2) 1) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))))), 13862#(and (<= 1 cstrncat_~n) (or (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 1)) 2) cstrncat_~n 1) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2)) (- 4)))) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) 4))) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2)) (- 3)))) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2) 3))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2)) (- 4)))) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2) 4))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 13863#(and (<= 1 cstrncat_~n) (or (<= (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) 1)) 2) cstrncat_~n 1) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2)) (- 4)))) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 5))) 2) 4))) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2)) (- 3)))) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2) 3))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (+ (- (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2)) (- 4)))) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (+ (div (+ cstrncat_~s~0.offset (+ (select |#length| cstrncat_~s~0.base) (- 7))) 2) 4))) (<= (+ cstrncat_~s~0.offset 8) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 13864#(and (<= 1 cstrncat_~n) (or (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (and (<= cstrncat_~n 3) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 3)) (- 1)))) (<= cstrncat_~n 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 4)) (- 1)))) (<= cstrncat_~n 4))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 13865#(and (<= 1 cstrncat_~n) (or (<= (+ cstrncat_~s~0.offset 7) (select |#length| cstrncat_~s~0.base)) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (and (<= cstrncat_~n 3) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 3)) (- 1)))) (<= cstrncat_~n 2))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ (select |#length| cstrncat_~s~0.base) (- 4)) (- 1)))) (<= cstrncat_~n 4))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 13866#(and (<= 1 cstrncat_~n) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 13867#(and (<= 1 cstrncat_~n) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 4)) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (<= (+ cstrncat_~s~0.offset 6) (select |#length| cstrncat_~s~0.base)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset))) (and (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) (+ (+ cstrncat_~s~0.offset 2) (- 1)))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base))) (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base))))), 13868#(and (<= 1 cstrncat_~n) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)))), 13869#(and (<= 1 cstrncat_~n) (or (<= (+ cstrncat_~n cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (+ cstrncat_~s~0.offset 5) (select |#length| cstrncat_~s~0.base)) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 3)) (and (= 0 (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)) (= |cstrncat_#t~mem0| (select (select |#memory_int| cstrncat_~s~0.base) cstrncat_~s~0.offset)))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 13870#(and (<= 1 cstrncat_~n) (or (<= (+ cstrncat_~s~0.offset 4) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 2)) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (<= (+ cstrncat_~n cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))) (not (= cstrncat_~s~0.base cstrncat_~s2.base))), 13871#(and (<= 1 cstrncat_~n) (not (= cstrncat_~s~0.base cstrncat_~s2.base)) (or (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (and (= 0 cstrncat_~s2.offset) (<= (select |#length| cstrncat_~s2.base) 2)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base)))), 13872#(and (<= 1 cstrncat_~n) (not (= |cstrncat_#t~post2.base| cstrncat_~s~0.base)) (or (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (and (<= (+ (select |#length| cstrncat_~s2.base) |cstrncat_#t~post2.offset|) (+ cstrncat_~s2.offset 1)) (= |cstrncat_#t~post2.offset| 0)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base)))), 13873#(and (<= 1 cstrncat_~n) (or (<= (select |#length| cstrncat_~s~0.base) (+ cstrncat_~s~0.offset 1)) (<= (+ cstrncat_~s~0.offset 3) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base)))), 13874#(and (or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= 0 cstrncat_~n)), 13875#(and (or (and (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n)) (not |cstrncat_#t~short5|)) (or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) (<= (select |#length| cstrncat_~s2.base) (+ cstrncat_~s2.offset 1)) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base)))), 13876#(and (or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s~0.base) cstrncat_~s~0.offset) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (not (= cstrncat_~n 0)) (<= 0 cstrncat_~n)), 13877#(and (not (= cstrncat_~n 0)) (or (<= (+ cstrncat_~s~0.offset 2) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base))) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= 0 cstrncat_~n) (<= 0 cstrncat_~s~0.offset)), 13878#(and (<= 1 cstrncat_~s~0.offset) (<= 0 cstrncat_~n) (<= cstrncat_~s~0.offset (select |#length| cstrncat_~s~0.base)) (or (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset) (<= (+ cstrncat_~n cstrncat_~s~0.offset) (select |#length| cstrncat_~s~0.base)))), 13879#(and (or (not |cstrncat_#t~short5|) (and (<= 1 cstrncat_~s~0.offset) (or (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)) (<= (select |#length| cstrncat_~s2.base) cstrncat_~s2.offset)))) (<= cstrncat_~s~0.offset (select |#length| cstrncat_~s~0.base))), 13880#(and (<= 1 cstrncat_~s~0.offset) (or (<= (select |#length| |cstrncat_#t~post2.base|) |cstrncat_#t~post2.offset|) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base))) (<= cstrncat_~s~0.offset (select |#length| cstrncat_~s~0.base))), 13881#(and (<= 1 cstrncat_~s~0.offset) (<= (+ cstrncat_~s~0.offset 1) (select |#length| cstrncat_~s~0.base)))] [2018-02-04 15:01:47,469 INFO L134 CoverageAnalysis]: Checked inductivity of 152 backedges. 0 proven. 152 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 15:01:47,470 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-02-04 15:01:47,470 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-02-04 15:01:47,470 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=137, Invalid=1195, Unknown=0, NotChecked=0, Total=1332 [2018-02-04 15:01:47,470 INFO L87 Difference]: Start difference. First operand 89 states and 97 transitions. Second operand 37 states. [2018-02-04 15:01:47,780 WARN L146 SmtUtils]: Spent 108ms on a formula simplification. DAG size of input: 108 DAG size of output 102 [2018-02-04 15:01:48,239 WARN L146 SmtUtils]: Spent 217ms on a formula simplification. DAG size of input: 153 DAG size of output 145 [2018-02-04 15:01:48,530 WARN L146 SmtUtils]: Spent 218ms on a formula simplification. DAG size of input: 165 DAG size of output 154 [2018-02-04 15:01:48,773 WARN L146 SmtUtils]: Spent 203ms on a formula simplification. DAG size of input: 160 DAG size of output 155 [2018-02-04 15:01:49,112 WARN L146 SmtUtils]: Spent 250ms on a formula simplification. DAG size of input: 178 DAG size of output 171 [2018-02-04 15:01:49,407 WARN L146 SmtUtils]: Spent 241ms on a formula simplification. DAG size of input: 181 DAG size of output 174 [2018-02-04 15:01:49,742 WARN L143 SmtUtils]: Spent 111ms on a formula simplification that was a NOOP. DAG size: 170 [2018-02-04 15:01:50,066 WARN L143 SmtUtils]: Spent 121ms on a formula simplification that was a NOOP. DAG size: 176 [2018-02-04 15:01:51,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 15:01:51,461 INFO L93 Difference]: Finished difference Result 115 states and 123 transitions. [2018-02-04 15:01:51,461 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-02-04 15:01:51,461 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 67 [2018-02-04 15:01:51,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 15:01:51,462 INFO L225 Difference]: With dead ends: 115 [2018-02-04 15:01:51,462 INFO L226 Difference]: Without dead ends: 115 [2018-02-04 15:01:51,462 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1190 ImplicationChecksByTransitivity, 6.8s TimeCoverageRelationStatistics Valid=482, Invalid=3550, Unknown=0, NotChecked=0, Total=4032 [2018-02-04 15:01:51,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-02-04 15:01:51,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 96. [2018-02-04 15:01:51,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-02-04 15:01:51,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 104 transitions. [2018-02-04 15:01:51,464 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 104 transitions. Word has length 67 [2018-02-04 15:01:51,464 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 15:01:51,464 INFO L432 AbstractCegarLoop]: Abstraction has 96 states and 104 transitions. [2018-02-04 15:01:51,464 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-02-04 15:01:51,464 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 104 transitions. [2018-02-04 15:01:51,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-02-04 15:01:51,465 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 15:01:51,465 INFO L351 BasicCegarLoop]: trace histogram [17, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 15:01:51,465 INFO L371 AbstractCegarLoop]: === Iteration 50 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation, cstrncatErr7RequiresViolation, cstrncatErr5RequiresViolation, cstrncatErr0RequiresViolation, cstrncatErr3RequiresViolation, cstrncatErr9RequiresViolation, cstrncatErr1RequiresViolation, cstrncatErr2RequiresViolation, cstrncatErr8RequiresViolation, cstrncatErr6RequiresViolation, cstrncatErr4RequiresViolation]=== [2018-02-04 15:01:51,465 INFO L82 PathProgramCache]: Analyzing trace with hash 638206580, now seen corresponding path program 14 times [2018-02-04 15:01:51,465 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 15:01:51,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 15:01:51,478 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. Received shutdown request... [2018-02-04 15:01:58,768 FATAL L265 ToolchainWalker]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: Timeout exceeded at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.walkResolutionNode(Interpolator.java:235) at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.access$0(Interpolator.java:233) at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator$ProofTreeWalker.walk(Interpolator.java:130) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:122) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:113) at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.interpolate(Interpolator.java:220) at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.getInterpolants(Interpolator.java:201) at de.uni_freiburg.informatik.ultimate.smtinterpol.smtlib2.SMTInterpol.getInterpolants(SMTInterpol.java:915) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.managedscript.ManagedScript.getInterpolants(ManagedScript.java:192) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.NestedInterpolantsBuilder.computeCraigInterpolants(NestedInterpolantsBuilder.java:281) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.NestedInterpolantsBuilder.(NestedInterpolantsBuilder.java:164) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.InterpolatingTraceCheckCraig.computeInterpolantsTree(InterpolatingTraceCheckCraig.java:267) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.InterpolatingTraceCheckCraig.computeInterpolants(InterpolatingTraceCheckCraig.java:203) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.InterpolatingTraceCheckCraig.(InterpolatingTraceCheckCraig.java:106) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructCraig(TraceCheckConstructor.java:222) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:179) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.FixedTraceAbstractionRefinementStrategy.getTraceCheck(FixedTraceAbstractionRefinementStrategy.java:131) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:231) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:205) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:68) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:397) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:381) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:316) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:292) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:147) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:115) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:119) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:324) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.runToolchainDefault(DefaultToolchainJob.java:221) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.BasicToolchainJob.run(BasicToolchainJob.java:134) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-02-04 15:01:58,771 INFO L168 Benchmark]: Toolchain (without parser) took 193287.56 ms. Allocated memory was 407.9 MB in the beginning and 2.1 GB in the end (delta: 1.7 GB). Free memory was 365.9 MB in the beginning and 1.6 GB in the end (delta: -1.2 GB). Peak memory consumption was 1.8 GB. Max. memory is 5.3 GB. [2018-02-04 15:01:58,772 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 407.9 MB. Free memory is still 371.2 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-04 15:01:58,772 INFO L168 Benchmark]: CACSL2BoogieTranslator took 158.20 ms. Allocated memory is still 407.9 MB. Free memory was 364.6 MB in the beginning and 353.9 MB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 5.3 GB. [2018-02-04 15:01:58,772 INFO L168 Benchmark]: Boogie Preprocessor took 25.30 ms. Allocated memory is still 407.9 MB. Free memory was 353.9 MB in the beginning and 352.6 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. [2018-02-04 15:01:58,772 INFO L168 Benchmark]: RCFGBuilder took 209.80 ms. Allocated memory is still 407.9 MB. Free memory was 352.6 MB in the beginning and 330.0 MB in the end (delta: 22.6 MB). Peak memory consumption was 22.6 MB. Max. memory is 5.3 GB. [2018-02-04 15:01:58,773 INFO L168 Benchmark]: TraceAbstraction took 192891.47 ms. Allocated memory was 407.9 MB in the beginning and 2.1 GB in the end (delta: 1.7 GB). Free memory was 330.0 MB in the beginning and 1.6 GB in the end (delta: -1.3 GB). Peak memory consumption was 1.8 GB. Max. memory is 5.3 GB. [2018-02-04 15:01:58,774 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 407.9 MB. Free memory is still 371.2 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 158.20 ms. Allocated memory is still 407.9 MB. Free memory was 364.6 MB in the beginning and 353.9 MB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 25.30 ms. Allocated memory is still 407.9 MB. Free memory was 353.9 MB in the beginning and 352.6 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. * RCFGBuilder took 209.80 ms. Allocated memory is still 407.9 MB. Free memory was 352.6 MB in the beginning and 330.0 MB in the end (delta: 22.6 MB). Peak memory consumption was 22.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 192891.47 ms. Allocated memory was 407.9 MB in the beginning and 2.1 GB in the end (delta: 1.7 GB). Free memory was 330.0 MB in the beginning and 1.6 GB in the end (delta: -1.3 GB). Peak memory consumption was 1.8 GB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: Timeout exceeded de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: Timeout exceeded: de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.walkResolutionNode(Interpolator.java:235) RESULT: Ultimate could not prove your program: Toolchain returned no result. Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/cstrncat-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_Array.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-04_15-01-58-778.csv Completed graceful shutdown