java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test15_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-c17473d-m [2018-02-04 19:18:29,108 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-04 19:18:29,109 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-04 19:18:29,120 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-04 19:18:29,120 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-04 19:18:29,121 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-04 19:18:29,122 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-04 19:18:29,123 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-04 19:18:29,125 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-04 19:18:29,125 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-04 19:18:29,126 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-04 19:18:29,126 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-04 19:18:29,127 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-04 19:18:29,128 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-04 19:18:29,128 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-04 19:18:29,130 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-04 19:18:29,132 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-04 19:18:29,133 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-04 19:18:29,134 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-04 19:18:29,135 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-04 19:18:29,137 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-02-04 19:18:29,137 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-02-04 19:18:29,137 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-02-04 19:18:29,138 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-02-04 19:18:29,139 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-02-04 19:18:29,140 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-02-04 19:18:29,140 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-02-04 19:18:29,140 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-02-04 19:18:29,141 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-02-04 19:18:29,141 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-04 19:18:29,141 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-04 19:18:29,142 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf [2018-02-04 19:18:29,151 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-04 19:18:29,151 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-04 19:18:29,152 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-04 19:18:29,152 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-04 19:18:29,153 INFO L133 SettingsManager]: * Use SBE=true [2018-02-04 19:18:29,153 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-04 19:18:29,153 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-04 19:18:29,153 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-04 19:18:29,153 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-04 19:18:29,153 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-04 19:18:29,153 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-04 19:18:29,154 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-04 19:18:29,154 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-04 19:18:29,154 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-04 19:18:29,154 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-04 19:18:29,154 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-04 19:18:29,154 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-04 19:18:29,154 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-04 19:18:29,155 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-04 19:18:29,155 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 19:18:29,155 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-04 19:18:29,155 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-02-04 19:18:29,155 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-02-04 19:18:29,155 INFO L133 SettingsManager]: * Trace refinement strategy=SMTINTERPOL [2018-02-04 19:18:29,182 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-04 19:18:29,191 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-04 19:18:29,194 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-04 19:18:29,197 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-04 19:18:29,197 INFO L276 PluginConnector]: CDTParser initialized [2018-02-04 19:18:29,198 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test15_true-valid-memsafety_true-termination.i [2018-02-04 19:18:29,333 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-04 19:18:29,335 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-04 19:18:29,336 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-04 19:18:29,336 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-04 19:18:29,342 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-04 19:18:29,343 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 07:18:29" (1/1) ... [2018-02-04 19:18:29,348 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4b089594 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:18:29, skipping insertion in model container [2018-02-04 19:18:29,348 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 07:18:29" (1/1) ... [2018-02-04 19:18:29,362 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 19:18:29,401 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 19:18:29,485 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 19:18:29,504 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 19:18:29,513 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:18:29 WrapperNode [2018-02-04 19:18:29,513 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-04 19:18:29,513 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-04 19:18:29,513 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-04 19:18:29,514 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-04 19:18:29,525 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:18:29" (1/1) ... [2018-02-04 19:18:29,525 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:18:29" (1/1) ... [2018-02-04 19:18:29,533 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:18:29" (1/1) ... [2018-02-04 19:18:29,533 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:18:29" (1/1) ... [2018-02-04 19:18:29,538 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:18:29" (1/1) ... [2018-02-04 19:18:29,540 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:18:29" (1/1) ... [2018-02-04 19:18:29,541 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:18:29" (1/1) ... [2018-02-04 19:18:29,543 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-04 19:18:29,543 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-04 19:18:29,543 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-04 19:18:29,544 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-04 19:18:29,545 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:18:29" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 19:18:29,578 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-04 19:18:29,578 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-04 19:18:29,578 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-02-04 19:18:29,578 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-02-04 19:18:29,578 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-02-04 19:18:29,578 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-02-04 19:18:29,579 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-02-04 19:18:29,579 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_hid_get_drvdata [2018-02-04 19:18:29,579 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_hid_set_drvdata [2018-02-04 19:18:29,579 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_init_arvo_device_struct [2018-02-04 19:18:29,579 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_init_specials [2018-02-04 19:18:29,579 INFO L136 BoogieDeclarations]: Found implementation of procedure lvd_arvo_remove_specials [2018-02-04 19:18:29,579 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_probe [2018-02-04 19:18:29,579 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_remove [2018-02-04 19:18:29,579 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-02-04 19:18:29,579 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-04 19:18:29,579 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-02-04 19:18:29,579 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-02-04 19:18:29,579 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-02-04 19:18:29,579 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-02-04 19:18:29,580 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-02-04 19:18:29,580 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-02-04 19:18:29,580 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-02-04 19:18:29,580 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-02-04 19:18:29,580 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-02-04 19:18:29,580 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-02-04 19:18:29,580 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-02-04 19:18:29,580 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-02-04 19:18:29,580 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-02-04 19:18:29,580 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-02-04 19:18:29,580 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-02-04 19:18:29,580 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-02-04 19:18:29,580 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-02-04 19:18:29,580 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-02-04 19:18:29,581 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_hid_get_drvdata [2018-02-04 19:18:29,581 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_hid_set_drvdata [2018-02-04 19:18:29,581 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_init_arvo_device_struct [2018-02-04 19:18:29,581 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_init_specials [2018-02-04 19:18:29,581 INFO L128 BoogieDeclarations]: Found specification of procedure lvd_arvo_remove_specials [2018-02-04 19:18:29,581 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_probe [2018-02-04 19:18:29,581 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_remove [2018-02-04 19:18:29,581 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-02-04 19:18:29,581 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-04 19:18:29,581 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-04 19:18:29,581 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-04 19:18:29,934 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-04 19:18:29,934 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 07:18:29 BoogieIcfgContainer [2018-02-04 19:18:29,934 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-04 19:18:29,938 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-04 19:18:29,938 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-04 19:18:29,941 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-04 19:18:29,941 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 04.02 07:18:29" (1/3) ... [2018-02-04 19:18:29,942 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@47e68a8e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 07:18:29, skipping insertion in model container [2018-02-04 19:18:29,942 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:18:29" (2/3) ... [2018-02-04 19:18:29,942 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@47e68a8e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 07:18:29, skipping insertion in model container [2018-02-04 19:18:29,942 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 07:18:29" (3/3) ... [2018-02-04 19:18:29,944 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test15_true-valid-memsafety_true-termination.i [2018-02-04 19:18:29,949 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-02-04 19:18:29,955 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 45 error locations. [2018-02-04 19:18:29,987 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-04 19:18:29,987 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-04 19:18:29,987 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-02-04 19:18:29,987 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-02-04 19:18:29,987 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-04 19:18:29,987 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-04 19:18:29,987 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-04 19:18:29,987 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-04 19:18:29,988 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-04 19:18:30,001 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states. [2018-02-04 19:18:30,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-02-04 19:18:30,009 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:18:30,010 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:18:30,010 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:18:30,013 INFO L82 PathProgramCache]: Analyzing trace with hash -26265707, now seen corresponding path program 1 times [2018-02-04 19:18:30,014 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:18:30,014 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:18:30,052 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:30,052 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:30,052 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:30,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:30,096 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:18:30,157 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:18:30,159 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:18:30,159 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-04 19:18:30,161 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-04 19:18:30,233 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-04 19:18:30,234 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 19:18:30,236 INFO L87 Difference]: Start difference. First operand 173 states. Second operand 3 states. [2018-02-04 19:18:30,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:18:30,418 INFO L93 Difference]: Finished difference Result 230 states and 259 transitions. [2018-02-04 19:18:30,419 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-04 19:18:30,419 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2018-02-04 19:18:30,420 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:18:30,429 INFO L225 Difference]: With dead ends: 230 [2018-02-04 19:18:30,429 INFO L226 Difference]: Without dead ends: 224 [2018-02-04 19:18:30,431 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 19:18:30,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-02-04 19:18:30,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 174. [2018-02-04 19:18:30,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-02-04 19:18:30,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 190 transitions. [2018-02-04 19:18:30,470 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 190 transitions. Word has length 16 [2018-02-04 19:18:30,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:18:30,470 INFO L432 AbstractCegarLoop]: Abstraction has 174 states and 190 transitions. [2018-02-04 19:18:30,470 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-04 19:18:30,470 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 190 transitions. [2018-02-04 19:18:30,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-02-04 19:18:30,471 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:18:30,471 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:18:30,472 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:18:30,472 INFO L82 PathProgramCache]: Analyzing trace with hash -325108585, now seen corresponding path program 1 times [2018-02-04 19:18:30,472 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:18:30,472 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:18:30,473 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:30,473 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:30,473 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:30,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:30,487 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:18:30,526 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:18:30,527 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:18:30,527 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 19:18:30,528 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 19:18:30,528 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 19:18:30,528 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 19:18:30,529 INFO L87 Difference]: Start difference. First operand 174 states and 190 transitions. Second operand 6 states. [2018-02-04 19:18:30,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:18:30,569 INFO L93 Difference]: Finished difference Result 215 states and 240 transitions. [2018-02-04 19:18:30,570 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 19:18:30,570 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-02-04 19:18:30,570 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:18:30,572 INFO L225 Difference]: With dead ends: 215 [2018-02-04 19:18:30,572 INFO L226 Difference]: Without dead ends: 215 [2018-02-04 19:18:30,572 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:18:30,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 215 states. [2018-02-04 19:18:30,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 215 to 170. [2018-02-04 19:18:30,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-02-04 19:18:30,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 183 transitions. [2018-02-04 19:18:30,583 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 183 transitions. Word has length 18 [2018-02-04 19:18:30,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:18:30,583 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 183 transitions. [2018-02-04 19:18:30,583 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 19:18:30,583 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 183 transitions. [2018-02-04 19:18:30,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-02-04 19:18:30,584 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:18:30,584 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:18:30,584 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:18:30,584 INFO L82 PathProgramCache]: Analyzing trace with hash 743711378, now seen corresponding path program 1 times [2018-02-04 19:18:30,585 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:18:30,585 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:18:30,586 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:30,586 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:30,586 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:30,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:30,597 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:18:30,633 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 19:18:30,633 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:18:30,633 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:18:30,634 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:30,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:30,661 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:18:30,689 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 19:18:30,690 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:18:30,690 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4] total 8 [2018-02-04 19:18:30,690 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 19:18:30,690 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 19:18:30,691 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-02-04 19:18:30,691 INFO L87 Difference]: Start difference. First operand 170 states and 183 transitions. Second operand 8 states. [2018-02-04 19:18:30,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:18:30,721 INFO L93 Difference]: Finished difference Result 174 states and 188 transitions. [2018-02-04 19:18:30,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 19:18:30,722 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 21 [2018-02-04 19:18:30,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:18:30,723 INFO L225 Difference]: With dead ends: 174 [2018-02-04 19:18:30,723 INFO L226 Difference]: Without dead ends: 172 [2018-02-04 19:18:30,723 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-02-04 19:18:30,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-02-04 19:18:30,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 172. [2018-02-04 19:18:30,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-02-04 19:18:30,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 186 transitions. [2018-02-04 19:18:30,731 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 186 transitions. Word has length 21 [2018-02-04 19:18:30,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:18:30,731 INFO L432 AbstractCegarLoop]: Abstraction has 172 states and 186 transitions. [2018-02-04 19:18:30,731 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 19:18:30,731 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 186 transitions. [2018-02-04 19:18:30,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-02-04 19:18:30,731 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:18:30,732 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:18:30,732 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:18:30,732 INFO L82 PathProgramCache]: Analyzing trace with hash 667479760, now seen corresponding path program 1 times [2018-02-04 19:18:30,732 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:18:30,732 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:18:30,733 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:30,733 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:30,733 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:30,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:30,743 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:18:30,791 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 19:18:30,791 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:18:30,791 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:18:30,792 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:30,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:30,812 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:18:30,827 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 19:18:30,827 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:18:30,827 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-02-04 19:18:30,827 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 19:18:30,828 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 19:18:30,828 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 19:18:30,828 INFO L87 Difference]: Start difference. First operand 172 states and 186 transitions. Second operand 6 states. [2018-02-04 19:18:30,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:18:30,856 INFO L93 Difference]: Finished difference Result 171 states and 185 transitions. [2018-02-04 19:18:30,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 19:18:30,857 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-02-04 19:18:30,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:18:30,858 INFO L225 Difference]: With dead ends: 171 [2018-02-04 19:18:30,858 INFO L226 Difference]: Without dead ends: 171 [2018-02-04 19:18:30,858 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 21 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:18:30,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-02-04 19:18:30,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 171. [2018-02-04 19:18:30,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-02-04 19:18:30,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 185 transitions. [2018-02-04 19:18:30,865 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 185 transitions. Word has length 23 [2018-02-04 19:18:30,865 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:18:30,865 INFO L432 AbstractCegarLoop]: Abstraction has 171 states and 185 transitions. [2018-02-04 19:18:30,865 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 19:18:30,865 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 185 transitions. [2018-02-04 19:18:30,866 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-02-04 19:18:30,866 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:18:30,866 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:18:30,866 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:18:30,866 INFO L82 PathProgramCache]: Analyzing trace with hash 667479761, now seen corresponding path program 1 times [2018-02-04 19:18:30,866 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:18:30,866 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:18:30,867 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:30,867 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:30,867 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:30,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:30,876 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:18:30,922 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:18:30,923 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:18:30,923 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:18:30,923 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:30,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:30,938 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:18:30,961 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 19:18:30,963 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:30,966 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:18:30,966 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-04 19:18:30,971 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:18:30,971 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:18:30,971 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-02-04 19:18:30,971 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 19:18:30,972 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 19:18:30,972 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:18:30,972 INFO L87 Difference]: Start difference. First operand 171 states and 185 transitions. Second operand 7 states. [2018-02-04 19:18:31,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:18:31,301 INFO L93 Difference]: Finished difference Result 216 states and 238 transitions. [2018-02-04 19:18:31,301 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 19:18:31,301 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-02-04 19:18:31,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:18:31,302 INFO L225 Difference]: With dead ends: 216 [2018-02-04 19:18:31,302 INFO L226 Difference]: Without dead ends: 216 [2018-02-04 19:18:31,302 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-02-04 19:18:31,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-02-04 19:18:31,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 184. [2018-02-04 19:18:31,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-02-04 19:18:31,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 211 transitions. [2018-02-04 19:18:31,310 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 211 transitions. Word has length 23 [2018-02-04 19:18:31,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:18:31,310 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 211 transitions. [2018-02-04 19:18:31,310 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 19:18:31,310 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 211 transitions. [2018-02-04 19:18:31,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-02-04 19:18:31,311 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:18:31,311 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:18:31,311 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:18:31,311 INFO L82 PathProgramCache]: Analyzing trace with hash -314305773, now seen corresponding path program 1 times [2018-02-04 19:18:31,311 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:18:31,311 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:18:31,312 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:31,312 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:31,312 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:31,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:31,322 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:18:31,343 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 19:18:31,343 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:18:31,343 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 19:18:31,343 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 19:18:31,343 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 19:18:31,344 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 19:18:31,344 INFO L87 Difference]: Start difference. First operand 184 states and 211 transitions. Second operand 6 states. [2018-02-04 19:18:31,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:18:31,423 INFO L93 Difference]: Finished difference Result 220 states and 251 transitions. [2018-02-04 19:18:31,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 19:18:31,424 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-02-04 19:18:31,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:18:31,425 INFO L225 Difference]: With dead ends: 220 [2018-02-04 19:18:31,425 INFO L226 Difference]: Without dead ends: 220 [2018-02-04 19:18:31,426 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:18:31,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-02-04 19:18:31,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 184. [2018-02-04 19:18:31,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-02-04 19:18:31,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 210 transitions. [2018-02-04 19:18:31,441 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 210 transitions. Word has length 25 [2018-02-04 19:18:31,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:18:31,442 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 210 transitions. [2018-02-04 19:18:31,442 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 19:18:31,442 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 210 transitions. [2018-02-04 19:18:31,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-02-04 19:18:31,443 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:18:31,443 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:18:31,443 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:18:31,443 INFO L82 PathProgramCache]: Analyzing trace with hash -808960356, now seen corresponding path program 1 times [2018-02-04 19:18:31,443 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:18:31,443 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:18:31,444 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:31,444 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:31,444 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:31,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:31,458 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:18:31,465 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:18:31,465 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:18:31,465 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:18:31,466 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:31,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:31,481 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:18:31,538 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 19:18:31,538 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:18:31,538 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8] total 8 [2018-02-04 19:18:31,539 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-02-04 19:18:31,539 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-02-04 19:18:31,539 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=50, Unknown=5, NotChecked=0, Total=72 [2018-02-04 19:18:31,539 INFO L87 Difference]: Start difference. First operand 184 states and 210 transitions. Second operand 9 states. [2018-02-04 19:18:31,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:18:31,962 INFO L93 Difference]: Finished difference Result 220 states and 242 transitions. [2018-02-04 19:18:31,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 19:18:31,962 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 26 [2018-02-04 19:18:31,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:18:31,963 INFO L225 Difference]: With dead ends: 220 [2018-02-04 19:18:31,963 INFO L226 Difference]: Without dead ends: 216 [2018-02-04 19:18:31,964 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=64, Unknown=5, NotChecked=0, Total=90 [2018-02-04 19:18:31,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-02-04 19:18:31,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 183. [2018-02-04 19:18:31,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-02-04 19:18:31,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 208 transitions. [2018-02-04 19:18:31,969 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 208 transitions. Word has length 26 [2018-02-04 19:18:31,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:18:31,969 INFO L432 AbstractCegarLoop]: Abstraction has 183 states and 208 transitions. [2018-02-04 19:18:31,970 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-02-04 19:18:31,970 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 208 transitions. [2018-02-04 19:18:31,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-02-04 19:18:31,970 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:18:31,970 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:18:31,970 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:18:31,971 INFO L82 PathProgramCache]: Analyzing trace with hash 437179314, now seen corresponding path program 1 times [2018-02-04 19:18:31,971 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:18:31,971 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:18:31,972 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:31,972 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:31,972 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:31,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:31,986 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:18:32,023 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-02-04 19:18:32,024 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:18:32,024 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:18:32,025 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:32,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:32,040 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:18:32,053 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 19:18:32,053 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:18:32,054 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 5 [2018-02-04 19:18:32,054 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 19:18:32,054 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 19:18:32,054 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 19:18:32,055 INFO L87 Difference]: Start difference. First operand 183 states and 208 transitions. Second operand 5 states. [2018-02-04 19:18:32,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:18:32,075 INFO L93 Difference]: Finished difference Result 173 states and 185 transitions. [2018-02-04 19:18:32,075 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 19:18:32,075 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2018-02-04 19:18:32,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:18:32,076 INFO L225 Difference]: With dead ends: 173 [2018-02-04 19:18:32,076 INFO L226 Difference]: Without dead ends: 171 [2018-02-04 19:18:32,076 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 27 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 19:18:32,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-02-04 19:18:32,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 171. [2018-02-04 19:18:32,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-02-04 19:18:32,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 183 transitions. [2018-02-04 19:18:32,079 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 183 transitions. Word has length 28 [2018-02-04 19:18:32,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:18:32,079 INFO L432 AbstractCegarLoop]: Abstraction has 171 states and 183 transitions. [2018-02-04 19:18:32,079 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 19:18:32,079 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 183 transitions. [2018-02-04 19:18:32,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-02-04 19:18:32,079 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:18:32,080 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:18:32,080 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:18:32,080 INFO L82 PathProgramCache]: Analyzing trace with hash 1753876656, now seen corresponding path program 2 times [2018-02-04 19:18:32,080 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:18:32,080 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:18:32,080 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:32,081 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:32,081 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:32,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:32,085 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:18:32,109 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 9 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 19:18:32,109 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:18:32,109 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:18:32,110 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 19:18:32,120 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 19:18:32,120 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:18:32,122 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:18:32,131 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 19:18:32,131 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:32,133 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:18:32,133 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-04 19:18:32,137 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 9 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 19:18:32,137 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:18:32,137 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-02-04 19:18:32,137 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 19:18:32,138 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 19:18:32,138 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:18:32,138 INFO L87 Difference]: Start difference. First operand 171 states and 183 transitions. Second operand 7 states. [2018-02-04 19:18:32,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:18:32,411 INFO L93 Difference]: Finished difference Result 189 states and 205 transitions. [2018-02-04 19:18:32,413 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 19:18:32,413 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 30 [2018-02-04 19:18:32,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:18:32,414 INFO L225 Difference]: With dead ends: 189 [2018-02-04 19:18:32,414 INFO L226 Difference]: Without dead ends: 189 [2018-02-04 19:18:32,415 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-02-04 19:18:32,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-02-04 19:18:32,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 186. [2018-02-04 19:18:32,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-02-04 19:18:32,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 205 transitions. [2018-02-04 19:18:32,419 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 205 transitions. Word has length 30 [2018-02-04 19:18:32,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:18:32,419 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 205 transitions. [2018-02-04 19:18:32,419 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 19:18:32,419 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 205 transitions. [2018-02-04 19:18:32,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-02-04 19:18:32,420 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:18:32,420 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:18:32,420 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:18:32,420 INFO L82 PathProgramCache]: Analyzing trace with hash 1753876657, now seen corresponding path program 1 times [2018-02-04 19:18:32,420 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:18:32,420 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:18:32,421 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:32,421 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:18:32,421 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:32,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:32,429 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:18:32,537 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 10 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-02-04 19:18:32,537 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:18:32,537 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:18:32,538 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:32,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:32,565 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:18:32,615 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 19:18:32,616 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:32,639 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 19:18:32,639 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:32,654 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:18:32,654 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 19:18:32,718 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 10 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-02-04 19:18:32,718 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:18:32,718 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-02-04 19:18:32,719 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-04 19:18:32,719 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-04 19:18:32,719 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2018-02-04 19:18:32,719 INFO L87 Difference]: Start difference. First operand 186 states and 205 transitions. Second operand 13 states. [2018-02-04 19:18:33,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:18:33,243 INFO L93 Difference]: Finished difference Result 216 states and 240 transitions. [2018-02-04 19:18:33,243 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 19:18:33,243 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 30 [2018-02-04 19:18:33,243 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:18:33,244 INFO L225 Difference]: With dead ends: 216 [2018-02-04 19:18:33,244 INFO L226 Difference]: Without dead ends: 216 [2018-02-04 19:18:33,245 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2018-02-04 19:18:33,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-02-04 19:18:33,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 204. [2018-02-04 19:18:33,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-02-04 19:18:33,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 236 transitions. [2018-02-04 19:18:33,249 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 236 transitions. Word has length 30 [2018-02-04 19:18:33,249 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:18:33,249 INFO L432 AbstractCegarLoop]: Abstraction has 204 states and 236 transitions. [2018-02-04 19:18:33,257 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-04 19:18:33,257 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 236 transitions. [2018-02-04 19:18:33,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-02-04 19:18:33,257 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:18:33,258 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:18:33,258 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:18:33,258 INFO L82 PathProgramCache]: Analyzing trace with hash 1756950194, now seen corresponding path program 1 times [2018-02-04 19:18:33,258 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:18:33,258 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:18:33,259 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:33,259 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:33,259 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:33,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:33,267 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:18:33,270 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:18:33,270 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:18:33,270 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:18:33,271 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:33,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:33,288 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:18:33,296 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 19:18:33,297 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:33,298 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:18:33,298 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-04 19:18:33,320 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|ldv_malloc_#t~malloc2.base| Int)) (= |c_#valid| (store |c_old(#valid)| |ldv_malloc_#t~malloc2.base| 1))) is different from true [2018-02-04 19:18:33,324 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-02-04 19:18:33,325 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:33,327 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:18:33,327 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:11 [2018-02-04 19:18:33,331 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 3 not checked. [2018-02-04 19:18:33,331 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:18:33,332 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2018-02-04 19:18:33,332 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 19:18:33,332 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 19:18:33,332 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=32, Unknown=1, NotChecked=10, Total=56 [2018-02-04 19:18:33,332 INFO L87 Difference]: Start difference. First operand 204 states and 236 transitions. Second operand 8 states. [2018-02-04 19:18:33,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:18:33,566 INFO L93 Difference]: Finished difference Result 205 states and 235 transitions. [2018-02-04 19:18:33,567 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 19:18:33,567 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 32 [2018-02-04 19:18:33,567 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:18:33,568 INFO L225 Difference]: With dead ends: 205 [2018-02-04 19:18:33,568 INFO L226 Difference]: Without dead ends: 205 [2018-02-04 19:18:33,568 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 24 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=53, Unknown=2, NotChecked=14, Total=90 [2018-02-04 19:18:33,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-02-04 19:18:33,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 203. [2018-02-04 19:18:33,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-02-04 19:18:33,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 235 transitions. [2018-02-04 19:18:33,573 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 235 transitions. Word has length 32 [2018-02-04 19:18:33,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:18:33,574 INFO L432 AbstractCegarLoop]: Abstraction has 203 states and 235 transitions. [2018-02-04 19:18:33,574 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 19:18:33,574 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 235 transitions. [2018-02-04 19:18:33,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-02-04 19:18:33,575 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:18:33,575 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:18:33,575 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:18:33,575 INFO L82 PathProgramCache]: Analyzing trace with hash 1756950195, now seen corresponding path program 1 times [2018-02-04 19:18:33,575 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:18:33,575 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:18:33,576 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:33,576 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:33,577 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:33,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:33,585 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:18:33,593 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:18:33,594 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:18:33,594 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:18:33,595 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:33,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:33,613 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:18:33,624 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 19:18:33,624 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:33,641 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 19:18:33,641 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:33,652 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:18:33,652 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 19:18:33,703 WARN L1033 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ldv_malloc_#in~size| 4294967296))) (or (and (exists ((v_prenex_3 Int)) (= (store |c_old(#length)| v_prenex_3 (mod |c_ldv_malloc_#in~size| 4294967296)) |c_#length|)) (<= .cse0 2147483647)) (and (< 2147483647 .cse0) (exists ((|ldv_malloc_#t~malloc2.base| Int)) (= (store |c_old(#length)| |ldv_malloc_#t~malloc2.base| (+ (mod |c_ldv_malloc_#in~size| 4294967296) (- 4294967296))) |c_#length|))))) is different from true [2018-02-04 19:18:33,708 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:33,713 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 12 treesize of output 15 [2018-02-04 19:18:33,713 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-02-04 19:18:33,720 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-02-04 19:18:33,721 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:24 [2018-02-04 19:18:33,747 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 3 not checked. [2018-02-04 19:18:33,748 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:18:33,748 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10] total 10 [2018-02-04 19:18:33,748 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 19:18:33,748 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 19:18:33,748 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=72, Unknown=1, NotChecked=16, Total=110 [2018-02-04 19:18:33,748 INFO L87 Difference]: Start difference. First operand 203 states and 235 transitions. Second operand 11 states. [2018-02-04 19:18:34,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:18:34,319 INFO L93 Difference]: Finished difference Result 224 states and 246 transitions. [2018-02-04 19:18:34,320 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 19:18:34,320 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-02-04 19:18:34,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:18:34,321 INFO L225 Difference]: With dead ends: 224 [2018-02-04 19:18:34,321 INFO L226 Difference]: Without dead ends: 224 [2018-02-04 19:18:34,321 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=104, Unknown=1, NotChecked=20, Total=156 [2018-02-04 19:18:34,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-02-04 19:18:34,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 185. [2018-02-04 19:18:34,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-02-04 19:18:34,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 205 transitions. [2018-02-04 19:18:34,325 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 205 transitions. Word has length 32 [2018-02-04 19:18:34,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:18:34,326 INFO L432 AbstractCegarLoop]: Abstraction has 185 states and 205 transitions. [2018-02-04 19:18:34,326 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 19:18:34,326 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 205 transitions. [2018-02-04 19:18:34,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-02-04 19:18:34,326 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:18:34,327 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:18:34,327 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:18:34,327 INFO L82 PathProgramCache]: Analyzing trace with hash 860002885, now seen corresponding path program 1 times [2018-02-04 19:18:34,327 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:18:34,327 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:18:34,328 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:34,328 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:34,328 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:34,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:34,336 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:18:34,339 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:18:34,339 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:18:34,339 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:18:34,339 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:34,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:34,357 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:18:34,365 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 19:18:34,365 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:34,367 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:18:34,367 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-04 19:18:34,411 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:34,412 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:34,413 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 19:18:34,413 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:34,418 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:18:34,419 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-02-04 19:18:34,460 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:34,461 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 19:18:34,461 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:34,465 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:18:34,465 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:25, output treesize:15 [2018-02-04 19:18:34,485 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 8 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-04 19:18:34,485 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:18:34,485 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12] total 12 [2018-02-04 19:18:34,485 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-04 19:18:34,485 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-04 19:18:34,485 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2018-02-04 19:18:34,485 INFO L87 Difference]: Start difference. First operand 185 states and 205 transitions. Second operand 13 states. [2018-02-04 19:18:34,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:18:34,884 INFO L93 Difference]: Finished difference Result 188 states and 208 transitions. [2018-02-04 19:18:34,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 19:18:34,884 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 35 [2018-02-04 19:18:34,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:18:34,885 INFO L225 Difference]: With dead ends: 188 [2018-02-04 19:18:34,885 INFO L226 Difference]: Without dead ends: 188 [2018-02-04 19:18:34,885 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 22 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=146, Unknown=0, NotChecked=0, Total=182 [2018-02-04 19:18:34,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-02-04 19:18:34,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 185. [2018-02-04 19:18:34,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-02-04 19:18:34,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 205 transitions. [2018-02-04 19:18:34,890 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 205 transitions. Word has length 35 [2018-02-04 19:18:34,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:18:34,890 INFO L432 AbstractCegarLoop]: Abstraction has 185 states and 205 transitions. [2018-02-04 19:18:34,890 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-04 19:18:34,890 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 205 transitions. [2018-02-04 19:18:34,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-04 19:18:34,891 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:18:34,891 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:18:34,891 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:18:34,891 INFO L82 PathProgramCache]: Analyzing trace with hash 890317459, now seen corresponding path program 1 times [2018-02-04 19:18:34,891 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:18:34,891 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:18:34,892 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:34,892 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:34,892 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:34,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:34,901 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:18:34,949 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-04 19:18:34,949 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:18:34,949 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 19:18:34,950 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 19:18:34,950 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 19:18:34,950 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 19:18:34,950 INFO L87 Difference]: Start difference. First operand 185 states and 205 transitions. Second operand 6 states. [2018-02-04 19:18:35,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:18:35,022 INFO L93 Difference]: Finished difference Result 193 states and 213 transitions. [2018-02-04 19:18:35,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 19:18:35,023 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 36 [2018-02-04 19:18:35,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:18:35,023 INFO L225 Difference]: With dead ends: 193 [2018-02-04 19:18:35,023 INFO L226 Difference]: Without dead ends: 193 [2018-02-04 19:18:35,024 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-02-04 19:18:35,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-02-04 19:18:35,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 189. [2018-02-04 19:18:35,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2018-02-04 19:18:35,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 209 transitions. [2018-02-04 19:18:35,028 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 209 transitions. Word has length 36 [2018-02-04 19:18:35,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:18:35,029 INFO L432 AbstractCegarLoop]: Abstraction has 189 states and 209 transitions. [2018-02-04 19:18:35,029 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 19:18:35,029 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 209 transitions. [2018-02-04 19:18:35,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-02-04 19:18:35,029 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:18:35,029 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:18:35,029 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:18:35,030 INFO L82 PathProgramCache]: Analyzing trace with hash 866086568, now seen corresponding path program 1 times [2018-02-04 19:18:35,030 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:18:35,030 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:18:35,031 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:35,031 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:35,031 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:35,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:35,039 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:18:35,042 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:18:35,042 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:18:35,042 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:18:35,043 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:35,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:35,060 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:18:35,299 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-04 19:18:35,300 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:18:35,300 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12] total 12 [2018-02-04 19:18:35,300 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-04 19:18:35,300 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-04 19:18:35,300 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=121, Unknown=7, NotChecked=0, Total=156 [2018-02-04 19:18:35,300 INFO L87 Difference]: Start difference. First operand 189 states and 209 transitions. Second operand 13 states. [2018-02-04 19:18:35,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:18:35,728 INFO L93 Difference]: Finished difference Result 194 states and 213 transitions. [2018-02-04 19:18:35,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-04 19:18:35,729 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 38 [2018-02-04 19:18:35,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:18:35,730 INFO L225 Difference]: With dead ends: 194 [2018-02-04 19:18:35,730 INFO L226 Difference]: Without dead ends: 183 [2018-02-04 19:18:35,730 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 25 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=32, Invalid=143, Unknown=7, NotChecked=0, Total=182 [2018-02-04 19:18:35,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-02-04 19:18:35,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 183. [2018-02-04 19:18:35,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-02-04 19:18:35,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 202 transitions. [2018-02-04 19:18:35,732 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 202 transitions. Word has length 38 [2018-02-04 19:18:35,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:18:35,733 INFO L432 AbstractCegarLoop]: Abstraction has 183 states and 202 transitions. [2018-02-04 19:18:35,733 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-04 19:18:35,733 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 202 transitions. [2018-02-04 19:18:35,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-02-04 19:18:35,733 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:18:35,733 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:18:35,733 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:18:35,733 INFO L82 PathProgramCache]: Analyzing trace with hash 499648277, now seen corresponding path program 1 times [2018-02-04 19:18:35,733 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:18:35,733 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:18:35,734 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:35,734 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:35,734 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:35,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:35,742 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:18:35,786 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 19:18:35,786 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:18:35,786 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 19:18:35,786 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 19:18:35,786 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 19:18:35,786 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:18:35,787 INFO L87 Difference]: Start difference. First operand 183 states and 202 transitions. Second operand 7 states. [2018-02-04 19:18:35,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:18:35,920 INFO L93 Difference]: Finished difference Result 182 states and 201 transitions. [2018-02-04 19:18:35,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 19:18:35,921 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 38 [2018-02-04 19:18:35,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:18:35,921 INFO L225 Difference]: With dead ends: 182 [2018-02-04 19:18:35,921 INFO L226 Difference]: Without dead ends: 182 [2018-02-04 19:18:35,922 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-02-04 19:18:35,922 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-02-04 19:18:35,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 182. [2018-02-04 19:18:35,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-02-04 19:18:35,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 201 transitions. [2018-02-04 19:18:35,924 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 201 transitions. Word has length 38 [2018-02-04 19:18:35,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:18:35,925 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 201 transitions. [2018-02-04 19:18:35,925 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 19:18:35,925 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 201 transitions. [2018-02-04 19:18:35,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-02-04 19:18:35,925 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:18:35,925 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:18:35,925 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:18:35,925 INFO L82 PathProgramCache]: Analyzing trace with hash 499648278, now seen corresponding path program 1 times [2018-02-04 19:18:35,925 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:18:35,925 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:18:35,926 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:35,926 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:35,926 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:35,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:35,935 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:18:36,035 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-02-04 19:18:36,035 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:18:36,035 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 19:18:36,035 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 19:18:36,036 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 19:18:36,036 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-04 19:18:36,036 INFO L87 Difference]: Start difference. First operand 182 states and 201 transitions. Second operand 8 states. [2018-02-04 19:18:36,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:18:36,195 INFO L93 Difference]: Finished difference Result 183 states and 202 transitions. [2018-02-04 19:18:36,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 19:18:36,195 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 38 [2018-02-04 19:18:36,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:18:36,195 INFO L225 Difference]: With dead ends: 183 [2018-02-04 19:18:36,196 INFO L226 Difference]: Without dead ends: 183 [2018-02-04 19:18:36,196 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2018-02-04 19:18:36,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-02-04 19:18:36,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 181. [2018-02-04 19:18:36,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-02-04 19:18:36,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 200 transitions. [2018-02-04 19:18:36,200 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 200 transitions. Word has length 38 [2018-02-04 19:18:36,200 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:18:36,200 INFO L432 AbstractCegarLoop]: Abstraction has 181 states and 200 transitions. [2018-02-04 19:18:36,200 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 19:18:36,200 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 200 transitions. [2018-02-04 19:18:36,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-02-04 19:18:36,201 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:18:36,201 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:18:36,201 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:18:36,201 INFO L82 PathProgramCache]: Analyzing trace with hash -874341065, now seen corresponding path program 1 times [2018-02-04 19:18:36,201 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:18:36,201 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:18:36,202 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:36,202 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:36,203 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:18:36,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:36,215 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:18:36,240 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:18:36,240 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:18:36,240 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:18:36,241 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:18:36,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:18:36,269 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:18:36,276 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-02-04 19:18:36,276 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:36,278 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-02-04 19:18:36,279 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:36,296 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-02-04 19:18:36,297 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:36,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-02-04 19:18:36,308 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:36,318 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:18:36,318 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46 [2018-02-04 19:18:36,407 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:36,408 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:36,409 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 44 [2018-02-04 19:18:36,409 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:36,429 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:36,430 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 47 [2018-02-04 19:18:36,430 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:36,458 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:36,460 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 41 [2018-02-04 19:18:36,460 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:36,481 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:36,481 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:36,481 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 41 [2018-02-04 19:18:36,482 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:36,498 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-02-04 19:18:36,498 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:79, output treesize:69 [2018-02-04 19:18:36,896 WARN L1033 $PredicateComparison]: unable to prove that (or (exists ((v_prenex_11 Int) (v_prenex_10 Int)) (let ((.cse0 (mod v_prenex_11 4294967296))) (and (< 2147483647 .cse0) (= (store |c_old(#length)| v_prenex_10 (+ .cse0 (- 4294967296))) |c_#length|) (<= (select |c_old(#valid)| v_prenex_10) 0)))) (exists ((|ldv_malloc_#t~malloc2.base| Int) (ldv_malloc_~size Int)) (let ((.cse1 (mod ldv_malloc_~size 4294967296))) (and (= |c_#length| (store |c_old(#length)| |ldv_malloc_#t~malloc2.base| .cse1)) (<= .cse1 2147483647) (<= (select |c_old(#valid)| |ldv_malloc_#t~malloc2.base|) 0))))) is different from true [2018-02-04 19:18:36,912 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:36,913 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:36,913 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:36,914 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 57 [2018-02-04 19:18:36,914 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:36,969 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:36,970 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:36,970 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:36,971 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:36,971 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 55 [2018-02-04 19:18:36,972 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:37,027 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 49 [2018-02-04 19:18:37,027 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:37,084 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:37,085 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:37,086 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:37,087 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 63 [2018-02-04 19:18:37,087 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:37,153 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:37,153 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:37,154 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:37,154 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:37,155 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 57 [2018-02-04 19:18:37,155 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:37,217 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:37,218 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:37,219 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:37,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 67 [2018-02-04 19:18:37,220 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:37,273 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:37,274 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:37,275 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:37,275 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 55 [2018-02-04 19:18:37,276 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:37,324 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:37,324 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:18:37,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 67 [2018-02-04 19:18:37,325 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-02-04 19:18:37,371 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 8 dim-1 vars, End of recursive call: 16 dim-0 vars, and 4 xjuncts. [2018-02-04 19:18:37,372 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 24 variables, input treesize:213, output treesize:165 [2018-02-04 19:19:01,643 WARN L146 SmtUtils]: Spent 20226ms on a formula simplification. DAG size of input: 91 DAG size of output 71 [2018-02-04 19:19:01,689 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 6 not checked. [2018-02-04 19:19:01,689 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:19:01,690 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11] total 11 [2018-02-04 19:19:01,690 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-04 19:19:01,690 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-04 19:19:01,690 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=87, Unknown=5, NotChecked=18, Total=132 [2018-02-04 19:19:01,690 INFO L87 Difference]: Start difference. First operand 181 states and 200 transitions. Second operand 12 states. [2018-02-04 19:19:36,956 WARN L146 SmtUtils]: Spent 22792ms on a formula simplification. DAG size of input: 94 DAG size of output 92 [2018-02-04 19:19:53,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:19:53,964 INFO L93 Difference]: Finished difference Result 207 states and 226 transitions. [2018-02-04 19:19:53,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-02-04 19:19:53,964 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 40 [2018-02-04 19:19:53,965 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:19:53,965 INFO L225 Difference]: With dead ends: 207 [2018-02-04 19:19:53,965 INFO L226 Difference]: Without dead ends: 207 [2018-02-04 19:19:53,966 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 49.8s TimeCoverageRelationStatistics Valid=51, Invalid=219, Unknown=6, NotChecked=30, Total=306 [2018-02-04 19:19:53,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-02-04 19:19:53,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 180. [2018-02-04 19:19:53,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-02-04 19:19:53,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 199 transitions. [2018-02-04 19:19:53,970 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 199 transitions. Word has length 40 [2018-02-04 19:19:53,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:19:53,970 INFO L432 AbstractCegarLoop]: Abstraction has 180 states and 199 transitions. [2018-02-04 19:19:53,970 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-04 19:19:53,971 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 199 transitions. [2018-02-04 19:19:53,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-02-04 19:19:53,971 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:19:53,971 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:19:53,971 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:19:53,972 INFO L82 PathProgramCache]: Analyzing trace with hash -904842582, now seen corresponding path program 1 times [2018-02-04 19:19:53,972 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:19:53,972 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:19:53,972 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:19:53,973 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:19:53,973 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:19:53,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:19:53,981 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:19:54,013 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 19:19:54,013 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:19:54,013 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 19:19:54,013 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 19:19:54,014 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 19:19:54,014 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:19:54,014 INFO L87 Difference]: Start difference. First operand 180 states and 199 transitions. Second operand 7 states. [2018-02-04 19:19:54,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:19:54,090 INFO L93 Difference]: Finished difference Result 178 states and 196 transitions. [2018-02-04 19:19:54,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 19:19:54,090 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 40 [2018-02-04 19:19:54,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:19:54,091 INFO L225 Difference]: With dead ends: 178 [2018-02-04 19:19:54,091 INFO L226 Difference]: Without dead ends: 178 [2018-02-04 19:19:54,092 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-02-04 19:19:54,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-02-04 19:19:54,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 178. [2018-02-04 19:19:54,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-02-04 19:19:54,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 196 transitions. [2018-02-04 19:19:54,097 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 196 transitions. Word has length 40 [2018-02-04 19:19:54,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:19:54,097 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 196 transitions. [2018-02-04 19:19:54,097 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 19:19:54,098 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 196 transitions. [2018-02-04 19:19:54,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-02-04 19:19:54,098 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:19:54,098 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:19:54,098 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:19:54,099 INFO L82 PathProgramCache]: Analyzing trace with hash -1596182576, now seen corresponding path program 1 times [2018-02-04 19:19:54,099 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:19:54,099 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:19:54,099 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:19:54,100 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:19:54,100 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:19:54,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:19:54,108 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:19:54,145 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:19:54,145 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:19:54,145 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 19:19:54,146 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 19:19:54,146 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 19:19:54,146 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:19:54,146 INFO L87 Difference]: Start difference. First operand 178 states and 196 transitions. Second operand 7 states. [2018-02-04 19:19:54,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:19:54,314 INFO L93 Difference]: Finished difference Result 177 states and 195 transitions. [2018-02-04 19:19:54,314 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 19:19:54,314 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 45 [2018-02-04 19:19:54,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:19:54,315 INFO L225 Difference]: With dead ends: 177 [2018-02-04 19:19:54,315 INFO L226 Difference]: Without dead ends: 177 [2018-02-04 19:19:54,315 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-02-04 19:19:54,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-02-04 19:19:54,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 177. [2018-02-04 19:19:54,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-02-04 19:19:54,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 195 transitions. [2018-02-04 19:19:54,318 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 195 transitions. Word has length 45 [2018-02-04 19:19:54,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:19:54,318 INFO L432 AbstractCegarLoop]: Abstraction has 177 states and 195 transitions. [2018-02-04 19:19:54,318 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 19:19:54,318 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 195 transitions. [2018-02-04 19:19:54,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-02-04 19:19:54,319 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:19:54,319 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:19:54,319 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:19:54,319 INFO L82 PathProgramCache]: Analyzing trace with hash -1596182575, now seen corresponding path program 1 times [2018-02-04 19:19:54,319 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:19:54,319 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:19:54,320 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:19:54,320 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:19:54,320 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:19:54,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:19:54,327 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:19:54,400 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 19:19:54,401 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:19:54,401 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:19:54,401 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:19:54,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:19:54,427 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:19:54,506 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:19:54,506 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:19:54,506 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2018-02-04 19:19:54,507 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-04 19:19:54,507 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-04 19:19:54,507 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=205, Unknown=0, NotChecked=0, Total=240 [2018-02-04 19:19:54,507 INFO L87 Difference]: Start difference. First operand 177 states and 195 transitions. Second operand 16 states. [2018-02-04 19:19:54,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:19:54,733 INFO L93 Difference]: Finished difference Result 176 states and 194 transitions. [2018-02-04 19:19:54,733 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-02-04 19:19:54,733 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 45 [2018-02-04 19:19:54,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:19:54,734 INFO L225 Difference]: With dead ends: 176 [2018-02-04 19:19:54,734 INFO L226 Difference]: Without dead ends: 176 [2018-02-04 19:19:54,734 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 40 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-02-04 19:19:54,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-02-04 19:19:54,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2018-02-04 19:19:54,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-02-04 19:19:54,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 194 transitions. [2018-02-04 19:19:54,738 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 194 transitions. Word has length 45 [2018-02-04 19:19:54,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:19:54,738 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 194 transitions. [2018-02-04 19:19:54,738 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-04 19:19:54,738 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 194 transitions. [2018-02-04 19:19:54,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-02-04 19:19:54,739 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:19:54,739 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:19:54,739 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:19:54,739 INFO L82 PathProgramCache]: Analyzing trace with hash -628127471, now seen corresponding path program 1 times [2018-02-04 19:19:54,739 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:19:54,740 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:19:54,740 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:19:54,740 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:19:54,740 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:19:54,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:19:54,754 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:19:54,904 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 19:19:54,904 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:19:54,904 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:19:54,905 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:19:54,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:19:54,940 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:19:54,957 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:19:54,959 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:19:54,959 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:54,961 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:54,965 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:54,965 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:11 [2018-02-04 19:19:55,039 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-02-04 19:19:55,041 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5 [2018-02-04 19:19:55,041 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:55,042 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:55,043 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:55,043 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:21, output treesize:5 [2018-02-04 19:19:55,045 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:19:55,045 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:19:55,045 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [13] total 19 [2018-02-04 19:19:55,045 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 19:19:55,045 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 19:19:55,046 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=335, Unknown=0, NotChecked=0, Total=380 [2018-02-04 19:19:55,046 INFO L87 Difference]: Start difference. First operand 176 states and 194 transitions. Second operand 20 states. [2018-02-04 19:19:55,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:19:55,371 INFO L93 Difference]: Finished difference Result 175 states and 193 transitions. [2018-02-04 19:19:55,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-04 19:19:55,372 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 47 [2018-02-04 19:19:55,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:19:55,373 INFO L225 Difference]: With dead ends: 175 [2018-02-04 19:19:55,373 INFO L226 Difference]: Without dead ends: 175 [2018-02-04 19:19:55,374 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 41 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=84, Invalid=566, Unknown=0, NotChecked=0, Total=650 [2018-02-04 19:19:55,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-02-04 19:19:55,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 175. [2018-02-04 19:19:55,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-02-04 19:19:55,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 193 transitions. [2018-02-04 19:19:55,377 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 193 transitions. Word has length 47 [2018-02-04 19:19:55,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:19:55,378 INFO L432 AbstractCegarLoop]: Abstraction has 175 states and 193 transitions. [2018-02-04 19:19:55,378 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 19:19:55,378 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 193 transitions. [2018-02-04 19:19:55,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-02-04 19:19:55,378 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:19:55,378 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:19:55,379 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:19:55,379 INFO L82 PathProgramCache]: Analyzing trace with hash -628127470, now seen corresponding path program 1 times [2018-02-04 19:19:55,379 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:19:55,379 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:19:55,380 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:19:55,380 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:19:55,380 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:19:55,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:19:55,394 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:19:55,673 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-02-04 19:19:55,673 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:19:55,673 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:19:55,674 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:19:55,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:19:55,706 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:19:55,793 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:19:55,795 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:19:55,796 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:55,797 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:55,805 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:19:55,807 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:19:55,807 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:55,809 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:55,814 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:55,814 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:32, output treesize:21 [2018-02-04 19:19:55,962 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-02-04 19:19:55,964 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5 [2018-02-04 19:19:55,964 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:55,966 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:55,972 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-02-04 19:19:55,974 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 19:19:55,974 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:55,975 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:55,978 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:55,978 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:39, output treesize:9 [2018-02-04 19:19:56,036 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 5 proven. 5 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-02-04 19:19:56,036 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:19:56,036 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 14] total 29 [2018-02-04 19:19:56,037 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-02-04 19:19:56,037 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-02-04 19:19:56,037 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=798, Unknown=0, NotChecked=0, Total=870 [2018-02-04 19:19:56,037 INFO L87 Difference]: Start difference. First operand 175 states and 193 transitions. Second operand 30 states. [2018-02-04 19:19:56,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:19:56,673 INFO L93 Difference]: Finished difference Result 173 states and 191 transitions. [2018-02-04 19:19:56,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-04 19:19:56,673 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 47 [2018-02-04 19:19:56,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:19:56,674 INFO L225 Difference]: With dead ends: 173 [2018-02-04 19:19:56,674 INFO L226 Difference]: Without dead ends: 173 [2018-02-04 19:19:56,674 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 35 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 249 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=138, Invalid=1344, Unknown=0, NotChecked=0, Total=1482 [2018-02-04 19:19:56,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-02-04 19:19:56,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 170. [2018-02-04 19:19:56,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-02-04 19:19:56,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 185 transitions. [2018-02-04 19:19:56,676 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 185 transitions. Word has length 47 [2018-02-04 19:19:56,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:19:56,677 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 185 transitions. [2018-02-04 19:19:56,677 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-02-04 19:19:56,677 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 185 transitions. [2018-02-04 19:19:56,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-02-04 19:19:56,677 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:19:56,677 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:19:56,677 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:19:56,677 INFO L82 PathProgramCache]: Analyzing trace with hash 2002884989, now seen corresponding path program 1 times [2018-02-04 19:19:56,677 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:19:56,677 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:19:56,678 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:19:56,678 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:19:56,678 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:19:56,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:19:56,687 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:19:56,693 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:19:56,693 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:19:56,693 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:19:56,694 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:19:56,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:19:56,723 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:19:56,726 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 19:19:56,726 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:56,735 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:56,735 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-04 19:19:56,766 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:19:56,767 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:19:56,800 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 19:19:56,800 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:56,804 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:56,804 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-02-04 19:19:56,847 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:19:56,848 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:19:56,849 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:19:56,849 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 34 [2018-02-04 19:19:56,850 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:56,864 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:56,864 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:26, output treesize:28 [2018-02-04 19:19:56,884 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:19:56,885 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:19:56,886 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:56,887 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:56,895 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:56,895 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:46 [2018-02-04 19:19:56,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 63 [2018-02-04 19:19:56,945 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 19:19:56,946 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:56,949 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:56,955 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:56,955 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:83, output treesize:46 [2018-02-04 19:19:56,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 46 [2018-02-04 19:19:56,961 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:19:56,962 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:56,979 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:56,990 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-02-04 19:19:56,992 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-02-04 19:19:56,992 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:56,993 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:57,002 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:57,002 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:74, output treesize:100 [2018-02-04 19:19:57,103 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 75 [2018-02-04 19:19:57,105 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 56 [2018-02-04 19:19:57,105 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:57,108 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:57,115 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:19:57,115 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:118, output treesize:91 [2018-02-04 19:19:57,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 61 [2018-02-04 19:19:57,174 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 18 [2018-02-04 19:19:57,174 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:57,180 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 14 [2018-02-04 19:19:57,181 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:19:57,186 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:19:57,191 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:19:57,191 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:97, output treesize:28 [2018-02-04 19:19:57,216 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 19:19:57,216 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:19:57,216 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-02-04 19:19:57,217 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-02-04 19:19:57,217 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-02-04 19:19:57,217 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=491, Unknown=0, NotChecked=0, Total=552 [2018-02-04 19:19:57,217 INFO L87 Difference]: Start difference. First operand 170 states and 185 transitions. Second operand 24 states. [2018-02-04 19:19:58,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:19:58,451 INFO L93 Difference]: Finished difference Result 172 states and 187 transitions. [2018-02-04 19:19:58,452 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-02-04 19:19:58,452 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 48 [2018-02-04 19:19:58,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:19:58,452 INFO L225 Difference]: With dead ends: 172 [2018-02-04 19:19:58,452 INFO L226 Difference]: Without dead ends: 172 [2018-02-04 19:19:58,453 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 221 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=127, Invalid=995, Unknown=0, NotChecked=0, Total=1122 [2018-02-04 19:19:58,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-02-04 19:19:58,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 169. [2018-02-04 19:19:58,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-02-04 19:19:58,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 184 transitions. [2018-02-04 19:19:58,455 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 184 transitions. Word has length 48 [2018-02-04 19:19:58,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:19:58,455 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 184 transitions. [2018-02-04 19:19:58,456 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-02-04 19:19:58,456 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 184 transitions. [2018-02-04 19:19:58,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-02-04 19:19:58,456 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:19:58,456 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:19:58,456 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:19:58,456 INFO L82 PathProgramCache]: Analyzing trace with hash 2002884990, now seen corresponding path program 1 times [2018-02-04 19:19:58,456 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:19:58,456 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:19:58,457 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:19:58,457 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:19:58,457 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:19:58,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:19:58,472 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:19:58,480 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:19:58,480 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:19:58,480 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:19:58,481 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:19:58,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:19:58,524 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:19:58,539 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 19:19:58,539 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,541 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,541 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-04 19:19:58,578 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:19:58,579 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:19:58,579 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 19:19:58,580 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,584 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,584 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-02-04 19:19:58,621 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-02-04 19:19:58,621 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,637 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-02-04 19:19:58,638 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,652 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:19:58,652 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:48, output treesize:46 [2018-02-04 19:19:58,710 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:19:58,710 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:19:58,711 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:19:58,712 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-02-04 19:19:58,712 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,718 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,718 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:28, output treesize:21 [2018-02-04 19:19:58,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-02-04 19:19:58,738 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,751 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:19:58,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:19:58,754 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,756 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,765 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:19:58,766 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:19:58,767 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,768 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,774 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,774 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:49, output treesize:45 [2018-02-04 19:19:58,811 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-02-04 19:19:58,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 19:19:58,813 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,816 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,828 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 63 [2018-02-04 19:19:58,829 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 19:19:58,829 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,832 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,836 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,837 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:119, output treesize:45 [2018-02-04 19:19:58,841 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 26 [2018-02-04 19:19:58,842 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-02-04 19:19:58,842 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,846 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,857 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 46 [2018-02-04 19:19:58,858 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:19:58,859 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,864 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,871 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:58,871 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:73, output treesize:105 [2018-02-04 19:19:59,109 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 1 [2018-02-04 19:19:59,109 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:59,123 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 147 treesize of output 114 [2018-02-04 19:19:59,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 18 [2018-02-04 19:19:59,126 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:59,136 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 39 [2018-02-04 19:19:59,136 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:19:59,145 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:19:59,154 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2018-02-04 19:19:59,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2018-02-04 19:19:59,156 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:19:59,159 INFO L267 ElimStorePlain]: Start of recursive call 6: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:59,164 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:19:59,164 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:158, output treesize:9 [2018-02-04 19:19:59,190 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 11 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-02-04 19:19:59,190 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:19:59,190 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24] total 24 [2018-02-04 19:19:59,190 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-02-04 19:19:59,190 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-02-04 19:19:59,191 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=547, Unknown=0, NotChecked=0, Total=600 [2018-02-04 19:19:59,191 INFO L87 Difference]: Start difference. First operand 169 states and 184 transitions. Second operand 25 states. [2018-02-04 19:20:00,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:00,619 INFO L93 Difference]: Finished difference Result 171 states and 186 transitions. [2018-02-04 19:20:00,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 19:20:00,620 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 48 [2018-02-04 19:20:00,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:00,620 INFO L225 Difference]: With dead ends: 171 [2018-02-04 19:20:00,620 INFO L226 Difference]: Without dead ends: 171 [2018-02-04 19:20:00,621 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 220 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=145, Invalid=1337, Unknown=0, NotChecked=0, Total=1482 [2018-02-04 19:20:00,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-02-04 19:20:00,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 168. [2018-02-04 19:20:00,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-02-04 19:20:00,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 183 transitions. [2018-02-04 19:20:00,622 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 183 transitions. Word has length 48 [2018-02-04 19:20:00,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:00,623 INFO L432 AbstractCegarLoop]: Abstraction has 168 states and 183 transitions. [2018-02-04 19:20:00,623 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-02-04 19:20:00,623 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 183 transitions. [2018-02-04 19:20:00,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-02-04 19:20:00,623 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:00,623 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:00,623 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:00,624 INFO L82 PathProgramCache]: Analyzing trace with hash -411236025, now seen corresponding path program 1 times [2018-02-04 19:20:00,624 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:00,624 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:00,624 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:00,625 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:00,625 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:00,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:00,630 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:00,685 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:00,685 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:20:00,686 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-02-04 19:20:00,686 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 19:20:00,686 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 19:20:00,686 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-02-04 19:20:00,686 INFO L87 Difference]: Start difference. First operand 168 states and 183 transitions. Second operand 11 states. [2018-02-04 19:20:00,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:00,957 INFO L93 Difference]: Finished difference Result 177 states and 191 transitions. [2018-02-04 19:20:00,957 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-04 19:20:00,958 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 54 [2018-02-04 19:20:00,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:00,958 INFO L225 Difference]: With dead ends: 177 [2018-02-04 19:20:00,958 INFO L226 Difference]: Without dead ends: 177 [2018-02-04 19:20:00,959 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2018-02-04 19:20:00,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-02-04 19:20:00,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 176. [2018-02-04 19:20:00,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-02-04 19:20:00,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 191 transitions. [2018-02-04 19:20:00,962 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 191 transitions. Word has length 54 [2018-02-04 19:20:00,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:00,962 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 191 transitions. [2018-02-04 19:20:00,962 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 19:20:00,962 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 191 transitions. [2018-02-04 19:20:00,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-02-04 19:20:00,963 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:00,963 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:00,963 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:00,963 INFO L82 PathProgramCache]: Analyzing trace with hash -411236024, now seen corresponding path program 1 times [2018-02-04 19:20:00,963 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:00,963 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:00,964 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:00,964 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:00,964 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:00,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:00,972 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:01,154 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 19:20:01,155 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:01,155 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:01,155 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:01,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:01,180 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:01,372 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 19:20:01,373 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:20:01,373 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 18 [2018-02-04 19:20:01,373 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-04 19:20:01,373 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-04 19:20:01,373 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=302, Unknown=0, NotChecked=0, Total=342 [2018-02-04 19:20:01,374 INFO L87 Difference]: Start difference. First operand 176 states and 191 transitions. Second operand 19 states. [2018-02-04 19:20:01,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:01,647 INFO L93 Difference]: Finished difference Result 176 states and 190 transitions. [2018-02-04 19:20:01,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-04 19:20:01,647 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 54 [2018-02-04 19:20:01,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:01,648 INFO L225 Difference]: With dead ends: 176 [2018-02-04 19:20:01,648 INFO L226 Difference]: Without dead ends: 176 [2018-02-04 19:20:01,648 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 45 SyntacticMatches, 5 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=81, Invalid=621, Unknown=0, NotChecked=0, Total=702 [2018-02-04 19:20:01,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-02-04 19:20:01,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2018-02-04 19:20:01,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-02-04 19:20:01,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 190 transitions. [2018-02-04 19:20:01,650 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 190 transitions. Word has length 54 [2018-02-04 19:20:01,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:01,650 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 190 transitions. [2018-02-04 19:20:01,651 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-04 19:20:01,651 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 190 transitions. [2018-02-04 19:20:01,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-04 19:20:01,651 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:01,651 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:01,651 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:01,652 INFO L82 PathProgramCache]: Analyzing trace with hash -473136990, now seen corresponding path program 1 times [2018-02-04 19:20:01,652 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:01,652 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:01,652 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:01,653 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:01,653 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:01,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:01,659 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:01,700 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:01,700 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:20:01,700 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 19:20:01,701 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 19:20:01,701 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 19:20:01,701 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-04 19:20:01,701 INFO L87 Difference]: Start difference. First operand 176 states and 190 transitions. Second operand 8 states. [2018-02-04 19:20:01,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:01,846 INFO L93 Difference]: Finished difference Result 174 states and 188 transitions. [2018-02-04 19:20:01,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 19:20:01,847 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 65 [2018-02-04 19:20:01,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:01,847 INFO L225 Difference]: With dead ends: 174 [2018-02-04 19:20:01,847 INFO L226 Difference]: Without dead ends: 174 [2018-02-04 19:20:01,848 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-02-04 19:20:01,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-02-04 19:20:01,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 172. [2018-02-04 19:20:01,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-02-04 19:20:01,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 186 transitions. [2018-02-04 19:20:01,851 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 186 transitions. Word has length 65 [2018-02-04 19:20:01,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:01,851 INFO L432 AbstractCegarLoop]: Abstraction has 172 states and 186 transitions. [2018-02-04 19:20:01,851 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 19:20:01,851 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 186 transitions. [2018-02-04 19:20:01,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-04 19:20:01,852 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:01,852 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:01,852 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:01,852 INFO L82 PathProgramCache]: Analyzing trace with hash -473136989, now seen corresponding path program 1 times [2018-02-04 19:20:01,852 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:01,852 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:01,853 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:01,853 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:01,853 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:01,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:01,864 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:02,149 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:02,150 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:20:02,150 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 19:20:02,150 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 19:20:02,150 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 19:20:02,150 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2018-02-04 19:20:02,151 INFO L87 Difference]: Start difference. First operand 172 states and 186 transitions. Second operand 10 states. [2018-02-04 19:20:02,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:02,430 INFO L93 Difference]: Finished difference Result 168 states and 182 transitions. [2018-02-04 19:20:02,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 19:20:02,430 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 65 [2018-02-04 19:20:02,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:02,431 INFO L225 Difference]: With dead ends: 168 [2018-02-04 19:20:02,431 INFO L226 Difference]: Without dead ends: 168 [2018-02-04 19:20:02,431 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=34, Invalid=122, Unknown=0, NotChecked=0, Total=156 [2018-02-04 19:20:02,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-02-04 19:20:02,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 168. [2018-02-04 19:20:02,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-02-04 19:20:02,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 182 transitions. [2018-02-04 19:20:02,435 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 182 transitions. Word has length 65 [2018-02-04 19:20:02,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:02,435 INFO L432 AbstractCegarLoop]: Abstraction has 168 states and 182 transitions. [2018-02-04 19:20:02,435 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 19:20:02,435 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 182 transitions. [2018-02-04 19:20:02,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-02-04 19:20:02,436 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:02,436 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:02,436 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:02,436 INFO L82 PathProgramCache]: Analyzing trace with hash -288623325, now seen corresponding path program 1 times [2018-02-04 19:20:02,436 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:02,436 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:02,437 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:02,437 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:02,437 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:02,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:02,447 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:02,467 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:02,467 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:20:02,467 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-04 19:20:02,467 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 19:20:02,467 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 19:20:02,467 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 19:20:02,467 INFO L87 Difference]: Start difference. First operand 168 states and 182 transitions. Second operand 4 states. [2018-02-04 19:20:02,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:02,472 INFO L93 Difference]: Finished difference Result 176 states and 190 transitions. [2018-02-04 19:20:02,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 19:20:02,472 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 69 [2018-02-04 19:20:02,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:02,473 INFO L225 Difference]: With dead ends: 176 [2018-02-04 19:20:02,473 INFO L226 Difference]: Without dead ends: 176 [2018-02-04 19:20:02,473 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 19:20:02,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-02-04 19:20:02,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2018-02-04 19:20:02,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-02-04 19:20:02,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 190 transitions. [2018-02-04 19:20:02,475 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 190 transitions. Word has length 69 [2018-02-04 19:20:02,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:02,475 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 190 transitions. [2018-02-04 19:20:02,475 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 19:20:02,475 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 190 transitions. [2018-02-04 19:20:02,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-02-04 19:20:02,476 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:02,476 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:02,476 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:02,476 INFO L82 PathProgramCache]: Analyzing trace with hash -804539978, now seen corresponding path program 1 times [2018-02-04 19:20:02,476 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:02,476 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:02,477 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:02,477 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:02,477 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:02,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:02,483 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:02,499 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:02,499 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:20:02,499 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 19:20:02,499 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 19:20:02,499 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 19:20:02,499 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 19:20:02,500 INFO L87 Difference]: Start difference. First operand 176 states and 190 transitions. Second operand 5 states. [2018-02-04 19:20:02,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:02,508 INFO L93 Difference]: Finished difference Result 175 states and 187 transitions. [2018-02-04 19:20:02,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 19:20:02,508 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 70 [2018-02-04 19:20:02,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:02,509 INFO L225 Difference]: With dead ends: 175 [2018-02-04 19:20:02,509 INFO L226 Difference]: Without dead ends: 175 [2018-02-04 19:20:02,509 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 19:20:02,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-02-04 19:20:02,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 175. [2018-02-04 19:20:02,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-02-04 19:20:02,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 187 transitions. [2018-02-04 19:20:02,511 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 187 transitions. Word has length 70 [2018-02-04 19:20:02,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:02,511 INFO L432 AbstractCegarLoop]: Abstraction has 175 states and 187 transitions. [2018-02-04 19:20:02,512 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 19:20:02,512 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 187 transitions. [2018-02-04 19:20:02,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-02-04 19:20:02,512 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:02,512 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:02,512 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:02,512 INFO L82 PathProgramCache]: Analyzing trace with hash 172589229, now seen corresponding path program 1 times [2018-02-04 19:20:02,512 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:02,513 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:02,513 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:02,513 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:02,513 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:02,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:02,519 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:02,553 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:02,553 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:20:02,553 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 19:20:02,554 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 19:20:02,554 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 19:20:02,554 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-04 19:20:02,554 INFO L87 Difference]: Start difference. First operand 175 states and 187 transitions. Second operand 8 states. [2018-02-04 19:20:02,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:02,778 INFO L93 Difference]: Finished difference Result 200 states and 214 transitions. [2018-02-04 19:20:02,778 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 19:20:02,778 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 72 [2018-02-04 19:20:02,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:02,779 INFO L225 Difference]: With dead ends: 200 [2018-02-04 19:20:02,779 INFO L226 Difference]: Without dead ends: 200 [2018-02-04 19:20:02,779 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2018-02-04 19:20:02,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2018-02-04 19:20:02,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 187. [2018-02-04 19:20:02,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187 states. [2018-02-04 19:20:02,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 205 transitions. [2018-02-04 19:20:02,782 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 205 transitions. Word has length 72 [2018-02-04 19:20:02,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:02,783 INFO L432 AbstractCegarLoop]: Abstraction has 187 states and 205 transitions. [2018-02-04 19:20:02,783 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 19:20:02,783 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 205 transitions. [2018-02-04 19:20:02,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-02-04 19:20:02,784 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:02,784 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:02,784 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:02,784 INFO L82 PathProgramCache]: Analyzing trace with hash 172589230, now seen corresponding path program 1 times [2018-02-04 19:20:02,784 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:02,784 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:02,785 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:02,785 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:02,785 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:02,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:02,795 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:02,970 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 19:20:02,970 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:02,970 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:02,971 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:02,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:02,988 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:03,113 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:03,113 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:20:03,113 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [15] total 22 [2018-02-04 19:20:03,114 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-02-04 19:20:03,114 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-02-04 19:20:03,114 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=454, Unknown=0, NotChecked=0, Total=506 [2018-02-04 19:20:03,114 INFO L87 Difference]: Start difference. First operand 187 states and 205 transitions. Second operand 23 states. [2018-02-04 19:20:03,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:03,715 INFO L93 Difference]: Finished difference Result 211 states and 222 transitions. [2018-02-04 19:20:03,716 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 19:20:03,716 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 72 [2018-02-04 19:20:03,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:03,716 INFO L225 Difference]: With dead ends: 211 [2018-02-04 19:20:03,716 INFO L226 Difference]: Without dead ends: 211 [2018-02-04 19:20:03,717 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 115 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=109, Invalid=947, Unknown=0, NotChecked=0, Total=1056 [2018-02-04 19:20:03,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2018-02-04 19:20:03,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 190. [2018-02-04 19:20:03,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-02-04 19:20:03,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 208 transitions. [2018-02-04 19:20:03,720 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 208 transitions. Word has length 72 [2018-02-04 19:20:03,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:03,720 INFO L432 AbstractCegarLoop]: Abstraction has 190 states and 208 transitions. [2018-02-04 19:20:03,720 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-02-04 19:20:03,720 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 208 transitions. [2018-02-04 19:20:03,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-02-04 19:20:03,721 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:03,721 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:03,721 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:03,721 INFO L82 PathProgramCache]: Analyzing trace with hash -1645476210, now seen corresponding path program 1 times [2018-02-04 19:20:03,721 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:03,721 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:03,722 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:03,722 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:03,722 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:03,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:03,737 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:03,748 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:03,748 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:03,748 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:03,749 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:03,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:03,791 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:03,810 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:20:03,811 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:03,811 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:03,812 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:03,815 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:03,816 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:11 [2018-02-04 19:20:04,069 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-02-04 19:20:04,071 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:04,073 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 29 [2018-02-04 19:20:04,073 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:04,078 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:04,082 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:04,083 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:28, output treesize:11 [2018-02-04 19:20:04,157 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-02-04 19:20:04,158 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5 [2018-02-04 19:20:04,158 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:04,159 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:04,159 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:04,160 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:21, output treesize:5 [2018-02-04 19:20:04,195 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:04,195 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:20:04,195 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-02-04 19:20:04,196 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 19:20:04,196 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 19:20:04,196 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=336, Unknown=0, NotChecked=0, Total=380 [2018-02-04 19:20:04,196 INFO L87 Difference]: Start difference. First operand 190 states and 208 transitions. Second operand 20 states. [2018-02-04 19:20:05,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:05,964 INFO L93 Difference]: Finished difference Result 220 states and 236 transitions. [2018-02-04 19:20:05,965 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-02-04 19:20:05,965 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 74 [2018-02-04 19:20:05,965 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:05,965 INFO L225 Difference]: With dead ends: 220 [2018-02-04 19:20:05,965 INFO L226 Difference]: Without dead ends: 220 [2018-02-04 19:20:05,966 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 103 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=106, Invalid=764, Unknown=0, NotChecked=0, Total=870 [2018-02-04 19:20:05,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-02-04 19:20:05,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 190. [2018-02-04 19:20:05,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-02-04 19:20:05,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 207 transitions. [2018-02-04 19:20:05,969 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 207 transitions. Word has length 74 [2018-02-04 19:20:05,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:05,969 INFO L432 AbstractCegarLoop]: Abstraction has 190 states and 207 transitions. [2018-02-04 19:20:05,969 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 19:20:05,969 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 207 transitions. [2018-02-04 19:20:05,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-02-04 19:20:05,970 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:05,970 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:05,970 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:05,970 INFO L82 PathProgramCache]: Analyzing trace with hash -1645476209, now seen corresponding path program 1 times [2018-02-04 19:20:05,970 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:05,971 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:05,971 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:05,971 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:05,971 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:05,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:05,987 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:05,993 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:05,993 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:05,993 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:05,994 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:06,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:06,060 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:06,064 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:20:06,067 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:06,067 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:06,068 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:06,070 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:06,070 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:13, output treesize:1 [2018-02-04 19:20:06,127 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-02-04 19:20:06,129 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-02-04 19:20:06,129 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:06,131 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:06,139 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-02-04 19:20:06,141 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2018-02-04 19:20:06,141 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:06,144 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:06,148 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:06,149 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:33, output treesize:12 [2018-02-04 19:20:06,305 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 33 [2018-02-04 19:20:06,308 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:06,309 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 44 [2018-02-04 19:20:06,309 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:06,315 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:06,336 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:06,336 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:61, output treesize:48 [2018-02-04 19:20:06,398 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2018-02-04 19:20:06,400 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:06,401 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 35 [2018-02-04 19:20:06,401 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:06,406 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:06,410 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:06,410 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:43, output treesize:27 [2018-02-04 19:20:06,510 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2018-02-04 19:20:06,511 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2018-02-04 19:20:06,511 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:06,512 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:06,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-02-04 19:20:06,518 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 9 [2018-02-04 19:20:06,518 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:06,521 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:06,523 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:06,524 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:45, output treesize:9 [2018-02-04 19:20:06,579 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:06,579 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:20:06,579 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-02-04 19:20:06,579 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-04 19:20:06,579 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-04 19:20:06,579 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=408, Unknown=0, NotChecked=0, Total=462 [2018-02-04 19:20:06,580 INFO L87 Difference]: Start difference. First operand 190 states and 207 transitions. Second operand 22 states. [2018-02-04 19:20:07,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:07,994 INFO L93 Difference]: Finished difference Result 223 states and 238 transitions. [2018-02-04 19:20:07,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-02-04 19:20:07,994 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 74 [2018-02-04 19:20:07,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:07,995 INFO L225 Difference]: With dead ends: 223 [2018-02-04 19:20:07,995 INFO L226 Difference]: Without dead ends: 223 [2018-02-04 19:20:07,995 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 142 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=108, Invalid=762, Unknown=0, NotChecked=0, Total=870 [2018-02-04 19:20:07,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2018-02-04 19:20:07,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 190. [2018-02-04 19:20:07,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-02-04 19:20:07,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 206 transitions. [2018-02-04 19:20:07,999 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 206 transitions. Word has length 74 [2018-02-04 19:20:07,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:07,999 INFO L432 AbstractCegarLoop]: Abstraction has 190 states and 206 transitions. [2018-02-04 19:20:07,999 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-04 19:20:07,999 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 206 transitions. [2018-02-04 19:20:08,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-02-04 19:20:08,000 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:08,000 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:08,000 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:08,000 INFO L82 PathProgramCache]: Analyzing trace with hash 966907802, now seen corresponding path program 1 times [2018-02-04 19:20:08,000 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:08,000 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:08,001 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:08,001 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:08,001 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:08,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:08,010 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:08,038 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:08,038 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:20:08,038 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 19:20:08,038 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 19:20:08,038 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 19:20:08,039 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 19:20:08,039 INFO L87 Difference]: Start difference. First operand 190 states and 206 transitions. Second operand 6 states. [2018-02-04 19:20:08,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:08,053 INFO L93 Difference]: Finished difference Result 190 states and 205 transitions. [2018-02-04 19:20:08,053 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 19:20:08,053 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2018-02-04 19:20:08,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:08,054 INFO L225 Difference]: With dead ends: 190 [2018-02-04 19:20:08,054 INFO L226 Difference]: Without dead ends: 190 [2018-02-04 19:20:08,054 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:20:08,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states. [2018-02-04 19:20:08,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 190. [2018-02-04 19:20:08,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-02-04 19:20:08,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 205 transitions. [2018-02-04 19:20:08,057 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 205 transitions. Word has length 72 [2018-02-04 19:20:08,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:08,057 INFO L432 AbstractCegarLoop]: Abstraction has 190 states and 205 transitions. [2018-02-04 19:20:08,057 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 19:20:08,058 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 205 transitions. [2018-02-04 19:20:08,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-02-04 19:20:08,058 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:08,058 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:08,058 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:08,058 INFO L82 PathProgramCache]: Analyzing trace with hash 529845023, now seen corresponding path program 1 times [2018-02-04 19:20:08,059 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:08,059 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:08,059 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:08,059 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:08,060 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:08,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:08,074 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:08,079 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:08,080 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:08,080 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:08,080 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:08,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:08,138 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:08,140 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 19:20:08,140 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,141 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,142 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-04 19:20:08,179 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:08,180 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:08,180 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 19:20:08,181 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,185 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,185 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-02-04 19:20:08,212 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:08,213 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:08,214 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:08,214 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 34 [2018-02-04 19:20:08,214 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,224 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,224 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:26, output treesize:28 [2018-02-04 19:20:08,244 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:20:08,245 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:08,246 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,247 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,257 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,257 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:46 [2018-02-04 19:20:08,306 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 63 [2018-02-04 19:20:08,310 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 19:20:08,311 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,315 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,323 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,324 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:83, output treesize:46 [2018-02-04 19:20:08,330 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 46 [2018-02-04 19:20:08,333 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:08,333 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,341 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,356 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-02-04 19:20:08,358 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-02-04 19:20:08,359 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,361 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,373 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,373 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:74, output treesize:100 [2018-02-04 19:20:08,799 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 78 [2018-02-04 19:20:08,802 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:08,803 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 91 [2018-02-04 19:20:08,804 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,811 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,828 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 108 treesize of output 88 [2018-02-04 19:20:08,830 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:08,831 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 112 [2018-02-04 19:20:08,832 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,839 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:08,849 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:08,849 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:134, output treesize:105 [2018-02-04 19:20:09,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 75 [2018-02-04 19:20:09,009 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 56 [2018-02-04 19:20:09,009 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:09,013 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:09,021 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:09,021 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:118, output treesize:91 [2018-02-04 19:20:09,098 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 61 [2018-02-04 19:20:09,100 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 18 [2018-02-04 19:20:09,100 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:09,106 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 14 [2018-02-04 19:20:09,106 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:09,143 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:09,151 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:09,151 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:97, output treesize:28 [2018-02-04 19:20:09,202 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-02-04 19:20:09,202 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:20:09,202 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [32] imperfect sequences [] total 32 [2018-02-04 19:20:09,202 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-02-04 19:20:09,202 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-02-04 19:20:09,202 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=968, Unknown=0, NotChecked=0, Total=1056 [2018-02-04 19:20:09,202 INFO L87 Difference]: Start difference. First operand 190 states and 205 transitions. Second operand 33 states. [2018-02-04 19:20:12,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:12,352 INFO L93 Difference]: Finished difference Result 214 states and 227 transitions. [2018-02-04 19:20:12,353 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-02-04 19:20:12,353 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 75 [2018-02-04 19:20:12,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:12,354 INFO L225 Difference]: With dead ends: 214 [2018-02-04 19:20:12,354 INFO L226 Difference]: Without dead ends: 214 [2018-02-04 19:20:12,354 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 705 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=243, Invalid=2727, Unknown=0, NotChecked=0, Total=2970 [2018-02-04 19:20:12,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-02-04 19:20:12,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 190. [2018-02-04 19:20:12,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-02-04 19:20:12,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 204 transitions. [2018-02-04 19:20:12,357 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 204 transitions. Word has length 75 [2018-02-04 19:20:12,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:12,358 INFO L432 AbstractCegarLoop]: Abstraction has 190 states and 204 transitions. [2018-02-04 19:20:12,358 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-02-04 19:20:12,358 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 204 transitions. [2018-02-04 19:20:12,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-02-04 19:20:12,358 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:12,358 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:12,358 INFO L371 AbstractCegarLoop]: === Iteration 38 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:12,359 INFO L82 PathProgramCache]: Analyzing trace with hash 529845024, now seen corresponding path program 1 times [2018-02-04 19:20:12,359 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:12,359 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:12,359 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:12,360 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:12,360 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:12,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:12,380 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:12,392 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:12,392 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:12,392 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:12,393 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:12,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:12,447 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:12,449 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 19:20:12,450 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,452 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,452 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-02-04 19:20:12,489 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:12,490 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:12,490 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 19:20:12,490 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,502 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,502 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:23, output treesize:21 [2018-02-04 19:20:12,552 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-02-04 19:20:12,552 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,574 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 30 [2018-02-04 19:20:12,574 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,588 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:20:12,589 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:60, output treesize:58 [2018-02-04 19:20:12,639 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:12,640 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:12,640 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:12,641 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 34 [2018-02-04 19:20:12,641 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,651 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,651 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:40, output treesize:42 [2018-02-04 19:20:12,675 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:20:12,677 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:12,677 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,678 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,693 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:20:12,694 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:12,695 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,696 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,707 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,707 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:65, output treesize:72 [2018-02-04 19:20:12,771 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-02-04 19:20:12,772 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 19:20:12,773 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,776 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,794 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 74 [2018-02-04 19:20:12,809 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 19:20:12,809 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,814 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,825 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,825 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:146, output treesize:72 [2018-02-04 19:20:12,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-02-04 19:20:12,832 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:12,832 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,848 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,865 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 49 [2018-02-04 19:20:12,868 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:12,868 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,873 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,883 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:12,883 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:85, output treesize:116 [2018-02-04 19:20:13,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 45 [2018-02-04 19:20:13,261 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:13,277 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 66 [2018-02-04 19:20:13,279 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:13,281 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 90 [2018-02-04 19:20:13,281 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:13,290 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:13,306 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 41 [2018-02-04 19:20:13,308 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:13,309 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-02-04 19:20:13,309 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:13,314 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:13,324 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:13,325 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 6 variables, input treesize:145, output treesize:85 [2018-02-04 19:20:13,555 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 95 treesize of output 68 [2018-02-04 19:20:13,556 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2018-02-04 19:20:13,557 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:13,563 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:20:13,564 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 23 [2018-02-04 19:20:13,564 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:13,569 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:13,576 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2018-02-04 19:20:13,577 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:20:13,577 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-02-04 19:20:13,577 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:13,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-02-04 19:20:13,584 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:13,585 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:13,588 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:13,588 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:102, output treesize:9 [2018-02-04 19:20:13,646 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-02-04 19:20:13,646 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:20:13,646 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [36] imperfect sequences [] total 36 [2018-02-04 19:20:13,646 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-02-04 19:20:13,646 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-02-04 19:20:13,646 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=1227, Unknown=0, NotChecked=0, Total=1332 [2018-02-04 19:20:13,647 INFO L87 Difference]: Start difference. First operand 190 states and 204 transitions. Second operand 37 states. [2018-02-04 19:20:16,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:16,690 INFO L93 Difference]: Finished difference Result 219 states and 231 transitions. [2018-02-04 19:20:16,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-02-04 19:20:16,690 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 75 [2018-02-04 19:20:16,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:16,690 INFO L225 Difference]: With dead ends: 219 [2018-02-04 19:20:16,690 INFO L226 Difference]: Without dead ends: 219 [2018-02-04 19:20:16,691 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 903 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=262, Invalid=3278, Unknown=0, NotChecked=0, Total=3540 [2018-02-04 19:20:16,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2018-02-04 19:20:16,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 190. [2018-02-04 19:20:16,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-02-04 19:20:16,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 203 transitions. [2018-02-04 19:20:16,693 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 203 transitions. Word has length 75 [2018-02-04 19:20:16,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:16,693 INFO L432 AbstractCegarLoop]: Abstraction has 190 states and 203 transitions. [2018-02-04 19:20:16,693 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-02-04 19:20:16,693 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 203 transitions. [2018-02-04 19:20:16,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-02-04 19:20:16,693 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:16,693 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:16,693 INFO L371 AbstractCegarLoop]: === Iteration 39 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:16,694 INFO L82 PathProgramCache]: Analyzing trace with hash 217510894, now seen corresponding path program 1 times [2018-02-04 19:20:16,694 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:16,694 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:16,694 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:16,694 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:16,694 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:16,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:16,700 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:16,745 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:16,746 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:20:16,746 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 19:20:16,746 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 19:20:16,746 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 19:20:16,746 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:20:16,747 INFO L87 Difference]: Start difference. First operand 190 states and 203 transitions. Second operand 7 states. [2018-02-04 19:20:16,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:16,871 INFO L93 Difference]: Finished difference Result 191 states and 204 transitions. [2018-02-04 19:20:16,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 19:20:16,871 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 81 [2018-02-04 19:20:16,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:16,872 INFO L225 Difference]: With dead ends: 191 [2018-02-04 19:20:16,872 INFO L226 Difference]: Without dead ends: 191 [2018-02-04 19:20:16,872 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-02-04 19:20:16,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2018-02-04 19:20:16,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 189. [2018-02-04 19:20:16,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2018-02-04 19:20:16,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 202 transitions. [2018-02-04 19:20:16,874 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 202 transitions. Word has length 81 [2018-02-04 19:20:16,874 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:16,874 INFO L432 AbstractCegarLoop]: Abstraction has 189 states and 202 transitions. [2018-02-04 19:20:16,874 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 19:20:16,874 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 202 transitions. [2018-02-04 19:20:16,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-02-04 19:20:16,874 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:16,874 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:16,875 INFO L371 AbstractCegarLoop]: === Iteration 40 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:16,875 INFO L82 PathProgramCache]: Analyzing trace with hash 217510895, now seen corresponding path program 1 times [2018-02-04 19:20:16,875 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:16,875 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:16,875 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:16,875 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:16,875 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:16,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:16,884 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:17,141 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 19:20:17,141 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:17,141 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:17,142 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:17,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:17,165 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:17,404 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 19:20:17,405 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:20:17,405 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 15] total 33 [2018-02-04 19:20:17,405 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-02-04 19:20:17,405 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-02-04 19:20:17,406 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=1038, Unknown=0, NotChecked=0, Total=1122 [2018-02-04 19:20:17,406 INFO L87 Difference]: Start difference. First operand 189 states and 202 transitions. Second operand 34 states. [2018-02-04 19:20:17,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:17,778 INFO L93 Difference]: Finished difference Result 211 states and 220 transitions. [2018-02-04 19:20:17,778 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-02-04 19:20:17,778 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 81 [2018-02-04 19:20:17,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:17,779 INFO L225 Difference]: With dead ends: 211 [2018-02-04 19:20:17,779 INFO L226 Difference]: Without dead ends: 211 [2018-02-04 19:20:17,779 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 250 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=147, Invalid=1833, Unknown=0, NotChecked=0, Total=1980 [2018-02-04 19:20:17,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2018-02-04 19:20:17,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 198. [2018-02-04 19:20:17,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-02-04 19:20:17,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 210 transitions. [2018-02-04 19:20:17,781 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 210 transitions. Word has length 81 [2018-02-04 19:20:17,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:17,781 INFO L432 AbstractCegarLoop]: Abstraction has 198 states and 210 transitions. [2018-02-04 19:20:17,781 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-02-04 19:20:17,781 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 210 transitions. [2018-02-04 19:20:17,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-02-04 19:20:17,782 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:17,782 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:17,782 INFO L371 AbstractCegarLoop]: === Iteration 41 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:17,782 INFO L82 PathProgramCache]: Analyzing trace with hash 790903974, now seen corresponding path program 1 times [2018-02-04 19:20:17,782 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:17,782 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:17,782 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:17,782 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:17,782 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:17,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:17,789 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:17,796 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:17,796 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:17,796 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:17,797 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:17,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:17,814 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:17,879 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:20:17,881 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:17,881 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:17,882 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:17,886 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:17,886 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 [2018-02-04 19:20:17,935 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 38 treesize of output 48 [2018-02-04 19:20:17,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 23 [2018-02-04 19:20:17,939 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:17,953 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:17,957 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:17,957 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:44, output treesize:16 [2018-02-04 19:20:17,968 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 25 treesize of output 37 [2018-02-04 19:20:17,970 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-02-04 19:20:17,970 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:17,997 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:18,001 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:18,001 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:27 [2018-02-04 19:20:18,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 34 treesize of output 44 [2018-02-04 19:20:18,389 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 33 treesize of output 42 [2018-02-04 19:20:18,389 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-02-04 19:20:18,407 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:18,414 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 30 treesize of output 49 [2018-02-04 19:20:18,414 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-02-04 19:20:18,429 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:20:18,440 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 2 xjuncts. [2018-02-04 19:20:18,440 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:40, output treesize:62 [2018-02-04 19:20:18,757 WARN L146 SmtUtils]: Spent 107ms on a formula simplification. DAG size of input: 76 DAG size of output 56 [2018-02-04 19:20:18,779 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 88 treesize of output 116 [2018-02-04 19:20:18,780 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 6 [2018-02-04 19:20:18,812 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:18,813 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:18,816 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:18,819 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:18,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 4 disjoint index pairs (out of 15 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 80 treesize of output 130 [2018-02-04 19:20:18,839 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 8 xjuncts. [2018-02-04 19:20:22,391 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:22,391 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:22,397 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:22,399 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:22,420 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 4 disjoint index pairs (out of 15 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 76 treesize of output 126 [2018-02-04 19:20:22,422 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 8 xjuncts. [2018-02-04 19:20:23,612 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:23,613 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:23,619 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:23,620 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:23,639 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 4 disjoint index pairs (out of 15 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 76 treesize of output 126 [2018-02-04 19:20:23,641 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 8 xjuncts. [2018-02-04 19:20:24,421 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:24,424 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:24,427 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:24,430 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:24,455 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 4 disjoint index pairs (out of 15 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 72 treesize of output 122 [2018-02-04 19:20:24,457 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 8 xjuncts. [2018-02-04 19:20:24,873 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:24,875 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:24,879 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:24,881 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:24,900 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 4 disjoint index pairs (out of 15 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 72 treesize of output 122 [2018-02-04 19:20:24,902 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 8 xjuncts. [2018-02-04 19:20:25,044 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:25,047 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:25,060 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:25,063 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:25,083 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 4 disjoint index pairs (out of 15 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 68 treesize of output 118 [2018-02-04 19:20:25,085 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 8 xjuncts. [2018-02-04 19:20:25,286 INFO L267 ElimStorePlain]: Start of recursive call 2: 98 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:25,297 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 36 [2018-02-04 19:20:25,299 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:25,299 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 18 [2018-02-04 19:20:25,299 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:25,308 INFO L267 ElimStorePlain]: Start of recursive call 9: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:25,313 INFO L267 ElimStorePlain]: Start of recursive call 1: 12 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:25,313 INFO L202 ElimStorePlain]: Needed 10 recursive calls to eliminate 14 variables, input treesize:123, output treesize:3 [2018-02-04 19:20:25,347 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-02-04 19:20:25,348 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:20:25,348 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28] total 28 [2018-02-04 19:20:25,348 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-02-04 19:20:25,348 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-02-04 19:20:25,348 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=738, Unknown=0, NotChecked=0, Total=812 [2018-02-04 19:20:25,348 INFO L87 Difference]: Start difference. First operand 198 states and 210 transitions. Second operand 29 states. [2018-02-04 19:20:27,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:27,693 INFO L93 Difference]: Finished difference Result 221 states and 231 transitions. [2018-02-04 19:20:27,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-02-04 19:20:27,693 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 82 [2018-02-04 19:20:27,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:27,693 INFO L225 Difference]: With dead ends: 221 [2018-02-04 19:20:27,694 INFO L226 Difference]: Without dead ends: 221 [2018-02-04 19:20:27,694 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 54 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 315 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=166, Invalid=1640, Unknown=0, NotChecked=0, Total=1806 [2018-02-04 19:20:27,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-02-04 19:20:27,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 199. [2018-02-04 19:20:27,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199 states. [2018-02-04 19:20:27,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 212 transitions. [2018-02-04 19:20:27,697 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 212 transitions. Word has length 82 [2018-02-04 19:20:27,698 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:27,698 INFO L432 AbstractCegarLoop]: Abstraction has 199 states and 212 transitions. [2018-02-04 19:20:27,698 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-02-04 19:20:27,698 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 212 transitions. [2018-02-04 19:20:27,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-02-04 19:20:27,699 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:27,699 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:27,699 INFO L371 AbstractCegarLoop]: === Iteration 42 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:27,699 INFO L82 PathProgramCache]: Analyzing trace with hash 790903975, now seen corresponding path program 1 times [2018-02-04 19:20:27,699 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:27,699 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:27,700 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:27,700 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:27,700 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:27,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:27,710 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:27,717 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:27,717 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:27,717 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:27,717 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:27,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:27,751 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:27,765 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 19:20:27,765 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:27,766 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:27,766 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-04 19:20:27,792 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:27,792 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:27,793 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 12 [2018-02-04 19:20:27,793 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:27,794 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:27,794 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:8 [2018-02-04 19:20:27,807 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 19:20:27,807 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:27,808 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:27,808 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-02-04 19:20:27,834 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:20:27,835 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:27,835 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:27,836 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:27,843 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:20:27,844 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:27,844 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:27,845 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:27,850 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:27,850 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:42, output treesize:28 [2018-02-04 19:20:27,862 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-02-04 19:20:27,863 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-02-04 19:20:27,864 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:27,865 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:27,868 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:27,868 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:37, output treesize:22 [2018-02-04 19:20:27,890 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 31 treesize of output 43 [2018-02-04 19:20:27,891 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 16 [2018-02-04 19:20:27,892 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:27,900 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:27,903 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:27,903 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:41, output treesize:19 [2018-02-04 19:20:27,918 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 26 [2018-02-04 19:20:27,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:27,920 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:27,923 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:27,927 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:27,927 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:28 [2018-02-04 19:20:28,213 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-02-04 19:20:28,219 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 27 [2018-02-04 19:20:28,219 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-02-04 19:20:28,228 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:20:28,239 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 19:20:28,239 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:41, output treesize:44 [2018-02-04 19:20:28,268 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 1 [2018-02-04 19:20:28,268 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:28,270 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:28,270 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:18, output treesize:3 [2018-02-04 19:20:28,271 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-02-04 19:20:28,274 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5 [2018-02-04 19:20:28,274 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:28,275 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:28,277 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:28,277 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:24, output treesize:5 [2018-02-04 19:20:28,301 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 19:20:28,301 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:20:28,301 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29] total 29 [2018-02-04 19:20:28,301 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-02-04 19:20:28,302 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-02-04 19:20:28,302 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=787, Unknown=0, NotChecked=0, Total=870 [2018-02-04 19:20:28,302 INFO L87 Difference]: Start difference. First operand 199 states and 212 transitions. Second operand 30 states. [2018-02-04 19:20:30,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:30,195 INFO L93 Difference]: Finished difference Result 213 states and 228 transitions. [2018-02-04 19:20:30,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-02-04 19:20:30,195 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 82 [2018-02-04 19:20:30,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:30,195 INFO L225 Difference]: With dead ends: 213 [2018-02-04 19:20:30,196 INFO L226 Difference]: Without dead ends: 213 [2018-02-04 19:20:30,196 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 431 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=178, Invalid=1892, Unknown=0, NotChecked=0, Total=2070 [2018-02-04 19:20:30,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-02-04 19:20:30,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 200. [2018-02-04 19:20:30,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200 states. [2018-02-04 19:20:30,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 213 transitions. [2018-02-04 19:20:30,198 INFO L78 Accepts]: Start accepts. Automaton has 200 states and 213 transitions. Word has length 82 [2018-02-04 19:20:30,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:30,198 INFO L432 AbstractCegarLoop]: Abstraction has 200 states and 213 transitions. [2018-02-04 19:20:30,198 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-02-04 19:20:30,198 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 213 transitions. [2018-02-04 19:20:30,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-02-04 19:20:30,199 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:30,199 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:30,199 INFO L371 AbstractCegarLoop]: === Iteration 43 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:30,199 INFO L82 PathProgramCache]: Analyzing trace with hash -1859667754, now seen corresponding path program 1 times [2018-02-04 19:20:30,199 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:30,199 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:30,200 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:30,200 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:30,200 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:30,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:30,210 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:30,272 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:30,272 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:20:30,272 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 19:20:30,272 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 19:20:30,272 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 19:20:30,273 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:20:30,273 INFO L87 Difference]: Start difference. First operand 200 states and 213 transitions. Second operand 7 states. [2018-02-04 19:20:30,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:30,290 INFO L93 Difference]: Finished difference Result 207 states and 220 transitions. [2018-02-04 19:20:30,290 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 19:20:30,290 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 85 [2018-02-04 19:20:30,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:30,291 INFO L225 Difference]: With dead ends: 207 [2018-02-04 19:20:30,291 INFO L226 Difference]: Without dead ends: 207 [2018-02-04 19:20:30,291 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:20:30,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-02-04 19:20:30,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 207. [2018-02-04 19:20:30,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-02-04 19:20:30,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 220 transitions. [2018-02-04 19:20:30,294 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 220 transitions. Word has length 85 [2018-02-04 19:20:30,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:30,294 INFO L432 AbstractCegarLoop]: Abstraction has 207 states and 220 transitions. [2018-02-04 19:20:30,294 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 19:20:30,295 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 220 transitions. [2018-02-04 19:20:30,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-02-04 19:20:30,296 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:30,296 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:30,296 INFO L371 AbstractCegarLoop]: === Iteration 44 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:30,296 INFO L82 PathProgramCache]: Analyzing trace with hash 2141896535, now seen corresponding path program 1 times [2018-02-04 19:20:30,296 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:30,296 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:30,297 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:30,297 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:30,297 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:30,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:30,307 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:30,417 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:30,418 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:20:30,418 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-02-04 19:20:30,418 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 19:20:30,418 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 19:20:30,418 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-02-04 19:20:30,418 INFO L87 Difference]: Start difference. First operand 207 states and 220 transitions. Second operand 11 states. [2018-02-04 19:20:30,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:30,597 INFO L93 Difference]: Finished difference Result 216 states and 230 transitions. [2018-02-04 19:20:30,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 19:20:30,597 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 85 [2018-02-04 19:20:30,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:30,598 INFO L225 Difference]: With dead ends: 216 [2018-02-04 19:20:30,598 INFO L226 Difference]: Without dead ends: 208 [2018-02-04 19:20:30,598 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2018-02-04 19:20:30,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states. [2018-02-04 19:20:30,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 208. [2018-02-04 19:20:30,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 208 states. [2018-02-04 19:20:30,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 221 transitions. [2018-02-04 19:20:30,600 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 221 transitions. Word has length 85 [2018-02-04 19:20:30,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:30,600 INFO L432 AbstractCegarLoop]: Abstraction has 208 states and 221 transitions. [2018-02-04 19:20:30,600 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 19:20:30,600 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 221 transitions. [2018-02-04 19:20:30,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-02-04 19:20:30,600 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:30,600 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:30,601 INFO L371 AbstractCegarLoop]: === Iteration 45 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:30,601 INFO L82 PathProgramCache]: Analyzing trace with hash -150489879, now seen corresponding path program 1 times [2018-02-04 19:20:30,601 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:30,601 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:30,601 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:30,601 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:30,601 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:30,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:30,611 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:30,615 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:30,615 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:30,615 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:30,615 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:30,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:30,651 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:30,671 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 19:20:30,671 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:30,673 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:30,674 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-02-04 19:20:30,771 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:30,771 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:30,771 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-02-04 19:20:30,771 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:30,775 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:30,776 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:24, output treesize:18 [2018-02-04 19:20:30,791 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:20:30,793 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:30,793 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:30,795 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:30,807 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:20:30,809 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:30,810 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:30,811 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:30,820 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:30,821 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:46, output treesize:35 [2018-02-04 19:20:30,876 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-02-04 19:20:30,877 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 19:20:30,878 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:30,879 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:30,885 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:30,885 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:63, output treesize:48 [2018-02-04 19:20:30,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 52 [2018-02-04 19:20:30,908 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 19:20:30,908 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:30,910 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:30,916 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:30,916 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:76, output treesize:36 [2018-02-04 19:20:30,941 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 34 treesize of output 44 [2018-02-04 19:20:30,943 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 34 [2018-02-04 19:20:30,943 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:30,956 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:30,962 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:30,962 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:49, output treesize:45 [2018-02-04 19:20:31,102 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:31,107 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 39 treesize of output 54 [2018-02-04 19:20:31,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 47 [2018-02-04 19:20:31,110 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:31,124 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:20:31,124 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:31,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 47 [2018-02-04 19:20:31,125 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:31,133 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:20:31,143 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-02-04 19:20:31,143 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:51, output treesize:77 [2018-02-04 19:20:31,177 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-02-04 19:20:31,178 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:31,187 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 22 [2018-02-04 19:20:31,187 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:31,196 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 19:20:31,196 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:80, output treesize:66 [2018-02-04 19:20:31,348 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-02-04 19:20:31,349 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:31,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 8 [2018-02-04 19:20:31,349 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:31,352 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:31,365 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 39 [2018-02-04 19:20:31,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 28 [2018-02-04 19:20:31,366 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:31,385 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 18 [2018-02-04 19:20:31,385 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:31,395 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 17 [2018-02-04 19:20:31,396 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:31,403 INFO L267 ElimStorePlain]: Start of recursive call 4: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:20:31,412 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:20:31,412 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:79, output treesize:24 [2018-02-04 19:20:31,434 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:31,434 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 25 [2018-02-04 19:20:31,435 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:31,441 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-02-04 19:20:31,441 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:46, output treesize:22 [2018-02-04 19:20:31,479 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 19:20:31,480 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:20:31,480 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34] total 34 [2018-02-04 19:20:31,480 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-02-04 19:20:31,480 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-02-04 19:20:31,480 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=114, Invalid=1076, Unknown=0, NotChecked=0, Total=1190 [2018-02-04 19:20:31,481 INFO L87 Difference]: Start difference. First operand 208 states and 221 transitions. Second operand 35 states. [2018-02-04 19:20:32,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:32,658 INFO L93 Difference]: Finished difference Result 216 states and 227 transitions. [2018-02-04 19:20:32,658 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-02-04 19:20:32,658 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 84 [2018-02-04 19:20:32,659 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:32,659 INFO L225 Difference]: With dead ends: 216 [2018-02-04 19:20:32,659 INFO L226 Difference]: Without dead ends: 216 [2018-02-04 19:20:32,660 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 48 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 893 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=262, Invalid=2818, Unknown=0, NotChecked=0, Total=3080 [2018-02-04 19:20:32,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-02-04 19:20:32,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 210. [2018-02-04 19:20:32,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2018-02-04 19:20:32,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 223 transitions. [2018-02-04 19:20:32,662 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 223 transitions. Word has length 84 [2018-02-04 19:20:32,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:32,662 INFO L432 AbstractCegarLoop]: Abstraction has 210 states and 223 transitions. [2018-02-04 19:20:32,662 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-02-04 19:20:32,662 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 223 transitions. [2018-02-04 19:20:32,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-02-04 19:20:32,662 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:32,662 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:32,662 INFO L371 AbstractCegarLoop]: === Iteration 46 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:32,663 INFO L82 PathProgramCache]: Analyzing trace with hash 997359006, now seen corresponding path program 1 times [2018-02-04 19:20:32,663 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:32,663 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:32,663 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:32,663 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:32,663 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:32,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:32,669 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:32,672 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:32,672 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:32,672 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:32,673 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:32,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:32,685 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:32,709 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:32,709 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:20:32,709 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2018-02-04 19:20:32,710 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 19:20:32,710 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 19:20:32,710 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:20:32,710 INFO L87 Difference]: Start difference. First operand 210 states and 223 transitions. Second operand 7 states. [2018-02-04 19:20:32,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:32,765 INFO L93 Difference]: Finished difference Result 216 states and 229 transitions. [2018-02-04 19:20:32,765 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 19:20:32,765 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 86 [2018-02-04 19:20:32,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:32,766 INFO L225 Difference]: With dead ends: 216 [2018-02-04 19:20:32,766 INFO L226 Difference]: Without dead ends: 211 [2018-02-04 19:20:32,766 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 80 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-02-04 19:20:32,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2018-02-04 19:20:32,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 211. [2018-02-04 19:20:32,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 211 states. [2018-02-04 19:20:32,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 211 states and 224 transitions. [2018-02-04 19:20:32,769 INFO L78 Accepts]: Start accepts. Automaton has 211 states and 224 transitions. Word has length 86 [2018-02-04 19:20:32,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:32,769 INFO L432 AbstractCegarLoop]: Abstraction has 211 states and 224 transitions. [2018-02-04 19:20:32,769 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 19:20:32,769 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 224 transitions. [2018-02-04 19:20:32,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-02-04 19:20:32,770 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:32,770 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:32,770 INFO L371 AbstractCegarLoop]: === Iteration 47 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:32,770 INFO L82 PathProgramCache]: Analyzing trace with hash -370218899, now seen corresponding path program 1 times [2018-02-04 19:20:32,770 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:32,770 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:32,771 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:32,771 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:32,771 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:32,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:32,781 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:32,785 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:32,785 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:32,785 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:32,786 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:32,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:32,830 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:32,832 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 19:20:32,833 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:32,836 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:32,836 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-02-04 19:20:32,900 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:32,901 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:32,902 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 19:20:32,902 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:32,910 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:32,910 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:18 [2018-02-04 19:20:32,949 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-02-04 19:20:32,950 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:32,959 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-02-04 19:20:32,960 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:32,968 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:20:32,968 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:48, output treesize:46 [2018-02-04 19:20:33,006 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:33,007 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:33,007 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:33,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 35 [2018-02-04 19:20:33,008 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,009 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:33,009 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:33,010 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:33,010 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 35 [2018-02-04 19:20:33,010 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,024 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:20:33,024 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:71, output treesize:57 [2018-02-04 19:20:33,050 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-02-04 19:20:33,052 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:33,052 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,060 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,084 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 44 [2018-02-04 19:20:33,085 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:33,085 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,092 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-02-04 19:20:33,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:33,114 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,121 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,139 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 44 [2018-02-04 19:20:33,140 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:33,140 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,146 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,161 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 4 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:20:33,161 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 6 variables, input treesize:103, output treesize:105 [2018-02-04 19:20:33,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 66 [2018-02-04 19:20:33,193 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 19:20:33,193 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,199 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,218 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 66 [2018-02-04 19:20:33,219 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 19:20:33,219 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,226 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,243 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:20:33,243 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:141, output treesize:111 [2018-02-04 19:20:33,341 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 84 [2018-02-04 19:20:33,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 19:20:33,342 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,348 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,369 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 84 [2018-02-04 19:20:33,371 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 19:20:33,371 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,377 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,392 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:20:33,392 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:181, output treesize:107 [2018-02-04 19:20:33,397 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 70 [2018-02-04 19:20:33,399 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:33,399 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,433 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,462 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 60 [2018-02-04 19:20:33,463 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:33,522 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,532 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,571 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 19:20:33,571 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:147, output treesize:119 [2018-02-04 19:20:33,905 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:33,906 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:33,907 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 78 [2018-02-04 19:20:33,907 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,937 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:33,938 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:33,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 78 [2018-02-04 19:20:33,939 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:33,968 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 64 [2018-02-04 19:20:33,974 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 27 [2018-02-04 19:20:33,974 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-02-04 19:20:33,987 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:20:34,028 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 64 [2018-02-04 19:20:34,034 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 27 [2018-02-04 19:20:34,035 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-02-04 19:20:34,047 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:20:34,091 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 2 dim-1 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 4 xjuncts. [2018-02-04 19:20:34,092 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 10 variables, input treesize:155, output treesize:201 [2018-02-04 19:20:34,160 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 42 [2018-02-04 19:20:34,160 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:34,174 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 42 [2018-02-04 19:20:34,174 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:34,190 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 2 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-02-04 19:20:34,190 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 8 variables, input treesize:95, output treesize:57 [2018-02-04 19:20:34,369 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 45 [2018-02-04 19:20:34,370 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 13 [2018-02-04 19:20:34,370 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:34,374 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:34,387 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 45 [2018-02-04 19:20:34,389 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 13 [2018-02-04 19:20:34,389 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:34,393 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:34,405 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:20:34,405 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:107, output treesize:53 [2018-02-04 19:20:34,445 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:34,445 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 5 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 41 [2018-02-04 19:20:34,445 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:34,460 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:34,460 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 5 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 37 [2018-02-04 19:20:34,461 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:34,473 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 19:20:34,473 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:65, output treesize:55 [2018-02-04 19:20:34,517 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:34,517 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:34,518 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 36 [2018-02-04 19:20:34,518 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:34,525 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:34,525 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:33, output treesize:28 [2018-02-04 19:20:34,586 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 8 proven. 9 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-02-04 19:20:34,586 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:20:34,586 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36] total 36 [2018-02-04 19:20:34,586 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-02-04 19:20:34,587 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-02-04 19:20:34,587 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=1247, Unknown=0, NotChecked=0, Total=1332 [2018-02-04 19:20:34,587 INFO L87 Difference]: Start difference. First operand 211 states and 224 transitions. Second operand 37 states. [2018-02-04 19:20:38,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:38,154 INFO L93 Difference]: Finished difference Result 230 states and 239 transitions. [2018-02-04 19:20:38,154 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-02-04 19:20:38,154 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 85 [2018-02-04 19:20:38,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:38,154 INFO L225 Difference]: With dead ends: 230 [2018-02-04 19:20:38,155 INFO L226 Difference]: Without dead ends: 230 [2018-02-04 19:20:38,156 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 48 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 922 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=340, Invalid=4490, Unknown=0, NotChecked=0, Total=4830 [2018-02-04 19:20:38,156 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2018-02-04 19:20:38,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 212. [2018-02-04 19:20:38,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 212 states. [2018-02-04 19:20:38,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 225 transitions. [2018-02-04 19:20:38,159 INFO L78 Accepts]: Start accepts. Automaton has 212 states and 225 transitions. Word has length 85 [2018-02-04 19:20:38,159 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:38,159 INFO L432 AbstractCegarLoop]: Abstraction has 212 states and 225 transitions. [2018-02-04 19:20:38,159 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-02-04 19:20:38,159 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 225 transitions. [2018-02-04 19:20:38,160 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-02-04 19:20:38,160 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:38,160 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:38,160 INFO L371 AbstractCegarLoop]: === Iteration 48 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:38,160 INFO L82 PathProgramCache]: Analyzing trace with hash -123566025, now seen corresponding path program 2 times [2018-02-04 19:20:38,160 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:38,160 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:38,161 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:38,161 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:38,161 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:38,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:38,172 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:38,176 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:38,176 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:38,176 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:38,176 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 19:20:38,202 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 19:20:38,202 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:20:38,206 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:38,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-02-04 19:20:38,222 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:38,222 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:38,222 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:5, output treesize:1 [2018-02-04 19:20:38,246 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:38,247 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 13 [2018-02-04 19:20:38,247 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:38,248 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:38,248 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:5 [2018-02-04 19:20:38,266 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:38,267 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:38,268 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 24 [2018-02-04 19:20:38,268 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:38,272 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:38,272 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-02-04 19:20:38,381 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-02-04 19:20:38,382 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:20:38,382 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-02-04 19:20:38,382 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-04 19:20:38,382 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-04 19:20:38,382 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=97, Unknown=0, NotChecked=0, Total=132 [2018-02-04 19:20:38,382 INFO L87 Difference]: Start difference. First operand 212 states and 225 transitions. Second operand 12 states. [2018-02-04 19:20:39,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:39,158 INFO L93 Difference]: Finished difference Result 271 states and 287 transitions. [2018-02-04 19:20:39,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-04 19:20:39,158 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 87 [2018-02-04 19:20:39,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:39,158 INFO L225 Difference]: With dead ends: 271 [2018-02-04 19:20:39,159 INFO L226 Difference]: Without dead ends: 271 [2018-02-04 19:20:39,159 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 76 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=103, Invalid=317, Unknown=0, NotChecked=0, Total=420 [2018-02-04 19:20:39,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 271 states. [2018-02-04 19:20:39,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 271 to 211. [2018-02-04 19:20:39,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 211 states. [2018-02-04 19:20:39,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 211 states and 224 transitions. [2018-02-04 19:20:39,161 INFO L78 Accepts]: Start accepts. Automaton has 211 states and 224 transitions. Word has length 87 [2018-02-04 19:20:39,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:39,161 INFO L432 AbstractCegarLoop]: Abstraction has 211 states and 224 transitions. [2018-02-04 19:20:39,162 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-04 19:20:39,162 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 224 transitions. [2018-02-04 19:20:39,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-02-04 19:20:39,162 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:39,162 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:39,162 INFO L371 AbstractCegarLoop]: === Iteration 49 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:39,162 INFO L82 PathProgramCache]: Analyzing trace with hash -123566024, now seen corresponding path program 1 times [2018-02-04 19:20:39,163 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:39,163 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:39,163 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:39,163 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:20:39,163 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:39,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:39,173 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:39,182 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:39,182 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:39,182 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:39,182 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:39,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:39,199 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:39,242 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:39,242 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:20:39,242 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8] total 8 [2018-02-04 19:20:39,243 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 19:20:39,243 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 19:20:39,243 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-04 19:20:39,243 INFO L87 Difference]: Start difference. First operand 211 states and 224 transitions. Second operand 8 states. [2018-02-04 19:20:39,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:39,281 INFO L93 Difference]: Finished difference Result 217 states and 230 transitions. [2018-02-04 19:20:39,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 19:20:39,282 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 87 [2018-02-04 19:20:39,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:39,283 INFO L225 Difference]: With dead ends: 217 [2018-02-04 19:20:39,283 INFO L226 Difference]: Without dead ends: 212 [2018-02-04 19:20:39,283 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 88 GetRequests, 80 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-02-04 19:20:39,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2018-02-04 19:20:39,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 212. [2018-02-04 19:20:39,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 212 states. [2018-02-04 19:20:39,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 225 transitions. [2018-02-04 19:20:39,286 INFO L78 Accepts]: Start accepts. Automaton has 212 states and 225 transitions. Word has length 87 [2018-02-04 19:20:39,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:39,286 INFO L432 AbstractCegarLoop]: Abstraction has 212 states and 225 transitions. [2018-02-04 19:20:39,286 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 19:20:39,286 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 225 transitions. [2018-02-04 19:20:39,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-02-04 19:20:39,287 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:39,287 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:39,287 INFO L371 AbstractCegarLoop]: === Iteration 50 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:39,287 INFO L82 PathProgramCache]: Analyzing trace with hash -512503617, now seen corresponding path program 2 times [2018-02-04 19:20:39,287 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:39,287 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:39,288 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:39,288 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:39,288 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:39,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:39,299 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:39,310 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:39,311 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:39,311 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:39,311 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 19:20:39,348 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 19:20:39,348 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:20:39,353 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:39,488 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:39,489 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:20:39,489 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9] total 9 [2018-02-04 19:20:39,489 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-02-04 19:20:39,489 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-02-04 19:20:39,489 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-02-04 19:20:39,489 INFO L87 Difference]: Start difference. First operand 212 states and 225 transitions. Second operand 9 states. [2018-02-04 19:20:39,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:39,639 INFO L93 Difference]: Finished difference Result 218 states and 231 transitions. [2018-02-04 19:20:39,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 19:20:39,639 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 88 [2018-02-04 19:20:39,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:39,640 INFO L225 Difference]: With dead ends: 218 [2018-02-04 19:20:39,640 INFO L226 Difference]: Without dead ends: 213 [2018-02-04 19:20:39,641 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 80 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-02-04 19:20:39,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-02-04 19:20:39,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 213. [2018-02-04 19:20:39,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213 states. [2018-02-04 19:20:39,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 226 transitions. [2018-02-04 19:20:39,643 INFO L78 Accepts]: Start accepts. Automaton has 213 states and 226 transitions. Word has length 88 [2018-02-04 19:20:39,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:39,643 INFO L432 AbstractCegarLoop]: Abstraction has 213 states and 226 transitions. [2018-02-04 19:20:39,644 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-02-04 19:20:39,644 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 226 transitions. [2018-02-04 19:20:39,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-02-04 19:20:39,644 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:39,644 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:39,644 INFO L371 AbstractCegarLoop]: === Iteration 51 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:39,644 INFO L82 PathProgramCache]: Analyzing trace with hash -1590719605, now seen corresponding path program 1 times [2018-02-04 19:20:39,645 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:39,645 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:39,645 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:39,645 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:20:39,645 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:39,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:39,658 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:40,061 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 19:20:40,061 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:40,061 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:40,062 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:40,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:40,096 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:40,160 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:20:40,161 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:40,161 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:40,162 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:40,163 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:40,163 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-02-04 19:20:40,466 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 28 [2018-02-04 19:20:40,468 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:20:40,468 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-02-04 19:20:40,468 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:40,479 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:20:40,479 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-02-04 19:20:40,480 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:40,483 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:40,483 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:40,483 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:26, output treesize:3 [2018-02-04 19:20:40,506 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 19:20:40,507 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:20:40,507 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28] total 40 [2018-02-04 19:20:40,507 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-02-04 19:20:40,507 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-02-04 19:20:40,507 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=104, Invalid=1536, Unknown=0, NotChecked=0, Total=1640 [2018-02-04 19:20:40,508 INFO L87 Difference]: Start difference. First operand 213 states and 226 transitions. Second operand 41 states. [2018-02-04 19:20:41,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:41,195 INFO L93 Difference]: Finished difference Result 227 states and 235 transitions. [2018-02-04 19:20:41,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-02-04 19:20:41,196 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 89 [2018-02-04 19:20:41,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:41,196 INFO L225 Difference]: With dead ends: 227 [2018-02-04 19:20:41,196 INFO L226 Difference]: Without dead ends: 227 [2018-02-04 19:20:41,197 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 70 SyntacticMatches, 11 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 594 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=207, Invalid=3215, Unknown=0, NotChecked=0, Total=3422 [2018-02-04 19:20:41,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states. [2018-02-04 19:20:41,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 213. [2018-02-04 19:20:41,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213 states. [2018-02-04 19:20:41,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 225 transitions. [2018-02-04 19:20:41,199 INFO L78 Accepts]: Start accepts. Automaton has 213 states and 225 transitions. Word has length 89 [2018-02-04 19:20:41,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:41,199 INFO L432 AbstractCegarLoop]: Abstraction has 213 states and 225 transitions. [2018-02-04 19:20:41,199 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-02-04 19:20:41,199 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 225 transitions. [2018-02-04 19:20:41,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-02-04 19:20:41,200 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:41,200 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:41,200 INFO L371 AbstractCegarLoop]: === Iteration 52 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:41,200 INFO L82 PathProgramCache]: Analyzing trace with hash -1590719604, now seen corresponding path program 1 times [2018-02-04 19:20:41,200 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:41,200 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:41,201 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:41,201 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:41,201 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:41,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:41,209 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:41,638 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 19:20:41,638 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:41,638 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:41,639 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:41,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:41,662 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:41,716 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:20:41,717 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:41,717 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:41,718 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:41,719 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:41,719 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-02-04 19:20:42,063 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 28 [2018-02-04 19:20:42,065 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:20:42,065 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-02-04 19:20:42,065 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:42,071 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:20:42,071 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-02-04 19:20:42,071 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:42,074 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:42,075 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:42,075 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:26, output treesize:3 [2018-02-04 19:20:42,082 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 19:20:42,082 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:20:42,082 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28] total 40 [2018-02-04 19:20:42,082 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-02-04 19:20:42,082 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-02-04 19:20:42,083 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=104, Invalid=1536, Unknown=0, NotChecked=0, Total=1640 [2018-02-04 19:20:42,083 INFO L87 Difference]: Start difference. First operand 213 states and 225 transitions. Second operand 41 states. [2018-02-04 19:20:42,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:42,820 INFO L93 Difference]: Finished difference Result 224 states and 232 transitions. [2018-02-04 19:20:42,820 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-02-04 19:20:42,820 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 89 [2018-02-04 19:20:42,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:42,821 INFO L225 Difference]: With dead ends: 224 [2018-02-04 19:20:42,821 INFO L226 Difference]: Without dead ends: 224 [2018-02-04 19:20:42,821 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 71 SyntacticMatches, 10 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 579 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=207, Invalid=3215, Unknown=0, NotChecked=0, Total=3422 [2018-02-04 19:20:42,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-02-04 19:20:42,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 213. [2018-02-04 19:20:42,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213 states. [2018-02-04 19:20:42,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 224 transitions. [2018-02-04 19:20:42,823 INFO L78 Accepts]: Start accepts. Automaton has 213 states and 224 transitions. Word has length 89 [2018-02-04 19:20:42,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:42,823 INFO L432 AbstractCegarLoop]: Abstraction has 213 states and 224 transitions. [2018-02-04 19:20:42,823 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-02-04 19:20:42,823 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 224 transitions. [2018-02-04 19:20:42,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-02-04 19:20:42,824 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:42,824 INFO L351 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:42,824 INFO L371 AbstractCegarLoop]: === Iteration 53 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:42,824 INFO L82 PathProgramCache]: Analyzing trace with hash 315332888, now seen corresponding path program 3 times [2018-02-04 19:20:42,824 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:42,824 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:42,824 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:42,825 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:42,825 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:42,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:42,832 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:42,839 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:42,839 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:42,839 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:42,839 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 19:20:42,876 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-02-04 19:20:42,876 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:20:42,879 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:43,021 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:43,021 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:20:43,021 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10] total 10 [2018-02-04 19:20:43,021 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 19:20:43,022 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 19:20:43,022 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 19:20:43,022 INFO L87 Difference]: Start difference. First operand 213 states and 224 transitions. Second operand 10 states. [2018-02-04 19:20:43,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:43,166 INFO L93 Difference]: Finished difference Result 219 states and 230 transitions. [2018-02-04 19:20:43,166 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 19:20:43,167 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 89 [2018-02-04 19:20:43,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:43,167 INFO L225 Difference]: With dead ends: 219 [2018-02-04 19:20:43,167 INFO L226 Difference]: Without dead ends: 214 [2018-02-04 19:20:43,167 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 80 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-02-04 19:20:43,167 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-02-04 19:20:43,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 214. [2018-02-04 19:20:43,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2018-02-04 19:20:43,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 225 transitions. [2018-02-04 19:20:43,169 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 225 transitions. Word has length 89 [2018-02-04 19:20:43,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:43,169 INFO L432 AbstractCegarLoop]: Abstraction has 214 states and 225 transitions. [2018-02-04 19:20:43,169 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 19:20:43,169 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 225 transitions. [2018-02-04 19:20:43,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-02-04 19:20:43,169 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:43,170 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:43,170 INFO L371 AbstractCegarLoop]: === Iteration 54 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:43,170 INFO L82 PathProgramCache]: Analyzing trace with hash 284856192, now seen corresponding path program 1 times [2018-02-04 19:20:43,170 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:43,170 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:43,170 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:43,170 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:20:43,170 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:43,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:43,180 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:43,184 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:43,185 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:43,185 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:43,185 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:43,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:43,225 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:43,391 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 68 [2018-02-04 19:20:43,394 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:43,395 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,405 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,408 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 68 [2018-02-04 19:20:43,409 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:43,409 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,418 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,421 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 68 [2018-02-04 19:20:43,422 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:43,422 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,431 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,433 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 68 [2018-02-04 19:20:43,435 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:43,435 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,444 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,485 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 64 [2018-02-04 19:20:43,487 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:43,487 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,498 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,500 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 64 [2018-02-04 19:20:43,501 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:43,501 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,509 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,511 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 64 [2018-02-04 19:20:43,512 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:43,512 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,521 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,551 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-02-04 19:20:43,551 INFO L202 ElimStorePlain]: Needed 15 recursive calls to eliminate 3 variables, input treesize:285, output treesize:199 [2018-02-04 19:20:43,600 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 80 [2018-02-04 19:20:43,603 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 19:20:43,603 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,614 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,653 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 80 [2018-02-04 19:20:43,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 19:20:43,655 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,664 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,701 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 80 [2018-02-04 19:20:43,702 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 19:20:43,703 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,711 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,743 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-02-04 19:20:43,743 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:253, output treesize:208 [2018-02-04 19:20:43,885 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:43,888 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 108 [2018-02-04 19:20:43,889 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 19:20:43,889 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,900 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,958 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:43,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 108 [2018-02-04 19:20:43,962 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 19:20:43,962 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:43,973 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:44,010 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:44,012 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 108 [2018-02-04 19:20:44,014 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 19:20:44,014 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:44,022 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:44,050 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-02-04 19:20:44,050 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 6 variables, input treesize:313, output treesize:202 [2018-02-04 19:20:44,053 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:44,055 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 81 [2018-02-04 19:20:44,057 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:44,057 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:44,067 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:44,109 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:44,111 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 81 [2018-02-04 19:20:44,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:44,113 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:44,123 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:44,161 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:44,164 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 81 [2018-02-04 19:20:44,165 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:44,165 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:44,175 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:44,209 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-02-04 19:20:44,209 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:241, output treesize:229 [2018-02-04 19:20:44,598 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:44,601 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 88 [2018-02-04 19:20:44,608 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 27 [2018-02-04 19:20:44,609 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-02-04 19:20:44,626 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:20:44,707 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:44,710 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 88 [2018-02-04 19:20:44,717 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 27 [2018-02-04 19:20:44,717 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-02-04 19:20:44,734 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:20:44,827 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:44,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 88 [2018-02-04 19:20:44,836 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 27 [2018-02-04 19:20:44,837 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-02-04 19:20:44,852 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:20:44,926 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 3 dim-2 vars, End of recursive call: and 6 xjuncts. [2018-02-04 19:20:44,926 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 9 variables, input treesize:268, output treesize:430 [2018-02-04 19:20:45,027 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:45,027 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 56 [2018-02-04 19:20:45,043 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:45,043 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:45,044 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:45,044 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 25 [2018-02-04 19:20:45,044 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:45,050 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:45,072 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:45,072 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 46 [2018-02-04 19:20:45,085 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:45,085 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:45,086 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:45,086 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 25 [2018-02-04 19:20:45,086 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:45,090 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:45,111 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:45,111 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 50 [2018-02-04 19:20:45,125 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:45,126 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:45,126 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:45,126 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 25 [2018-02-04 19:20:45,127 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:45,132 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:45,150 INFO L267 ElimStorePlain]: Start of recursive call 1: 9 dim-0 vars, 3 dim-1 vars, End of recursive call: 6 dim-0 vars, and 3 xjuncts. [2018-02-04 19:20:45,150 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 12 variables, input treesize:153, output treesize:85 [2018-02-04 19:20:45,408 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 68 [2018-02-04 19:20:45,409 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 28 [2018-02-04 19:20:45,409 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:45,416 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:45,446 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 68 [2018-02-04 19:20:45,447 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 28 [2018-02-04 19:20:45,448 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:45,457 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:45,488 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 68 [2018-02-04 19:20:45,489 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 28 [2018-02-04 19:20:45,490 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:45,496 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:45,520 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-02-04 19:20:45,520 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:229, output treesize:148 [2018-02-04 19:20:45,905 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 19:20:45,905 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:20:45,905 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [33] imperfect sequences [] total 33 [2018-02-04 19:20:45,906 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-02-04 19:20:45,906 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-02-04 19:20:45,906 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=1033, Unknown=0, NotChecked=0, Total=1122 [2018-02-04 19:20:45,906 INFO L87 Difference]: Start difference. First operand 214 states and 225 transitions. Second operand 34 states. [2018-02-04 19:20:49,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:49,924 INFO L93 Difference]: Finished difference Result 221 states and 231 transitions. [2018-02-04 19:20:49,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-02-04 19:20:49,924 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 88 [2018-02-04 19:20:49,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:49,925 INFO L225 Difference]: With dead ends: 221 [2018-02-04 19:20:49,925 INFO L226 Difference]: Without dead ends: 209 [2018-02-04 19:20:49,925 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 52 SyntacticMatches, 3 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 796 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=222, Invalid=3084, Unknown=0, NotChecked=0, Total=3306 [2018-02-04 19:20:49,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2018-02-04 19:20:49,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 205. [2018-02-04 19:20:49,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 205 states. [2018-02-04 19:20:49,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 205 states to 205 states and 215 transitions. [2018-02-04 19:20:49,927 INFO L78 Accepts]: Start accepts. Automaton has 205 states and 215 transitions. Word has length 88 [2018-02-04 19:20:49,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:49,927 INFO L432 AbstractCegarLoop]: Abstraction has 205 states and 215 transitions. [2018-02-04 19:20:49,927 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-02-04 19:20:49,927 INFO L276 IsEmpty]: Start isEmpty. Operand 205 states and 215 transitions. [2018-02-04 19:20:49,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-02-04 19:20:49,927 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:49,927 INFO L351 BasicCegarLoop]: trace histogram [5, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:49,928 INFO L371 AbstractCegarLoop]: === Iteration 55 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:49,928 INFO L82 PathProgramCache]: Analyzing trace with hash 208460767, now seen corresponding path program 4 times [2018-02-04 19:20:49,928 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:49,928 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:49,928 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:49,928 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:49,928 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:49,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:49,935 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:49,942 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:49,942 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:49,942 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:49,942 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 19:20:49,956 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 19:20:49,956 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:20:49,959 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:50,037 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:50,038 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:20:50,038 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11] total 11 [2018-02-04 19:20:50,038 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 19:20:50,038 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 19:20:50,038 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-02-04 19:20:50,038 INFO L87 Difference]: Start difference. First operand 205 states and 215 transitions. Second operand 11 states. [2018-02-04 19:20:50,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:50,133 INFO L93 Difference]: Finished difference Result 211 states and 221 transitions. [2018-02-04 19:20:50,133 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 19:20:50,133 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 90 [2018-02-04 19:20:50,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:50,134 INFO L225 Difference]: With dead ends: 211 [2018-02-04 19:20:50,134 INFO L226 Difference]: Without dead ends: 206 [2018-02-04 19:20:50,134 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 80 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2018-02-04 19:20:50,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-02-04 19:20:50,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 206. [2018-02-04 19:20:50,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2018-02-04 19:20:50,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 216 transitions. [2018-02-04 19:20:50,137 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 216 transitions. Word has length 90 [2018-02-04 19:20:50,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:50,137 INFO L432 AbstractCegarLoop]: Abstraction has 206 states and 216 transitions. [2018-02-04 19:20:50,137 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 19:20:50,137 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 216 transitions. [2018-02-04 19:20:50,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-02-04 19:20:50,138 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:50,138 INFO L351 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:50,138 INFO L371 AbstractCegarLoop]: === Iteration 56 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:50,138 INFO L82 PathProgramCache]: Analyzing trace with hash 1190392312, now seen corresponding path program 5 times [2018-02-04 19:20:50,138 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:50,138 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:50,139 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:50,139 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:20:50,139 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:50,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:50,151 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:50,162 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:50,162 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:50,162 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:50,163 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 19:20:50,188 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2018-02-04 19:20:50,188 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:20:50,192 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:50,365 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:50,366 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:20:50,366 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12] total 12 [2018-02-04 19:20:50,366 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-04 19:20:50,366 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-04 19:20:50,366 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-02-04 19:20:50,366 INFO L87 Difference]: Start difference. First operand 206 states and 216 transitions. Second operand 12 states. [2018-02-04 19:20:50,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:50,527 INFO L93 Difference]: Finished difference Result 212 states and 222 transitions. [2018-02-04 19:20:50,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-02-04 19:20:50,527 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 91 [2018-02-04 19:20:50,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:50,528 INFO L225 Difference]: With dead ends: 212 [2018-02-04 19:20:50,528 INFO L226 Difference]: Without dead ends: 207 [2018-02-04 19:20:50,528 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 80 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2018-02-04 19:20:50,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-02-04 19:20:50,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 207. [2018-02-04 19:20:50,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-02-04 19:20:50,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 217 transitions. [2018-02-04 19:20:50,530 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 217 transitions. Word has length 91 [2018-02-04 19:20:50,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:50,531 INFO L432 AbstractCegarLoop]: Abstraction has 207 states and 217 transitions. [2018-02-04 19:20:50,531 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-04 19:20:50,531 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 217 transitions. [2018-02-04 19:20:50,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-02-04 19:20:50,531 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:50,531 INFO L351 BasicCegarLoop]: trace histogram [7, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:50,532 INFO L371 AbstractCegarLoop]: === Iteration 57 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:50,532 INFO L82 PathProgramCache]: Analyzing trace with hash 1565499135, now seen corresponding path program 6 times [2018-02-04 19:20:50,532 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:50,532 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:50,532 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:50,532 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:20:50,533 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:50,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:50,545 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:50,558 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:50,558 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:50,558 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:50,558 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-04 19:20:50,621 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-02-04 19:20:50,622 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:20:50,626 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:50,835 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:50,835 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:20:50,836 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13] total 13 [2018-02-04 19:20:50,836 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-04 19:20:50,836 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-04 19:20:50,836 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-02-04 19:20:50,836 INFO L87 Difference]: Start difference. First operand 207 states and 217 transitions. Second operand 13 states. [2018-02-04 19:20:51,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:51,031 INFO L93 Difference]: Finished difference Result 213 states and 223 transitions. [2018-02-04 19:20:51,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-04 19:20:51,031 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 92 [2018-02-04 19:20:51,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:51,032 INFO L225 Difference]: With dead ends: 213 [2018-02-04 19:20:51,032 INFO L226 Difference]: Without dead ends: 208 [2018-02-04 19:20:51,032 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 80 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2018-02-04 19:20:51,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states. [2018-02-04 19:20:51,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 208. [2018-02-04 19:20:51,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 208 states. [2018-02-04 19:20:51,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 218 transitions. [2018-02-04 19:20:51,035 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 218 transitions. Word has length 92 [2018-02-04 19:20:51,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:51,035 INFO L432 AbstractCegarLoop]: Abstraction has 208 states and 218 transitions. [2018-02-04 19:20:51,035 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-04 19:20:51,035 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 218 transitions. [2018-02-04 19:20:51,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-02-04 19:20:51,035 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:51,036 INFO L351 BasicCegarLoop]: trace histogram [8, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:51,036 INFO L371 AbstractCegarLoop]: === Iteration 58 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:51,036 INFO L82 PathProgramCache]: Analyzing trace with hash 308908760, now seen corresponding path program 7 times [2018-02-04 19:20:51,036 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:51,036 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:51,037 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:51,037 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:20:51,037 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:51,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:51,048 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:51,060 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:51,060 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:51,060 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:51,061 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:51,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:51,083 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:51,269 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:51,269 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:20:51,269 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14] total 14 [2018-02-04 19:20:51,269 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-02-04 19:20:51,269 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-02-04 19:20:51,269 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=157, Unknown=0, NotChecked=0, Total=182 [2018-02-04 19:20:51,270 INFO L87 Difference]: Start difference. First operand 208 states and 218 transitions. Second operand 14 states. [2018-02-04 19:20:51,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:51,415 INFO L93 Difference]: Finished difference Result 214 states and 224 transitions. [2018-02-04 19:20:51,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-02-04 19:20:51,415 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 93 [2018-02-04 19:20:51,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:51,416 INFO L225 Difference]: With dead ends: 214 [2018-02-04 19:20:51,416 INFO L226 Difference]: Without dead ends: 209 [2018-02-04 19:20:51,416 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 80 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-02-04 19:20:51,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2018-02-04 19:20:51,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 209. [2018-02-04 19:20:51,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2018-02-04 19:20:51,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 219 transitions. [2018-02-04 19:20:51,417 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 219 transitions. Word has length 93 [2018-02-04 19:20:51,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:51,418 INFO L432 AbstractCegarLoop]: Abstraction has 209 states and 219 transitions. [2018-02-04 19:20:51,418 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-02-04 19:20:51,418 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 219 transitions. [2018-02-04 19:20:51,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-02-04 19:20:51,418 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:51,418 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:51,418 INFO L371 AbstractCegarLoop]: === Iteration 59 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:51,418 INFO L82 PathProgramCache]: Analyzing trace with hash -487038867, now seen corresponding path program 1 times [2018-02-04 19:20:51,418 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:51,419 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:51,419 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:51,419 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:51,419 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:51,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:51,428 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:51,905 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 19:20:51,905 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:51,905 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:51,906 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:51,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:51,928 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:51,941 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:20:51,943 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:51,943 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:51,944 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:51,947 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:51,947 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-02-04 19:20:52,193 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-02-04 19:20:52,195 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:52,195 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-02-04 19:20:52,195 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:52,198 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:52,201 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:52,201 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-02-04 19:20:52,227 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 1 [2018-02-04 19:20:52,227 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:52,229 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:52,229 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:11 [2018-02-04 19:20:52,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 24 [2018-02-04 19:20:52,770 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 4 [2018-02-04 19:20:52,770 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:52,773 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 1 [2018-02-04 19:20:52,773 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:52,774 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:52,774 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:52,774 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:27, output treesize:5 [2018-02-04 19:20:52,786 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 19:20:52,786 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:20:52,786 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 34] total 58 [2018-02-04 19:20:52,786 INFO L409 AbstractCegarLoop]: Interpolant automaton has 59 states [2018-02-04 19:20:52,787 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2018-02-04 19:20:52,787 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=226, Invalid=3196, Unknown=0, NotChecked=0, Total=3422 [2018-02-04 19:20:52,787 INFO L87 Difference]: Start difference. First operand 209 states and 219 transitions. Second operand 59 states. [2018-02-04 19:20:54,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:54,585 INFO L93 Difference]: Finished difference Result 223 states and 230 transitions. [2018-02-04 19:20:54,585 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-02-04 19:20:54,585 INFO L78 Accepts]: Start accepts. Automaton has 59 states. Word has length 94 [2018-02-04 19:20:54,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:54,586 INFO L225 Difference]: With dead ends: 223 [2018-02-04 19:20:54,586 INFO L226 Difference]: Without dead ends: 223 [2018-02-04 19:20:54,586 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 68 SyntacticMatches, 6 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2794 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=681, Invalid=9021, Unknown=0, NotChecked=0, Total=9702 [2018-02-04 19:20:54,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2018-02-04 19:20:54,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 209. [2018-02-04 19:20:54,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2018-02-04 19:20:54,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 218 transitions. [2018-02-04 19:20:54,588 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 218 transitions. Word has length 94 [2018-02-04 19:20:54,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:54,588 INFO L432 AbstractCegarLoop]: Abstraction has 209 states and 218 transitions. [2018-02-04 19:20:54,588 INFO L433 AbstractCegarLoop]: Interpolant automaton has 59 states. [2018-02-04 19:20:54,588 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 218 transitions. [2018-02-04 19:20:54,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-02-04 19:20:54,589 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:54,589 INFO L351 BasicCegarLoop]: trace histogram [9, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:54,589 INFO L371 AbstractCegarLoop]: === Iteration 60 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:54,589 INFO L82 PathProgramCache]: Analyzing trace with hash 9312799, now seen corresponding path program 8 times [2018-02-04 19:20:54,589 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:54,589 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:54,589 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:54,589 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:54,589 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:54,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:54,597 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:54,604 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:54,604 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:54,604 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:54,605 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 19:20:54,635 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 19:20:54,636 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:20:54,639 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:54,817 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:20:54,817 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:20:54,817 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2018-02-04 19:20:54,817 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-04 19:20:54,817 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-04 19:20:54,817 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-02-04 19:20:54,818 INFO L87 Difference]: Start difference. First operand 209 states and 218 transitions. Second operand 15 states. [2018-02-04 19:20:54,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:54,981 INFO L93 Difference]: Finished difference Result 215 states and 224 transitions. [2018-02-04 19:20:54,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-04 19:20:54,981 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 94 [2018-02-04 19:20:54,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:54,982 INFO L225 Difference]: With dead ends: 215 [2018-02-04 19:20:54,982 INFO L226 Difference]: Without dead ends: 210 [2018-02-04 19:20:54,982 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 80 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2018-02-04 19:20:54,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210 states. [2018-02-04 19:20:54,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210 to 210. [2018-02-04 19:20:54,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2018-02-04 19:20:54,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 219 transitions. [2018-02-04 19:20:54,983 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 219 transitions. Word has length 94 [2018-02-04 19:20:54,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:54,983 INFO L432 AbstractCegarLoop]: Abstraction has 210 states and 219 transitions. [2018-02-04 19:20:54,983 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-04 19:20:54,984 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 219 transitions. [2018-02-04 19:20:54,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-02-04 19:20:54,984 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:54,984 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:54,984 INFO L371 AbstractCegarLoop]: === Iteration 61 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:54,984 INFO L82 PathProgramCache]: Analyzing trace with hash 2081664383, now seen corresponding path program 1 times [2018-02-04 19:20:54,984 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:54,984 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:54,985 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:54,985 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:20:54,985 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:54,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:54,995 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:55,010 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:55,010 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:55,010 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:55,010 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:55,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:55,059 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:55,061 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 19:20:55,062 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:55,064 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:55,065 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-02-04 19:20:55,112 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:55,112 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:55,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 19:20:55,113 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:55,120 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:55,120 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:23, output treesize:21 [2018-02-04 19:20:55,169 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:55,170 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:55,171 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:55,171 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 34 [2018-02-04 19:20:55,171 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:55,181 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:55,181 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:32, output treesize:34 [2018-02-04 19:20:55,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:20:55,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:55,201 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:55,202 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:55,211 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:55,211 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:47, output treesize:52 [2018-02-04 19:20:55,256 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 63 [2018-02-04 19:20:55,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 19:20:55,258 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:55,261 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:55,269 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:55,270 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:89, output treesize:52 [2018-02-04 19:20:55,274 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 46 [2018-02-04 19:20:55,275 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:20:55,275 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:55,280 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:55,290 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:55,290 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:65, output treesize:61 [2018-02-04 19:20:55,512 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 53 [2018-02-04 19:20:55,514 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:55,515 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-02-04 19:20:55,516 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:55,525 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:55,538 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:20:55,538 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:74, output treesize:70 [2018-02-04 19:20:55,587 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 37 [2018-02-04 19:20:55,588 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:55,593 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:55,593 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:74, output treesize:47 [2018-02-04 19:20:56,180 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 50 [2018-02-04 19:20:56,182 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 16 [2018-02-04 19:20:56,182 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:56,192 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 14 [2018-02-04 19:20:56,192 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:56,206 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:56,213 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:20:56,213 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:82, output treesize:28 [2018-02-04 19:20:56,293 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 9 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 19:20:56,293 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:20:56,293 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43] total 43 [2018-02-04 19:20:56,293 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-02-04 19:20:56,293 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-02-04 19:20:56,294 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=152, Invalid=1740, Unknown=0, NotChecked=0, Total=1892 [2018-02-04 19:20:56,294 INFO L87 Difference]: Start difference. First operand 210 states and 219 transitions. Second operand 44 states. [2018-02-04 19:20:57,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:20:57,846 INFO L93 Difference]: Finished difference Result 223 states and 230 transitions. [2018-02-04 19:20:57,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-02-04 19:20:57,846 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 95 [2018-02-04 19:20:57,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:20:57,847 INFO L225 Difference]: With dead ends: 223 [2018-02-04 19:20:57,847 INFO L226 Difference]: Without dead ends: 223 [2018-02-04 19:20:57,847 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 51 SyntacticMatches, 1 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1350 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=395, Invalid=4435, Unknown=0, NotChecked=0, Total=4830 [2018-02-04 19:20:57,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2018-02-04 19:20:57,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 210. [2018-02-04 19:20:57,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2018-02-04 19:20:57,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 218 transitions. [2018-02-04 19:20:57,849 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 218 transitions. Word has length 95 [2018-02-04 19:20:57,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:20:57,849 INFO L432 AbstractCegarLoop]: Abstraction has 210 states and 218 transitions. [2018-02-04 19:20:57,849 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-02-04 19:20:57,849 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 218 transitions. [2018-02-04 19:20:57,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-02-04 19:20:57,850 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:20:57,850 INFO L351 BasicCegarLoop]: trace histogram [10, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:20:57,850 INFO L371 AbstractCegarLoop]: === Iteration 62 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:20:57,850 INFO L82 PathProgramCache]: Analyzing trace with hash -688227400, now seen corresponding path program 9 times [2018-02-04 19:20:57,850 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:20:57,850 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:20:57,851 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:57,851 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:20:57,851 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:20:57,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:20:57,865 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:20:57,878 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:20:57,878 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:20:57,878 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:20:57,879 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 19:20:57,923 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-02-04 19:20:57,923 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:20:57,926 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:20:58,088 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 [2018-02-04 19:20:58,088 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:58,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2018-02-04 19:20:58,102 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:58,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-02-04 19:20:58,114 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:58,124 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-02-04 19:20:58,125 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:58,134 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-02-04 19:20:58,134 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:41, output treesize:29 [2018-02-04 19:20:58,289 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:58,290 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:58,290 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 49 [2018-02-04 19:20:58,290 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:58,309 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:58,309 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:58,310 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 39 [2018-02-04 19:20:58,310 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:58,325 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:58,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 37 [2018-02-04 19:20:58,326 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:58,341 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:58,341 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:20:58,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 37 [2018-02-04 19:20:58,342 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:20:58,353 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-02-04 19:20:58,354 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:71, output treesize:53 [2018-02-04 19:20:58,761 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2018-02-04 19:20:58,761 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:20:58,761 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19] total 19 [2018-02-04 19:20:58,761 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 19:20:58,761 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 19:20:58,761 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=329, Unknown=0, NotChecked=0, Total=380 [2018-02-04 19:20:58,762 INFO L87 Difference]: Start difference. First operand 210 states and 218 transitions. Second operand 20 states. [2018-02-04 19:21:00,338 WARN L143 SmtUtils]: Spent 105ms on a formula simplification that was a NOOP. DAG size: 52 [2018-02-04 19:21:01,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:21:01,096 INFO L93 Difference]: Finished difference Result 225 states and 232 transitions. [2018-02-04 19:21:01,096 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-02-04 19:21:01,096 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 95 [2018-02-04 19:21:01,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:21:01,097 INFO L225 Difference]: With dead ends: 225 [2018-02-04 19:21:01,097 INFO L226 Difference]: Without dead ends: 225 [2018-02-04 19:21:01,097 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 76 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 277 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=190, Invalid=1370, Unknown=0, NotChecked=0, Total=1560 [2018-02-04 19:21:01,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2018-02-04 19:21:01,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 209. [2018-02-04 19:21:01,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2018-02-04 19:21:01,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 217 transitions. [2018-02-04 19:21:01,099 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 217 transitions. Word has length 95 [2018-02-04 19:21:01,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:21:01,099 INFO L432 AbstractCegarLoop]: Abstraction has 209 states and 217 transitions. [2018-02-04 19:21:01,099 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 19:21:01,099 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 217 transitions. [2018-02-04 19:21:01,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-02-04 19:21:01,100 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:21:01,100 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:21:01,100 INFO L371 AbstractCegarLoop]: === Iteration 63 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:21:01,100 INFO L82 PathProgramCache]: Analyzing trace with hash -975286335, now seen corresponding path program 1 times [2018-02-04 19:21:01,100 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:21:01,100 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:21:01,100 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:21:01,100 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:21:01,101 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:21:01,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:21:01,108 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:21:01,111 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:21:01,111 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:21:01,111 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:21:01,112 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:21:01,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:21:01,159 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:21:01,175 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 19:21:01,176 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,176 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,176 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-04 19:21:01,205 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:01,205 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:01,206 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 19:21:01,206 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,209 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,209 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-02-04 19:21:01,239 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:01,239 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:01,240 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:01,240 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-02-04 19:21:01,240 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,243 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,243 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:23, output treesize:16 [2018-02-04 19:21:01,254 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:21:01,255 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:01,255 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,256 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,262 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:21:01,263 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:01,263 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,264 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,268 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,268 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:39, output treesize:34 [2018-02-04 19:21:01,281 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-02-04 19:21:01,281 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 19:21:01,282 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,282 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,286 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,286 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:52, output treesize:37 [2018-02-04 19:21:01,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 62 [2018-02-04 19:21:01,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 19:21:01,326 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,328 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,332 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,332 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:72, output treesize:35 [2018-02-04 19:21:01,336 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 45 [2018-02-04 19:21:01,337 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:01,337 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,341 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,346 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:21:01,346 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:48, output treesize:44 [2018-02-04 19:21:01,463 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-02-04 19:21:01,463 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,464 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:21:01,464 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:19, output treesize:13 [2018-02-04 19:21:01,636 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 52 [2018-02-04 19:21:01,642 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 27 [2018-02-04 19:21:01,643 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-02-04 19:21:01,652 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:21:01,666 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 19:21:01,666 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:57, output treesize:66 [2018-02-04 19:21:01,839 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-02-04 19:21:01,841 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 9 [2018-02-04 19:21:01,841 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,845 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,850 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,850 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:14 [2018-02-04 19:21:01,895 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:01,896 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-02-04 19:21:01,896 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:01,914 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:21:01,914 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:15 [2018-02-04 19:21:01,958 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 9 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 19:21:01,959 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:21:01,959 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31] total 31 [2018-02-04 19:21:01,959 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-02-04 19:21:01,959 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-02-04 19:21:01,959 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=914, Unknown=0, NotChecked=0, Total=992 [2018-02-04 19:21:01,959 INFO L87 Difference]: Start difference. First operand 209 states and 217 transitions. Second operand 32 states. [2018-02-04 19:21:04,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:21:04,585 INFO L93 Difference]: Finished difference Result 221 states and 228 transitions. [2018-02-04 19:21:04,586 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-02-04 19:21:04,586 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 97 [2018-02-04 19:21:04,586 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:21:04,586 INFO L225 Difference]: With dead ends: 221 [2018-02-04 19:21:04,586 INFO L226 Difference]: Without dead ends: 221 [2018-02-04 19:21:04,587 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 66 SyntacticMatches, 1 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 782 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=284, Invalid=3498, Unknown=0, NotChecked=0, Total=3782 [2018-02-04 19:21:04,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-02-04 19:21:04,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 211. [2018-02-04 19:21:04,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 211 states. [2018-02-04 19:21:04,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 211 states and 219 transitions. [2018-02-04 19:21:04,590 INFO L78 Accepts]: Start accepts. Automaton has 211 states and 219 transitions. Word has length 97 [2018-02-04 19:21:04,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:21:04,590 INFO L432 AbstractCegarLoop]: Abstraction has 211 states and 219 transitions. [2018-02-04 19:21:04,590 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-02-04 19:21:04,590 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 219 transitions. [2018-02-04 19:21:04,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-02-04 19:21:04,591 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:21:04,591 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:21:04,591 INFO L371 AbstractCegarLoop]: === Iteration 64 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:21:04,591 INFO L82 PathProgramCache]: Analyzing trace with hash -169105259, now seen corresponding path program 1 times [2018-02-04 19:21:04,591 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:21:04,591 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:21:04,592 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:21:04,592 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:21:04,592 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:21:04,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:21:04,601 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:21:04,604 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:21:04,604 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:21:04,605 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:21:04,605 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:21:04,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:21:04,652 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:21:04,656 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 19:21:04,656 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:04,659 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:04,660 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-02-04 19:21:04,705 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:04,706 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:04,707 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 19:21:04,707 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:04,712 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:04,713 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:18 [2018-02-04 19:21:04,777 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-02-04 19:21:04,777 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:04,800 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-02-04 19:21:04,800 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:04,812 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:21:04,812 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:48, output treesize:46 [2018-02-04 19:21:04,862 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:04,863 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:04,863 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:04,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 28 [2018-02-04 19:21:04,864 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:04,865 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:04,866 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:04,866 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:04,867 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 28 [2018-02-04 19:21:04,867 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:04,884 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:21:04,884 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:71, output treesize:57 [2018-02-04 19:21:04,918 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-02-04 19:21:04,920 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:04,920 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:04,927 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:04,952 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 44 [2018-02-04 19:21:04,953 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:04,954 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:04,961 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:04,984 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-02-04 19:21:04,986 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:04,986 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:04,994 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,013 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 44 [2018-02-04 19:21:05,014 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:05,014 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,021 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,037 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 4 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:21:05,038 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 6 variables, input treesize:103, output treesize:105 [2018-02-04 19:21:05,078 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 66 [2018-02-04 19:21:05,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 19:21:05,080 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,086 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,105 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 66 [2018-02-04 19:21:05,107 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 19:21:05,107 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,114 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,131 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:21:05,131 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:141, output treesize:111 [2018-02-04 19:21:05,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 90 [2018-02-04 19:21:05,250 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,251 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 90 [2018-02-04 19:21:05,251 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,284 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 84 [2018-02-04 19:21:05,286 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 19:21:05,286 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,296 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,317 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 84 [2018-02-04 19:21:05,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 19:21:05,319 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,326 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,342 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:21:05,342 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:203, output treesize:107 [2018-02-04 19:21:05,346 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 70 [2018-02-04 19:21:05,348 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:05,348 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,356 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,379 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 60 [2018-02-04 19:21:05,381 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:05,381 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,388 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,410 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:21:05,410 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:147, output treesize:119 [2018-02-04 19:21:05,520 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-02-04 19:21:05,520 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,523 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,523 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:18, output treesize:13 [2018-02-04 19:21:05,690 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:05,693 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:05,693 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 73 [2018-02-04 19:21:05,694 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,727 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:05,728 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:05,728 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 73 [2018-02-04 19:21:05,729 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,757 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 59 [2018-02-04 19:21:05,767 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:05,768 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:05,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-02-04 19:21:05,769 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,779 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,804 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 59 [2018-02-04 19:21:05,807 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:05,808 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-02-04 19:21:05,808 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,826 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:05,860 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:21:05,861 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:145, output treesize:121 [2018-02-04 19:21:07,188 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 80 [2018-02-04 19:21:07,188 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:07,223 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 76 [2018-02-04 19:21:07,223 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:07,255 INFO L267 ElimStorePlain]: Start of recursive call 1: 8 dim-0 vars, 2 dim-1 vars, End of recursive call: 8 dim-0 vars, and 4 xjuncts. [2018-02-04 19:21:07,256 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 10 variables, input treesize:313, output treesize:303 [2018-02-04 19:21:07,642 WARN L146 SmtUtils]: Spent 100ms on a formula simplification. DAG size of input: 276 DAG size of output 104 [2018-02-04 19:21:07,835 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 55 [2018-02-04 19:21:07,843 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 1 [2018-02-04 19:21:07,844 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:07,851 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 13 [2018-02-04 19:21:07,851 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:07,856 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:07,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 55 [2018-02-04 19:21:07,874 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:07,874 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-02-04 19:21:07,875 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:07,881 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 13 [2018-02-04 19:21:07,882 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:07,886 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:07,899 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:21:07,899 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 2 variables, input treesize:135, output treesize:53 [2018-02-04 19:21:07,950 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:07,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 5 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 41 [2018-02-04 19:21:07,950 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:07,973 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:07,973 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 5 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 37 [2018-02-04 19:21:07,973 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:07,985 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 19:21:07,985 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:65, output treesize:55 [2018-02-04 19:21:08,044 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:08,045 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:08,045 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 36 [2018-02-04 19:21:08,045 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:08,051 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:21:08,052 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:33, output treesize:28 [2018-02-04 19:21:08,164 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 8 proven. 9 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-02-04 19:21:08,164 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:21:08,164 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50] total 50 [2018-02-04 19:21:08,164 INFO L409 AbstractCegarLoop]: Interpolant automaton has 51 states [2018-02-04 19:21:08,164 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2018-02-04 19:21:08,164 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=2407, Unknown=0, NotChecked=0, Total=2550 [2018-02-04 19:21:08,165 INFO L87 Difference]: Start difference. First operand 211 states and 219 transitions. Second operand 51 states. [2018-02-04 19:21:12,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:21:12,887 INFO L93 Difference]: Finished difference Result 218 states and 226 transitions. [2018-02-04 19:21:12,887 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2018-02-04 19:21:12,887 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 98 [2018-02-04 19:21:12,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:21:12,888 INFO L225 Difference]: With dead ends: 218 [2018-02-04 19:21:12,888 INFO L226 Difference]: Without dead ends: 218 [2018-02-04 19:21:12,889 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 49 SyntacticMatches, 1 SemanticMatches, 95 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2135 ImplicationChecksByTransitivity, 5.6s TimeCoverageRelationStatistics Valid=561, Invalid=8750, Unknown=1, NotChecked=0, Total=9312 [2018-02-04 19:21:12,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218 states. [2018-02-04 19:21:12,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218 to 212. [2018-02-04 19:21:12,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 212 states. [2018-02-04 19:21:12,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 220 transitions. [2018-02-04 19:21:12,891 INFO L78 Accepts]: Start accepts. Automaton has 212 states and 220 transitions. Word has length 98 [2018-02-04 19:21:12,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:21:12,891 INFO L432 AbstractCegarLoop]: Abstraction has 212 states and 220 transitions. [2018-02-04 19:21:12,891 INFO L433 AbstractCegarLoop]: Interpolant automaton has 51 states. [2018-02-04 19:21:12,891 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 220 transitions. [2018-02-04 19:21:12,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-02-04 19:21:12,892 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:21:12,892 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:21:12,892 INFO L371 AbstractCegarLoop]: === Iteration 65 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:21:12,892 INFO L82 PathProgramCache]: Analyzing trace with hash 181927512, now seen corresponding path program 1 times [2018-02-04 19:21:12,892 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:21:12,892 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:21:12,892 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:21:12,893 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:21:12,893 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:21:12,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:21:12,904 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:21:12,930 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:21:12,930 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:21:12,930 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:21:12,930 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:21:12,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:21:12,969 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:21:13,062 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 30 [2018-02-04 19:21:13,062 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,075 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-02-04 19:21:13,075 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,087 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:21:13,087 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:60, output treesize:58 [2018-02-04 19:21:13,158 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 73 [2018-02-04 19:21:13,160 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:13,160 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,170 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,172 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 73 [2018-02-04 19:21:13,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:13,173 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,184 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,186 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 73 [2018-02-04 19:21:13,187 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:13,187 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,197 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 73 [2018-02-04 19:21:13,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:13,200 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,210 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,251 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 69 [2018-02-04 19:21:13,252 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:13,253 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,262 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,264 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 69 [2018-02-04 19:21:13,265 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:13,265 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,275 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,277 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 69 [2018-02-04 19:21:13,278 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:13,278 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,287 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,336 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-02-04 19:21:13,336 INFO L202 ElimStorePlain]: Needed 15 recursive calls to eliminate 3 variables, input treesize:305, output treesize:232 [2018-02-04 19:21:13,564 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 101 [2018-02-04 19:21:13,565 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 19:21:13,565 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,576 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,621 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 101 [2018-02-04 19:21:13,622 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 19:21:13,622 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,636 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 101 [2018-02-04 19:21:13,683 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-02-04 19:21:13,683 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,695 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,739 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-02-04 19:21:13,740 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:316, output treesize:271 [2018-02-04 19:21:13,803 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:13,806 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 118 treesize of output 122 [2018-02-04 19:21:13,807 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 19:21:13,807 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,817 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,868 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:13,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 118 treesize of output 122 [2018-02-04 19:21:13,872 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 19:21:13,872 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,882 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,923 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:13,925 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 118 treesize of output 122 [2018-02-04 19:21:13,927 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1 [2018-02-04 19:21:13,927 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,936 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:13,980 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-02-04 19:21:13,980 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 6 variables, input treesize:355, output treesize:235 [2018-02-04 19:21:14,034 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,035 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 95 [2018-02-04 19:21:14,035 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,038 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,039 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 95 [2018-02-04 19:21:14,039 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,041 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,042 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 95 [2018-02-04 19:21:14,042 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,102 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,105 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 81 [2018-02-04 19:21:14,107 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:14,107 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,118 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,165 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,167 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 81 [2018-02-04 19:21:14,169 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:14,169 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,180 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,224 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,226 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 81 [2018-02-04 19:21:14,228 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:14,228 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,239 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,278 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-02-04 19:21:14,278 INFO L202 ElimStorePlain]: Needed 10 recursive calls to eliminate 4 variables, input treesize:295, output treesize:229 [2018-02-04 19:21:14,545 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,548 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 88 [2018-02-04 19:21:14,549 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,550 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,550 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-02-04 19:21:14,550 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,563 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,611 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,613 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 88 [2018-02-04 19:21:14,615 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,616 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-02-04 19:21:14,616 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,628 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,673 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,675 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 88 [2018-02-04 19:21:14,677 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,677 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,678 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-02-04 19:21:14,678 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,690 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,726 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-02-04 19:21:14,726 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:268, output treesize:256 [2018-02-04 19:21:14,830 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 95 [2018-02-04 19:21:14,848 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,849 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,849 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,850 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 49 [2018-02-04 19:21:14,850 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,857 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,887 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,888 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 101 [2018-02-04 19:21:14,908 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,909 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,909 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,910 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 49 [2018-02-04 19:21:14,910 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,917 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,944 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,945 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 95 [2018-02-04 19:21:14,965 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,965 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,966 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:14,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 49 [2018-02-04 19:21:14,966 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,973 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:14,998 INFO L267 ElimStorePlain]: Start of recursive call 1: 9 dim-0 vars, 3 dim-1 vars, End of recursive call: 9 dim-0 vars, and 3 xjuncts. [2018-02-04 19:21:14,998 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 12 variables, input treesize:268, output treesize:268 [2018-02-04 19:21:16,326 WARN L146 SmtUtils]: Spent 125ms on a formula simplification. DAG size of input: 336 DAG size of output 96 [2018-02-04 19:21:17,134 WARN L146 SmtUtils]: Spent 200ms on a formula simplification. DAG size of input: 657 DAG size of output 177 [2018-02-04 19:21:17,254 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:17,256 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 94 treesize of output 86 [2018-02-04 19:21:17,257 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:17,258 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:17,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 13 [2018-02-04 19:21:17,258 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:17,269 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 28 [2018-02-04 19:21:17,269 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:17,276 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:17,315 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:17,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 94 treesize of output 86 [2018-02-04 19:21:17,318 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:17,319 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:17,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 13 [2018-02-04 19:21:17,319 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:17,329 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 28 [2018-02-04 19:21:17,330 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:17,336 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:17,370 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:17,371 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 94 treesize of output 86 [2018-02-04 19:21:17,373 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 28 [2018-02-04 19:21:17,373 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:17,392 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:17,393 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-02-04 19:21:17,393 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:17,401 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:17,428 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-02-04 19:21:17,428 INFO L202 ElimStorePlain]: Needed 10 recursive calls to eliminate 3 variables, input treesize:283, output treesize:148 [2018-02-04 19:21:17,982 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-02-04 19:21:17,982 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:21:17,982 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [49] imperfect sequences [] total 49 [2018-02-04 19:21:17,982 INFO L409 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-02-04 19:21:17,983 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-02-04 19:21:17,983 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=157, Invalid=2293, Unknown=0, NotChecked=0, Total=2450 [2018-02-04 19:21:17,983 INFO L87 Difference]: Start difference. First operand 212 states and 220 transitions. Second operand 50 states. [2018-02-04 19:21:18,799 WARN L146 SmtUtils]: Spent 116ms on a formula simplification. DAG size of input: 54 DAG size of output 50 [2018-02-04 19:21:22,406 WARN L146 SmtUtils]: Spent 117ms on a formula simplification. DAG size of input: 118 DAG size of output 114 [2018-02-04 19:21:22,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:21:22,730 INFO L93 Difference]: Finished difference Result 219 states and 226 transitions. [2018-02-04 19:21:22,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-02-04 19:21:22,730 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 101 [2018-02-04 19:21:22,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:21:22,731 INFO L225 Difference]: With dead ends: 219 [2018-02-04 19:21:22,731 INFO L226 Difference]: Without dead ends: 167 [2018-02-04 19:21:22,731 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 51 SyntacticMatches, 1 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1832 ImplicationChecksByTransitivity, 6.0s TimeCoverageRelationStatistics Valid=433, Invalid=6539, Unknown=0, NotChecked=0, Total=6972 [2018-02-04 19:21:22,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-02-04 19:21:22,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 163. [2018-02-04 19:21:22,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-02-04 19:21:22,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 170 transitions. [2018-02-04 19:21:22,733 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 170 transitions. Word has length 101 [2018-02-04 19:21:22,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:21:22,733 INFO L432 AbstractCegarLoop]: Abstraction has 163 states and 170 transitions. [2018-02-04 19:21:22,733 INFO L433 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-02-04 19:21:22,733 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 170 transitions. [2018-02-04 19:21:22,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-02-04 19:21:22,734 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:21:22,734 INFO L351 BasicCegarLoop]: trace histogram [10, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:21:22,734 INFO L371 AbstractCegarLoop]: === Iteration 66 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:21:22,734 INFO L82 PathProgramCache]: Analyzing trace with hash -1137495774, now seen corresponding path program 1 times [2018-02-04 19:21:22,734 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:21:22,734 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:21:22,735 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:21:22,735 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:21:22,735 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:21:22,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:21:22,742 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:21:22,744 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:21:22,744 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:21:22,744 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:21:22,745 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:21:22,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:21:22,758 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:21:22,900 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:21:22,900 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:21:22,900 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16] total 16 [2018-02-04 19:21:22,900 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-04 19:21:22,901 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-04 19:21:22,901 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=211, Unknown=0, NotChecked=0, Total=240 [2018-02-04 19:21:22,901 INFO L87 Difference]: Start difference. First operand 163 states and 170 transitions. Second operand 16 states. [2018-02-04 19:21:23,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:21:23,094 INFO L93 Difference]: Finished difference Result 169 states and 176 transitions. [2018-02-04 19:21:23,094 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-02-04 19:21:23,094 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 102 [2018-02-04 19:21:23,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:21:23,094 INFO L225 Difference]: With dead ends: 169 [2018-02-04 19:21:23,094 INFO L226 Difference]: Without dead ends: 164 [2018-02-04 19:21:23,094 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=269, Unknown=0, NotChecked=0, Total=306 [2018-02-04 19:21:23,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-02-04 19:21:23,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 164. [2018-02-04 19:21:23,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-02-04 19:21:23,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 171 transitions. [2018-02-04 19:21:23,096 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 171 transitions. Word has length 102 [2018-02-04 19:21:23,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:21:23,096 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 171 transitions. [2018-02-04 19:21:23,096 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-04 19:21:23,096 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 171 transitions. [2018-02-04 19:21:23,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-02-04 19:21:23,096 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:21:23,096 INFO L351 BasicCegarLoop]: trace histogram [11, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:21:23,096 INFO L371 AbstractCegarLoop]: === Iteration 67 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:21:23,097 INFO L82 PathProgramCache]: Analyzing trace with hash -241899077, now seen corresponding path program 2 times [2018-02-04 19:21:23,097 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:21:23,097 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:21:23,097 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:21:23,097 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:21:23,097 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:21:23,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:21:23,105 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:21:23,109 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:21:23,109 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:21:23,109 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:21:23,109 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 19:21:23,118 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 19:21:23,119 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:21:23,120 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:21:23,160 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:23,160 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-02-04 19:21:23,160 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:23,161 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:21:23,161 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:5 [2018-02-04 19:21:23,199 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:23,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 10 [2018-02-04 19:21:23,199 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:23,205 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:23,206 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-02-04 19:21:23,206 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:23,209 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 19:21:23,210 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:16 [2018-02-04 19:21:23,263 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:23,264 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:23,264 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-04 19:21:23,265 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:23,270 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:21:23,271 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:21, output treesize:15 [2018-02-04 19:21:23,326 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-02-04 19:21:23,327 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:21:23,327 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-02-04 19:21:23,327 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-04 19:21:23,327 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-04 19:21:23,327 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2018-02-04 19:21:23,327 INFO L87 Difference]: Start difference. First operand 164 states and 171 transitions. Second operand 12 states. [2018-02-04 19:21:23,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:21:23,747 INFO L93 Difference]: Finished difference Result 217 states and 227 transitions. [2018-02-04 19:21:23,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-02-04 19:21:23,747 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 103 [2018-02-04 19:21:23,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:21:23,748 INFO L225 Difference]: With dead ends: 217 [2018-02-04 19:21:23,748 INFO L226 Difference]: Without dead ends: 217 [2018-02-04 19:21:23,748 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 90 SyntacticMatches, 3 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=164, Unknown=0, NotChecked=0, Total=210 [2018-02-04 19:21:23,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217 states. [2018-02-04 19:21:23,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217 to 186. [2018-02-04 19:21:23,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-02-04 19:21:23,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 203 transitions. [2018-02-04 19:21:23,751 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 203 transitions. Word has length 103 [2018-02-04 19:21:23,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:21:23,751 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 203 transitions. [2018-02-04 19:21:23,751 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-04 19:21:23,751 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 203 transitions. [2018-02-04 19:21:23,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-02-04 19:21:23,752 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:21:23,752 INFO L351 BasicCegarLoop]: trace histogram [11, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:21:23,752 INFO L371 AbstractCegarLoop]: === Iteration 68 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:21:23,752 INFO L82 PathProgramCache]: Analyzing trace with hash -241899076, now seen corresponding path program 1 times [2018-02-04 19:21:23,752 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:21:23,752 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:21:23,753 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:21:23,753 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:21:23,753 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:21:23,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:21:23,761 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:21:23,771 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:21:23,771 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:21:23,771 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:21:23,772 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:21:23,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:21:23,784 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:21:23,846 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-02-04 19:21:23,846 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:23,855 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 [2018-02-04 19:21:23,855 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:23,863 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2018-02-04 19:21:23,863 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:23,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-02-04 19:21:23,871 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:23,877 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-02-04 19:21:23,878 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:41, output treesize:29 [2018-02-04 19:21:23,927 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2018-02-04 19:21:23,928 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:23,936 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 [2018-02-04 19:21:23,936 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:23,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2018-02-04 19:21:23,944 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:23,951 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2018-02-04 19:21:23,951 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:23,957 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-02-04 19:21:23,957 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:41, output treesize:29 [2018-02-04 19:21:23,987 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:23,987 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:23,988 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 40 [2018-02-04 19:21:23,988 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:24,005 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 29 [2018-02-04 19:21:24,005 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:24,022 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:24,023 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:24,023 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 51 [2018-02-04 19:21:24,023 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:24,039 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:24,040 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:24,040 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 41 [2018-02-04 19:21:24,040 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:24,052 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-02-04 19:21:24,052 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:75, output treesize:57 [2018-02-04 19:21:24,112 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-02-04 19:21:24,112 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:21:24,112 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 19:21:24,112 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 19:21:24,113 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 19:21:24,113 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:21:24,113 INFO L87 Difference]: Start difference. First operand 186 states and 203 transitions. Second operand 7 states. [2018-02-04 19:21:24,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:21:24,612 INFO L93 Difference]: Finished difference Result 188 states and 204 transitions. [2018-02-04 19:21:24,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 19:21:24,612 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 103 [2018-02-04 19:21:24,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:21:24,613 INFO L225 Difference]: With dead ends: 188 [2018-02-04 19:21:24,613 INFO L226 Difference]: Without dead ends: 188 [2018-02-04 19:21:24,613 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2018-02-04 19:21:24,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-02-04 19:21:24,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 185. [2018-02-04 19:21:24,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-02-04 19:21:24,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 201 transitions. [2018-02-04 19:21:24,616 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 201 transitions. Word has length 103 [2018-02-04 19:21:24,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:21:24,616 INFO L432 AbstractCegarLoop]: Abstraction has 185 states and 201 transitions. [2018-02-04 19:21:24,616 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 19:21:24,616 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 201 transitions. [2018-02-04 19:21:24,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-02-04 19:21:24,616 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:21:24,617 INFO L351 BasicCegarLoop]: trace histogram [11, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:21:24,617 INFO L371 AbstractCegarLoop]: === Iteration 69 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:21:24,617 INFO L82 PathProgramCache]: Analyzing trace with hash 1091063280, now seen corresponding path program 1 times [2018-02-04 19:21:24,617 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:21:24,617 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:21:24,618 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:21:24,618 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:21:24,618 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:21:24,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:21:24,635 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:21:24,650 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:21:24,650 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:21:24,650 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:21:24,651 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:21:24,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:21:24,674 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:21:24,772 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-02-04 19:21:24,773 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:21:24,773 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17] total 17 [2018-02-04 19:21:24,773 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-02-04 19:21:24,773 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-02-04 19:21:24,773 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=241, Unknown=0, NotChecked=0, Total=272 [2018-02-04 19:21:24,773 INFO L87 Difference]: Start difference. First operand 185 states and 201 transitions. Second operand 17 states. [2018-02-04 19:21:24,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:21:24,908 INFO L93 Difference]: Finished difference Result 191 states and 207 transitions. [2018-02-04 19:21:24,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-02-04 19:21:24,908 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 104 [2018-02-04 19:21:24,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:21:24,909 INFO L225 Difference]: With dead ends: 191 [2018-02-04 19:21:24,909 INFO L226 Difference]: Without dead ends: 186 [2018-02-04 19:21:24,909 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=303, Unknown=0, NotChecked=0, Total=342 [2018-02-04 19:21:24,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-02-04 19:21:24,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 186. [2018-02-04 19:21:24,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-02-04 19:21:24,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 202 transitions. [2018-02-04 19:21:24,910 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 202 transitions. Word has length 104 [2018-02-04 19:21:24,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:21:24,910 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 202 transitions. [2018-02-04 19:21:24,911 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-02-04 19:21:24,911 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 202 transitions. [2018-02-04 19:21:24,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-02-04 19:21:24,911 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:21:24,911 INFO L351 BasicCegarLoop]: trace histogram [12, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:21:24,911 INFO L371 AbstractCegarLoop]: === Iteration 70 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-04 19:21:24,911 INFO L82 PathProgramCache]: Analyzing trace with hash -1528937399, now seen corresponding path program 2 times [2018-02-04 19:21:24,911 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:21:24,911 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:21:24,912 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:21:24,912 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:21:24,912 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:21:24,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:21:24,926 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:21:24,968 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:21:24,968 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:21:24,968 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:21:24,969 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 19:21:25,012 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 19:21:25,012 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:21:25,018 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:21:25,062 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 19:21:25,063 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,075 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 19:21:25,075 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,084 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:21:25,084 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 19:21:25,135 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:21:25,136 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:25,136 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,138 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,146 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:21:25,147 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:25,147 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,148 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,155 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,155 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:43, output treesize:32 [2018-02-04 19:21:25,171 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-02-04 19:21:25,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5 [2018-02-04 19:21:25,173 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,174 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,180 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,180 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:50, output treesize:35 [2018-02-04 19:21:25,208 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 38 treesize of output 48 [2018-02-04 19:21:25,210 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:25,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 30 [2018-02-04 19:21:25,212 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,227 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 19 [2018-02-04 19:21:25,227 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,233 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,239 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:21:25,239 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:54, output treesize:26 [2018-02-04 19:21:25,259 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:25,260 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:25,261 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 14 [2018-02-04 19:21:25,261 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,274 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:21:25,275 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:21:25,275 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,277 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,297 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 25 treesize of output 55 [2018-02-04 19:21:25,300 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:21:25,301 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 38 [2018-02-04 19:21:25,301 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,314 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-02-04 19:21:25,314 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,321 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,329 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:21:25,329 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:61, output treesize:47 Received shutdown request... [2018-02-04 19:21:29,698 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-02-04 19:21:29,698 WARN L491 AbstractCegarLoop]: Verification canceled [2018-02-04 19:21:29,701 WARN L185 ceAbstractionStarter]: Timeout [2018-02-04 19:21:29,701 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.02 07:21:29 BoogieIcfgContainer [2018-02-04 19:21:29,701 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-02-04 19:21:29,702 INFO L168 Benchmark]: Toolchain (without parser) took 180368.05 ms. Allocated memory was 396.9 MB in the beginning and 940.6 MB in the end (delta: 543.7 MB). Free memory was 353.8 MB in the beginning and 612.5 MB in the end (delta: -258.7 MB). Peak memory consumption was 285.0 MB. Max. memory is 5.3 GB. [2018-02-04 19:21:29,703 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 396.9 MB. Free memory is still 360.4 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-04 19:21:29,703 INFO L168 Benchmark]: CACSL2BoogieTranslator took 177.54 ms. Allocated memory is still 396.9 MB. Free memory was 353.8 MB in the beginning and 339.1 MB in the end (delta: 14.7 MB). Peak memory consumption was 14.7 MB. Max. memory is 5.3 GB. [2018-02-04 19:21:29,703 INFO L168 Benchmark]: Boogie Preprocessor took 29.88 ms. Allocated memory is still 396.9 MB. Free memory was 339.1 MB in the beginning and 336.4 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 5.3 GB. [2018-02-04 19:21:29,703 INFO L168 Benchmark]: RCFGBuilder took 390.97 ms. Allocated memory is still 396.9 MB. Free memory was 336.4 MB in the beginning and 294.1 MB in the end (delta: 42.3 MB). Peak memory consumption was 42.3 MB. Max. memory is 5.3 GB. [2018-02-04 19:21:29,704 INFO L168 Benchmark]: TraceAbstraction took 179763.28 ms. Allocated memory was 396.9 MB in the beginning and 940.6 MB in the end (delta: 543.7 MB). Free memory was 292.7 MB in the beginning and 612.5 MB in the end (delta: -319.7 MB). Peak memory consumption was 223.9 MB. Max. memory is 5.3 GB. [2018-02-04 19:21:29,705 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 396.9 MB. Free memory is still 360.4 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 177.54 ms. Allocated memory is still 396.9 MB. Free memory was 353.8 MB in the beginning and 339.1 MB in the end (delta: 14.7 MB). Peak memory consumption was 14.7 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 29.88 ms. Allocated memory is still 396.9 MB. Free memory was 339.1 MB in the beginning and 336.4 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 5.3 GB. * RCFGBuilder took 390.97 ms. Allocated memory is still 396.9 MB. Free memory was 336.4 MB in the beginning and 294.1 MB in the end (delta: 42.3 MB). Peak memory consumption was 42.3 MB. Max. memory is 5.3 GB. * TraceAbstraction took 179763.28 ms. Allocated memory was 396.9 MB in the beginning and 940.6 MB in the end (delta: 543.7 MB). Free memory was 292.7 MB in the beginning and 612.5 MB in the end (delta: -319.7 MB). Peak memory consumption was 223.9 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1463). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1479). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1463). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1479). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1198). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1198). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1193). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1193). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1533]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1533). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1526). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1513). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1513). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1524). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1517). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1524). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1514). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1528). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1524). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1526). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1528). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1514). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1517). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1524). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1454). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1455). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1456). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1456). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1454). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1455). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1484). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1484). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1490). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1490). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was analyzing trace of length 106 with TraceHistMax 12, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 17 procedures, 173 locations, 45 error locations. TIMEOUT Result, 179.7s OverallTime, 70 OverallIterations, 12 TraceHistogramMax, 107.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 9331 SDtfs, 6900 SDslu, 65805 SDs, 0 SdLazy, 61512 SolverSat, 2269 SolverUnsat, 85 SolverUnknown, 0 SolverNotchecked, 60.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 4475 GetRequests, 2771 SyntacticMatches, 67 SemanticMatches, 1637 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 16993 ImplicationChecksByTransitivity, 89.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=214occurred in iteration=53, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 69 MinimizatonAttempts, 710 StatesRemovedByMinimization, 42 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 1.8s SatisfiabilityAnalysisTime, 64.4s InterpolantComputationTime, 8146 NumberOfCodeBlocks, 8091 NumberOfCodeBlocksAsserted, 135 NumberOfCheckSat, 5249 ConstructedInterpolants, 580 QuantifiedInterpolants, 5620407 SizeOfPredicates, 680 NumberOfNonLiveVariables, 16592 ConjunctsInSsa, 2796 ConjunctsInUnsatCore, 84 InterpolantComputations, 32 PerfectInterpolantSequences, 1312/1802 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test15_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-04_19-21-29-710.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test15_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-04_19-21-29-710.csv Completed graceful shutdown