java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-c17473d-m [2018-02-04 19:28:09,457 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-04 19:28:09,458 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-04 19:28:09,469 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-04 19:28:09,469 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-04 19:28:09,470 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-04 19:28:09,471 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-04 19:28:09,473 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-04 19:28:09,474 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-04 19:28:09,475 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-04 19:28:09,475 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-04 19:28:09,476 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-04 19:28:09,476 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-04 19:28:09,477 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-04 19:28:09,478 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-04 19:28:09,480 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-04 19:28:09,481 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-04 19:28:09,483 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-04 19:28:09,484 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-04 19:28:09,485 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-04 19:28:09,486 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-02-04 19:28:09,486 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-02-04 19:28:09,487 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-02-04 19:28:09,487 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-02-04 19:28:09,488 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-02-04 19:28:09,489 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-02-04 19:28:09,489 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-02-04 19:28:09,490 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-02-04 19:28:09,490 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-02-04 19:28:09,490 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-04 19:28:09,491 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-04 19:28:09,491 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf [2018-02-04 19:28:09,501 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-04 19:28:09,501 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-04 19:28:09,502 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-04 19:28:09,502 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-04 19:28:09,502 INFO L133 SettingsManager]: * Use SBE=true [2018-02-04 19:28:09,503 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-04 19:28:09,503 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-04 19:28:09,503 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-04 19:28:09,503 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-04 19:28:09,503 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-04 19:28:09,503 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-04 19:28:09,504 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-04 19:28:09,504 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-04 19:28:09,504 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-04 19:28:09,504 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-04 19:28:09,504 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-04 19:28:09,504 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-04 19:28:09,505 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-04 19:28:09,505 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-04 19:28:09,505 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 19:28:09,505 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-04 19:28:09,505 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-02-04 19:28:09,505 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-02-04 19:28:09,506 INFO L133 SettingsManager]: * Trace refinement strategy=SMTINTERPOL [2018-02-04 19:28:09,535 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-04 19:28:09,545 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-04 19:28:09,548 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-04 19:28:09,549 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-04 19:28:09,550 INFO L276 PluginConnector]: CDTParser initialized [2018-02-04 19:28:09,550 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_true-valid-memsafety_true-termination.i [2018-02-04 19:28:09,696 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-04 19:28:09,697 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-04 19:28:09,698 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-04 19:28:09,698 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-04 19:28:09,704 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-04 19:28:09,705 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 07:28:09" (1/1) ... [2018-02-04 19:28:09,707 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@f13972f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:09, skipping insertion in model container [2018-02-04 19:28:09,708 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 07:28:09" (1/1) ... [2018-02-04 19:28:09,721 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 19:28:09,756 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 19:28:09,845 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 19:28:09,863 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 19:28:09,871 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:09 WrapperNode [2018-02-04 19:28:09,871 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-04 19:28:09,871 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-04 19:28:09,871 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-04 19:28:09,872 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-04 19:28:09,883 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:09" (1/1) ... [2018-02-04 19:28:09,884 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:09" (1/1) ... [2018-02-04 19:28:09,893 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:09" (1/1) ... [2018-02-04 19:28:09,893 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:09" (1/1) ... [2018-02-04 19:28:09,897 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:09" (1/1) ... [2018-02-04 19:28:09,899 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:09" (1/1) ... [2018-02-04 19:28:09,900 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:09" (1/1) ... [2018-02-04 19:28:09,902 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-04 19:28:09,902 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-04 19:28:09,902 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-04 19:28:09,902 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-04 19:28:09,903 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:09" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 19:28:09,936 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-04 19:28:09,936 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-04 19:28:09,936 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-02-04 19:28:09,936 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-02-04 19:28:09,936 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-02-04 19:28:09,936 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-02-04 19:28:09,936 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-02-04 19:28:09,936 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-02-04 19:28:09,937 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-02-04 19:28:09,937 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-02-04 19:28:09,937 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-02-04 19:28:09,937 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-02-04 19:28:09,937 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-02-04 19:28:09,937 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-02-04 19:28:09,937 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-02-04 19:28:09,937 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-02-04 19:28:09,937 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-04 19:28:09,937 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-02-04 19:28:09,937 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-02-04 19:28:09,937 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-02-04 19:28:09,937 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-02-04 19:28:09,938 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-02-04 19:28:09,938 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-02-04 19:28:09,938 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-02-04 19:28:09,938 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-02-04 19:28:09,938 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-02-04 19:28:09,938 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-02-04 19:28:09,938 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-02-04 19:28:09,938 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-02-04 19:28:09,938 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-02-04 19:28:09,938 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-02-04 19:28:09,938 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-02-04 19:28:09,938 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-02-04 19:28:09,938 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-02-04 19:28:09,939 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-02-04 19:28:09,939 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-02-04 19:28:09,939 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-02-04 19:28:09,939 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-02-04 19:28:09,939 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-02-04 19:28:09,939 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-02-04 19:28:09,939 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-02-04 19:28:09,939 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-02-04 19:28:09,939 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-02-04 19:28:09,939 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-02-04 19:28:09,939 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-04 19:28:09,939 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-04 19:28:09,939 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-04 19:28:10,121 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-02-04 19:28:10,239 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-04 19:28:10,239 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 07:28:10 BoogieIcfgContainer [2018-02-04 19:28:10,240 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-04 19:28:10,240 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-04 19:28:10,240 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-04 19:28:10,242 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-04 19:28:10,242 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 04.02 07:28:09" (1/3) ... [2018-02-04 19:28:10,243 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@28752d00 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 07:28:10, skipping insertion in model container [2018-02-04 19:28:10,243 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:09" (2/3) ... [2018-02-04 19:28:10,243 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@28752d00 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 07:28:10, skipping insertion in model container [2018-02-04 19:28:10,243 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 07:28:10" (3/3) ... [2018-02-04 19:28:10,244 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_1_true-valid-memsafety_true-termination.i [2018-02-04 19:28:10,249 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-02-04 19:28:10,254 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 19 error locations. [2018-02-04 19:28:10,277 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-04 19:28:10,277 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-04 19:28:10,277 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-02-04 19:28:10,277 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-02-04 19:28:10,277 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-04 19:28:10,277 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-04 19:28:10,277 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-04 19:28:10,277 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-04 19:28:10,278 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-04 19:28:10,287 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states. [2018-02-04 19:28:10,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-02-04 19:28:10,294 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:10,294 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:10,294 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:10,297 INFO L82 PathProgramCache]: Analyzing trace with hash -401333144, now seen corresponding path program 1 times [2018-02-04 19:28:10,298 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:10,298 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:10,332 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:10,332 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:10,332 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:10,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:10,370 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:10,515 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:10,517 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:10,517 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 19:28:10,520 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 19:28:10,531 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 19:28:10,532 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 19:28:10,533 INFO L87 Difference]: Start difference. First operand 118 states. Second operand 5 states. [2018-02-04 19:28:10,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:10,584 INFO L93 Difference]: Finished difference Result 124 states and 131 transitions. [2018-02-04 19:28:10,586 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 19:28:10,587 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-02-04 19:28:10,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:10,595 INFO L225 Difference]: With dead ends: 124 [2018-02-04 19:28:10,595 INFO L226 Difference]: Without dead ends: 121 [2018-02-04 19:28:10,596 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 19:28:10,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-02-04 19:28:10,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 119. [2018-02-04 19:28:10,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-02-04 19:28:10,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 126 transitions. [2018-02-04 19:28:10,627 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 126 transitions. Word has length 17 [2018-02-04 19:28:10,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:10,627 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 126 transitions. [2018-02-04 19:28:10,627 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 19:28:10,627 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 126 transitions. [2018-02-04 19:28:10,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-04 19:28:10,628 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:10,628 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:10,628 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:10,628 INFO L82 PathProgramCache]: Analyzing trace with hash 1306365930, now seen corresponding path program 1 times [2018-02-04 19:28:10,629 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:10,629 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:10,630 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:10,630 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:10,630 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:10,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:10,648 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:10,692 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:10,692 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:10,692 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 19:28:10,693 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 19:28:10,693 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 19:28:10,693 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 19:28:10,693 INFO L87 Difference]: Start difference. First operand 119 states and 126 transitions. Second operand 6 states. [2018-02-04 19:28:10,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:10,789 INFO L93 Difference]: Finished difference Result 120 states and 127 transitions. [2018-02-04 19:28:10,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 19:28:10,789 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-02-04 19:28:10,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:10,790 INFO L225 Difference]: With dead ends: 120 [2018-02-04 19:28:10,790 INFO L226 Difference]: Without dead ends: 120 [2018-02-04 19:28:10,791 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:28:10,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-02-04 19:28:10,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 118. [2018-02-04 19:28:10,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-02-04 19:28:10,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 125 transitions. [2018-02-04 19:28:10,799 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 125 transitions. Word has length 19 [2018-02-04 19:28:10,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:10,800 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 125 transitions. [2018-02-04 19:28:10,800 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 19:28:10,800 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 125 transitions. [2018-02-04 19:28:10,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-04 19:28:10,800 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:10,800 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:10,801 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:10,801 INFO L82 PathProgramCache]: Analyzing trace with hash 1306365931, now seen corresponding path program 1 times [2018-02-04 19:28:10,801 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:10,801 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:10,802 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:10,802 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:10,802 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:10,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:10,818 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:10,954 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:10,954 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:10,954 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 19:28:10,955 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 19:28:10,955 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 19:28:10,955 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:28:10,955 INFO L87 Difference]: Start difference. First operand 118 states and 125 transitions. Second operand 7 states. [2018-02-04 19:28:11,171 WARN L143 SmtUtils]: Spent 149ms on a formula simplification that was a NOOP. DAG size: 34 [2018-02-04 19:28:11,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:11,255 INFO L93 Difference]: Finished difference Result 119 states and 126 transitions. [2018-02-04 19:28:11,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 19:28:11,258 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-02-04 19:28:11,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:11,259 INFO L225 Difference]: With dead ends: 119 [2018-02-04 19:28:11,259 INFO L226 Difference]: Without dead ends: 119 [2018-02-04 19:28:11,259 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-02-04 19:28:11,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-02-04 19:28:11,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 117. [2018-02-04 19:28:11,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-02-04 19:28:11,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 124 transitions. [2018-02-04 19:28:11,267 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 124 transitions. Word has length 19 [2018-02-04 19:28:11,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:11,267 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 124 transitions. [2018-02-04 19:28:11,267 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 19:28:11,267 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 124 transitions. [2018-02-04 19:28:11,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-02-04 19:28:11,268 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:11,268 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:11,268 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:11,268 INFO L82 PathProgramCache]: Analyzing trace with hash -860603530, now seen corresponding path program 1 times [2018-02-04 19:28:11,268 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:11,268 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:11,269 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:11,269 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:11,270 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:11,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:11,287 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:11,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:11,332 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:11,332 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 19:28:11,332 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 19:28:11,333 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 19:28:11,333 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:28:11,333 INFO L87 Difference]: Start difference. First operand 117 states and 124 transitions. Second operand 7 states. [2018-02-04 19:28:11,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:11,377 INFO L93 Difference]: Finished difference Result 129 states and 136 transitions. [2018-02-04 19:28:11,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 19:28:11,379 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-02-04 19:28:11,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:11,380 INFO L225 Difference]: With dead ends: 129 [2018-02-04 19:28:11,380 INFO L226 Difference]: Without dead ends: 129 [2018-02-04 19:28:11,380 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-02-04 19:28:11,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-02-04 19:28:11,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 125. [2018-02-04 19:28:11,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-02-04 19:28:11,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 132 transitions. [2018-02-04 19:28:11,386 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 132 transitions. Word has length 29 [2018-02-04 19:28:11,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:11,386 INFO L432 AbstractCegarLoop]: Abstraction has 125 states and 132 transitions. [2018-02-04 19:28:11,386 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 19:28:11,386 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 132 transitions. [2018-02-04 19:28:11,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-02-04 19:28:11,386 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:11,386 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:11,387 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:11,387 INFO L82 PathProgramCache]: Analyzing trace with hash 23284980, now seen corresponding path program 1 times [2018-02-04 19:28:11,387 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:11,387 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:11,388 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:11,388 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:11,388 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:11,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:11,395 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:11,420 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:11,421 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:11,421 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-04 19:28:11,421 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-04 19:28:11,421 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-04 19:28:11,421 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 19:28:11,422 INFO L87 Difference]: Start difference. First operand 125 states and 132 transitions. Second operand 3 states. [2018-02-04 19:28:11,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:11,493 INFO L93 Difference]: Finished difference Result 140 states and 147 transitions. [2018-02-04 19:28:11,494 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-04 19:28:11,494 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2018-02-04 19:28:11,494 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:11,495 INFO L225 Difference]: With dead ends: 140 [2018-02-04 19:28:11,495 INFO L226 Difference]: Without dead ends: 129 [2018-02-04 19:28:11,496 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 19:28:11,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-02-04 19:28:11,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 121. [2018-02-04 19:28:11,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-02-04 19:28:11,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 127 transitions. [2018-02-04 19:28:11,510 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 127 transitions. Word has length 27 [2018-02-04 19:28:11,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:11,510 INFO L432 AbstractCegarLoop]: Abstraction has 121 states and 127 transitions. [2018-02-04 19:28:11,510 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-04 19:28:11,510 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 127 transitions. [2018-02-04 19:28:11,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-02-04 19:28:11,511 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:11,511 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:11,511 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:11,512 INFO L82 PathProgramCache]: Analyzing trace with hash -1295663626, now seen corresponding path program 1 times [2018-02-04 19:28:11,512 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:11,512 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:11,513 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:11,513 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:11,513 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:11,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:11,520 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:11,551 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:11,551 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:11,551 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 19:28:11,551 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 19:28:11,552 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 19:28:11,552 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 19:28:11,552 INFO L87 Difference]: Start difference. First operand 121 states and 127 transitions. Second operand 6 states. [2018-02-04 19:28:11,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:11,568 INFO L93 Difference]: Finished difference Result 113 states and 118 transitions. [2018-02-04 19:28:11,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 19:28:11,571 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 29 [2018-02-04 19:28:11,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:11,572 INFO L225 Difference]: With dead ends: 113 [2018-02-04 19:28:11,572 INFO L226 Difference]: Without dead ends: 113 [2018-02-04 19:28:11,572 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:28:11,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-02-04 19:28:11,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-02-04 19:28:11,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-02-04 19:28:11,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 118 transitions. [2018-02-04 19:28:11,577 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 118 transitions. Word has length 29 [2018-02-04 19:28:11,577 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:11,577 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 118 transitions. [2018-02-04 19:28:11,577 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 19:28:11,578 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 118 transitions. [2018-02-04 19:28:11,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-04 19:28:11,578 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:11,578 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:11,579 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:11,579 INFO L82 PathProgramCache]: Analyzing trace with hash 522747174, now seen corresponding path program 1 times [2018-02-04 19:28:11,579 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:11,579 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:11,580 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:11,580 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:11,580 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:11,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:11,591 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:11,617 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:11,617 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:11,617 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-04 19:28:11,617 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 19:28:11,618 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 19:28:11,618 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 19:28:11,618 INFO L87 Difference]: Start difference. First operand 113 states and 118 transitions. Second operand 4 states. [2018-02-04 19:28:11,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:11,634 INFO L93 Difference]: Finished difference Result 116 states and 121 transitions. [2018-02-04 19:28:11,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 19:28:11,634 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-02-04 19:28:11,635 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:11,635 INFO L225 Difference]: With dead ends: 116 [2018-02-04 19:28:11,635 INFO L226 Difference]: Without dead ends: 114 [2018-02-04 19:28:11,636 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 19:28:11,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-02-04 19:28:11,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2018-02-04 19:28:11,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-02-04 19:28:11,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 119 transitions. [2018-02-04 19:28:11,639 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 119 transitions. Word has length 34 [2018-02-04 19:28:11,639 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:11,639 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 119 transitions. [2018-02-04 19:28:11,639 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 19:28:11,639 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 119 transitions. [2018-02-04 19:28:11,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-02-04 19:28:11,639 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:11,639 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:11,639 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:11,640 INFO L82 PathProgramCache]: Analyzing trace with hash -1305776369, now seen corresponding path program 1 times [2018-02-04 19:28:11,640 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:11,640 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:11,640 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:11,640 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:11,640 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:11,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:11,651 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:11,676 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:11,676 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:11,677 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:11,677 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:11,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:11,706 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:11,732 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:11,732 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:11,732 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-02-04 19:28:11,732 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 19:28:11,733 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 19:28:11,733 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-02-04 19:28:11,733 INFO L87 Difference]: Start difference. First operand 114 states and 119 transitions. Second operand 6 states. [2018-02-04 19:28:11,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:11,753 INFO L93 Difference]: Finished difference Result 117 states and 122 transitions. [2018-02-04 19:28:11,753 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 19:28:11,753 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-02-04 19:28:11,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:11,754 INFO L225 Difference]: With dead ends: 117 [2018-02-04 19:28:11,754 INFO L226 Difference]: Without dead ends: 115 [2018-02-04 19:28:11,754 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:28:11,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-02-04 19:28:11,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-02-04 19:28:11,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-02-04 19:28:11,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 120 transitions. [2018-02-04 19:28:11,758 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 120 transitions. Word has length 35 [2018-02-04 19:28:11,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:11,758 INFO L432 AbstractCegarLoop]: Abstraction has 115 states and 120 transitions. [2018-02-04 19:28:11,758 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 19:28:11,758 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 120 transitions. [2018-02-04 19:28:11,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-04 19:28:11,759 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:11,759 INFO L351 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:11,759 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:11,760 INFO L82 PathProgramCache]: Analyzing trace with hash 2139535942, now seen corresponding path program 2 times [2018-02-04 19:28:11,760 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:11,760 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:11,761 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:11,761 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:11,761 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:11,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:11,774 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:11,804 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:11,805 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:11,805 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:11,806 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 19:28:11,830 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 19:28:11,830 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:28:11,834 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:11,865 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-02-04 19:28:11,866 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:11,875 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 19:28:11,875 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:11,882 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:28:11,882 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:30 [2018-02-04 19:28:12,087 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 19:28:12,087 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:28:12,088 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [6] total 20 [2018-02-04 19:28:12,088 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 19:28:12,088 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 19:28:12,088 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=329, Unknown=0, NotChecked=0, Total=380 [2018-02-04 19:28:12,088 INFO L87 Difference]: Start difference. First operand 115 states and 120 transitions. Second operand 20 states. [2018-02-04 19:28:12,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:12,591 INFO L93 Difference]: Finished difference Result 117 states and 122 transitions. [2018-02-04 19:28:12,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-02-04 19:28:12,591 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 36 [2018-02-04 19:28:12,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:12,592 INFO L225 Difference]: With dead ends: 117 [2018-02-04 19:28:12,592 INFO L226 Difference]: Without dead ends: 115 [2018-02-04 19:28:12,592 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=104, Invalid=708, Unknown=0, NotChecked=0, Total=812 [2018-02-04 19:28:12,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-02-04 19:28:12,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-02-04 19:28:12,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-02-04 19:28:12,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 120 transitions. [2018-02-04 19:28:12,596 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 120 transitions. Word has length 36 [2018-02-04 19:28:12,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:12,596 INFO L432 AbstractCegarLoop]: Abstraction has 115 states and 120 transitions. [2018-02-04 19:28:12,596 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 19:28:12,596 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 120 transitions. [2018-02-04 19:28:12,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-02-04 19:28:12,597 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:12,597 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:12,597 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:12,597 INFO L82 PathProgramCache]: Analyzing trace with hash 1570035182, now seen corresponding path program 1 times [2018-02-04 19:28:12,597 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:12,598 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:12,598 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:12,598 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:28:12,598 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:12,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:12,608 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:12,658 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-02-04 19:28:12,658 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:12,658 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 19:28:12,659 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 19:28:12,659 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 19:28:12,659 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 19:28:12,659 INFO L87 Difference]: Start difference. First operand 115 states and 120 transitions. Second operand 10 states. [2018-02-04 19:28:12,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:12,787 INFO L93 Difference]: Finished difference Result 114 states and 119 transitions. [2018-02-04 19:28:12,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 19:28:12,788 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 37 [2018-02-04 19:28:12,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:12,789 INFO L225 Difference]: With dead ends: 114 [2018-02-04 19:28:12,789 INFO L226 Difference]: Without dead ends: 114 [2018-02-04 19:28:12,789 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 19:28:12,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-02-04 19:28:12,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2018-02-04 19:28:12,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-02-04 19:28:12,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 119 transitions. [2018-02-04 19:28:12,791 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 119 transitions. Word has length 37 [2018-02-04 19:28:12,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:12,792 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 119 transitions. [2018-02-04 19:28:12,792 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 19:28:12,792 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 119 transitions. [2018-02-04 19:28:12,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-04 19:28:12,792 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:12,793 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:12,793 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:12,793 INFO L82 PathProgramCache]: Analyzing trace with hash 258949559, now seen corresponding path program 1 times [2018-02-04 19:28:12,793 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:12,793 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:12,794 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:12,794 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:12,794 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:12,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:12,804 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:12,857 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-02-04 19:28:12,857 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:12,857 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 19:28:12,857 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 19:28:12,857 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 19:28:12,857 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 19:28:12,858 INFO L87 Difference]: Start difference. First operand 114 states and 119 transitions. Second operand 10 states. [2018-02-04 19:28:12,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:12,982 INFO L93 Difference]: Finished difference Result 112 states and 117 transitions. [2018-02-04 19:28:12,982 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 19:28:12,982 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-02-04 19:28:12,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:12,983 INFO L225 Difference]: With dead ends: 112 [2018-02-04 19:28:12,983 INFO L226 Difference]: Without dead ends: 112 [2018-02-04 19:28:12,983 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 19:28:12,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-02-04 19:28:12,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2018-02-04 19:28:12,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-02-04 19:28:12,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 117 transitions. [2018-02-04 19:28:12,986 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 117 transitions. Word has length 42 [2018-02-04 19:28:12,986 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:12,986 INFO L432 AbstractCegarLoop]: Abstraction has 112 states and 117 transitions. [2018-02-04 19:28:12,986 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 19:28:12,986 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 117 transitions. [2018-02-04 19:28:12,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-04 19:28:12,987 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:12,987 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:12,987 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:12,987 INFO L82 PathProgramCache]: Analyzing trace with hash 258949560, now seen corresponding path program 1 times [2018-02-04 19:28:12,987 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:12,987 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:12,988 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:12,988 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:12,988 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:12,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:12,997 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:13,030 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:13,031 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:13,031 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:13,031 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:13,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:13,044 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:13,053 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:13,054 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:13,054 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-02-04 19:28:13,054 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 19:28:13,054 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 19:28:13,055 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-02-04 19:28:13,055 INFO L87 Difference]: Start difference. First operand 112 states and 117 transitions. Second operand 8 states. [2018-02-04 19:28:13,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:13,070 INFO L93 Difference]: Finished difference Result 115 states and 120 transitions. [2018-02-04 19:28:13,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 19:28:13,070 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-02-04 19:28:13,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:13,071 INFO L225 Difference]: With dead ends: 115 [2018-02-04 19:28:13,071 INFO L226 Difference]: Without dead ends: 113 [2018-02-04 19:28:13,071 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-02-04 19:28:13,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-02-04 19:28:13,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-02-04 19:28:13,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-02-04 19:28:13,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 118 transitions. [2018-02-04 19:28:13,074 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 118 transitions. Word has length 42 [2018-02-04 19:28:13,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:13,074 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 118 transitions. [2018-02-04 19:28:13,074 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 19:28:13,074 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 118 transitions. [2018-02-04 19:28:13,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-02-04 19:28:13,075 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:13,075 INFO L351 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:13,075 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:13,075 INFO L82 PathProgramCache]: Analyzing trace with hash -549832031, now seen corresponding path program 2 times [2018-02-04 19:28:13,075 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:13,075 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:13,076 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:13,076 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:13,076 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:13,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:13,085 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:13,121 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:13,122 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:13,122 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:13,123 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 19:28:13,144 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 19:28:13,144 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:28:13,149 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:13,164 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 19:28:13,164 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:13,196 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 19:28:13,196 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:13,207 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:28:13,207 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 19:28:13,456 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-04 19:28:13,457 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:28:13,457 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-02-04 19:28:13,457 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-04 19:28:13,458 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-04 19:28:13,458 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=400, Unknown=0, NotChecked=0, Total=462 [2018-02-04 19:28:13,458 INFO L87 Difference]: Start difference. First operand 113 states and 118 transitions. Second operand 22 states. [2018-02-04 19:28:13,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:13,926 INFO L93 Difference]: Finished difference Result 114 states and 119 transitions. [2018-02-04 19:28:13,927 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 19:28:13,927 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 43 [2018-02-04 19:28:13,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:13,927 INFO L225 Difference]: With dead ends: 114 [2018-02-04 19:28:13,927 INFO L226 Difference]: Without dead ends: 112 [2018-02-04 19:28:13,928 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 28 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=139, Invalid=917, Unknown=0, NotChecked=0, Total=1056 [2018-02-04 19:28:13,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-02-04 19:28:13,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2018-02-04 19:28:13,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-02-04 19:28:13,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 117 transitions. [2018-02-04 19:28:13,930 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 117 transitions. Word has length 43 [2018-02-04 19:28:13,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:13,930 INFO L432 AbstractCegarLoop]: Abstraction has 112 states and 117 transitions. [2018-02-04 19:28:13,930 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-04 19:28:13,930 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 117 transitions. [2018-02-04 19:28:13,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-02-04 19:28:13,930 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:13,930 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:13,931 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:13,931 INFO L82 PathProgramCache]: Analyzing trace with hash -2038388811, now seen corresponding path program 1 times [2018-02-04 19:28:13,931 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:13,931 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:13,932 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:13,932 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:28:13,932 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:13,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:13,938 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:13,969 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 19:28:13,969 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:13,969 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-02-04 19:28:13,970 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 19:28:13,970 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 19:28:13,970 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-04 19:28:13,970 INFO L87 Difference]: Start difference. First operand 112 states and 117 transitions. Second operand 8 states. [2018-02-04 19:28:14,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:14,003 INFO L93 Difference]: Finished difference Result 114 states and 118 transitions. [2018-02-04 19:28:14,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 19:28:14,003 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 49 [2018-02-04 19:28:14,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:14,004 INFO L225 Difference]: With dead ends: 114 [2018-02-04 19:28:14,004 INFO L226 Difference]: Without dead ends: 112 [2018-02-04 19:28:14,004 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-02-04 19:28:14,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-02-04 19:28:14,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2018-02-04 19:28:14,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-02-04 19:28:14,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 116 transitions. [2018-02-04 19:28:14,007 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 116 transitions. Word has length 49 [2018-02-04 19:28:14,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:14,007 INFO L432 AbstractCegarLoop]: Abstraction has 112 states and 116 transitions. [2018-02-04 19:28:14,007 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 19:28:14,007 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 116 transitions. [2018-02-04 19:28:14,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-02-04 19:28:14,008 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:14,008 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:14,008 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:14,008 INFO L82 PathProgramCache]: Analyzing trace with hash 2077653417, now seen corresponding path program 1 times [2018-02-04 19:28:14,008 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:14,008 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:14,009 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:14,009 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:14,009 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:14,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:14,017 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:14,065 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 19:28:14,065 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:14,065 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-02-04 19:28:14,065 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 19:28:14,066 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 19:28:14,066 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 19:28:14,066 INFO L87 Difference]: Start difference. First operand 112 states and 116 transitions. Second operand 10 states. [2018-02-04 19:28:14,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:14,102 INFO L93 Difference]: Finished difference Result 116 states and 119 transitions. [2018-02-04 19:28:14,103 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 19:28:14,103 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 54 [2018-02-04 19:28:14,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:14,103 INFO L225 Difference]: With dead ends: 116 [2018-02-04 19:28:14,103 INFO L226 Difference]: Without dead ends: 112 [2018-02-04 19:28:14,104 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 19:28:14,104 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-02-04 19:28:14,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2018-02-04 19:28:14,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-02-04 19:28:14,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 115 transitions. [2018-02-04 19:28:14,107 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 115 transitions. Word has length 54 [2018-02-04 19:28:14,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:14,107 INFO L432 AbstractCegarLoop]: Abstraction has 112 states and 115 transitions. [2018-02-04 19:28:14,107 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 19:28:14,107 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 115 transitions. [2018-02-04 19:28:14,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-04 19:28:14,107 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:14,107 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:14,107 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:14,108 INFO L82 PathProgramCache]: Analyzing trace with hash -154764032, now seen corresponding path program 1 times [2018-02-04 19:28:14,108 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:14,108 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:14,108 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:14,108 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:14,109 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:14,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:14,117 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:14,308 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 19:28:14,309 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:14,309 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2018-02-04 19:28:14,309 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-02-04 19:28:14,309 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-02-04 19:28:14,309 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=379, Unknown=0, NotChecked=0, Total=420 [2018-02-04 19:28:14,309 INFO L87 Difference]: Start difference. First operand 112 states and 115 transitions. Second operand 21 states. [2018-02-04 19:28:14,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:14,597 INFO L93 Difference]: Finished difference Result 119 states and 122 transitions. [2018-02-04 19:28:14,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-02-04 19:28:14,597 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 65 [2018-02-04 19:28:14,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:14,598 INFO L225 Difference]: With dead ends: 119 [2018-02-04 19:28:14,598 INFO L226 Difference]: Without dead ends: 119 [2018-02-04 19:28:14,598 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=69, Invalid=687, Unknown=0, NotChecked=0, Total=756 [2018-02-04 19:28:14,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-02-04 19:28:14,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 110. [2018-02-04 19:28:14,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-02-04 19:28:14,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 113 transitions. [2018-02-04 19:28:14,601 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 113 transitions. Word has length 65 [2018-02-04 19:28:14,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:14,602 INFO L432 AbstractCegarLoop]: Abstraction has 110 states and 113 transitions. [2018-02-04 19:28:14,602 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-02-04 19:28:14,602 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 113 transitions. [2018-02-04 19:28:14,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-04 19:28:14,602 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:14,602 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:14,603 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:14,603 INFO L82 PathProgramCache]: Analyzing trace with hash -154764031, now seen corresponding path program 1 times [2018-02-04 19:28:14,603 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:14,603 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:14,604 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:14,604 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:14,604 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:14,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:14,617 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:14,662 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:14,662 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:14,662 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:14,663 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:14,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:14,688 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:14,708 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:14,708 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:14,708 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-02-04 19:28:14,708 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 19:28:14,709 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 19:28:14,709 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-02-04 19:28:14,709 INFO L87 Difference]: Start difference. First operand 110 states and 113 transitions. Second operand 10 states. [2018-02-04 19:28:14,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:14,731 INFO L93 Difference]: Finished difference Result 113 states and 116 transitions. [2018-02-04 19:28:14,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 19:28:14,731 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 65 [2018-02-04 19:28:14,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:14,732 INFO L225 Difference]: With dead ends: 113 [2018-02-04 19:28:14,732 INFO L226 Difference]: Without dead ends: 111 [2018-02-04 19:28:14,732 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-02-04 19:28:14,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-02-04 19:28:14,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2018-02-04 19:28:14,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-02-04 19:28:14,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 114 transitions. [2018-02-04 19:28:14,735 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 114 transitions. Word has length 65 [2018-02-04 19:28:14,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:14,735 INFO L432 AbstractCegarLoop]: Abstraction has 111 states and 114 transitions. [2018-02-04 19:28:14,735 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 19:28:14,735 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 114 transitions. [2018-02-04 19:28:14,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-02-04 19:28:14,736 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:14,736 INFO L351 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:14,736 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:14,736 INFO L82 PathProgramCache]: Analyzing trace with hash -477131272, now seen corresponding path program 2 times [2018-02-04 19:28:14,736 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:14,736 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:14,737 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:14,737 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:14,737 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:14,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:14,750 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:14,804 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:14,804 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:14,804 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:14,805 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 19:28:14,832 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 19:28:14,833 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:28:14,838 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:14,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 19:28:14,855 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:14,868 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 19:28:14,868 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:14,883 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:28:14,883 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 19:28:15,242 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-02-04 19:28:15,242 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:28:15,242 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [10] total 29 [2018-02-04 19:28:15,243 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-02-04 19:28:15,243 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-02-04 19:28:15,243 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=720, Unknown=0, NotChecked=0, Total=812 [2018-02-04 19:28:15,243 INFO L87 Difference]: Start difference. First operand 111 states and 114 transitions. Second operand 29 states. [2018-02-04 19:28:15,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:15,822 INFO L93 Difference]: Finished difference Result 112 states and 115 transitions. [2018-02-04 19:28:15,822 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-02-04 19:28:15,822 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 66 [2018-02-04 19:28:15,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:15,823 INFO L225 Difference]: With dead ends: 112 [2018-02-04 19:28:15,823 INFO L226 Difference]: Without dead ends: 110 [2018-02-04 19:28:15,824 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 295 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=212, Invalid=1680, Unknown=0, NotChecked=0, Total=1892 [2018-02-04 19:28:15,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-02-04 19:28:15,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2018-02-04 19:28:15,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-02-04 19:28:15,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 113 transitions. [2018-02-04 19:28:15,825 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 113 transitions. Word has length 66 [2018-02-04 19:28:15,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:15,825 INFO L432 AbstractCegarLoop]: Abstraction has 110 states and 113 transitions. [2018-02-04 19:28:15,826 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-02-04 19:28:15,826 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 113 transitions. [2018-02-04 19:28:15,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-04 19:28:15,826 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:15,826 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:15,826 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:15,826 INFO L82 PathProgramCache]: Analyzing trace with hash 1613283294, now seen corresponding path program 1 times [2018-02-04 19:28:15,826 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:15,827 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:15,827 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:15,827 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:28:15,827 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:15,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:15,837 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:15,901 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-02-04 19:28:15,901 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:15,901 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-02-04 19:28:15,901 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 19:28:15,902 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 19:28:15,902 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-02-04 19:28:15,902 INFO L87 Difference]: Start difference. First operand 110 states and 113 transitions. Second operand 11 states. [2018-02-04 19:28:15,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:15,953 INFO L93 Difference]: Finished difference Result 112 states and 114 transitions. [2018-02-04 19:28:15,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 19:28:15,953 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 65 [2018-02-04 19:28:15,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:15,954 INFO L225 Difference]: With dead ends: 112 [2018-02-04 19:28:15,954 INFO L226 Difference]: Without dead ends: 110 [2018-02-04 19:28:15,954 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-02-04 19:28:15,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-02-04 19:28:15,956 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2018-02-04 19:28:15,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-02-04 19:28:15,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 112 transitions. [2018-02-04 19:28:15,957 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 112 transitions. Word has length 65 [2018-02-04 19:28:15,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:15,957 INFO L432 AbstractCegarLoop]: Abstraction has 110 states and 112 transitions. [2018-02-04 19:28:15,957 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 19:28:15,957 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 112 transitions. [2018-02-04 19:28:15,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-02-04 19:28:15,958 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:15,958 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:15,958 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:15,958 INFO L82 PathProgramCache]: Analyzing trace with hash -1474253813, now seen corresponding path program 1 times [2018-02-04 19:28:15,959 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:15,959 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:15,959 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:15,959 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:15,960 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:15,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:15,973 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:16,260 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-02-04 19:28:16,260 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:16,260 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-02-04 19:28:16,261 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-02-04 19:28:16,261 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-02-04 19:28:16,261 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=507, Unknown=0, NotChecked=0, Total=552 [2018-02-04 19:28:16,261 INFO L87 Difference]: Start difference. First operand 110 states and 112 transitions. Second operand 24 states. [2018-02-04 19:28:16,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:16,628 INFO L93 Difference]: Finished difference Result 113 states and 115 transitions. [2018-02-04 19:28:16,628 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-02-04 19:28:16,629 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 81 [2018-02-04 19:28:16,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:16,629 INFO L225 Difference]: With dead ends: 113 [2018-02-04 19:28:16,630 INFO L226 Difference]: Without dead ends: 113 [2018-02-04 19:28:16,630 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=85, Invalid=1037, Unknown=0, NotChecked=0, Total=1122 [2018-02-04 19:28:16,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-02-04 19:28:16,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 108. [2018-02-04 19:28:16,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-02-04 19:28:16,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 110 transitions. [2018-02-04 19:28:16,632 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 110 transitions. Word has length 81 [2018-02-04 19:28:16,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:16,633 INFO L432 AbstractCegarLoop]: Abstraction has 108 states and 110 transitions. [2018-02-04 19:28:16,633 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-02-04 19:28:16,633 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 110 transitions. [2018-02-04 19:28:16,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-02-04 19:28:16,634 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:16,634 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:16,634 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:16,634 INFO L82 PathProgramCache]: Analyzing trace with hash -1474253812, now seen corresponding path program 1 times [2018-02-04 19:28:16,634 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:16,634 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:16,635 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:16,635 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:16,635 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:16,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:16,649 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:16,713 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:16,713 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:16,713 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:16,714 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:16,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:16,736 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:16,749 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:16,749 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:16,749 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-02-04 19:28:16,750 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-04 19:28:16,750 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-04 19:28:16,750 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-02-04 19:28:16,750 INFO L87 Difference]: Start difference. First operand 108 states and 110 transitions. Second operand 12 states. [2018-02-04 19:28:16,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:16,774 INFO L93 Difference]: Finished difference Result 111 states and 113 transitions. [2018-02-04 19:28:16,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 19:28:16,774 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 81 [2018-02-04 19:28:16,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:16,775 INFO L225 Difference]: With dead ends: 111 [2018-02-04 19:28:16,775 INFO L226 Difference]: Without dead ends: 109 [2018-02-04 19:28:16,776 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 81 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-02-04 19:28:16,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-02-04 19:28:16,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 109. [2018-02-04 19:28:16,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109 states. [2018-02-04 19:28:16,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 111 transitions. [2018-02-04 19:28:16,778 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 111 transitions. Word has length 81 [2018-02-04 19:28:16,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:16,778 INFO L432 AbstractCegarLoop]: Abstraction has 109 states and 111 transitions. [2018-02-04 19:28:16,778 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-04 19:28:16,778 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 111 transitions. [2018-02-04 19:28:16,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-02-04 19:28:16,779 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:16,779 INFO L351 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:16,779 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:16,779 INFO L82 PathProgramCache]: Analyzing trace with hash 1420750595, now seen corresponding path program 2 times [2018-02-04 19:28:16,780 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:16,780 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:16,780 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:16,780 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:16,781 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:16,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:16,794 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:16,875 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:16,875 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:16,875 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:16,876 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 19:28:16,904 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 19:28:16,904 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:28:16,909 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:16,924 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 19:28:16,924 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:16,939 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 19:28:16,940 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:16,951 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:28:16,952 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 19:28:17,437 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-02-04 19:28:17,438 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:28:17,438 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [12] total 35 [2018-02-04 19:28:17,438 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-02-04 19:28:17,438 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-02-04 19:28:17,438 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=123, Invalid=1067, Unknown=0, NotChecked=0, Total=1190 [2018-02-04 19:28:17,439 INFO L87 Difference]: Start difference. First operand 109 states and 111 transitions. Second operand 35 states. [2018-02-04 19:28:18,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:18,225 INFO L93 Difference]: Finished difference Result 110 states and 112 transitions. [2018-02-04 19:28:18,225 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-02-04 19:28:18,225 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 82 [2018-02-04 19:28:18,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:18,226 INFO L225 Difference]: With dead ends: 110 [2018-02-04 19:28:18,226 INFO L226 Difference]: Without dead ends: 108 [2018-02-04 19:28:18,227 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 57 SyntacticMatches, 3 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 485 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=293, Invalid=2569, Unknown=0, NotChecked=0, Total=2862 [2018-02-04 19:28:18,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2018-02-04 19:28:18,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 108. [2018-02-04 19:28:18,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-02-04 19:28:18,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 110 transitions. [2018-02-04 19:28:18,229 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 110 transitions. Word has length 82 [2018-02-04 19:28:18,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:18,229 INFO L432 AbstractCegarLoop]: Abstraction has 108 states and 110 transitions. [2018-02-04 19:28:18,229 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-02-04 19:28:18,229 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 110 transitions. [2018-02-04 19:28:18,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-02-04 19:28:18,230 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:18,230 INFO L351 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:18,230 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:18,230 INFO L82 PathProgramCache]: Analyzing trace with hash -1218395795, now seen corresponding path program 1 times [2018-02-04 19:28:18,230 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:18,230 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:18,231 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:18,231 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:28:18,231 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:18,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:18,241 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:18,331 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:18,331 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:18,331 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:18,332 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:18,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:18,354 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:18,376 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:18,376 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:18,377 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-02-04 19:28:18,377 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-02-04 19:28:18,377 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-02-04 19:28:18,377 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-02-04 19:28:18,377 INFO L87 Difference]: Start difference. First operand 108 states and 110 transitions. Second operand 14 states. [2018-02-04 19:28:18,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:18,412 INFO L93 Difference]: Finished difference Result 111 states and 113 transitions. [2018-02-04 19:28:18,413 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-04 19:28:18,413 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 87 [2018-02-04 19:28:18,413 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:18,413 INFO L225 Difference]: With dead ends: 111 [2018-02-04 19:28:18,413 INFO L226 Difference]: Without dead ends: 109 [2018-02-04 19:28:18,414 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-02-04 19:28:18,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-02-04 19:28:18,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 109. [2018-02-04 19:28:18,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109 states. [2018-02-04 19:28:18,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 111 transitions. [2018-02-04 19:28:18,416 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 111 transitions. Word has length 87 [2018-02-04 19:28:18,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:18,417 INFO L432 AbstractCegarLoop]: Abstraction has 109 states and 111 transitions. [2018-02-04 19:28:18,417 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-02-04 19:28:18,417 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 111 transitions. [2018-02-04 19:28:18,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-02-04 19:28:18,417 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:18,417 INFO L351 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:18,418 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:18,418 INFO L82 PathProgramCache]: Analyzing trace with hash -1495748828, now seen corresponding path program 2 times [2018-02-04 19:28:18,418 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:18,418 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:18,419 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:18,419 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:18,419 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:18,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:18,433 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:18,529 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:18,530 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:18,530 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:18,531 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 19:28:18,564 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 19:28:18,564 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:28:18,568 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:18,581 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:18,581 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:18,581 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2018-02-04 19:28:18,582 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-04 19:28:18,582 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-04 19:28:18,582 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-02-04 19:28:18,582 INFO L87 Difference]: Start difference. First operand 109 states and 111 transitions. Second operand 15 states. [2018-02-04 19:28:18,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:18,611 INFO L93 Difference]: Finished difference Result 112 states and 114 transitions. [2018-02-04 19:28:18,611 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-02-04 19:28:18,612 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 88 [2018-02-04 19:28:18,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:18,612 INFO L225 Difference]: With dead ends: 112 [2018-02-04 19:28:18,612 INFO L226 Difference]: Without dead ends: 110 [2018-02-04 19:28:18,613 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=97, Invalid=143, Unknown=0, NotChecked=0, Total=240 [2018-02-04 19:28:18,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-02-04 19:28:18,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2018-02-04 19:28:18,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-02-04 19:28:18,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 112 transitions. [2018-02-04 19:28:18,615 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 112 transitions. Word has length 88 [2018-02-04 19:28:18,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:18,616 INFO L432 AbstractCegarLoop]: Abstraction has 110 states and 112 transitions. [2018-02-04 19:28:18,616 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-04 19:28:18,616 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 112 transitions. [2018-02-04 19:28:18,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-02-04 19:28:18,616 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:18,617 INFO L351 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:18,617 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:18,617 INFO L82 PathProgramCache]: Analyzing trace with hash -1503758259, now seen corresponding path program 3 times [2018-02-04 19:28:18,617 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:18,617 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:18,618 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:18,618 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:28:18,618 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:18,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:18,635 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:18,748 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:18,748 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:18,748 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:18,749 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 19:28:18,792 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-02-04 19:28:18,793 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:28:18,797 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:18,810 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:18,810 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:18,810 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-02-04 19:28:18,811 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-04 19:28:18,811 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-04 19:28:18,811 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-02-04 19:28:18,811 INFO L87 Difference]: Start difference. First operand 110 states and 112 transitions. Second operand 16 states. [2018-02-04 19:28:18,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:18,838 INFO L93 Difference]: Finished difference Result 113 states and 115 transitions. [2018-02-04 19:28:18,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-04 19:28:18,840 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 89 [2018-02-04 19:28:18,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:18,840 INFO L225 Difference]: With dead ends: 113 [2018-02-04 19:28:18,840 INFO L226 Difference]: Without dead ends: 111 [2018-02-04 19:28:18,840 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 89 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-02-04 19:28:18,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-02-04 19:28:18,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2018-02-04 19:28:18,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-02-04 19:28:18,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 113 transitions. [2018-02-04 19:28:18,842 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 113 transitions. Word has length 89 [2018-02-04 19:28:18,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:18,842 INFO L432 AbstractCegarLoop]: Abstraction has 111 states and 113 transitions. [2018-02-04 19:28:18,842 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-04 19:28:18,842 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 113 transitions. [2018-02-04 19:28:18,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-02-04 19:28:18,842 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:18,842 INFO L351 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:18,842 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:18,842 INFO L82 PathProgramCache]: Analyzing trace with hash -1752050620, now seen corresponding path program 4 times [2018-02-04 19:28:18,842 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:18,842 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:18,843 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:18,843 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:28:18,843 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:18,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:18,852 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:18,968 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:18,969 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:18,969 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:18,969 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 19:28:19,000 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 19:28:19,000 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:28:19,004 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:19,027 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:19,027 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:19,027 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 17 [2018-02-04 19:28:19,028 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-02-04 19:28:19,028 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-02-04 19:28:19,028 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-02-04 19:28:19,028 INFO L87 Difference]: Start difference. First operand 111 states and 113 transitions. Second operand 17 states. [2018-02-04 19:28:19,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:19,059 INFO L93 Difference]: Finished difference Result 114 states and 116 transitions. [2018-02-04 19:28:19,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-02-04 19:28:19,059 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 90 [2018-02-04 19:28:19,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:19,060 INFO L225 Difference]: With dead ends: 114 [2018-02-04 19:28:19,060 INFO L226 Difference]: Without dead ends: 112 [2018-02-04 19:28:19,060 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 90 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=126, Invalid=180, Unknown=0, NotChecked=0, Total=306 [2018-02-04 19:28:19,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-02-04 19:28:19,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2018-02-04 19:28:19,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-02-04 19:28:19,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 114 transitions. [2018-02-04 19:28:19,063 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 114 transitions. Word has length 90 [2018-02-04 19:28:19,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:19,063 INFO L432 AbstractCegarLoop]: Abstraction has 112 states and 114 transitions. [2018-02-04 19:28:19,063 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-02-04 19:28:19,063 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 114 transitions. [2018-02-04 19:28:19,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-02-04 19:28:19,064 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:19,064 INFO L351 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:19,064 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:19,064 INFO L82 PathProgramCache]: Analyzing trace with hash -859179219, now seen corresponding path program 5 times [2018-02-04 19:28:19,064 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:19,064 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:19,065 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:19,065 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:28:19,065 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:19,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:19,079 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:19,225 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:19,225 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:19,225 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:19,226 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 19:28:19,253 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2018-02-04 19:28:19,253 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:28:19,257 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:19,270 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:19,270 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:19,270 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-02-04 19:28:19,271 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-02-04 19:28:19,271 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-02-04 19:28:19,271 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-02-04 19:28:19,271 INFO L87 Difference]: Start difference. First operand 112 states and 114 transitions. Second operand 18 states. [2018-02-04 19:28:19,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:19,307 INFO L93 Difference]: Finished difference Result 115 states and 117 transitions. [2018-02-04 19:28:19,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-02-04 19:28:19,307 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 91 [2018-02-04 19:28:19,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:19,308 INFO L225 Difference]: With dead ends: 115 [2018-02-04 19:28:19,308 INFO L226 Difference]: Without dead ends: 113 [2018-02-04 19:28:19,308 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-02-04 19:28:19,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-02-04 19:28:19,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-02-04 19:28:19,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-02-04 19:28:19,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 115 transitions. [2018-02-04 19:28:19,311 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 115 transitions. Word has length 91 [2018-02-04 19:28:19,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:19,312 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 115 transitions. [2018-02-04 19:28:19,312 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-02-04 19:28:19,312 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 115 transitions. [2018-02-04 19:28:19,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-02-04 19:28:19,312 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:19,312 INFO L351 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:19,313 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:19,313 INFO L82 PathProgramCache]: Analyzing trace with hash 1050030436, now seen corresponding path program 6 times [2018-02-04 19:28:19,313 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:19,313 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:19,314 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:19,314 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:28:19,314 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:19,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:19,330 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:19,467 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:19,467 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:19,467 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:19,468 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-04 19:28:19,515 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-02-04 19:28:19,515 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:28:19,520 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:19,533 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:19,533 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:19,533 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-02-04 19:28:19,534 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-04 19:28:19,534 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-04 19:28:19,534 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-02-04 19:28:19,534 INFO L87 Difference]: Start difference. First operand 113 states and 115 transitions. Second operand 19 states. [2018-02-04 19:28:19,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:19,571 INFO L93 Difference]: Finished difference Result 116 states and 118 transitions. [2018-02-04 19:28:19,572 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-04 19:28:19,572 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 92 [2018-02-04 19:28:19,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:19,572 INFO L225 Difference]: With dead ends: 116 [2018-02-04 19:28:19,572 INFO L226 Difference]: Without dead ends: 114 [2018-02-04 19:28:19,573 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 92 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-02-04 19:28:19,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-02-04 19:28:19,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2018-02-04 19:28:19,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-02-04 19:28:19,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 116 transitions. [2018-02-04 19:28:19,575 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 116 transitions. Word has length 92 [2018-02-04 19:28:19,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:19,575 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 116 transitions. [2018-02-04 19:28:19,575 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-04 19:28:19,575 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 116 transitions. [2018-02-04 19:28:19,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-02-04 19:28:19,576 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:19,576 INFO L351 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:19,576 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:19,576 INFO L82 PathProgramCache]: Analyzing trace with hash 105987597, now seen corresponding path program 7 times [2018-02-04 19:28:19,576 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:19,577 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:19,577 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:19,577 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:28:19,577 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:19,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:19,595 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:19,751 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:19,751 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:19,751 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:19,752 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:19,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:19,777 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:19,790 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:19,790 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:19,790 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20 [2018-02-04 19:28:19,791 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 19:28:19,791 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 19:28:19,791 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=207, Unknown=0, NotChecked=0, Total=380 [2018-02-04 19:28:19,791 INFO L87 Difference]: Start difference. First operand 114 states and 116 transitions. Second operand 20 states. [2018-02-04 19:28:19,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:19,822 INFO L93 Difference]: Finished difference Result 117 states and 119 transitions. [2018-02-04 19:28:19,822 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 19:28:19,822 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 93 [2018-02-04 19:28:19,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:19,823 INFO L225 Difference]: With dead ends: 117 [2018-02-04 19:28:19,823 INFO L226 Difference]: Without dead ends: 115 [2018-02-04 19:28:19,823 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=177, Invalid=243, Unknown=0, NotChecked=0, Total=420 [2018-02-04 19:28:19,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-02-04 19:28:19,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-02-04 19:28:19,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-02-04 19:28:19,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 117 transitions. [2018-02-04 19:28:19,826 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 117 transitions. Word has length 93 [2018-02-04 19:28:19,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:19,826 INFO L432 AbstractCegarLoop]: Abstraction has 115 states and 117 transitions. [2018-02-04 19:28:19,826 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 19:28:19,826 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 117 transitions. [2018-02-04 19:28:19,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-02-04 19:28:19,826 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:19,827 INFO L351 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:19,827 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:19,827 INFO L82 PathProgramCache]: Analyzing trace with hash 905430660, now seen corresponding path program 8 times [2018-02-04 19:28:19,827 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:19,827 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:19,828 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:19,828 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:19,828 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:19,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:19,871 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:19,886 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:28:19,886 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:19,886 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:19,887 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 19:28:19,949 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 19:28:19,949 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:28:19,956 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:19,985 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:28:19,986 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:28:19,987 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:19,988 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:19,991 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:19,992 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-02-04 19:28:20,006 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-02-04 19:28:20,009 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,011 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-02-04 19:28:20,012 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:20,016 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:20,021 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:20,021 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-02-04 19:28:20,038 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-02-04 19:28:20,041 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,043 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 38 [2018-02-04 19:28:20,043 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:20,050 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:20,058 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:20,058 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:40 [2018-02-04 19:28:20,090 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-02-04 19:28:20,098 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,100 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 49 [2018-02-04 19:28:20,101 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:20,109 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:20,121 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:20,121 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:60, output treesize:56 [2018-02-04 19:28:20,158 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 48 [2018-02-04 19:28:20,168 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 61 [2018-02-04 19:28:20,174 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:20,184 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:20,199 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:20,199 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:72, output treesize:68 [2018-02-04 19:28:20,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 58 [2018-02-04 19:28:20,276 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,279 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 2 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 83 [2018-02-04 19:28:20,308 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:20,325 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:20,342 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:20,343 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:84, output treesize:80 [2018-02-04 19:28:20,476 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 68 [2018-02-04 19:28:20,483 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,489 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,503 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,510 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 4 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 115 [2018-02-04 19:28:20,514 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:20,534 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:20,547 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:20,547 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:96, output treesize:92 [2018-02-04 19:28:20,630 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 95 treesize of output 78 [2018-02-04 19:28:20,636 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,642 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,643 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,655 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,655 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,658 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,667 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,668 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 7 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 157 [2018-02-04 19:28:20,668 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:20,687 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:20,703 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:20,703 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:108, output treesize:104 [2018-02-04 19:28:20,752 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 107 treesize of output 88 [2018-02-04 19:28:20,755 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,761 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,762 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,763 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,769 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,770 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,771 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,810 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,822 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,823 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,824 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,826 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 11 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 209 [2018-02-04 19:28:20,826 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:20,859 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:20,875 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:20,875 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:120, output treesize:116 [2018-02-04 19:28:20,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 98 [2018-02-04 19:28:20,948 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,951 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,952 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,952 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,953 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,956 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,957 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,958 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,958 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,964 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,970 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,971 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,972 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,972 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,973 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,973 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:20,975 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 16 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 271 [2018-02-04 19:28:20,975 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:21,011 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:21,031 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:21,031 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:132, output treesize:128 [2018-02-04 19:28:21,131 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 131 treesize of output 108 [2018-02-04 19:28:21,142 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,145 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,146 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,147 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,147 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,148 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,151 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,152 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,152 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,153 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,154 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,160 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,169 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,170 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,171 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,171 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,172 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,172 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,173 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,174 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,174 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,175 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,176 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 22 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 108 treesize of output 343 [2018-02-04 19:28:21,177 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:21,227 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:21,249 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:21,250 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:144, output treesize:140 [2018-02-04 19:28:21,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 143 treesize of output 118 [2018-02-04 19:28:21,338 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,341 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,347 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,347 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,348 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,350 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,351 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,354 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,359 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,360 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,361 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,362 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,363 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,383 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,385 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,386 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,387 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,388 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,400 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,418 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,419 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,420 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,421 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,422 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,424 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,425 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,426 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,427 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,428 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,429 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 29 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 118 treesize of output 425 [2018-02-04 19:28:21,430 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:21,502 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:21,528 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:21,528 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:156, output treesize:152 [2018-02-04 19:28:21,679 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 155 treesize of output 128 [2018-02-04 19:28:21,704 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,705 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,711 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,712 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,713 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,714 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,715 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,716 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,717 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,722 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,723 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,724 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,725 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,726 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,727 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,734 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,735 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,736 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,737 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,738 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,739 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,742 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,772 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,773 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,774 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,775 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,776 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,777 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,778 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,779 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,779 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,781 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,782 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,783 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,784 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,785 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,786 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,786 INFO L303 Elim1Store]: Index analysis took 106 ms [2018-02-04 19:28:21,787 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 37 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 517 [2018-02-04 19:28:21,788 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:21,852 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:21,877 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:21,878 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:168, output treesize:164 [2018-02-04 19:28:21,977 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 167 treesize of output 138 [2018-02-04 19:28:21,980 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,982 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,982 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,984 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,986 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,987 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,987 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,988 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,988 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,990 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,990 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,992 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,994 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,995 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,995 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,996 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:21,996 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,005 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,007 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,009 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,010 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,010 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,011 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,011 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,013 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,015 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,016 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,016 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,017 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,018 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,026 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,027 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,027 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,028 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,028 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,029 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,037 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,037 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,038 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,038 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,039 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,039 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,040 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,040 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,041 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,041 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,043 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 46 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 138 treesize of output 619 [2018-02-04 19:28:22,043 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:22,130 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:22,163 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:22,163 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:180, output treesize:176 [2018-02-04 19:28:22,278 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 179 treesize of output 148 [2018-02-04 19:28:22,283 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,285 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,286 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,287 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,288 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,296 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,297 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,298 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,299 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,301 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,303 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,305 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,306 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,307 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,314 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,315 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,316 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,317 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,318 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,339 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,340 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,341 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,348 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,349 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,351 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,352 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,353 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,354 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,355 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,362 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,363 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,364 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,365 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,367 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,368 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,374 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,375 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,376 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,377 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,377 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,384 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,385 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,385 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,386 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,387 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,398 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,414 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,416 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,417 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,418 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,419 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,420 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,421 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,422 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,423 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,424 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,424 INFO L303 Elim1Store]: Index analysis took 145 ms [2018-02-04 19:28:22,426 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 56 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 148 treesize of output 731 [2018-02-04 19:28:22,427 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:22,584 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:22,615 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:22,616 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:192, output treesize:188 [2018-02-04 19:28:22,800 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 190 treesize of output 157 [2018-02-04 19:28:22,834 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,835 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,837 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,839 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,840 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,841 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,842 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,845 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,847 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,848 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,849 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,850 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,851 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,854 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,855 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,856 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,857 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,859 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,861 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,862 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,863 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,864 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,866 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,867 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,868 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,869 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,872 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,874 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,875 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,876 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,879 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,880 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,880 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,881 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,885 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,888 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,889 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,890 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,909 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,910 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,911 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,913 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,916 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,917 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,918 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,919 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,920 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,923 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,926 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,927 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,928 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,930 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,933 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,936 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,938 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,939 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,946 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,947 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,948 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,951 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,960 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,962 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,963 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,968 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,969 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,970 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:22,970 INFO L303 Elim1Store]: Index analysis took 168 ms [2018-02-04 19:28:22,972 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 67 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 157 treesize of output 841 [2018-02-04 19:28:22,972 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:23,139 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:23,178 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:23,178 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:211, output treesize:207 [2018-02-04 19:28:25,713 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:25,715 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:25,716 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:25,717 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:27 [2018-02-04 19:28:25,718 WARN L1033 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_2 Int)) (= |c_#memory_$Pointer$.offset| (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base| (let ((.cse0 (+ |c_ldv_kobject_init_internal_#in~kobj.offset| 4))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base|) (+ |c_ldv_kobject_init_internal_#in~kobj.offset| 12) v_DerPreprocessor_2) .cse0 .cse0) (+ |c_ldv_kobject_init_internal_#in~kobj.offset| 8) .cse0))))) is different from true [2018-02-04 19:28:25,721 WARN L1033 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_2 Int)) (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base| (let ((.cse0 (+ |c_ldv_kobject_init_#in~kobj.offset| 4))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base|) (+ |c_ldv_kobject_init_#in~kobj.offset| 12) v_DerPreprocessor_2) .cse0 .cse0) (+ |c_ldv_kobject_init_#in~kobj.offset| 8) .cse0))) |c_#memory_$Pointer$.offset|)) is different from true [2018-02-04 19:28:25,734 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,735 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 152 treesize of output 130 [2018-02-04 19:28:25,739 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,739 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,740 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,741 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,741 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,742 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,743 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,743 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,744 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,744 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,745 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,746 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,746 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,747 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,748 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,748 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,749 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,749 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,750 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,751 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,751 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,752 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,752 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,753 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,754 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,754 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,755 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,756 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,756 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,757 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,757 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,758 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,759 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,759 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,760 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,760 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,761 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,762 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,762 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,763 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,764 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,764 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,765 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,766 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,766 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,767 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,767 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,768 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,769 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,769 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,770 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,770 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,771 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,772 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,773 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,774 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,774 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,775 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,776 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,776 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,777 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,777 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,778 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,779 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,779 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,780 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,781 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,782 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,783 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,783 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,784 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,784 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,785 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:28:25,785 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,786 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,787 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,787 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,788 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,789 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,789 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,790 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,790 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,791 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,791 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,792 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,793 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,793 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,794 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,795 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,795 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,796 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,797 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,797 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,798 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,799 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,799 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,801 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,801 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,802 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,802 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,803 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,803 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,804 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,805 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,805 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,806 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,807 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,807 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,808 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,809 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,809 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,810 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,811 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,811 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,812 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,813 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,813 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,814 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,815 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,815 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,816 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,816 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,817 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,818 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,819 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,819 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,820 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,821 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,822 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,823 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,823 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,824 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,824 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,825 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,825 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,826 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,827 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,827 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:28:25,839 INFO L303 Elim1Store]: Index analysis took 102 ms [2018-02-04 19:28:25,850 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 136 disjoint index pairs (out of 136 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 130 treesize of output 1088 [2018-02-04 19:28:25,868 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,869 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,870 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,870 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,871 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,872 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,873 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,873 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,874 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,875 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,875 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,876 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,877 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,877 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,878 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,879 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,880 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,880 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,881 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,882 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,883 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,883 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,884 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,885 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,885 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,886 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,903 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,904 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,905 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,906 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,907 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,909 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,910 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,911 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,912 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,913 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,914 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,915 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,916 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,917 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,918 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,919 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,920 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,921 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,921 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,922 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,923 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,924 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,925 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,926 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:28:25,927 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,928 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,929 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,930 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,931 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,932 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,933 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,934 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,935 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,936 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,938 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,939 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,940 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,941 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,941 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,942 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,944 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,945 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,946 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,947 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,948 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,949 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,950 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,951 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,952 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,952 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,953 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,954 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,955 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,956 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,957 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,958 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,959 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,960 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,961 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,962 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,963 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,964 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,965 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,966 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,967 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,968 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:25,970 INFO L303 Elim1Store]: Index analysis took 106 ms [2018-02-04 19:28:25,973 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 168 disjoint index pairs (out of 120 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1031 treesize of output 1060 [2018-02-04 19:28:26,274 WARN L146 SmtUtils]: Spent 296ms on a formula simplification. DAG size of input: 230 DAG size of output 147 [2018-02-04 19:28:26,284 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,285 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,285 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,286 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,287 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,288 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,289 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,290 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,291 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,292 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,292 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,293 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,293 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,294 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,294 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,295 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,295 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,296 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,296 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,297 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,297 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,298 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,299 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,299 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,300 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,300 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,301 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,301 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,302 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,302 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,303 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,303 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,304 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,304 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,305 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,305 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,306 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,306 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,307 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,307 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,308 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,308 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,309 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,309 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,310 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,311 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,311 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,312 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,312 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,313 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,313 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,314 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,314 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,315 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,315 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,316 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,316 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,317 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,317 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,318 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,318 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,319 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,319 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,320 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,320 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,321 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,321 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,322 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,322 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,323 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,323 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,324 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:28:26,324 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,325 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,325 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,326 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,326 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,327 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,327 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,328 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,328 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,329 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,329 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,330 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,330 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,331 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,331 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,332 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:26,335 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 141 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 123 treesize of output 1030 [2018-02-04 19:28:26,336 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:26,714 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:27,216 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,220 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,224 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,228 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,231 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,235 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,239 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,243 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,247 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,250 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,254 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,258 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,262 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,266 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,269 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,272 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,276 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,280 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,284 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,288 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,292 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,297 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,300 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,305 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,309 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,313 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,317 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,320 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,324 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,327 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,331 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,334 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,338 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,342 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,345 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,348 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,351 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,355 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,358 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,362 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,366 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,370 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,373 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,376 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,381 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,384 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,388 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,392 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,396 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,400 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,403 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,407 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,411 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,417 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,421 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,425 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,428 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,432 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,437 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,441 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,441 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:28:27,445 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,449 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,452 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,456 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,460 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,464 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,468 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,472 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,476 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,480 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,484 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,487 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,491 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,495 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,499 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,503 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,507 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,510 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,514 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,517 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,521 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,525 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,529 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,533 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,536 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,539 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,542 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,546 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,550 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,554 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,559 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,562 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,566 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,574 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,578 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,582 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,585 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,589 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,593 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,596 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,600 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,604 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,608 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,612 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,616 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,620 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,624 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,628 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,632 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,636 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,640 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,645 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,649 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,653 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,657 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,665 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,669 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,673 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,677 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,681 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,685 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,689 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,693 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,697 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,701 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,705 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,709 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,713 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,716 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,720 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,724 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,728 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,732 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,736 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,740 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,744 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:27,859 INFO L303 Elim1Store]: Index analysis took 651 ms [2018-02-04 19:28:27,868 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 136 disjoint index pairs (out of 136 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 131 treesize of output 1034 [2018-02-04 19:28:28,820 WARN L146 SmtUtils]: Spent 945ms on a formula simplification. DAG size of input: 280 DAG size of output 196 [2018-02-04 19:28:28,826 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,827 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,828 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,828 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,829 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,829 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,830 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,831 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,831 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,832 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,832 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,833 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,833 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,834 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,835 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,835 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,836 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,836 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,837 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,837 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,838 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,839 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,839 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,840 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,840 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,842 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,842 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,843 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,844 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,844 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,845 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,845 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,846 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,846 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,847 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,848 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,848 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,849 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,849 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,850 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,851 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,851 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,852 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,852 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,853 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,854 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,854 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,855 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,855 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,856 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,857 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,857 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,858 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,858 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,859 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,859 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,860 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,860 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,861 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,862 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,862 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,863 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,863 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,864 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,864 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,865 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,866 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,866 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,867 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,867 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,868 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,868 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,869 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,870 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,870 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,871 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,871 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,872 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,873 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,873 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,874 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,874 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,875 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,875 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:28:28,876 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,876 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,877 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,877 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,878 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,879 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,879 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,880 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,880 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,881 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,881 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,882 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,883 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,883 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,884 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,884 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:28,899 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 142 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 267 treesize of output 1152 [2018-02-04 19:28:28,900 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:29,435 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,435 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,436 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,437 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,438 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,439 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,439 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,440 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,441 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,442 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,443 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,443 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,444 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,445 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,445 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,446 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,447 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,448 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,448 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,449 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,451 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,451 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,453 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,454 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,454 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,455 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,456 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,457 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,457 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,458 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,459 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,459 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,460 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,462 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,463 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,464 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,465 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,466 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,467 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,467 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,468 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,469 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,469 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,470 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,471 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,472 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,473 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,475 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,475 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,476 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,477 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,477 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,478 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,479 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,480 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,480 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,481 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,482 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,484 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,485 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,486 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,486 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,487 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,488 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,488 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,489 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,490 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,491 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,492 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,492 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,493 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,494 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,495 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,495 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,496 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,497 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,498 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,498 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,499 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,500 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,501 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,501 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,502 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,504 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,505 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,507 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,509 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,510 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,512 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,514 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,515 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,515 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,516 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,519 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,520 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,520 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,522 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,523 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,524 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,525 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,525 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,526 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,527 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,528 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,528 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,529 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,530 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,531 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,531 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,532 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,533 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,533 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,534 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,535 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,535 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,536 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,537 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,537 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:29,554 INFO L303 Elim1Store]: Index analysis took 121 ms [2018-02-04 19:28:29,555 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 112 treesize of output 992 [2018-02-04 19:28:29,556 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:29,921 INFO L267 ElimStorePlain]: Start of recursive call 6: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:28:30,003 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-02-04 19:28:30,047 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:30,072 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:30,072 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 5 variables, input treesize:171, output treesize:142 [2018-02-04 19:28:31,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 141 treesize of output 108 [2018-02-04 19:28:31,153 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,153 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,154 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,155 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,155 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,156 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,156 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,157 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,158 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,158 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,159 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,159 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,160 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,160 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,161 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,162 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,162 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,163 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,163 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,164 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,165 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,165 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,166 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,166 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,167 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,167 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,168 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,169 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,170 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,170 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,171 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,171 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,172 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,172 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,173 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,173 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,174 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,174 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,175 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,176 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,177 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,177 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,178 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,178 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,179 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,180 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,180 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,181 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,181 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,182 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,184 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,184 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,185 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,186 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,186 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,187 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,187 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,188 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,188 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,189 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,190 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,190 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,191 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,191 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,192 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,193 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,193 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,194 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,195 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,195 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,196 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,196 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,197 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,197 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,198 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,198 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,199 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,200 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,200 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,201 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,201 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,202 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,202 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,203 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,204 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,204 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,205 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,205 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,206 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,207 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,208 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,208 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,209 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,209 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,210 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,211 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,211 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,212 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,213 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,213 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,214 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,215 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,215 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,216 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,218 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:31,323 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 106 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 30 case distinctions, treesize of input 108 treesize of output 902 [2018-02-04 19:28:31,323 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 15 [2018-02-04 19:28:31,990 WARN L152 XnfTransformerHelper]: Simplifying disjunction of 32768 conjuctions. This might take some time... Received shutdown request... [2018-02-04 19:31:42,391 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-02-04 19:31:42,391 WARN L491 AbstractCegarLoop]: Verification canceled [2018-02-04 19:31:42,394 WARN L185 ceAbstractionStarter]: Timeout [2018-02-04 19:31:42,394 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.02 07:31:42 BoogieIcfgContainer [2018-02-04 19:31:42,395 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-02-04 19:31:42,395 INFO L168 Benchmark]: Toolchain (without parser) took 212698.69 ms. Allocated memory was 398.5 MB in the beginning and 1.5 GB in the end (delta: 1.1 GB). Free memory was 355.3 MB in the beginning and 1.1 GB in the end (delta: -746.8 MB). Peak memory consumption was 1.5 GB. Max. memory is 5.3 GB. [2018-02-04 19:31:42,396 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 398.5 MB. Free memory is still 361.9 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-04 19:31:42,396 INFO L168 Benchmark]: CACSL2BoogieTranslator took 173.04 ms. Allocated memory is still 398.5 MB. Free memory was 355.3 MB in the beginning and 342.1 MB in the end (delta: 13.2 MB). Peak memory consumption was 13.2 MB. Max. memory is 5.3 GB. [2018-02-04 19:31:42,396 INFO L168 Benchmark]: Boogie Preprocessor took 30.67 ms. Allocated memory is still 398.5 MB. Free memory was 340.8 MB in the beginning and 339.5 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. [2018-02-04 19:31:42,396 INFO L168 Benchmark]: RCFGBuilder took 337.46 ms. Allocated memory is still 398.5 MB. Free memory was 339.5 MB in the beginning and 306.8 MB in the end (delta: 32.6 MB). Peak memory consumption was 32.6 MB. Max. memory is 5.3 GB. [2018-02-04 19:31:42,397 INFO L168 Benchmark]: TraceAbstraction took 212154.50 ms. Allocated memory was 398.5 MB in the beginning and 1.5 GB in the end (delta: 1.1 GB). Free memory was 306.8 MB in the beginning and 1.1 GB in the end (delta: -795.3 MB). Peak memory consumption was 1.4 GB. Max. memory is 5.3 GB. [2018-02-04 19:31:42,397 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 398.5 MB. Free memory is still 361.9 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 173.04 ms. Allocated memory is still 398.5 MB. Free memory was 355.3 MB in the beginning and 342.1 MB in the end (delta: 13.2 MB). Peak memory consumption was 13.2 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 30.67 ms. Allocated memory is still 398.5 MB. Free memory was 340.8 MB in the beginning and 339.5 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. * RCFGBuilder took 337.46 ms. Allocated memory is still 398.5 MB. Free memory was 339.5 MB in the beginning and 306.8 MB in the end (delta: 32.6 MB). Peak memory consumption was 32.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 212154.50 ms. Allocated memory was 398.5 MB in the beginning and 1.5 GB in the end (delta: 1.1 GB). Free memory was 306.8 MB in the beginning and 1.1 GB in the end (delta: -795.3 MB). Peak memory consumption was 1.4 GB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1441]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1441). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - StatisticsResult: Ultimate Automizer benchmark data CFG has 18 procedures, 118 locations, 19 error locations. TIMEOUT Result, 212.1s OverallTime, 30 OverallIterations, 16 TraceHistogramMax, 4.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2908 SDtfs, 637 SDslu, 24740 SDs, 0 SdLazy, 7003 SolverSat, 153 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1481 GetRequests, 1038 SyntacticMatches, 6 SemanticMatches, 437 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1455 ImplicationChecksByTransitivity, 3.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=125occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 29 MinimizatonAttempts, 32 StatesRemovedByMinimization, 7 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 4.0s InterpolantComputationTime, 2727 NumberOfCodeBlocks, 2707 NumberOfCodeBlocksAsserted, 66 NumberOfCheckSat, 2683 ConstructedInterpolants, 91 QuantifiedInterpolants, 384890 SizeOfPredicates, 62 NumberOfNonLiveVariables, 5369 ConjunctsInSsa, 366 ConjunctsInUnsatCore, 44 InterpolantComputations, 18 PerfectInterpolantSequences, 183/1473 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-04_19-31-42-403.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-04_19-31-42-403.csv Completed graceful shutdown