java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_false-valid-deref.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-c17473d-m [2018-02-04 18:53:08,237 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-04 18:53:08,238 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-04 18:53:08,250 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-04 18:53:08,250 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-04 18:53:08,250 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-04 18:53:08,251 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-04 18:53:08,253 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-04 18:53:08,254 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-04 18:53:08,255 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-04 18:53:08,256 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-04 18:53:08,256 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-04 18:53:08,256 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-04 18:53:08,257 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-04 18:53:08,258 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-04 18:53:08,260 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-04 18:53:08,261 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-04 18:53:08,263 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-04 18:53:08,264 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-04 18:53:08,265 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-04 18:53:08,266 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-02-04 18:53:08,267 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-02-04 18:53:08,267 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-02-04 18:53:08,268 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-02-04 18:53:08,268 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-02-04 18:53:08,269 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-02-04 18:53:08,269 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-02-04 18:53:08,270 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-02-04 18:53:08,270 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-02-04 18:53:08,270 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-04 18:53:08,271 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-04 18:53:08,271 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf [2018-02-04 18:53:08,279 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-04 18:53:08,280 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-04 18:53:08,280 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-04 18:53:08,280 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-04 18:53:08,280 INFO L133 SettingsManager]: * Use SBE=true [2018-02-04 18:53:08,281 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-04 18:53:08,281 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-04 18:53:08,281 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-04 18:53:08,281 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-04 18:53:08,281 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-04 18:53:08,281 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-04 18:53:08,281 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-04 18:53:08,281 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-04 18:53:08,281 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-04 18:53:08,281 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-04 18:53:08,282 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-04 18:53:08,282 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-04 18:53:08,282 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-04 18:53:08,282 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-04 18:53:08,282 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 18:53:08,282 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-04 18:53:08,282 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-02-04 18:53:08,282 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-02-04 18:53:08,282 INFO L133 SettingsManager]: * Trace refinement strategy=SMTINTERPOL [2018-02-04 18:53:08,307 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-04 18:53:08,315 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-04 18:53:08,317 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-04 18:53:08,318 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-04 18:53:08,319 INFO L276 PluginConnector]: CDTParser initialized [2018-02-04 18:53:08,319 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_false-valid-deref.i [2018-02-04 18:53:08,453 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-04 18:53:08,454 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-04 18:53:08,455 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-04 18:53:08,455 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-04 18:53:08,459 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-04 18:53:08,459 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 06:53:08" (1/1) ... [2018-02-04 18:53:08,461 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@f13972f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 06:53:08, skipping insertion in model container [2018-02-04 18:53:08,462 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 06:53:08" (1/1) ... [2018-02-04 18:53:08,471 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 18:53:08,505 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 18:53:08,605 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 18:53:08,625 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 18:53:08,635 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 06:53:08 WrapperNode [2018-02-04 18:53:08,635 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-04 18:53:08,636 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-04 18:53:08,636 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-04 18:53:08,636 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-04 18:53:08,646 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 06:53:08" (1/1) ... [2018-02-04 18:53:08,646 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 06:53:08" (1/1) ... [2018-02-04 18:53:08,655 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 06:53:08" (1/1) ... [2018-02-04 18:53:08,655 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 06:53:08" (1/1) ... [2018-02-04 18:53:08,661 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 06:53:08" (1/1) ... [2018-02-04 18:53:08,664 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 06:53:08" (1/1) ... [2018-02-04 18:53:08,666 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 06:53:08" (1/1) ... [2018-02-04 18:53:08,668 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-04 18:53:08,669 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-04 18:53:08,669 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-04 18:53:08,669 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-04 18:53:08,670 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 06:53:08" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 18:53:08,706 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-04 18:53:08,706 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-04 18:53:08,707 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-02-04 18:53:08,707 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-02-04 18:53:08,707 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-02-04 18:53:08,707 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-02-04 18:53:08,707 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-02-04 18:53:08,707 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-02-04 18:53:08,707 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-02-04 18:53:08,707 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-02-04 18:53:08,708 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-02-04 18:53:08,708 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-02-04 18:53:08,708 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-02-04 18:53:08,708 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-02-04 18:53:08,708 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-02-04 18:53:08,708 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-02-04 18:53:08,708 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-04 18:53:08,708 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-02-04 18:53:08,708 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-02-04 18:53:08,709 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-02-04 18:53:08,709 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-02-04 18:53:08,709 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-02-04 18:53:08,709 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-02-04 18:53:08,709 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-02-04 18:53:08,709 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-02-04 18:53:08,709 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-02-04 18:53:08,709 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-02-04 18:53:08,710 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-02-04 18:53:08,710 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-02-04 18:53:08,710 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-02-04 18:53:08,710 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-02-04 18:53:08,710 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-02-04 18:53:08,710 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-02-04 18:53:08,710 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-02-04 18:53:08,710 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-02-04 18:53:08,711 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-02-04 18:53:08,711 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-02-04 18:53:08,711 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-02-04 18:53:08,711 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-02-04 18:53:08,711 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-02-04 18:53:08,711 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-02-04 18:53:08,711 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-02-04 18:53:08,712 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-02-04 18:53:08,712 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-02-04 18:53:08,712 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-04 18:53:08,712 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-04 18:53:08,712 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-04 18:53:08,894 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-02-04 18:53:08,955 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-04 18:53:08,956 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 06:53:08 BoogieIcfgContainer [2018-02-04 18:53:08,956 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-04 18:53:08,957 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-04 18:53:08,957 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-04 18:53:08,960 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-04 18:53:08,960 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 04.02 06:53:08" (1/3) ... [2018-02-04 18:53:08,961 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3bce86d9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 06:53:08, skipping insertion in model container [2018-02-04 18:53:08,961 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 06:53:08" (2/3) ... [2018-02-04 18:53:08,961 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3bce86d9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 06:53:08, skipping insertion in model container [2018-02-04 18:53:08,961 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 06:53:08" (3/3) ... [2018-02-04 18:53:08,963 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_3_false-valid-deref.i [2018-02-04 18:53:08,969 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-02-04 18:53:08,975 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 19 error locations. [2018-02-04 18:53:08,998 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-04 18:53:08,999 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-04 18:53:08,999 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-02-04 18:53:08,999 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-02-04 18:53:08,999 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-04 18:53:08,999 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-04 18:53:08,999 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-04 18:53:08,999 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-04 18:53:08,999 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-04 18:53:09,009 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states. [2018-02-04 18:53:09,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-02-04 18:53:09,016 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:09,017 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:09,017 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:09,020 INFO L82 PathProgramCache]: Analyzing trace with hash 556227080, now seen corresponding path program 1 times [2018-02-04 18:53:09,020 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:09,021 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:09,054 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:09,054 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:09,055 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:09,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:09,097 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:09,241 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:09,243 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 18:53:09,243 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 18:53:09,244 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 18:53:09,251 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 18:53:09,252 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 18:53:09,253 INFO L87 Difference]: Start difference. First operand 119 states. Second operand 5 states. [2018-02-04 18:53:09,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:09,301 INFO L93 Difference]: Finished difference Result 125 states and 133 transitions. [2018-02-04 18:53:09,302 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 18:53:09,303 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-02-04 18:53:09,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:09,314 INFO L225 Difference]: With dead ends: 125 [2018-02-04 18:53:09,314 INFO L226 Difference]: Without dead ends: 122 [2018-02-04 18:53:09,316 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 18:53:09,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-02-04 18:53:09,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 120. [2018-02-04 18:53:09,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-02-04 18:53:09,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 128 transitions. [2018-02-04 18:53:09,349 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 128 transitions. Word has length 17 [2018-02-04 18:53:09,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:09,349 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 128 transitions. [2018-02-04 18:53:09,349 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 18:53:09,349 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 128 transitions. [2018-02-04 18:53:09,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-04 18:53:09,350 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:09,350 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:09,350 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:09,351 INFO L82 PathProgramCache]: Analyzing trace with hash -1895274134, now seen corresponding path program 1 times [2018-02-04 18:53:09,351 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:09,351 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:09,352 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:09,353 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:09,353 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:09,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:09,369 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:09,423 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:09,423 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 18:53:09,423 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 18:53:09,425 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 18:53:09,425 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 18:53:09,425 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 18:53:09,425 INFO L87 Difference]: Start difference. First operand 120 states and 128 transitions. Second operand 6 states. [2018-02-04 18:53:09,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:09,536 INFO L93 Difference]: Finished difference Result 121 states and 129 transitions. [2018-02-04 18:53:09,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 18:53:09,536 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-02-04 18:53:09,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:09,538 INFO L225 Difference]: With dead ends: 121 [2018-02-04 18:53:09,538 INFO L226 Difference]: Without dead ends: 121 [2018-02-04 18:53:09,539 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 18:53:09,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-02-04 18:53:09,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 119. [2018-02-04 18:53:09,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-02-04 18:53:09,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 127 transitions. [2018-02-04 18:53:09,546 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 127 transitions. Word has length 19 [2018-02-04 18:53:09,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:09,547 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 127 transitions. [2018-02-04 18:53:09,547 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 18:53:09,547 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 127 transitions. [2018-02-04 18:53:09,547 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-04 18:53:09,547 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:09,547 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:09,548 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:09,548 INFO L82 PathProgramCache]: Analyzing trace with hash -1895274133, now seen corresponding path program 1 times [2018-02-04 18:53:09,548 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:09,548 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:09,549 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:09,549 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:09,549 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:09,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:09,564 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:09,721 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:09,722 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 18:53:09,722 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 18:53:09,722 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 18:53:09,722 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 18:53:09,722 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 18:53:09,723 INFO L87 Difference]: Start difference. First operand 119 states and 127 transitions. Second operand 7 states. [2018-02-04 18:53:09,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:09,873 INFO L93 Difference]: Finished difference Result 120 states and 128 transitions. [2018-02-04 18:53:09,875 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 18:53:09,875 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-02-04 18:53:09,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:09,876 INFO L225 Difference]: With dead ends: 120 [2018-02-04 18:53:09,877 INFO L226 Difference]: Without dead ends: 120 [2018-02-04 18:53:09,877 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-02-04 18:53:09,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-02-04 18:53:09,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 118. [2018-02-04 18:53:09,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-02-04 18:53:09,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 126 transitions. [2018-02-04 18:53:09,883 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 126 transitions. Word has length 19 [2018-02-04 18:53:09,883 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:09,883 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 126 transitions. [2018-02-04 18:53:09,883 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 18:53:09,883 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 126 transitions. [2018-02-04 18:53:09,884 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-02-04 18:53:09,884 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:09,884 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:09,884 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:09,884 INFO L82 PathProgramCache]: Analyzing trace with hash 1715794329, now seen corresponding path program 1 times [2018-02-04 18:53:09,885 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:09,885 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:09,886 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:09,886 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:09,886 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:09,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:09,901 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:09,971 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:09,971 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 18:53:09,972 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 18:53:09,972 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 18:53:09,972 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 18:53:09,972 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 18:53:09,972 INFO L87 Difference]: Start difference. First operand 118 states and 126 transitions. Second operand 7 states. [2018-02-04 18:53:10,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:10,015 INFO L93 Difference]: Finished difference Result 131 states and 141 transitions. [2018-02-04 18:53:10,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 18:53:10,016 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-02-04 18:53:10,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:10,017 INFO L225 Difference]: With dead ends: 131 [2018-02-04 18:53:10,017 INFO L226 Difference]: Without dead ends: 131 [2018-02-04 18:53:10,017 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-02-04 18:53:10,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-02-04 18:53:10,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 127. [2018-02-04 18:53:10,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-02-04 18:53:10,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 136 transitions. [2018-02-04 18:53:10,025 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 136 transitions. Word has length 29 [2018-02-04 18:53:10,025 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:10,025 INFO L432 AbstractCegarLoop]: Abstraction has 127 states and 136 transitions. [2018-02-04 18:53:10,025 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 18:53:10,025 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 136 transitions. [2018-02-04 18:53:10,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-04 18:53:10,026 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:10,026 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:10,026 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:10,027 INFO L82 PathProgramCache]: Analyzing trace with hash -785661208, now seen corresponding path program 1 times [2018-02-04 18:53:10,027 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:10,027 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:10,028 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:10,028 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:10,028 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:10,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:10,041 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:10,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:10,116 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 18:53:10,116 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 18:53:10,116 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 18:53:10,116 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 18:53:10,116 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 18:53:10,117 INFO L87 Difference]: Start difference. First operand 127 states and 136 transitions. Second operand 10 states. [2018-02-04 18:53:10,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:10,296 INFO L93 Difference]: Finished difference Result 126 states and 135 transitions. [2018-02-04 18:53:10,296 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 18:53:10,296 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-02-04 18:53:10,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:10,297 INFO L225 Difference]: With dead ends: 126 [2018-02-04 18:53:10,297 INFO L226 Difference]: Without dead ends: 126 [2018-02-04 18:53:10,297 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 18:53:10,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-02-04 18:53:10,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-02-04 18:53:10,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-02-04 18:53:10,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 135 transitions. [2018-02-04 18:53:10,302 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 135 transitions. Word has length 34 [2018-02-04 18:53:10,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:10,302 INFO L432 AbstractCegarLoop]: Abstraction has 126 states and 135 transitions. [2018-02-04 18:53:10,302 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 18:53:10,303 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 135 transitions. [2018-02-04 18:53:10,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-04 18:53:10,303 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:10,303 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:10,303 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:10,303 INFO L82 PathProgramCache]: Analyzing trace with hash -785661207, now seen corresponding path program 1 times [2018-02-04 18:53:10,303 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:10,303 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:10,304 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:10,304 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:10,304 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:10,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:10,317 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:10,342 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:10,343 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 18:53:10,343 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-04 18:53:10,343 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 18:53:10,343 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 18:53:10,343 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 18:53:10,344 INFO L87 Difference]: Start difference. First operand 126 states and 135 transitions. Second operand 4 states. [2018-02-04 18:53:10,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:10,354 INFO L93 Difference]: Finished difference Result 129 states and 138 transitions. [2018-02-04 18:53:10,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 18:53:10,355 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-02-04 18:53:10,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:10,356 INFO L225 Difference]: With dead ends: 129 [2018-02-04 18:53:10,356 INFO L226 Difference]: Without dead ends: 127 [2018-02-04 18:53:10,357 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 18:53:10,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-02-04 18:53:10,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-02-04 18:53:10,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-02-04 18:53:10,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 136 transitions. [2018-02-04 18:53:10,363 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 136 transitions. Word has length 34 [2018-02-04 18:53:10,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:10,363 INFO L432 AbstractCegarLoop]: Abstraction has 127 states and 136 transitions. [2018-02-04 18:53:10,363 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 18:53:10,363 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 136 transitions. [2018-02-04 18:53:10,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-02-04 18:53:10,364 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:10,364 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:10,364 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:10,365 INFO L82 PathProgramCache]: Analyzing trace with hash -1322241719, now seen corresponding path program 1 times [2018-02-04 18:53:10,365 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:10,365 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:10,366 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:10,366 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:10,366 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:10,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:10,373 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:10,395 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-02-04 18:53:10,395 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 18:53:10,395 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-04 18:53:10,395 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-04 18:53:10,395 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-04 18:53:10,396 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 18:53:10,396 INFO L87 Difference]: Start difference. First operand 127 states and 136 transitions. Second operand 3 states. [2018-02-04 18:53:10,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:10,477 INFO L93 Difference]: Finished difference Result 143 states and 154 transitions. [2018-02-04 18:53:10,478 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-04 18:53:10,478 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 32 [2018-02-04 18:53:10,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:10,479 INFO L225 Difference]: With dead ends: 143 [2018-02-04 18:53:10,479 INFO L226 Difference]: Without dead ends: 131 [2018-02-04 18:53:10,479 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 18:53:10,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-02-04 18:53:10,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 123. [2018-02-04 18:53:10,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-02-04 18:53:10,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-02-04 18:53:10,485 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 32 [2018-02-04 18:53:10,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:10,485 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-02-04 18:53:10,485 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-04 18:53:10,485 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-02-04 18:53:10,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-02-04 18:53:10,486 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:10,486 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:10,486 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:10,487 INFO L82 PathProgramCache]: Analyzing trace with hash 1082750419, now seen corresponding path program 1 times [2018-02-04 18:53:10,487 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:10,487 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:10,488 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:10,488 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:10,488 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:10,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:10,499 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:10,528 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:10,528 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 18:53:10,528 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 18:53:10,529 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:10,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:10,558 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 18:53:10,584 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:10,584 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 18:53:10,585 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-02-04 18:53:10,585 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 18:53:10,585 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 18:53:10,585 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-02-04 18:53:10,585 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 6 states. [2018-02-04 18:53:10,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:10,610 INFO L93 Difference]: Finished difference Result 126 states and 134 transitions. [2018-02-04 18:53:10,611 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 18:53:10,611 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-02-04 18:53:10,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:10,612 INFO L225 Difference]: With dead ends: 126 [2018-02-04 18:53:10,612 INFO L226 Difference]: Without dead ends: 124 [2018-02-04 18:53:10,612 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-02-04 18:53:10,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-02-04 18:53:10,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2018-02-04 18:53:10,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-02-04 18:53:10,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2018-02-04 18:53:10,617 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 35 [2018-02-04 18:53:10,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:10,618 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2018-02-04 18:53:10,618 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 18:53:10,618 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2018-02-04 18:53:10,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-04 18:53:10,619 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:10,619 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:10,619 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:10,619 INFO L82 PathProgramCache]: Analyzing trace with hash -1962528345, now seen corresponding path program 1 times [2018-02-04 18:53:10,619 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:10,619 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:10,620 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:10,620 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:10,620 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:10,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:10,627 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:10,655 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-02-04 18:53:10,655 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 18:53:10,655 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 18:53:10,656 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 18:53:10,656 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 18:53:10,656 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 18:53:10,656 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 6 states. [2018-02-04 18:53:10,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:10,678 INFO L93 Difference]: Finished difference Result 115 states and 121 transitions. [2018-02-04 18:53:10,678 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 18:53:10,678 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2018-02-04 18:53:10,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:10,679 INFO L225 Difference]: With dead ends: 115 [2018-02-04 18:53:10,679 INFO L226 Difference]: Without dead ends: 115 [2018-02-04 18:53:10,679 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 18:53:10,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-02-04 18:53:10,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-02-04 18:53:10,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-02-04 18:53:10,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 121 transitions. [2018-02-04 18:53:10,683 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 121 transitions. Word has length 34 [2018-02-04 18:53:10,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:10,684 INFO L432 AbstractCegarLoop]: Abstraction has 115 states and 121 transitions. [2018-02-04 18:53:10,684 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 18:53:10,684 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 121 transitions. [2018-02-04 18:53:10,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-04 18:53:10,685 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:10,685 INFO L351 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:10,685 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:10,685 INFO L82 PathProgramCache]: Analyzing trace with hash -1126031319, now seen corresponding path program 2 times [2018-02-04 18:53:10,685 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:10,685 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:10,686 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:10,686 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:10,686 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:10,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:10,697 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:10,725 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:10,725 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 18:53:10,725 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 18:53:10,726 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 18:53:10,749 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 18:53:10,749 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 18:53:10,753 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 18:53:10,787 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 18:53:10,789 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:10,805 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 18:53:10,806 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:10,819 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 18:53:10,819 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 18:53:11,047 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 18:53:11,048 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 18:53:11,048 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [6] total 20 [2018-02-04 18:53:11,048 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 18:53:11,049 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 18:53:11,049 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=329, Unknown=0, NotChecked=0, Total=380 [2018-02-04 18:53:11,049 INFO L87 Difference]: Start difference. First operand 115 states and 121 transitions. Second operand 20 states. [2018-02-04 18:53:11,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:11,576 INFO L93 Difference]: Finished difference Result 117 states and 123 transitions. [2018-02-04 18:53:11,576 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-02-04 18:53:11,576 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 36 [2018-02-04 18:53:11,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:11,577 INFO L225 Difference]: With dead ends: 117 [2018-02-04 18:53:11,577 INFO L226 Difference]: Without dead ends: 115 [2018-02-04 18:53:11,577 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=104, Invalid=708, Unknown=0, NotChecked=0, Total=812 [2018-02-04 18:53:11,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-02-04 18:53:11,579 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-02-04 18:53:11,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-02-04 18:53:11,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 121 transitions. [2018-02-04 18:53:11,579 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 121 transitions. Word has length 36 [2018-02-04 18:53:11,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:11,579 INFO L432 AbstractCegarLoop]: Abstraction has 115 states and 121 transitions. [2018-02-04 18:53:11,580 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 18:53:11,580 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 121 transitions. [2018-02-04 18:53:11,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-04 18:53:11,580 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:11,580 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:11,580 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:11,581 INFO L82 PathProgramCache]: Analyzing trace with hash 1693572500, now seen corresponding path program 1 times [2018-02-04 18:53:11,581 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:11,581 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:11,581 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:11,582 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 18:53:11,582 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:11,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:11,593 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:11,656 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-02-04 18:53:11,656 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 18:53:11,657 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 18:53:11,657 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 18:53:11,657 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 18:53:11,657 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 18:53:11,657 INFO L87 Difference]: Start difference. First operand 115 states and 121 transitions. Second operand 10 states. [2018-02-04 18:53:11,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:11,842 INFO L93 Difference]: Finished difference Result 113 states and 119 transitions. [2018-02-04 18:53:11,843 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 18:53:11,843 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-02-04 18:53:11,843 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:11,844 INFO L225 Difference]: With dead ends: 113 [2018-02-04 18:53:11,844 INFO L226 Difference]: Without dead ends: 113 [2018-02-04 18:53:11,844 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 18:53:11,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-02-04 18:53:11,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-02-04 18:53:11,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-02-04 18:53:11,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 119 transitions. [2018-02-04 18:53:11,850 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 119 transitions. Word has length 42 [2018-02-04 18:53:11,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:11,850 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 119 transitions. [2018-02-04 18:53:11,850 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 18:53:11,850 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2018-02-04 18:53:11,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-04 18:53:11,852 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:11,852 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:11,852 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:11,852 INFO L82 PathProgramCache]: Analyzing trace with hash 1693572501, now seen corresponding path program 1 times [2018-02-04 18:53:11,852 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:11,852 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:11,853 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:11,854 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:11,854 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:11,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:11,870 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:11,913 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:11,914 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 18:53:11,914 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 18:53:11,915 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:11,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:11,932 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 18:53:11,943 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:11,944 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 18:53:11,944 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-02-04 18:53:11,944 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 18:53:11,944 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 18:53:11,944 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-02-04 18:53:11,945 INFO L87 Difference]: Start difference. First operand 113 states and 119 transitions. Second operand 8 states. [2018-02-04 18:53:11,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:11,960 INFO L93 Difference]: Finished difference Result 116 states and 122 transitions. [2018-02-04 18:53:11,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 18:53:11,960 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-02-04 18:53:11,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:11,961 INFO L225 Difference]: With dead ends: 116 [2018-02-04 18:53:11,961 INFO L226 Difference]: Without dead ends: 114 [2018-02-04 18:53:11,961 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-02-04 18:53:11,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-02-04 18:53:11,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2018-02-04 18:53:11,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-02-04 18:53:11,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 120 transitions. [2018-02-04 18:53:11,965 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 120 transitions. Word has length 42 [2018-02-04 18:53:11,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:11,965 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 120 transitions. [2018-02-04 18:53:11,965 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 18:53:11,965 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 120 transitions. [2018-02-04 18:53:11,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-02-04 18:53:11,966 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:11,966 INFO L351 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:11,966 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:11,966 INFO L82 PathProgramCache]: Analyzing trace with hash 1124796031, now seen corresponding path program 2 times [2018-02-04 18:53:11,966 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:11,966 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:11,967 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:11,967 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:11,967 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:11,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:11,978 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:12,026 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:12,027 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 18:53:12,027 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 18:53:12,028 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 18:53:12,045 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 18:53:12,045 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 18:53:12,049 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 18:53:12,062 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 18:53:12,063 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:12,077 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 18:53:12,077 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:12,108 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 18:53:12,108 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 18:53:12,328 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-04 18:53:12,329 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 18:53:12,329 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-02-04 18:53:12,329 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-04 18:53:12,329 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-04 18:53:12,330 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=400, Unknown=0, NotChecked=0, Total=462 [2018-02-04 18:53:12,330 INFO L87 Difference]: Start difference. First operand 114 states and 120 transitions. Second operand 22 states. [2018-02-04 18:53:12,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:12,805 INFO L93 Difference]: Finished difference Result 115 states and 121 transitions. [2018-02-04 18:53:12,805 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 18:53:12,805 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 43 [2018-02-04 18:53:12,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:12,805 INFO L225 Difference]: With dead ends: 115 [2018-02-04 18:53:12,805 INFO L226 Difference]: Without dead ends: 113 [2018-02-04 18:53:12,806 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 28 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=139, Invalid=917, Unknown=0, NotChecked=0, Total=1056 [2018-02-04 18:53:12,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-02-04 18:53:12,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-02-04 18:53:12,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-02-04 18:53:12,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 119 transitions. [2018-02-04 18:53:12,808 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 119 transitions. Word has length 43 [2018-02-04 18:53:12,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:12,809 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 119 transitions. [2018-02-04 18:53:12,809 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-04 18:53:12,809 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2018-02-04 18:53:12,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-02-04 18:53:12,809 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:12,809 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:12,810 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:12,810 INFO L82 PathProgramCache]: Analyzing trace with hash -889747813, now seen corresponding path program 1 times [2018-02-04 18:53:12,810 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:12,810 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:12,811 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:12,811 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 18:53:12,811 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:12,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:12,817 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:12,855 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 18:53:12,855 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 18:53:12,856 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-02-04 18:53:12,856 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 18:53:12,856 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 18:53:12,856 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-04 18:53:12,856 INFO L87 Difference]: Start difference. First operand 113 states and 119 transitions. Second operand 8 states. [2018-02-04 18:53:12,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:12,888 INFO L93 Difference]: Finished difference Result 115 states and 120 transitions. [2018-02-04 18:53:12,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 18:53:12,888 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 49 [2018-02-04 18:53:12,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:12,889 INFO L225 Difference]: With dead ends: 115 [2018-02-04 18:53:12,889 INFO L226 Difference]: Without dead ends: 113 [2018-02-04 18:53:12,889 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-02-04 18:53:12,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-02-04 18:53:12,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-02-04 18:53:12,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-02-04 18:53:12,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 118 transitions. [2018-02-04 18:53:12,891 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 118 transitions. Word has length 49 [2018-02-04 18:53:12,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:12,891 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 118 transitions. [2018-02-04 18:53:12,891 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 18:53:12,891 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 118 transitions. [2018-02-04 18:53:12,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-02-04 18:53:12,891 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:12,892 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:12,892 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:12,892 INFO L82 PathProgramCache]: Analyzing trace with hash 2041611084, now seen corresponding path program 1 times [2018-02-04 18:53:12,892 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:12,892 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:12,892 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:12,892 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:12,892 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:12,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:12,898 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:12,944 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 18:53:12,945 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 18:53:12,945 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-02-04 18:53:12,945 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 18:53:12,945 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 18:53:12,945 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 18:53:12,945 INFO L87 Difference]: Start difference. First operand 113 states and 118 transitions. Second operand 10 states. [2018-02-04 18:53:12,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:12,991 INFO L93 Difference]: Finished difference Result 117 states and 121 transitions. [2018-02-04 18:53:12,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 18:53:12,991 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 54 [2018-02-04 18:53:12,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:12,992 INFO L225 Difference]: With dead ends: 117 [2018-02-04 18:53:12,992 INFO L226 Difference]: Without dead ends: 113 [2018-02-04 18:53:12,992 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 18:53:12,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-02-04 18:53:12,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-02-04 18:53:12,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-02-04 18:53:12,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 117 transitions. [2018-02-04 18:53:12,995 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 117 transitions. Word has length 54 [2018-02-04 18:53:12,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:12,996 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 117 transitions. [2018-02-04 18:53:12,996 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 18:53:12,996 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 117 transitions. [2018-02-04 18:53:12,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-04 18:53:12,996 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:12,996 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:12,996 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:12,997 INFO L82 PathProgramCache]: Analyzing trace with hash -1648870102, now seen corresponding path program 1 times [2018-02-04 18:53:12,997 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:12,997 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:12,998 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:12,998 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:12,998 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:13,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:13,010 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:13,190 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 18:53:13,191 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 18:53:13,191 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2018-02-04 18:53:13,191 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-02-04 18:53:13,191 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-02-04 18:53:13,191 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=379, Unknown=0, NotChecked=0, Total=420 [2018-02-04 18:53:13,191 INFO L87 Difference]: Start difference. First operand 113 states and 117 transitions. Second operand 21 states. [2018-02-04 18:53:13,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:13,508 INFO L93 Difference]: Finished difference Result 141 states and 152 transitions. [2018-02-04 18:53:13,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 18:53:13,509 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 65 [2018-02-04 18:53:13,509 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:13,509 INFO L225 Difference]: With dead ends: 141 [2018-02-04 18:53:13,509 INFO L226 Difference]: Without dead ends: 141 [2018-02-04 18:53:13,510 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=69, Invalid=687, Unknown=0, NotChecked=0, Total=756 [2018-02-04 18:53:13,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-02-04 18:53:13,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 136. [2018-02-04 18:53:13,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-02-04 18:53:13,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 148 transitions. [2018-02-04 18:53:13,513 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 148 transitions. Word has length 65 [2018-02-04 18:53:13,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:13,513 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 148 transitions. [2018-02-04 18:53:13,513 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-02-04 18:53:13,513 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 148 transitions. [2018-02-04 18:53:13,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-04 18:53:13,514 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:13,514 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:13,514 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:13,514 INFO L82 PathProgramCache]: Analyzing trace with hash -1648870101, now seen corresponding path program 1 times [2018-02-04 18:53:13,514 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:13,514 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:13,515 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:13,515 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:13,515 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:13,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:13,529 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:13,579 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:13,579 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 18:53:13,579 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 18:53:13,580 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:13,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:13,606 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 18:53:13,629 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:13,629 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 18:53:13,629 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-02-04 18:53:13,629 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 18:53:13,630 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 18:53:13,630 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-02-04 18:53:13,630 INFO L87 Difference]: Start difference. First operand 136 states and 148 transitions. Second operand 10 states. [2018-02-04 18:53:13,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:13,654 INFO L93 Difference]: Finished difference Result 139 states and 151 transitions. [2018-02-04 18:53:13,655 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 18:53:13,655 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 65 [2018-02-04 18:53:13,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:13,656 INFO L225 Difference]: With dead ends: 139 [2018-02-04 18:53:13,656 INFO L226 Difference]: Without dead ends: 137 [2018-02-04 18:53:13,656 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-02-04 18:53:13,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-02-04 18:53:13,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-02-04 18:53:13,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-02-04 18:53:13,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 149 transitions. [2018-02-04 18:53:13,660 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 149 transitions. Word has length 65 [2018-02-04 18:53:13,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:13,661 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 149 transitions. [2018-02-04 18:53:13,661 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 18:53:13,661 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 149 transitions. [2018-02-04 18:53:13,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-02-04 18:53:13,661 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:13,662 INFO L351 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:13,662 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:13,662 INFO L82 PathProgramCache]: Analyzing trace with hash -1958826751, now seen corresponding path program 2 times [2018-02-04 18:53:13,662 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:13,662 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:13,663 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:13,663 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:13,663 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:13,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:13,677 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:13,750 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:13,751 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 18:53:13,751 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 18:53:13,752 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 18:53:13,776 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 18:53:13,777 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 18:53:13,782 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 18:53:13,795 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 18:53:13,796 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:13,810 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 18:53:13,810 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:13,822 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 18:53:13,822 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 18:53:14,201 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-02-04 18:53:14,201 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 18:53:14,201 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [10] total 29 [2018-02-04 18:53:14,202 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-02-04 18:53:14,202 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-02-04 18:53:14,202 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=720, Unknown=0, NotChecked=0, Total=812 [2018-02-04 18:53:14,202 INFO L87 Difference]: Start difference. First operand 137 states and 149 transitions. Second operand 29 states. [2018-02-04 18:53:14,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:14,851 INFO L93 Difference]: Finished difference Result 138 states and 148 transitions. [2018-02-04 18:53:14,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-02-04 18:53:14,852 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 66 [2018-02-04 18:53:14,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:14,852 INFO L225 Difference]: With dead ends: 138 [2018-02-04 18:53:14,852 INFO L226 Difference]: Without dead ends: 136 [2018-02-04 18:53:14,853 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 295 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=212, Invalid=1680, Unknown=0, NotChecked=0, Total=1892 [2018-02-04 18:53:14,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-02-04 18:53:14,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-02-04 18:53:14,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-02-04 18:53:14,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 146 transitions. [2018-02-04 18:53:14,855 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 146 transitions. Word has length 66 [2018-02-04 18:53:14,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:14,855 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 146 transitions. [2018-02-04 18:53:14,855 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-02-04 18:53:14,855 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 146 transitions. [2018-02-04 18:53:14,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-02-04 18:53:14,856 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:14,856 INFO L351 BasicCegarLoop]: trace histogram [7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:14,856 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:14,857 INFO L82 PathProgramCache]: Analyzing trace with hash 1967521112, now seen corresponding path program 1 times [2018-02-04 18:53:14,857 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:14,857 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:14,857 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:14,858 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 18:53:14,858 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:14,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:14,867 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:14,958 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2018-02-04 18:53:14,959 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 18:53:14,959 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 18:53:14,959 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:14,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:14,973 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 18:53:15,071 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-02-04 18:53:15,071 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 18:53:15,071 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 20 [2018-02-04 18:53:15,071 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 18:53:15,072 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 18:53:15,072 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=315, Unknown=0, NotChecked=0, Total=380 [2018-02-04 18:53:15,072 INFO L87 Difference]: Start difference. First operand 136 states and 146 transitions. Second operand 20 states. [2018-02-04 18:53:15,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:15,164 INFO L93 Difference]: Finished difference Result 140 states and 146 transitions. [2018-02-04 18:53:15,164 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-02-04 18:53:15,164 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 70 [2018-02-04 18:53:15,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:15,165 INFO L225 Difference]: With dead ends: 140 [2018-02-04 18:53:15,165 INFO L226 Difference]: Without dead ends: 134 [2018-02-04 18:53:15,165 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 62 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=471, Unknown=0, NotChecked=0, Total=552 [2018-02-04 18:53:15,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-02-04 18:53:15,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-02-04 18:53:15,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-02-04 18:53:15,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 140 transitions. [2018-02-04 18:53:15,169 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 140 transitions. Word has length 70 [2018-02-04 18:53:15,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:15,169 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 140 transitions. [2018-02-04 18:53:15,169 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 18:53:15,169 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 140 transitions. [2018-02-04 18:53:15,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-02-04 18:53:15,170 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:15,170 INFO L351 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:15,170 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:15,170 INFO L82 PathProgramCache]: Analyzing trace with hash -170218834, now seen corresponding path program 1 times [2018-02-04 18:53:15,171 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:15,171 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:15,171 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:15,171 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:15,172 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:15,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:15,187 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:15,395 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-02-04 18:53:15,395 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 18:53:15,395 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-02-04 18:53:15,395 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-02-04 18:53:15,395 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-02-04 18:53:15,396 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=551, Unknown=0, NotChecked=0, Total=600 [2018-02-04 18:53:15,396 INFO L87 Difference]: Start difference. First operand 134 states and 140 transitions. Second operand 25 states. [2018-02-04 18:53:15,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:15,805 INFO L93 Difference]: Finished difference Result 144 states and 153 transitions. [2018-02-04 18:53:15,805 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-02-04 18:53:15,806 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 82 [2018-02-04 18:53:15,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:15,806 INFO L225 Difference]: With dead ends: 144 [2018-02-04 18:53:15,806 INFO L226 Difference]: Without dead ends: 144 [2018-02-04 18:53:15,807 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=85, Invalid=1037, Unknown=0, NotChecked=0, Total=1122 [2018-02-04 18:53:15,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-02-04 18:53:15,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 140. [2018-02-04 18:53:15,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-02-04 18:53:15,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 150 transitions. [2018-02-04 18:53:15,810 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 150 transitions. Word has length 82 [2018-02-04 18:53:15,811 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:15,811 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 150 transitions. [2018-02-04 18:53:15,811 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-02-04 18:53:15,811 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 150 transitions. [2018-02-04 18:53:15,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-02-04 18:53:15,812 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:15,812 INFO L351 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:15,812 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:15,812 INFO L82 PathProgramCache]: Analyzing trace with hash -170218833, now seen corresponding path program 1 times [2018-02-04 18:53:15,812 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:15,812 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:15,813 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:15,813 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:15,813 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:15,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:15,830 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:15,911 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:15,912 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 18:53:15,912 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 18:53:15,912 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:15,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:15,937 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 18:53:15,956 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:15,956 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 18:53:15,956 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-02-04 18:53:15,957 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-04 18:53:15,957 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-04 18:53:15,957 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-02-04 18:53:15,957 INFO L87 Difference]: Start difference. First operand 140 states and 150 transitions. Second operand 13 states. [2018-02-04 18:53:15,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:15,984 INFO L93 Difference]: Finished difference Result 143 states and 153 transitions. [2018-02-04 18:53:15,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-02-04 18:53:15,984 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 82 [2018-02-04 18:53:15,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:15,985 INFO L225 Difference]: With dead ends: 143 [2018-02-04 18:53:15,985 INFO L226 Difference]: Without dead ends: 141 [2018-02-04 18:53:15,985 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=72, Invalid=110, Unknown=0, NotChecked=0, Total=182 [2018-02-04 18:53:15,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-02-04 18:53:15,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2018-02-04 18:53:15,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-02-04 18:53:15,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 151 transitions. [2018-02-04 18:53:15,989 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 151 transitions. Word has length 82 [2018-02-04 18:53:15,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:15,989 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 151 transitions. [2018-02-04 18:53:15,989 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-04 18:53:15,989 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 151 transitions. [2018-02-04 18:53:15,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-02-04 18:53:15,990 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:15,990 INFO L351 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:15,990 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:15,990 INFO L82 PathProgramCache]: Analyzing trace with hash -1743576679, now seen corresponding path program 2 times [2018-02-04 18:53:15,990 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:15,990 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:15,991 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:15,991 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:15,991 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:16,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:16,000 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:16,068 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:16,068 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 18:53:16,104 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 18:53:16,105 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 18:53:16,126 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 18:53:16,127 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 18:53:16,130 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 18:53:16,138 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 18:53:16,139 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:16,149 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 18:53:16,150 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:16,158 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 18:53:16,159 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 18:53:16,715 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-02-04 18:53:16,716 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 18:53:16,716 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [13] total 36 [2018-02-04 18:53:16,716 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-02-04 18:53:16,716 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-02-04 18:53:16,717 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=1126, Unknown=0, NotChecked=0, Total=1260 [2018-02-04 18:53:16,717 INFO L87 Difference]: Start difference. First operand 141 states and 151 transitions. Second operand 36 states. [2018-02-04 18:53:17,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:17,508 INFO L93 Difference]: Finished difference Result 142 states and 151 transitions. [2018-02-04 18:53:17,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-02-04 18:53:17,508 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 83 [2018-02-04 18:53:17,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:17,509 INFO L225 Difference]: With dead ends: 142 [2018-02-04 18:53:17,509 INFO L226 Difference]: Without dead ends: 140 [2018-02-04 18:53:17,509 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 58 SyntacticMatches, 3 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 532 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=327, Invalid=2753, Unknown=0, NotChecked=0, Total=3080 [2018-02-04 18:53:17,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-02-04 18:53:17,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-02-04 18:53:17,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-02-04 18:53:17,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 149 transitions. [2018-02-04 18:53:17,512 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 149 transitions. Word has length 83 [2018-02-04 18:53:17,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:17,512 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 149 transitions. [2018-02-04 18:53:17,512 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-02-04 18:53:17,512 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 149 transitions. [2018-02-04 18:53:17,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-02-04 18:53:17,513 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:17,513 INFO L351 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:17,513 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:17,513 INFO L82 PathProgramCache]: Analyzing trace with hash 470121776, now seen corresponding path program 1 times [2018-02-04 18:53:17,513 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:17,513 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:17,514 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:17,514 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 18:53:17,514 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:17,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:17,524 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:17,601 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:17,601 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 18:53:17,601 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 18:53:17,602 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:17,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:17,625 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 18:53:17,647 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:17,647 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 18:53:17,647 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2018-02-04 18:53:17,648 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-04 18:53:17,648 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-04 18:53:17,648 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-02-04 18:53:17,648 INFO L87 Difference]: Start difference. First operand 140 states and 149 transitions. Second operand 15 states. [2018-02-04 18:53:17,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:17,688 INFO L93 Difference]: Finished difference Result 143 states and 152 transitions. [2018-02-04 18:53:17,688 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-02-04 18:53:17,688 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 88 [2018-02-04 18:53:17,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:17,689 INFO L225 Difference]: With dead ends: 143 [2018-02-04 18:53:17,689 INFO L226 Difference]: Without dead ends: 141 [2018-02-04 18:53:17,690 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=97, Invalid=143, Unknown=0, NotChecked=0, Total=240 [2018-02-04 18:53:17,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-02-04 18:53:17,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2018-02-04 18:53:17,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-02-04 18:53:17,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 150 transitions. [2018-02-04 18:53:17,694 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 150 transitions. Word has length 88 [2018-02-04 18:53:17,694 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:17,694 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 150 transitions. [2018-02-04 18:53:17,694 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-04 18:53:17,694 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 150 transitions. [2018-02-04 18:53:17,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-02-04 18:53:17,695 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:17,695 INFO L351 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:17,695 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:17,695 INFO L82 PathProgramCache]: Analyzing trace with hash -1375757158, now seen corresponding path program 2 times [2018-02-04 18:53:17,695 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:17,696 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:17,696 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:17,696 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:17,697 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:17,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:17,713 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:17,826 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:17,826 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 18:53:17,826 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 18:53:17,827 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 18:53:17,881 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 18:53:17,882 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 18:53:17,892 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 18:53:17,908 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:17,909 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 18:53:17,909 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-02-04 18:53:17,909 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-04 18:53:17,909 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-04 18:53:17,909 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-02-04 18:53:17,909 INFO L87 Difference]: Start difference. First operand 141 states and 150 transitions. Second operand 16 states. [2018-02-04 18:53:17,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:17,930 INFO L93 Difference]: Finished difference Result 144 states and 153 transitions. [2018-02-04 18:53:17,935 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-04 18:53:17,935 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 89 [2018-02-04 18:53:17,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:17,936 INFO L225 Difference]: With dead ends: 144 [2018-02-04 18:53:17,936 INFO L226 Difference]: Without dead ends: 142 [2018-02-04 18:53:17,936 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 89 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-02-04 18:53:17,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-02-04 18:53:17,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-02-04 18:53:17,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-02-04 18:53:17,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 151 transitions. [2018-02-04 18:53:17,941 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 151 transitions. Word has length 89 [2018-02-04 18:53:17,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:17,941 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 151 transitions. [2018-02-04 18:53:17,941 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-04 18:53:17,941 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 151 transitions. [2018-02-04 18:53:17,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-02-04 18:53:17,942 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:17,942 INFO L351 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:17,942 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:17,942 INFO L82 PathProgramCache]: Analyzing trace with hash 1531538032, now seen corresponding path program 3 times [2018-02-04 18:53:17,942 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:17,942 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:17,943 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:17,943 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 18:53:17,943 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:17,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:17,960 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:18,074 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:18,074 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 18:53:18,074 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 18:53:18,075 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 18:53:18,115 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-02-04 18:53:18,116 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 18:53:18,119 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 18:53:18,133 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:18,133 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 18:53:18,133 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 17 [2018-02-04 18:53:18,133 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-02-04 18:53:18,134 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-02-04 18:53:18,134 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-02-04 18:53:18,134 INFO L87 Difference]: Start difference. First operand 142 states and 151 transitions. Second operand 17 states. [2018-02-04 18:53:18,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:18,167 INFO L93 Difference]: Finished difference Result 145 states and 154 transitions. [2018-02-04 18:53:18,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-02-04 18:53:18,167 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 90 [2018-02-04 18:53:18,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:18,168 INFO L225 Difference]: With dead ends: 145 [2018-02-04 18:53:18,168 INFO L226 Difference]: Without dead ends: 143 [2018-02-04 18:53:18,168 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 90 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=126, Invalid=180, Unknown=0, NotChecked=0, Total=306 [2018-02-04 18:53:18,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-02-04 18:53:18,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-02-04 18:53:18,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-02-04 18:53:18,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 152 transitions. [2018-02-04 18:53:18,172 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 152 transitions. Word has length 90 [2018-02-04 18:53:18,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:18,172 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 152 transitions. [2018-02-04 18:53:18,172 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-02-04 18:53:18,172 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 152 transitions. [2018-02-04 18:53:18,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-02-04 18:53:18,172 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:18,173 INFO L351 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:18,173 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:18,173 INFO L82 PathProgramCache]: Analyzing trace with hash 1463375706, now seen corresponding path program 4 times [2018-02-04 18:53:18,173 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:18,173 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:18,174 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:18,174 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 18:53:18,174 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:18,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:18,188 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:18,307 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:18,308 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 18:53:18,308 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 18:53:18,308 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 18:53:18,341 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 18:53:18,342 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 18:53:18,346 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 18:53:18,360 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:18,360 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 18:53:18,360 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-02-04 18:53:18,360 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-02-04 18:53:18,361 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-02-04 18:53:18,361 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-02-04 18:53:18,361 INFO L87 Difference]: Start difference. First operand 143 states and 152 transitions. Second operand 18 states. [2018-02-04 18:53:18,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:18,396 INFO L93 Difference]: Finished difference Result 146 states and 155 transitions. [2018-02-04 18:53:18,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-02-04 18:53:18,397 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 91 [2018-02-04 18:53:18,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:18,398 INFO L225 Difference]: With dead ends: 146 [2018-02-04 18:53:18,398 INFO L226 Difference]: Without dead ends: 144 [2018-02-04 18:53:18,398 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-02-04 18:53:18,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-02-04 18:53:18,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 144. [2018-02-04 18:53:18,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-02-04 18:53:18,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 153 transitions. [2018-02-04 18:53:18,402 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 153 transitions. Word has length 91 [2018-02-04 18:53:18,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:18,402 INFO L432 AbstractCegarLoop]: Abstraction has 144 states and 153 transitions. [2018-02-04 18:53:18,402 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-02-04 18:53:18,402 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 153 transitions. [2018-02-04 18:53:18,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-02-04 18:53:18,403 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:18,403 INFO L351 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:18,403 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:18,403 INFO L82 PathProgramCache]: Analyzing trace with hash -649656400, now seen corresponding path program 5 times [2018-02-04 18:53:18,403 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:18,403 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:18,404 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:18,404 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 18:53:18,404 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:18,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:18,421 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:18,561 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:18,561 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 18:53:18,562 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 18:53:18,562 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 18:53:18,590 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2018-02-04 18:53:18,591 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 18:53:18,594 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 18:53:18,615 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:18,616 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 18:53:18,616 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-02-04 18:53:18,616 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-04 18:53:18,616 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-04 18:53:18,616 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-02-04 18:53:18,617 INFO L87 Difference]: Start difference. First operand 144 states and 153 transitions. Second operand 19 states. [2018-02-04 18:53:18,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:18,655 INFO L93 Difference]: Finished difference Result 147 states and 156 transitions. [2018-02-04 18:53:18,655 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-04 18:53:18,655 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 92 [2018-02-04 18:53:18,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:18,656 INFO L225 Difference]: With dead ends: 147 [2018-02-04 18:53:18,656 INFO L226 Difference]: Without dead ends: 145 [2018-02-04 18:53:18,656 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 92 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-02-04 18:53:18,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-02-04 18:53:18,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 145. [2018-02-04 18:53:18,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-02-04 18:53:18,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 154 transitions. [2018-02-04 18:53:18,660 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 154 transitions. Word has length 92 [2018-02-04 18:53:18,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:18,660 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 154 transitions. [2018-02-04 18:53:18,660 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-04 18:53:18,660 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 154 transitions. [2018-02-04 18:53:18,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-02-04 18:53:18,661 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:18,661 INFO L351 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:18,661 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:18,661 INFO L82 PathProgramCache]: Analyzing trace with hash -1729142246, now seen corresponding path program 6 times [2018-02-04 18:53:18,661 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:18,661 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:18,662 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:18,662 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 18:53:18,662 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:18,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:18,677 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:18,866 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:18,866 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 18:53:18,866 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 18:53:18,867 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-04 18:53:18,912 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-02-04 18:53:18,913 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 18:53:18,917 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 18:53:18,941 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 18:53:18,941 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 18:53:18,941 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20 [2018-02-04 18:53:18,941 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 18:53:18,942 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 18:53:18,942 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=207, Unknown=0, NotChecked=0, Total=380 [2018-02-04 18:53:18,942 INFO L87 Difference]: Start difference. First operand 145 states and 154 transitions. Second operand 20 states. [2018-02-04 18:53:18,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 18:53:18,972 INFO L93 Difference]: Finished difference Result 148 states and 157 transitions. [2018-02-04 18:53:18,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 18:53:18,973 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 93 [2018-02-04 18:53:18,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 18:53:18,974 INFO L225 Difference]: With dead ends: 148 [2018-02-04 18:53:18,974 INFO L226 Difference]: Without dead ends: 146 [2018-02-04 18:53:18,974 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=177, Invalid=243, Unknown=0, NotChecked=0, Total=420 [2018-02-04 18:53:18,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-02-04 18:53:18,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-02-04 18:53:18,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-02-04 18:53:18,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 155 transitions. [2018-02-04 18:53:18,978 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 155 transitions. Word has length 93 [2018-02-04 18:53:18,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 18:53:18,978 INFO L432 AbstractCegarLoop]: Abstraction has 146 states and 155 transitions. [2018-02-04 18:53:18,978 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 18:53:18,978 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 155 transitions. [2018-02-04 18:53:18,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-02-04 18:53:18,979 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 18:53:18,979 INFO L351 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 18:53:18,979 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 18:53:18,979 INFO L82 PathProgramCache]: Analyzing trace with hash -833465104, now seen corresponding path program 7 times [2018-02-04 18:53:18,980 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 18:53:18,980 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 18:53:18,980 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:18,980 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 18:53:18,980 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 18:53:19,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:19,018 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 18:53:19,031 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 18:53:19,032 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 18:53:19,032 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 18:53:19,032 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 18:53:19,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 18:53:19,127 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 18:53:19,161 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 18:53:19,163 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 18:53:19,163 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:19,164 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 18:53:19,169 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 18:53:19,169 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 [2018-02-04 18:53:19,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-02-04 18:53:19,189 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:19,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-02-04 18:53:19,191 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:19,196 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 18:53:19,201 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 18:53:19,201 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:27 [2018-02-04 18:53:19,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-02-04 18:53:19,225 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:19,228 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 38 [2018-02-04 18:53:19,228 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:19,235 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 18:53:19,243 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 18:53:19,243 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:47, output treesize:43 [2018-02-04 18:53:19,734 WARN L143 SmtUtils]: Spent 337ms on a formula simplification that was a NOOP. DAG size: 29 [2018-02-04 18:53:19,744 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-02-04 18:53:19,747 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:19,752 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 49 [2018-02-04 18:53:19,753 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:19,759 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 18:53:19,767 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-02-04 18:53:19,767 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:63, output treesize:59 [2018-02-04 18:53:20,015 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 39 [2018-02-04 18:53:20,017 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:20,021 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 50 [2018-02-04 18:53:20,021 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:20,027 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 18:53:20,036 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 18:53:20,036 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:59, output treesize:55 [2018-02-04 18:53:22,402 WARN L143 SmtUtils]: Spent 2350ms on a formula simplification that was a NOOP. DAG size: 34 [2018-02-04 18:53:22,413 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 49 [2018-02-04 18:53:22,421 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:22,422 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:22,431 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 2 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 72 [2018-02-04 18:53:22,432 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:22,444 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 18:53:22,456 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 18:53:22,456 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:71, output treesize:67 [2018-02-04 18:53:25,066 WARN L143 SmtUtils]: Spent 2591ms on a formula simplification that was a NOOP. DAG size: 38 [2018-02-04 18:53:25,074 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 59 [2018-02-04 18:53:25,077 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:25,081 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:25,084 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:25,085 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:25,090 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 4 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 104 [2018-02-04 18:53:25,091 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:25,111 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 18:53:25,122 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 18:53:25,123 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:83, output treesize:79 [2018-02-04 18:53:27,392 WARN L143 SmtUtils]: Spent 2247ms on a formula simplification that was a NOOP. DAG size: 42 [2018-02-04 18:53:27,397 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 69 [2018-02-04 18:53:27,401 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:27,405 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:27,406 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:27,409 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:27,410 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:27,411 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:27,419 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:27,420 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 7 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 146 [2018-02-04 18:53:27,421 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:27,442 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 18:53:27,455 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 18:53:27,455 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:95, output treesize:91 [2018-02-04 18:53:30,783 WARN L143 SmtUtils]: Spent 3303ms on a formula simplification that was a NOOP. DAG size: 46 [2018-02-04 18:53:30,788 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 79 [2018-02-04 18:53:30,793 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:30,797 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:30,798 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:30,798 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:30,802 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:30,803 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:30,804 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:30,805 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:30,818 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:30,818 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:30,819 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:30,820 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 11 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 198 [2018-02-04 18:53:30,821 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:30,841 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 18:53:30,855 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 18:53:30,855 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:107, output treesize:103 [2018-02-04 18:53:34,913 WARN L143 SmtUtils]: Spent 4032ms on a formula simplification that was a NOOP. DAG size: 50 [2018-02-04 18:53:34,918 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 108 treesize of output 89 [2018-02-04 18:53:34,938 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:34,942 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:34,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:34,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:34,944 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:34,947 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:34,947 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:34,948 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:34,949 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:34,949 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:34,959 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:34,960 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:34,960 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:34,961 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:34,961 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:34,962 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:34,963 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 16 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 260 [2018-02-04 18:53:34,963 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:35,000 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 18:53:35,016 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 18:53:35,016 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:119, output treesize:115 [2018-02-04 18:53:38,968 WARN L143 SmtUtils]: Spent 3906ms on a formula simplification that was a NOOP. DAG size: 54 [2018-02-04 18:53:38,979 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 120 treesize of output 99 [2018-02-04 18:53:38,983 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:38,987 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:38,987 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:38,988 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:38,989 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:38,989 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:38,992 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:38,993 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:38,993 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:38,994 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:38,994 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:38,995 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:39,007 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:39,008 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:39,009 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:39,009 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:39,010 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:39,010 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:39,011 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:39,011 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:39,012 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:39,013 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:39,014 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 22 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 99 treesize of output 332 [2018-02-04 18:53:39,015 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:39,053 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 18:53:39,071 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 18:53:39,072 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:131, output treesize:127 [2018-02-04 18:53:43,157 WARN L143 SmtUtils]: Spent 4026ms on a formula simplification that was a NOOP. DAG size: 58 [2018-02-04 18:53:43,162 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 132 treesize of output 109 [2018-02-04 18:53:43,166 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,167 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,172 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,173 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,174 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,175 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,176 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,177 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,183 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,184 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,185 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,186 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,187 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,192 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,193 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,194 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,195 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,196 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,198 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,229 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,230 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,231 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,232 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,233 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,234 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,235 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,236 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,237 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,238 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:43,239 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 29 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 109 treesize of output 414 [2018-02-04 18:53:43,240 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:43,311 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 18:53:43,330 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 18:53:43,330 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:143, output treesize:139 [2018-02-04 18:53:47,413 WARN L143 SmtUtils]: Spent 4027ms on a formula simplification that was a NOOP. DAG size: 62 [2018-02-04 18:53:47,419 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 144 treesize of output 119 [2018-02-04 18:53:47,424 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,425 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,430 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,431 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,432 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,433 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,433 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,434 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,435 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,440 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,441 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,442 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,450 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,452 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,452 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,458 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,458 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,459 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,460 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,461 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,462 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,463 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,492 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,493 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,495 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,496 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,496 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,498 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,498 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,499 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,500 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,501 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,502 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,503 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,504 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,505 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,506 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:47,507 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 37 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 506 [2018-02-04 18:53:47,508 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:47,584 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 18:53:47,607 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 18:53:47,607 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:155, output treesize:151 [2018-02-04 18:53:51,700 WARN L143 SmtUtils]: Spent 4030ms on a formula simplification that was a NOOP. DAG size: 66 [2018-02-04 18:53:51,706 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 156 treesize of output 129 [2018-02-04 18:53:51,712 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,712 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,716 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,716 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,717 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,718 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,718 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,719 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,720 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,720 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,723 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,724 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,725 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,725 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,726 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,726 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,727 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,730 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,731 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,731 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,732 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,732 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,733 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,734 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,734 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,753 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,753 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,754 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,754 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,755 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,756 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,756 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,757 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,757 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,758 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,758 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,759 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,759 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,760 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,761 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,761 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,762 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,762 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,763 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,764 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,764 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:51,765 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 46 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 129 treesize of output 608 [2018-02-04 18:53:51,766 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:51,849 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 18:53:51,874 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 18:53:51,874 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:167, output treesize:163 [2018-02-04 18:53:55,453 WARN L143 SmtUtils]: Spent 3500ms on a formula simplification that was a NOOP. DAG size: 70 [2018-02-04 18:53:55,461 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 168 treesize of output 139 [2018-02-04 18:53:55,469 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,471 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,473 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,474 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,475 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,483 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,485 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,486 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,487 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,489 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,491 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,492 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,493 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,494 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,500 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,500 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,502 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,503 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,503 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,504 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,505 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,506 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,511 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,512 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,513 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,514 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,515 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,516 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,517 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,524 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,526 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,527 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,528 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,528 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,529 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,535 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,536 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,536 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,537 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,538 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,544 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,545 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,547 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,547 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,548 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,549 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,577 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,578 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,579 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,580 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,580 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,581 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,582 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,583 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,585 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,586 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:55,587 INFO L303 Elim1Store]: Index analysis took 123 ms [2018-02-04 18:53:55,588 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 56 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 139 treesize of output 720 [2018-02-04 18:53:55,588 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:55,747 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 18:53:55,774 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 18:53:55,774 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:179, output treesize:175 [2018-02-04 18:53:59,037 WARN L143 SmtUtils]: Spent 3186ms on a formula simplification that was a NOOP. DAG size: 74 [2018-02-04 18:53:59,048 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 179 treesize of output 148 [2018-02-04 18:53:59,054 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,054 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,056 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,056 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,057 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,058 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,059 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,060 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,066 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,068 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,068 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,069 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,070 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,071 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,072 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,073 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,074 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,075 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,083 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,084 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,085 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,086 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,087 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,088 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,090 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,091 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,092 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,100 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,101 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,102 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,103 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,104 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,105 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,105 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,107 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,112 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,113 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,114 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,115 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,116 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,118 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,119 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,124 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,124 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,125 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,126 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,127 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,128 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,134 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,134 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,135 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,136 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,137 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,142 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,144 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,145 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,145 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,151 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,152 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,153 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,159 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,160 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,161 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,162 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,179 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,180 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,181 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:53:59,182 INFO L303 Elim1Store]: Index analysis took 131 ms [2018-02-04 18:53:59,183 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 67 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 148 treesize of output 830 [2018-02-04 18:53:59,184 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 18:53:59,355 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 18:53:59,401 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-02-04 18:53:59,401 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:198, output treesize:194 [2018-02-04 18:54:03,539 WARN L143 SmtUtils]: Spent 2018ms on a formula simplification that was a NOOP. DAG size: 82 [2018-02-04 18:54:07,763 WARN L143 SmtUtils]: Spent 2023ms on a formula simplification that was a NOOP. DAG size: 81 [2018-02-04 18:54:08,088 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 18:54:08,094 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 18:54:08,095 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 18:54:08,095 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:27 [2018-02-04 18:54:08,100 WARN L1033 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_2 Int)) (= |c_#memory_$Pointer$.offset| (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base| (let ((.cse0 (+ |c_ldv_kobject_init_internal_#in~kobj.offset| 4))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base|) (+ |c_ldv_kobject_init_internal_#in~kobj.offset| 12) v_DerPreprocessor_2) .cse0 .cse0) (+ |c_ldv_kobject_init_internal_#in~kobj.offset| 8) .cse0))))) is different from true [2018-02-04 18:54:08,108 WARN L1033 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_2 Int)) (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base| (let ((.cse0 (+ |c_ldv_kobject_init_#in~kobj.offset| 4))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base|) (+ |c_ldv_kobject_init_#in~kobj.offset| 12) v_DerPreprocessor_2) .cse0 .cse0) (+ |c_ldv_kobject_init_#in~kobj.offset| 8) .cse0))) |c_#memory_$Pointer$.offset|)) is different from true [2018-02-04 18:54:08,121 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,122 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 138 treesize of output 120 [2018-02-04 18:54:08,127 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,128 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,129 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,129 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,130 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,132 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,132 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,133 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,134 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,134 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,135 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,135 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,136 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,136 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,137 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,137 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,138 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,138 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,139 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,140 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,141 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,141 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,142 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,142 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,142 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,143 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,143 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,144 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,144 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,145 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,146 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,147 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,148 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,148 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,149 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,149 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,150 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,150 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,151 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,151 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,152 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,153 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,154 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,155 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,155 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,156 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,156 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,157 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,157 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,158 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,159 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,160 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,160 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,161 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,161 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,162 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,162 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 18:54:08,163 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,164 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,164 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,165 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,165 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,166 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,167 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,167 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,168 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,173 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,174 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,174 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,175 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,175 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,176 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,176 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,177 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,177 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,178 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,179 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,179 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,180 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,181 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,181 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,182 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,183 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,183 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,184 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,185 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,185 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,186 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,186 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,187 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,187 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,188 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,188 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,189 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,189 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 18:54:08,215 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 91 disjoint index pairs (out of 105 index pairs), introduced 2 new quantified variables, introduced 4 case distinctions, treesize of input 120 treesize of output 838 [2018-02-04 18:54:08,242 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,243 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,244 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,245 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,247 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,248 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,249 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,250 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,251 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,251 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,252 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,253 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,254 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,254 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,255 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,256 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,258 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,259 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,259 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,260 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,261 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,262 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,262 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,263 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,264 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,265 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,265 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,267 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,268 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,269 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,270 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,271 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,272 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,273 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,273 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,274 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 18:54:08,274 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,276 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,277 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,278 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,280 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,280 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,281 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,282 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,283 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,284 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,285 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,286 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,287 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,288 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,288 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,289 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,290 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,291 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,300 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,301 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,302 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,302 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,303 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,304 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,304 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,305 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,306 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,307 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,307 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,308 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,309 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,310 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,310 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,311 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,312 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,314 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,314 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,315 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,316 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,317 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,317 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,318 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,319 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,319 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,320 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:08,364 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 121 disjoint index pairs (out of 105 index pairs), introduced 1 new quantified variables, introduced 5 case distinctions, treesize of input 826 treesize of output 855 [2018-02-04 18:54:09,092 WARN L146 SmtUtils]: Spent 722ms on a formula simplification. DAG size of input: 282 DAG size of output 167 [2018-02-04 18:54:09,115 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,115 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,117 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,123 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,124 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,124 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,125 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,125 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,126 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,126 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,127 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,127 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,128 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,128 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,129 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,129 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,130 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,130 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,131 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,131 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,132 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,132 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,133 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,133 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,133 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,134 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,134 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,135 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,135 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,136 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,136 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,137 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,137 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,138 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,138 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,139 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,139 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,139 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,140 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,141 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,143 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,144 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,145 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,145 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,146 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,146 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,147 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,148 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,148 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,149 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,149 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,150 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,151 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,151 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,152 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,153 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,153 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,154 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,155 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,155 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,156 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,156 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,157 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,157 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,158 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,159 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,160 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,161 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,162 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,162 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,163 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,163 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,164 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,164 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,165 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,166 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,166 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,167 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,182 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 79 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 693 [2018-02-04 18:54:09,184 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 18:54:09,499 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,500 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,500 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,503 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,503 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,504 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,506 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,508 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,509 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,510 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,512 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,513 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,515 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,516 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,519 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,521 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,522 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,524 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,525 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,526 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,528 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,529 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,531 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,532 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,533 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,534 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,535 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,535 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,537 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,539 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,540 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,542 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,543 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,545 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,548 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,549 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,551 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,553 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,554 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,556 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,557 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,559 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,560 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,565 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,580 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,581 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,582 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,583 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,585 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,586 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,588 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,589 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,590 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,592 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,594 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,595 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,597 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,598 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,599 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,601 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,602 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,604 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,605 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,607 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,608 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,609 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,611 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,613 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,614 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,616 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,617 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,619 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,620 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,621 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,622 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,624 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,625 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,627 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,628 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,630 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:09,664 INFO L303 Elim1Store]: Index analysis took 167 ms [2018-02-04 18:54:09,678 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 81 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 102 treesize of output 704 [2018-02-04 18:54:09,680 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-02-04 18:54:10,395 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,397 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,420 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,421 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,422 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,423 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,424 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,425 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,426 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,427 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,428 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,429 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,430 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,431 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,432 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,433 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,434 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,435 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,436 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,437 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,438 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,439 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,440 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,441 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,442 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,443 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,444 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,445 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,446 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,447 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,448 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,449 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,450 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,451 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,452 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,453 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,454 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,454 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,455 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,456 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,457 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,458 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,459 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,460 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,461 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,461 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 18:54:10,462 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,463 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,464 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,465 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,466 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,467 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,468 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,469 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,470 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,471 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,471 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,472 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,473 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,474 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,474 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,475 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,476 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,477 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,478 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,478 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,479 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,480 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,481 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,482 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,482 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,483 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,484 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,485 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,485 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,486 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,487 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,487 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,488 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,489 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,489 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,490 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,491 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,504 INFO L303 Elim1Store]: Index analysis took 111 ms [2018-02-04 18:54:10,505 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 80 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 741 [2018-02-04 18:54:10,506 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-04 18:54:10,822 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,823 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,824 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,824 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,826 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,827 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,828 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,829 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,829 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,830 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,831 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,839 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,840 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,841 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,842 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,843 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,845 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,845 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,846 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,847 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,848 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,849 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,849 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,850 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,852 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,854 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,855 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,857 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,861 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,862 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,864 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,866 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,867 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,869 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,870 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,871 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,873 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,875 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,877 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,878 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,879 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,879 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,880 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,881 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,882 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,882 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,883 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 18:54:10,886 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,888 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,889 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,891 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,893 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,895 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,896 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,897 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,902 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,913 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,914 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,915 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,916 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,918 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,919 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,921 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,922 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,924 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,925 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,927 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,928 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,930 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,931 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,933 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,934 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,936 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,937 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,939 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,940 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,941 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,944 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,946 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,947 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,948 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,950 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,952 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,954 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:10,989 INFO L303 Elim1Store]: Index analysis took 169 ms [2018-02-04 18:54:10,997 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 82 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 106 treesize of output 759 [2018-02-04 18:54:10,998 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 2 xjuncts. [2018-02-04 18:54:11,719 INFO L267 ElimStorePlain]: Start of recursive call 4: 4 dim-1 vars, End of recursive call: and 6 xjuncts. [2018-02-04 18:54:13,082 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,086 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,089 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,093 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,096 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,099 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,102 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,105 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,109 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,112 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,114 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,118 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,121 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,125 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,128 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,130 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,133 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,137 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,140 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,143 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,146 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,149 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,152 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,154 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,155 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 18:54:13,158 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,161 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,164 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,167 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,171 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,174 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,177 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,180 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,183 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,187 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,190 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,193 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,197 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,200 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,203 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,206 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,210 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,213 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,216 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,219 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,222 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,225 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,229 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,232 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,234 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,237 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,241 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,244 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,247 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,250 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,254 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,258 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,261 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,264 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,268 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,270 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,273 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,276 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,279 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,282 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,285 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,288 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,291 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,293 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,296 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,299 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,302 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,305 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,308 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,311 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,314 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,317 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,320 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,323 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,327 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,330 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,333 INFO L303 Elim1Store]: Index analysis took 257 ms [2018-02-04 18:54:13,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 80 disjoint index pairs (out of 78 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 118 treesize of output 713 [2018-02-04 18:54:13,408 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,409 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,409 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,410 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,410 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,411 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,412 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,412 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,413 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,413 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,414 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,414 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,415 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,415 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,416 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,416 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,417 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,417 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,418 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,418 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,419 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,419 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,420 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,420 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,421 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,421 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,422 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,422 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,423 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,423 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,424 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,424 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,425 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,425 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,426 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,426 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,427 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,427 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,428 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,428 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,429 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,429 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,430 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,430 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,431 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,431 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,431 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,432 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,432 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,433 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,433 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 18:54:13,434 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,434 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,435 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,435 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,436 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,436 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,437 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,438 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,438 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,439 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,439 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,440 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,440 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,441 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,441 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,442 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,442 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,447 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,448 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,448 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,449 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,449 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,452 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 81 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 777 [2018-02-04 18:54:13,453 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-02-04 18:54:13,633 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 18:54:13,911 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,915 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,918 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,922 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,932 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,936 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,940 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,948 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,951 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,955 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,958 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,962 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,964 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,968 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,970 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,980 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,984 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,988 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,992 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,995 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:13,998 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,001 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,005 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,007 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,011 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,014 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,023 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,026 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,030 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,034 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,037 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,041 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,044 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,048 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,049 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 18:54:14,053 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,063 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,066 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,070 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,073 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,077 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,081 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,085 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,088 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,093 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,096 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,099 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,103 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,106 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,110 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,113 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,117 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,120 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,136 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,177 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,181 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,184 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,188 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,192 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,195 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,198 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,202 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,205 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,208 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,212 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,215 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,219 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,221 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,225 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,229 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,232 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,236 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,239 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,242 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,245 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,248 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,252 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,255 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,258 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,262 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,265 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,269 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,272 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,276 INFO L303 Elim1Store]: Index analysis took 375 ms [2018-02-04 18:54:14,284 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 82 disjoint index pairs (out of 91 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 118 treesize of output 733 [2018-02-04 18:54:14,464 WARN L146 SmtUtils]: Spent 177ms on a formula simplification. DAG size of input: 148 DAG size of output 105 [2018-02-04 18:54:14,467 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,468 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,468 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,470 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,471 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,471 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,472 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,473 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,473 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,474 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,475 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,476 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,476 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,477 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,478 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,479 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,480 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,480 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,481 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,482 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,482 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,483 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,484 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,484 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,485 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,486 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,487 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,487 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,488 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,489 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,489 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,490 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,490 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,491 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,492 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,493 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,494 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,495 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,495 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,496 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,497 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,497 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,498 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,498 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 18:54:14,505 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,506 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,507 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,507 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,508 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,508 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,509 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,509 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,510 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,511 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,511 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,512 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,512 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,513 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,513 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,514 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,515 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,515 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,516 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,516 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,517 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,517 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,518 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,519 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,519 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,520 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,520 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,521 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,521 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:14,530 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 84 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 120 treesize of output 777 [2018-02-04 18:54:14,532 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 2 xjuncts. [2018-02-04 18:54:15,167 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,168 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,168 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,169 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,170 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,171 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,171 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,172 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,173 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,174 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,174 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,175 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,177 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,178 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,178 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,179 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,180 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,180 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,181 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,182 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,182 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,183 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,184 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,184 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,185 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,186 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,187 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,187 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,191 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,192 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,192 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,193 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,194 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,195 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,195 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,196 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,197 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,198 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,198 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,199 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,200 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,200 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,201 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 18:54:15,202 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,202 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,203 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,204 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,205 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,205 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,206 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,207 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,207 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,208 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,209 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,210 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,210 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,211 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,212 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,213 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,214 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,214 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,215 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,216 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,216 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,217 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,218 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,219 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,219 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,220 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,221 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,221 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,222 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,226 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 81 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 752 [2018-02-04 18:54:15,226 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-02-04 18:54:15,452 INFO L267 ElimStorePlain]: Start of recursive call 11: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-02-04 18:54:15,750 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,753 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,756 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,759 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,762 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,765 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,769 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,772 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,775 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,778 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,781 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,784 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,786 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,789 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,792 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,796 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,799 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,802 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,804 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,814 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,817 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,820 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,823 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,826 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,830 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,830 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 18:54:15,833 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,836 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,839 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,842 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,846 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,849 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,852 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,855 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,858 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,861 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,864 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,868 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,871 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,873 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,883 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,885 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,888 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,891 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,895 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,898 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,901 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,904 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,907 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,911 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,914 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,917 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,920 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,923 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,926 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,928 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,931 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,935 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,938 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,941 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,944 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,947 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,950 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,953 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,956 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,958 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,961 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,964 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,968 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,971 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,974 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,978 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,980 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,984 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,987 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,991 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:15,997 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,001 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,004 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,007 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,010 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,012 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,015 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,019 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,022 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,025 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,028 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,033 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,036 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,039 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,042 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,124 INFO L303 Elim1Store]: Index analysis took 381 ms [2018-02-04 18:54:16,133 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 90 disjoint index pairs (out of 91 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 121 treesize of output 772 [2018-02-04 18:54:16,363 WARN L146 SmtUtils]: Spent 227ms on a formula simplification. DAG size of input: 175 DAG size of output 102 [2018-02-04 18:54:16,366 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,366 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,367 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,367 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,368 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,368 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,369 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,369 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,369 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,370 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,370 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,371 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,371 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,372 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,372 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,373 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,373 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,374 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,375 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,376 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,376 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,377 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,377 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,378 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,378 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,379 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,380 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,380 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,381 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,381 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,382 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,382 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,383 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,384 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,384 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,385 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,385 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,386 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,386 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,387 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,387 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,388 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,388 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,389 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,390 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,390 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,391 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,391 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,392 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,392 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,393 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,393 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,394 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,394 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,395 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,396 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,396 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,397 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,397 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,398 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,398 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,399 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,399 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,400 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,400 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,401 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,401 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,402 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,402 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,403 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,403 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,404 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,404 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,405 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,406 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,406 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,407 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,407 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,418 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 79 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 107 treesize of output 779 [2018-02-04 18:54:16,419 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-02-04 18:54:16,654 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,655 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,656 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,656 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,657 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,658 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,659 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,660 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,660 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,661 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,662 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,662 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,667 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,668 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,669 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,670 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,670 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,671 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,672 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,673 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,673 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,674 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,675 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,675 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,676 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,677 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,678 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,678 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,679 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,680 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,681 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,681 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,690 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,691 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,692 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,692 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,693 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,694 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,695 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,695 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,696 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,697 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,698 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,698 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,699 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,700 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,701 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,702 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,703 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,703 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,704 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,705 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,706 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,706 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,707 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 18:54:16,707 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,708 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,709 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,709 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,710 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,711 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,712 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,712 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,713 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,714 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,714 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,715 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,716 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,717 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,718 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,718 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,719 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,720 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,721 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,721 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,722 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,723 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,723 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,724 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,725 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,726 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,726 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,727 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,728 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:16,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 80 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 108 treesize of output 771 [2018-02-04 18:54:16,742 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-02-04 18:54:16,944 INFO L267 ElimStorePlain]: Start of recursive call 14: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 18:54:17,233 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-0 vars, 4 dim-1 vars, End of recursive call: and 12 xjuncts. [2018-02-04 18:54:17,336 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-02-04 18:54:17,423 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 3 xjuncts. [2018-02-04 18:54:17,423 INFO L202 ElimStorePlain]: Needed 16 recursive calls to eliminate 4 variables, input treesize:149, output treesize:342 [2018-02-04 18:54:18,370 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 118 treesize of output 91 [2018-02-04 18:54:18,372 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,373 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,373 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,374 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,374 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,375 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,375 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,376 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,376 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,377 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,377 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,378 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,379 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,379 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,380 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,381 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,381 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,382 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,382 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,383 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,383 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,384 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,385 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,385 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,386 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,386 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,387 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,387 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,388 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,388 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,389 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,390 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,391 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,391 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,392 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,392 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,393 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,393 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,394 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,395 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,395 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,396 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,396 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,397 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,398 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,399 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,399 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,400 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,401 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,401 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,402 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,403 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,403 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,404 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,404 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,405 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,406 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,406 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,407 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,408 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,408 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,409 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,410 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,411 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,412 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,413 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 18:54:18,495 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 67 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 24 case distinctions, treesize of input 91 treesize of output 627 [2018-02-04 18:54:18,496 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 12 [2018-02-04 18:54:24,499 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4096 xjuncts. Received shutdown request... [2018-02-04 18:56:24,661 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-02-04 18:56:24,661 WARN L491 AbstractCegarLoop]: Verification canceled [2018-02-04 18:56:24,664 WARN L185 ceAbstractionStarter]: Timeout [2018-02-04 18:56:24,664 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.02 06:56:24 BoogieIcfgContainer [2018-02-04 18:56:24,664 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-02-04 18:56:24,665 INFO L168 Benchmark]: Toolchain (without parser) took 196211.02 ms. Allocated memory was 405.3 MB in the beginning and 594.5 MB in the end (delta: 189.3 MB). Free memory was 362.2 MB in the beginning and 407.4 MB in the end (delta: -45.3 MB). Peak memory consumption was 1.2 GB. Max. memory is 5.3 GB. [2018-02-04 18:56:24,665 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 405.3 MB. Free memory is still 368.8 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-04 18:56:24,666 INFO L168 Benchmark]: CACSL2BoogieTranslator took 180.68 ms. Allocated memory is still 405.3 MB. Free memory was 362.2 MB in the beginning and 347.6 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB. [2018-02-04 18:56:24,666 INFO L168 Benchmark]: Boogie Preprocessor took 32.84 ms. Allocated memory is still 405.3 MB. Free memory was 347.6 MB in the beginning and 346.3 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. [2018-02-04 18:56:24,666 INFO L168 Benchmark]: RCFGBuilder took 287.65 ms. Allocated memory is still 405.3 MB. Free memory was 346.3 MB in the beginning and 313.7 MB in the end (delta: 32.6 MB). Peak memory consumption was 32.6 MB. Max. memory is 5.3 GB. [2018-02-04 18:56:24,666 INFO L168 Benchmark]: TraceAbstraction took 195707.25 ms. Allocated memory was 405.3 MB in the beginning and 594.5 MB in the end (delta: 189.3 MB). Free memory was 313.7 MB in the beginning and 407.4 MB in the end (delta: -93.8 MB). Peak memory consumption was 1.1 GB. Max. memory is 5.3 GB. [2018-02-04 18:56:24,667 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 405.3 MB. Free memory is still 368.8 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 180.68 ms. Allocated memory is still 405.3 MB. Free memory was 362.2 MB in the beginning and 347.6 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 32.84 ms. Allocated memory is still 405.3 MB. Free memory was 347.6 MB in the beginning and 346.3 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. * RCFGBuilder took 287.65 ms. Allocated memory is still 405.3 MB. Free memory was 346.3 MB in the beginning and 313.7 MB in the end (delta: 32.6 MB). Peak memory consumption was 32.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 195707.25 ms. Allocated memory was 405.3 MB in the beginning and 594.5 MB in the end (delta: 189.3 MB). Free memory was 313.7 MB in the beginning and 407.4 MB in the end (delta: -93.8 MB). Peak memory consumption was 1.1 GB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1443]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1443). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - StatisticsResult: Ultimate Automizer benchmark data CFG has 18 procedures, 119 locations, 19 error locations. TIMEOUT Result, 195.6s OverallTime, 29 OverallIterations, 16 TraceHistogramMax, 4.5s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2896 SDtfs, 679 SDslu, 25361 SDs, 0 SdLazy, 7192 SolverSat, 174 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1458 GetRequests, 1015 SyntacticMatches, 6 SemanticMatches, 437 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1526 ImplicationChecksByTransitivity, 4.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=146occurred in iteration=28, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 28 MinimizatonAttempts, 27 StatesRemovedByMinimization, 7 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 4.2s InterpolantComputationTime, 2640 NumberOfCodeBlocks, 2619 NumberOfCodeBlocksAsserted, 66 NumberOfCheckSat, 2597 ConstructedInterpolants, 92 QuantifiedInterpolants, 374385 SizeOfPredicates, 63 NumberOfNonLiveVariables, 5238 ConjunctsInSsa, 365 ConjunctsInUnsatCore, 43 InterpolantComputations, 17 PerfectInterpolantSequences, 207/1463 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-04_18-56-24-671.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-04_18-56-24-671.csv Completed graceful shutdown