java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv --cacsl2boogietranslator.bitprecise.bitfields false -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/array-memsafety/cstrcat-alloca_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-666feb3-m [2018-04-11 09:53:13,832 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-11 09:53:13,833 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-11 09:53:13,846 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2018-04-11 09:53:13,867 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-04-11 09:53:13,886 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-11 09:53:13,887 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-11 09:53:13,887 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-11 09:53:13,888 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-11 09:53:13,888 INFO L133 SettingsManager]: * Use SBE=true [2018-04-11 09:53:13,888 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-11 09:53:13,888 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-11 09:53:13,888 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-11 09:53:13,888 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-11 09:53:13,888 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-11 09:53:13,889 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-11 09:53:13,889 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-11 09:53:13,889 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-11 09:53:13,889 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-11 09:53:13,889 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-11 09:53:13,889 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-11 09:53:13,889 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-11 09:53:13,890 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-11 09:53:13,890 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-11 09:53:13,890 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-11 09:53:13,890 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-11 09:53:13,890 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-11 09:53:13,890 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-11 09:53:13,890 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Bitprecise bitfields -> false [2018-04-11 09:53:13,917 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-11 09:53:13,928 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-11 09:53:13,932 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-11 09:53:13,933 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-11 09:53:13,934 INFO L276 PluginConnector]: CDTParser initialized [2018-04-11 09:53:13,934 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-memsafety/cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,227 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG9f14b953b [2018-04-11 09:53:14,367 INFO L287 CDTParser]: IsIndexed: true [2018-04-11 09:53:14,367 INFO L288 CDTParser]: Found 1 translation units. [2018-04-11 09:53:14,368 INFO L168 CDTParser]: Scanning cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,375 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-11 09:53:14,375 INFO L215 ultiparseSymbolTable]: [2018-04-11 09:53:14,375 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-11 09:53:14,375 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____bswap_32 ('__bswap_32') in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,375 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,375 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__ ('') in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,375 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____bswap_64 ('__bswap_64') in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,376 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-11 09:53:14,376 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__fsblkcnt_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,376 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__time_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,376 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____suseconds_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,376 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____rlim64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,376 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__uid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,376 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____qaddr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,376 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__u_int in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,376 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____blksize_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,376 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__blksize_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,376 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_rwlock_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,376 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_key_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,376 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____int32_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,376 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____uint32_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,376 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____syscall_ulong_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,376 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____id_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,377 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__div_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,377 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____caddr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,377 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____u_short in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,377 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____dev_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,377 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__key_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,377 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__caddr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,377 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__mode_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,377 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__fsfilcnt_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,377 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__int32_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,377 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__fd_set in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,377 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,377 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__ulong in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,377 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____blkcnt64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,377 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____int16_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,378 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__u_short in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,378 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__gid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,378 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__off_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,378 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____socklen_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,378 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____nlink_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,378 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____ssize_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,378 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__timer_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,378 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____mode_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,378 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__u_int32_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,378 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__u_char in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,378 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__blkcnt_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,379 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____gid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,379 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____u_long in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,379 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____intptr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,379 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_once_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,379 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_mutexattr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,379 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__size_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,379 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____timer_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,379 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_attr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,379 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____off64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,379 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____fsblkcnt64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,379 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__int16_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,379 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____pid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,379 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____quad_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,380 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____pthread_list_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,380 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__lldiv_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,380 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__wchar_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,380 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____rlim_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,380 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____u_char in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,380 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_barrier_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,380 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____u_quad_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,380 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__dev_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,380 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____uint8_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,380 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__id_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,380 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__u_int8_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,381 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____u_int in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,381 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____useconds_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,381 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__loff_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,381 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____daddr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,381 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__clockid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,381 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____clockid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,381 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__fsid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,381 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__quad_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,381 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,381 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__u_int16_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,382 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_cond_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,382 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_spinlock_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,382 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____fd_mask in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,382 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_condattr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,382 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____blkcnt_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,382 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____clock_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,382 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____uid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,382 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____loff_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,382 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____ino64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,382 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__suseconds_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,382 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____ino_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,382 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____sigset_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,383 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____sig_atomic_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,383 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____fsid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,383 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__nlink_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,383 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____off_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,383 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__clock_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,383 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__uint in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,383 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__u_long in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,383 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__fd_mask in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,383 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____uint64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,383 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__ssize_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,383 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_rwlockattr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,383 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____fsword_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,384 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__u_int64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,384 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__sigset_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,384 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____int8_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,384 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____uint16_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,384 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__daddr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,384 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____WAIT_STATUS in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,384 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__u_quad_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,384 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__ushort in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,384 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____time_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,384 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__int64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,384 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____fsfilcnt_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,384 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____syscall_slong_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,384 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____fsblkcnt_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,384 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_barrierattr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,384 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__int8_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,384 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__register_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,385 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____fsfilcnt64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,385 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_mutex_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,385 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__ino_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,385 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____key_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,385 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____int64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,385 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__ldiv_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:14,399 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG9f14b953b [2018-04-11 09:53:14,402 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-11 09:53:14,403 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-11 09:53:14,403 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-11 09:53:14,403 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-11 09:53:14,407 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-11 09:53:14,407 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 11.04 09:53:14" (1/1) ... [2018-04-11 09:53:14,409 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7a77ade1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 09:53:14, skipping insertion in model container [2018-04-11 09:53:14,409 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 11.04 09:53:14" (1/1) ... [2018-04-11 09:53:14,419 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-11 09:53:14,440 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-11 09:53:14,559 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-11 09:53:14,595 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-11 09:53:14,601 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 112 non ball SCCs. Number of states in SCCs 112. [2018-04-11 09:53:14,637 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 09:53:14 WrapperNode [2018-04-11 09:53:14,637 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-11 09:53:14,638 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-11 09:53:14,638 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-11 09:53:14,638 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-11 09:53:14,645 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 09:53:14" (1/1) ... [2018-04-11 09:53:14,646 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 09:53:14" (1/1) ... [2018-04-11 09:53:14,657 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 09:53:14" (1/1) ... [2018-04-11 09:53:14,657 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 09:53:14" (1/1) ... [2018-04-11 09:53:14,664 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 09:53:14" (1/1) ... [2018-04-11 09:53:14,669 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 09:53:14" (1/1) ... [2018-04-11 09:53:14,671 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 09:53:14" (1/1) ... [2018-04-11 09:53:14,673 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-11 09:53:14,673 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-11 09:53:14,674 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-11 09:53:14,674 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-11 09:53:14,674 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 09:53:14" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-11 09:53:14,799 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-11 09:53:14,799 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-11 09:53:14,799 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____bswap_32 [2018-04-11 09:53:14,799 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____bswap_64 [2018-04-11 09:53:14,799 INFO L136 BoogieDeclarations]: Found implementation of procedure cstrcat [2018-04-11 09:53:14,800 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-11 09:53:14,800 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____bswap_32 [2018-04-11 09:53:14,800 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____bswap_64 [2018-04-11 09:53:14,800 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-11 09:53:14,800 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-11 09:53:14,800 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-11 09:53:14,800 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-11 09:53:14,800 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-11 09:53:14,800 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-11 09:53:14,800 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-11 09:53:14,800 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-11 09:53:14,800 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-11 09:53:14,801 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-11 09:53:14,801 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-11 09:53:14,801 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-11 09:53:14,801 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-11 09:53:14,801 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-11 09:53:14,801 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-11 09:53:14,801 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-11 09:53:14,801 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-11 09:53:14,801 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-11 09:53:14,801 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-11 09:53:14,801 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-11 09:53:14,802 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-11 09:53:14,802 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-11 09:53:14,802 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-11 09:53:14,802 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-11 09:53:14,802 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-11 09:53:14,802 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-11 09:53:14,802 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-11 09:53:14,802 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-11 09:53:14,802 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-11 09:53:14,803 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-11 09:53:14,803 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-11 09:53:14,803 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-11 09:53:14,803 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-11 09:53:14,803 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-11 09:53:14,803 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-11 09:53:14,803 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-11 09:53:14,803 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-11 09:53:14,803 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-11 09:53:14,803 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-11 09:53:14,804 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-11 09:53:14,804 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-11 09:53:14,804 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-11 09:53:14,804 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-11 09:53:14,804 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-11 09:53:14,804 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-11 09:53:14,804 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-11 09:53:14,804 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-11 09:53:14,804 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-11 09:53:14,804 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-11 09:53:14,805 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-11 09:53:14,805 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-11 09:53:14,805 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-11 09:53:14,805 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-11 09:53:14,805 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-11 09:53:14,805 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-11 09:53:14,805 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-11 09:53:14,805 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-11 09:53:14,805 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-11 09:53:14,805 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-11 09:53:14,805 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-11 09:53:14,806 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-11 09:53:14,806 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-11 09:53:14,806 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-11 09:53:14,806 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-11 09:53:14,806 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-11 09:53:14,806 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-11 09:53:14,806 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-11 09:53:14,806 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-11 09:53:14,806 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-11 09:53:14,806 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-11 09:53:14,806 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-11 09:53:14,806 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-11 09:53:14,806 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-11 09:53:14,806 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-11 09:53:14,806 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-11 09:53:14,806 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-11 09:53:14,806 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-11 09:53:14,806 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-11 09:53:14,807 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-11 09:53:14,807 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-11 09:53:14,807 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-11 09:53:14,807 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-11 09:53:14,807 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-11 09:53:14,807 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-11 09:53:14,807 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-11 09:53:14,807 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-11 09:53:14,807 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-11 09:53:14,807 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-11 09:53:14,807 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-11 09:53:14,807 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-11 09:53:14,807 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-11 09:53:14,807 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-11 09:53:14,807 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-11 09:53:14,808 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-11 09:53:14,808 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-11 09:53:14,808 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-11 09:53:14,808 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-11 09:53:14,808 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-11 09:53:14,808 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-11 09:53:14,808 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-11 09:53:14,808 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-11 09:53:14,808 INFO L128 BoogieDeclarations]: Found specification of procedure cstrcat [2018-04-11 09:53:14,808 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-11 09:53:14,809 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-11 09:53:14,809 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-11 09:53:14,809 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-11 09:53:14,809 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-11 09:53:14,809 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-11 09:53:14,809 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-11 09:53:14,809 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-11 09:53:15,063 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-11 09:53:15,063 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.04 09:53:15 BoogieIcfgContainer [2018-04-11 09:53:15,063 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-11 09:53:15,064 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-11 09:53:15,064 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-11 09:53:15,066 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-11 09:53:15,066 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 11.04 09:53:14" (1/3) ... [2018-04-11 09:53:15,066 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@791c628c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 11.04 09:53:15, skipping insertion in model container [2018-04-11 09:53:15,066 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 09:53:14" (2/3) ... [2018-04-11 09:53:15,066 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@791c628c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 11.04 09:53:15, skipping insertion in model container [2018-04-11 09:53:15,066 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.04 09:53:15" (3/3) ... [2018-04-11 09:53:15,068 INFO L107 eAbstractionObserver]: Analyzing ICFG cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-11 09:53:15,073 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-11 09:53:15,077 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 11 error locations. [2018-04-11 09:53:15,099 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-11 09:53:15,099 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-11 09:53:15,099 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-11 09:53:15,099 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-11 09:53:15,099 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-11 09:53:15,100 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-11 09:53:15,100 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-11 09:53:15,100 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-11 09:53:15,100 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-11 09:53:15,100 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-11 09:53:15,107 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states. [2018-04-11 09:53:15,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-04-11 09:53:15,113 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:15,113 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:15,113 INFO L408 AbstractCegarLoop]: === Iteration 1 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:15,116 INFO L82 PathProgramCache]: Analyzing trace with hash -58907273, now seen corresponding path program 1 times [2018-04-11 09:53:15,117 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:15,117 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:15,144 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:15,144 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:15,144 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:15,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:15,177 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:15,245 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:15,247 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 09:53:15,247 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-11 09:53:15,249 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-11 09:53:15,261 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-11 09:53:15,262 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-11 09:53:15,264 INFO L87 Difference]: Start difference. First operand 49 states. Second operand 5 states. [2018-04-11 09:53:15,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:15,391 INFO L93 Difference]: Finished difference Result 91 states and 101 transitions. [2018-04-11 09:53:15,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-11 09:53:15,393 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 11 [2018-04-11 09:53:15,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:15,404 INFO L225 Difference]: With dead ends: 91 [2018-04-11 09:53:15,404 INFO L226 Difference]: Without dead ends: 86 [2018-04-11 09:53:15,406 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-11 09:53:15,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-04-11 09:53:15,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 49. [2018-04-11 09:53:15,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-04-11 09:53:15,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 56 transitions. [2018-04-11 09:53:15,443 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 56 transitions. Word has length 11 [2018-04-11 09:53:15,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:15,443 INFO L459 AbstractCegarLoop]: Abstraction has 49 states and 56 transitions. [2018-04-11 09:53:15,443 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-11 09:53:15,443 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 56 transitions. [2018-04-11 09:53:15,444 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-04-11 09:53:15,444 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:15,444 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:15,444 INFO L408 AbstractCegarLoop]: === Iteration 2 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:15,444 INFO L82 PathProgramCache]: Analyzing trace with hash -58905351, now seen corresponding path program 1 times [2018-04-11 09:53:15,444 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:15,444 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:15,445 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:15,445 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:15,445 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:15,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:15,456 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:15,477 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:15,477 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 09:53:15,477 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-11 09:53:15,478 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-11 09:53:15,478 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-11 09:53:15,478 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-11 09:53:15,478 INFO L87 Difference]: Start difference. First operand 49 states and 56 transitions. Second operand 3 states. [2018-04-11 09:53:15,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:15,537 INFO L93 Difference]: Finished difference Result 50 states and 56 transitions. [2018-04-11 09:53:15,537 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-11 09:53:15,538 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-04-11 09:53:15,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:15,538 INFO L225 Difference]: With dead ends: 50 [2018-04-11 09:53:15,539 INFO L226 Difference]: Without dead ends: 49 [2018-04-11 09:53:15,539 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-11 09:53:15,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-04-11 09:53:15,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 46. [2018-04-11 09:53:15,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-04-11 09:53:15,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 50 transitions. [2018-04-11 09:53:15,543 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 50 transitions. Word has length 11 [2018-04-11 09:53:15,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:15,544 INFO L459 AbstractCegarLoop]: Abstraction has 46 states and 50 transitions. [2018-04-11 09:53:15,544 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-11 09:53:15,544 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 50 transitions. [2018-04-11 09:53:15,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-04-11 09:53:15,544 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:15,544 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:15,544 INFO L408 AbstractCegarLoop]: === Iteration 3 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:15,545 INFO L82 PathProgramCache]: Analyzing trace with hash -2034104824, now seen corresponding path program 1 times [2018-04-11 09:53:15,545 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:15,545 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:15,546 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:15,546 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:15,546 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:15,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:15,562 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:15,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:15,603 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 09:53:15,603 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-11 09:53:15,603 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-11 09:53:15,603 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-11 09:53:15,604 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-11 09:53:15,604 INFO L87 Difference]: Start difference. First operand 46 states and 50 transitions. Second operand 4 states. [2018-04-11 09:53:15,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:15,662 INFO L93 Difference]: Finished difference Result 45 states and 49 transitions. [2018-04-11 09:53:15,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-11 09:53:15,663 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-04-11 09:53:15,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:15,664 INFO L225 Difference]: With dead ends: 45 [2018-04-11 09:53:15,664 INFO L226 Difference]: Without dead ends: 45 [2018-04-11 09:53:15,664 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-11 09:53:15,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-04-11 09:53:15,666 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-04-11 09:53:15,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-04-11 09:53:15,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 49 transitions. [2018-04-11 09:53:15,667 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 49 transitions. Word has length 15 [2018-04-11 09:53:15,668 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:15,668 INFO L459 AbstractCegarLoop]: Abstraction has 45 states and 49 transitions. [2018-04-11 09:53:15,668 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-11 09:53:15,668 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 49 transitions. [2018-04-11 09:53:15,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-04-11 09:53:15,668 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:15,669 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:15,669 INFO L408 AbstractCegarLoop]: === Iteration 4 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:15,669 INFO L82 PathProgramCache]: Analyzing trace with hash -2034104823, now seen corresponding path program 1 times [2018-04-11 09:53:15,669 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:15,672 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:15,673 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:15,673 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:15,673 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:15,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:15,685 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:15,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:15,768 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 09:53:15,769 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-11 09:53:15,769 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-11 09:53:15,769 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-11 09:53:15,769 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-04-11 09:53:15,770 INFO L87 Difference]: Start difference. First operand 45 states and 49 transitions. Second operand 6 states. [2018-04-11 09:53:15,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:15,844 INFO L93 Difference]: Finished difference Result 44 states and 48 transitions. [2018-04-11 09:53:15,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-11 09:53:15,844 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 15 [2018-04-11 09:53:15,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:15,845 INFO L225 Difference]: With dead ends: 44 [2018-04-11 09:53:15,845 INFO L226 Difference]: Without dead ends: 44 [2018-04-11 09:53:15,846 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-04-11 09:53:15,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-04-11 09:53:15,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-04-11 09:53:15,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-04-11 09:53:15,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 48 transitions. [2018-04-11 09:53:15,853 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 48 transitions. Word has length 15 [2018-04-11 09:53:15,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:15,853 INFO L459 AbstractCegarLoop]: Abstraction has 44 states and 48 transitions. [2018-04-11 09:53:15,853 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-11 09:53:15,853 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 48 transitions. [2018-04-11 09:53:15,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-04-11 09:53:15,854 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:15,854 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:15,854 INFO L408 AbstractCegarLoop]: === Iteration 5 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:15,854 INFO L82 PathProgramCache]: Analyzing trace with hash 1367259900, now seen corresponding path program 1 times [2018-04-11 09:53:15,854 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:15,855 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:15,855 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:15,856 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:15,856 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:15,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:15,870 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:15,897 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:15,897 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 09:53:15,897 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-11 09:53:15,897 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-11 09:53:15,898 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-11 09:53:15,898 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-11 09:53:15,898 INFO L87 Difference]: Start difference. First operand 44 states and 48 transitions. Second operand 4 states. [2018-04-11 09:53:15,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:15,923 INFO L93 Difference]: Finished difference Result 43 states and 47 transitions. [2018-04-11 09:53:15,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-11 09:53:15,923 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-04-11 09:53:15,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:15,924 INFO L225 Difference]: With dead ends: 43 [2018-04-11 09:53:15,924 INFO L226 Difference]: Without dead ends: 43 [2018-04-11 09:53:15,924 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-11 09:53:15,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-04-11 09:53:15,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-04-11 09:53:15,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-04-11 09:53:15,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 47 transitions. [2018-04-11 09:53:15,926 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 47 transitions. Word has length 16 [2018-04-11 09:53:15,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:15,926 INFO L459 AbstractCegarLoop]: Abstraction has 43 states and 47 transitions. [2018-04-11 09:53:15,926 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-11 09:53:15,926 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 47 transitions. [2018-04-11 09:53:15,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-04-11 09:53:15,927 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:15,927 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:15,927 INFO L408 AbstractCegarLoop]: === Iteration 6 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:15,927 INFO L82 PathProgramCache]: Analyzing trace with hash 1367259901, now seen corresponding path program 1 times [2018-04-11 09:53:15,927 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:15,927 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:15,928 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:15,928 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:15,928 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:15,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:15,935 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:15,971 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:15,971 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 09:53:15,971 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-11 09:53:15,971 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-11 09:53:15,971 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-11 09:53:15,972 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-04-11 09:53:15,972 INFO L87 Difference]: Start difference. First operand 43 states and 47 transitions. Second operand 6 states. [2018-04-11 09:53:16,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:16,044 INFO L93 Difference]: Finished difference Result 58 states and 62 transitions. [2018-04-11 09:53:16,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-11 09:53:16,044 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 16 [2018-04-11 09:53:16,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:16,045 INFO L225 Difference]: With dead ends: 58 [2018-04-11 09:53:16,045 INFO L226 Difference]: Without dead ends: 58 [2018-04-11 09:53:16,045 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2018-04-11 09:53:16,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-04-11 09:53:16,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 50. [2018-04-11 09:53:16,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-04-11 09:53:16,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2018-04-11 09:53:16,051 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 54 transitions. Word has length 16 [2018-04-11 09:53:16,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:16,051 INFO L459 AbstractCegarLoop]: Abstraction has 50 states and 54 transitions. [2018-04-11 09:53:16,052 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-11 09:53:16,052 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 54 transitions. [2018-04-11 09:53:16,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-04-11 09:53:16,052 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:16,052 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:16,052 INFO L408 AbstractCegarLoop]: === Iteration 7 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:16,052 INFO L82 PathProgramCache]: Analyzing trace with hash 557913275, now seen corresponding path program 1 times [2018-04-11 09:53:16,052 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:16,052 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:16,053 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:16,053 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:16,053 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:16,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:16,063 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:16,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:16,119 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 09:53:16,119 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-11 09:53:16,119 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-11 09:53:16,120 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-11 09:53:16,120 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-04-11 09:53:16,120 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. Second operand 6 states. [2018-04-11 09:53:16,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:16,177 INFO L93 Difference]: Finished difference Result 49 states and 53 transitions. [2018-04-11 09:53:16,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-11 09:53:16,177 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 16 [2018-04-11 09:53:16,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:16,178 INFO L225 Difference]: With dead ends: 49 [2018-04-11 09:53:16,178 INFO L226 Difference]: Without dead ends: 49 [2018-04-11 09:53:16,178 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-04-11 09:53:16,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-04-11 09:53:16,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 42. [2018-04-11 09:53:16,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-04-11 09:53:16,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 46 transitions. [2018-04-11 09:53:16,181 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 46 transitions. Word has length 16 [2018-04-11 09:53:16,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:16,182 INFO L459 AbstractCegarLoop]: Abstraction has 42 states and 46 transitions. [2018-04-11 09:53:16,182 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-11 09:53:16,182 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 46 transitions. [2018-04-11 09:53:16,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-04-11 09:53:16,182 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:16,182 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:16,182 INFO L408 AbstractCegarLoop]: === Iteration 8 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:16,182 INFO L82 PathProgramCache]: Analyzing trace with hash -1383367435, now seen corresponding path program 1 times [2018-04-11 09:53:16,183 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:16,183 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:16,183 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:16,183 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:16,183 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:16,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:16,196 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:16,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:16,228 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 09:53:16,229 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-11 09:53:16,229 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-11 09:53:16,229 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-11 09:53:16,229 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-11 09:53:16,230 INFO L87 Difference]: Start difference. First operand 42 states and 46 transitions. Second operand 5 states. [2018-04-11 09:53:16,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:16,298 INFO L93 Difference]: Finished difference Result 41 states and 45 transitions. [2018-04-11 09:53:16,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-11 09:53:16,299 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2018-04-11 09:53:16,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:16,299 INFO L225 Difference]: With dead ends: 41 [2018-04-11 09:53:16,300 INFO L226 Difference]: Without dead ends: 41 [2018-04-11 09:53:16,300 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-11 09:53:16,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-04-11 09:53:16,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-04-11 09:53:16,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-04-11 09:53:16,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 45 transitions. [2018-04-11 09:53:16,302 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 45 transitions. Word has length 20 [2018-04-11 09:53:16,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:16,302 INFO L459 AbstractCegarLoop]: Abstraction has 41 states and 45 transitions. [2018-04-11 09:53:16,302 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-11 09:53:16,303 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 45 transitions. [2018-04-11 09:53:16,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-04-11 09:53:16,303 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:16,303 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:16,303 INFO L408 AbstractCegarLoop]: === Iteration 9 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:16,303 INFO L82 PathProgramCache]: Analyzing trace with hash -1383367434, now seen corresponding path program 1 times [2018-04-11 09:53:16,304 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:16,304 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:16,304 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:16,305 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:16,305 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:16,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:16,313 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:16,357 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:16,357 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 09:53:16,358 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-11 09:53:16,358 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-11 09:53:16,358 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-11 09:53:16,358 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-04-11 09:53:16,358 INFO L87 Difference]: Start difference. First operand 41 states and 45 transitions. Second operand 7 states. [2018-04-11 09:53:16,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:16,447 INFO L93 Difference]: Finished difference Result 46 states and 51 transitions. [2018-04-11 09:53:16,447 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-11 09:53:16,447 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 20 [2018-04-11 09:53:16,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:16,447 INFO L225 Difference]: With dead ends: 46 [2018-04-11 09:53:16,447 INFO L226 Difference]: Without dead ends: 46 [2018-04-11 09:53:16,447 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2018-04-11 09:53:16,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-04-11 09:53:16,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 43. [2018-04-11 09:53:16,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-04-11 09:53:16,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 47 transitions. [2018-04-11 09:53:16,449 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 47 transitions. Word has length 20 [2018-04-11 09:53:16,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:16,449 INFO L459 AbstractCegarLoop]: Abstraction has 43 states and 47 transitions. [2018-04-11 09:53:16,449 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-11 09:53:16,449 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 47 transitions. [2018-04-11 09:53:16,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-11 09:53:16,450 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:16,450 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:16,450 INFO L408 AbstractCegarLoop]: === Iteration 10 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:16,450 INFO L82 PathProgramCache]: Analyzing trace with hash -1688021460, now seen corresponding path program 1 times [2018-04-11 09:53:16,450 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:16,450 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:16,450 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:16,451 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:16,451 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:16,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:16,460 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:16,518 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:16,518 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 09:53:16,518 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 09:53:16,524 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:16,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:16,546 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 09:53:16,578 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-11 09:53:16,579 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-11 09:53:16,579 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:16,580 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:16,581 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:16,581 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-04-11 09:53:16,607 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-11 09:53:16,609 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-11 09:53:16,609 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:16,610 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:16,610 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:16,611 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:15, output treesize:3 [2018-04-11 09:53:16,620 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:16,638 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-11 09:53:16,638 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [7] total 13 [2018-04-11 09:53:16,638 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-04-11 09:53:16,639 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-04-11 09:53:16,639 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-04-11 09:53:16,639 INFO L87 Difference]: Start difference. First operand 43 states and 47 transitions. Second operand 13 states. [2018-04-11 09:53:16,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:16,895 INFO L93 Difference]: Finished difference Result 88 states and 96 transitions. [2018-04-11 09:53:16,895 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-04-11 09:53:16,895 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 23 [2018-04-11 09:53:16,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:16,896 INFO L225 Difference]: With dead ends: 88 [2018-04-11 09:53:16,896 INFO L226 Difference]: Without dead ends: 88 [2018-04-11 09:53:16,897 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=119, Invalid=583, Unknown=0, NotChecked=0, Total=702 [2018-04-11 09:53:16,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-04-11 09:53:16,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 58. [2018-04-11 09:53:16,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-04-11 09:53:16,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 64 transitions. [2018-04-11 09:53:16,903 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 64 transitions. Word has length 23 [2018-04-11 09:53:16,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:16,903 INFO L459 AbstractCegarLoop]: Abstraction has 58 states and 64 transitions. [2018-04-11 09:53:16,903 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-04-11 09:53:16,903 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 64 transitions. [2018-04-11 09:53:16,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-11 09:53:16,904 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:16,904 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:16,904 INFO L408 AbstractCegarLoop]: === Iteration 11 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:16,904 INFO L82 PathProgramCache]: Analyzing trace with hash -789102402, now seen corresponding path program 1 times [2018-04-11 09:53:16,904 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:16,904 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:16,905 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:16,905 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:16,905 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:16,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:16,912 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:16,939 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:16,940 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 09:53:16,940 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-11 09:53:16,940 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-11 09:53:16,940 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-11 09:53:16,940 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-11 09:53:16,940 INFO L87 Difference]: Start difference. First operand 58 states and 64 transitions. Second operand 6 states. [2018-04-11 09:53:16,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:16,978 INFO L93 Difference]: Finished difference Result 57 states and 63 transitions. [2018-04-11 09:53:16,978 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-11 09:53:16,978 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 24 [2018-04-11 09:53:16,978 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:16,979 INFO L225 Difference]: With dead ends: 57 [2018-04-11 09:53:16,979 INFO L226 Difference]: Without dead ends: 57 [2018-04-11 09:53:16,979 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-04-11 09:53:16,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-04-11 09:53:16,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-04-11 09:53:16,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-04-11 09:53:16,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 63 transitions. [2018-04-11 09:53:16,982 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 63 transitions. Word has length 24 [2018-04-11 09:53:16,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:16,982 INFO L459 AbstractCegarLoop]: Abstraction has 57 states and 63 transitions. [2018-04-11 09:53:16,982 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-11 09:53:16,982 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 63 transitions. [2018-04-11 09:53:16,982 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-11 09:53:16,982 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:16,983 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:16,983 INFO L408 AbstractCegarLoop]: === Iteration 12 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:16,983 INFO L82 PathProgramCache]: Analyzing trace with hash -789102401, now seen corresponding path program 1 times [2018-04-11 09:53:16,983 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:16,983 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:16,984 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:16,984 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:16,984 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:16,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:16,992 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:17,056 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:17,057 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 09:53:17,057 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-11 09:53:17,057 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-11 09:53:17,057 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-11 09:53:17,057 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-04-11 09:53:17,057 INFO L87 Difference]: Start difference. First operand 57 states and 63 transitions. Second operand 9 states. [2018-04-11 09:53:17,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:17,150 INFO L93 Difference]: Finished difference Result 64 states and 71 transitions. [2018-04-11 09:53:17,150 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-11 09:53:17,152 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 24 [2018-04-11 09:53:17,153 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:17,153 INFO L225 Difference]: With dead ends: 64 [2018-04-11 09:53:17,153 INFO L226 Difference]: Without dead ends: 64 [2018-04-11 09:53:17,153 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2018-04-11 09:53:17,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-04-11 09:53:17,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 60. [2018-04-11 09:53:17,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-04-11 09:53:17,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 66 transitions. [2018-04-11 09:53:17,156 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 66 transitions. Word has length 24 [2018-04-11 09:53:17,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:17,157 INFO L459 AbstractCegarLoop]: Abstraction has 60 states and 66 transitions. [2018-04-11 09:53:17,157 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-11 09:53:17,157 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 66 transitions. [2018-04-11 09:53:17,157 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-04-11 09:53:17,157 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:17,158 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:17,158 INFO L408 AbstractCegarLoop]: === Iteration 13 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:17,158 INFO L82 PathProgramCache]: Analyzing trace with hash 1307629356, now seen corresponding path program 1 times [2018-04-11 09:53:17,158 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:17,158 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:17,159 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:17,159 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:17,159 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:17,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:17,169 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:17,208 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:17,208 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 09:53:17,208 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-11 09:53:17,208 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-11 09:53:17,209 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-11 09:53:17,209 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-11 09:53:17,209 INFO L87 Difference]: Start difference. First operand 60 states and 66 transitions. Second operand 6 states. [2018-04-11 09:53:17,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:17,267 INFO L93 Difference]: Finished difference Result 59 states and 65 transitions. [2018-04-11 09:53:17,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-11 09:53:17,270 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-04-11 09:53:17,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:17,270 INFO L225 Difference]: With dead ends: 59 [2018-04-11 09:53:17,270 INFO L226 Difference]: Without dead ends: 59 [2018-04-11 09:53:17,271 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-04-11 09:53:17,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-04-11 09:53:17,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-04-11 09:53:17,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-04-11 09:53:17,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 65 transitions. [2018-04-11 09:53:17,273 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 65 transitions. Word has length 25 [2018-04-11 09:53:17,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:17,273 INFO L459 AbstractCegarLoop]: Abstraction has 59 states and 65 transitions. [2018-04-11 09:53:17,273 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-11 09:53:17,273 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 65 transitions. [2018-04-11 09:53:17,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-04-11 09:53:17,273 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:17,274 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:17,274 INFO L408 AbstractCegarLoop]: === Iteration 14 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:17,274 INFO L82 PathProgramCache]: Analyzing trace with hash 1307629357, now seen corresponding path program 1 times [2018-04-11 09:53:17,274 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:17,274 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:17,274 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:17,275 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:17,275 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:17,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:17,287 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:17,369 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:17,369 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 09:53:17,369 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-04-11 09:53:17,370 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-11 09:53:17,370 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-11 09:53:17,370 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-04-11 09:53:17,370 INFO L87 Difference]: Start difference. First operand 59 states and 65 transitions. Second operand 8 states. [2018-04-11 09:53:17,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:17,496 INFO L93 Difference]: Finished difference Result 64 states and 71 transitions. [2018-04-11 09:53:17,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-11 09:53:17,496 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 25 [2018-04-11 09:53:17,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:17,497 INFO L225 Difference]: With dead ends: 64 [2018-04-11 09:53:17,497 INFO L226 Difference]: Without dead ends: 64 [2018-04-11 09:53:17,497 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=120, Unknown=0, NotChecked=0, Total=156 [2018-04-11 09:53:17,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-04-11 09:53:17,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 63. [2018-04-11 09:53:17,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-04-11 09:53:17,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 69 transitions. [2018-04-11 09:53:17,500 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 69 transitions. Word has length 25 [2018-04-11 09:53:17,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:17,500 INFO L459 AbstractCegarLoop]: Abstraction has 63 states and 69 transitions. [2018-04-11 09:53:17,500 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-11 09:53:17,501 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 69 transitions. [2018-04-11 09:53:17,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-04-11 09:53:17,501 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:17,501 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:17,501 INFO L408 AbstractCegarLoop]: === Iteration 15 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:17,502 INFO L82 PathProgramCache]: Analyzing trace with hash -69390988, now seen corresponding path program 1 times [2018-04-11 09:53:17,502 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:17,502 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:17,502 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:17,502 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:17,503 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:17,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:17,511 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:17,594 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-11 09:53:17,594 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 09:53:17,594 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-04-11 09:53:17,595 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-11 09:53:17,595 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-11 09:53:17,595 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2018-04-11 09:53:17,595 INFO L87 Difference]: Start difference. First operand 63 states and 69 transitions. Second operand 12 states. [2018-04-11 09:53:17,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:17,745 INFO L93 Difference]: Finished difference Result 102 states and 109 transitions. [2018-04-11 09:53:17,745 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-04-11 09:53:17,745 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 26 [2018-04-11 09:53:17,745 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:17,746 INFO L225 Difference]: With dead ends: 102 [2018-04-11 09:53:17,746 INFO L226 Difference]: Without dead ends: 102 [2018-04-11 09:53:17,746 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=150, Invalid=500, Unknown=0, NotChecked=0, Total=650 [2018-04-11 09:53:17,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-04-11 09:53:17,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 64. [2018-04-11 09:53:17,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-04-11 09:53:17,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 71 transitions. [2018-04-11 09:53:17,748 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 71 transitions. Word has length 26 [2018-04-11 09:53:17,748 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:17,748 INFO L459 AbstractCegarLoop]: Abstraction has 64 states and 71 transitions. [2018-04-11 09:53:17,748 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-11 09:53:17,748 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 71 transitions. [2018-04-11 09:53:17,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-04-11 09:53:17,748 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:17,748 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:17,748 INFO L408 AbstractCegarLoop]: === Iteration 16 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:17,749 INFO L82 PathProgramCache]: Analyzing trace with hash -1758334730, now seen corresponding path program 1 times [2018-04-11 09:53:17,749 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:17,749 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:17,749 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:17,749 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:17,749 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:17,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:17,758 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:17,900 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:17,900 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 09:53:17,900 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 09:53:17,907 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:17,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:17,923 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 09:53:17,928 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:17,928 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:17,932 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:17,932 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:14 [2018-04-11 09:53:17,964 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-11 09:53:17,965 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-11 09:53:17,965 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:17,966 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:17,971 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 09:53:17,971 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:24 [2018-04-11 09:53:18,070 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-04-11 09:53:18,078 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 11 [2018-04-11 09:53:18,079 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-11 09:53:18,082 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:18,095 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:18,095 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:37, output treesize:35 [2018-04-11 09:53:18,180 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:18,199 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 09:53:18,200 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 20 [2018-04-11 09:53:18,200 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-04-11 09:53:18,200 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-04-11 09:53:18,200 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=376, Unknown=0, NotChecked=0, Total=420 [2018-04-11 09:53:18,200 INFO L87 Difference]: Start difference. First operand 64 states and 71 transitions. Second operand 21 states. [2018-04-11 09:53:18,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:18,667 INFO L93 Difference]: Finished difference Result 83 states and 93 transitions. [2018-04-11 09:53:18,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-04-11 09:53:18,667 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 26 [2018-04-11 09:53:18,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:18,668 INFO L225 Difference]: With dead ends: 83 [2018-04-11 09:53:18,668 INFO L226 Difference]: Without dead ends: 83 [2018-04-11 09:53:18,669 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=127, Invalid=803, Unknown=0, NotChecked=0, Total=930 [2018-04-11 09:53:18,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-04-11 09:53:18,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 75. [2018-04-11 09:53:18,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-04-11 09:53:18,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 85 transitions. [2018-04-11 09:53:18,672 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 85 transitions. Word has length 26 [2018-04-11 09:53:18,672 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:18,672 INFO L459 AbstractCegarLoop]: Abstraction has 75 states and 85 transitions. [2018-04-11 09:53:18,672 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-04-11 09:53:18,672 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 85 transitions. [2018-04-11 09:53:18,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-04-11 09:53:18,673 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:18,673 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:18,673 INFO L408 AbstractCegarLoop]: === Iteration 17 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:18,673 INFO L82 PathProgramCache]: Analyzing trace with hash -1838913673, now seen corresponding path program 1 times [2018-04-11 09:53:18,673 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:18,674 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:18,674 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:18,674 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:18,675 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:18,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:18,685 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:18,755 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:18,756 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 09:53:18,756 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 09:53:18,768 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:18,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:18,789 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 09:53:18,802 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:18,802 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:18,806 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:18,807 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-04-11 09:53:18,884 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:18,902 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 09:53:18,902 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 9] total 16 [2018-04-11 09:53:18,902 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-11 09:53:18,903 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-11 09:53:18,903 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=235, Unknown=0, NotChecked=0, Total=272 [2018-04-11 09:53:18,903 INFO L87 Difference]: Start difference. First operand 75 states and 85 transitions. Second operand 17 states. [2018-04-11 09:53:19,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:19,173 INFO L93 Difference]: Finished difference Result 87 states and 100 transitions. [2018-04-11 09:53:19,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-11 09:53:19,173 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 28 [2018-04-11 09:53:19,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:19,174 INFO L225 Difference]: With dead ends: 87 [2018-04-11 09:53:19,174 INFO L226 Difference]: Without dead ends: 87 [2018-04-11 09:53:19,174 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=110, Invalid=592, Unknown=0, NotChecked=0, Total=702 [2018-04-11 09:53:19,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-04-11 09:53:19,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 80. [2018-04-11 09:53:19,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-04-11 09:53:19,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 91 transitions. [2018-04-11 09:53:19,177 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 91 transitions. Word has length 28 [2018-04-11 09:53:19,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:19,177 INFO L459 AbstractCegarLoop]: Abstraction has 80 states and 91 transitions. [2018-04-11 09:53:19,177 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-11 09:53:19,177 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 91 transitions. [2018-04-11 09:53:19,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-11 09:53:19,178 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:19,178 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:19,178 INFO L408 AbstractCegarLoop]: === Iteration 18 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:19,178 INFO L82 PathProgramCache]: Analyzing trace with hash -1372572863, now seen corresponding path program 1 times [2018-04-11 09:53:19,178 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:19,178 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:19,179 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:19,179 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:19,179 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:19,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:19,189 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:19,321 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:19,322 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 09:53:19,322 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-04-11 09:53:19,322 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-11 09:53:19,322 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-11 09:53:19,322 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-04-11 09:53:19,322 INFO L87 Difference]: Start difference. First operand 80 states and 91 transitions. Second operand 12 states. [2018-04-11 09:53:19,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:19,451 INFO L93 Difference]: Finished difference Result 144 states and 161 transitions. [2018-04-11 09:53:19,452 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-04-11 09:53:19,452 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 29 [2018-04-11 09:53:19,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:19,452 INFO L225 Difference]: With dead ends: 144 [2018-04-11 09:53:19,452 INFO L226 Difference]: Without dead ends: 144 [2018-04-11 09:53:19,453 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=85, Invalid=335, Unknown=0, NotChecked=0, Total=420 [2018-04-11 09:53:19,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-04-11 09:53:19,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 131. [2018-04-11 09:53:19,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-04-11 09:53:19,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 150 transitions. [2018-04-11 09:53:19,455 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 150 transitions. Word has length 29 [2018-04-11 09:53:19,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:19,455 INFO L459 AbstractCegarLoop]: Abstraction has 131 states and 150 transitions. [2018-04-11 09:53:19,455 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-11 09:53:19,455 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 150 transitions. [2018-04-11 09:53:19,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-11 09:53:19,456 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:19,456 INFO L355 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:19,456 INFO L408 AbstractCegarLoop]: === Iteration 19 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:19,456 INFO L82 PathProgramCache]: Analyzing trace with hash -1128799700, now seen corresponding path program 2 times [2018-04-11 09:53:19,456 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:19,456 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:19,456 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:19,457 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:19,457 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:19,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:19,467 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:19,727 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:19,727 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 09:53:19,727 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 09:53:19,732 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-11 09:53:19,747 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-11 09:53:19,748 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-11 09:53:19,750 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 09:53:19,767 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:19,767 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:19,774 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:19,774 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:14 [2018-04-11 09:53:19,810 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-11 09:53:19,812 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-11 09:53:19,812 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:19,815 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:19,822 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 09:53:19,822 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:24 [2018-04-11 09:53:19,967 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-04-11 09:53:19,970 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:19,976 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 25 [2018-04-11 09:53:19,977 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-11 09:53:19,988 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:19,998 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:19,998 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:58 [2018-04-11 09:53:20,092 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:20,118 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 09:53:20,118 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14] total 24 [2018-04-11 09:53:20,118 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-04-11 09:53:20,118 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-04-11 09:53:20,118 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=528, Unknown=0, NotChecked=0, Total=600 [2018-04-11 09:53:20,119 INFO L87 Difference]: Start difference. First operand 131 states and 150 transitions. Second operand 25 states. [2018-04-11 09:53:20,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:20,507 INFO L93 Difference]: Finished difference Result 175 states and 200 transitions. [2018-04-11 09:53:20,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-04-11 09:53:20,507 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 29 [2018-04-11 09:53:20,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:20,508 INFO L225 Difference]: With dead ends: 175 [2018-04-11 09:53:20,508 INFO L226 Difference]: Without dead ends: 175 [2018-04-11 09:53:20,509 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 214 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=180, Invalid=1152, Unknown=0, NotChecked=0, Total=1332 [2018-04-11 09:53:20,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-04-11 09:53:20,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 137. [2018-04-11 09:53:20,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-04-11 09:53:20,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 158 transitions. [2018-04-11 09:53:20,514 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 158 transitions. Word has length 29 [2018-04-11 09:53:20,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:20,514 INFO L459 AbstractCegarLoop]: Abstraction has 137 states and 158 transitions. [2018-04-11 09:53:20,514 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-04-11 09:53:20,514 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 158 transitions. [2018-04-11 09:53:20,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-11 09:53:20,514 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:20,515 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:20,515 INFO L408 AbstractCegarLoop]: === Iteration 20 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:20,515 INFO L82 PathProgramCache]: Analyzing trace with hash 1116956099, now seen corresponding path program 1 times [2018-04-11 09:53:20,515 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:20,515 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:20,516 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:20,516 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-11 09:53:20,516 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:20,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:20,523 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:20,686 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:20,687 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 09:53:20,687 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-04-11 09:53:20,687 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-04-11 09:53:20,687 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-04-11 09:53:20,687 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2018-04-11 09:53:20,687 INFO L87 Difference]: Start difference. First operand 137 states and 158 transitions. Second operand 15 states. [2018-04-11 09:53:21,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:21,010 INFO L93 Difference]: Finished difference Result 180 states and 199 transitions. [2018-04-11 09:53:21,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-04-11 09:53:21,011 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 29 [2018-04-11 09:53:21,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:21,012 INFO L225 Difference]: With dead ends: 180 [2018-04-11 09:53:21,012 INFO L226 Difference]: Without dead ends: 180 [2018-04-11 09:53:21,012 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 199 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=233, Invalid=889, Unknown=0, NotChecked=0, Total=1122 [2018-04-11 09:53:21,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-04-11 09:53:21,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 157. [2018-04-11 09:53:21,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-04-11 09:53:21,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 178 transitions. [2018-04-11 09:53:21,016 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 178 transitions. Word has length 29 [2018-04-11 09:53:21,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:21,017 INFO L459 AbstractCegarLoop]: Abstraction has 157 states and 178 transitions. [2018-04-11 09:53:21,017 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-04-11 09:53:21,017 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 178 transitions. [2018-04-11 09:53:21,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-11 09:53:21,017 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:21,018 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:21,018 INFO L408 AbstractCegarLoop]: === Iteration 21 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:21,018 INFO L82 PathProgramCache]: Analyzing trace with hash 1335810817, now seen corresponding path program 1 times [2018-04-11 09:53:21,018 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:21,018 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:21,018 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:21,018 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:21,018 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:21,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:21,026 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:21,183 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:21,183 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 09:53:21,183 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 09:53:21,193 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:21,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:21,207 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 09:53:21,213 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:21,213 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:21,215 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:21,215 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-11 09:53:21,236 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:21,237 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:21,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-11 09:53:21,237 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:21,239 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:21,239 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:8 [2018-04-11 09:53:21,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-11 09:53:21,261 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-11 09:53:21,262 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:21,263 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:21,266 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 09:53:21,266 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:25 [2018-04-11 09:53:21,285 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 26 [2018-04-11 09:53:21,287 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-11 09:53:21,287 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:21,290 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:21,294 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-04-11 09:53:21,294 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:39, output treesize:35 [2018-04-11 09:53:21,419 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 28 [2018-04-11 09:53:21,424 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 13 [2018-04-11 09:53:21,425 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-11 09:53:21,429 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-04-11 09:53:21,430 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:21,432 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:21,438 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:21,438 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 6 variables, input treesize:52, output treesize:29 [2018-04-11 09:53:21,468 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:21,485 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 09:53:21,485 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14] total 23 [2018-04-11 09:53:21,486 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-11 09:53:21,486 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-11 09:53:21,486 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=495, Unknown=0, NotChecked=0, Total=552 [2018-04-11 09:53:21,486 INFO L87 Difference]: Start difference. First operand 157 states and 178 transitions. Second operand 24 states. [2018-04-11 09:53:22,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:22,058 INFO L93 Difference]: Finished difference Result 165 states and 187 transitions. [2018-04-11 09:53:22,058 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-04-11 09:53:22,058 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 29 [2018-04-11 09:53:22,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:22,059 INFO L225 Difference]: With dead ends: 165 [2018-04-11 09:53:22,059 INFO L226 Difference]: Without dead ends: 165 [2018-04-11 09:53:22,059 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 211 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=174, Invalid=1086, Unknown=0, NotChecked=0, Total=1260 [2018-04-11 09:53:22,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-04-11 09:53:22,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 162. [2018-04-11 09:53:22,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-04-11 09:53:22,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 183 transitions. [2018-04-11 09:53:22,063 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 183 transitions. Word has length 29 [2018-04-11 09:53:22,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:22,064 INFO L459 AbstractCegarLoop]: Abstraction has 162 states and 183 transitions. [2018-04-11 09:53:22,064 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-11 09:53:22,064 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 183 transitions. [2018-04-11 09:53:22,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-04-11 09:53:22,064 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:22,064 INFO L355 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:22,064 INFO L408 AbstractCegarLoop]: === Iteration 22 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:22,065 INFO L82 PathProgramCache]: Analyzing trace with hash 1522064694, now seen corresponding path program 3 times [2018-04-11 09:53:22,065 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:22,065 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:22,065 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:22,065 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:22,065 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:22,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:22,074 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:22,411 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:22,411 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 09:53:22,411 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 09:53:22,416 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-11 09:53:22,432 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-04-11 09:53:22,432 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-11 09:53:22,434 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 09:53:22,437 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:22,437 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:22,441 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:22,441 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:14 [2018-04-11 09:53:22,474 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-11 09:53:22,476 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-11 09:53:22,476 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:22,477 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:22,481 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 09:53:22,481 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:24 [2018-04-11 09:53:22,764 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 26 [2018-04-11 09:53:22,779 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 4 case distinctions, treesize of input 26 treesize of output 58 [2018-04-11 09:53:22,781 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 10 xjuncts. [2018-04-11 09:53:22,807 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:22,829 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:22,829 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:60, output treesize:61 [2018-04-11 09:53:22,938 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:22,956 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 09:53:22,956 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 17] total 29 [2018-04-11 09:53:22,957 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-04-11 09:53:22,957 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-04-11 09:53:22,957 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=798, Unknown=0, NotChecked=0, Total=870 [2018-04-11 09:53:22,957 INFO L87 Difference]: Start difference. First operand 162 states and 183 transitions. Second operand 30 states. [2018-04-11 09:53:23,324 WARN L151 SmtUtils]: Spent 231ms on a formula simplification. DAG size of input: 53 DAG size of output 29 [2018-04-11 09:53:26,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:26,727 INFO L93 Difference]: Finished difference Result 213 states and 240 transitions. [2018-04-11 09:53:26,728 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-11 09:53:26,729 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 32 [2018-04-11 09:53:26,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:26,729 INFO L225 Difference]: With dead ends: 213 [2018-04-11 09:53:26,729 INFO L226 Difference]: Without dead ends: 213 [2018-04-11 09:53:26,730 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 264 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=266, Invalid=2085, Unknown=1, NotChecked=0, Total=2352 [2018-04-11 09:53:26,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-04-11 09:53:26,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 168. [2018-04-11 09:53:26,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-04-11 09:53:26,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 191 transitions. [2018-04-11 09:53:26,733 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 191 transitions. Word has length 32 [2018-04-11 09:53:26,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:26,733 INFO L459 AbstractCegarLoop]: Abstraction has 168 states and 191 transitions. [2018-04-11 09:53:26,733 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-04-11 09:53:26,733 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 191 transitions. [2018-04-11 09:53:26,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-04-11 09:53:26,733 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:26,733 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:26,734 INFO L408 AbstractCegarLoop]: === Iteration 23 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:26,734 INFO L82 PathProgramCache]: Analyzing trace with hash 1308976227, now seen corresponding path program 1 times [2018-04-11 09:53:26,734 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:26,734 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:26,734 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:26,734 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-11 09:53:26,734 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:26,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:26,741 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:26,901 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:26,901 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 09:53:26,901 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 09:53:26,909 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:26,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:26,924 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 09:53:26,927 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:26,927 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:26,930 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:26,931 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:26,933 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:26,933 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:18, output treesize:13 [2018-04-11 09:53:26,958 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:26,958 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:26,959 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-04-11 09:53:26,959 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:26,966 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:26,966 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:26,967 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-11 09:53:26,967 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:26,970 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:26,970 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:27, output treesize:13 [2018-04-11 09:53:27,116 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:27,133 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 09:53:27,134 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15] total 28 [2018-04-11 09:53:27,134 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-04-11 09:53:27,134 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-04-11 09:53:27,134 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=740, Unknown=0, NotChecked=0, Total=812 [2018-04-11 09:53:27,134 INFO L87 Difference]: Start difference. First operand 168 states and 191 transitions. Second operand 29 states. [2018-04-11 09:53:27,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:27,890 INFO L93 Difference]: Finished difference Result 209 states and 238 transitions. [2018-04-11 09:53:27,890 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-11 09:53:27,890 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 33 [2018-04-11 09:53:27,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:27,891 INFO L225 Difference]: With dead ends: 209 [2018-04-11 09:53:27,891 INFO L226 Difference]: Without dead ends: 209 [2018-04-11 09:53:27,891 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 443 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=289, Invalid=2161, Unknown=0, NotChecked=0, Total=2450 [2018-04-11 09:53:27,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2018-04-11 09:53:27,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 172. [2018-04-11 09:53:27,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-04-11 09:53:27,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 197 transitions. [2018-04-11 09:53:27,895 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 197 transitions. Word has length 33 [2018-04-11 09:53:27,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:27,895 INFO L459 AbstractCegarLoop]: Abstraction has 172 states and 197 transitions. [2018-04-11 09:53:27,895 INFO L460 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-04-11 09:53:27,895 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 197 transitions. [2018-04-11 09:53:27,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-04-11 09:53:27,895 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:27,895 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:27,895 INFO L408 AbstractCegarLoop]: === Iteration 24 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:27,895 INFO L82 PathProgramCache]: Analyzing trace with hash 2061021759, now seen corresponding path program 2 times [2018-04-11 09:53:27,896 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:27,896 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:27,896 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:27,896 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:27,896 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:27,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:27,904 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:28,187 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:28,187 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 09:53:28,187 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 09:53:28,191 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-11 09:53:28,206 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-11 09:53:28,206 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-11 09:53:28,208 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 09:53:28,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:28,211 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:28,215 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:28,215 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:28,217 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:28,217 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-04-11 09:53:28,232 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:28,233 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:28,233 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-11 09:53:28,233 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:28,238 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-11 09:53:28,238 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:28,241 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:28,242 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:13 [2018-04-11 09:53:28,269 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-04-11 09:53:28,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-04-11 09:53:28,270 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:28,272 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:28,275 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:28,275 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:27, output treesize:20 [2018-04-11 09:53:28,295 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-04-11 09:53:28,296 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-11 09:53:28,296 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:28,299 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:28,303 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-11 09:53:28,303 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:34, output treesize:30 [2018-04-11 09:53:28,433 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 32 [2018-04-11 09:53:28,440 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 25 [2018-04-11 09:53:28,440 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-11 09:53:28,448 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:28,459 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-04-11 09:53:28,459 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:43, output treesize:51 [2018-04-11 09:53:28,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-04-11 09:53:28,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 14 [2018-04-11 09:53:28,517 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-11 09:53:28,519 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:28,524 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:28,524 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:38 [2018-04-11 09:53:28,595 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:28,612 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 09:53:28,612 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 16] total 29 [2018-04-11 09:53:28,613 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-04-11 09:53:28,613 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-04-11 09:53:28,613 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=793, Unknown=0, NotChecked=0, Total=870 [2018-04-11 09:53:28,613 INFO L87 Difference]: Start difference. First operand 172 states and 197 transitions. Second operand 30 states. [2018-04-11 09:53:29,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:29,137 INFO L93 Difference]: Finished difference Result 194 states and 224 transitions. [2018-04-11 09:53:29,138 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-11 09:53:29,138 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 34 [2018-04-11 09:53:29,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:29,138 INFO L225 Difference]: With dead ends: 194 [2018-04-11 09:53:29,138 INFO L226 Difference]: Without dead ends: 194 [2018-04-11 09:53:29,139 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 20 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 294 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=181, Invalid=1541, Unknown=0, NotChecked=0, Total=1722 [2018-04-11 09:53:29,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-04-11 09:53:29,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 182. [2018-04-11 09:53:29,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-04-11 09:53:29,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 210 transitions. [2018-04-11 09:53:29,143 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 210 transitions. Word has length 34 [2018-04-11 09:53:29,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:29,143 INFO L459 AbstractCegarLoop]: Abstraction has 182 states and 210 transitions. [2018-04-11 09:53:29,144 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-04-11 09:53:29,144 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 210 transitions. [2018-04-11 09:53:29,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-04-11 09:53:29,144 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:29,145 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:29,145 INFO L408 AbstractCegarLoop]: === Iteration 25 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:29,145 INFO L82 PathProgramCache]: Analyzing trace with hash -4260326, now seen corresponding path program 1 times [2018-04-11 09:53:29,145 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:29,145 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:29,145 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:29,146 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-11 09:53:29,146 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:29,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:29,153 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:29,209 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:29,209 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 09:53:29,209 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-11 09:53:29,209 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-11 09:53:29,210 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-11 09:53:29,210 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-11 09:53:29,210 INFO L87 Difference]: Start difference. First operand 182 states and 210 transitions. Second operand 6 states. [2018-04-11 09:53:29,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:29,271 INFO L93 Difference]: Finished difference Result 181 states and 209 transitions. [2018-04-11 09:53:29,271 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-11 09:53:29,271 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-04-11 09:53:29,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:29,272 INFO L225 Difference]: With dead ends: 181 [2018-04-11 09:53:29,272 INFO L226 Difference]: Without dead ends: 119 [2018-04-11 09:53:29,272 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-04-11 09:53:29,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-04-11 09:53:29,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 114. [2018-04-11 09:53:29,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-04-11 09:53:29,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 124 transitions. [2018-04-11 09:53:29,274 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 124 transitions. Word has length 35 [2018-04-11 09:53:29,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:29,274 INFO L459 AbstractCegarLoop]: Abstraction has 114 states and 124 transitions. [2018-04-11 09:53:29,274 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-11 09:53:29,274 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 124 transitions. [2018-04-11 09:53:29,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-04-11 09:53:29,275 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:29,275 INFO L355 BasicCegarLoop]: trace histogram [6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:29,275 INFO L408 AbstractCegarLoop]: === Iteration 26 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:29,275 INFO L82 PathProgramCache]: Analyzing trace with hash 1859554796, now seen corresponding path program 4 times [2018-04-11 09:53:29,275 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:29,275 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:29,276 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:29,276 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 09:53:29,276 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:29,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:29,287 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:29,755 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:29,755 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 09:53:29,755 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 09:53:29,760 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-11 09:53:29,772 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-11 09:53:29,772 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-11 09:53:29,774 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 09:53:29,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:29,778 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:29,782 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:29,782 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:14 [2018-04-11 09:53:29,821 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-11 09:53:29,822 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-11 09:53:29,823 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:29,823 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:29,827 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 09:53:29,827 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:24 [2018-04-11 09:53:30,094 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 38 [2018-04-11 09:53:30,096 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:30,096 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:30,097 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:30,097 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:30,098 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:30,099 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:30,106 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 12 disjoint index pairs (out of 10 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 93 [2018-04-11 09:53:30,106 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-11 09:53:30,128 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:30,145 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:30,145 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:69, output treesize:73 [2018-04-11 09:53:30,241 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:30,270 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 09:53:30,270 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 18] total 33 [2018-04-11 09:53:30,270 INFO L442 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-04-11 09:53:30,270 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-04-11 09:53:30,270 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=128, Invalid=994, Unknown=0, NotChecked=0, Total=1122 [2018-04-11 09:53:30,271 INFO L87 Difference]: Start difference. First operand 114 states and 124 transitions. Second operand 34 states. [2018-04-11 09:53:31,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:31,496 INFO L93 Difference]: Finished difference Result 150 states and 163 transitions. [2018-04-11 09:53:31,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-04-11 09:53:31,497 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 35 [2018-04-11 09:53:31,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:31,497 INFO L225 Difference]: With dead ends: 150 [2018-04-11 09:53:31,497 INFO L226 Difference]: Without dead ends: 150 [2018-04-11 09:53:31,498 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 444 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=333, Invalid=2319, Unknown=0, NotChecked=0, Total=2652 [2018-04-11 09:53:31,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-04-11 09:53:31,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 126. [2018-04-11 09:53:31,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-11 09:53:31,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 138 transitions. [2018-04-11 09:53:31,499 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 138 transitions. Word has length 35 [2018-04-11 09:53:31,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:31,500 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 138 transitions. [2018-04-11 09:53:31,500 INFO L460 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-04-11 09:53:31,500 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 138 transitions. [2018-04-11 09:53:31,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-04-11 09:53:31,500 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:31,500 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:31,500 INFO L408 AbstractCegarLoop]: === Iteration 27 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:31,500 INFO L82 PathProgramCache]: Analyzing trace with hash 1280639017, now seen corresponding path program 2 times [2018-04-11 09:53:31,500 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:31,500 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:31,501 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:31,501 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-11 09:53:31,501 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:31,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:31,507 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:31,778 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:31,778 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 09:53:31,778 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 09:53:31,783 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-11 09:53:31,798 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-11 09:53:31,798 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-11 09:53:31,800 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 09:53:31,804 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:31,804 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:31,809 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:31,809 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:31,812 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:31,812 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:21, output treesize:16 [2018-04-11 09:53:31,841 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:31,842 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:31,842 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-11 09:53:31,842 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:31,847 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:31,847 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-04-11 09:53:31,847 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:31,852 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:31,852 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:30, output treesize:16 [2018-04-11 09:53:31,884 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-11 09:53:31,885 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-11 09:53:31,885 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:31,886 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:31,889 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 09:53:31,889 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:30, output treesize:26 [2018-04-11 09:53:31,948 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-04-11 09:53:31,952 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 15 [2018-04-11 09:53:31,952 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-11 09:53:31,956 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:31,961 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:31,961 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:33, output treesize:39 [2018-04-11 09:53:32,103 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:32,120 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 09:53:32,120 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17] total 33 [2018-04-11 09:53:32,120 INFO L442 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-04-11 09:53:32,120 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-04-11 09:53:32,121 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=1036, Unknown=0, NotChecked=0, Total=1122 [2018-04-11 09:53:32,121 INFO L87 Difference]: Start difference. First operand 126 states and 138 transitions. Second operand 34 states. [2018-04-11 09:53:33,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:33,376 INFO L93 Difference]: Finished difference Result 160 states and 172 transitions. [2018-04-11 09:53:33,377 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-11 09:53:33,377 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 36 [2018-04-11 09:53:33,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:33,377 INFO L225 Difference]: With dead ends: 160 [2018-04-11 09:53:33,377 INFO L226 Difference]: Without dead ends: 160 [2018-04-11 09:53:33,378 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 896 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=390, Invalid=3392, Unknown=0, NotChecked=0, Total=3782 [2018-04-11 09:53:33,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-04-11 09:53:33,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 126. [2018-04-11 09:53:33,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-11 09:53:33,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 138 transitions. [2018-04-11 09:53:33,380 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 138 transitions. Word has length 36 [2018-04-11 09:53:33,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:33,381 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 138 transitions. [2018-04-11 09:53:33,381 INFO L460 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-04-11 09:53:33,381 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 138 transitions. [2018-04-11 09:53:33,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-04-11 09:53:33,381 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:33,381 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:33,381 INFO L408 AbstractCegarLoop]: === Iteration 28 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:33,381 INFO L82 PathProgramCache]: Analyzing trace with hash -1225150015, now seen corresponding path program 3 times [2018-04-11 09:53:33,381 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:33,381 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:33,382 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:33,382 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-11 09:53:33,382 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:33,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:33,395 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:33,730 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-11 09:53:33,730 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 09:53:33,731 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 09:53:33,738 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-11 09:53:33,762 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-04-11 09:53:33,762 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-11 09:53:33,764 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 09:53:33,767 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:33,767 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:33,771 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:33,771 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:33,773 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:33,773 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-04-11 09:53:33,798 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:33,799 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:33,799 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-11 09:53:33,800 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:33,804 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-11 09:53:33,805 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:33,807 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:33,807 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:13 [2018-04-11 09:53:33,836 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-04-11 09:53:33,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-04-11 09:53:33,837 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:33,844 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:33,848 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 09:53:33,848 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:23 [2018-04-11 09:53:33,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-04-11 09:53:33,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-11 09:53:33,873 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:33,876 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:33,882 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-11 09:53:33,882 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:37, output treesize:33 [2018-04-11 09:53:34,024 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-04-11 09:53:34,034 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 25 [2018-04-11 09:53:34,034 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-11 09:53:34,052 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:34,068 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-04-11 09:53:34,068 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:44, output treesize:57 [2018-04-11 09:53:34,108 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 24 [2018-04-11 09:53:34,109 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-11 09:53:34,109 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:34,112 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:34,115 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:34,115 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:27, output treesize:16 [2018-04-11 09:53:34,141 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-04-11 09:53:34,146 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 14 [2018-04-11 09:53:34,146 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-11 09:53:34,148 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:34,152 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:34,152 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:32 [2018-04-11 09:53:34,191 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-04-11 09:53:34,223 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 09:53:34,223 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16] total 29 [2018-04-11 09:53:34,223 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-04-11 09:53:34,224 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-04-11 09:53:34,224 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=777, Unknown=0, NotChecked=0, Total=870 [2018-04-11 09:53:34,224 INFO L87 Difference]: Start difference. First operand 126 states and 138 transitions. Second operand 30 states. [2018-04-11 09:53:34,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:34,851 INFO L93 Difference]: Finished difference Result 125 states and 136 transitions. [2018-04-11 09:53:34,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-11 09:53:34,888 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 39 [2018-04-11 09:53:34,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:34,889 INFO L225 Difference]: With dead ends: 125 [2018-04-11 09:53:34,889 INFO L226 Difference]: Without dead ends: 95 [2018-04-11 09:53:34,889 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 26 SyntacticMatches, 3 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 346 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=243, Invalid=1479, Unknown=0, NotChecked=0, Total=1722 [2018-04-11 09:53:34,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-04-11 09:53:34,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 86. [2018-04-11 09:53:34,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-04-11 09:53:34,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 92 transitions. [2018-04-11 09:53:34,891 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 92 transitions. Word has length 39 [2018-04-11 09:53:34,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:34,892 INFO L459 AbstractCegarLoop]: Abstraction has 86 states and 92 transitions. [2018-04-11 09:53:34,892 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-04-11 09:53:34,892 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 92 transitions. [2018-04-11 09:53:34,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-04-11 09:53:34,892 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:34,892 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:34,893 INFO L408 AbstractCegarLoop]: === Iteration 29 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:34,893 INFO L82 PathProgramCache]: Analyzing trace with hash -1099594077, now seen corresponding path program 3 times [2018-04-11 09:53:34,893 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:34,893 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:34,894 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:34,894 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-11 09:53:34,894 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:34,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:34,906 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:35,488 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:35,488 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 09:53:35,488 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 09:53:35,493 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-11 09:53:35,515 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-04-11 09:53:35,515 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-11 09:53:35,518 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 09:53:35,534 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:35,534 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:35,560 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:35,560 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:35,565 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:35,565 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:24, output treesize:19 [2018-04-11 09:53:35,623 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:35,623 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:35,624 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-04-11 09:53:35,624 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:35,634 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:35,635 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:35,635 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-11 09:53:35,635 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:35,641 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:35,641 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:33, output treesize:19 [2018-04-11 09:53:35,691 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-11 09:53:35,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-11 09:53:35,695 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:35,697 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:35,703 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 09:53:35,704 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:33, output treesize:29 [2018-04-11 09:53:35,926 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-04-11 09:53:35,940 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 29 [2018-04-11 09:53:35,941 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 3 xjuncts. [2018-04-11 09:53:35,953 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:35,975 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:35,975 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:43, output treesize:99 [2018-04-11 09:53:36,296 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:36,323 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 09:53:36,323 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 19] total 37 [2018-04-11 09:53:36,324 INFO L442 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-04-11 09:53:36,324 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-04-11 09:53:36,324 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=1303, Unknown=0, NotChecked=0, Total=1406 [2018-04-11 09:53:36,324 INFO L87 Difference]: Start difference. First operand 86 states and 92 transitions. Second operand 38 states. [2018-04-11 09:53:37,377 WARN L151 SmtUtils]: Spent 451ms on a formula simplification. DAG size of input: 85 DAG size of output 61 [2018-04-11 09:53:37,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:37,899 INFO L93 Difference]: Finished difference Result 101 states and 107 transitions. [2018-04-11 09:53:37,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-11 09:53:37,899 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 39 [2018-04-11 09:53:37,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:37,900 INFO L225 Difference]: With dead ends: 101 [2018-04-11 09:53:37,900 INFO L226 Difference]: Without dead ends: 101 [2018-04-11 09:53:37,900 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 648 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=268, Invalid=2594, Unknown=0, NotChecked=0, Total=2862 [2018-04-11 09:53:37,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-04-11 09:53:37,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 96. [2018-04-11 09:53:37,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-04-11 09:53:37,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 102 transitions. [2018-04-11 09:53:37,902 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 102 transitions. Word has length 39 [2018-04-11 09:53:37,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:37,903 INFO L459 AbstractCegarLoop]: Abstraction has 96 states and 102 transitions. [2018-04-11 09:53:37,903 INFO L460 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-04-11 09:53:37,903 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 102 transitions. [2018-04-11 09:53:37,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-04-11 09:53:37,903 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:37,903 INFO L355 BasicCegarLoop]: trace histogram [8, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:37,903 INFO L408 AbstractCegarLoop]: === Iteration 30 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:37,903 INFO L82 PathProgramCache]: Analyzing trace with hash 146106796, now seen corresponding path program 5 times [2018-04-11 09:53:37,903 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:37,903 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:37,904 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:37,904 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-11 09:53:37,904 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:37,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:37,918 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:39,018 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:39,018 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 09:53:39,019 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 09:53:39,024 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-11 09:53:39,040 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2018-04-11 09:53:39,041 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-11 09:53:39,042 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 09:53:39,045 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:39,045 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:39,050 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:39,050 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:14 [2018-04-11 09:53:39,102 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-11 09:53:39,103 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-11 09:53:39,104 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:39,105 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:39,109 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 09:53:39,109 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:24 [2018-04-11 09:53:40,149 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 54 [2018-04-11 09:53:40,153 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:40,154 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:40,154 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:40,155 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:40,155 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:40,156 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:40,156 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:40,157 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:40,157 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:40,158 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:40,158 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:40,159 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:40,159 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:40,160 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:40,160 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:40,172 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 25 disjoint index pairs (out of 21 index pairs), introduced 5 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 187 [2018-04-11 09:53:40,173 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-11 09:53:40,222 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:40,250 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:40,250 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:89, output treesize:101 [2018-04-11 09:53:40,373 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:40,390 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 09:53:40,391 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 22] total 41 [2018-04-11 09:53:40,391 INFO L442 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-04-11 09:53:40,391 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-04-11 09:53:40,391 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=216, Invalid=1505, Unknown=1, NotChecked=0, Total=1722 [2018-04-11 09:53:40,391 INFO L87 Difference]: Start difference. First operand 96 states and 102 transitions. Second operand 42 states. [2018-04-11 09:53:40,752 WARN L151 SmtUtils]: Spent 189ms on a formula simplification. DAG size of input: 77 DAG size of output 29 [2018-04-11 09:53:43,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:43,530 INFO L93 Difference]: Finished difference Result 152 states and 163 transitions. [2018-04-11 09:53:43,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-04-11 09:53:43,531 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 41 [2018-04-11 09:53:43,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:43,531 INFO L225 Difference]: With dead ends: 152 [2018-04-11 09:53:43,531 INFO L226 Difference]: Without dead ends: 152 [2018-04-11 09:53:43,532 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 991 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=630, Invalid=4061, Unknown=1, NotChecked=0, Total=4692 [2018-04-11 09:53:43,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-04-11 09:53:43,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 120. [2018-04-11 09:53:43,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-04-11 09:53:43,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 130 transitions. [2018-04-11 09:53:43,534 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 130 transitions. Word has length 41 [2018-04-11 09:53:43,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:43,534 INFO L459 AbstractCegarLoop]: Abstraction has 120 states and 130 transitions. [2018-04-11 09:53:43,534 INFO L460 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-04-11 09:53:43,534 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 130 transitions. [2018-04-11 09:53:43,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-04-11 09:53:43,535 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:43,535 INFO L355 BasicCegarLoop]: trace histogram [5, 5, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:43,535 INFO L408 AbstractCegarLoop]: === Iteration 31 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:43,535 INFO L82 PathProgramCache]: Analyzing trace with hash -713640471, now seen corresponding path program 4 times [2018-04-11 09:53:43,535 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:43,535 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:43,535 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:43,536 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-11 09:53:43,536 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:43,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:43,546 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:44,292 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:44,292 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 09:53:44,292 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 09:53:44,297 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-11 09:53:44,312 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-11 09:53:44,312 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-11 09:53:44,315 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 09:53:44,317 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:44,317 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:44,322 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:44,322 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:44,325 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:44,325 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:21, output treesize:16 [2018-04-11 09:53:44,365 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:44,366 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:44,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-04-11 09:53:44,366 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:44,374 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:44,374 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:44,375 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-11 09:53:44,375 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:44,379 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:44,379 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:30, output treesize:16 [2018-04-11 09:53:44,425 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-11 09:53:44,426 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-11 09:53:44,426 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:44,427 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:44,431 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 09:53:44,431 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:30, output treesize:26 [2018-04-11 09:53:45,330 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 30 [2018-04-11 09:53:45,342 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:45,343 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:45,343 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:45,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 58 [2018-04-11 09:53:45,350 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-11 09:53:45,365 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:45,380 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:45,381 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:61, output treesize:84 [2018-04-11 09:53:45,623 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:45,641 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 09:53:45,641 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 21] total 41 [2018-04-11 09:53:45,641 INFO L442 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-04-11 09:53:45,641 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-04-11 09:53:45,642 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=108, Invalid=1612, Unknown=2, NotChecked=0, Total=1722 [2018-04-11 09:53:45,642 INFO L87 Difference]: Start difference. First operand 120 states and 130 transitions. Second operand 42 states. [2018-04-11 09:53:46,241 WARN L151 SmtUtils]: Spent 167ms on a formula simplification. DAG size of input: 80 DAG size of output 55 [2018-04-11 09:53:47,036 WARN L151 SmtUtils]: Spent 400ms on a formula simplification. DAG size of input: 97 DAG size of output 79 [2018-04-11 09:53:48,038 WARN L151 SmtUtils]: Spent 373ms on a formula simplification. DAG size of input: 81 DAG size of output 64 [2018-04-11 09:53:48,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:48,360 INFO L93 Difference]: Finished difference Result 139 states and 149 transitions. [2018-04-11 09:53:48,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-04-11 09:53:48,361 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 42 [2018-04-11 09:53:48,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:48,361 INFO L225 Difference]: With dead ends: 139 [2018-04-11 09:53:48,361 INFO L226 Difference]: Without dead ends: 139 [2018-04-11 09:53:48,362 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1007 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=346, Invalid=3942, Unknown=2, NotChecked=0, Total=4290 [2018-04-11 09:53:48,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-04-11 09:53:48,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 125. [2018-04-11 09:53:48,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-11 09:53:48,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 135 transitions. [2018-04-11 09:53:48,363 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 135 transitions. Word has length 42 [2018-04-11 09:53:48,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:48,363 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 135 transitions. [2018-04-11 09:53:48,363 INFO L460 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-04-11 09:53:48,364 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 135 transitions. [2018-04-11 09:53:48,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-04-11 09:53:48,364 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:48,364 INFO L355 BasicCegarLoop]: trace histogram [6, 6, 5, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:48,364 INFO L408 AbstractCegarLoop]: === Iteration 32 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:48,364 INFO L82 PathProgramCache]: Analyzing trace with hash -397215517, now seen corresponding path program 5 times [2018-04-11 09:53:48,364 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:48,364 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:48,364 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:48,365 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-11 09:53:48,365 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:48,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:48,375 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:49,606 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:49,607 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 09:53:49,607 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 09:53:49,612 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-11 09:53:49,629 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-04-11 09:53:49,629 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-11 09:53:49,631 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 09:53:49,635 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:49,635 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:49,642 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:49,642 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:49,647 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:49,647 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:24, output treesize:19 [2018-04-11 09:53:49,696 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:49,696 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:49,697 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-11 09:53:49,697 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:49,702 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:49,703 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-04-11 09:53:49,703 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:49,709 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:49,709 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:33, output treesize:19 [2018-04-11 09:53:49,765 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-11 09:53:49,766 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-11 09:53:49,766 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:49,767 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:49,771 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 09:53:49,771 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:33, output treesize:29 [2018-04-11 09:53:50,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 31 [2018-04-11 09:53:50,128 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:50,128 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:50,129 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:50,137 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 12 disjoint index pairs (out of 10 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 53 [2018-04-11 09:53:50,137 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-11 09:53:50,154 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:50,170 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-11 09:53:50,170 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:59, output treesize:151 [2018-04-11 09:53:50,396 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:50,414 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 09:53:50,414 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 22] total 44 [2018-04-11 09:53:50,414 INFO L442 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-04-11 09:53:50,414 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-04-11 09:53:50,415 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=123, Invalid=1857, Unknown=0, NotChecked=0, Total=1980 [2018-04-11 09:53:50,415 INFO L87 Difference]: Start difference. First operand 125 states and 135 transitions. Second operand 45 states. [2018-04-11 09:53:51,690 WARN L151 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 114 DAG size of output 74 [2018-04-11 09:53:52,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 09:53:52,998 INFO L93 Difference]: Finished difference Result 163 states and 173 transitions. [2018-04-11 09:53:52,998 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-04-11 09:53:52,998 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 45 [2018-04-11 09:53:52,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 09:53:52,998 INFO L225 Difference]: With dead ends: 163 [2018-04-11 09:53:52,998 INFO L226 Difference]: Without dead ends: 163 [2018-04-11 09:53:52,999 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1500 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=485, Invalid=5521, Unknown=0, NotChecked=0, Total=6006 [2018-04-11 09:53:53,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-04-11 09:53:53,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 125. [2018-04-11 09:53:53,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-11 09:53:53,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 135 transitions. [2018-04-11 09:53:53,002 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 135 transitions. Word has length 45 [2018-04-11 09:53:53,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 09:53:53,002 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 135 transitions. [2018-04-11 09:53:53,002 INFO L460 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-04-11 09:53:53,002 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 135 transitions. [2018-04-11 09:53:53,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-04-11 09:53:53,003 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 09:53:53,003 INFO L355 BasicCegarLoop]: trace histogram [8, 8, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 09:53:53,003 INFO L408 AbstractCegarLoop]: === Iteration 33 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-11 09:53:53,003 INFO L82 PathProgramCache]: Analyzing trace with hash 945928995, now seen corresponding path program 6 times [2018-04-11 09:53:53,003 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 09:53:53,003 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 09:53:53,004 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:53,004 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-11 09:53:53,004 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 09:53:53,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 09:53:53,028 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 09:53:53,487 WARN L151 SmtUtils]: Spent 172ms on a formula simplification. DAG size of input: 88 DAG size of output 66 [2018-04-11 09:53:53,734 WARN L151 SmtUtils]: Spent 104ms on a formula simplification. DAG size of input: 68 DAG size of output 55 [2018-04-11 09:53:53,870 WARN L151 SmtUtils]: Spent 120ms on a formula simplification. DAG size of input: 70 DAG size of output 55 [2018-04-11 09:53:53,999 WARN L151 SmtUtils]: Spent 112ms on a formula simplification. DAG size of input: 83 DAG size of output 58 [2018-04-11 09:53:54,120 WARN L151 SmtUtils]: Spent 101ms on a formula simplification. DAG size of input: 85 DAG size of output 58 [2018-04-11 09:53:54,578 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 0 proven. 88 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 09:53:54,578 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 09:53:54,578 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 09:53:54,583 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-11 09:53:54,618 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-04-11 09:53:54,618 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-11 09:53:54,621 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 09:53:54,696 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:54,696 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:54,719 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:54,719 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:21, output treesize:20 [2018-04-11 09:53:54,783 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:54,783 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 09:53:54,784 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-11 09:53:54,784 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:54,790 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 09:53:54,790 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:54,796 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:54,796 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:34, output treesize:24 [2018-04-11 09:53:54,869 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-11 09:53:54,870 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-11 09:53:54,870 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:54,871 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:54,877 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 09:53:54,877 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:34 [2018-04-11 09:53:54,920 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 26 [2018-04-11 09:53:54,922 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-11 09:53:54,922 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 09:53:54,928 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 09:53:54,935 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-11 09:53:54,935 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:48, output treesize:44 [2018-04-11 09:53:56,209 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 60 [2018-04-11 09:53:56,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 12 disjoint index pairs (out of 21 index pairs), introduced 6 new quantified variables, introduced 15 case distinctions, treesize of input 44 treesize of output 181 [2018-04-11 09:53:56,273 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 15 [2018-04-11 09:53:56,533 WARN L152 XnfTransformerHelper]: Simplifying disjunction of 32768 conjuctions. This might take some time... [2018-04-11 09:56:33,953 INFO L170 XnfTransformerHelper]: Simplified to disjunction of 32768 conjuctions. Received shutdown request... [2018-04-11 09:56:39,592 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 32768 xjuncts. Cannot interrupt operation gracefully because timeout expired. Forcing shutdown