java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv --cacsl2boogietranslator.bitprecise.bitfields false -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_Array.epf -i ../../../trunk/examples/svcomp/array-memsafety/add_last-alloca_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-666feb3-m [2018-04-11 12:47:40,498 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-11 12:47:40,500 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-11 12:47:40,512 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-11 12:47:40,512 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-11 12:47:40,513 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-11 12:47:40,514 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-11 12:47:40,516 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-11 12:47:40,517 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-11 12:47:40,518 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-11 12:47:40,519 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-11 12:47:40,519 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-11 12:47:40,520 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-11 12:47:40,521 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-11 12:47:40,521 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-11 12:47:40,523 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-11 12:47:40,524 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-11 12:47:40,525 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-11 12:47:40,526 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-11 12:47:40,527 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-11 12:47:40,529 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-04-11 12:47:40,534 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_Array.epf [2018-04-11 12:47:40,554 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-11 12:47:40,554 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-11 12:47:40,555 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-11 12:47:40,555 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-11 12:47:40,555 INFO L133 SettingsManager]: * Use SBE=true [2018-04-11 12:47:40,556 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-11 12:47:40,556 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-11 12:47:40,556 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-11 12:47:40,556 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-11 12:47:40,556 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-11 12:47:40,556 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-11 12:47:40,556 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-11 12:47:40,557 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-11 12:47:40,557 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-11 12:47:40,557 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-11 12:47:40,557 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-11 12:47:40,557 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-11 12:47:40,557 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-11 12:47:40,557 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-11 12:47:40,558 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-11 12:47:40,558 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-11 12:47:40,558 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=Craig_TreeInterpolation Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Bitprecise bitfields -> false [2018-04-11 12:47:40,587 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-11 12:47:40,601 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-11 12:47:40,607 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-11 12:47:40,608 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-11 12:47:40,609 INFO L276 PluginConnector]: CDTParser initialized [2018-04-11 12:47:40,609 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-memsafety/add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:40,898 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG34231dbdc [2018-04-11 12:47:41,032 INFO L287 CDTParser]: IsIndexed: true [2018-04-11 12:47:41,032 INFO L288 CDTParser]: Found 1 translation units. [2018-04-11 12:47:41,033 INFO L168 CDTParser]: Scanning add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,041 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-11 12:47:41,041 INFO L215 ultiparseSymbolTable]: [2018-04-11 12:47:41,041 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-11 12:47:41,041 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____bswap_64 ('__bswap_64') in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,041 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,042 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____bswap_32 ('__bswap_32') in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,042 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-11 12:47:41,042 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____int32_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,042 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__u_int in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,042 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__mode_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,042 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____rlim_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,042 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__div_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,042 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__pthread_mutex_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,042 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__fsblkcnt_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,042 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__key_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,043 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____u_short in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,043 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__size_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,043 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__lldiv_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,043 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__uid_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,043 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__time_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,043 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__pthread_rwlock_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,043 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__blksize_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,043 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____dev_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,043 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__pthread_key_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,043 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____intptr_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,044 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____mode_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,044 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____caddr_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,044 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__int32_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,044 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__fd_set in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,044 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____uint32_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,044 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__pid_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,044 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__fsfilcnt_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,044 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__gid_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,044 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__u_short in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,044 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__caddr_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,044 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____int8_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,044 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__ulong in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,044 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__pthread_barrierattr_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,045 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__register_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,045 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__sigset_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,045 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____fsfilcnt64_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,045 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__clock_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,045 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__daddr_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,045 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____int64_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,045 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____blksize_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,045 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__int8_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,045 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____fsblkcnt_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,045 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____qaddr_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,045 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____uint16_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,045 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____WAIT_STATUS in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,045 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__ino_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,045 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__pthread_condattr_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,045 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____rlim64_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,045 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____fsfilcnt_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,045 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__ldiv_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,045 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__loff_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,046 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__u_quad_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,046 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__int64_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,046 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__ushort in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,046 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____time_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,046 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____uint8_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,046 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__u_int64_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,046 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__pthread_spinlock_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,046 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____clock_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,046 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__fsid_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,046 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____daddr_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,046 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____key_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,046 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__u_int16_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,046 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____blkcnt_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,046 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__dev_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,046 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__fd_mask in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,046 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__u_int8_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,046 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____u_int in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,047 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____useconds_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,047 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____loff_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,047 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__suseconds_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,047 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__pthread_cond_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,047 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____syscall_slong_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,047 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__quad_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,047 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____clockid_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,047 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__clockid_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,047 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____fsid_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,047 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__nlink_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,047 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__u_long in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,047 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____off_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,047 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__ssize_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,047 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____fsword_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,047 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__id_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,047 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__pthread_rwlockattr_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,047 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__uint in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,048 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____uid_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,048 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____ino_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,048 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____sigset_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,048 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____ino64_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,048 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__u_char in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,048 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__blkcnt_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,048 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____pthread_list_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,048 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____u_long in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,048 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____blkcnt64_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,048 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____int16_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,048 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____uint64_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,049 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__pthread_once_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,049 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__u_int32_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,049 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____nlink_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,049 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__off_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,049 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____sig_atomic_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,049 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____socklen_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,049 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____ssize_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,049 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__timer_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,049 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____gid_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,049 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____u_char in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,049 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__int16_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,050 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____syscall_ulong_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,050 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____fd_mask in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,050 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__pthread_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,050 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____timer_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,050 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__pthread_attr_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,050 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____u_quad_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,050 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____id_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,050 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__wchar_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,050 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__pthread_barrier_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,050 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i__pthread_mutexattr_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,050 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____off64_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,051 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____pid_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,051 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____suseconds_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,051 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____quad_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,051 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____fsblkcnt64_t in add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,065 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG34231dbdc [2018-04-11 12:47:41,073 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-11 12:47:41,074 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-11 12:47:41,074 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-11 12:47:41,074 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-11 12:47:41,078 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-11 12:47:41,079 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 11.04 12:47:41" (1/1) ... [2018-04-11 12:47:41,080 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@61da3f10 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 12:47:41, skipping insertion in model container [2018-04-11 12:47:41,081 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 11.04 12:47:41" (1/1) ... [2018-04-11 12:47:41,092 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-11 12:47:41,114 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-11 12:47:41,231 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-11 12:47:41,259 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-11 12:47:41,264 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 111 non ball SCCs. Number of states in SCCs 111. [2018-04-11 12:47:41,298 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 12:47:41 WrapperNode [2018-04-11 12:47:41,298 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-11 12:47:41,299 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-11 12:47:41,299 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-11 12:47:41,299 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-11 12:47:41,311 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 12:47:41" (1/1) ... [2018-04-11 12:47:41,311 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 12:47:41" (1/1) ... [2018-04-11 12:47:41,323 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 12:47:41" (1/1) ... [2018-04-11 12:47:41,323 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 12:47:41" (1/1) ... [2018-04-11 12:47:41,331 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 12:47:41" (1/1) ... [2018-04-11 12:47:41,335 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 12:47:41" (1/1) ... [2018-04-11 12:47:41,337 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 12:47:41" (1/1) ... [2018-04-11 12:47:41,340 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-11 12:47:41,340 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-11 12:47:41,341 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-11 12:47:41,341 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-11 12:47:41,342 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 12:47:41" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-11 12:47:41,428 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-11 12:47:41,428 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-11 12:47:41,428 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____bswap_32 [2018-04-11 12:47:41,428 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____bswap_64 [2018-04-11 12:47:41,428 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-11 12:47:41,428 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____bswap_32 [2018-04-11 12:47:41,428 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fadd_last_alloca_true_valid_memsafety_true_termination_i____bswap_64 [2018-04-11 12:47:41,428 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-11 12:47:41,429 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-11 12:47:41,429 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-11 12:47:41,429 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-11 12:47:41,429 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-11 12:47:41,429 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-11 12:47:41,429 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-11 12:47:41,429 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-11 12:47:41,429 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-11 12:47:41,429 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-11 12:47:41,429 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-11 12:47:41,430 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-11 12:47:41,430 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-11 12:47:41,430 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-11 12:47:41,430 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-11 12:47:41,430 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-11 12:47:41,430 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-11 12:47:41,435 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-11 12:47:41,435 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-11 12:47:41,435 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-11 12:47:41,435 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-11 12:47:41,435 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-11 12:47:41,435 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-11 12:47:41,435 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-11 12:47:41,435 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-11 12:47:41,435 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-11 12:47:41,436 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-11 12:47:41,436 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-11 12:47:41,436 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-11 12:47:41,436 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-11 12:47:41,436 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-11 12:47:41,436 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-11 12:47:41,436 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-11 12:47:41,436 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-11 12:47:41,436 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-11 12:47:41,436 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-11 12:47:41,436 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-11 12:47:41,437 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-11 12:47:41,437 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-11 12:47:41,437 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-11 12:47:41,437 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-11 12:47:41,437 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-11 12:47:41,437 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-11 12:47:41,437 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-11 12:47:41,437 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-11 12:47:41,437 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-11 12:47:41,437 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-11 12:47:41,437 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-11 12:47:41,438 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-11 12:47:41,438 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-11 12:47:41,438 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-11 12:47:41,438 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-11 12:47:41,438 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-11 12:47:41,438 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-11 12:47:41,438 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-11 12:47:41,438 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-11 12:47:41,438 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-11 12:47:41,438 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-11 12:47:41,441 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-11 12:47:41,441 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-11 12:47:41,441 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-11 12:47:41,442 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-11 12:47:41,442 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-11 12:47:41,442 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-11 12:47:41,442 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-11 12:47:41,442 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-11 12:47:41,442 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-11 12:47:41,442 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-11 12:47:41,442 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-11 12:47:41,442 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-11 12:47:41,442 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-11 12:47:41,442 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-11 12:47:41,443 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-11 12:47:41,443 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-11 12:47:41,443 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-11 12:47:41,443 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-11 12:47:41,443 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-11 12:47:41,443 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-11 12:47:41,443 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-11 12:47:41,443 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-11 12:47:41,443 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-11 12:47:41,443 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-11 12:47:41,444 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-11 12:47:41,444 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-11 12:47:41,444 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-11 12:47:41,444 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-11 12:47:41,444 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-11 12:47:41,444 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-11 12:47:41,444 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-11 12:47:41,444 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-11 12:47:41,444 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-11 12:47:41,444 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-11 12:47:41,444 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-11 12:47:41,445 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-11 12:47:41,445 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-11 12:47:41,445 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-11 12:47:41,445 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-11 12:47:41,445 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-11 12:47:41,445 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-11 12:47:41,445 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-11 12:47:41,445 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-11 12:47:41,445 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-11 12:47:41,445 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-11 12:47:41,445 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-11 12:47:41,446 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-11 12:47:41,446 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-11 12:47:41,446 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-11 12:47:41,446 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-11 12:47:41,446 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-11 12:47:41,715 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-11 12:47:41,715 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.04 12:47:41 BoogieIcfgContainer [2018-04-11 12:47:41,715 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-11 12:47:41,716 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-11 12:47:41,716 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-11 12:47:41,718 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-11 12:47:41,718 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 11.04 12:47:41" (1/3) ... [2018-04-11 12:47:41,719 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@61deb129 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 11.04 12:47:41, skipping insertion in model container [2018-04-11 12:47:41,719 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 12:47:41" (2/3) ... [2018-04-11 12:47:41,719 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@61deb129 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 11.04 12:47:41, skipping insertion in model container [2018-04-11 12:47:41,719 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.04 12:47:41" (3/3) ... [2018-04-11 12:47:41,720 INFO L107 eAbstractionObserver]: Analyzing ICFG add_last-alloca_true-valid-memsafety_true-termination.i [2018-04-11 12:47:41,726 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:Craig_TreeInterpolation Determinization: PREDICATE_ABSTRACTION [2018-04-11 12:47:41,731 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 11 error locations. [2018-04-11 12:47:41,761 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-11 12:47:41,761 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-11 12:47:41,762 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-11 12:47:41,762 INFO L371 AbstractCegarLoop]: Compute interpolants for Craig_TreeInterpolation [2018-04-11 12:47:41,762 INFO L372 AbstractCegarLoop]: Backedges is CANONICAL [2018-04-11 12:47:41,762 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-11 12:47:41,762 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-11 12:47:41,762 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-11 12:47:41,762 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-11 12:47:41,763 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-11 12:47:41,770 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states. [2018-04-11 12:47:41,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-04-11 12:47:41,776 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:41,776 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:41,776 INFO L408 AbstractCegarLoop]: === Iteration 1 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:41,779 INFO L82 PathProgramCache]: Analyzing trace with hash 404743958, now seen corresponding path program 1 times [2018-04-11 12:47:41,811 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:41,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:41,844 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:41,902 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:41,903 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 12:47:41,904 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-11 12:47:41,904 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:41,905 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:41,905 INFO L182 omatonBuilderFactory]: Interpolants [41#true, 42#false, 43#(= 1 (select |#valid| |main_#t~malloc3.base|)), 44#(= 1 (select |#valid| main_~arr~0.base)), 45#(= 1 (select |#valid| main_~a~0.base))] [2018-04-11 12:47:41,905 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:41,905 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-11 12:47:41,913 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-11 12:47:41,916 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-11 12:47:41,917 INFO L87 Difference]: Start difference. First operand 38 states. Second operand 5 states. [2018-04-11 12:47:42,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:42,009 INFO L93 Difference]: Finished difference Result 33 states and 35 transitions. [2018-04-11 12:47:42,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-11 12:47:42,010 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 12 [2018-04-11 12:47:42,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:42,017 INFO L225 Difference]: With dead ends: 33 [2018-04-11 12:47:42,018 INFO L226 Difference]: Without dead ends: 30 [2018-04-11 12:47:42,019 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-11 12:47:42,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-04-11 12:47:42,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-04-11 12:47:42,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-04-11 12:47:42,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 32 transitions. [2018-04-11 12:47:42,042 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 32 transitions. Word has length 12 [2018-04-11 12:47:42,042 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:42,043 INFO L459 AbstractCegarLoop]: Abstraction has 30 states and 32 transitions. [2018-04-11 12:47:42,043 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-11 12:47:42,043 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 32 transitions. [2018-04-11 12:47:42,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-04-11 12:47:42,043 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:42,043 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:42,043 INFO L408 AbstractCegarLoop]: === Iteration 2 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:42,043 INFO L82 PathProgramCache]: Analyzing trace with hash 404743959, now seen corresponding path program 1 times [2018-04-11 12:47:42,044 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:42,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:42,057 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:42,129 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:42,129 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 12:47:42,129 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-11 12:47:42,129 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:42,130 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:42,130 INFO L182 omatonBuilderFactory]: Interpolants [113#true, 114#false, 115#(<= 1 main_~length~0), 116#(and (<= 4 (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 117#(and (= 0 main_~arr~0.offset) (<= 4 (select |#length| main_~arr~0.base))), 118#(and (= main_~a~0.offset 0) (<= 4 (select |#length| main_~a~0.base)))] [2018-04-11 12:47:42,130 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:42,131 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-11 12:47:42,131 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-11 12:47:42,131 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-11 12:47:42,132 INFO L87 Difference]: Start difference. First operand 30 states and 32 transitions. Second operand 6 states. [2018-04-11 12:47:42,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:42,237 INFO L93 Difference]: Finished difference Result 45 states and 47 transitions. [2018-04-11 12:47:42,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-11 12:47:42,237 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 12 [2018-04-11 12:47:42,237 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:42,239 INFO L225 Difference]: With dead ends: 45 [2018-04-11 12:47:42,239 INFO L226 Difference]: Without dead ends: 45 [2018-04-11 12:47:42,239 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2018-04-11 12:47:42,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-04-11 12:47:42,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 37. [2018-04-11 12:47:42,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-04-11 12:47:42,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 42 transitions. [2018-04-11 12:47:42,242 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 42 transitions. Word has length 12 [2018-04-11 12:47:42,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:42,242 INFO L459 AbstractCegarLoop]: Abstraction has 37 states and 42 transitions. [2018-04-11 12:47:42,242 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-11 12:47:42,242 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 42 transitions. [2018-04-11 12:47:42,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-04-11 12:47:42,242 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:42,242 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:42,242 INFO L408 AbstractCegarLoop]: === Iteration 3 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:42,242 INFO L82 PathProgramCache]: Analyzing trace with hash -337839192, now seen corresponding path program 1 times [2018-04-11 12:47:42,243 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:42,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:42,250 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:42,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:42,305 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 12:47:42,306 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-11 12:47:42,306 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:42,306 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:42,306 INFO L182 omatonBuilderFactory]: Interpolants [211#true, 212#false, 213#(<= 1 main_~length~0), 214#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|) (<= 1 main_~length~0)), 215#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (<= 1 main_~length~0))] [2018-04-11 12:47:42,306 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:42,307 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-11 12:47:42,307 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-11 12:47:42,307 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-11 12:47:42,307 INFO L87 Difference]: Start difference. First operand 37 states and 42 transitions. Second operand 5 states. [2018-04-11 12:47:42,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:42,356 INFO L93 Difference]: Finished difference Result 35 states and 38 transitions. [2018-04-11 12:47:42,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-11 12:47:42,356 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 13 [2018-04-11 12:47:42,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:42,357 INFO L225 Difference]: With dead ends: 35 [2018-04-11 12:47:42,357 INFO L226 Difference]: Without dead ends: 35 [2018-04-11 12:47:42,357 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-04-11 12:47:42,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-04-11 12:47:42,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-04-11 12:47:42,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-04-11 12:47:42,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 38 transitions. [2018-04-11 12:47:42,360 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 38 transitions. Word has length 13 [2018-04-11 12:47:42,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:42,360 INFO L459 AbstractCegarLoop]: Abstraction has 35 states and 38 transitions. [2018-04-11 12:47:42,361 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-11 12:47:42,361 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 38 transitions. [2018-04-11 12:47:42,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-04-11 12:47:42,361 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:42,361 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:42,361 INFO L408 AbstractCegarLoop]: === Iteration 4 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:42,361 INFO L82 PathProgramCache]: Analyzing trace with hash -337934525, now seen corresponding path program 1 times [2018-04-11 12:47:42,362 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:42,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:42,370 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:42,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:42,384 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 12:47:42,385 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-11 12:47:42,385 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:42,385 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:42,385 INFO L182 omatonBuilderFactory]: Interpolants [288#true, 289#false, 290#(not (= 0 |main_#t~malloc3.base|)), 291#(not (= 0 main_~arr~0.base))] [2018-04-11 12:47:42,385 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:42,385 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-11 12:47:42,385 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-11 12:47:42,386 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-11 12:47:42,386 INFO L87 Difference]: Start difference. First operand 35 states and 38 transitions. Second operand 4 states. [2018-04-11 12:47:42,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:42,398 INFO L93 Difference]: Finished difference Result 33 states and 35 transitions. [2018-04-11 12:47:42,398 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-11 12:47:42,398 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2018-04-11 12:47:42,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:42,399 INFO L225 Difference]: With dead ends: 33 [2018-04-11 12:47:42,399 INFO L226 Difference]: Without dead ends: 33 [2018-04-11 12:47:42,399 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-11 12:47:42,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-04-11 12:47:42,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-04-11 12:47:42,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-04-11 12:47:42,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 35 transitions. [2018-04-11 12:47:42,402 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 35 transitions. Word has length 13 [2018-04-11 12:47:42,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:42,402 INFO L459 AbstractCegarLoop]: Abstraction has 33 states and 35 transitions. [2018-04-11 12:47:42,402 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-11 12:47:42,402 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 35 transitions. [2018-04-11 12:47:42,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-04-11 12:47:42,403 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:42,403 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:42,403 INFO L408 AbstractCegarLoop]: === Iteration 5 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:42,403 INFO L82 PathProgramCache]: Analyzing trace with hash -1960453059, now seen corresponding path program 1 times [2018-04-11 12:47:42,404 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:42,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:42,416 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:42,450 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:42,450 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 12:47:42,450 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-11 12:47:42,450 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:42,450 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:42,451 INFO L182 omatonBuilderFactory]: Interpolants [360#true, 361#false, 362#(= |#valid| |old(#valid)|), 363#(= |old(#valid)| (store |#valid| |main_#t~malloc3.base| 0))] [2018-04-11 12:47:42,451 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:42,451 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-11 12:47:42,451 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-11 12:47:42,451 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-11 12:47:42,451 INFO L87 Difference]: Start difference. First operand 33 states and 35 transitions. Second operand 4 states. [2018-04-11 12:47:42,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:42,476 INFO L93 Difference]: Finished difference Result 32 states and 34 transitions. [2018-04-11 12:47:42,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-11 12:47:42,476 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2018-04-11 12:47:42,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:42,477 INFO L225 Difference]: With dead ends: 32 [2018-04-11 12:47:42,477 INFO L226 Difference]: Without dead ends: 28 [2018-04-11 12:47:42,477 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-11 12:47:42,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-04-11 12:47:42,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-04-11 12:47:42,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-04-11 12:47:42,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 29 transitions. [2018-04-11 12:47:42,479 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 29 transitions. Word has length 18 [2018-04-11 12:47:42,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:42,480 INFO L459 AbstractCegarLoop]: Abstraction has 28 states and 29 transitions. [2018-04-11 12:47:42,480 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-11 12:47:42,480 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 29 transitions. [2018-04-11 12:47:42,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-04-11 12:47:42,480 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:42,480 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:42,481 INFO L408 AbstractCegarLoop]: === Iteration 6 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:42,481 INFO L82 PathProgramCache]: Analyzing trace with hash -1407319482, now seen corresponding path program 1 times [2018-04-11 12:47:42,481 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:42,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:42,494 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:42,649 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:42,649 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 12:47:42,650 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-11 12:47:42,650 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:42,650 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:42,650 INFO L182 omatonBuilderFactory]: Interpolants [432#(and (or (and (<= main_~length~0 1) (= main_~arr~0.offset 0)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) 4)) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) 4)) (and (= main_~arr~0.base main_~a~0.base) (= main_~a~0.offset 0) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 433#(and (= main_~arr~0.base main_~a~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) 4) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))), 426#true, 427#false, 428#(<= main_~length~0 1), 429#(and (<= main_~length~0 1) (= 0 |main_#t~malloc3.offset|)), 430#(and (<= main_~length~0 1) (= main_~arr~0.offset 0)), 431#(and (or (and (<= main_~length~0 1) (= main_~arr~0.offset 0)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) 4)) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) 4)) (and (= main_~arr~0.base main_~a~0.base) (= main_~a~0.offset 0))))] [2018-04-11 12:47:42,650 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:42,651 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-11 12:47:42,651 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-11 12:47:42,651 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-04-11 12:47:42,651 INFO L87 Difference]: Start difference. First operand 28 states and 29 transitions. Second operand 8 states. [2018-04-11 12:47:42,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:42,778 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-04-11 12:47:42,778 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-11 12:47:42,779 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 20 [2018-04-11 12:47:42,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:42,779 INFO L225 Difference]: With dead ends: 35 [2018-04-11 12:47:42,779 INFO L226 Difference]: Without dead ends: 28 [2018-04-11 12:47:42,779 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=48, Invalid=84, Unknown=0, NotChecked=0, Total=132 [2018-04-11 12:47:42,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-04-11 12:47:42,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-04-11 12:47:42,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-04-11 12:47:42,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-04-11 12:47:42,781 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 20 [2018-04-11 12:47:42,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:42,781 INFO L459 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-04-11 12:47:42,781 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-11 12:47:42,781 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-04-11 12:47:42,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-04-11 12:47:42,781 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:42,781 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:42,781 INFO L408 AbstractCegarLoop]: === Iteration 7 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:42,781 INFO L82 PathProgramCache]: Analyzing trace with hash 1876530564, now seen corresponding path program 1 times [2018-04-11 12:47:42,782 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:42,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:42,794 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:42,969 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:42,969 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:47:42,969 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9] total 9 [2018-04-11 12:47:42,969 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:42,970 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:42,970 INFO L182 omatonBuilderFactory]: Interpolants [512#(and (= main_~arr~0.base main_~a~0.base) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0) (< 1 main_~length~0)), 513#(and (= main_~a~0.offset 0) (<= 8 (select |#length| main_~a~0.base))), 514#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base))), 505#true, 506#false, 507#(= 0 |main_#t~malloc3.offset|), 508#(= main_~arr~0.offset 0), 509#(and (= main_~arr~0.base main_~a~0.base) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 510#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) 4)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (= main_~arr~0.base main_~a~0.base) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 511#(and (= main_~arr~0.base main_~a~0.base) (or (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) 4) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (< 1 main_~length~0)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0) (or (<= main_~length~0 1) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (select |#length| main_~arr~0.base))))] [2018-04-11 12:47:42,970 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:42,970 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-11 12:47:42,970 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-11 12:47:42,971 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-04-11 12:47:42,971 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 10 states. [2018-04-11 12:47:43,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:43,093 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-04-11 12:47:43,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-11 12:47:43,093 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 20 [2018-04-11 12:47:43,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:43,094 INFO L225 Difference]: With dead ends: 37 [2018-04-11 12:47:43,094 INFO L226 Difference]: Without dead ends: 37 [2018-04-11 12:47:43,094 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=75, Invalid=165, Unknown=0, NotChecked=0, Total=240 [2018-04-11 12:47:43,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-04-11 12:47:43,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 36. [2018-04-11 12:47:43,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-04-11 12:47:43,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-04-11 12:47:43,096 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 20 [2018-04-11 12:47:43,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:43,096 INFO L459 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-04-11 12:47:43,096 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-11 12:47:43,096 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-04-11 12:47:43,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-04-11 12:47:43,097 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:43,097 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:43,097 INFO L408 AbstractCegarLoop]: === Iteration 8 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:43,097 INFO L82 PathProgramCache]: Analyzing trace with hash -546507853, now seen corresponding path program 2 times [2018-04-11 12:47:43,097 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:43,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:43,111 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:43,408 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:43,409 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:47:43,409 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10] total 10 [2018-04-11 12:47:43,409 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:43,409 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:43,409 INFO L182 omatonBuilderFactory]: Interpolants [608#(and (<= main_~a~0.offset 4) (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))), 609#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 4 main_~a~0.offset)), 610#(and (<= 8 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base))), 600#true, 601#false, 602#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 603#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 604#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 605#(and (= main_~a~0.base main_~arr~0.base) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= 4 main_~a~0.offset) (or (<= main_~a~0.offset 4) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)))), 606#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 4) (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))))), 607#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 4) (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0))))))] [2018-04-11 12:47:43,409 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:43,409 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-11 12:47:43,410 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-11 12:47:43,410 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2018-04-11 12:47:43,410 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 11 states. [2018-04-11 12:47:43,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:43,619 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-04-11 12:47:43,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-11 12:47:43,620 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 28 [2018-04-11 12:47:43,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:43,620 INFO L225 Difference]: With dead ends: 45 [2018-04-11 12:47:43,620 INFO L226 Difference]: Without dead ends: 45 [2018-04-11 12:47:43,621 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2018-04-11 12:47:43,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-04-11 12:47:43,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 44. [2018-04-11 12:47:43,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-04-11 12:47:43,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-04-11 12:47:43,623 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 28 [2018-04-11 12:47:43,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:43,623 INFO L459 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-04-11 12:47:43,623 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-11 12:47:43,623 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-04-11 12:47:43,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-04-11 12:47:43,623 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:43,624 INFO L355 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:43,624 INFO L408 AbstractCegarLoop]: === Iteration 9 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:43,624 INFO L82 PathProgramCache]: Analyzing trace with hash 1699918562, now seen corresponding path program 3 times [2018-04-11 12:47:43,624 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:43,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:43,639 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:44,016 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:44,016 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:47:44,016 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11] total 11 [2018-04-11 12:47:44,016 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:44,018 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:44,018 INFO L182 omatonBuilderFactory]: Interpolants [720#(and (or (and (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 8) (< 3 main_~length~0))) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base))) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.base main_~a~0.base) (= main_~arr~0.offset 0)), 721#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 8) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 3 main_~length~0))) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (= main_~arr~0.base main_~a~0.base) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 722#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 8) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 3 main_~length~0))) (= main_~arr~0.base main_~a~0.base) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 723#(and (<= main_~a~0.offset 8) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (< 3 main_~length~0) (= main_~arr~0.offset 0)), 724#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 725#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base))), 714#true, 715#false, 716#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 717#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 718#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 719#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 4) (<= main_~length~0 3)) (or (<= 4 main_~a~0.offset) (< 3 main_~length~0)) (= main_~arr~0.offset 0))] [2018-04-11 12:47:44,018 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:44,019 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-11 12:47:44,019 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-11 12:47:44,019 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2018-04-11 12:47:44,019 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 12 states. [2018-04-11 12:47:44,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:44,350 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-04-11 12:47:44,350 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-11 12:47:44,350 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 36 [2018-04-11 12:47:44,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:44,350 INFO L225 Difference]: With dead ends: 53 [2018-04-11 12:47:44,351 INFO L226 Difference]: Without dead ends: 53 [2018-04-11 12:47:44,351 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=90, Invalid=290, Unknown=0, NotChecked=0, Total=380 [2018-04-11 12:47:44,351 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-04-11 12:47:44,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 52. [2018-04-11 12:47:44,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-04-11 12:47:44,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-04-11 12:47:44,354 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 36 [2018-04-11 12:47:44,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:44,354 INFO L459 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-04-11 12:47:44,354 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-11 12:47:44,354 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-04-11 12:47:44,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-04-11 12:47:44,355 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:44,355 INFO L355 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:44,355 INFO L408 AbstractCegarLoop]: === Iteration 10 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:44,356 INFO L82 PathProgramCache]: Analyzing trace with hash 2107233041, now seen corresponding path program 4 times [2018-04-11 12:47:44,356 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:44,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:44,371 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:44,787 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:44,787 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:47:44,787 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12] total 12 [2018-04-11 12:47:44,787 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:44,788 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:44,788 INFO L182 omatonBuilderFactory]: Interpolants [847#true, 848#false, 849#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 850#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 851#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 852#(and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 4) (<= main_~length~0 4)) (= main_~arr~0.offset 0)), 853#(and (<= 8 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 8) (<= main_~length~0 4)) (= main_~arr~0.offset 0)), 854#(and (= main_~arr~0.base main_~a~0.base) (or (and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 12 main_~a~0.offset) (or (<= main_~a~0.offset 12) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)))) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0)), 855#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (= main_~arr~0.base main_~a~0.base) (= main_~arr~0.offset 0) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 12 main_~a~0.offset) (<= main_~a~0.offset 12) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))))), 856#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (= main_~arr~0.base main_~a~0.base) (= main_~arr~0.offset 0) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 12 main_~a~0.offset) (<= main_~a~0.offset 12) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))))), 857#(and (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 12 main_~a~0.offset) (<= main_~a~0.offset 12) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))), 858#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 12 main_~a~0.offset)), 859#(and (<= 16 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:47:44,788 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:44,788 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-04-11 12:47:44,788 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-04-11 12:47:44,788 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=122, Unknown=0, NotChecked=0, Total=156 [2018-04-11 12:47:44,788 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 13 states. [2018-04-11 12:47:45,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:45,089 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-04-11 12:47:45,089 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-11 12:47:45,089 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 44 [2018-04-11 12:47:45,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:45,090 INFO L225 Difference]: With dead ends: 61 [2018-04-11 12:47:45,090 INFO L226 Difference]: Without dead ends: 61 [2018-04-11 12:47:45,090 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=99, Invalid=363, Unknown=0, NotChecked=0, Total=462 [2018-04-11 12:47:45,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-04-11 12:47:45,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 60. [2018-04-11 12:47:45,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-04-11 12:47:45,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 60 transitions. [2018-04-11 12:47:45,093 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 60 transitions. Word has length 44 [2018-04-11 12:47:45,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:45,094 INFO L459 AbstractCegarLoop]: Abstraction has 60 states and 60 transitions. [2018-04-11 12:47:45,094 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-04-11 12:47:45,094 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 60 transitions. [2018-04-11 12:47:45,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-04-11 12:47:45,095 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:45,095 INFO L355 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:45,095 INFO L408 AbstractCegarLoop]: === Iteration 11 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:45,095 INFO L82 PathProgramCache]: Analyzing trace with hash 626086976, now seen corresponding path program 5 times [2018-04-11 12:47:45,096 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:45,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:45,110 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:45,670 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:45,670 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:47:45,670 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13] total 13 [2018-04-11 12:47:45,671 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:45,671 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:45,671 INFO L182 omatonBuilderFactory]: Interpolants [999#true, 1000#false, 1001#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 1002#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 1003#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 1004#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 4 main_~a~0.offset) (< 5 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 4) (<= main_~length~0 5))), 1005#(and (or (<= main_~a~0.offset 8) (<= main_~length~0 5)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 8 main_~a~0.offset) (< 5 main_~length~0))), 1006#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 5 main_~length~0) (<= 12 main_~a~0.offset)) (or (<= main_~length~0 5) (<= main_~a~0.offset 12)) (= main_~arr~0.offset 0)), 1007#(and (= main_~a~0.base main_~arr~0.base) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (< 5 main_~length~0) (<= main_~a~0.offset 16))))) (= main_~arr~0.offset 0)), 1008#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (< 5 main_~length~0) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (<= main_~a~0.offset 16))) (= main_~arr~0.offset 0) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 1009#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (< 5 main_~length~0) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (<= main_~a~0.offset 16))) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (= main_~arr~0.offset 0)), 1010#(and (< 5 main_~length~0) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (<= main_~a~0.offset 16) (= main_~arr~0.offset 0)), 1011#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 1012#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:47:45,671 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:45,672 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-04-11 12:47:45,672 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-04-11 12:47:45,672 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=145, Unknown=0, NotChecked=0, Total=182 [2018-04-11 12:47:45,672 INFO L87 Difference]: Start difference. First operand 60 states and 60 transitions. Second operand 14 states. [2018-04-11 12:47:46,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:46,045 INFO L93 Difference]: Finished difference Result 69 states and 69 transitions. [2018-04-11 12:47:46,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-11 12:47:46,045 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 52 [2018-04-11 12:47:46,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:46,046 INFO L225 Difference]: With dead ends: 69 [2018-04-11 12:47:46,046 INFO L226 Difference]: Without dead ends: 69 [2018-04-11 12:47:46,046 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=108, Invalid=444, Unknown=0, NotChecked=0, Total=552 [2018-04-11 12:47:46,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-04-11 12:47:46,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 68. [2018-04-11 12:47:46,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-04-11 12:47:46,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 68 transitions. [2018-04-11 12:47:46,049 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 68 transitions. Word has length 52 [2018-04-11 12:47:46,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:46,050 INFO L459 AbstractCegarLoop]: Abstraction has 68 states and 68 transitions. [2018-04-11 12:47:46,050 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-04-11 12:47:46,050 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 68 transitions. [2018-04-11 12:47:46,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-04-11 12:47:46,050 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:46,051 INFO L355 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:46,051 INFO L408 AbstractCegarLoop]: === Iteration 12 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:46,051 INFO L82 PathProgramCache]: Analyzing trace with hash -628607377, now seen corresponding path program 6 times [2018-04-11 12:47:46,052 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:46,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:46,070 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:46,571 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 132 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:46,571 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:47:46,571 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2018-04-11 12:47:46,571 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:46,571 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:46,571 INFO L182 omatonBuilderFactory]: Interpolants [1184#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 4 main_~a~0.offset)), 1185#(and (<= 8 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base))), 1170#true, 1171#false, 1172#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 1173#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 1174#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 1175#(and (or (<= 4 main_~a~0.offset) (< 6 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 4) (<= main_~length~0 6)) (= main_~arr~0.offset 0)), 1176#(and (or (<= 8 main_~a~0.offset) (< 6 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 8) (<= main_~length~0 6))), 1177#(and (or (<= main_~a~0.offset 12) (<= main_~length~0 6)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 6 main_~length~0) (<= 12 main_~a~0.offset)) (= main_~arr~0.offset 0)), 1178#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 6 main_~length~0) (<= 16 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 16) (<= main_~length~0 6))), 1179#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (or (< 6 main_~length~0) (<= 16 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 16) (<= main_~length~0 6))), 1180#(and (<= 4 main_~a~0.offset) (= main_~a~0.base main_~arr~0.base) (= main_~arr~0.offset 0) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (<= main_~a~0.offset 20) (< 6 main_~length~0)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)))))), 1181#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (or (and (<= main_~a~0.offset 20) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 6 main_~length~0)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0)), 1182#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (or (and (<= main_~a~0.offset 20) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 6 main_~length~0)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0)), 1183#(and (<= 4 main_~a~0.offset) (<= main_~a~0.offset 20) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 6 main_~length~0) (= main_~arr~0.offset 0))] [2018-04-11 12:47:46,572 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 132 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:46,572 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-11 12:47:46,572 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-11 12:47:46,572 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=196, Unknown=0, NotChecked=0, Total=240 [2018-04-11 12:47:46,572 INFO L87 Difference]: Start difference. First operand 68 states and 68 transitions. Second operand 16 states. [2018-04-11 12:47:46,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:46,999 INFO L93 Difference]: Finished difference Result 77 states and 77 transitions. [2018-04-11 12:47:47,000 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-04-11 12:47:47,000 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 60 [2018-04-11 12:47:47,000 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:47,000 INFO L225 Difference]: With dead ends: 77 [2018-04-11 12:47:47,000 INFO L226 Difference]: Without dead ends: 77 [2018-04-11 12:47:47,001 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=129, Invalid=627, Unknown=0, NotChecked=0, Total=756 [2018-04-11 12:47:47,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2018-04-11 12:47:47,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 76. [2018-04-11 12:47:47,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-04-11 12:47:47,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 76 transitions. [2018-04-11 12:47:47,004 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 76 transitions. Word has length 60 [2018-04-11 12:47:47,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:47,004 INFO L459 AbstractCegarLoop]: Abstraction has 76 states and 76 transitions. [2018-04-11 12:47:47,004 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-11 12:47:47,004 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 76 transitions. [2018-04-11 12:47:47,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-04-11 12:47:47,005 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:47,005 INFO L355 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:47,005 INFO L408 AbstractCegarLoop]: === Iteration 13 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:47,005 INFO L82 PathProgramCache]: Analyzing trace with hash -1672644194, now seen corresponding path program 7 times [2018-04-11 12:47:47,005 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:47,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:47,022 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:47,577 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 182 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:47,578 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:47:47,578 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2018-04-11 12:47:47,578 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:47,578 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:47,578 INFO L182 omatonBuilderFactory]: Interpolants [1376#(and (< 7 main_~length~0) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (<= main_~a~0.offset 24)), 1377#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 1378#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base))), 1363#true, 1364#false, 1365#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 1366#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 1367#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 1368#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 4) (<= main_~length~0 7)) (= main_~arr~0.offset 0) (or (< 7 main_~length~0) (<= 4 main_~a~0.offset))), 1369#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 7 main_~length~0) (<= 8 main_~a~0.offset)) (or (<= main_~a~0.offset 8) (<= main_~length~0 7))), 1370#(and (or (<= main_~a~0.offset 12) (<= main_~length~0 7)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 7 main_~length~0) (<= 12 main_~a~0.offset)) (= main_~arr~0.offset 0)), 1371#(and (or (<= main_~a~0.offset 16) (<= main_~length~0 7)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 7 main_~length~0) (<= 16 main_~a~0.offset)) (= main_~arr~0.offset 0)), 1372#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 7 main_~length~0) (<= 20 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 20) (<= main_~length~0 7))), 1373#(and (= main_~arr~0.base main_~a~0.base) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (< 7 main_~length~0) (<= main_~a~0.offset 24)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))))) (= main_~arr~0.offset 0)), 1374#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (= main_~arr~0.base main_~a~0.base) (or (and (< 7 main_~length~0) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (<= main_~a~0.offset 24)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0)), 1375#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (= main_~arr~0.base main_~a~0.base) (or (and (< 7 main_~length~0) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (<= main_~a~0.offset 24)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0))] [2018-04-11 12:47:47,578 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 182 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:47,578 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-11 12:47:47,578 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-11 12:47:47,579 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=197, Unknown=0, NotChecked=0, Total=240 [2018-04-11 12:47:47,579 INFO L87 Difference]: Start difference. First operand 76 states and 76 transitions. Second operand 16 states. [2018-04-11 12:47:48,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:48,103 INFO L93 Difference]: Finished difference Result 85 states and 85 transitions. [2018-04-11 12:47:48,103 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-04-11 12:47:48,104 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 68 [2018-04-11 12:47:48,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:48,104 INFO L225 Difference]: With dead ends: 85 [2018-04-11 12:47:48,104 INFO L226 Difference]: Without dead ends: 85 [2018-04-11 12:47:48,105 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 113 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=126, Invalid=630, Unknown=0, NotChecked=0, Total=756 [2018-04-11 12:47:48,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-04-11 12:47:48,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 84. [2018-04-11 12:47:48,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-04-11 12:47:48,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 84 transitions. [2018-04-11 12:47:48,108 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 84 transitions. Word has length 68 [2018-04-11 12:47:48,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:48,109 INFO L459 AbstractCegarLoop]: Abstraction has 84 states and 84 transitions. [2018-04-11 12:47:48,109 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-11 12:47:48,109 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 84 transitions. [2018-04-11 12:47:48,110 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-04-11 12:47:48,110 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:48,110 INFO L355 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:48,110 INFO L408 AbstractCegarLoop]: === Iteration 14 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:48,110 INFO L82 PathProgramCache]: Analyzing trace with hash -357556787, now seen corresponding path program 8 times [2018-04-11 12:47:48,111 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:48,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:48,126 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:48,679 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 0 proven. 240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:48,679 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:47:48,679 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16] total 16 [2018-04-11 12:47:48,679 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:48,679 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:48,679 INFO L182 omatonBuilderFactory]: Interpolants [1572#true, 1573#false, 1574#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 1575#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 1576#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 1577#(and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 4) (<= main_~length~0 8))), 1578#(and (<= 8 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 8) (<= main_~length~0 8)) (= main_~arr~0.offset 0)), 1579#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 12 main_~a~0.offset) (or (<= main_~a~0.offset 12) (<= main_~length~0 8)) (= main_~arr~0.offset 0)), 1580#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 16 main_~a~0.offset) (or (<= main_~a~0.offset 16) (<= main_~length~0 8)) (= main_~arr~0.offset 0)), 1581#(and (<= 20 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 20) (<= main_~length~0 8)) (= main_~arr~0.offset 0)), 1582#(and (or (<= main_~a~0.offset 24) (<= main_~length~0 8)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (<= 24 main_~a~0.offset)), 1583#(and (or (and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 28) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)))) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~a~0.base main_~arr~0.base) (= main_~arr~0.offset 0) (<= 28 main_~a~0.offset)), 1584#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= main_~a~0.offset 28) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0))))) (= main_~arr~0.offset 0) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (<= 28 main_~a~0.offset)), 1585#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= main_~a~0.offset 28) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0))))) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (= main_~arr~0.offset 0) (<= 28 main_~a~0.offset)), 1586#(and (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= main_~a~0.offset 28) (= main_~arr~0.offset 0) (<= 28 main_~a~0.offset) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))), 1587#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 28 main_~a~0.offset)), 1588#(and (<= 32 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:47:48,679 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 0 proven. 240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:48,680 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-11 12:47:48,680 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-11 12:47:48,680 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=226, Unknown=0, NotChecked=0, Total=272 [2018-04-11 12:47:48,680 INFO L87 Difference]: Start difference. First operand 84 states and 84 transitions. Second operand 17 states. [2018-04-11 12:47:49,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:49,213 INFO L93 Difference]: Finished difference Result 93 states and 93 transitions. [2018-04-11 12:47:49,214 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-11 12:47:49,214 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 76 [2018-04-11 12:47:49,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:49,214 INFO L225 Difference]: With dead ends: 93 [2018-04-11 12:47:49,214 INFO L226 Difference]: Without dead ends: 93 [2018-04-11 12:47:49,214 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 132 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=135, Invalid=735, Unknown=0, NotChecked=0, Total=870 [2018-04-11 12:47:49,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2018-04-11 12:47:49,216 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 92. [2018-04-11 12:47:49,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-04-11 12:47:49,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 92 transitions. [2018-04-11 12:47:49,217 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 92 transitions. Word has length 76 [2018-04-11 12:47:49,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:49,217 INFO L459 AbstractCegarLoop]: Abstraction has 92 states and 92 transitions. [2018-04-11 12:47:49,217 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-11 12:47:49,217 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 92 transitions. [2018-04-11 12:47:49,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-04-11 12:47:49,218 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:49,218 INFO L355 BasicCegarLoop]: trace histogram [10, 9, 9, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:49,218 INFO L408 AbstractCegarLoop]: === Iteration 15 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:49,218 INFO L82 PathProgramCache]: Analyzing trace with hash -960552196, now seen corresponding path program 9 times [2018-04-11 12:47:49,218 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:49,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:49,233 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:49,874 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 0 proven. 306 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:49,874 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:47:49,875 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17] total 17 [2018-04-11 12:47:49,875 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:49,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:49,875 INFO L182 omatonBuilderFactory]: Interpolants [1800#true, 1801#false, 1802#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 1803#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 1804#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 1805#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 4 main_~a~0.offset) (< 9 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 4) (<= main_~length~0 9))), 1806#(and (or (<= main_~a~0.offset 8) (<= main_~length~0 9)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 8 main_~a~0.offset) (< 9 main_~length~0)) (= main_~arr~0.offset 0)), 1807#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 9) (<= main_~a~0.offset 12)) (= main_~arr~0.offset 0) (or (<= 12 main_~a~0.offset) (< 9 main_~length~0))), 1808#(and (or (<= 16 main_~a~0.offset) (< 9 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 9) (<= main_~a~0.offset 16)) (= main_~arr~0.offset 0)), 1809#(and (or (<= 20 main_~a~0.offset) (< 9 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 20) (<= main_~length~0 9))), 1810#(and (or (<= main_~length~0 9) (<= main_~a~0.offset 24)) (= main_~arr~0.base main_~a~0.base) (or (<= 24 main_~a~0.offset) (< 9 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 1811#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 9 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~length~0 9) (<= main_~a~0.offset 28))), 1812#(and (= main_~a~0.base main_~arr~0.base) (or (and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (< 9 main_~length~0) (<= main_~a~0.offset 32)))) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0)), 1813#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 9 main_~length~0) (<= main_~a~0.offset 32))) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 1814#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 9 main_~length~0) (<= main_~a~0.offset 32))) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 1815#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (< 9 main_~length~0) (<= main_~a~0.offset 32)), 1816#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 1817#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:47:49,875 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 0 proven. 306 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:49,875 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-11 12:47:49,876 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-11 12:47:49,876 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=257, Unknown=0, NotChecked=0, Total=306 [2018-04-11 12:47:49,876 INFO L87 Difference]: Start difference. First operand 92 states and 92 transitions. Second operand 18 states. [2018-04-11 12:47:50,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:50,532 INFO L93 Difference]: Finished difference Result 101 states and 101 transitions. [2018-04-11 12:47:50,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-04-11 12:47:50,532 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 84 [2018-04-11 12:47:50,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:50,532 INFO L225 Difference]: With dead ends: 101 [2018-04-11 12:47:50,532 INFO L226 Difference]: Without dead ends: 101 [2018-04-11 12:47:50,533 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 152 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=144, Invalid=848, Unknown=0, NotChecked=0, Total=992 [2018-04-11 12:47:50,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-04-11 12:47:50,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 100. [2018-04-11 12:47:50,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-04-11 12:47:50,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 100 transitions. [2018-04-11 12:47:50,535 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 100 transitions. Word has length 84 [2018-04-11 12:47:50,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:50,535 INFO L459 AbstractCegarLoop]: Abstraction has 100 states and 100 transitions. [2018-04-11 12:47:50,535 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-11 12:47:50,536 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 100 transitions. [2018-04-11 12:47:50,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-04-11 12:47:50,536 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:50,536 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:50,536 INFO L408 AbstractCegarLoop]: === Iteration 16 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:50,536 INFO L82 PathProgramCache]: Analyzing trace with hash -1299609301, now seen corresponding path program 10 times [2018-04-11 12:47:50,537 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:50,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:50,560 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:51,292 INFO L134 CoverageAnalysis]: Checked inductivity of 380 backedges. 0 proven. 380 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:51,292 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:47:51,292 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19] total 19 [2018-04-11 12:47:51,292 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:51,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:51,293 INFO L182 omatonBuilderFactory]: Interpolants [2048#false, 2049#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 2050#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 2051#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 2052#(and (or (<= main_~a~0.offset 4) (<= main_~length~0 10)) (or (<= 4 main_~a~0.offset) (< 10 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 2053#(and (or (<= main_~length~0 10) (<= main_~a~0.offset 8)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 8 main_~a~0.offset) (< 10 main_~length~0))), 2054#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 10) (<= main_~a~0.offset 12)) (= main_~arr~0.offset 0) (or (< 10 main_~length~0) (<= 12 main_~a~0.offset))), 2055#(and (or (<= main_~length~0 10) (<= main_~a~0.offset 16)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 16 main_~a~0.offset) (< 10 main_~length~0))), 2056#(and (or (<= 20 main_~a~0.offset) (< 10 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 20) (<= main_~length~0 10))), 2057#(and (or (<= main_~length~0 10) (<= main_~a~0.offset 24)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 10 main_~length~0) (<= 24 main_~a~0.offset)) (= main_~arr~0.offset 0)), 2058#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 10) (<= main_~a~0.offset 28)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 10 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.offset 0)), 2059#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 10) (<= main_~a~0.offset 32)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 32 main_~a~0.offset) (< 10 main_~length~0)) (= main_~arr~0.offset 0)), 2060#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 10) (<= main_~a~0.offset 32)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (or (<= 32 main_~a~0.offset) (< 10 main_~length~0)) (= main_~arr~0.offset 0)), 2061#(and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (or (and (or (and (< 10 main_~length~0) (<= main_~a~0.offset 36)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base))) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0)), 2062#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 10 main_~length~0) (<= main_~a~0.offset 36))) (= main_~arr~0.offset 0)), 2063#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 10 main_~length~0) (<= main_~a~0.offset 36))) (= main_~arr~0.offset 0)), 2064#(and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 10 main_~length~0) (= main_~arr~0.offset 0) (<= main_~a~0.offset 36)), 2065#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 4 main_~a~0.offset)), 2066#(and (<= 8 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base))), 2047#true] [2018-04-11 12:47:51,293 INFO L134 CoverageAnalysis]: Checked inductivity of 380 backedges. 0 proven. 380 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:51,293 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-11 12:47:51,293 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-11 12:47:51,294 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=324, Unknown=0, NotChecked=0, Total=380 [2018-04-11 12:47:51,294 INFO L87 Difference]: Start difference. First operand 100 states and 100 transitions. Second operand 20 states. [2018-04-11 12:47:51,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:51,989 INFO L93 Difference]: Finished difference Result 109 states and 109 transitions. [2018-04-11 12:47:51,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-04-11 12:47:51,989 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 92 [2018-04-11 12:47:51,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:51,990 INFO L225 Difference]: With dead ends: 109 [2018-04-11 12:47:51,990 INFO L226 Difference]: Without dead ends: 109 [2018-04-11 12:47:51,990 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 209 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=165, Invalid=1095, Unknown=0, NotChecked=0, Total=1260 [2018-04-11 12:47:51,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-04-11 12:47:51,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 108. [2018-04-11 12:47:51,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-04-11 12:47:51,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 108 transitions. [2018-04-11 12:47:51,992 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 108 transitions. Word has length 92 [2018-04-11 12:47:51,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:51,993 INFO L459 AbstractCegarLoop]: Abstraction has 108 states and 108 transitions. [2018-04-11 12:47:51,993 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-11 12:47:51,993 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 108 transitions. [2018-04-11 12:47:51,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-04-11 12:47:51,994 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:51,994 INFO L355 BasicCegarLoop]: trace histogram [12, 11, 11, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:51,994 INFO L408 AbstractCegarLoop]: === Iteration 17 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:51,994 INFO L82 PathProgramCache]: Analyzing trace with hash -1323413414, now seen corresponding path program 11 times [2018-04-11 12:47:51,994 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:52,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:52,019 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:52,774 INFO L134 CoverageAnalysis]: Checked inductivity of 462 backedges. 0 proven. 462 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:52,774 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:47:52,774 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19] total 19 [2018-04-11 12:47:52,774 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:52,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:52,774 INFO L182 omatonBuilderFactory]: Interpolants [2316#true, 2317#false, 2318#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 2319#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 2320#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 2321#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 4 main_~a~0.offset) (< 11 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 4) (<= main_~length~0 11))), 2322#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 8 main_~a~0.offset) (< 11 main_~length~0)) (or (<= main_~length~0 11) (<= main_~a~0.offset 8))), 2323#(and (or (< 11 main_~length~0) (<= 12 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 11) (<= main_~a~0.offset 12)) (= main_~arr~0.offset 0)), 2324#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 11) (<= main_~a~0.offset 16)) (= main_~arr~0.offset 0) (or (<= 16 main_~a~0.offset) (< 11 main_~length~0))), 2325#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 11) (<= main_~a~0.offset 20)) (= main_~arr~0.offset 0) (or (<= 20 main_~a~0.offset) (< 11 main_~length~0))), 2326#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 11) (<= main_~a~0.offset 24)) (or (< 11 main_~length~0) (<= 24 main_~a~0.offset)) (= main_~arr~0.offset 0)), 2327#(and (or (< 11 main_~length~0) (<= 28 main_~a~0.offset)) (or (<= main_~length~0 11) (<= main_~a~0.offset 28)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 2328#(and (or (<= main_~length~0 11) (<= main_~a~0.offset 32)) (or (<= 32 main_~a~0.offset) (< 11 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 2329#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 11) (<= main_~a~0.offset 36)) (= main_~arr~0.offset 0) (or (<= 36 main_~a~0.offset) (< 11 main_~length~0))), 2330#(and (= main_~a~0.base main_~arr~0.base) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (< 11 main_~length~0) (<= main_~a~0.offset 40)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))))) (= main_~arr~0.offset 0)), 2331#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 11 main_~length~0) (<= 0 main_~a~0.offset) (<= main_~a~0.offset 40))) (= main_~arr~0.offset 0) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 2332#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 11 main_~length~0) (<= 0 main_~a~0.offset) (<= main_~a~0.offset 40))) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (= main_~arr~0.offset 0)), 2333#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 11 main_~length~0) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (<= main_~a~0.offset 40)), 2334#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 2335#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:47:52,774 INFO L134 CoverageAnalysis]: Checked inductivity of 462 backedges. 0 proven. 462 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:52,775 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-11 12:47:52,775 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-11 12:47:52,775 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=325, Unknown=0, NotChecked=0, Total=380 [2018-04-11 12:47:52,775 INFO L87 Difference]: Start difference. First operand 108 states and 108 transitions. Second operand 20 states. [2018-04-11 12:47:53,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:53,529 INFO L93 Difference]: Finished difference Result 117 states and 117 transitions. [2018-04-11 12:47:53,529 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-04-11 12:47:53,529 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 100 [2018-04-11 12:47:53,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:53,530 INFO L225 Difference]: With dead ends: 117 [2018-04-11 12:47:53,530 INFO L226 Difference]: Without dead ends: 117 [2018-04-11 12:47:53,530 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 195 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=162, Invalid=1098, Unknown=0, NotChecked=0, Total=1260 [2018-04-11 12:47:53,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-04-11 12:47:53,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 116. [2018-04-11 12:47:53,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-04-11 12:47:53,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 116 transitions. [2018-04-11 12:47:53,532 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 116 transitions. Word has length 100 [2018-04-11 12:47:53,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:53,532 INFO L459 AbstractCegarLoop]: Abstraction has 116 states and 116 transitions. [2018-04-11 12:47:53,532 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-11 12:47:53,532 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 116 transitions. [2018-04-11 12:47:53,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2018-04-11 12:47:53,533 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:53,533 INFO L355 BasicCegarLoop]: trace histogram [13, 12, 12, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:53,533 INFO L408 AbstractCegarLoop]: === Iteration 18 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:53,533 INFO L82 PathProgramCache]: Analyzing trace with hash 1183611017, now seen corresponding path program 12 times [2018-04-11 12:47:53,534 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:53,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:53,561 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:54,694 INFO L134 CoverageAnalysis]: Checked inductivity of 552 backedges. 0 proven. 552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:54,694 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:47:54,694 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21] total 21 [2018-04-11 12:47:54,695 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:54,695 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:54,695 INFO L182 omatonBuilderFactory]: Interpolants [2601#true, 2602#false, 2603#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 2604#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 2605#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 2606#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 4 main_~a~0.offset) (< 12 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 4) (<= main_~length~0 12))), 2607#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 8) (<= main_~length~0 12)) (or (<= 8 main_~a~0.offset) (< 12 main_~length~0)) (= main_~arr~0.offset 0)), 2608#(and (or (<= main_~length~0 12) (<= main_~a~0.offset 12)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 12 main_~a~0.offset) (< 12 main_~length~0)) (= main_~arr~0.offset 0)), 2609#(and (or (<= 16 main_~a~0.offset) (< 12 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 12) (<= main_~a~0.offset 16)) (= main_~arr~0.offset 0)), 2610#(and (or (<= main_~a~0.offset 20) (<= main_~length~0 12)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 20 main_~a~0.offset) (< 12 main_~length~0))), 2611#(and (or (< 12 main_~length~0) (<= 24 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 12) (<= main_~a~0.offset 24)) (= main_~arr~0.offset 0)), 2612#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 28) (<= main_~length~0 12)) (or (< 12 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.offset 0)), 2613#(and (or (<= 32 main_~a~0.offset) (< 12 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 12) (<= main_~a~0.offset 32)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 2614#(and (or (<= 32 main_~a~0.offset) (< 12 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 12) (<= main_~a~0.offset 32)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 2615#(and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 12) (<= main_~a~0.offset 36)) (= main_~arr~0.offset 0) (or (<= 36 main_~a~0.offset) (< 12 main_~length~0))), 2616#(and (<= 8 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (or (<= 40 main_~a~0.offset) (< 12 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 12) (<= main_~a~0.offset 40))), 2617#(and (= main_~a~0.base main_~arr~0.base) (= main_~arr~0.offset 0) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (< 12 main_~length~0) (<= main_~a~0.offset 44))) (<= 12 main_~a~0.offset)))), 2618#(and (or (and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 12 main_~a~0.offset) (< 12 main_~length~0) (<= main_~a~0.offset 44)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 2619#(and (or (and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 12 main_~a~0.offset) (< 12 main_~length~0) (<= main_~a~0.offset 44)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (= main_~arr~0.offset 0)), 2620#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 12 main_~a~0.offset) (< 12 main_~length~0) (<= main_~a~0.offset 44) (= main_~arr~0.offset 0)), 2621#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 12 main_~a~0.offset)), 2622#(and (<= 16 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:47:54,695 INFO L134 CoverageAnalysis]: Checked inductivity of 552 backedges. 0 proven. 552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:54,695 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-04-11 12:47:54,695 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-04-11 12:47:54,695 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=400, Unknown=0, NotChecked=0, Total=462 [2018-04-11 12:47:54,696 INFO L87 Difference]: Start difference. First operand 116 states and 116 transitions. Second operand 22 states. [2018-04-11 12:47:55,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:55,620 INFO L93 Difference]: Finished difference Result 125 states and 125 transitions. [2018-04-11 12:47:55,621 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-04-11 12:47:55,621 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 108 [2018-04-11 12:47:55,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:55,621 INFO L225 Difference]: With dead ends: 125 [2018-04-11 12:47:55,621 INFO L226 Difference]: Without dead ends: 125 [2018-04-11 12:47:55,622 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 260 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=183, Invalid=1377, Unknown=0, NotChecked=0, Total=1560 [2018-04-11 12:47:55,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-04-11 12:47:55,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 124. [2018-04-11 12:47:55,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-04-11 12:47:55,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 124 transitions. [2018-04-11 12:47:55,623 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 124 transitions. Word has length 108 [2018-04-11 12:47:55,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:55,623 INFO L459 AbstractCegarLoop]: Abstraction has 124 states and 124 transitions. [2018-04-11 12:47:55,623 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-04-11 12:47:55,623 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 124 transitions. [2018-04-11 12:47:55,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-04-11 12:47:55,624 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:55,625 INFO L355 BasicCegarLoop]: trace histogram [14, 13, 13, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:55,625 INFO L408 AbstractCegarLoop]: === Iteration 19 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:55,625 INFO L82 PathProgramCache]: Analyzing trace with hash 2011365816, now seen corresponding path program 13 times [2018-04-11 12:47:55,625 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:55,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:55,644 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:56,528 INFO L134 CoverageAnalysis]: Checked inductivity of 650 backedges. 0 proven. 650 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:56,528 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:47:56,528 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21] total 21 [2018-04-11 12:47:56,528 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:56,529 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:56,529 INFO L182 omatonBuilderFactory]: Interpolants [2912#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 2913#(and (or (<= main_~a~0.offset 4) (<= main_~length~0 13)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 4 main_~a~0.offset) (< 13 main_~length~0)) (= main_~arr~0.offset 0)), 2914#(and (or (<= 8 main_~a~0.offset) (< 13 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 8) (<= main_~length~0 13)) (= main_~arr~0.offset 0)), 2915#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 12 main_~a~0.offset) (< 13 main_~length~0)) (or (<= main_~a~0.offset 12) (<= main_~length~0 13)) (= main_~arr~0.offset 0)), 2916#(and (or (<= 16 main_~a~0.offset) (< 13 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 16) (<= main_~length~0 13)) (= main_~arr~0.offset 0)), 2917#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 20) (<= main_~length~0 13)) (or (<= 20 main_~a~0.offset) (< 13 main_~length~0)) (= main_~arr~0.offset 0)), 2918#(and (or (< 13 main_~length~0) (<= 24 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 24) (<= main_~length~0 13)) (= main_~arr~0.offset 0)), 2919#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 28) (<= main_~length~0 13)) (= main_~arr~0.offset 0) (or (< 13 main_~length~0) (<= 28 main_~a~0.offset))), 2920#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 32 main_~a~0.offset) (< 13 main_~length~0)) (or (<= main_~length~0 13) (<= main_~a~0.offset 32)) (= main_~arr~0.offset 0)), 2921#(and (or (<= main_~length~0 13) (<= main_~a~0.offset 36)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 36 main_~a~0.offset) (< 13 main_~length~0))), 2922#(and (or (<= main_~a~0.offset 40) (<= main_~length~0 13)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 40 main_~a~0.offset) (< 13 main_~length~0)) (= main_~arr~0.offset 0)), 2923#(and (or (<= 44 main_~a~0.offset) (< 13 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 44) (<= main_~length~0 13)) (= main_~arr~0.offset 0)), 2924#(and (= main_~a~0.base main_~arr~0.base) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (< 13 main_~length~0) (<= main_~a~0.offset 48))) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)))) (= main_~arr~0.offset 0)), 2925#(and (or (and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 13 main_~length~0) (<= main_~a~0.offset 48)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 2926#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (or (and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 13 main_~length~0) (<= main_~a~0.offset 48)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 2927#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (< 13 main_~length~0) (<= main_~a~0.offset 48) (= main_~arr~0.offset 0)), 2928#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 2929#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base))), 2908#true, 2909#false, 2910#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 2911#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0))] [2018-04-11 12:47:56,529 INFO L134 CoverageAnalysis]: Checked inductivity of 650 backedges. 0 proven. 650 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:56,529 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-04-11 12:47:56,529 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-04-11 12:47:56,529 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=401, Unknown=0, NotChecked=0, Total=462 [2018-04-11 12:47:56,529 INFO L87 Difference]: Start difference. First operand 124 states and 124 transitions. Second operand 22 states. [2018-04-11 12:47:57,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:57,539 INFO L93 Difference]: Finished difference Result 133 states and 133 transitions. [2018-04-11 12:47:57,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-04-11 12:47:57,539 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 116 [2018-04-11 12:47:57,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:57,540 INFO L225 Difference]: With dead ends: 133 [2018-04-11 12:47:57,540 INFO L226 Difference]: Without dead ends: 133 [2018-04-11 12:47:57,540 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 242 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=180, Invalid=1380, Unknown=0, NotChecked=0, Total=1560 [2018-04-11 12:47:57,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-04-11 12:47:57,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 132. [2018-04-11 12:47:57,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-04-11 12:47:57,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 132 transitions. [2018-04-11 12:47:57,543 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 132 transitions. Word has length 116 [2018-04-11 12:47:57,543 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:57,543 INFO L459 AbstractCegarLoop]: Abstraction has 132 states and 132 transitions. [2018-04-11 12:47:57,543 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-04-11 12:47:57,543 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 132 transitions. [2018-04-11 12:47:57,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-04-11 12:47:57,544 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:57,544 INFO L355 BasicCegarLoop]: trace histogram [15, 14, 14, 14, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:57,544 INFO L408 AbstractCegarLoop]: === Iteration 20 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:57,544 INFO L82 PathProgramCache]: Analyzing trace with hash -885986329, now seen corresponding path program 14 times [2018-04-11 12:47:57,544 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:57,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:57,560 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:47:58,445 INFO L134 CoverageAnalysis]: Checked inductivity of 756 backedges. 0 proven. 756 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:58,445 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:47:58,445 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23] total 23 [2018-04-11 12:47:58,446 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:47:58,446 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:58,446 INFO L182 omatonBuilderFactory]: Interpolants [3232#false, 3233#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 3234#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 3235#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 3236#(and (or (<= main_~a~0.offset 4) (<= main_~length~0 14)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 4 main_~a~0.offset) (< 14 main_~length~0)) (= main_~arr~0.offset 0)), 3237#(and (or (<= 8 main_~a~0.offset) (< 14 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 8) (<= main_~length~0 14)) (= main_~arr~0.offset 0)), 3238#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 12) (<= main_~length~0 14)) (= main_~arr~0.offset 0) (or (< 14 main_~length~0) (<= 12 main_~a~0.offset))), 3239#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~a~0.offset 16) (<= main_~length~0 14)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 16 main_~a~0.offset) (< 14 main_~length~0)) (= main_~arr~0.offset 0)), 3240#(and (or (<= 20 main_~a~0.offset) (< 14 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 20) (<= main_~length~0 14)) (= main_~arr~0.offset 0)), 3241#(and (or (< 14 main_~length~0) (<= 24 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 14) (<= main_~a~0.offset 24))), 3242#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 14 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 28) (<= main_~length~0 14))), 3243#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 14) (<= main_~a~0.offset 32)) (or (<= 32 main_~a~0.offset) (< 14 main_~length~0)) (= main_~arr~0.offset 0)), 3244#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 14) (<= main_~a~0.offset 36)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 36 main_~a~0.offset) (< 14 main_~length~0))), 3245#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 14) (<= main_~a~0.offset 40)) (= main_~arr~0.offset 0) (or (<= 40 main_~a~0.offset) (< 14 main_~length~0))), 3246#(and (or (<= main_~a~0.offset 44) (<= main_~length~0 14)) (or (<= 44 main_~a~0.offset) (< 14 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 3247#(and (or (<= main_~length~0 14) (<= main_~a~0.offset 48)) (or (<= 48 main_~a~0.offset) (< 14 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 3248#(and (or (<= main_~length~0 14) (<= main_~a~0.offset 48)) (or (<= 48 main_~a~0.offset) (< 14 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 3249#(and (= main_~a~0.base main_~arr~0.base) (or (and (or (and (< 14 main_~length~0) (<= main_~a~0.offset 52)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (<= 4 main_~a~0.offset) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base))) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0)), 3250#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= 4 main_~a~0.offset) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 14 main_~length~0) (<= main_~a~0.offset 52))) (= main_~arr~0.base main_~a~0.base) (= main_~arr~0.offset 0)), 3251#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= 4 main_~a~0.offset) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 14 main_~length~0) (<= main_~a~0.offset 52))) (= main_~arr~0.base main_~a~0.base) (= main_~arr~0.offset 0)), 3252#(and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 14 main_~length~0) (= main_~arr~0.offset 0) (<= main_~a~0.offset 52)), 3253#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 4 main_~a~0.offset)), 3254#(and (<= 8 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base))), 3231#true] [2018-04-11 12:47:58,447 INFO L134 CoverageAnalysis]: Checked inductivity of 756 backedges. 0 proven. 756 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:47:58,447 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-11 12:47:58,447 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-11 12:47:58,447 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=484, Unknown=0, NotChecked=0, Total=552 [2018-04-11 12:47:58,447 INFO L87 Difference]: Start difference. First operand 132 states and 132 transitions. Second operand 24 states. [2018-04-11 12:47:59,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:47:59,598 INFO L93 Difference]: Finished difference Result 141 states and 141 transitions. [2018-04-11 12:47:59,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-04-11 12:47:59,598 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 124 [2018-04-11 12:47:59,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:47:59,599 INFO L225 Difference]: With dead ends: 141 [2018-04-11 12:47:59,599 INFO L226 Difference]: Without dead ends: 141 [2018-04-11 12:47:59,599 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 311 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=201, Invalid=1691, Unknown=0, NotChecked=0, Total=1892 [2018-04-11 12:47:59,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-04-11 12:47:59,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 140. [2018-04-11 12:47:59,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-04-11 12:47:59,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 140 transitions. [2018-04-11 12:47:59,601 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 140 transitions. Word has length 124 [2018-04-11 12:47:59,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:47:59,601 INFO L459 AbstractCegarLoop]: Abstraction has 140 states and 140 transitions. [2018-04-11 12:47:59,601 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-11 12:47:59,601 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 140 transitions. [2018-04-11 12:47:59,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-04-11 12:47:59,601 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:47:59,601 INFO L355 BasicCegarLoop]: trace histogram [16, 15, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:47:59,601 INFO L408 AbstractCegarLoop]: === Iteration 21 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:47:59,602 INFO L82 PathProgramCache]: Analyzing trace with hash 1199912726, now seen corresponding path program 15 times [2018-04-11 12:47:59,602 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:47:59,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:47:59,619 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:48:00,714 INFO L134 CoverageAnalysis]: Checked inductivity of 870 backedges. 0 proven. 870 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:00,714 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:48:00,714 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23] total 23 [2018-04-11 12:48:00,715 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:48:00,715 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:00,715 INFO L182 omatonBuilderFactory]: Interpolants [3584#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~a~0.offset 16) (<= main_~length~0 15)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 15 main_~length~0) (<= 16 main_~a~0.offset)) (= main_~arr~0.offset 0)), 3585#(and (or (<= 20 main_~a~0.offset) (< 15 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 20) (<= main_~length~0 15)) (= main_~arr~0.offset 0)), 3586#(and (or (<= main_~a~0.offset 24) (<= main_~length~0 15)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 15 main_~length~0) (<= 24 main_~a~0.offset))), 3587#(and (or (< 15 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 28) (<= main_~length~0 15)) (= main_~arr~0.offset 0)), 3588#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 15) (<= main_~a~0.offset 32)) (= main_~arr~0.offset 0) (or (<= 32 main_~a~0.offset) (< 15 main_~length~0))), 3589#(and (or (<= main_~a~0.offset 36) (<= main_~length~0 15)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 36 main_~a~0.offset) (< 15 main_~length~0))), 3590#(and (or (<= main_~a~0.offset 40) (<= main_~length~0 15)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 40 main_~a~0.offset) (< 15 main_~length~0))), 3591#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 44 main_~a~0.offset) (< 15 main_~length~0)) (or (<= main_~a~0.offset 44) (<= main_~length~0 15))), 3592#(and (or (< 15 main_~length~0) (<= 48 main_~a~0.offset)) (or (<= main_~a~0.offset 48) (<= main_~length~0 15)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 3593#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 52) (<= main_~length~0 15)) (= main_~arr~0.offset 0) (or (< 15 main_~length~0) (<= 52 main_~a~0.offset))), 3594#(and (= main_~a~0.base main_~arr~0.base) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (or (and (< 15 main_~length~0) (<= main_~a~0.offset 56)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)))) (= main_~arr~0.offset 0)), 3595#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 15 main_~length~0) (<= 0 main_~a~0.offset) (<= main_~a~0.offset 56))) (= main_~arr~0.offset 0) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 3596#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 15 main_~length~0) (<= 0 main_~a~0.offset) (<= main_~a~0.offset 56))) (= main_~arr~0.offset 0)), 3597#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 15 main_~length~0) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (<= main_~a~0.offset 56)), 3598#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 3599#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base))), 3576#true, 3577#false, 3578#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 3579#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 3580#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 3581#(and (or (<= 4 main_~a~0.offset) (< 15 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 4) (<= main_~length~0 15)) (= main_~arr~0.offset 0)), 3582#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 8) (<= main_~length~0 15)) (or (<= 8 main_~a~0.offset) (< 15 main_~length~0))), 3583#(and (or (<= main_~a~0.offset 12) (<= main_~length~0 15)) (= main_~arr~0.base main_~a~0.base) (or (< 15 main_~length~0) (<= 12 main_~a~0.offset)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0))] [2018-04-11 12:48:00,715 INFO L134 CoverageAnalysis]: Checked inductivity of 870 backedges. 0 proven. 870 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:00,715 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-11 12:48:00,716 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-11 12:48:00,716 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=485, Unknown=0, NotChecked=0, Total=552 [2018-04-11 12:48:00,716 INFO L87 Difference]: Start difference. First operand 140 states and 140 transitions. Second operand 24 states. [2018-04-11 12:48:02,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:48:02,122 INFO L93 Difference]: Finished difference Result 149 states and 149 transitions. [2018-04-11 12:48:02,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-04-11 12:48:02,122 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 132 [2018-04-11 12:48:02,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:48:02,123 INFO L225 Difference]: With dead ends: 149 [2018-04-11 12:48:02,123 INFO L226 Difference]: Without dead ends: 149 [2018-04-11 12:48:02,123 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 293 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=198, Invalid=1694, Unknown=0, NotChecked=0, Total=1892 [2018-04-11 12:48:02,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-04-11 12:48:02,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 148. [2018-04-11 12:48:02,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-04-11 12:48:02,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 148 transitions. [2018-04-11 12:48:02,126 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 148 transitions. Word has length 132 [2018-04-11 12:48:02,126 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:48:02,126 INFO L459 AbstractCegarLoop]: Abstraction has 148 states and 148 transitions. [2018-04-11 12:48:02,126 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-11 12:48:02,126 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 148 transitions. [2018-04-11 12:48:02,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-04-11 12:48:02,127 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:48:02,127 INFO L355 BasicCegarLoop]: trace histogram [17, 16, 16, 16, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:48:02,127 INFO L408 AbstractCegarLoop]: === Iteration 22 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:48:02,127 INFO L82 PathProgramCache]: Analyzing trace with hash 1961812805, now seen corresponding path program 16 times [2018-04-11 12:48:02,128 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:48:02,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:48:02,162 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:48:03,133 INFO L134 CoverageAnalysis]: Checked inductivity of 992 backedges. 0 proven. 992 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:03,133 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:48:03,133 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24] total 24 [2018-04-11 12:48:03,134 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:48:03,134 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:03,134 INFO L182 omatonBuilderFactory]: Interpolants [3937#true, 3938#false, 3939#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 3940#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 3941#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 3942#(and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 4) (<= main_~length~0 16)) (= main_~arr~0.offset 0)), 3943#(and (<= 8 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 16) (<= main_~a~0.offset 8)) (= main_~arr~0.offset 0)), 3944#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 12 main_~a~0.offset) (or (<= main_~length~0 16) (<= main_~a~0.offset 12)) (= main_~arr~0.offset 0)), 3945#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 16 main_~a~0.offset) (= main_~arr~0.offset 0) (or (<= main_~length~0 16) (<= main_~a~0.offset 16))), 3946#(and (or (<= main_~length~0 16) (<= main_~a~0.offset 20)) (<= 20 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 3947#(and (or (<= main_~length~0 16) (<= main_~a~0.offset 24)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (<= 24 main_~a~0.offset)), 3948#(and (or (<= main_~length~0 16) (<= main_~a~0.offset 28)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (<= 28 main_~a~0.offset)), 3949#(and (<= 32 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 16) (<= main_~a~0.offset 32)) (= main_~arr~0.offset 0)), 3950#(and (<= 36 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 16) (<= main_~a~0.offset 36)) (= main_~arr~0.offset 0)), 3951#(and (<= 40 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 16) (<= main_~a~0.offset 40)) (= main_~arr~0.offset 0)), 3952#(and (<= 44 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 16) (<= main_~a~0.offset 44)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 3953#(and (or (<= main_~length~0 16) (<= main_~a~0.offset 48)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 48 main_~a~0.offset) (= main_~arr~0.offset 0)), 3954#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 52 main_~a~0.offset) (= main_~arr~0.offset 0) (or (<= main_~length~0 16) (<= main_~a~0.offset 52))), 3955#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 16) (<= main_~a~0.offset 56)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 56 main_~a~0.offset) (= main_~arr~0.offset 0)), 3956#(and (= main_~a~0.base main_~arr~0.base) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= 60 main_~a~0.offset) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 60) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0)))), 3957#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 60) (<= 60 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0))))) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 3958#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 60) (<= 60 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0))))) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 3959#(and (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (<= main_~a~0.offset 60) (<= 60 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))), 3960#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 60 main_~a~0.offset)), 3961#(and (<= 64 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:48:03,134 INFO L134 CoverageAnalysis]: Checked inductivity of 992 backedges. 0 proven. 992 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:03,134 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-04-11 12:48:03,135 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-04-11 12:48:03,135 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=530, Unknown=0, NotChecked=0, Total=600 [2018-04-11 12:48:03,135 INFO L87 Difference]: Start difference. First operand 148 states and 148 transitions. Second operand 25 states. [2018-04-11 12:48:04,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:48:04,390 INFO L93 Difference]: Finished difference Result 157 states and 157 transitions. [2018-04-11 12:48:04,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-04-11 12:48:04,390 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 140 [2018-04-11 12:48:04,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:48:04,391 INFO L225 Difference]: With dead ends: 157 [2018-04-11 12:48:04,391 INFO L226 Difference]: Without dead ends: 157 [2018-04-11 12:48:04,391 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 320 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=207, Invalid=1863, Unknown=0, NotChecked=0, Total=2070 [2018-04-11 12:48:04,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-04-11 12:48:04,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 156. [2018-04-11 12:48:04,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-04-11 12:48:04,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 156 transitions. [2018-04-11 12:48:04,394 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 156 transitions. Word has length 140 [2018-04-11 12:48:04,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:48:04,394 INFO L459 AbstractCegarLoop]: Abstraction has 156 states and 156 transitions. [2018-04-11 12:48:04,395 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-04-11 12:48:04,395 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 156 transitions. [2018-04-11 12:48:04,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2018-04-11 12:48:04,395 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:48:04,395 INFO L355 BasicCegarLoop]: trace histogram [18, 17, 17, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:48:04,396 INFO L408 AbstractCegarLoop]: === Iteration 23 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:48:04,396 INFO L82 PathProgramCache]: Analyzing trace with hash 1551691892, now seen corresponding path program 17 times [2018-04-11 12:48:04,396 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:48:04,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:48:04,427 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:48:05,659 INFO L134 CoverageAnalysis]: Checked inductivity of 1122 backedges. 0 proven. 1122 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:05,660 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:48:05,660 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25] total 25 [2018-04-11 12:48:05,660 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:48:05,660 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:05,660 INFO L182 omatonBuilderFactory]: Interpolants [4317#true, 4318#false, 4319#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 4320#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 4321#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 4322#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 17) (<= main_~a~0.offset 4)) (= main_~arr~0.offset 0) (or (< 17 main_~length~0) (<= 4 main_~a~0.offset))), 4323#(and (= main_~arr~0.base main_~a~0.base) (or (< 17 main_~length~0) (<= 8 main_~a~0.offset)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 17) (<= main_~a~0.offset 8)) (= main_~arr~0.offset 0)), 4324#(and (or (<= main_~length~0 17) (<= main_~a~0.offset 12)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 17 main_~length~0) (<= 12 main_~a~0.offset)) (= main_~arr~0.offset 0)), 4325#(and (or (<= main_~length~0 17) (<= main_~a~0.offset 16)) (or (< 17 main_~length~0) (<= 16 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 4326#(and (or (< 17 main_~length~0) (<= 20 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 17) (<= main_~a~0.offset 20)) (= main_~arr~0.offset 0)), 4327#(and (or (<= main_~length~0 17) (<= main_~a~0.offset 24)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 17 main_~length~0) (<= 24 main_~a~0.offset)) (= main_~arr~0.offset 0)), 4328#(and (or (< 17 main_~length~0) (<= 28 main_~a~0.offset)) (or (<= main_~length~0 17) (<= main_~a~0.offset 28)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 4329#(and (or (<= main_~length~0 17) (<= main_~a~0.offset 32)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 17 main_~length~0) (<= 32 main_~a~0.offset))), 4330#(and (or (<= 36 main_~a~0.offset) (< 17 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 17) (<= main_~a~0.offset 36))), 4331#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 17 main_~length~0) (<= 40 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~length~0 17) (<= main_~a~0.offset 40))), 4332#(and (or (< 17 main_~length~0) (<= 44 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 17) (<= main_~a~0.offset 44)) (= main_~arr~0.offset 0)), 4333#(and (or (<= main_~length~0 17) (<= main_~a~0.offset 48)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 17 main_~length~0) (<= 48 main_~a~0.offset)) (= main_~arr~0.offset 0)), 4334#(and (or (< 17 main_~length~0) (<= 52 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 17) (<= main_~a~0.offset 52)) (= main_~arr~0.offset 0)), 4335#(and (or (< 17 main_~length~0) (<= 56 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 17) (<= main_~a~0.offset 56))), 4336#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 17 main_~length~0) (<= 60 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~length~0 17) (<= main_~a~0.offset 60))), 4337#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (< 17 main_~length~0) (<= main_~a~0.offset 64)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0)), 4338#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (< 17 main_~length~0) (<= main_~a~0.offset 64)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))), 4339#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (< 17 main_~length~0) (<= main_~a~0.offset 64)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))), 4340#(and (< 17 main_~length~0) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (<= main_~a~0.offset 64)), 4341#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 4342#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:48:05,661 INFO L134 CoverageAnalysis]: Checked inductivity of 1122 backedges. 0 proven. 1122 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:05,661 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-04-11 12:48:05,661 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-04-11 12:48:05,661 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=574, Unknown=0, NotChecked=0, Total=650 [2018-04-11 12:48:05,661 INFO L87 Difference]: Start difference. First operand 156 states and 156 transitions. Second operand 26 states. [2018-04-11 12:48:07,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:48:07,037 INFO L93 Difference]: Finished difference Result 165 states and 165 transitions. [2018-04-11 12:48:07,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-11 12:48:07,037 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 148 [2018-04-11 12:48:07,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:48:07,038 INFO L225 Difference]: With dead ends: 165 [2018-04-11 12:48:07,038 INFO L226 Difference]: Without dead ends: 165 [2018-04-11 12:48:07,039 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 302 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=219, Invalid=2037, Unknown=0, NotChecked=0, Total=2256 [2018-04-11 12:48:07,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-04-11 12:48:07,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 164. [2018-04-11 12:48:07,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-04-11 12:48:07,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 164 transitions. [2018-04-11 12:48:07,043 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 164 transitions. Word has length 148 [2018-04-11 12:48:07,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:48:07,043 INFO L459 AbstractCegarLoop]: Abstraction has 164 states and 164 transitions. [2018-04-11 12:48:07,043 INFO L460 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-04-11 12:48:07,043 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 164 transitions. [2018-04-11 12:48:07,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2018-04-11 12:48:07,044 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:48:07,044 INFO L355 BasicCegarLoop]: trace histogram [19, 18, 18, 18, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:48:07,044 INFO L408 AbstractCegarLoop]: === Iteration 24 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:48:07,044 INFO L82 PathProgramCache]: Analyzing trace with hash -2009178461, now seen corresponding path program 18 times [2018-04-11 12:48:07,045 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:48:07,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:48:07,072 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:48:08,348 INFO L134 CoverageAnalysis]: Checked inductivity of 1260 backedges. 0 proven. 1260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:08,349 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:48:08,349 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27] total 27 [2018-04-11 12:48:08,349 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:48:08,349 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:08,349 INFO L182 omatonBuilderFactory]: Interpolants [4736#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 18) (<= main_~a~0.offset 64)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 64 main_~a~0.offset) (< 18 main_~length~0)) (= main_~arr~0.offset 0)), 4737#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 18) (<= main_~a~0.offset 64)) (or (<= 64 main_~a~0.offset) (< 18 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 4738#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= 4 main_~a~0.offset) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (<= main_~a~0.offset 68) (< 18 main_~length~0)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))))) (= main_~a~0.base main_~arr~0.base) (= main_~arr~0.offset 0)), 4739#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (<= main_~a~0.offset 68) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 18 main_~length~0))) (= main_~arr~0.offset 0) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 4740#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (<= main_~a~0.offset 68) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 18 main_~length~0))) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (= main_~arr~0.offset 0)), 4741#(and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (<= main_~a~0.offset 68) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (< 18 main_~length~0)), 4742#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 4 main_~a~0.offset)), 4743#(and (<= 8 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base))), 4716#true, 4717#false, 4718#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 4719#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 4720#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 4721#(and (or (<= main_~a~0.offset 4) (<= main_~length~0 18)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 4 main_~a~0.offset) (< 18 main_~length~0))), 4722#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 8) (<= main_~length~0 18)) (or (<= 8 main_~a~0.offset) (< 18 main_~length~0))), 4723#(and (or (<= main_~length~0 18) (<= main_~a~0.offset 12)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 12 main_~a~0.offset) (< 18 main_~length~0))), 4724#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 18) (<= main_~a~0.offset 16)) (or (<= 16 main_~a~0.offset) (< 18 main_~length~0))), 4725#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 20 main_~a~0.offset) (< 18 main_~length~0)) (or (<= main_~a~0.offset 20) (<= main_~length~0 18)) (= main_~arr~0.offset 0)), 4726#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 18) (<= main_~a~0.offset 24)) (or (<= 24 main_~a~0.offset) (< 18 main_~length~0))), 4727#(and (or (<= main_~length~0 18) (<= main_~a~0.offset 28)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 18 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.offset 0)), 4728#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 18) (<= main_~a~0.offset 32)) (or (<= 32 main_~a~0.offset) (< 18 main_~length~0)) (= main_~arr~0.offset 0)), 4729#(and (= main_~arr~0.base main_~a~0.base) (or (<= 36 main_~a~0.offset) (< 18 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 18) (<= main_~a~0.offset 36)) (= main_~arr~0.offset 0)), 4730#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 18) (<= main_~a~0.offset 40)) (or (<= 40 main_~a~0.offset) (< 18 main_~length~0)) (= main_~arr~0.offset 0)), 4731#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 44 main_~a~0.offset) (< 18 main_~length~0)) (or (<= main_~length~0 18) (<= main_~a~0.offset 44)) (= main_~arr~0.offset 0)), 4732#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 18) (<= main_~a~0.offset 48)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 48 main_~a~0.offset) (< 18 main_~length~0)) (= main_~arr~0.offset 0)), 4733#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 52 main_~a~0.offset) (< 18 main_~length~0)) (or (<= main_~length~0 18) (<= main_~a~0.offset 52)) (= main_~arr~0.offset 0)), 4734#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 56 main_~a~0.offset) (< 18 main_~length~0)) (or (<= main_~length~0 18) (<= main_~a~0.offset 56))), 4735#(and (= main_~arr~0.base main_~a~0.base) (or (<= 60 main_~a~0.offset) (< 18 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 60) (<= main_~length~0 18)) (= main_~arr~0.offset 0))] [2018-04-11 12:48:08,350 INFO L134 CoverageAnalysis]: Checked inductivity of 1260 backedges. 0 proven. 1260 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:08,350 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-04-11 12:48:08,350 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-04-11 12:48:08,350 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=676, Unknown=0, NotChecked=0, Total=756 [2018-04-11 12:48:08,350 INFO L87 Difference]: Start difference. First operand 164 states and 164 transitions. Second operand 28 states. [2018-04-11 12:48:09,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:48:09,945 INFO L93 Difference]: Finished difference Result 173 states and 173 transitions. [2018-04-11 12:48:09,945 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-04-11 12:48:09,945 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 156 [2018-04-11 12:48:09,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:48:09,946 INFO L225 Difference]: With dead ends: 173 [2018-04-11 12:48:09,946 INFO L226 Difference]: Without dead ends: 173 [2018-04-11 12:48:09,946 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 429 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=237, Invalid=2415, Unknown=0, NotChecked=0, Total=2652 [2018-04-11 12:48:09,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-04-11 12:48:09,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 172. [2018-04-11 12:48:09,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-04-11 12:48:09,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 172 transitions. [2018-04-11 12:48:09,949 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 172 transitions. Word has length 156 [2018-04-11 12:48:09,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:48:09,949 INFO L459 AbstractCegarLoop]: Abstraction has 172 states and 172 transitions. [2018-04-11 12:48:09,949 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-04-11 12:48:09,949 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 172 transitions. [2018-04-11 12:48:09,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-04-11 12:48:09,950 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:48:09,950 INFO L355 BasicCegarLoop]: trace histogram [20, 19, 19, 19, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:48:09,950 INFO L408 AbstractCegarLoop]: === Iteration 25 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:48:09,950 INFO L82 PathProgramCache]: Analyzing trace with hash 54668754, now seen corresponding path program 19 times [2018-04-11 12:48:09,951 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:48:09,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:48:09,972 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:48:11,257 INFO L134 CoverageAnalysis]: Checked inductivity of 1406 backedges. 0 proven. 1406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:11,258 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:48:11,258 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27] total 27 [2018-04-11 12:48:11,258 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:48:11,258 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:11,258 INFO L182 omatonBuilderFactory]: Interpolants [5137#true, 5138#false, 5139#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 5140#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 5141#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 5142#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 19 main_~length~0) (<= 4 main_~a~0.offset)) (or (<= main_~a~0.offset 4) (<= main_~length~0 19)) (= main_~arr~0.offset 0)), 5143#(and (or (< 19 main_~length~0) (<= 8 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 19) (<= main_~a~0.offset 8))), 5144#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 19) (<= main_~a~0.offset 12)) (or (< 19 main_~length~0) (<= 12 main_~a~0.offset)) (= main_~arr~0.offset 0)), 5145#(and (or (< 19 main_~length~0) (<= 16 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 19) (<= main_~a~0.offset 16)) (= main_~arr~0.offset 0)), 5146#(and (or (< 19 main_~length~0) (<= 20 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 19) (<= main_~a~0.offset 20))), 5147#(and (or (< 19 main_~length~0) (<= 24 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 19) (<= main_~a~0.offset 24)) (= main_~arr~0.offset 0)), 5148#(and (or (< 19 main_~length~0) (<= 28 main_~a~0.offset)) (or (<= main_~length~0 19) (<= main_~a~0.offset 28)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 5149#(and (or (< 19 main_~length~0) (<= 32 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 19) (<= main_~a~0.offset 32))), 5150#(and (or (<= 36 main_~a~0.offset) (< 19 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 19) (<= main_~a~0.offset 36)) (= main_~arr~0.offset 0)), 5151#(and (or (< 19 main_~length~0) (<= 40 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 19) (<= main_~a~0.offset 40)) (= main_~arr~0.offset 0)), 5152#(and (or (< 19 main_~length~0) (<= 44 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 19) (<= main_~a~0.offset 44))), 5153#(and (or (< 19 main_~length~0) (<= 48 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 19) (<= main_~a~0.offset 48))), 5154#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 19) (<= main_~a~0.offset 52)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 19 main_~length~0) (<= 52 main_~a~0.offset)) (= main_~arr~0.offset 0)), 5155#(and (or (< 19 main_~length~0) (<= 56 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 19) (<= main_~a~0.offset 56)) (= main_~arr~0.offset 0)), 5156#(and (or (< 19 main_~length~0) (<= 60 main_~a~0.offset)) (or (<= main_~a~0.offset 60) (<= main_~length~0 19)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 5157#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 19 main_~length~0) (<= 64 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~length~0 19) (<= main_~a~0.offset 64))), 5158#(and (or (<= main_~length~0 19) (<= main_~a~0.offset 68)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 19 main_~length~0) (<= 68 main_~a~0.offset)) (= main_~arr~0.offset 0)), 5159#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (and (< 19 main_~length~0) (<= main_~a~0.offset 72)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)))), 5160#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (or (and (< 19 main_~length~0) (<= main_~a~0.offset 72)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0)), 5161#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (or (and (< 19 main_~length~0) (<= main_~a~0.offset 72)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)))), 5162#(and (< 19 main_~length~0) (<= main_~a~0.offset 72) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 5163#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 5164#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:48:11,259 INFO L134 CoverageAnalysis]: Checked inductivity of 1406 backedges. 0 proven. 1406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:11,259 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-04-11 12:48:11,259 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-04-11 12:48:11,259 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=674, Unknown=0, NotChecked=0, Total=756 [2018-04-11 12:48:11,259 INFO L87 Difference]: Start difference. First operand 172 states and 172 transitions. Second operand 28 states. [2018-04-11 12:48:12,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:48:12,897 INFO L93 Difference]: Finished difference Result 181 states and 181 transitions. [2018-04-11 12:48:12,897 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-04-11 12:48:12,897 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 164 [2018-04-11 12:48:12,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:48:12,898 INFO L225 Difference]: With dead ends: 181 [2018-04-11 12:48:12,898 INFO L226 Difference]: Without dead ends: 181 [2018-04-11 12:48:12,898 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 355 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=237, Invalid=2415, Unknown=0, NotChecked=0, Total=2652 [2018-04-11 12:48:12,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-04-11 12:48:12,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 180. [2018-04-11 12:48:12,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-04-11 12:48:12,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 180 transitions. [2018-04-11 12:48:12,901 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 180 transitions. Word has length 164 [2018-04-11 12:48:12,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:48:12,901 INFO L459 AbstractCegarLoop]: Abstraction has 180 states and 180 transitions. [2018-04-11 12:48:12,901 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-04-11 12:48:12,901 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 180 transitions. [2018-04-11 12:48:12,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2018-04-11 12:48:12,902 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:48:12,902 INFO L355 BasicCegarLoop]: trace histogram [21, 20, 20, 20, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:48:12,902 INFO L408 AbstractCegarLoop]: === Iteration 26 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:48:12,902 INFO L82 PathProgramCache]: Analyzing trace with hash 1503092225, now seen corresponding path program 20 times [2018-04-11 12:48:12,906 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:48:12,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:48:12,934 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:48:14,287 INFO L134 CoverageAnalysis]: Checked inductivity of 1560 backedges. 0 proven. 1560 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:14,287 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:48:14,287 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29] total 29 [2018-04-11 12:48:14,287 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:48:14,288 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:14,288 INFO L182 omatonBuilderFactory]: Interpolants [5574#true, 5575#false, 5576#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 5577#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 5578#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 5579#(and (or (<= 4 main_~a~0.offset) (< 20 main_~length~0)) (or (<= main_~a~0.offset 4) (<= main_~length~0 20)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 5580#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 8 main_~a~0.offset) (< 20 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 8) (<= main_~length~0 20))), 5581#(and (or (<= main_~a~0.offset 12) (<= main_~length~0 20)) (or (<= 12 main_~a~0.offset) (< 20 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 5582#(and (or (<= 16 main_~a~0.offset) (< 20 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 16) (<= main_~length~0 20)) (= main_~arr~0.offset 0)), 5583#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 20 main_~a~0.offset) (< 20 main_~length~0)) (or (<= main_~a~0.offset 20) (<= main_~length~0 20))), 5584#(and (or (<= main_~a~0.offset 24) (<= main_~length~0 20)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 20 main_~length~0) (<= 24 main_~a~0.offset)) (= main_~arr~0.offset 0)), 5585#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 28) (<= main_~length~0 20)) (= main_~arr~0.offset 0) (or (< 20 main_~length~0) (<= 28 main_~a~0.offset))), 5586#(and (or (<= main_~length~0 20) (<= main_~a~0.offset 32)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 32 main_~a~0.offset) (< 20 main_~length~0)) (= main_~arr~0.offset 0)), 5587#(and (or (<= 36 main_~a~0.offset) (< 20 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 36) (<= main_~length~0 20)) (= main_~arr~0.offset 0)), 5588#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 40 main_~a~0.offset) (< 20 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 40) (<= main_~length~0 20))), 5589#(and (or (<= main_~a~0.offset 44) (<= main_~length~0 20)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 44 main_~a~0.offset) (< 20 main_~length~0)) (= main_~arr~0.offset 0)), 5590#(and (or (<= main_~a~0.offset 48) (<= main_~length~0 20)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 48 main_~a~0.offset) (< 20 main_~length~0)) (= main_~arr~0.offset 0)), 5591#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 52 main_~a~0.offset) (< 20 main_~length~0)) (or (<= main_~a~0.offset 52) (<= main_~length~0 20)) (= main_~arr~0.offset 0)), 5592#(and (or (<= main_~a~0.offset 56) (<= main_~length~0 20)) (or (<= 56 main_~a~0.offset) (< 20 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 5593#(and (or (<= 60 main_~a~0.offset) (< 20 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (or (<= main_~a~0.offset 60) (<= main_~length~0 20)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 5594#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 64) (<= main_~length~0 20)) (= main_~arr~0.offset 0) (or (<= 64 main_~a~0.offset) (< 20 main_~length~0))), 5595#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 64) (<= main_~length~0 20)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (or (<= 64 main_~a~0.offset) (< 20 main_~length~0))), 5596#(and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 68) (<= main_~length~0 20)) (= main_~arr~0.offset 0) (or (<= 68 main_~a~0.offset) (< 20 main_~length~0))), 5597#(and (<= 8 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 72) (<= main_~length~0 20)) (= main_~arr~0.offset 0) (or (<= 72 main_~a~0.offset) (< 20 main_~length~0))), 5598#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 12 main_~a~0.offset) (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (< 20 main_~length~0) (<= main_~a~0.offset 76))))) (= main_~a~0.base main_~arr~0.base) (= main_~arr~0.offset 0)), 5599#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 12 main_~a~0.offset) (< 20 main_~length~0) (<= main_~a~0.offset 76))) (= main_~arr~0.offset 0) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 5600#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 12 main_~a~0.offset) (< 20 main_~length~0) (<= main_~a~0.offset 76))) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (= main_~arr~0.offset 0)), 5601#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 12 main_~a~0.offset) (< 20 main_~length~0) (= main_~arr~0.offset 0) (<= main_~a~0.offset 76)), 5602#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 12 main_~a~0.offset)), 5603#(and (<= 16 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:48:14,288 INFO L134 CoverageAnalysis]: Checked inductivity of 1560 backedges. 0 proven. 1560 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:14,288 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-04-11 12:48:14,289 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-04-11 12:48:14,289 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=784, Unknown=0, NotChecked=0, Total=870 [2018-04-11 12:48:14,289 INFO L87 Difference]: Start difference. First operand 180 states and 180 transitions. Second operand 30 states. [2018-04-11 12:48:16,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:48:16,273 INFO L93 Difference]: Finished difference Result 189 states and 189 transitions. [2018-04-11 12:48:16,273 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-04-11 12:48:16,273 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 172 [2018-04-11 12:48:16,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:48:16,274 INFO L225 Difference]: With dead ends: 189 [2018-04-11 12:48:16,274 INFO L226 Difference]: Without dead ends: 189 [2018-04-11 12:48:16,274 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 496 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=255, Invalid=2825, Unknown=0, NotChecked=0, Total=3080 [2018-04-11 12:48:16,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-04-11 12:48:16,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 188. [2018-04-11 12:48:16,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-04-11 12:48:16,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 188 transitions. [2018-04-11 12:48:16,276 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 188 transitions. Word has length 172 [2018-04-11 12:48:16,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:48:16,276 INFO L459 AbstractCegarLoop]: Abstraction has 188 states and 188 transitions. [2018-04-11 12:48:16,276 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-04-11 12:48:16,276 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 188 transitions. [2018-04-11 12:48:16,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2018-04-11 12:48:16,277 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:48:16,277 INFO L355 BasicCegarLoop]: trace histogram [22, 21, 21, 21, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:48:16,277 INFO L408 AbstractCegarLoop]: === Iteration 27 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:48:16,277 INFO L82 PathProgramCache]: Analyzing trace with hash -1739788496, now seen corresponding path program 21 times [2018-04-11 12:48:16,277 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:48:16,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:48:16,305 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:48:17,579 INFO L134 CoverageAnalysis]: Checked inductivity of 1722 backedges. 0 proven. 1722 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:17,580 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:48:17,580 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29] total 29 [2018-04-11 12:48:17,580 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:48:17,580 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:17,580 INFO L182 omatonBuilderFactory]: Interpolants [6033#true, 6034#false, 6035#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 6036#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 6037#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 6038#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 4 main_~a~0.offset) (< 21 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 4) (<= main_~length~0 21))), 6039#(and (or (<= main_~a~0.offset 8) (<= main_~length~0 21)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 8 main_~a~0.offset) (< 21 main_~length~0))), 6040#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 12) (<= main_~length~0 21)) (or (<= 12 main_~a~0.offset) (< 21 main_~length~0)) (= main_~arr~0.offset 0)), 6041#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 16) (<= main_~length~0 21)) (or (<= 16 main_~a~0.offset) (< 21 main_~length~0)) (= main_~arr~0.offset 0)), 6042#(and (or (<= 20 main_~a~0.offset) (< 21 main_~length~0)) (or (<= main_~a~0.offset 20) (<= main_~length~0 21)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 6043#(and (or (<= 24 main_~a~0.offset) (< 21 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 24) (<= main_~length~0 21)) (= main_~arr~0.offset 0)), 6044#(and (= main_~arr~0.base main_~a~0.base) (or (<= 28 main_~a~0.offset) (< 21 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 28) (<= main_~length~0 21)) (= main_~arr~0.offset 0)), 6045#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 21) (<= main_~a~0.offset 32)) (or (<= 32 main_~a~0.offset) (< 21 main_~length~0)) (= main_~arr~0.offset 0)), 6046#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 36) (<= main_~length~0 21)) (or (<= 36 main_~a~0.offset) (< 21 main_~length~0)) (= main_~arr~0.offset 0)), 6047#(and (or (<= 40 main_~a~0.offset) (< 21 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 40) (<= main_~length~0 21)) (= main_~arr~0.offset 0)), 6048#(and (or (<= main_~a~0.offset 44) (<= main_~length~0 21)) (or (<= 44 main_~a~0.offset) (< 21 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 6049#(and (or (<= main_~a~0.offset 48) (<= main_~length~0 21)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 48 main_~a~0.offset) (< 21 main_~length~0))), 6050#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 52) (<= main_~length~0 21)) (or (<= 52 main_~a~0.offset) (< 21 main_~length~0)) (= main_~arr~0.offset 0)), 6051#(and (or (<= 56 main_~a~0.offset) (< 21 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 56) (<= main_~length~0 21))), 6052#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~a~0.offset 60) (<= main_~length~0 21)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 60 main_~a~0.offset) (< 21 main_~length~0)) (= main_~arr~0.offset 0)), 6053#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 64 main_~a~0.offset) (< 21 main_~length~0)) (or (<= main_~a~0.offset 64) (<= main_~length~0 21)) (= main_~arr~0.offset 0)), 6054#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 68) (<= main_~length~0 21)) (= main_~arr~0.offset 0) (or (<= 68 main_~a~0.offset) (< 21 main_~length~0))), 6055#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 72) (<= main_~length~0 21)) (= main_~arr~0.offset 0) (or (<= 72 main_~a~0.offset) (< 21 main_~length~0))), 6056#(and (or (<= main_~a~0.offset 76) (<= main_~length~0 21)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 76 main_~a~0.offset) (< 21 main_~length~0))), 6057#(and (or (and (<= main_~a~0.offset 80) (< 21 main_~length~0)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 6058#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (<= 0 main_~a~0.offset) (<= main_~a~0.offset 80) (< 21 main_~length~0)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0)), 6059#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (<= 0 main_~a~0.offset) (<= main_~a~0.offset 80) (< 21 main_~length~0)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0)), 6060#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (<= main_~a~0.offset 80) (= main_~arr~0.offset 0) (< 21 main_~length~0)), 6061#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 6062#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:48:17,581 INFO L134 CoverageAnalysis]: Checked inductivity of 1722 backedges. 0 proven. 1722 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:17,581 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-04-11 12:48:17,581 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-04-11 12:48:17,581 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=782, Unknown=0, NotChecked=0, Total=870 [2018-04-11 12:48:17,581 INFO L87 Difference]: Start difference. First operand 188 states and 188 transitions. Second operand 30 states. [2018-04-11 12:48:19,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:48:19,518 INFO L93 Difference]: Finished difference Result 197 states and 197 transitions. [2018-04-11 12:48:19,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-04-11 12:48:19,518 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 180 [2018-04-11 12:48:19,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:48:19,519 INFO L225 Difference]: With dead ends: 197 [2018-04-11 12:48:19,519 INFO L226 Difference]: Without dead ends: 197 [2018-04-11 12:48:19,519 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 412 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=255, Invalid=2825, Unknown=0, NotChecked=0, Total=3080 [2018-04-11 12:48:19,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-04-11 12:48:19,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 196. [2018-04-11 12:48:19,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196 states. [2018-04-11 12:48:19,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 196 transitions. [2018-04-11 12:48:19,522 INFO L78 Accepts]: Start accepts. Automaton has 196 states and 196 transitions. Word has length 180 [2018-04-11 12:48:19,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:48:19,523 INFO L459 AbstractCegarLoop]: Abstraction has 196 states and 196 transitions. [2018-04-11 12:48:19,523 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-04-11 12:48:19,523 INFO L276 IsEmpty]: Start isEmpty. Operand 196 states and 196 transitions. [2018-04-11 12:48:19,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 189 [2018-04-11 12:48:19,523 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:48:19,524 INFO L355 BasicCegarLoop]: trace histogram [23, 22, 22, 22, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:48:19,524 INFO L408 AbstractCegarLoop]: === Iteration 28 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:48:19,524 INFO L82 PathProgramCache]: Analyzing trace with hash 1299308895, now seen corresponding path program 22 times [2018-04-11 12:48:19,524 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:48:19,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:48:19,557 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:48:20,952 INFO L134 CoverageAnalysis]: Checked inductivity of 1892 backedges. 0 proven. 1892 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:20,953 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:48:20,953 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31] total 31 [2018-04-11 12:48:20,953 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:48:20,953 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:20,953 INFO L182 omatonBuilderFactory]: Interpolants [6528#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 64 main_~a~0.offset) (< 22 main_~length~0)) (or (<= main_~length~0 22) (<= main_~a~0.offset 64)) (= main_~arr~0.offset 0)), 6529#(and (or (<= 68 main_~a~0.offset) (< 22 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 22) (<= main_~a~0.offset 68)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 6530#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~a~0.offset 72) (<= main_~length~0 22)) (or (<= 72 main_~a~0.offset) (< 22 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 6531#(and (or (<= 76 main_~a~0.offset) (< 22 main_~length~0)) (or (<= main_~length~0 22) (<= main_~a~0.offset 76)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 6532#(and (or (<= main_~length~0 22) (<= main_~a~0.offset 80)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 80 main_~a~0.offset) (< 22 main_~length~0))), 6533#(and (or (<= main_~length~0 22) (<= main_~a~0.offset 80)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (or (<= 80 main_~a~0.offset) (< 22 main_~length~0))), 6534#(and (= main_~a~0.base main_~arr~0.base) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= 4 main_~a~0.offset) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 84) (< 22 main_~length~0))) (= main_~arr~0.offset 0)))), 6535#(and (or (and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= main_~a~0.offset 84) (= main_~arr~0.offset 0) (< 22 main_~length~0)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 6536#(and (or (and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= main_~a~0.offset 84) (= main_~arr~0.offset 0) (< 22 main_~length~0)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 6537#(and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= main_~a~0.offset 84) (= main_~arr~0.offset 0) (< 22 main_~length~0)), 6538#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 4 main_~a~0.offset)), 6539#(and (<= 8 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base))), 6508#true, 6509#false, 6510#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 6511#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 6512#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 6513#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~a~0.offset 4) (<= main_~length~0 22)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 4 main_~a~0.offset) (< 22 main_~length~0)) (= main_~arr~0.offset 0)), 6514#(and (= main_~arr~0.base main_~a~0.base) (or (<= 8 main_~a~0.offset) (< 22 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 8) (<= main_~length~0 22)) (= main_~arr~0.offset 0)), 6515#(and (or (<= 12 main_~a~0.offset) (< 22 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 22) (<= main_~a~0.offset 12))), 6516#(and (or (<= 16 main_~a~0.offset) (< 22 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 22) (<= main_~a~0.offset 16)) (= main_~arr~0.offset 0)), 6517#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 20) (<= main_~length~0 22)) (= main_~arr~0.offset 0) (or (<= 20 main_~a~0.offset) (< 22 main_~length~0))), 6518#(and (or (<= main_~length~0 22) (<= main_~a~0.offset 24)) (= main_~arr~0.base main_~a~0.base) (or (<= 24 main_~a~0.offset) (< 22 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 6519#(and (or (<= main_~length~0 22) (<= main_~a~0.offset 28)) (or (< 22 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 6520#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 32 main_~a~0.offset) (< 22 main_~length~0)) (or (<= main_~length~0 22) (<= main_~a~0.offset 32)) (= main_~arr~0.offset 0)), 6521#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 22) (<= main_~a~0.offset 36)) (= main_~arr~0.offset 0) (or (<= 36 main_~a~0.offset) (< 22 main_~length~0))), 6522#(and (or (<= main_~length~0 22) (<= main_~a~0.offset 40)) (= main_~arr~0.base main_~a~0.base) (or (<= 40 main_~a~0.offset) (< 22 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 6523#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 44 main_~a~0.offset) (< 22 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 22) (<= main_~a~0.offset 44))), 6524#(and (or (<= main_~length~0 22) (<= main_~a~0.offset 48)) (or (<= 48 main_~a~0.offset) (< 22 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 6525#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 22) (<= main_~a~0.offset 52)) (or (<= 52 main_~a~0.offset) (< 22 main_~length~0)) (= main_~arr~0.offset 0)), 6526#(and (or (<= main_~length~0 22) (<= main_~a~0.offset 56)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 56 main_~a~0.offset) (< 22 main_~length~0)) (= main_~arr~0.offset 0)), 6527#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~a~0.offset 60) (<= main_~length~0 22)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 60 main_~a~0.offset) (< 22 main_~length~0)) (= main_~arr~0.offset 0))] [2018-04-11 12:48:20,954 INFO L134 CoverageAnalysis]: Checked inductivity of 1892 backedges. 0 proven. 1892 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:20,954 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-04-11 12:48:20,954 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-04-11 12:48:20,954 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=900, Unknown=0, NotChecked=0, Total=992 [2018-04-11 12:48:20,954 INFO L87 Difference]: Start difference. First operand 196 states and 196 transitions. Second operand 32 states. [2018-04-11 12:48:23,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:48:23,091 INFO L93 Difference]: Finished difference Result 205 states and 205 transitions. [2018-04-11 12:48:23,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-04-11 12:48:23,091 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 188 [2018-04-11 12:48:23,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:48:23,092 INFO L225 Difference]: With dead ends: 205 [2018-04-11 12:48:23,092 INFO L226 Difference]: Without dead ends: 205 [2018-04-11 12:48:23,093 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 563 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=273, Invalid=3267, Unknown=0, NotChecked=0, Total=3540 [2018-04-11 12:48:23,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-04-11 12:48:23,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 204. [2018-04-11 12:48:23,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-04-11 12:48:23,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 204 transitions. [2018-04-11 12:48:23,095 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 204 transitions. Word has length 188 [2018-04-11 12:48:23,095 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:48:23,095 INFO L459 AbstractCegarLoop]: Abstraction has 204 states and 204 transitions. [2018-04-11 12:48:23,095 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-04-11 12:48:23,095 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 204 transitions. [2018-04-11 12:48:23,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2018-04-11 12:48:23,096 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:48:23,096 INFO L355 BasicCegarLoop]: trace histogram [24, 23, 23, 23, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:48:23,096 INFO L408 AbstractCegarLoop]: === Iteration 29 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:48:23,096 INFO L82 PathProgramCache]: Analyzing trace with hash -2011876210, now seen corresponding path program 23 times [2018-04-11 12:48:23,096 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:48:23,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:48:23,118 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:48:24,621 INFO L134 CoverageAnalysis]: Checked inductivity of 2070 backedges. 0 proven. 2070 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:24,621 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:48:24,621 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31] total 31 [2018-04-11 12:48:24,621 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:48:24,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:24,622 INFO L182 omatonBuilderFactory]: Interpolants [7005#true, 7006#false, 7007#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 7008#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 7009#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 7010#(and (or (<= 4 main_~a~0.offset) (< 23 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 4) (<= main_~length~0 23))), 7011#(and (or (<= main_~a~0.offset 8) (<= main_~length~0 23)) (or (<= 8 main_~a~0.offset) (< 23 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 7012#(and (or (<= main_~a~0.offset 12) (<= main_~length~0 23)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 12 main_~a~0.offset) (< 23 main_~length~0)) (= main_~arr~0.offset 0)), 7013#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~a~0.offset 16) (<= main_~length~0 23)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 16 main_~a~0.offset) (< 23 main_~length~0))), 7014#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 20 main_~a~0.offset) (< 23 main_~length~0)) (or (<= main_~a~0.offset 20) (<= main_~length~0 23))), 7015#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 23) (<= main_~a~0.offset 24)) (or (< 23 main_~length~0) (<= 24 main_~a~0.offset)) (= main_~arr~0.offset 0)), 7016#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 28) (<= main_~length~0 23)) (or (< 23 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.offset 0)), 7017#(and (or (<= main_~length~0 23) (<= main_~a~0.offset 32)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 32 main_~a~0.offset) (< 23 main_~length~0)) (= main_~arr~0.offset 0)), 7018#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 23) (<= main_~a~0.offset 36)) (= main_~arr~0.offset 0) (or (<= 36 main_~a~0.offset) (< 23 main_~length~0))), 7019#(and (or (<= main_~length~0 23) (<= main_~a~0.offset 40)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 40 main_~a~0.offset) (< 23 main_~length~0)) (= main_~arr~0.offset 0)), 7020#(and (or (<= main_~a~0.offset 44) (<= main_~length~0 23)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 44 main_~a~0.offset) (< 23 main_~length~0)) (= main_~arr~0.offset 0)), 7021#(and (or (<= 48 main_~a~0.offset) (< 23 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 48) (<= main_~length~0 23)) (= main_~arr~0.offset 0)), 7022#(and (or (<= main_~length~0 23) (<= main_~a~0.offset 52)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 52 main_~a~0.offset) (< 23 main_~length~0))), 7023#(and (or (< 23 main_~length~0) (<= 56 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 23) (<= main_~a~0.offset 56)) (= main_~arr~0.offset 0)), 7024#(and (or (<= main_~a~0.offset 60) (<= main_~length~0 23)) (or (<= 60 main_~a~0.offset) (< 23 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 7025#(and (or (<= main_~length~0 23) (<= main_~a~0.offset 64)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 64 main_~a~0.offset) (< 23 main_~length~0)) (= main_~arr~0.offset 0)), 7026#(and (or (<= main_~a~0.offset 68) (<= main_~length~0 23)) (or (<= 68 main_~a~0.offset) (< 23 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 7027#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 72 main_~a~0.offset) (< 23 main_~length~0)) (or (<= main_~a~0.offset 72) (<= main_~length~0 23)) (= main_~arr~0.offset 0)), 7028#(and (or (<= main_~length~0 23) (<= main_~a~0.offset 76)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 76 main_~a~0.offset) (< 23 main_~length~0)) (= main_~arr~0.offset 0)), 7029#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 23 main_~length~0) (<= 80 main_~a~0.offset)) (or (<= main_~a~0.offset 80) (<= main_~length~0 23)) (= main_~arr~0.offset 0)), 7030#(and (or (< 23 main_~length~0) (<= 84 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 84) (<= main_~length~0 23)) (= main_~arr~0.offset 0)), 7031#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 88) (< 23 main_~length~0))) (= main_~arr~0.offset 0)), 7032#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 88) (<= 0 main_~a~0.offset) (< 23 main_~length~0))) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 7033#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 88) (<= 0 main_~a~0.offset) (< 23 main_~length~0))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 7034#(and (<= main_~a~0.offset 88) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (< 23 main_~length~0) (= main_~arr~0.offset 0)), 7035#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 7036#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:48:24,622 INFO L134 CoverageAnalysis]: Checked inductivity of 2070 backedges. 0 proven. 2070 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:24,623 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-04-11 12:48:24,623 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-04-11 12:48:24,623 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=898, Unknown=0, NotChecked=0, Total=992 [2018-04-11 12:48:24,623 INFO L87 Difference]: Start difference. First operand 204 states and 204 transitions. Second operand 32 states. [2018-04-11 12:48:26,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:48:26,832 INFO L93 Difference]: Finished difference Result 213 states and 213 transitions. [2018-04-11 12:48:26,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-04-11 12:48:26,832 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 196 [2018-04-11 12:48:26,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:48:26,833 INFO L225 Difference]: With dead ends: 213 [2018-04-11 12:48:26,833 INFO L226 Difference]: Without dead ends: 213 [2018-04-11 12:48:26,834 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 473 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=273, Invalid=3267, Unknown=0, NotChecked=0, Total=3540 [2018-04-11 12:48:26,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-04-11 12:48:26,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 212. [2018-04-11 12:48:26,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 212 states. [2018-04-11 12:48:26,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 212 transitions. [2018-04-11 12:48:26,836 INFO L78 Accepts]: Start accepts. Automaton has 212 states and 212 transitions. Word has length 196 [2018-04-11 12:48:26,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:48:26,837 INFO L459 AbstractCegarLoop]: Abstraction has 212 states and 212 transitions. [2018-04-11 12:48:26,837 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-04-11 12:48:26,837 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 212 transitions. [2018-04-11 12:48:26,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2018-04-11 12:48:26,837 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:48:26,837 INFO L355 BasicCegarLoop]: trace histogram [25, 24, 24, 24, 24, 24, 24, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:48:26,838 INFO L408 AbstractCegarLoop]: === Iteration 30 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:48:26,838 INFO L82 PathProgramCache]: Analyzing trace with hash -666507075, now seen corresponding path program 24 times [2018-04-11 12:48:26,838 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:48:26,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:48:26,865 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:48:28,509 INFO L134 CoverageAnalysis]: Checked inductivity of 2256 backedges. 0 proven. 2256 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:28,509 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:48:28,510 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33] total 33 [2018-04-11 12:48:28,510 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:48:28,510 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:28,510 INFO L182 omatonBuilderFactory]: Interpolants [7518#true, 7519#false, 7520#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 7521#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 7522#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 7523#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 4) (<= main_~length~0 24)) (or (< 24 main_~length~0) (<= 4 main_~a~0.offset)) (= main_~arr~0.offset 0)), 7524#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 24 main_~length~0) (<= 8 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 8) (<= main_~length~0 24))), 7525#(and (or (<= main_~a~0.offset 12) (<= main_~length~0 24)) (or (< 24 main_~length~0) (<= 12 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 7526#(and (or (< 24 main_~length~0) (<= 16 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 16) (<= main_~length~0 24)) (= main_~arr~0.offset 0)), 7527#(and (or (< 24 main_~length~0) (<= 20 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 20) (<= main_~length~0 24))), 7528#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 24 main_~length~0) (<= 24 main_~a~0.offset)) (or (<= main_~length~0 24) (<= main_~a~0.offset 24))), 7529#(and (or (<= main_~a~0.offset 28) (<= main_~length~0 24)) (or (< 24 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 7530#(and (or (<= main_~length~0 24) (<= main_~a~0.offset 32)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 24 main_~length~0) (<= 32 main_~a~0.offset))), 7531#(and (or (<= main_~length~0 24) (<= main_~a~0.offset 36)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 24 main_~length~0) (<= 36 main_~a~0.offset))), 7532#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 24) (<= main_~a~0.offset 40)) (or (< 24 main_~length~0) (<= 40 main_~a~0.offset)) (= main_~arr~0.offset 0)), 7533#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 44) (<= main_~length~0 24)) (or (< 24 main_~length~0) (<= 44 main_~a~0.offset))), 7534#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 48) (<= main_~length~0 24)) (= main_~arr~0.offset 0) (or (< 24 main_~length~0) (<= 48 main_~a~0.offset))), 7535#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 24) (<= main_~a~0.offset 52)) (or (< 24 main_~length~0) (<= 52 main_~a~0.offset))), 7536#(and (or (<= main_~length~0 24) (<= main_~a~0.offset 56)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 24 main_~length~0) (<= 56 main_~a~0.offset)) (= main_~arr~0.offset 0)), 7537#(and (or (<= main_~a~0.offset 60) (<= main_~length~0 24)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 24 main_~length~0) (<= 60 main_~a~0.offset)) (= main_~arr~0.offset 0)), 7538#(and (or (< 24 main_~length~0) (<= 64 main_~a~0.offset)) (or (<= main_~length~0 24) (<= main_~a~0.offset 64)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 7539#(and (or (< 24 main_~length~0) (<= 64 main_~a~0.offset)) (or (<= main_~length~0 24) (<= main_~a~0.offset 64)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 7540#(and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 24 main_~length~0) (<= 68 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 68) (<= main_~length~0 24))), 7541#(and (or (<= main_~a~0.offset 72) (<= main_~length~0 24)) (<= 8 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 24 main_~length~0) (<= 72 main_~a~0.offset))), 7542#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 24 main_~length~0) (<= 76 main_~a~0.offset)) (<= 12 main_~a~0.offset) (= main_~arr~0.offset 0) (or (<= main_~length~0 24) (<= main_~a~0.offset 76))), 7543#(and (or (<= main_~a~0.offset 80) (<= main_~length~0 24)) (or (< 24 main_~length~0) (<= 80 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 16 main_~a~0.offset) (= main_~arr~0.offset 0)), 7544#(and (or (< 24 main_~length~0) (<= 84 main_~a~0.offset)) (or (<= main_~a~0.offset 84) (<= main_~length~0 24)) (<= 20 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 7545#(and (or (<= main_~a~0.offset 88) (<= main_~length~0 24)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 24 main_~a~0.offset) (= main_~arr~0.offset 0) (or (< 24 main_~length~0) (<= 88 main_~a~0.offset))), 7546#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (< 24 main_~length~0) (<= main_~a~0.offset 92)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0) (<= 28 main_~a~0.offset)), 7547#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (< 24 main_~length~0) (<= main_~a~0.offset 92)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0))) (<= 28 main_~a~0.offset)), 7548#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (< 24 main_~length~0) (<= main_~a~0.offset 92)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0))) (<= 28 main_~a~0.offset)), 7549#(and (< 24 main_~length~0) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= main_~a~0.offset 92) (= main_~arr~0.offset 0) (<= 28 main_~a~0.offset)), 7550#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 28 main_~a~0.offset)), 7551#(and (<= 32 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:48:28,511 INFO L134 CoverageAnalysis]: Checked inductivity of 2256 backedges. 0 proven. 2256 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:28,511 INFO L442 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-04-11 12:48:28,511 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-04-11 12:48:28,512 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=1021, Unknown=0, NotChecked=0, Total=1122 [2018-04-11 12:48:28,512 INFO L87 Difference]: Start difference. First operand 212 states and 212 transitions. Second operand 34 states. [2018-04-11 12:48:30,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:48:30,938 INFO L93 Difference]: Finished difference Result 221 states and 221 transitions. [2018-04-11 12:48:30,938 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-04-11 12:48:30,938 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 204 [2018-04-11 12:48:30,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:48:30,939 INFO L225 Difference]: With dead ends: 221 [2018-04-11 12:48:30,939 INFO L226 Difference]: Without dead ends: 221 [2018-04-11 12:48:30,940 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 575 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=294, Invalid=3738, Unknown=0, NotChecked=0, Total=4032 [2018-04-11 12:48:30,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-04-11 12:48:30,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 220. [2018-04-11 12:48:30,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2018-04-11 12:48:30,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 220 transitions. [2018-04-11 12:48:30,943 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 220 transitions. Word has length 204 [2018-04-11 12:48:30,944 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:48:30,944 INFO L459 AbstractCegarLoop]: Abstraction has 220 states and 220 transitions. [2018-04-11 12:48:30,944 INFO L460 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-04-11 12:48:30,944 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 220 transitions. [2018-04-11 12:48:30,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2018-04-11 12:48:30,945 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:48:30,945 INFO L355 BasicCegarLoop]: trace histogram [26, 25, 25, 25, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:48:30,945 INFO L408 AbstractCegarLoop]: === Iteration 31 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:48:30,945 INFO L82 PathProgramCache]: Analyzing trace with hash 1326644716, now seen corresponding path program 25 times [2018-04-11 12:48:30,946 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:48:30,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:48:30,996 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:48:32,517 INFO L134 CoverageAnalysis]: Checked inductivity of 2450 backedges. 0 proven. 2450 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:32,517 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:48:32,517 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33] total 33 [2018-04-11 12:48:32,517 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:48:32,518 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:32,518 INFO L182 omatonBuilderFactory]: Interpolants [8064#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 25 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~length~0 25) (<= main_~a~0.offset 28))), 8065#(and (or (<= main_~length~0 25) (<= main_~a~0.offset 32)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 32 main_~a~0.offset) (< 25 main_~length~0))), 8066#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 36 main_~a~0.offset) (< 25 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 25) (<= main_~a~0.offset 36))), 8067#(and (or (<= 40 main_~a~0.offset) (< 25 main_~length~0)) (or (<= main_~length~0 25) (<= main_~a~0.offset 40)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 8068#(and (or (<= main_~length~0 25) (<= main_~a~0.offset 44)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 44 main_~a~0.offset) (< 25 main_~length~0))), 8069#(and (or (< 25 main_~length~0) (<= 48 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 25) (<= main_~a~0.offset 48))), 8070#(and (or (<= 52 main_~a~0.offset) (< 25 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 25) (<= main_~a~0.offset 52)) (= main_~arr~0.offset 0)), 8071#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 25) (<= main_~a~0.offset 56)) (or (< 25 main_~length~0) (<= 56 main_~a~0.offset)) (= main_~arr~0.offset 0)), 8072#(and (or (<= 60 main_~a~0.offset) (< 25 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 60) (<= main_~length~0 25)) (= main_~arr~0.offset 0)), 8073#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 25) (<= main_~a~0.offset 64)) (or (<= 64 main_~a~0.offset) (< 25 main_~length~0)) (= main_~arr~0.offset 0)), 8074#(and (or (<= main_~length~0 25) (<= main_~a~0.offset 68)) (or (<= 68 main_~a~0.offset) (< 25 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 8075#(and (or (<= main_~length~0 25) (<= main_~a~0.offset 72)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 72 main_~a~0.offset) (< 25 main_~length~0)) (= main_~arr~0.offset 0)), 8076#(and (= main_~arr~0.base main_~a~0.base) (or (<= 76 main_~a~0.offset) (< 25 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 25) (<= main_~a~0.offset 76)) (= main_~arr~0.offset 0)), 8077#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 25) (<= main_~a~0.offset 80)) (or (< 25 main_~length~0) (<= 80 main_~a~0.offset)) (= main_~arr~0.offset 0)), 8078#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 25) (<= main_~a~0.offset 84)) (= main_~arr~0.offset 0) (or (< 25 main_~length~0) (<= 84 main_~a~0.offset))), 8079#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 88 main_~a~0.offset) (< 25 main_~length~0)) (or (<= main_~length~0 25) (<= main_~a~0.offset 88)) (= main_~arr~0.offset 0)), 8080#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 25) (<= main_~a~0.offset 92)) (= main_~arr~0.offset 0) (or (< 25 main_~length~0) (<= 92 main_~a~0.offset))), 8081#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (< 25 main_~length~0) (<= main_~a~0.offset 96))) (= main_~arr~0.offset 0)), 8082#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (< 25 main_~length~0) (<= 0 main_~a~0.offset) (<= main_~a~0.offset 96)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0)), 8083#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (< 25 main_~length~0) (<= 0 main_~a~0.offset) (<= main_~a~0.offset 96)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0)), 8084#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 25 main_~length~0) (<= 0 main_~a~0.offset) (<= main_~a~0.offset 96) (= main_~arr~0.offset 0)), 8085#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 8086#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base))), 8053#true, 8054#false, 8055#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 8056#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 8057#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 8058#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 4) (<= main_~length~0 25)) (or (<= 4 main_~a~0.offset) (< 25 main_~length~0)) (= main_~arr~0.offset 0)), 8059#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 25) (<= main_~a~0.offset 8)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 8 main_~a~0.offset) (< 25 main_~length~0)) (= main_~arr~0.offset 0)), 8060#(and (or (<= main_~length~0 25) (<= main_~a~0.offset 12)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 25 main_~length~0) (<= 12 main_~a~0.offset)) (= main_~arr~0.offset 0)), 8061#(and (or (<= 16 main_~a~0.offset) (< 25 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 25) (<= main_~a~0.offset 16)) (= main_~arr~0.offset 0)), 8062#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 25) (<= main_~a~0.offset 20)) (or (<= 20 main_~a~0.offset) (< 25 main_~length~0))), 8063#(and (or (<= main_~length~0 25) (<= main_~a~0.offset 24)) (or (< 25 main_~length~0) (<= 24 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0))] [2018-04-11 12:48:32,519 INFO L134 CoverageAnalysis]: Checked inductivity of 2450 backedges. 0 proven. 2450 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:32,519 INFO L442 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-04-11 12:48:32,519 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-04-11 12:48:32,519 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=100, Invalid=1022, Unknown=0, NotChecked=0, Total=1122 [2018-04-11 12:48:32,519 INFO L87 Difference]: Start difference. First operand 220 states and 220 transitions. Second operand 34 states. [2018-04-11 12:48:35,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:48:35,249 INFO L93 Difference]: Finished difference Result 229 states and 229 transitions. [2018-04-11 12:48:35,249 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-04-11 12:48:35,249 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 212 [2018-04-11 12:48:35,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:48:35,250 INFO L225 Difference]: With dead ends: 229 [2018-04-11 12:48:35,250 INFO L226 Difference]: Without dead ends: 229 [2018-04-11 12:48:35,252 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 538 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=291, Invalid=3741, Unknown=0, NotChecked=0, Total=4032 [2018-04-11 12:48:35,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229 states. [2018-04-11 12:48:35,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 228. [2018-04-11 12:48:35,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228 states. [2018-04-11 12:48:35,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 228 transitions. [2018-04-11 12:48:35,255 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 228 transitions. Word has length 212 [2018-04-11 12:48:35,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:48:35,256 INFO L459 AbstractCegarLoop]: Abstraction has 228 states and 228 transitions. [2018-04-11 12:48:35,256 INFO L460 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-04-11 12:48:35,256 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 228 transitions. [2018-04-11 12:48:35,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 221 [2018-04-11 12:48:35,257 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:48:35,257 INFO L355 BasicCegarLoop]: trace histogram [27, 26, 26, 26, 26, 26, 26, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:48:35,257 INFO L408 AbstractCegarLoop]: === Iteration 32 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:48:35,257 INFO L82 PathProgramCache]: Analyzing trace with hash 2123068443, now seen corresponding path program 26 times [2018-04-11 12:48:35,258 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:48:35,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:48:35,340 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:48:36,997 INFO L134 CoverageAnalysis]: Checked inductivity of 2652 backedges. 0 proven. 2652 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:36,997 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:48:36,997 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35] total 35 [2018-04-11 12:48:36,997 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:48:36,997 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:36,997 INFO L182 omatonBuilderFactory]: Interpolants [8604#true, 8605#false, 8606#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 8607#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 8608#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 8609#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 4) (<= main_~length~0 26)) (or (<= 4 main_~a~0.offset) (< 26 main_~length~0)) (= main_~arr~0.offset 0)), 8610#(and (or (<= 8 main_~a~0.offset) (< 26 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 8) (<= main_~length~0 26))), 8611#(and (or (<= 12 main_~a~0.offset) (< 26 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 26) (<= main_~a~0.offset 12))), 8612#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 16 main_~a~0.offset) (< 26 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 26) (<= main_~a~0.offset 16))), 8613#(and (or (<= 20 main_~a~0.offset) (< 26 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 20) (<= main_~length~0 26))), 8614#(and (or (< 26 main_~length~0) (<= 24 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 26) (<= main_~a~0.offset 24))), 8615#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 26 main_~length~0) (<= 28 main_~a~0.offset)) (or (<= main_~length~0 26) (<= main_~a~0.offset 28)) (= main_~arr~0.offset 0)), 8616#(and (or (<= 32 main_~a~0.offset) (< 26 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 26) (<= main_~a~0.offset 32)) (= main_~arr~0.offset 0)), 8617#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 26) (<= main_~a~0.offset 36)) (= main_~arr~0.offset 0) (or (<= 36 main_~a~0.offset) (< 26 main_~length~0))), 8618#(and (or (<= 40 main_~a~0.offset) (< 26 main_~length~0)) (or (<= main_~length~0 26) (<= main_~a~0.offset 40)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 8619#(and (or (<= main_~length~0 26) (<= main_~a~0.offset 44)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 44 main_~a~0.offset) (< 26 main_~length~0)) (= main_~arr~0.offset 0)), 8620#(and (or (<= 48 main_~a~0.offset) (< 26 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 26) (<= main_~a~0.offset 48)) (= main_~arr~0.offset 0)), 8621#(and (or (<= main_~length~0 26) (<= main_~a~0.offset 52)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 52 main_~a~0.offset) (< 26 main_~length~0)) (= main_~arr~0.offset 0)), 8622#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 26) (<= main_~a~0.offset 56)) (or (<= 56 main_~a~0.offset) (< 26 main_~length~0)) (= main_~arr~0.offset 0)), 8623#(and (or (<= 60 main_~a~0.offset) (< 26 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 60) (<= main_~length~0 26))), 8624#(and (or (<= 64 main_~a~0.offset) (< 26 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 26) (<= main_~a~0.offset 64)) (= main_~arr~0.offset 0)), 8625#(and (or (<= main_~a~0.offset 68) (<= main_~length~0 26)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 68 main_~a~0.offset) (< 26 main_~length~0))), 8626#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 72) (<= main_~length~0 26)) (= main_~arr~0.offset 0) (or (<= 72 main_~a~0.offset) (< 26 main_~length~0))), 8627#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 76 main_~a~0.offset) (< 26 main_~length~0)) (or (<= main_~length~0 26) (<= main_~a~0.offset 76)) (= main_~arr~0.offset 0)), 8628#(and (or (< 26 main_~length~0) (<= 80 main_~a~0.offset)) (or (<= main_~length~0 26) (<= main_~a~0.offset 80)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 8629#(and (or (< 26 main_~length~0) (<= 84 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 26) (<= main_~a~0.offset 84)) (= main_~arr~0.offset 0)), 8630#(and (or (<= 88 main_~a~0.offset) (< 26 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 88) (<= main_~length~0 26)) (= main_~arr~0.offset 0)), 8631#(and (or (< 26 main_~length~0) (<= 92 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 26) (<= main_~a~0.offset 92))), 8632#(and (or (<= main_~length~0 26) (<= main_~a~0.offset 96)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 96 main_~a~0.offset) (< 26 main_~length~0))), 8633#(and (or (<= main_~length~0 26) (<= main_~a~0.offset 96)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (or (<= 96 main_~a~0.offset) (< 26 main_~length~0))), 8634#(and (or (and (<= main_~a~0.offset 100) (< 26 main_~length~0)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 8635#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (or (and (<= main_~a~0.offset 100) (< 26 main_~length~0)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))), 8636#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (or (and (<= main_~a~0.offset 100) (< 26 main_~length~0)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))), 8637#(and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (<= main_~a~0.offset 100) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 26 main_~length~0) (= main_~arr~0.offset 0)), 8638#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 4 main_~a~0.offset)), 8639#(and (<= 8 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:48:36,998 INFO L134 CoverageAnalysis]: Checked inductivity of 2652 backedges. 0 proven. 2652 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:36,998 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-11 12:48:36,998 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-11 12:48:36,999 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=1153, Unknown=0, NotChecked=0, Total=1260 [2018-04-11 12:48:36,999 INFO L87 Difference]: Start difference. First operand 228 states and 228 transitions. Second operand 36 states. [2018-04-11 12:48:39,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:48:39,657 INFO L93 Difference]: Finished difference Result 237 states and 237 transitions. [2018-04-11 12:48:39,657 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-11 12:48:39,657 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 220 [2018-04-11 12:48:39,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:48:39,658 INFO L225 Difference]: With dead ends: 237 [2018-04-11 12:48:39,658 INFO L226 Difference]: Without dead ends: 237 [2018-04-11 12:48:39,659 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 640 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=312, Invalid=4244, Unknown=0, NotChecked=0, Total=4556 [2018-04-11 12:48:39,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237 states. [2018-04-11 12:48:39,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237 to 236. [2018-04-11 12:48:39,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236 states. [2018-04-11 12:48:39,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236 states to 236 states and 236 transitions. [2018-04-11 12:48:39,662 INFO L78 Accepts]: Start accepts. Automaton has 236 states and 236 transitions. Word has length 220 [2018-04-11 12:48:39,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:48:39,663 INFO L459 AbstractCegarLoop]: Abstraction has 236 states and 236 transitions. [2018-04-11 12:48:39,663 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-11 12:48:39,663 INFO L276 IsEmpty]: Start isEmpty. Operand 236 states and 236 transitions. [2018-04-11 12:48:39,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2018-04-11 12:48:39,664 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:48:39,664 INFO L355 BasicCegarLoop]: trace histogram [28, 27, 27, 27, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:48:39,664 INFO L408 AbstractCegarLoop]: === Iteration 33 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:48:39,664 INFO L82 PathProgramCache]: Analyzing trace with hash 2042514250, now seen corresponding path program 27 times [2018-04-11 12:48:39,665 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:48:39,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:48:39,712 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:48:41,385 INFO L134 CoverageAnalysis]: Checked inductivity of 2862 backedges. 0 proven. 2862 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:41,386 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:48:41,386 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35] total 35 [2018-04-11 12:48:41,386 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:48:41,386 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:41,387 INFO L182 omatonBuilderFactory]: Interpolants [9177#true, 9178#false, 9179#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 9180#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 9181#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 9182#(and (or (<= 4 main_~a~0.offset) (< 27 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 4) (<= main_~length~0 27)) (= main_~arr~0.offset 0)), 9183#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~a~0.offset 8) (<= main_~length~0 27)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 8 main_~a~0.offset) (< 27 main_~length~0)) (= main_~arr~0.offset 0)), 9184#(and (or (<= 12 main_~a~0.offset) (< 27 main_~length~0)) (or (<= main_~a~0.offset 12) (<= main_~length~0 27)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 9185#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 16 main_~a~0.offset) (< 27 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 16) (<= main_~length~0 27))), 9186#(and (or (<= main_~a~0.offset 20) (<= main_~length~0 27)) (= main_~arr~0.base main_~a~0.base) (or (<= 20 main_~a~0.offset) (< 27 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 9187#(and (or (<= main_~a~0.offset 24) (<= main_~length~0 27)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 27 main_~length~0) (<= 24 main_~a~0.offset)) (= main_~arr~0.offset 0)), 9188#(and (or (< 27 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 28) (<= main_~length~0 27))), 9189#(and (or (<= main_~length~0 27) (<= main_~a~0.offset 32)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 32 main_~a~0.offset) (< 27 main_~length~0))), 9190#(and (or (<= main_~a~0.offset 36) (<= main_~length~0 27)) (or (<= 36 main_~a~0.offset) (< 27 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 9191#(and (= main_~arr~0.base main_~a~0.base) (or (<= 40 main_~a~0.offset) (< 27 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 40) (<= main_~length~0 27)) (= main_~arr~0.offset 0)), 9192#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 44 main_~a~0.offset) (< 27 main_~length~0)) (or (<= main_~a~0.offset 44) (<= main_~length~0 27)) (= main_~arr~0.offset 0)), 9193#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 48 main_~a~0.offset) (< 27 main_~length~0)) (or (<= main_~a~0.offset 48) (<= main_~length~0 27))), 9194#(and (or (<= 52 main_~a~0.offset) (< 27 main_~length~0)) (or (<= main_~a~0.offset 52) (<= main_~length~0 27)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 9195#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~a~0.offset 56) (<= main_~length~0 27)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 56 main_~a~0.offset) (< 27 main_~length~0))), 9196#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 60 main_~a~0.offset) (< 27 main_~length~0)) (or (<= main_~a~0.offset 60) (<= main_~length~0 27))), 9197#(and (or (<= main_~length~0 27) (<= main_~a~0.offset 64)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 64 main_~a~0.offset) (< 27 main_~length~0))), 9198#(and (or (<= 68 main_~a~0.offset) (< 27 main_~length~0)) (or (<= main_~a~0.offset 68) (<= main_~length~0 27)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 9199#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 72) (<= main_~length~0 27)) (or (<= 72 main_~a~0.offset) (< 27 main_~length~0)) (= main_~arr~0.offset 0)), 9200#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 76 main_~a~0.offset) (< 27 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 76) (<= main_~length~0 27))), 9201#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 27 main_~length~0) (<= 80 main_~a~0.offset)) (or (<= main_~a~0.offset 80) (<= main_~length~0 27)) (= main_~arr~0.offset 0)), 9202#(and (or (<= main_~a~0.offset 84) (<= main_~length~0 27)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 27 main_~length~0) (<= 84 main_~a~0.offset))), 9203#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 88) (<= main_~length~0 27)) (= main_~arr~0.offset 0) (or (<= 88 main_~a~0.offset) (< 27 main_~length~0))), 9204#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 27 main_~length~0) (<= 92 main_~a~0.offset)) (or (<= main_~a~0.offset 92) (<= main_~length~0 27)) (= main_~arr~0.offset 0)), 9205#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 96) (<= main_~length~0 27)) (or (<= 96 main_~a~0.offset) (< 27 main_~length~0))), 9206#(and (= main_~arr~0.base main_~a~0.base) (or (< 27 main_~length~0) (<= 100 main_~a~0.offset)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 100) (<= main_~length~0 27))), 9207#(and (= main_~a~0.base main_~arr~0.base) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (<= main_~a~0.offset 104) (< 27 main_~length~0)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0)))), 9208#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 104) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (< 27 main_~length~0) (= main_~arr~0.offset 0))) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 9209#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 104) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (< 27 main_~length~0) (= main_~arr~0.offset 0)))), 9210#(and (<= main_~a~0.offset 104) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (< 27 main_~length~0) (= main_~arr~0.offset 0)), 9211#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 9212#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:48:41,388 INFO L134 CoverageAnalysis]: Checked inductivity of 2862 backedges. 0 proven. 2862 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:41,388 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-11 12:48:41,389 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-11 12:48:41,389 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=1157, Unknown=0, NotChecked=0, Total=1260 [2018-04-11 12:48:41,389 INFO L87 Difference]: Start difference. First operand 236 states and 236 transitions. Second operand 36 states. [2018-04-11 12:48:44,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:48:44,259 INFO L93 Difference]: Finished difference Result 245 states and 245 transitions. [2018-04-11 12:48:44,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-11 12:48:44,259 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 228 [2018-04-11 12:48:44,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:48:44,260 INFO L225 Difference]: With dead ends: 245 [2018-04-11 12:48:44,260 INFO L226 Difference]: Without dead ends: 245 [2018-04-11 12:48:44,261 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 683 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=306, Invalid=4250, Unknown=0, NotChecked=0, Total=4556 [2018-04-11 12:48:44,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 245 states. [2018-04-11 12:48:44,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 245 to 244. [2018-04-11 12:48:44,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 244 states. [2018-04-11 12:48:44,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 244 transitions. [2018-04-11 12:48:44,263 INFO L78 Accepts]: Start accepts. Automaton has 244 states and 244 transitions. Word has length 228 [2018-04-11 12:48:44,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:48:44,263 INFO L459 AbstractCegarLoop]: Abstraction has 244 states and 244 transitions. [2018-04-11 12:48:44,263 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-11 12:48:44,263 INFO L276 IsEmpty]: Start isEmpty. Operand 244 states and 244 transitions. [2018-04-11 12:48:44,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 237 [2018-04-11 12:48:44,264 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:48:44,264 INFO L355 BasicCegarLoop]: trace histogram [29, 28, 28, 28, 28, 28, 28, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:48:44,264 INFO L408 AbstractCegarLoop]: === Iteration 34 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:48:44,264 INFO L82 PathProgramCache]: Analyzing trace with hash -725974151, now seen corresponding path program 28 times [2018-04-11 12:48:44,264 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:48:44,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:48:44,325 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:48:46,101 INFO L134 CoverageAnalysis]: Checked inductivity of 3080 backedges. 0 proven. 3080 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:46,102 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:48:46,102 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37] total 37 [2018-04-11 12:48:46,102 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:48:46,102 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:46,102 INFO L182 omatonBuilderFactory]: Interpolants [9792#(and (or (< 28 main_~length~0) (<= 88 main_~a~0.offset)) (or (<= main_~a~0.offset 88) (<= main_~length~0 28)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 9793#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 92) (<= main_~length~0 28)) (or (< 28 main_~length~0) (<= 92 main_~a~0.offset))), 9794#(and (or (< 28 main_~length~0) (<= 96 main_~a~0.offset)) (or (<= main_~length~0 28) (<= main_~a~0.offset 96)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 9795#(and (or (< 28 main_~length~0) (<= 96 main_~a~0.offset)) (or (<= main_~length~0 28) (<= main_~a~0.offset 96)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 9796#(and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 100) (<= main_~length~0 28)) (= main_~arr~0.offset 0) (or (< 28 main_~length~0) (<= 100 main_~a~0.offset))), 9797#(and (<= 8 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 104) (<= main_~length~0 28)) (or (< 28 main_~length~0) (<= 104 main_~a~0.offset)) (= main_~arr~0.offset 0)), 9798#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (< 28 main_~length~0) (<= main_~a~0.offset 108)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (<= 12 main_~a~0.offset) (= main_~arr~0.offset 0)), 9799#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (= main_~arr~0.base main_~a~0.base) (or (and (< 28 main_~length~0) (<= main_~a~0.offset 108)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 12 main_~a~0.offset) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))), 9800#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (< 28 main_~length~0) (<= main_~a~0.offset 108)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (<= 12 main_~a~0.offset) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))), 9801#(and (< 28 main_~length~0) (<= main_~a~0.offset 108) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 12 main_~a~0.offset) (= main_~arr~0.offset 0)), 9802#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 12 main_~a~0.offset)), 9803#(and (<= 16 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base))), 9766#true, 9767#false, 9768#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 9769#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 9770#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 9771#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 4) (<= main_~length~0 28)) (= main_~arr~0.offset 0) (or (< 28 main_~length~0) (<= 4 main_~a~0.offset))), 9772#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 28 main_~length~0) (<= 8 main_~a~0.offset)) (or (<= main_~a~0.offset 8) (<= main_~length~0 28)) (= main_~arr~0.offset 0)), 9773#(and (or (< 28 main_~length~0) (<= 12 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 12) (<= main_~length~0 28)) (= main_~arr~0.offset 0)), 9774#(and (or (< 28 main_~length~0) (<= 16 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 16) (<= main_~length~0 28))), 9775#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 20) (<= main_~length~0 28)) (or (< 28 main_~length~0) (<= 20 main_~a~0.offset)) (= main_~arr~0.offset 0)), 9776#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 28) (<= main_~a~0.offset 24)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 28 main_~length~0) (<= 24 main_~a~0.offset))), 9777#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 28 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 28) (<= main_~length~0 28))), 9778#(and (= main_~arr~0.base main_~a~0.base) (or (< 28 main_~length~0) (<= 32 main_~a~0.offset)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 28) (<= main_~a~0.offset 32)) (= main_~arr~0.offset 0)), 9779#(and (or (<= main_~length~0 28) (<= main_~a~0.offset 36)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 36 main_~a~0.offset) (< 28 main_~length~0)) (= main_~arr~0.offset 0)), 9780#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 28) (<= main_~a~0.offset 40)) (or (< 28 main_~length~0) (<= 40 main_~a~0.offset)) (= main_~arr~0.offset 0)), 9781#(and (or (< 28 main_~length~0) (<= 44 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 44) (<= main_~length~0 28))), 9782#(and (or (<= main_~length~0 28) (<= main_~a~0.offset 48)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 28 main_~length~0) (<= 48 main_~a~0.offset)) (= main_~arr~0.offset 0)), 9783#(and (or (<= main_~length~0 28) (<= main_~a~0.offset 52)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 28 main_~length~0) (<= 52 main_~a~0.offset))), 9784#(and (or (< 28 main_~length~0) (<= 56 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 28) (<= main_~a~0.offset 56))), 9785#(and (or (<= main_~a~0.offset 60) (<= main_~length~0 28)) (or (< 28 main_~length~0) (<= 60 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 9786#(and (or (< 28 main_~length~0) (<= 64 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 28) (<= main_~a~0.offset 64)) (= main_~arr~0.offset 0)), 9787#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 28 main_~length~0) (<= 68 main_~a~0.offset)) (or (<= main_~a~0.offset 68) (<= main_~length~0 28)) (= main_~arr~0.offset 0)), 9788#(and (or (< 28 main_~length~0) (<= 72 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (or (<= main_~a~0.offset 72) (<= main_~length~0 28)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 9789#(and (or (<= main_~length~0 28) (<= main_~a~0.offset 76)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 28 main_~length~0) (<= 76 main_~a~0.offset))), 9790#(and (or (<= main_~a~0.offset 80) (<= main_~length~0 28)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 28 main_~length~0) (<= 80 main_~a~0.offset))), 9791#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 84) (<= main_~length~0 28)) (or (< 28 main_~length~0) (<= 84 main_~a~0.offset)))] [2018-04-11 12:48:46,103 INFO L134 CoverageAnalysis]: Checked inductivity of 3080 backedges. 0 proven. 3080 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:46,103 INFO L442 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-04-11 12:48:46,103 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-04-11 12:48:46,103 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=113, Invalid=1293, Unknown=0, NotChecked=0, Total=1406 [2018-04-11 12:48:46,103 INFO L87 Difference]: Start difference. First operand 244 states and 244 transitions. Second operand 38 states. [2018-04-11 12:48:49,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:48:49,200 INFO L93 Difference]: Finished difference Result 253 states and 253 transitions. [2018-04-11 12:48:49,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-04-11 12:48:49,200 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 236 [2018-04-11 12:48:49,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:48:49,201 INFO L225 Difference]: With dead ends: 253 [2018-04-11 12:48:49,201 INFO L226 Difference]: Without dead ends: 253 [2018-04-11 12:48:49,201 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 717 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=330, Invalid=4782, Unknown=0, NotChecked=0, Total=5112 [2018-04-11 12:48:49,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 253 states. [2018-04-11 12:48:49,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 253 to 252. [2018-04-11 12:48:49,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 252 states. [2018-04-11 12:48:49,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 252 states and 252 transitions. [2018-04-11 12:48:49,203 INFO L78 Accepts]: Start accepts. Automaton has 252 states and 252 transitions. Word has length 236 [2018-04-11 12:48:49,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:48:49,203 INFO L459 AbstractCegarLoop]: Abstraction has 252 states and 252 transitions. [2018-04-11 12:48:49,203 INFO L460 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-04-11 12:48:49,203 INFO L276 IsEmpty]: Start isEmpty. Operand 252 states and 252 transitions. [2018-04-11 12:48:49,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 245 [2018-04-11 12:48:49,204 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:48:49,204 INFO L355 BasicCegarLoop]: trace histogram [30, 29, 29, 29, 29, 29, 29, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:48:49,204 INFO L408 AbstractCegarLoop]: === Iteration 35 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:48:49,204 INFO L82 PathProgramCache]: Analyzing trace with hash -1534124888, now seen corresponding path program 29 times [2018-04-11 12:48:49,205 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:48:49,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:48:49,239 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:48:51,056 INFO L134 CoverageAnalysis]: Checked inductivity of 3306 backedges. 0 proven. 3306 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:51,056 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:48:51,056 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37] total 37 [2018-04-11 12:48:51,057 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:48:51,057 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:51,057 INFO L182 omatonBuilderFactory]: Interpolants [10377#true, 10378#false, 10379#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 10380#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 10381#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 10382#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 4) (<= main_~length~0 29)) (or (<= 4 main_~a~0.offset) (< 29 main_~length~0)) (= main_~arr~0.offset 0)), 10383#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 8 main_~a~0.offset) (< 29 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 8) (<= main_~length~0 29))), 10384#(and (or (< 29 main_~length~0) (<= 12 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 29) (<= main_~a~0.offset 12))), 10385#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 29) (<= main_~a~0.offset 16)) (or (< 29 main_~length~0) (<= 16 main_~a~0.offset)) (= main_~arr~0.offset 0)), 10386#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 20) (<= main_~length~0 29)) (= main_~arr~0.offset 0) (or (<= 20 main_~a~0.offset) (< 29 main_~length~0))), 10387#(and (or (<= main_~length~0 29) (<= main_~a~0.offset 24)) (or (< 29 main_~length~0) (<= 24 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 10388#(and (or (< 29 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 29) (<= main_~a~0.offset 28)) (= main_~arr~0.offset 0)), 10389#(and (or (<= main_~length~0 29) (<= main_~a~0.offset 32)) (or (<= 32 main_~a~0.offset) (< 29 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 10390#(and (or (<= main_~length~0 29) (<= main_~a~0.offset 36)) (or (<= 36 main_~a~0.offset) (< 29 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 10391#(and (or (<= main_~length~0 29) (<= main_~a~0.offset 40)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 29 main_~length~0) (<= 40 main_~a~0.offset))), 10392#(and (or (< 29 main_~length~0) (<= 44 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 29) (<= main_~a~0.offset 44)) (= main_~arr~0.offset 0)), 10393#(and (or (<= main_~length~0 29) (<= main_~a~0.offset 48)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 29 main_~length~0) (<= 48 main_~a~0.offset)) (= main_~arr~0.offset 0)), 10394#(and (or (<= main_~length~0 29) (<= main_~a~0.offset 52)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 29 main_~length~0) (<= 52 main_~a~0.offset)) (= main_~arr~0.offset 0)), 10395#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 29) (<= main_~a~0.offset 56)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 29 main_~length~0) (<= 56 main_~a~0.offset)) (= main_~arr~0.offset 0)), 10396#(and (or (<= main_~a~0.offset 60) (<= main_~length~0 29)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 60 main_~a~0.offset) (< 29 main_~length~0))), 10397#(and (or (<= 64 main_~a~0.offset) (< 29 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 29) (<= main_~a~0.offset 64)) (= main_~arr~0.offset 0)), 10398#(and (or (<= 68 main_~a~0.offset) (< 29 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 68) (<= main_~length~0 29)) (= main_~arr~0.offset 0)), 10399#(and (or (<= main_~a~0.offset 72) (<= main_~length~0 29)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 29 main_~length~0) (<= 72 main_~a~0.offset)) (= main_~arr~0.offset 0)), 10400#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 29 main_~length~0) (<= 76 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~length~0 29) (<= main_~a~0.offset 76))), 10401#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 29 main_~length~0) (<= 80 main_~a~0.offset)) (or (<= main_~length~0 29) (<= main_~a~0.offset 80))), 10402#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 29 main_~length~0) (<= 84 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~length~0 29) (<= main_~a~0.offset 84))), 10403#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 88 main_~a~0.offset) (< 29 main_~length~0)) (or (<= main_~a~0.offset 88) (<= main_~length~0 29)) (= main_~arr~0.offset 0)), 10404#(and (or (< 29 main_~length~0) (<= 92 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 29) (<= main_~a~0.offset 92)) (= main_~arr~0.offset 0)), 10405#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 29) (<= main_~a~0.offset 96)) (or (< 29 main_~length~0) (<= 96 main_~a~0.offset))), 10406#(and (or (<= main_~a~0.offset 100) (<= main_~length~0 29)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 29 main_~length~0) (<= 100 main_~a~0.offset)) (= main_~arr~0.offset 0)), 10407#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 104) (<= main_~length~0 29)) (= main_~arr~0.offset 0) (or (< 29 main_~length~0) (<= 104 main_~a~0.offset))), 10408#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 108) (<= main_~length~0 29)) (or (< 29 main_~length~0) (<= 108 main_~a~0.offset)) (= main_~arr~0.offset 0)), 10409#(and (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (< 29 main_~length~0) (<= main_~a~0.offset 112))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 10410#(and (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (< 29 main_~length~0) (<= main_~a~0.offset 112))) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))), 10411#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (< 29 main_~length~0) (<= main_~a~0.offset 112))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))), 10412#(and (< 29 main_~length~0) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (<= main_~a~0.offset 112)), 10413#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 10414#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:48:51,057 INFO L134 CoverageAnalysis]: Checked inductivity of 3306 backedges. 0 proven. 3306 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:51,057 INFO L442 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-04-11 12:48:51,058 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-04-11 12:48:51,058 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=112, Invalid=1294, Unknown=0, NotChecked=0, Total=1406 [2018-04-11 12:48:51,058 INFO L87 Difference]: Start difference. First operand 252 states and 252 transitions. Second operand 38 states. [2018-04-11 12:48:54,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:48:54,164 INFO L93 Difference]: Finished difference Result 261 states and 261 transitions. [2018-04-11 12:48:54,164 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-04-11 12:48:54,164 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 244 [2018-04-11 12:48:54,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:48:54,165 INFO L225 Difference]: With dead ends: 261 [2018-04-11 12:48:54,165 INFO L226 Difference]: Without dead ends: 261 [2018-04-11 12:48:54,165 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 680 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=327, Invalid=4785, Unknown=0, NotChecked=0, Total=5112 [2018-04-11 12:48:54,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 261 states. [2018-04-11 12:48:54,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 261 to 260. [2018-04-11 12:48:54,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 260 states. [2018-04-11 12:48:54,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 260 states to 260 states and 260 transitions. [2018-04-11 12:48:54,168 INFO L78 Accepts]: Start accepts. Automaton has 260 states and 260 transitions. Word has length 244 [2018-04-11 12:48:54,168 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:48:54,168 INFO L459 AbstractCegarLoop]: Abstraction has 260 states and 260 transitions. [2018-04-11 12:48:54,168 INFO L460 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-04-11 12:48:54,168 INFO L276 IsEmpty]: Start isEmpty. Operand 260 states and 260 transitions. [2018-04-11 12:48:54,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 253 [2018-04-11 12:48:54,168 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:48:54,169 INFO L355 BasicCegarLoop]: trace histogram [31, 30, 30, 30, 30, 30, 30, 30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:48:54,169 INFO L408 AbstractCegarLoop]: === Iteration 36 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:48:54,169 INFO L82 PathProgramCache]: Analyzing trace with hash 2135627479, now seen corresponding path program 30 times [2018-04-11 12:48:54,169 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:48:54,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:48:54,211 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:48:56,169 INFO L134 CoverageAnalysis]: Checked inductivity of 3540 backedges. 0 proven. 3540 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:56,169 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:48:56,169 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39] total 39 [2018-04-11 12:48:56,169 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:48:56,170 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:56,170 INFO L182 omatonBuilderFactory]: Interpolants [11008#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 11009#(and (or (< 30 main_~length~0) (<= 4 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 4) (<= main_~length~0 30))), 11010#(and (= main_~arr~0.base main_~a~0.base) (or (< 30 main_~length~0) (<= 8 main_~a~0.offset)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 8) (<= main_~length~0 30))), 11011#(and (or (< 30 main_~length~0) (<= 12 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 12) (<= main_~length~0 30))), 11012#(and (or (< 30 main_~length~0) (<= 16 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 16) (<= main_~length~0 30)) (= main_~arr~0.offset 0)), 11013#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 30 main_~length~0) (<= 20 main_~a~0.offset)) (or (<= main_~a~0.offset 20) (<= main_~length~0 30)) (= main_~arr~0.offset 0)), 11014#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 24) (<= main_~length~0 30)) (= main_~arr~0.offset 0) (or (< 30 main_~length~0) (<= 24 main_~a~0.offset))), 11015#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 28) (<= main_~length~0 30)) (or (< 30 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.offset 0)), 11016#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 30) (<= main_~a~0.offset 32)) (or (< 30 main_~length~0) (<= 32 main_~a~0.offset)) (= main_~arr~0.offset 0)), 11017#(and (or (<= 36 main_~a~0.offset) (< 30 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 30) (<= main_~a~0.offset 36)) (= main_~arr~0.offset 0)), 11018#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 40) (<= main_~length~0 30)) (= main_~arr~0.offset 0) (or (< 30 main_~length~0) (<= 40 main_~a~0.offset))), 11019#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 30 main_~length~0) (<= 44 main_~a~0.offset)) (or (<= main_~a~0.offset 44) (<= main_~length~0 30)) (= main_~arr~0.offset 0)), 11020#(and (or (<= main_~a~0.offset 48) (<= main_~length~0 30)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 30 main_~length~0) (<= 48 main_~a~0.offset)) (= main_~arr~0.offset 0)), 11021#(and (or (< 30 main_~length~0) (<= 52 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 30) (<= main_~a~0.offset 52)) (= main_~arr~0.offset 0)), 11022#(and (or (<= main_~a~0.offset 56) (<= main_~length~0 30)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 30 main_~length~0) (<= 56 main_~a~0.offset))), 11023#(and (or (<= main_~a~0.offset 60) (<= main_~length~0 30)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 30 main_~length~0) (<= 60 main_~a~0.offset)) (= main_~arr~0.offset 0)), 11024#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 64 main_~a~0.offset) (< 30 main_~length~0)) (or (<= main_~length~0 30) (<= main_~a~0.offset 64)) (= main_~arr~0.offset 0)), 11025#(and (= main_~arr~0.base main_~a~0.base) (or (< 30 main_~length~0) (<= 68 main_~a~0.offset)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 68) (<= main_~length~0 30))), 11026#(and (or (< 30 main_~length~0) (<= 72 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 72) (<= main_~length~0 30)) (= main_~arr~0.offset 0)), 11027#(and (or (<= main_~a~0.offset 76) (<= main_~length~0 30)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 30 main_~length~0) (<= 76 main_~a~0.offset)) (= main_~arr~0.offset 0)), 11028#(and (or (<= main_~a~0.offset 80) (<= main_~length~0 30)) (or (< 30 main_~length~0) (<= 80 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 11029#(and (or (<= main_~a~0.offset 84) (<= main_~length~0 30)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 30 main_~length~0) (<= 84 main_~a~0.offset)) (= main_~arr~0.offset 0)), 11030#(and (or (<= main_~a~0.offset 88) (<= main_~length~0 30)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 30 main_~length~0) (<= 88 main_~a~0.offset)) (= main_~arr~0.offset 0)), 11031#(and (or (<= main_~a~0.offset 92) (<= main_~length~0 30)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 30 main_~length~0) (<= 92 main_~a~0.offset))), 11032#(and (= main_~arr~0.base main_~a~0.base) (or (< 30 main_~length~0) (<= 96 main_~a~0.offset)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 96) (<= main_~length~0 30)) (= main_~arr~0.offset 0)), 11033#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 100) (<= main_~length~0 30)) (or (< 30 main_~length~0) (<= 100 main_~a~0.offset)) (= main_~arr~0.offset 0)), 11034#(and (or (<= main_~a~0.offset 104) (<= main_~length~0 30)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 30 main_~length~0) (<= 104 main_~a~0.offset))), 11035#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 108) (<= main_~length~0 30)) (or (< 30 main_~length~0) (<= 108 main_~a~0.offset)) (= main_~arr~0.offset 0)), 11036#(and (or (<= 112 main_~a~0.offset) (< 30 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 30) (<= main_~a~0.offset 112)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 11037#(and (or (<= 112 main_~a~0.offset) (< 30 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 30) (<= main_~a~0.offset 112)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 11038#(and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (and (< 30 main_~length~0) (<= main_~a~0.offset 116)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)))), 11039#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0))) (or (and (< 30 main_~length~0) (<= main_~a~0.offset 116)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)))), 11040#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0))) (or (and (< 30 main_~length~0) (<= main_~a~0.offset 116)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)))), 11041#(and (< 30 main_~length~0) (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (<= main_~a~0.offset 116)), 11042#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 4 main_~a~0.offset)), 11043#(and (<= 8 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base))), 11004#true, 11005#false, 11006#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 11007#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0))] [2018-04-11 12:48:56,170 INFO L134 CoverageAnalysis]: Checked inductivity of 3540 backedges. 0 proven. 3540 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:48:56,170 INFO L442 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-04-11 12:48:56,170 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-04-11 12:48:56,171 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=1441, Unknown=0, NotChecked=0, Total=1560 [2018-04-11 12:48:56,171 INFO L87 Difference]: Start difference. First operand 260 states and 260 transitions. Second operand 40 states. [2018-04-11 12:48:59,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:48:59,560 INFO L93 Difference]: Finished difference Result 269 states and 269 transitions. [2018-04-11 12:48:59,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-04-11 12:48:59,560 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 252 [2018-04-11 12:48:59,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:48:59,561 INFO L225 Difference]: With dead ends: 269 [2018-04-11 12:48:59,561 INFO L226 Difference]: Without dead ends: 269 [2018-04-11 12:48:59,561 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 794 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=348, Invalid=5352, Unknown=0, NotChecked=0, Total=5700 [2018-04-11 12:48:59,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 269 states. [2018-04-11 12:48:59,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 269 to 268. [2018-04-11 12:48:59,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 268 states. [2018-04-11 12:48:59,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 268 states and 268 transitions. [2018-04-11 12:48:59,563 INFO L78 Accepts]: Start accepts. Automaton has 268 states and 268 transitions. Word has length 252 [2018-04-11 12:48:59,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:48:59,563 INFO L459 AbstractCegarLoop]: Abstraction has 268 states and 268 transitions. [2018-04-11 12:48:59,563 INFO L460 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-04-11 12:48:59,563 INFO L276 IsEmpty]: Start isEmpty. Operand 268 states and 268 transitions. [2018-04-11 12:48:59,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 261 [2018-04-11 12:48:59,564 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:48:59,564 INFO L355 BasicCegarLoop]: trace histogram [32, 31, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:48:59,564 INFO L408 AbstractCegarLoop]: === Iteration 37 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:48:59,564 INFO L82 PathProgramCache]: Analyzing trace with hash 2080207366, now seen corresponding path program 31 times [2018-04-11 12:48:59,564 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:48:59,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:48:59,601 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:49:01,609 INFO L134 CoverageAnalysis]: Checked inductivity of 3782 backedges. 0 proven. 3782 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:01,610 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:49:01,610 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39] total 39 [2018-04-11 12:49:01,610 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:49:01,610 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:01,610 INFO L182 omatonBuilderFactory]: Interpolants [11653#true, 11654#false, 11655#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 11656#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 11657#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 11658#(and (or (<= main_~a~0.offset 4) (<= main_~length~0 31)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 4 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.offset 0)), 11659#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 8 main_~a~0.offset) (< 31 main_~length~0)) (or (<= main_~a~0.offset 8) (<= main_~length~0 31)) (= main_~arr~0.offset 0)), 11660#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 12 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 31) (<= main_~a~0.offset 12))), 11661#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 16 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 31) (<= main_~a~0.offset 16))), 11662#(and (or (<= 20 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 20) (<= main_~length~0 31)) (= main_~arr~0.offset 0)), 11663#(and (or (<= 24 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 31) (<= main_~a~0.offset 24)) (= main_~arr~0.offset 0)), 11664#(and (or (<= main_~length~0 31) (<= main_~a~0.offset 28)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 28 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.offset 0)), 11665#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 32 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 31) (<= main_~a~0.offset 32))), 11666#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 31) (<= main_~a~0.offset 36)) (or (<= 36 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.offset 0)), 11667#(and (or (<= main_~length~0 31) (<= main_~a~0.offset 40)) (or (<= 40 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 11668#(and (or (<= 44 main_~a~0.offset) (< 31 main_~length~0)) (or (<= main_~length~0 31) (<= main_~a~0.offset 44)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 11669#(and (or (<= main_~length~0 31) (<= main_~a~0.offset 48)) (or (<= 48 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 11670#(and (= main_~arr~0.base main_~a~0.base) (or (<= 52 main_~a~0.offset) (< 31 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 31) (<= main_~a~0.offset 52)) (= main_~arr~0.offset 0)), 11671#(and (or (<= main_~length~0 31) (<= main_~a~0.offset 56)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 56 main_~a~0.offset) (< 31 main_~length~0))), 11672#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 60 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 60) (<= main_~length~0 31))), 11673#(and (or (<= main_~length~0 31) (<= main_~a~0.offset 64)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 64 main_~a~0.offset) (< 31 main_~length~0))), 11674#(and (or (<= 68 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 68) (<= main_~length~0 31))), 11675#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 72) (<= main_~length~0 31)) (or (<= 72 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.offset 0)), 11676#(and (or (<= main_~length~0 31) (<= main_~a~0.offset 76)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 76 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.offset 0)), 11677#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 31) (<= main_~a~0.offset 80)) (= main_~arr~0.offset 0) (or (<= 80 main_~a~0.offset) (< 31 main_~length~0))), 11678#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 31) (<= main_~a~0.offset 84)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 84 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.offset 0)), 11679#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 88) (<= main_~length~0 31)) (or (<= 88 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.offset 0)), 11680#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 31) (<= main_~a~0.offset 92)) (= main_~arr~0.offset 0) (or (< 31 main_~length~0) (<= 92 main_~a~0.offset))), 11681#(and (or (<= 96 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 31) (<= main_~a~0.offset 96)) (= main_~arr~0.offset 0)), 11682#(and (or (<= main_~a~0.offset 100) (<= main_~length~0 31)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 100 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.offset 0)), 11683#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 104) (<= main_~length~0 31)) (or (<= 104 main_~a~0.offset) (< 31 main_~length~0))), 11684#(and (or (<= main_~a~0.offset 108) (<= main_~length~0 31)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 108 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.offset 0)), 11685#(and (or (<= 112 main_~a~0.offset) (< 31 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 31) (<= main_~a~0.offset 112)) (= main_~arr~0.offset 0)), 11686#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 31) (<= main_~a~0.offset 116)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 116 main_~a~0.offset) (< 31 main_~length~0))), 11687#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 120) (< 31 main_~length~0))) (= main_~arr~0.offset 0)), 11688#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 120) (< 31 main_~length~0))) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 11689#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 120) (< 31 main_~length~0))) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 11690#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (<= main_~a~0.offset 120) (= main_~arr~0.offset 0) (< 31 main_~length~0)), 11691#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 11692#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:49:01,611 INFO L134 CoverageAnalysis]: Checked inductivity of 3782 backedges. 0 proven. 3782 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:01,611 INFO L442 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-04-11 12:49:01,611 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-04-11 12:49:01,611 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=1442, Unknown=0, NotChecked=0, Total=1560 [2018-04-11 12:49:01,611 INFO L87 Difference]: Start difference. First operand 268 states and 268 transitions. Second operand 40 states. [2018-04-11 12:49:05,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:49:05,578 INFO L93 Difference]: Finished difference Result 277 states and 277 transitions. [2018-04-11 12:49:05,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-04-11 12:49:05,579 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 260 [2018-04-11 12:49:05,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:49:05,579 INFO L225 Difference]: With dead ends: 277 [2018-04-11 12:49:05,579 INFO L226 Difference]: Without dead ends: 277 [2018-04-11 12:49:05,580 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 757 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=345, Invalid=5355, Unknown=0, NotChecked=0, Total=5700 [2018-04-11 12:49:05,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277 states. [2018-04-11 12:49:05,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277 to 276. [2018-04-11 12:49:05,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 276 states. [2018-04-11 12:49:05,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 276 states to 276 states and 276 transitions. [2018-04-11 12:49:05,581 INFO L78 Accepts]: Start accepts. Automaton has 276 states and 276 transitions. Word has length 260 [2018-04-11 12:49:05,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:49:05,582 INFO L459 AbstractCegarLoop]: Abstraction has 276 states and 276 transitions. [2018-04-11 12:49:05,582 INFO L460 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-04-11 12:49:05,582 INFO L276 IsEmpty]: Start isEmpty. Operand 276 states and 276 transitions. [2018-04-11 12:49:05,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 269 [2018-04-11 12:49:05,582 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:49:05,583 INFO L355 BasicCegarLoop]: trace histogram [33, 32, 32, 32, 32, 32, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:49:05,583 INFO L408 AbstractCegarLoop]: === Iteration 38 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:49:05,583 INFO L82 PathProgramCache]: Analyzing trace with hash 850734645, now seen corresponding path program 32 times [2018-04-11 12:49:05,583 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:49:05,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:49:05,631 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:49:07,710 INFO L134 CoverageAnalysis]: Checked inductivity of 4032 backedges. 0 proven. 4032 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:07,710 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:49:07,710 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40] total 40 [2018-04-11 12:49:07,710 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:49:07,710 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:07,711 INFO L182 omatonBuilderFactory]: Interpolants [12352#(and (<= 120 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 32) (<= main_~a~0.offset 120)) (= main_~arr~0.offset 0)), 12353#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= 124 main_~a~0.offset) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 124) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0))) (= main_~a~0.base main_~arr~0.base)), 12354#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 124) (= main_~arr~0.base main_~a~0.base) (<= 124 main_~a~0.offset) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0))))) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 12355#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 124) (= main_~arr~0.base main_~a~0.base) (<= 124 main_~a~0.offset) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))))), 12356#(and (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (<= main_~a~0.offset 124) (= main_~arr~0.base main_~a~0.base) (<= 124 main_~a~0.offset) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))), 12357#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 124 main_~a~0.offset)), 12358#(and (<= 128 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base))), 12318#true, 12319#false, 12320#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 12321#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 12322#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 12323#(and (or (<= main_~a~0.offset 4) (<= main_~length~0 32)) (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 12324#(and (<= 8 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 8) (<= main_~length~0 32)) (= main_~arr~0.offset 0)), 12325#(and (or (<= main_~length~0 32) (<= main_~a~0.offset 12)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 12 main_~a~0.offset) (= main_~arr~0.offset 0)), 12326#(and (or (<= main_~length~0 32) (<= main_~a~0.offset 16)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 16 main_~a~0.offset) (= main_~arr~0.offset 0)), 12327#(and (<= 20 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 20) (<= main_~length~0 32))), 12328#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 32) (<= main_~a~0.offset 24)) (= main_~arr~0.offset 0) (<= 24 main_~a~0.offset)), 12329#(and (or (<= main_~length~0 32) (<= main_~a~0.offset 28)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (<= 28 main_~a~0.offset)), 12330#(and (<= 32 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 32) (<= main_~a~0.offset 32))), 12331#(and (<= 36 main_~a~0.offset) (or (<= main_~length~0 32) (<= main_~a~0.offset 36)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 12332#(and (<= 40 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 32) (<= main_~a~0.offset 40)) (= main_~arr~0.offset 0)), 12333#(and (or (<= main_~length~0 32) (<= main_~a~0.offset 44)) (= main_~arr~0.base main_~a~0.base) (<= 44 main_~a~0.offset) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 12334#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 48 main_~a~0.offset) (or (<= main_~length~0 32) (<= main_~a~0.offset 48)) (= main_~arr~0.offset 0)), 12335#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 52 main_~a~0.offset) (or (<= main_~length~0 32) (<= main_~a~0.offset 52)) (= main_~arr~0.offset 0)), 12336#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 56 main_~a~0.offset) (or (<= main_~length~0 32) (<= main_~a~0.offset 56)) (= main_~arr~0.offset 0)), 12337#(and (<= 60 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 60) (<= main_~length~0 32))), 12338#(and (<= 64 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 32) (<= main_~a~0.offset 64)) (= main_~arr~0.offset 0)), 12339#(and (or (<= main_~a~0.offset 68) (<= main_~length~0 32)) (<= 68 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 12340#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 72) (<= main_~length~0 32)) (<= 72 main_~a~0.offset) (= main_~arr~0.offset 0)), 12341#(and (<= 76 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 32) (<= main_~a~0.offset 76)) (= main_~arr~0.offset 0)), 12342#(and (or (<= main_~length~0 32) (<= main_~a~0.offset 80)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (<= 80 main_~a~0.offset)), 12343#(and (or (<= main_~length~0 32) (<= main_~a~0.offset 84)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (<= 84 main_~a~0.offset)), 12344#(and (<= 88 main_~a~0.offset) (or (<= main_~a~0.offset 88) (<= main_~length~0 32)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 12345#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 32) (<= main_~a~0.offset 92)) (<= 92 main_~a~0.offset)), 12346#(and (= main_~arr~0.base main_~a~0.base) (<= 96 main_~a~0.offset) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 32) (<= main_~a~0.offset 96)) (= main_~arr~0.offset 0)), 12347#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 100) (<= main_~length~0 32)) (<= 100 main_~a~0.offset) (= main_~arr~0.offset 0)), 12348#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 104) (<= main_~length~0 32)) (<= 104 main_~a~0.offset) (= main_~arr~0.offset 0)), 12349#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 108 main_~a~0.offset) (or (<= main_~a~0.offset 108) (<= main_~length~0 32)) (= main_~arr~0.offset 0)), 12350#(and (<= 112 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 32) (<= main_~a~0.offset 112))), 12351#(and (<= 116 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 32) (<= main_~a~0.offset 116)))] [2018-04-11 12:49:07,711 INFO L134 CoverageAnalysis]: Checked inductivity of 4032 backedges. 0 proven. 4032 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:07,711 INFO L442 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-04-11 12:49:07,711 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-04-11 12:49:07,711 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=1522, Unknown=0, NotChecked=0, Total=1640 [2018-04-11 12:49:07,711 INFO L87 Difference]: Start difference. First operand 276 states and 276 transitions. Second operand 41 states. [2018-04-11 12:49:11,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:49:11,359 INFO L93 Difference]: Finished difference Result 285 states and 285 transitions. [2018-04-11 12:49:11,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-04-11 12:49:11,359 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 268 [2018-04-11 12:49:11,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:49:11,360 INFO L225 Difference]: With dead ends: 285 [2018-04-11 12:49:11,360 INFO L226 Difference]: Without dead ends: 285 [2018-04-11 12:49:11,360 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 888 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=351, Invalid=5655, Unknown=0, NotChecked=0, Total=6006 [2018-04-11 12:49:11,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 285 states. [2018-04-11 12:49:11,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 285 to 284. [2018-04-11 12:49:11,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 284 states. [2018-04-11 12:49:11,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 284 states to 284 states and 284 transitions. [2018-04-11 12:49:11,362 INFO L78 Accepts]: Start accepts. Automaton has 284 states and 284 transitions. Word has length 268 [2018-04-11 12:49:11,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:49:11,363 INFO L459 AbstractCegarLoop]: Abstraction has 284 states and 284 transitions. [2018-04-11 12:49:11,363 INFO L460 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-04-11 12:49:11,363 INFO L276 IsEmpty]: Start isEmpty. Operand 284 states and 284 transitions. [2018-04-11 12:49:11,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 277 [2018-04-11 12:49:11,363 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:49:11,364 INFO L355 BasicCegarLoop]: trace histogram [34, 33, 33, 33, 33, 33, 33, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:49:11,364 INFO L408 AbstractCegarLoop]: === Iteration 39 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:49:11,364 INFO L82 PathProgramCache]: Analyzing trace with hash -1132377244, now seen corresponding path program 33 times [2018-04-11 12:49:11,364 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:49:11,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:49:11,410 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:49:13,594 INFO L134 CoverageAnalysis]: Checked inductivity of 4290 backedges. 0 proven. 4290 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:13,594 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:49:13,594 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41] total 41 [2018-04-11 12:49:13,595 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:49:13,595 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:13,595 INFO L182 omatonBuilderFactory]: Interpolants [13002#true, 13003#false, 13004#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 13005#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 13006#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 13007#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 4 main_~a~0.offset) (< 33 main_~length~0)) (or (<= main_~a~0.offset 4) (<= main_~length~0 33)) (= main_~arr~0.offset 0)), 13008#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 33) (<= main_~a~0.offset 8)) (= main_~arr~0.offset 0) (or (<= 8 main_~a~0.offset) (< 33 main_~length~0))), 13009#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 33) (<= main_~a~0.offset 12)) (or (< 33 main_~length~0) (<= 12 main_~a~0.offset)) (= main_~arr~0.offset 0)), 13010#(and (or (<= main_~length~0 33) (<= main_~a~0.offset 16)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 16 main_~a~0.offset) (< 33 main_~length~0))), 13011#(and (or (<= 20 main_~a~0.offset) (< 33 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 33) (<= main_~a~0.offset 20)) (= main_~arr~0.offset 0)), 13012#(and (or (< 33 main_~length~0) (<= 24 main_~a~0.offset)) (or (<= main_~length~0 33) (<= main_~a~0.offset 24)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 13013#(and (or (< 33 main_~length~0) (<= 28 main_~a~0.offset)) (or (<= main_~length~0 33) (<= main_~a~0.offset 28)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 13014#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 32 main_~a~0.offset) (< 33 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 33) (<= main_~a~0.offset 32))), 13015#(and (or (<= main_~length~0 33) (<= main_~a~0.offset 36)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 36 main_~a~0.offset) (< 33 main_~length~0))), 13016#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 40 main_~a~0.offset) (< 33 main_~length~0)) (or (<= main_~length~0 33) (<= main_~a~0.offset 40)) (= main_~arr~0.offset 0)), 13017#(and (or (<= main_~length~0 33) (<= main_~a~0.offset 44)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 44 main_~a~0.offset) (< 33 main_~length~0)) (= main_~arr~0.offset 0)), 13018#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 48 main_~a~0.offset) (< 33 main_~length~0)) (or (<= main_~length~0 33) (<= main_~a~0.offset 48)) (= main_~arr~0.offset 0)), 13019#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 52 main_~a~0.offset) (< 33 main_~length~0)) (or (<= main_~length~0 33) (<= main_~a~0.offset 52)) (= main_~arr~0.offset 0)), 13020#(and (or (< 33 main_~length~0) (<= 56 main_~a~0.offset)) (or (<= main_~length~0 33) (<= main_~a~0.offset 56)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 13021#(and (or (<= main_~length~0 33) (<= main_~a~0.offset 60)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 60 main_~a~0.offset) (< 33 main_~length~0))), 13022#(and (or (<= 64 main_~a~0.offset) (< 33 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 33) (<= main_~a~0.offset 64)) (= main_~arr~0.offset 0)), 13023#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 33) (<= main_~a~0.offset 68)) (or (<= 68 main_~a~0.offset) (< 33 main_~length~0)) (= main_~arr~0.offset 0)), 13024#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 33) (<= main_~a~0.offset 72)) (= main_~arr~0.offset 0) (or (<= 72 main_~a~0.offset) (< 33 main_~length~0))), 13025#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 76 main_~a~0.offset) (< 33 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 33) (<= main_~a~0.offset 76))), 13026#(and (or (<= main_~length~0 33) (<= main_~a~0.offset 80)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 33 main_~length~0) (<= 80 main_~a~0.offset))), 13027#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 33 main_~length~0) (<= 84 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~length~0 33) (<= main_~a~0.offset 84))), 13028#(and (or (<= main_~length~0 33) (<= main_~a~0.offset 88)) (or (<= 88 main_~a~0.offset) (< 33 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 13029#(and (or (<= main_~length~0 33) (<= main_~a~0.offset 92)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 33 main_~length~0) (<= 92 main_~a~0.offset))), 13030#(and (or (<= 96 main_~a~0.offset) (< 33 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 33) (<= main_~a~0.offset 96)) (= main_~arr~0.offset 0)), 13031#(and (or (< 33 main_~length~0) (<= 100 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 33) (<= main_~a~0.offset 100)) (= main_~arr~0.offset 0)), 13032#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 33) (<= main_~a~0.offset 104)) (or (< 33 main_~length~0) (<= 104 main_~a~0.offset)) (= main_~arr~0.offset 0)), 13033#(and (or (<= main_~length~0 33) (<= main_~a~0.offset 108)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 33 main_~length~0) (<= 108 main_~a~0.offset)) (= main_~arr~0.offset 0)), 13034#(and (or (<= 112 main_~a~0.offset) (< 33 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 33) (<= main_~a~0.offset 112)) (= main_~arr~0.offset 0)), 13035#(and (or (<= 116 main_~a~0.offset) (< 33 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 33) (<= main_~a~0.offset 116))), 13036#(and (or (<= main_~length~0 33) (<= main_~a~0.offset 120)) (= main_~arr~0.base main_~a~0.base) (or (<= 120 main_~a~0.offset) (< 33 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 13037#(and (or (<= 124 main_~a~0.offset) (< 33 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 33) (<= main_~a~0.offset 124)) (= main_~arr~0.offset 0)), 13038#(and (or (and (<= main_~a~0.offset 128) (< 33 main_~length~0)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 13039#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= 0 main_~a~0.offset) (<= main_~a~0.offset 128) (< 33 main_~length~0))) (= main_~arr~0.offset 0)), 13040#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= 0 main_~a~0.offset) (<= main_~a~0.offset 128) (< 33 main_~length~0))) (= main_~arr~0.offset 0)), 13041#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (<= main_~a~0.offset 128) (< 33 main_~length~0) (= main_~arr~0.offset 0)), 13042#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 13043#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:49:13,595 INFO L134 CoverageAnalysis]: Checked inductivity of 4290 backedges. 0 proven. 4290 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:13,596 INFO L442 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-04-11 12:49:13,596 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-04-11 12:49:13,596 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=1598, Unknown=0, NotChecked=0, Total=1722 [2018-04-11 12:49:13,596 INFO L87 Difference]: Start difference. First operand 284 states and 284 transitions. Second operand 42 states. [2018-04-11 12:49:17,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:49:17,604 INFO L93 Difference]: Finished difference Result 293 states and 293 transitions. [2018-04-11 12:49:17,604 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-04-11 12:49:17,604 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 276 [2018-04-11 12:49:17,604 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:49:17,605 INFO L225 Difference]: With dead ends: 293 [2018-04-11 12:49:17,605 INFO L226 Difference]: Without dead ends: 293 [2018-04-11 12:49:17,605 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 838 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=363, Invalid=5957, Unknown=0, NotChecked=0, Total=6320 [2018-04-11 12:49:17,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2018-04-11 12:49:17,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 292. [2018-04-11 12:49:17,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 292 states. [2018-04-11 12:49:17,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 292 states to 292 states and 292 transitions. [2018-04-11 12:49:17,607 INFO L78 Accepts]: Start accepts. Automaton has 292 states and 292 transitions. Word has length 276 [2018-04-11 12:49:17,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:49:17,608 INFO L459 AbstractCegarLoop]: Abstraction has 292 states and 292 transitions. [2018-04-11 12:49:17,608 INFO L460 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-04-11 12:49:17,608 INFO L276 IsEmpty]: Start isEmpty. Operand 292 states and 292 transitions. [2018-04-11 12:49:17,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 285 [2018-04-11 12:49:17,608 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:49:17,608 INFO L355 BasicCegarLoop]: trace histogram [35, 34, 34, 34, 34, 34, 34, 34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:49:17,608 INFO L408 AbstractCegarLoop]: === Iteration 40 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:49:17,609 INFO L82 PathProgramCache]: Analyzing trace with hash -1284453997, now seen corresponding path program 34 times [2018-04-11 12:49:17,609 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:49:17,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:49:17,652 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:49:19,987 INFO L134 CoverageAnalysis]: Checked inductivity of 4556 backedges. 0 proven. 4556 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:19,988 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:49:19,988 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43] total 43 [2018-04-11 12:49:19,988 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:49:19,988 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:19,989 INFO L182 omatonBuilderFactory]: Interpolants [13705#true, 13706#false, 13707#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 13708#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 13709#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 13710#(and (or (<= main_~a~0.offset 4) (<= main_~length~0 34)) (= main_~arr~0.base main_~a~0.base) (or (<= 4 main_~a~0.offset) (< 34 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 13711#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 8 main_~a~0.offset) (< 34 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 8) (<= main_~length~0 34))), 13712#(and (or (<= main_~a~0.offset 12) (<= main_~length~0 34)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 12 main_~a~0.offset) (< 34 main_~length~0)) (= main_~arr~0.offset 0)), 13713#(and (or (<= 16 main_~a~0.offset) (< 34 main_~length~0)) (or (<= main_~a~0.offset 16) (<= main_~length~0 34)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 13714#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 20 main_~a~0.offset) (< 34 main_~length~0)) (or (<= main_~a~0.offset 20) (<= main_~length~0 34)) (= main_~arr~0.offset 0)), 13715#(and (or (<= 24 main_~a~0.offset) (< 34 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 24) (<= main_~length~0 34)) (= main_~arr~0.offset 0)), 13716#(and (or (< 34 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 28) (<= main_~length~0 34)) (= main_~arr~0.offset 0)), 13717#(and (or (<= 32 main_~a~0.offset) (< 34 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 32) (<= main_~length~0 34)) (= main_~arr~0.offset 0)), 13718#(and (or (<= main_~a~0.offset 36) (<= main_~length~0 34)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 36 main_~a~0.offset) (< 34 main_~length~0)) (= main_~arr~0.offset 0)), 13719#(and (or (<= 40 main_~a~0.offset) (< 34 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (or (<= main_~a~0.offset 40) (<= main_~length~0 34)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 13720#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 44 main_~a~0.offset) (< 34 main_~length~0)) (or (<= main_~a~0.offset 44) (<= main_~length~0 34)) (= main_~arr~0.offset 0)), 13721#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 48) (<= main_~length~0 34)) (= main_~arr~0.offset 0) (or (<= 48 main_~a~0.offset) (< 34 main_~length~0))), 13722#(and (or (<= main_~a~0.offset 52) (<= main_~length~0 34)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 52 main_~a~0.offset) (< 34 main_~length~0)) (= main_~arr~0.offset 0)), 13723#(and (or (<= main_~a~0.offset 56) (<= main_~length~0 34)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 56 main_~a~0.offset) (< 34 main_~length~0))), 13724#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 60 main_~a~0.offset) (< 34 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 60) (<= main_~length~0 34))), 13725#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 64 main_~a~0.offset) (< 34 main_~length~0)) (or (<= main_~a~0.offset 64) (<= main_~length~0 34)) (= main_~arr~0.offset 0)), 13726#(and (= main_~arr~0.base main_~a~0.base) (or (<= 68 main_~a~0.offset) (< 34 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 68) (<= main_~length~0 34))), 13727#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 72) (<= main_~length~0 34)) (= main_~arr~0.offset 0) (or (<= 72 main_~a~0.offset) (< 34 main_~length~0))), 13728#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 76 main_~a~0.offset) (< 34 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 76) (<= main_~length~0 34))), 13729#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 80 main_~a~0.offset) (< 34 main_~length~0)) (or (<= main_~a~0.offset 80) (<= main_~length~0 34)) (= main_~arr~0.offset 0)), 13730#(and (= main_~arr~0.base main_~a~0.base) (or (< 34 main_~length~0) (<= 84 main_~a~0.offset)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 84) (<= main_~length~0 34))), 13731#(and (or (<= 88 main_~a~0.offset) (< 34 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 88) (<= main_~length~0 34)) (= main_~arr~0.offset 0)), 13732#(and (or (< 34 main_~length~0) (<= 92 main_~a~0.offset)) (or (<= main_~a~0.offset 92) (<= main_~length~0 34)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 13733#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 96 main_~a~0.offset) (< 34 main_~length~0)) (or (<= main_~a~0.offset 96) (<= main_~length~0 34)) (= main_~arr~0.offset 0)), 13734#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 100 main_~a~0.offset) (< 34 main_~length~0)) (or (<= main_~a~0.offset 100) (<= main_~length~0 34)) (= main_~arr~0.offset 0)), 13735#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 104) (<= main_~length~0 34)) (or (<= 104 main_~a~0.offset) (< 34 main_~length~0)) (= main_~arr~0.offset 0)), 13736#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 108 main_~a~0.offset) (< 34 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 108) (<= main_~length~0 34))), 13737#(and (or (<= 112 main_~a~0.offset) (< 34 main_~length~0)) (or (<= main_~a~0.offset 112) (<= main_~length~0 34)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 13738#(and (or (<= main_~a~0.offset 116) (<= main_~length~0 34)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 116 main_~a~0.offset) (< 34 main_~length~0))), 13739#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 120) (<= main_~length~0 34)) (or (<= 120 main_~a~0.offset) (< 34 main_~length~0)) (= main_~arr~0.offset 0)), 13740#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 124 main_~a~0.offset) (< 34 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 124) (<= main_~length~0 34))), 13741#(and (or (<= main_~a~0.offset 128) (<= main_~length~0 34)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 128 main_~a~0.offset) (< 34 main_~length~0)) (= main_~arr~0.offset 0)), 13742#(and (or (<= main_~a~0.offset 128) (<= main_~length~0 34)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 128 main_~a~0.offset) (< 34 main_~length~0)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 13743#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= 4 main_~a~0.offset) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (<= main_~a~0.offset 132) (< 34 main_~length~0)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))))) (= main_~a~0.base main_~arr~0.base) (= main_~arr~0.offset 0)), 13744#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= 4 main_~a~0.offset) (<= main_~a~0.offset 132) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 34 main_~length~0))) (= main_~arr~0.offset 0) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 13745#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= 4 main_~a~0.offset) (<= main_~a~0.offset 132) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 34 main_~length~0))) (= main_~arr~0.offset 0)), 13746#(and (<= 4 main_~a~0.offset) (<= main_~a~0.offset 132) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (< 34 main_~length~0)), 13747#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 4 main_~a~0.offset)), 13748#(and (<= 8 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:49:19,989 INFO L134 CoverageAnalysis]: Checked inductivity of 4556 backedges. 0 proven. 4556 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:19,989 INFO L442 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-04-11 12:49:19,990 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-04-11 12:49:19,990 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=128, Invalid=1764, Unknown=0, NotChecked=0, Total=1892 [2018-04-11 12:49:19,990 INFO L87 Difference]: Start difference. First operand 292 states and 292 transitions. Second operand 44 states. [2018-04-11 12:49:24,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:49:24,279 INFO L93 Difference]: Finished difference Result 301 states and 301 transitions. [2018-04-11 12:49:24,279 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-04-11 12:49:24,279 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 284 [2018-04-11 12:49:24,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:49:24,280 INFO L225 Difference]: With dead ends: 301 [2018-04-11 12:49:24,280 INFO L226 Difference]: Without dead ends: 301 [2018-04-11 12:49:24,280 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1061 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=381, Invalid=6591, Unknown=0, NotChecked=0, Total=6972 [2018-04-11 12:49:24,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301 states. [2018-04-11 12:49:24,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301 to 300. [2018-04-11 12:49:24,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 300 states. [2018-04-11 12:49:24,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 300 states to 300 states and 300 transitions. [2018-04-11 12:49:24,283 INFO L78 Accepts]: Start accepts. Automaton has 300 states and 300 transitions. Word has length 284 [2018-04-11 12:49:24,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:49:24,283 INFO L459 AbstractCegarLoop]: Abstraction has 300 states and 300 transitions. [2018-04-11 12:49:24,284 INFO L460 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-04-11 12:49:24,284 INFO L276 IsEmpty]: Start isEmpty. Operand 300 states and 300 transitions. [2018-04-11 12:49:24,285 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 293 [2018-04-11 12:49:24,285 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:49:24,285 INFO L355 BasicCegarLoop]: trace histogram [36, 35, 35, 35, 35, 35, 35, 35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:49:24,285 INFO L408 AbstractCegarLoop]: === Iteration 41 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:49:24,285 INFO L82 PathProgramCache]: Analyzing trace with hash 848472258, now seen corresponding path program 35 times [2018-04-11 12:49:24,286 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:49:24,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:49:24,345 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:49:26,722 INFO L134 CoverageAnalysis]: Checked inductivity of 4830 backedges. 0 proven. 4830 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:26,722 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:49:26,723 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43] total 43 [2018-04-11 12:49:26,723 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:49:26,723 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:26,723 INFO L182 omatonBuilderFactory]: Interpolants [14464#(and (or (<= main_~length~0 35) (<= main_~a~0.offset 120)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 120 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.offset 0)), 14465#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 124 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 124) (<= main_~length~0 35))), 14466#(and (or (<= 128 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 35) (<= main_~a~0.offset 128))), 14467#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 132 main_~a~0.offset) (< 35 main_~length~0)) (or (<= main_~length~0 35) (<= main_~a~0.offset 132)) (= main_~arr~0.offset 0)), 14468#(and (= main_~a~0.base main_~arr~0.base) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (<= main_~a~0.offset 136) (< 35 main_~length~0)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))))) (= main_~arr~0.offset 0)), 14469#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 136) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (< 35 main_~length~0))) (= main_~arr~0.offset 0) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 14470#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 136) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (< 35 main_~length~0))) (= main_~arr~0.offset 0)), 14471#(and (<= main_~a~0.offset 136) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (< 35 main_~length~0)), 14472#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 14473#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base))), 14430#true, 14431#false, 14432#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 14433#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 14434#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 14435#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 4) (<= main_~length~0 35)) (or (<= 4 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.offset 0)), 14436#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 8 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 35) (<= main_~a~0.offset 8))), 14437#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 35) (<= main_~a~0.offset 12)) (or (<= 12 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.offset 0)), 14438#(and (or (<= 16 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 35) (<= main_~a~0.offset 16)) (= main_~arr~0.offset 0)), 14439#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 20 main_~a~0.offset) (< 35 main_~length~0)) (or (<= main_~length~0 35) (<= main_~a~0.offset 20)) (= main_~arr~0.offset 0)), 14440#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 35) (<= main_~a~0.offset 24)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 24 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.offset 0)), 14441#(and (or (<= 28 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 35) (<= main_~a~0.offset 28))), 14442#(and (or (<= main_~length~0 35) (<= main_~a~0.offset 32)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 32 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.offset 0)), 14443#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 35) (<= main_~a~0.offset 36)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 36 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.offset 0)), 14444#(and (or (<= 40 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 35) (<= main_~a~0.offset 40))), 14445#(and (or (<= 44 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 35) (<= main_~a~0.offset 44)) (= main_~arr~0.offset 0)), 14446#(and (or (<= main_~length~0 35) (<= main_~a~0.offset 48)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 48 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.offset 0)), 14447#(and (or (<= 52 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 35) (<= main_~a~0.offset 52))), 14448#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 35) (<= main_~a~0.offset 56)) (or (<= 56 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.offset 0)), 14449#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 60 main_~a~0.offset) (< 35 main_~length~0)) (or (<= main_~a~0.offset 60) (<= main_~length~0 35)) (= main_~arr~0.offset 0)), 14450#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 35) (<= main_~a~0.offset 64)) (= main_~arr~0.offset 0) (or (<= 64 main_~a~0.offset) (< 35 main_~length~0))), 14451#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 35) (<= main_~a~0.offset 68)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 68 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.offset 0)), 14452#(and (or (<= 72 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 72) (<= main_~length~0 35))), 14453#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 35) (<= main_~a~0.offset 76)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 76 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.offset 0)), 14454#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 80 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 35) (<= main_~a~0.offset 80))), 14455#(and (or (<= main_~length~0 35) (<= main_~a~0.offset 84)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 84 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.offset 0)), 14456#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 88 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 35) (<= main_~a~0.offset 88))), 14457#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 35) (<= main_~a~0.offset 92)) (or (< 35 main_~length~0) (<= 92 main_~a~0.offset)) (= main_~arr~0.offset 0)), 14458#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 96 main_~a~0.offset) (< 35 main_~length~0)) (or (<= main_~length~0 35) (<= main_~a~0.offset 96)) (= main_~arr~0.offset 0)), 14459#(and (or (<= main_~length~0 35) (<= main_~a~0.offset 100)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 100 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.offset 0)), 14460#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~a~0.offset 104) (<= main_~length~0 35)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 104 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.offset 0)), 14461#(and (or (<= 108 main_~a~0.offset) (< 35 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 108) (<= main_~length~0 35)) (= main_~arr~0.offset 0)), 14462#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 35) (<= main_~a~0.offset 112)) (= main_~arr~0.offset 0) (or (<= 112 main_~a~0.offset) (< 35 main_~length~0))), 14463#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 116 main_~a~0.offset) (< 35 main_~length~0)) (or (<= main_~length~0 35) (<= main_~a~0.offset 116)) (= main_~arr~0.offset 0))] [2018-04-11 12:49:26,723 INFO L134 CoverageAnalysis]: Checked inductivity of 4830 backedges. 0 proven. 4830 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:26,724 INFO L442 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-04-11 12:49:26,724 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-04-11 12:49:26,724 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=127, Invalid=1765, Unknown=0, NotChecked=0, Total=1892 [2018-04-11 12:49:26,724 INFO L87 Difference]: Start difference. First operand 300 states and 300 transitions. Second operand 44 states. [2018-04-11 12:49:31,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:49:31,153 INFO L93 Difference]: Finished difference Result 309 states and 309 transitions. [2018-04-11 12:49:31,153 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-04-11 12:49:31,153 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 292 [2018-04-11 12:49:31,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:49:31,154 INFO L225 Difference]: With dead ends: 309 [2018-04-11 12:49:31,154 INFO L226 Difference]: Without dead ends: 309 [2018-04-11 12:49:31,154 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1023 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=378, Invalid=6594, Unknown=0, NotChecked=0, Total=6972 [2018-04-11 12:49:31,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states. [2018-04-11 12:49:31,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 308. [2018-04-11 12:49:31,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 308 states. [2018-04-11 12:49:31,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308 states to 308 states and 308 transitions. [2018-04-11 12:49:31,156 INFO L78 Accepts]: Start accepts. Automaton has 308 states and 308 transitions. Word has length 292 [2018-04-11 12:49:31,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:49:31,157 INFO L459 AbstractCegarLoop]: Abstraction has 308 states and 308 transitions. [2018-04-11 12:49:31,157 INFO L460 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-04-11 12:49:31,157 INFO L276 IsEmpty]: Start isEmpty. Operand 308 states and 308 transitions. [2018-04-11 12:49:31,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 301 [2018-04-11 12:49:31,158 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:49:31,158 INFO L355 BasicCegarLoop]: trace histogram [37, 36, 36, 36, 36, 36, 36, 36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:49:31,158 INFO L408 AbstractCegarLoop]: === Iteration 42 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:49:31,158 INFO L82 PathProgramCache]: Analyzing trace with hash -705304335, now seen corresponding path program 36 times [2018-04-11 12:49:31,159 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:49:31,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:49:31,216 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:49:33,740 INFO L134 CoverageAnalysis]: Checked inductivity of 5112 backedges. 0 proven. 5112 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:33,740 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:49:33,740 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45] total 45 [2018-04-11 12:49:33,740 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:49:33,740 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:33,740 INFO L182 omatonBuilderFactory]: Interpolants [15171#true, 15172#false, 15173#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 15174#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 15175#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 15176#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 4 main_~a~0.offset) (< 36 main_~length~0)) (or (<= main_~a~0.offset 4) (<= main_~length~0 36)) (= main_~arr~0.offset 0)), 15177#(and (or (<= 8 main_~a~0.offset) (< 36 main_~length~0)) (or (<= main_~a~0.offset 8) (<= main_~length~0 36)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 15178#(and (or (<= 12 main_~a~0.offset) (< 36 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 12) (<= main_~length~0 36)) (= main_~arr~0.offset 0)), 15179#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 16 main_~a~0.offset) (< 36 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 16) (<= main_~length~0 36))), 15180#(and (or (<= main_~a~0.offset 20) (<= main_~length~0 36)) (or (<= 20 main_~a~0.offset) (< 36 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 15181#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 24 main_~a~0.offset) (< 36 main_~length~0)) (or (<= main_~length~0 36) (<= main_~a~0.offset 24)) (= main_~arr~0.offset 0)), 15182#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 28 main_~a~0.offset) (< 36 main_~length~0)) (or (<= main_~a~0.offset 28) (<= main_~length~0 36)) (= main_~arr~0.offset 0)), 15183#(and (or (<= main_~length~0 36) (<= main_~a~0.offset 32)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 32 main_~a~0.offset) (< 36 main_~length~0)) (= main_~arr~0.offset 0)), 15184#(and (or (<= main_~length~0 36) (<= main_~a~0.offset 36)) (= main_~arr~0.base main_~a~0.base) (or (<= 36 main_~a~0.offset) (< 36 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 15185#(and (or (<= main_~length~0 36) (<= main_~a~0.offset 40)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 40 main_~a~0.offset) (< 36 main_~length~0)) (= main_~arr~0.offset 0)), 15186#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 44) (<= main_~length~0 36)) (or (<= 44 main_~a~0.offset) (< 36 main_~length~0)) (= main_~arr~0.offset 0)), 15187#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 48) (<= main_~length~0 36)) (= main_~arr~0.offset 0) (or (<= 48 main_~a~0.offset) (< 36 main_~length~0))), 15188#(and (or (<= 52 main_~a~0.offset) (< 36 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 36) (<= main_~a~0.offset 52)) (= main_~arr~0.offset 0)), 15189#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 56 main_~a~0.offset) (< 36 main_~length~0)) (or (<= main_~length~0 36) (<= main_~a~0.offset 56))), 15190#(and (or (<= 60 main_~a~0.offset) (< 36 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 60) (<= main_~length~0 36))), 15191#(and (or (<= main_~length~0 36) (<= main_~a~0.offset 64)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 64 main_~a~0.offset) (< 36 main_~length~0))), 15192#(and (or (<= main_~a~0.offset 68) (<= main_~length~0 36)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 68 main_~a~0.offset) (< 36 main_~length~0))), 15193#(and (or (<= main_~a~0.offset 72) (<= main_~length~0 36)) (= main_~arr~0.base main_~a~0.base) (or (<= 72 main_~a~0.offset) (< 36 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 15194#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 76 main_~a~0.offset) (< 36 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 36) (<= main_~a~0.offset 76))), 15195#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 80 main_~a~0.offset) (< 36 main_~length~0)) (or (<= main_~a~0.offset 80) (<= main_~length~0 36)) (= main_~arr~0.offset 0)), 15196#(and (or (<= main_~a~0.offset 84) (<= main_~length~0 36)) (= main_~arr~0.base main_~a~0.base) (or (<= 84 main_~a~0.offset) (< 36 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 15197#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 88 main_~a~0.offset) (< 36 main_~length~0)) (or (<= main_~a~0.offset 88) (<= main_~length~0 36)) (= main_~arr~0.offset 0)), 15198#(and (or (<= main_~a~0.offset 92) (<= main_~length~0 36)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 92 main_~a~0.offset) (< 36 main_~length~0)) (= main_~arr~0.offset 0)), 15199#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 96 main_~a~0.offset) (< 36 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 96) (<= main_~length~0 36))), 15200#(and (or (<= main_~a~0.offset 100) (<= main_~length~0 36)) (or (<= 100 main_~a~0.offset) (< 36 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 15201#(and (or (<= main_~a~0.offset 104) (<= main_~length~0 36)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 104 main_~a~0.offset) (< 36 main_~length~0)) (= main_~arr~0.offset 0)), 15202#(and (or (<= main_~a~0.offset 108) (<= main_~length~0 36)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 108 main_~a~0.offset) (< 36 main_~length~0)) (= main_~arr~0.offset 0)), 15203#(and (or (<= main_~length~0 36) (<= main_~a~0.offset 112)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 112 main_~a~0.offset) (< 36 main_~length~0))), 15204#(and (or (<= main_~length~0 36) (<= main_~a~0.offset 116)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 116 main_~a~0.offset) (< 36 main_~length~0)) (= main_~arr~0.offset 0)), 15205#(and (or (<= main_~a~0.offset 120) (<= main_~length~0 36)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 120 main_~a~0.offset) (< 36 main_~length~0))), 15206#(and (or (<= 124 main_~a~0.offset) (< 36 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 124) (<= main_~length~0 36))), 15207#(and (or (<= 128 main_~a~0.offset) (< 36 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 128) (<= main_~length~0 36)) (= main_~arr~0.offset 0)), 15208#(and (or (<= 128 main_~a~0.offset) (< 36 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (or (<= main_~a~0.offset 128) (<= main_~length~0 36)) (= main_~arr~0.offset 0)), 15209#(and (<= 4 main_~a~0.offset) (or (<= 132 main_~a~0.offset) (< 36 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 132) (<= main_~length~0 36))), 15210#(and (or (<= main_~a~0.offset 136) (<= main_~length~0 36)) (or (<= 136 main_~a~0.offset) (< 36 main_~length~0)) (<= 8 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 15211#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= 12 main_~a~0.offset) (or (and (<= main_~a~0.offset 140) (< 36 main_~length~0)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 15212#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (or (and (<= 12 main_~a~0.offset) (<= main_~a~0.offset 140) (< 36 main_~length~0)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 15213#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (or (and (<= 12 main_~a~0.offset) (<= main_~a~0.offset 140) (< 36 main_~length~0)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 15214#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 12 main_~a~0.offset) (= main_~arr~0.offset 0) (<= main_~a~0.offset 140) (< 36 main_~length~0)), 15215#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 12 main_~a~0.offset)), 15216#(and (<= 16 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:49:33,741 INFO L134 CoverageAnalysis]: Checked inductivity of 5112 backedges. 0 proven. 5112 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:33,741 INFO L442 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-04-11 12:49:33,741 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-04-11 12:49:33,741 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=137, Invalid=1933, Unknown=0, NotChecked=0, Total=2070 [2018-04-11 12:49:33,741 INFO L87 Difference]: Start difference. First operand 308 states and 308 transitions. Second operand 46 states. [2018-04-11 12:49:38,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:49:38,334 INFO L93 Difference]: Finished difference Result 317 states and 317 transitions. [2018-04-11 12:49:38,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-04-11 12:49:38,335 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 300 [2018-04-11 12:49:38,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:49:38,336 INFO L225 Difference]: With dead ends: 317 [2018-04-11 12:49:38,336 INFO L226 Difference]: Without dead ends: 317 [2018-04-11 12:49:38,336 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1057 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=402, Invalid=7254, Unknown=0, NotChecked=0, Total=7656 [2018-04-11 12:49:38,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states. [2018-04-11 12:49:38,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 316. [2018-04-11 12:49:38,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 316 states. [2018-04-11 12:49:38,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 316 states to 316 states and 316 transitions. [2018-04-11 12:49:38,338 INFO L78 Accepts]: Start accepts. Automaton has 316 states and 316 transitions. Word has length 300 [2018-04-11 12:49:38,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:49:38,338 INFO L459 AbstractCegarLoop]: Abstraction has 316 states and 316 transitions. [2018-04-11 12:49:38,338 INFO L460 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-04-11 12:49:38,338 INFO L276 IsEmpty]: Start isEmpty. Operand 316 states and 316 transitions. [2018-04-11 12:49:38,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 309 [2018-04-11 12:49:38,339 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:49:38,339 INFO L355 BasicCegarLoop]: trace histogram [38, 37, 37, 37, 37, 37, 37, 37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:49:38,339 INFO L408 AbstractCegarLoop]: === Iteration 43 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:49:38,340 INFO L82 PathProgramCache]: Analyzing trace with hash -1163294176, now seen corresponding path program 37 times [2018-04-11 12:49:38,340 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:49:38,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:49:38,392 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:49:41,234 INFO L134 CoverageAnalysis]: Checked inductivity of 5402 backedges. 0 proven. 5402 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:41,234 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:49:41,234 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45] total 45 [2018-04-11 12:49:41,234 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:49:41,234 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:41,234 INFO L182 omatonBuilderFactory]: Interpolants [15936#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 15937#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 15938#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 15939#(and (or (<= main_~a~0.offset 4) (<= main_~length~0 37)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 4 main_~a~0.offset) (< 37 main_~length~0))), 15940#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 37) (<= main_~a~0.offset 8)) (or (<= 8 main_~a~0.offset) (< 37 main_~length~0)) (= main_~arr~0.offset 0)), 15941#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 37 main_~length~0) (<= 12 main_~a~0.offset)) (or (<= main_~length~0 37) (<= main_~a~0.offset 12)) (= main_~arr~0.offset 0)), 15942#(and (or (<= main_~length~0 37) (<= main_~a~0.offset 16)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 37 main_~length~0) (<= 16 main_~a~0.offset))), 15943#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 37) (<= main_~a~0.offset 20)) (or (<= 20 main_~a~0.offset) (< 37 main_~length~0)) (= main_~arr~0.offset 0)), 15944#(and (or (<= main_~length~0 37) (<= main_~a~0.offset 24)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 37 main_~length~0) (<= 24 main_~a~0.offset)) (= main_~arr~0.offset 0)), 15945#(and (or (<= main_~length~0 37) (<= main_~a~0.offset 28)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 37 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.offset 0)), 15946#(and (= main_~arr~0.base main_~a~0.base) (or (<= 32 main_~a~0.offset) (< 37 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 37) (<= main_~a~0.offset 32)) (= main_~arr~0.offset 0)), 15947#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 37) (<= main_~a~0.offset 36)) (or (<= 36 main_~a~0.offset) (< 37 main_~length~0)) (= main_~arr~0.offset 0)), 15948#(and (or (<= main_~length~0 37) (<= main_~a~0.offset 40)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 40 main_~a~0.offset) (< 37 main_~length~0))), 15949#(and (or (<= 44 main_~a~0.offset) (< 37 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 37) (<= main_~a~0.offset 44)) (= main_~arr~0.offset 0)), 15950#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 37) (<= main_~a~0.offset 48)) (= main_~arr~0.offset 0) (or (< 37 main_~length~0) (<= 48 main_~a~0.offset))), 15951#(and (or (< 37 main_~length~0) (<= 52 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 37) (<= main_~a~0.offset 52))), 15952#(and (or (<= main_~length~0 37) (<= main_~a~0.offset 56)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 37 main_~length~0) (<= 56 main_~a~0.offset))), 15953#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 37) (<= main_~a~0.offset 60)) (= main_~arr~0.offset 0) (or (<= 60 main_~a~0.offset) (< 37 main_~length~0))), 15954#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 37) (<= main_~a~0.offset 64)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 64 main_~a~0.offset) (< 37 main_~length~0)) (= main_~arr~0.offset 0)), 15955#(and (or (<= 68 main_~a~0.offset) (< 37 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 37) (<= main_~a~0.offset 68))), 15956#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 37 main_~length~0) (<= 72 main_~a~0.offset)) (or (<= main_~length~0 37) (<= main_~a~0.offset 72)) (= main_~arr~0.offset 0)), 15957#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 76 main_~a~0.offset) (< 37 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 37) (<= main_~a~0.offset 76))), 15958#(and (or (< 37 main_~length~0) (<= 80 main_~a~0.offset)) (or (<= main_~length~0 37) (<= main_~a~0.offset 80)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 15959#(and (or (<= main_~length~0 37) (<= main_~a~0.offset 84)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 37 main_~length~0) (<= 84 main_~a~0.offset))), 15960#(and (or (<= 88 main_~a~0.offset) (< 37 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 37) (<= main_~a~0.offset 88))), 15961#(and (or (< 37 main_~length~0) (<= 92 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 37) (<= main_~a~0.offset 92))), 15962#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 37) (<= main_~a~0.offset 96)) (= main_~arr~0.offset 0) (or (<= 96 main_~a~0.offset) (< 37 main_~length~0))), 15963#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 37) (<= main_~a~0.offset 100)) (or (< 37 main_~length~0) (<= 100 main_~a~0.offset))), 15964#(and (or (< 37 main_~length~0) (<= 104 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 37) (<= main_~a~0.offset 104)) (= main_~arr~0.offset 0)), 15965#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 37 main_~length~0) (<= 108 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~length~0 37) (<= main_~a~0.offset 108))), 15966#(and (or (<= 112 main_~a~0.offset) (< 37 main_~length~0)) (or (<= main_~length~0 37) (<= main_~a~0.offset 112)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 15967#(and (or (<= main_~length~0 37) (<= main_~a~0.offset 116)) (or (<= 116 main_~a~0.offset) (< 37 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 15968#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 120 main_~a~0.offset) (< 37 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 37) (<= main_~a~0.offset 120))), 15969#(and (or (<= main_~length~0 37) (<= main_~a~0.offset 124)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 124 main_~a~0.offset) (< 37 main_~length~0)) (= main_~arr~0.offset 0)), 15970#(and (= main_~arr~0.base main_~a~0.base) (or (<= 128 main_~a~0.offset) (< 37 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 37) (<= main_~a~0.offset 128)) (= main_~arr~0.offset 0)), 15971#(and (or (<= main_~length~0 37) (<= main_~a~0.offset 132)) (= main_~arr~0.base main_~a~0.base) (or (< 37 main_~length~0) (<= 132 main_~a~0.offset)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 15972#(and (or (< 37 main_~length~0) (<= 136 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 37) (<= main_~a~0.offset 136))), 15973#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 37) (<= main_~a~0.offset 140)) (or (< 37 main_~length~0) (<= 140 main_~a~0.offset)) (= main_~arr~0.offset 0)), 15974#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (< 37 main_~length~0) (<= main_~a~0.offset 144)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0)), 15975#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (or (and (< 37 main_~length~0) (<= main_~a~0.offset 144)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))), 15976#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (or (and (< 37 main_~length~0) (<= main_~a~0.offset 144)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))), 15977#(and (= main_~arr~0.base main_~a~0.base) (< 37 main_~length~0) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (<= main_~a~0.offset 144)), 15978#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 15979#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base))), 15934#true, 15935#false] [2018-04-11 12:49:41,235 INFO L134 CoverageAnalysis]: Checked inductivity of 5402 backedges. 0 proven. 5402 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:41,235 INFO L442 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-04-11 12:49:41,235 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-04-11 12:49:41,235 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=1934, Unknown=0, NotChecked=0, Total=2070 [2018-04-11 12:49:41,235 INFO L87 Difference]: Start difference. First operand 316 states and 316 transitions. Second operand 46 states. [2018-04-11 12:49:46,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:49:46,043 INFO L93 Difference]: Finished difference Result 325 states and 325 transitions. [2018-04-11 12:49:46,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-04-11 12:49:46,078 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 308 [2018-04-11 12:49:46,078 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:49:46,079 INFO L225 Difference]: With dead ends: 325 [2018-04-11 12:49:46,079 INFO L226 Difference]: Without dead ends: 325 [2018-04-11 12:49:46,080 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1012 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=399, Invalid=7257, Unknown=0, NotChecked=0, Total=7656 [2018-04-11 12:49:46,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2018-04-11 12:49:46,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 324. [2018-04-11 12:49:46,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 324 states. [2018-04-11 12:49:46,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 324 transitions. [2018-04-11 12:49:46,083 INFO L78 Accepts]: Start accepts. Automaton has 324 states and 324 transitions. Word has length 308 [2018-04-11 12:49:46,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:49:46,083 INFO L459 AbstractCegarLoop]: Abstraction has 324 states and 324 transitions. [2018-04-11 12:49:46,083 INFO L460 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-04-11 12:49:46,083 INFO L276 IsEmpty]: Start isEmpty. Operand 324 states and 324 transitions. [2018-04-11 12:49:46,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 317 [2018-04-11 12:49:46,084 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:49:46,084 INFO L355 BasicCegarLoop]: trace histogram [39, 38, 38, 38, 38, 38, 38, 38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:49:46,084 INFO L408 AbstractCegarLoop]: === Iteration 44 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:49:46,084 INFO L82 PathProgramCache]: Analyzing trace with hash 2126285903, now seen corresponding path program 38 times [2018-04-11 12:49:46,085 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:49:46,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:49:46,139 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:49:48,952 INFO L134 CoverageAnalysis]: Checked inductivity of 5700 backedges. 0 proven. 5700 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:48,952 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:49:48,952 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47] total 47 [2018-04-11 12:49:48,952 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:49:48,953 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:48,953 INFO L182 omatonBuilderFactory]: Interpolants [16713#true, 16714#false, 16715#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 16716#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 16717#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 16718#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~a~0.offset 4) (<= main_~length~0 38)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 4 main_~a~0.offset) (< 38 main_~length~0)) (= main_~arr~0.offset 0)), 16719#(and (or (<= main_~length~0 38) (<= main_~a~0.offset 8)) (or (<= 8 main_~a~0.offset) (< 38 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 16720#(and (or (<= 12 main_~a~0.offset) (< 38 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 38) (<= main_~a~0.offset 12)) (= main_~arr~0.offset 0)), 16721#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 38) (<= main_~a~0.offset 16)) (= main_~arr~0.offset 0) (or (<= 16 main_~a~0.offset) (< 38 main_~length~0))), 16722#(and (or (<= 20 main_~a~0.offset) (< 38 main_~length~0)) (or (<= main_~length~0 38) (<= main_~a~0.offset 20)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 16723#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 24 main_~a~0.offset) (< 38 main_~length~0)) (or (<= main_~length~0 38) (<= main_~a~0.offset 24)) (= main_~arr~0.offset 0)), 16724#(and (= main_~arr~0.base main_~a~0.base) (or (< 38 main_~length~0) (<= 28 main_~a~0.offset)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 38) (<= main_~a~0.offset 28)) (= main_~arr~0.offset 0)), 16725#(and (or (<= 32 main_~a~0.offset) (< 38 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 38) (<= main_~a~0.offset 32))), 16726#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 36 main_~a~0.offset) (< 38 main_~length~0)) (or (<= main_~length~0 38) (<= main_~a~0.offset 36)) (= main_~arr~0.offset 0)), 16727#(and (or (<= main_~length~0 38) (<= main_~a~0.offset 40)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 40 main_~a~0.offset) (< 38 main_~length~0)) (= main_~arr~0.offset 0)), 16728#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 44 main_~a~0.offset) (< 38 main_~length~0)) (or (<= main_~length~0 38) (<= main_~a~0.offset 44)) (= main_~arr~0.offset 0)), 16729#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 48 main_~a~0.offset) (< 38 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 38) (<= main_~a~0.offset 48))), 16730#(and (= main_~arr~0.base main_~a~0.base) (or (<= 52 main_~a~0.offset) (< 38 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 38) (<= main_~a~0.offset 52)) (= main_~arr~0.offset 0)), 16731#(and (or (<= main_~length~0 38) (<= main_~a~0.offset 56)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 56 main_~a~0.offset) (< 38 main_~length~0)) (= main_~arr~0.offset 0)), 16732#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 60 main_~a~0.offset) (< 38 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 60) (<= main_~length~0 38))), 16733#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 38) (<= main_~a~0.offset 64)) (or (<= 64 main_~a~0.offset) (< 38 main_~length~0)) (= main_~arr~0.offset 0)), 16734#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 38) (<= main_~a~0.offset 68)) (= main_~arr~0.offset 0) (or (<= 68 main_~a~0.offset) (< 38 main_~length~0))), 16735#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 72 main_~a~0.offset) (< 38 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 72) (<= main_~length~0 38))), 16736#(and (or (<= 76 main_~a~0.offset) (< 38 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 38) (<= main_~a~0.offset 76))), 16737#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 80 main_~a~0.offset) (< 38 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 38) (<= main_~a~0.offset 80))), 16738#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 38) (<= main_~a~0.offset 84)) (or (< 38 main_~length~0) (<= 84 main_~a~0.offset))), 16739#(and (or (<= main_~length~0 38) (<= main_~a~0.offset 88)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 88 main_~a~0.offset) (< 38 main_~length~0)) (= main_~arr~0.offset 0)), 16740#(and (or (<= main_~length~0 38) (<= main_~a~0.offset 92)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 38 main_~length~0) (<= 92 main_~a~0.offset)) (= main_~arr~0.offset 0)), 16741#(and (or (<= main_~length~0 38) (<= main_~a~0.offset 96)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 96 main_~a~0.offset) (< 38 main_~length~0)) (= main_~arr~0.offset 0)), 16742#(and (or (<= 100 main_~a~0.offset) (< 38 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 38) (<= main_~a~0.offset 100)) (= main_~arr~0.offset 0)), 16743#(and (= main_~arr~0.base main_~a~0.base) (or (<= 104 main_~a~0.offset) (< 38 main_~length~0)) (or (<= main_~a~0.offset 104) (<= main_~length~0 38)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 16744#(and (or (<= 108 main_~a~0.offset) (< 38 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (or (<= main_~a~0.offset 108) (<= main_~length~0 38)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 16745#(and (or (<= main_~length~0 38) (<= main_~a~0.offset 112)) (= main_~arr~0.base main_~a~0.base) (or (<= 112 main_~a~0.offset) (< 38 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 16746#(and (or (<= main_~length~0 38) (<= main_~a~0.offset 116)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 116 main_~a~0.offset) (< 38 main_~length~0))), 16747#(and (or (<= 120 main_~a~0.offset) (< 38 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 38) (<= main_~a~0.offset 120))), 16748#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 124) (<= main_~length~0 38)) (= main_~arr~0.offset 0) (or (<= 124 main_~a~0.offset) (< 38 main_~length~0))), 16749#(and (or (<= 128 main_~a~0.offset) (< 38 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 38) (<= main_~a~0.offset 128)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 16750#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 132 main_~a~0.offset) (< 38 main_~length~0)) (or (<= main_~length~0 38) (<= main_~a~0.offset 132))), 16751#(and (or (<= main_~a~0.offset 136) (<= main_~length~0 38)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 136 main_~a~0.offset) (< 38 main_~length~0)) (= main_~arr~0.offset 0)), 16752#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 38) (<= main_~a~0.offset 140)) (= main_~arr~0.offset 0) (or (<= 140 main_~a~0.offset) (< 38 main_~length~0))), 16753#(and (or (<= 144 main_~a~0.offset) (< 38 main_~length~0)) (or (<= main_~length~0 38) (<= main_~a~0.offset 144)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 16754#(and (or (<= 144 main_~a~0.offset) (< 38 main_~length~0)) (or (<= main_~length~0 38) (<= main_~a~0.offset 144)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 16755#(and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 148) (< 38 main_~length~0))) (= main_~arr~0.offset 0)), 16756#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 148) (< 38 main_~length~0))) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))), 16757#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 148) (< 38 main_~length~0))) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))), 16758#(and (<= main_~a~0.offset 148) (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (< 38 main_~length~0)), 16759#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 4 main_~a~0.offset)), 16760#(and (<= 8 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:49:48,953 INFO L134 CoverageAnalysis]: Checked inductivity of 5700 backedges. 0 proven. 5700 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:48,953 INFO L442 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-04-11 12:49:48,953 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-04-11 12:49:48,953 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=2113, Unknown=0, NotChecked=0, Total=2256 [2018-04-11 12:49:48,954 INFO L87 Difference]: Start difference. First operand 324 states and 324 transitions. Second operand 48 states. [2018-04-11 12:49:54,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:49:54,073 INFO L93 Difference]: Finished difference Result 333 states and 333 transitions. [2018-04-11 12:49:54,073 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-04-11 12:49:54,073 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 316 [2018-04-11 12:49:54,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:49:54,074 INFO L225 Difference]: With dead ends: 333 [2018-04-11 12:49:54,074 INFO L226 Difference]: Without dead ends: 333 [2018-04-11 12:49:54,074 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1150 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=420, Invalid=7952, Unknown=0, NotChecked=0, Total=8372 [2018-04-11 12:49:54,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333 states. [2018-04-11 12:49:54,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333 to 332. [2018-04-11 12:49:54,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 332 states. [2018-04-11 12:49:54,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 332 states to 332 states and 332 transitions. [2018-04-11 12:49:54,077 INFO L78 Accepts]: Start accepts. Automaton has 332 states and 332 transitions. Word has length 316 [2018-04-11 12:49:54,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:49:54,077 INFO L459 AbstractCegarLoop]: Abstraction has 332 states and 332 transitions. [2018-04-11 12:49:54,077 INFO L460 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-04-11 12:49:54,077 INFO L276 IsEmpty]: Start isEmpty. Operand 332 states and 332 transitions. [2018-04-11 12:49:54,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 325 [2018-04-11 12:49:54,078 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:49:54,078 INFO L355 BasicCegarLoop]: trace histogram [40, 39, 39, 39, 39, 39, 39, 39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:49:54,078 INFO L408 AbstractCegarLoop]: === Iteration 45 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:49:54,078 INFO L82 PathProgramCache]: Analyzing trace with hash 1094578046, now seen corresponding path program 39 times [2018-04-11 12:49:54,079 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:49:54,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:49:54,143 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:49:56,935 INFO L134 CoverageAnalysis]: Checked inductivity of 6006 backedges. 0 proven. 6006 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:56,935 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:49:56,935 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47] total 47 [2018-04-11 12:49:56,935 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:49:56,936 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:56,936 INFO L182 omatonBuilderFactory]: Interpolants [17536#(and (= main_~arr~0.base main_~a~0.base) (or (<= 72 main_~a~0.offset) (< 39 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 72) (<= main_~length~0 39)) (= main_~arr~0.offset 0)), 17537#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 76 main_~a~0.offset) (< 39 main_~length~0)) (or (<= main_~length~0 39) (<= main_~a~0.offset 76))), 17538#(and (or (< 39 main_~length~0) (<= 80 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 39) (<= main_~a~0.offset 80)) (= main_~arr~0.offset 0)), 17539#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 39 main_~length~0) (<= 84 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~length~0 39) (<= main_~a~0.offset 84))), 17540#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 88) (<= main_~length~0 39)) (or (<= 88 main_~a~0.offset) (< 39 main_~length~0)) (= main_~arr~0.offset 0)), 17541#(and (or (<= main_~length~0 39) (<= main_~a~0.offset 92)) (or (< 39 main_~length~0) (<= 92 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 17542#(and (or (<= main_~length~0 39) (<= main_~a~0.offset 96)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 96 main_~a~0.offset) (< 39 main_~length~0))), 17543#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 39 main_~length~0) (<= 100 main_~a~0.offset)) (or (<= main_~length~0 39) (<= main_~a~0.offset 100))), 17544#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 104) (<= main_~length~0 39)) (= main_~arr~0.offset 0) (or (<= 104 main_~a~0.offset) (< 39 main_~length~0))), 17545#(and (or (<= 108 main_~a~0.offset) (< 39 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 108) (<= main_~length~0 39)) (= main_~arr~0.offset 0)), 17546#(and (or (<= main_~length~0 39) (<= main_~a~0.offset 112)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 112 main_~a~0.offset) (< 39 main_~length~0))), 17547#(and (or (<= main_~length~0 39) (<= main_~a~0.offset 116)) (or (<= 116 main_~a~0.offset) (< 39 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 17548#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 39) (<= main_~a~0.offset 120)) (= main_~arr~0.offset 0) (or (<= 120 main_~a~0.offset) (< 39 main_~length~0))), 17549#(and (= main_~arr~0.base main_~a~0.base) (or (<= 124 main_~a~0.offset) (< 39 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 124) (<= main_~length~0 39)) (= main_~arr~0.offset 0)), 17550#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 128 main_~a~0.offset) (< 39 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 39) (<= main_~a~0.offset 128))), 17551#(and (or (<= main_~a~0.offset 132) (<= main_~length~0 39)) (= main_~arr~0.base main_~a~0.base) (or (< 39 main_~length~0) (<= 132 main_~a~0.offset)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 17552#(and (or (<= 136 main_~a~0.offset) (< 39 main_~length~0)) (or (<= main_~a~0.offset 136) (<= main_~length~0 39)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 17553#(and (or (<= 140 main_~a~0.offset) (< 39 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 39) (<= main_~a~0.offset 140))), 17554#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 144 main_~a~0.offset) (< 39 main_~length~0)) (or (<= main_~length~0 39) (<= main_~a~0.offset 144)) (= main_~arr~0.offset 0)), 17555#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 148 main_~a~0.offset) (< 39 main_~length~0)) (or (<= main_~a~0.offset 148) (<= main_~length~0 39)) (= main_~arr~0.offset 0)), 17556#(and (or (and (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 152) (< 39 main_~length~0))) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base))) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= main_~a~0.base main_~arr~0.base) (= main_~arr~0.offset 0)), 17557#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= main_~a~0.offset 152) (< 39 main_~length~0))) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 17558#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= main_~a~0.offset 152) (< 39 main_~length~0))) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 17559#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (<= main_~a~0.offset 152) (< 39 main_~length~0) (= main_~arr~0.offset 0)), 17560#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 17561#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base))), 17514#true, 17515#false, 17516#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 17517#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 17518#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 17519#(and (or (<= main_~a~0.offset 4) (<= main_~length~0 39)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 4 main_~a~0.offset) (< 39 main_~length~0)) (= main_~arr~0.offset 0)), 17520#(and (or (<= main_~a~0.offset 8) (<= main_~length~0 39)) (or (<= 8 main_~a~0.offset) (< 39 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 17521#(and (= main_~arr~0.base main_~a~0.base) (or (<= 12 main_~a~0.offset) (< 39 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 39) (<= main_~a~0.offset 12))), 17522#(and (or (<= 16 main_~a~0.offset) (< 39 main_~length~0)) (or (<= main_~length~0 39) (<= main_~a~0.offset 16)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 17523#(and (or (<= main_~a~0.offset 20) (<= main_~length~0 39)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 20 main_~a~0.offset) (< 39 main_~length~0))), 17524#(and (or (< 39 main_~length~0) (<= 24 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 39) (<= main_~a~0.offset 24))), 17525#(and (or (< 39 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 39) (<= main_~a~0.offset 28)) (= main_~arr~0.offset 0)), 17526#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 39) (<= main_~a~0.offset 32)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 32 main_~a~0.offset) (< 39 main_~length~0)) (= main_~arr~0.offset 0)), 17527#(and (or (<= 36 main_~a~0.offset) (< 39 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 39) (<= main_~a~0.offset 36)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 17528#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 39) (<= main_~a~0.offset 40)) (or (<= 40 main_~a~0.offset) (< 39 main_~length~0)) (= main_~arr~0.offset 0)), 17529#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 39) (<= main_~a~0.offset 44)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 44 main_~a~0.offset) (< 39 main_~length~0))), 17530#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 48 main_~a~0.offset) (< 39 main_~length~0)) (or (<= main_~length~0 39) (<= main_~a~0.offset 48))), 17531#(and (or (<= main_~length~0 39) (<= main_~a~0.offset 52)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 52 main_~a~0.offset) (< 39 main_~length~0))), 17532#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 56 main_~a~0.offset) (< 39 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 39) (<= main_~a~0.offset 56))), 17533#(and (or (<= main_~a~0.offset 60) (<= main_~length~0 39)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 60 main_~a~0.offset) (< 39 main_~length~0)) (= main_~arr~0.offset 0)), 17534#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 64 main_~a~0.offset) (< 39 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 39) (<= main_~a~0.offset 64))), 17535#(and (= main_~arr~0.base main_~a~0.base) (or (<= 68 main_~a~0.offset) (< 39 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 39) (<= main_~a~0.offset 68)))] [2018-04-11 12:49:56,936 INFO L134 CoverageAnalysis]: Checked inductivity of 6006 backedges. 0 proven. 6006 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:49:56,936 INFO L442 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-04-11 12:49:56,936 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-04-11 12:49:56,937 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=139, Invalid=2117, Unknown=0, NotChecked=0, Total=2256 [2018-04-11 12:49:56,937 INFO L87 Difference]: Start difference. First operand 332 states and 332 transitions. Second operand 48 states. [2018-04-11 12:50:02,099 WARN L151 SmtUtils]: Spent 125ms on a formula simplification. DAG size of input: 38 DAG size of output 38 [2018-04-11 12:50:02,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:50:02,520 INFO L93 Difference]: Finished difference Result 341 states and 341 transitions. [2018-04-11 12:50:02,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-04-11 12:50:02,520 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 324 [2018-04-11 12:50:02,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:50:02,521 INFO L225 Difference]: With dead ends: 341 [2018-04-11 12:50:02,521 INFO L226 Difference]: Without dead ends: 341 [2018-04-11 12:50:02,521 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1217 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=414, Invalid=7958, Unknown=0, NotChecked=0, Total=8372 [2018-04-11 12:50:02,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 341 states. [2018-04-11 12:50:02,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 341 to 340. [2018-04-11 12:50:02,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 340 states. [2018-04-11 12:50:02,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 340 states to 340 states and 340 transitions. [2018-04-11 12:50:02,524 INFO L78 Accepts]: Start accepts. Automaton has 340 states and 340 transitions. Word has length 324 [2018-04-11 12:50:02,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:50:02,524 INFO L459 AbstractCegarLoop]: Abstraction has 340 states and 340 transitions. [2018-04-11 12:50:02,524 INFO L460 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-04-11 12:50:02,524 INFO L276 IsEmpty]: Start isEmpty. Operand 340 states and 340 transitions. [2018-04-11 12:50:02,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 333 [2018-04-11 12:50:02,525 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:50:02,525 INFO L355 BasicCegarLoop]: trace histogram [41, 40, 40, 40, 40, 40, 40, 40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:50:02,525 INFO L408 AbstractCegarLoop]: === Iteration 46 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:50:02,525 INFO L82 PathProgramCache]: Analyzing trace with hash -1573080147, now seen corresponding path program 40 times [2018-04-11 12:50:02,525 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:50:02,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:50:02,604 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:50:05,556 INFO L134 CoverageAnalysis]: Checked inductivity of 6320 backedges. 0 proven. 6320 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:50:05,556 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:50:05,556 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49] total 49 [2018-04-11 12:50:05,556 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:50:05,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:50:05,557 INFO L182 omatonBuilderFactory]: Interpolants [18331#true, 18332#false, 18333#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 18334#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 18335#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 18336#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 4 main_~a~0.offset) (< 40 main_~length~0)) (or (<= main_~a~0.offset 4) (<= main_~length~0 40)) (= main_~arr~0.offset 0)), 18337#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~a~0.offset 8) (<= main_~length~0 40)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 8 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.offset 0)), 18338#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 12) (<= main_~length~0 40)) (or (<= 12 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.offset 0)), 18339#(and (or (<= main_~a~0.offset 16) (<= main_~length~0 40)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 16 main_~a~0.offset) (< 40 main_~length~0))), 18340#(and (or (<= 20 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 20) (<= main_~length~0 40))), 18341#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 40) (<= main_~a~0.offset 24)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 24 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.offset 0)), 18342#(and (or (<= main_~a~0.offset 28) (<= main_~length~0 40)) (= main_~arr~0.base main_~a~0.base) (or (< 40 main_~length~0) (<= 28 main_~a~0.offset)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 18343#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 40) (<= main_~a~0.offset 32)) (or (<= 32 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.offset 0)), 18344#(and (or (<= 36 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 40) (<= main_~a~0.offset 36)) (= main_~arr~0.offset 0)), 18345#(and (or (<= 40 main_~a~0.offset) (< 40 main_~length~0)) (or (<= main_~length~0 40) (<= main_~a~0.offset 40)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 18346#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 44 main_~a~0.offset) (< 40 main_~length~0)) (or (<= main_~length~0 40) (<= main_~a~0.offset 44))), 18347#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 48 main_~a~0.offset) (< 40 main_~length~0)) (or (<= main_~length~0 40) (<= main_~a~0.offset 48)) (= main_~arr~0.offset 0)), 18348#(and (or (<= main_~length~0 40) (<= main_~a~0.offset 52)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 52 main_~a~0.offset) (< 40 main_~length~0))), 18349#(and (or (<= main_~length~0 40) (<= main_~a~0.offset 56)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 56 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.offset 0)), 18350#(and (or (<= main_~a~0.offset 60) (<= main_~length~0 40)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 60 main_~a~0.offset) (< 40 main_~length~0))), 18351#(and (or (<= main_~length~0 40) (<= main_~a~0.offset 64)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 64 main_~a~0.offset) (< 40 main_~length~0))), 18352#(and (= main_~arr~0.base main_~a~0.base) (or (<= 68 main_~a~0.offset) (< 40 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 68) (<= main_~length~0 40)) (= main_~arr~0.offset 0)), 18353#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 72) (<= main_~length~0 40)) (or (<= 72 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.offset 0)), 18354#(and (or (<= main_~length~0 40) (<= main_~a~0.offset 76)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 76 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.offset 0)), 18355#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 80) (<= main_~length~0 40)) (or (<= 80 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.offset 0)), 18356#(and (or (< 40 main_~length~0) (<= 84 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 84) (<= main_~length~0 40))), 18357#(and (or (<= 88 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 88) (<= main_~length~0 40)) (= main_~arr~0.offset 0)), 18358#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 92) (<= main_~length~0 40)) (= main_~arr~0.offset 0) (or (< 40 main_~length~0) (<= 92 main_~a~0.offset))), 18359#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 40) (<= main_~a~0.offset 96)) (= main_~arr~0.offset 0) (or (<= 96 main_~a~0.offset) (< 40 main_~length~0))), 18360#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 100 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 100) (<= main_~length~0 40))), 18361#(and (or (<= main_~a~0.offset 104) (<= main_~length~0 40)) (or (<= 104 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 18362#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 108) (<= main_~length~0 40)) (= main_~arr~0.offset 0) (or (<= 108 main_~a~0.offset) (< 40 main_~length~0))), 18363#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 40) (<= main_~a~0.offset 112)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 112 main_~a~0.offset) (< 40 main_~length~0))), 18364#(and (or (<= main_~length~0 40) (<= main_~a~0.offset 116)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 116 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.offset 0)), 18365#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 40) (<= main_~a~0.offset 120)) (= main_~arr~0.offset 0) (or (<= 120 main_~a~0.offset) (< 40 main_~length~0))), 18366#(and (or (<= 124 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 124) (<= main_~length~0 40))), 18367#(and (or (<= 128 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 128) (<= main_~length~0 40))), 18368#(and (or (<= 128 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 128) (<= main_~length~0 40))), 18369#(and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 132) (<= main_~length~0 40)) (or (<= 132 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.offset 0)), 18370#(and (or (<= main_~a~0.offset 136) (<= main_~length~0 40)) (<= 8 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 136 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.offset 0)), 18371#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 12 main_~a~0.offset) (or (<= main_~length~0 40) (<= main_~a~0.offset 140)) (= main_~arr~0.offset 0) (or (<= 140 main_~a~0.offset) (< 40 main_~length~0))), 18372#(and (= main_~arr~0.base main_~a~0.base) (or (<= 144 main_~a~0.offset) (< 40 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 16 main_~a~0.offset) (= main_~arr~0.offset 0) (or (<= main_~length~0 40) (<= main_~a~0.offset 144))), 18373#(and (<= 20 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 148 main_~a~0.offset) (< 40 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 148) (<= main_~length~0 40))), 18374#(and (or (<= main_~a~0.offset 152) (<= main_~length~0 40)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 24 main_~a~0.offset) (= main_~arr~0.offset 0) (or (<= 152 main_~a~0.offset) (< 40 main_~length~0))), 18375#(and (= main_~a~0.base main_~arr~0.base) (= main_~arr~0.offset 0) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (and (<= main_~a~0.offset 156) (< 40 main_~length~0)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (<= 28 main_~a~0.offset)))), 18376#(and (= main_~arr~0.offset 0) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= main_~a~0.offset 156) (< 40 main_~length~0) (<= 28 main_~a~0.offset)))), 18377#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (= main_~arr~0.offset 0) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= main_~a~0.offset 156) (< 40 main_~length~0) (<= 28 main_~a~0.offset)))), 18378#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= main_~a~0.offset 156) (= main_~arr~0.offset 0) (< 40 main_~length~0) (<= 28 main_~a~0.offset)), 18379#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 28 main_~a~0.offset)), 18380#(and (<= 32 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:50:05,557 INFO L134 CoverageAnalysis]: Checked inductivity of 6320 backedges. 0 proven. 6320 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:50:05,557 INFO L442 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-04-11 12:50:05,557 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-04-11 12:50:05,557 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=146, Invalid=2304, Unknown=0, NotChecked=0, Total=2450 [2018-04-11 12:50:05,557 INFO L87 Difference]: Start difference. First operand 340 states and 340 transitions. Second operand 50 states. [2018-04-11 12:50:11,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:50:11,374 INFO L93 Difference]: Finished difference Result 349 states and 349 transitions. [2018-04-11 12:50:11,375 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-04-11 12:50:11,375 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 332 [2018-04-11 12:50:11,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:50:11,376 INFO L225 Difference]: With dead ends: 349 [2018-04-11 12:50:11,376 INFO L226 Difference]: Without dead ends: 349 [2018-04-11 12:50:11,376 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1370 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=435, Invalid=8685, Unknown=0, NotChecked=0, Total=9120 [2018-04-11 12:50:11,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 349 states. [2018-04-11 12:50:11,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 349 to 348. [2018-04-11 12:50:11,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 348 states. [2018-04-11 12:50:11,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 348 states to 348 states and 348 transitions. [2018-04-11 12:50:11,378 INFO L78 Accepts]: Start accepts. Automaton has 348 states and 348 transitions. Word has length 332 [2018-04-11 12:50:11,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:50:11,379 INFO L459 AbstractCegarLoop]: Abstraction has 348 states and 348 transitions. [2018-04-11 12:50:11,379 INFO L460 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-04-11 12:50:11,379 INFO L276 IsEmpty]: Start isEmpty. Operand 348 states and 348 transitions. [2018-04-11 12:50:11,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 341 [2018-04-11 12:50:11,379 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:50:11,380 INFO L355 BasicCegarLoop]: trace histogram [42, 41, 41, 41, 41, 41, 41, 41, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:50:11,380 INFO L408 AbstractCegarLoop]: === Iteration 47 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:50:11,380 INFO L82 PathProgramCache]: Analyzing trace with hash -1027090212, now seen corresponding path program 41 times [2018-04-11 12:50:11,380 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:50:11,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:50:11,466 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:50:14,564 INFO L134 CoverageAnalysis]: Checked inductivity of 6642 backedges. 0 proven. 6642 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:50:14,565 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:50:14,565 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49] total 49 [2018-04-11 12:50:14,565 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:50:14,565 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:50:14,565 INFO L182 omatonBuilderFactory]: Interpolants [19200#(and (or (< 41 main_~length~0) (<= 104 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 41) (<= main_~a~0.offset 104)) (= main_~arr~0.offset 0)), 19201#(and (or (<= main_~length~0 41) (<= main_~a~0.offset 108)) (or (< 41 main_~length~0) (<= 108 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 19202#(and (or (<= main_~length~0 41) (<= main_~a~0.offset 112)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 112 main_~a~0.offset) (< 41 main_~length~0)) (= main_~arr~0.offset 0)), 19203#(and (or (<= main_~length~0 41) (<= main_~a~0.offset 116)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 116 main_~a~0.offset) (< 41 main_~length~0))), 19204#(and (or (<= 120 main_~a~0.offset) (< 41 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 41) (<= main_~a~0.offset 120))), 19205#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 41) (<= main_~a~0.offset 124)) (or (<= 124 main_~a~0.offset) (< 41 main_~length~0))), 19206#(and (= main_~arr~0.base main_~a~0.base) (or (<= 128 main_~a~0.offset) (< 41 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 41) (<= main_~a~0.offset 128))), 19207#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 41) (<= main_~a~0.offset 132)) (= main_~arr~0.offset 0) (or (< 41 main_~length~0) (<= 132 main_~a~0.offset))), 19208#(and (or (<= main_~length~0 41) (<= main_~a~0.offset 136)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 41 main_~length~0) (<= 136 main_~a~0.offset))), 19209#(and (or (<= main_~length~0 41) (<= main_~a~0.offset 140)) (or (< 41 main_~length~0) (<= 140 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 19210#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 41 main_~length~0) (<= 144 main_~a~0.offset)) (or (<= main_~length~0 41) (<= main_~a~0.offset 144))), 19211#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 148 main_~a~0.offset) (< 41 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 41) (<= main_~a~0.offset 148))), 19212#(and (or (<= 152 main_~a~0.offset) (< 41 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 41) (<= main_~a~0.offset 152))), 19213#(and (or (<= 156 main_~a~0.offset) (< 41 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 41) (<= main_~a~0.offset 156)) (= main_~arr~0.offset 0)), 19214#(and (= main_~arr~0.base main_~a~0.base) (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 160) (< 41 main_~length~0))) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 19215#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (= main_~arr~0.base main_~a~0.base) (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 160) (< 41 main_~length~0))) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))), 19216#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (= main_~arr~0.base main_~a~0.base) (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 160) (< 41 main_~length~0))) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (< (+ main_~a~0.offset 3) (+ main_~arr~0.offset (* 4 main_~length~0)))), 19217#(and (<= main_~a~0.offset 160) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 41 main_~length~0) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 19218#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 19219#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base))), 19170#true, 19171#false, 19172#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 19173#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 19174#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 19175#(and (or (<= main_~a~0.offset 4) (<= main_~length~0 41)) (= main_~arr~0.base main_~a~0.base) (or (<= 4 main_~a~0.offset) (< 41 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 19176#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 8 main_~a~0.offset) (< 41 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 41) (<= main_~a~0.offset 8))), 19177#(and (or (< 41 main_~length~0) (<= 12 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 41) (<= main_~a~0.offset 12))), 19178#(and (or (<= 16 main_~a~0.offset) (< 41 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 41) (<= main_~a~0.offset 16))), 19179#(and (= main_~arr~0.base main_~a~0.base) (or (<= 20 main_~a~0.offset) (< 41 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 41) (<= main_~a~0.offset 20)) (= main_~arr~0.offset 0)), 19180#(and (or (< 41 main_~length~0) (<= 24 main_~a~0.offset)) (or (<= main_~length~0 41) (<= main_~a~0.offset 24)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 19181#(and (or (<= main_~length~0 41) (<= main_~a~0.offset 28)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 41 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.offset 0)), 19182#(and (or (<= main_~length~0 41) (<= main_~a~0.offset 32)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 32 main_~a~0.offset) (< 41 main_~length~0)) (= main_~arr~0.offset 0)), 19183#(and (or (<= main_~length~0 41) (<= main_~a~0.offset 36)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 36 main_~a~0.offset) (< 41 main_~length~0)) (= main_~arr~0.offset 0)), 19184#(and (or (<= main_~length~0 41) (<= main_~a~0.offset 40)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 40 main_~a~0.offset) (< 41 main_~length~0)) (= main_~arr~0.offset 0)), 19185#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 44 main_~a~0.offset) (< 41 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 41) (<= main_~a~0.offset 44))), 19186#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 41) (<= main_~a~0.offset 48)) (or (< 41 main_~length~0) (<= 48 main_~a~0.offset))), 19187#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 52 main_~a~0.offset) (< 41 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 41) (<= main_~a~0.offset 52))), 19188#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 41 main_~length~0) (<= 56 main_~a~0.offset)) (or (<= main_~length~0 41) (<= main_~a~0.offset 56)) (= main_~arr~0.offset 0)), 19189#(and (or (<= main_~length~0 41) (<= main_~a~0.offset 60)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 60 main_~a~0.offset) (< 41 main_~length~0)) (= main_~arr~0.offset 0)), 19190#(and (or (<= 64 main_~a~0.offset) (< 41 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 41) (<= main_~a~0.offset 64)) (= main_~arr~0.offset 0)), 19191#(and (or (<= 68 main_~a~0.offset) (< 41 main_~length~0)) (or (<= main_~length~0 41) (<= main_~a~0.offset 68)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 19192#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 41) (<= main_~a~0.offset 72)) (= main_~arr~0.offset 0) (or (<= 72 main_~a~0.offset) (< 41 main_~length~0))), 19193#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 41) (<= main_~a~0.offset 76)) (or (<= 76 main_~a~0.offset) (< 41 main_~length~0))), 19194#(and (or (<= main_~length~0 41) (<= main_~a~0.offset 80)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 41 main_~length~0) (<= 80 main_~a~0.offset))), 19195#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 41 main_~length~0) (<= 84 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~length~0 41) (<= main_~a~0.offset 84))), 19196#(and (or (<= 88 main_~a~0.offset) (< 41 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 41) (<= main_~a~0.offset 88))), 19197#(and (or (< 41 main_~length~0) (<= 92 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 41) (<= main_~a~0.offset 92)) (= main_~arr~0.offset 0)), 19198#(and (or (<= 96 main_~a~0.offset) (< 41 main_~length~0)) (or (<= main_~length~0 41) (<= main_~a~0.offset 96)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 19199#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 41 main_~length~0) (<= 100 main_~a~0.offset)) (or (<= main_~length~0 41) (<= main_~a~0.offset 100)) (= main_~arr~0.offset 0))] [2018-04-11 12:50:14,565 INFO L134 CoverageAnalysis]: Checked inductivity of 6642 backedges. 0 proven. 6642 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:50:14,566 INFO L442 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-04-11 12:50:14,566 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-04-11 12:50:14,566 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=148, Invalid=2302, Unknown=0, NotChecked=0, Total=2450 [2018-04-11 12:50:14,566 INFO L87 Difference]: Start difference. First operand 348 states and 348 transitions. Second operand 50 states. [2018-04-11 12:50:20,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:50:20,478 INFO L93 Difference]: Finished difference Result 357 states and 357 transitions. [2018-04-11 12:50:20,479 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-04-11 12:50:20,479 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 340 [2018-04-11 12:50:20,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:50:20,480 INFO L225 Difference]: With dead ends: 357 [2018-04-11 12:50:20,480 INFO L226 Difference]: Without dead ends: 357 [2018-04-11 12:50:20,480 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1202 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=435, Invalid=8685, Unknown=0, NotChecked=0, Total=9120 [2018-04-11 12:50:20,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2018-04-11 12:50:20,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 356. [2018-04-11 12:50:20,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 356 states. [2018-04-11 12:50:20,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 356 states to 356 states and 356 transitions. [2018-04-11 12:50:20,482 INFO L78 Accepts]: Start accepts. Automaton has 356 states and 356 transitions. Word has length 340 [2018-04-11 12:50:20,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:50:20,483 INFO L459 AbstractCegarLoop]: Abstraction has 356 states and 356 transitions. [2018-04-11 12:50:20,483 INFO L460 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-04-11 12:50:20,483 INFO L276 IsEmpty]: Start isEmpty. Operand 356 states and 356 transitions. [2018-04-11 12:50:20,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 349 [2018-04-11 12:50:20,484 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:50:20,484 INFO L355 BasicCegarLoop]: trace histogram [43, 42, 42, 42, 42, 42, 42, 42, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:50:20,485 INFO L408 AbstractCegarLoop]: === Iteration 48 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:50:20,485 INFO L82 PathProgramCache]: Analyzing trace with hash 1156472587, now seen corresponding path program 42 times [2018-04-11 12:50:20,485 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:50:20,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:50:20,572 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:50:23,806 INFO L134 CoverageAnalysis]: Checked inductivity of 6972 backedges. 0 proven. 6972 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:50:23,806 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:50:23,806 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [51] total 51 [2018-04-11 12:50:23,806 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:50:23,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:50:23,807 INFO L182 omatonBuilderFactory]: Interpolants [20025#true, 20026#false, 20027#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 20028#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 20029#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 20030#(and (or (<= main_~a~0.offset 4) (<= main_~length~0 42)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 4 main_~a~0.offset) (< 42 main_~length~0))), 20031#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 8) (<= main_~length~0 42)) (or (<= 8 main_~a~0.offset) (< 42 main_~length~0)) (= main_~arr~0.offset 0)), 20032#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 42) (<= main_~a~0.offset 12)) (or (<= 12 main_~a~0.offset) (< 42 main_~length~0)) (= main_~arr~0.offset 0)), 20033#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 16 main_~a~0.offset) (< 42 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 42) (<= main_~a~0.offset 16))), 20034#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 20) (<= main_~length~0 42)) (or (<= 20 main_~a~0.offset) (< 42 main_~length~0)) (= main_~arr~0.offset 0)), 20035#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 42) (<= main_~a~0.offset 24)) (= main_~arr~0.offset 0) (or (< 42 main_~length~0) (<= 24 main_~a~0.offset))), 20036#(and (or (<= main_~length~0 42) (<= main_~a~0.offset 28)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 42 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.offset 0)), 20037#(and (or (<= 32 main_~a~0.offset) (< 42 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 42) (<= main_~a~0.offset 32)) (= main_~arr~0.offset 0)), 20038#(and (or (<= main_~length~0 42) (<= main_~a~0.offset 36)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 36 main_~a~0.offset) (< 42 main_~length~0)) (= main_~arr~0.offset 0)), 20039#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 42) (<= main_~a~0.offset 40)) (= main_~arr~0.offset 0) (or (<= 40 main_~a~0.offset) (< 42 main_~length~0))), 20040#(and (or (<= main_~length~0 42) (<= main_~a~0.offset 44)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 44 main_~a~0.offset) (< 42 main_~length~0)) (= main_~arr~0.offset 0)), 20041#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 42) (<= main_~a~0.offset 48)) (= main_~arr~0.offset 0) (or (<= 48 main_~a~0.offset) (< 42 main_~length~0))), 20042#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 42) (<= main_~a~0.offset 52)) (= main_~arr~0.offset 0) (or (<= 52 main_~a~0.offset) (< 42 main_~length~0))), 20043#(and (or (<= main_~length~0 42) (<= main_~a~0.offset 56)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 42 main_~length~0) (<= 56 main_~a~0.offset))), 20044#(and (or (<= 60 main_~a~0.offset) (< 42 main_~length~0)) (or (<= main_~a~0.offset 60) (<= main_~length~0 42)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 20045#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 64 main_~a~0.offset) (< 42 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 42) (<= main_~a~0.offset 64))), 20046#(and (or (<= 68 main_~a~0.offset) (< 42 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 68) (<= main_~length~0 42)) (= main_~arr~0.offset 0)), 20047#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 72 main_~a~0.offset) (< 42 main_~length~0)) (or (<= main_~a~0.offset 72) (<= main_~length~0 42)) (= main_~arr~0.offset 0)), 20048#(and (or (<= main_~length~0 42) (<= main_~a~0.offset 76)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= 76 main_~a~0.offset) (< 42 main_~length~0))), 20049#(and (or (< 42 main_~length~0) (<= 80 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 42) (<= main_~a~0.offset 80))), 20050#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 42) (<= main_~a~0.offset 84)) (= main_~arr~0.offset 0) (or (< 42 main_~length~0) (<= 84 main_~a~0.offset))), 20051#(and (or (<= 88 main_~a~0.offset) (< 42 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 88) (<= main_~length~0 42)) (= main_~arr~0.offset 0)), 20052#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 42 main_~length~0) (<= 92 main_~a~0.offset)) (or (<= main_~length~0 42) (<= main_~a~0.offset 92))), 20053#(and (or (<= main_~length~0 42) (<= main_~a~0.offset 96)) (or (<= 96 main_~a~0.offset) (< 42 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 20054#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 100) (<= main_~length~0 42)) (= main_~arr~0.offset 0) (or (< 42 main_~length~0) (<= 100 main_~a~0.offset))), 20055#(and (or (< 42 main_~length~0) (<= 104 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 104) (<= main_~length~0 42))), 20056#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~a~0.offset 108) (<= main_~length~0 42)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 108 main_~a~0.offset) (< 42 main_~length~0)) (= main_~arr~0.offset 0)), 20057#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 42) (<= main_~a~0.offset 112)) (= main_~arr~0.offset 0) (or (<= 112 main_~a~0.offset) (< 42 main_~length~0))), 20058#(and (or (<= 116 main_~a~0.offset) (< 42 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 42) (<= main_~a~0.offset 116)) (= main_~arr~0.offset 0)), 20059#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 120 main_~a~0.offset) (< 42 main_~length~0)) (= main_~arr~0.offset 0) (or (<= main_~length~0 42) (<= main_~a~0.offset 120))), 20060#(and (or (<= main_~a~0.offset 124) (<= main_~length~0 42)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 124 main_~a~0.offset) (< 42 main_~length~0)) (= main_~arr~0.offset 0)), 20061#(and (or (<= main_~a~0.offset 128) (<= main_~length~0 42)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 128 main_~a~0.offset) (< 42 main_~length~0)) (= main_~arr~0.offset 0)), 20062#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 42 main_~length~0) (<= 132 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 132) (<= main_~length~0 42))), 20063#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 136) (<= main_~length~0 42)) (= main_~arr~0.offset 0) (or (< 42 main_~length~0) (<= 136 main_~a~0.offset))), 20064#(and (or (<= main_~length~0 42) (<= main_~a~0.offset 140)) (or (<= 140 main_~a~0.offset) (< 42 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 20065#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 144 main_~a~0.offset) (< 42 main_~length~0)) (or (<= main_~length~0 42) (<= main_~a~0.offset 144)) (= main_~arr~0.offset 0)), 20066#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 148) (<= main_~length~0 42)) (or (<= 148 main_~a~0.offset) (< 42 main_~length~0)) (= main_~arr~0.offset 0)), 20067#(and (or (<= main_~length~0 42) (<= main_~a~0.offset 152)) (= main_~arr~0.base main_~a~0.base) (or (<= 152 main_~a~0.offset) (< 42 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 20068#(and (or (<= main_~a~0.offset 156) (<= main_~length~0 42)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 156 main_~a~0.offset) (< 42 main_~length~0)) (= main_~arr~0.offset 0)), 20069#(and (or (<= 160 main_~a~0.offset) (< 42 main_~length~0)) (or (<= main_~a~0.offset 160) (<= main_~length~0 42)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 20070#(and (or (<= 160 main_~a~0.offset) (< 42 main_~length~0)) (or (<= main_~a~0.offset 160) (<= main_~length~0 42)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 20071#(and (= main_~a~0.base main_~arr~0.base) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= 4 main_~a~0.offset) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (and (< 42 main_~length~0) (<= main_~a~0.offset 164)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)))))), 20072#(and (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 42 main_~length~0) (= main_~arr~0.offset 0) (<= main_~a~0.offset 164))) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 20073#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 42 main_~length~0) (= main_~arr~0.offset 0) (<= main_~a~0.offset 164)))), 20074#(and (<= 4 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 42 main_~length~0) (= main_~arr~0.offset 0) (<= main_~a~0.offset 164)), 20075#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 4 main_~a~0.offset)), 20076#(and (<= 8 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:50:23,807 INFO L134 CoverageAnalysis]: Checked inductivity of 6972 backedges. 0 proven. 6972 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:50:23,807 INFO L442 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-04-11 12:50:23,807 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-04-11 12:50:23,808 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=152, Invalid=2500, Unknown=0, NotChecked=0, Total=2652 [2018-04-11 12:50:23,808 INFO L87 Difference]: Start difference. First operand 356 states and 356 transitions. Second operand 52 states. [2018-04-11 12:50:29,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:50:29,948 INFO L93 Difference]: Finished difference Result 365 states and 365 transitions. [2018-04-11 12:50:29,948 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2018-04-11 12:50:29,948 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 348 [2018-04-11 12:50:29,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:50:29,949 INFO L225 Difference]: With dead ends: 365 [2018-04-11 12:50:29,949 INFO L226 Difference]: Without dead ends: 365 [2018-04-11 12:50:29,950 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 98 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1473 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=453, Invalid=9447, Unknown=0, NotChecked=0, Total=9900 [2018-04-11 12:50:29,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 365 states. [2018-04-11 12:50:29,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 365 to 364. [2018-04-11 12:50:29,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 364 states. [2018-04-11 12:50:29,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 364 states and 364 transitions. [2018-04-11 12:50:29,952 INFO L78 Accepts]: Start accepts. Automaton has 364 states and 364 transitions. Word has length 348 [2018-04-11 12:50:29,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:50:29,952 INFO L459 AbstractCegarLoop]: Abstraction has 364 states and 364 transitions. [2018-04-11 12:50:29,952 INFO L460 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-04-11 12:50:29,952 INFO L276 IsEmpty]: Start isEmpty. Operand 364 states and 364 transitions. [2018-04-11 12:50:29,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2018-04-11 12:50:29,953 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:50:29,953 INFO L355 BasicCegarLoop]: trace histogram [44, 43, 43, 43, 43, 43, 43, 43, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:50:29,953 INFO L408 AbstractCegarLoop]: === Iteration 49 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:50:29,953 INFO L82 PathProgramCache]: Analyzing trace with hash 1270826554, now seen corresponding path program 43 times [2018-04-11 12:50:29,954 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:50:30,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:50:30,028 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 12:50:33,116 INFO L134 CoverageAnalysis]: Checked inductivity of 7310 backedges. 0 proven. 7310 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:50:33,116 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:50:33,116 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [51] total 51 [2018-04-11 12:50:33,116 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:50:33,116 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:50:33,117 INFO L182 omatonBuilderFactory]: Interpolants [20902#true, 20903#false, 20904#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 20905#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 20906#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 20907#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 4) (<= main_~length~0 43)) (or (< 43 main_~length~0) (<= 4 main_~a~0.offset)) (= main_~arr~0.offset 0)), 20908#(and (or (< 43 main_~length~0) (<= 8 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 43) (<= main_~a~0.offset 8))), 20909#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 43 main_~length~0) (<= 12 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~length~0 43) (<= main_~a~0.offset 12))), 20910#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 43) (<= main_~a~0.offset 16)) (= main_~arr~0.offset 0) (or (< 43 main_~length~0) (<= 16 main_~a~0.offset))), 20911#(and (or (< 43 main_~length~0) (<= 20 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 20) (<= main_~length~0 43)) (= main_~arr~0.offset 0)), 20912#(and (or (<= main_~length~0 43) (<= main_~a~0.offset 24)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 43 main_~length~0) (<= 24 main_~a~0.offset)) (= main_~arr~0.offset 0)), 20913#(and (or (< 43 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 43) (<= main_~a~0.offset 28)) (= main_~arr~0.offset 0)), 20914#(and (or (< 43 main_~length~0) (<= 32 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 43) (<= main_~a~0.offset 32)) (= main_~arr~0.offset 0)), 20915#(and (= main_~arr~0.base main_~a~0.base) (or (<= 36 main_~a~0.offset) (< 43 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 43) (<= main_~a~0.offset 36)) (= main_~arr~0.offset 0)), 20916#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 43 main_~length~0) (<= 40 main_~a~0.offset)) (or (<= main_~length~0 43) (<= main_~a~0.offset 40)) (= main_~arr~0.offset 0)), 20917#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 43) (<= main_~a~0.offset 44)) (or (< 43 main_~length~0) (<= 44 main_~a~0.offset)) (= main_~arr~0.offset 0)), 20918#(and (or (<= main_~length~0 43) (<= main_~a~0.offset 48)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 43 main_~length~0) (<= 48 main_~a~0.offset)) (= main_~arr~0.offset 0)), 20919#(and (= main_~arr~0.base main_~a~0.base) (or (< 43 main_~length~0) (<= 52 main_~a~0.offset)) (or (<= main_~length~0 43) (<= main_~a~0.offset 52)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 20920#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 43) (<= main_~a~0.offset 56)) (or (< 43 main_~length~0) (<= 56 main_~a~0.offset)) (= main_~arr~0.offset 0)), 20921#(and (or (<= main_~a~0.offset 60) (<= main_~length~0 43)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 43 main_~length~0) (<= 60 main_~a~0.offset)) (= main_~arr~0.offset 0)), 20922#(and (or (<= 64 main_~a~0.offset) (< 43 main_~length~0)) (or (<= main_~length~0 43) (<= main_~a~0.offset 64)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 20923#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 43) (<= main_~a~0.offset 68)) (or (< 43 main_~length~0) (<= 68 main_~a~0.offset))), 20924#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 43 main_~length~0) (<= 72 main_~a~0.offset)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 72) (<= main_~length~0 43))), 20925#(and (or (<= main_~length~0 43) (<= main_~a~0.offset 76)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 43 main_~length~0) (<= 76 main_~a~0.offset)) (= main_~arr~0.offset 0)), 20926#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 43) (<= main_~a~0.offset 80)) (or (< 43 main_~length~0) (<= 80 main_~a~0.offset)) (= main_~arr~0.offset 0)), 20927#(and (or (<= main_~length~0 43) (<= main_~a~0.offset 84)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 43 main_~length~0) (<= 84 main_~a~0.offset)) (= main_~arr~0.offset 0)), 20928#(and (or (<= main_~a~0.offset 88) (<= main_~length~0 43)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 43 main_~length~0) (<= 88 main_~a~0.offset))), 20929#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 43 main_~length~0) (<= 92 main_~a~0.offset)) (or (<= main_~length~0 43) (<= main_~a~0.offset 92))), 20930#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 43) (<= main_~a~0.offset 96)) (or (< 43 main_~length~0) (<= 96 main_~a~0.offset)) (= main_~arr~0.offset 0)), 20931#(and (= main_~arr~0.base main_~a~0.base) (or (< 43 main_~length~0) (<= 100 main_~a~0.offset)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 43) (<= main_~a~0.offset 100)) (= main_~arr~0.offset 0)), 20932#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 104) (<= main_~length~0 43)) (or (< 43 main_~length~0) (<= 104 main_~a~0.offset)) (= main_~arr~0.offset 0)), 20933#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 43 main_~length~0) (<= 108 main_~a~0.offset)) (or (<= main_~a~0.offset 108) (<= main_~length~0 43)) (= main_~arr~0.offset 0)), 20934#(and (= main_~arr~0.base main_~a~0.base) (or (<= 112 main_~a~0.offset) (< 43 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 43) (<= main_~a~0.offset 112)) (= main_~arr~0.offset 0)), 20935#(and (or (<= main_~length~0 43) (<= main_~a~0.offset 116)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 43 main_~length~0) (<= 116 main_~a~0.offset))), 20936#(and (or (<= main_~length~0 43) (<= main_~a~0.offset 120)) (or (< 43 main_~length~0) (<= 120 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 20937#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~a~0.offset 124) (<= main_~length~0 43)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 43 main_~length~0) (<= 124 main_~a~0.offset))), 20938#(and (or (< 43 main_~length~0) (<= 128 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 43) (<= main_~a~0.offset 128)) (= main_~arr~0.offset 0)), 20939#(and (or (< 43 main_~length~0) (<= 132 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 132) (<= main_~length~0 43))), 20940#(and (or (< 43 main_~length~0) (<= 136 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 136) (<= main_~length~0 43))), 20941#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 43 main_~length~0) (<= 140 main_~a~0.offset)) (or (<= main_~length~0 43) (<= main_~a~0.offset 140)) (= main_~arr~0.offset 0)), 20942#(and (or (<= main_~length~0 43) (<= main_~a~0.offset 144)) (= main_~arr~0.base main_~a~0.base) (or (< 43 main_~length~0) (<= 144 main_~a~0.offset)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 20943#(and (or (< 43 main_~length~0) (<= 148 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~a~0.offset 148) (<= main_~length~0 43))), 20944#(and (or (<= main_~length~0 43) (<= main_~a~0.offset 152)) (= main_~arr~0.base main_~a~0.base) (or (<= 152 main_~a~0.offset) (< 43 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 20945#(and (or (<= main_~length~0 43) (<= main_~a~0.offset 156)) (= main_~arr~0.base main_~a~0.base) (or (<= 156 main_~a~0.offset) (< 43 main_~length~0)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 20946#(and (or (<= main_~a~0.offset 160) (<= main_~length~0 43)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 43 main_~length~0) (<= 160 main_~a~0.offset))), 20947#(and (or (<= main_~length~0 43) (<= main_~a~0.offset 164)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 43 main_~length~0) (<= 164 main_~a~0.offset)) (= main_~arr~0.offset 0)), 20948#(and (= main_~arr~0.base main_~a~0.base) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (or (and (< 43 main_~length~0) (<= main_~a~0.offset 168)) (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)))) (= main_~arr~0.offset 0)), 20949#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (< 43 main_~length~0) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= main_~a~0.offset 168))) (= main_~arr~0.base main_~a~0.base) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 20950#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (< 43 main_~length~0) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= main_~a~0.offset 168))) (= main_~arr~0.base main_~a~0.base) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0)), 20951#(and (< 43 main_~length~0) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (<= main_~a~0.offset 168) (= main_~arr~0.offset 0)), 20952#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 0 main_~a~0.offset)), 20953#(and (<= 4 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:50:33,117 INFO L134 CoverageAnalysis]: Checked inductivity of 7310 backedges. 0 proven. 7310 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:50:33,117 INFO L442 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-04-11 12:50:33,117 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-04-11 12:50:33,117 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=151, Invalid=2501, Unknown=0, NotChecked=0, Total=2652 [2018-04-11 12:50:33,117 INFO L87 Difference]: Start difference. First operand 364 states and 364 transitions. Second operand 52 states. [2018-04-11 12:50:39,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 12:50:39,452 INFO L93 Difference]: Finished difference Result 373 states and 373 transitions. [2018-04-11 12:50:39,452 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2018-04-11 12:50:39,453 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 356 [2018-04-11 12:50:39,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 12:50:39,453 INFO L225 Difference]: With dead ends: 373 [2018-04-11 12:50:39,454 INFO L226 Difference]: Without dead ends: 373 [2018-04-11 12:50:39,454 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 98 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1427 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=450, Invalid=9450, Unknown=0, NotChecked=0, Total=9900 [2018-04-11 12:50:39,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 373 states. [2018-04-11 12:50:39,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 373 to 372. [2018-04-11 12:50:39,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 372 states. [2018-04-11 12:50:39,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 372 states to 372 states and 372 transitions. [2018-04-11 12:50:39,456 INFO L78 Accepts]: Start accepts. Automaton has 372 states and 372 transitions. Word has length 356 [2018-04-11 12:50:39,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 12:50:39,457 INFO L459 AbstractCegarLoop]: Abstraction has 372 states and 372 transitions. [2018-04-11 12:50:39,457 INFO L460 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-04-11 12:50:39,457 INFO L276 IsEmpty]: Start isEmpty. Operand 372 states and 372 transitions. [2018-04-11 12:50:39,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 365 [2018-04-11 12:50:39,458 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 12:50:39,458 INFO L355 BasicCegarLoop]: trace histogram [45, 44, 44, 44, 44, 44, 44, 44, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 12:50:39,458 INFO L408 AbstractCegarLoop]: === Iteration 50 === [mainErr5RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr9RequiresViolation, mainErr8RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation, mainErr10EnsuresViolationMEMORY_LEAK]=== [2018-04-11 12:50:39,458 INFO L82 PathProgramCache]: Analyzing trace with hash 2068418153, now seen corresponding path program 44 times [2018-04-11 12:50:39,458 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-11 12:50:39,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 12:50:39,542 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. Received shutdown request... [2018-04-11 12:50:42,890 INFO L134 CoverageAnalysis]: Checked inductivity of 7656 backedges. 0 proven. 7656 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:50:42,890 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 12:50:42,890 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [53] total 53 [2018-04-11 12:50:42,891 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-04-11 12:50:42,891 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:50:42,891 INFO L182 omatonBuilderFactory]: Interpolants [21795#true, 21796#false, 21797#(and (= (* 4 main_~length~0) (select |#length| |main_#t~malloc3.base|)) (= 0 |main_#t~malloc3.offset|)), 21798#(and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 21799#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~a~0.offset 0) (= main_~arr~0.offset 0)), 21800#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 4 main_~a~0.offset) (< 44 main_~length~0)) (or (<= main_~a~0.offset 4) (<= main_~length~0 44)) (= main_~arr~0.offset 0)), 21801#(and (or (<= main_~length~0 44) (<= main_~a~0.offset 8)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 8 main_~a~0.offset) (< 44 main_~length~0)) (= main_~arr~0.offset 0)), 21802#(and (or (< 44 main_~length~0) (<= 12 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 44) (<= main_~a~0.offset 12))), 21803#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 44 main_~length~0) (<= 16 main_~a~0.offset)) (or (<= main_~length~0 44) (<= main_~a~0.offset 16)) (= main_~arr~0.offset 0)), 21804#(and (or (<= main_~length~0 44) (<= main_~a~0.offset 20)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 20 main_~a~0.offset) (< 44 main_~length~0)) (= main_~arr~0.offset 0)), 21805#(and (or (<= main_~length~0 44) (<= main_~a~0.offset 24)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 44 main_~length~0) (<= 24 main_~a~0.offset))), 21806#(and (or (<= main_~length~0 44) (<= main_~a~0.offset 28)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 44 main_~length~0) (<= 28 main_~a~0.offset)) (= main_~arr~0.offset 0)), 21807#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 32 main_~a~0.offset) (< 44 main_~length~0)) (or (<= main_~length~0 44) (<= main_~a~0.offset 32)) (= main_~arr~0.offset 0)), 21808#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 44) (<= main_~a~0.offset 36)) (or (<= 36 main_~a~0.offset) (< 44 main_~length~0)) (= main_~arr~0.offset 0)), 21809#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 44) (<= main_~a~0.offset 40)) (= main_~arr~0.offset 0) (or (<= 40 main_~a~0.offset) (< 44 main_~length~0))), 21810#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 44) (<= main_~a~0.offset 44)) (or (<= 44 main_~a~0.offset) (< 44 main_~length~0)) (= main_~arr~0.offset 0)), 21811#(and (or (< 44 main_~length~0) (<= 48 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 44) (<= main_~a~0.offset 48))), 21812#(and (or (<= main_~length~0 44) (<= main_~a~0.offset 52)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 44 main_~length~0) (<= 52 main_~a~0.offset)) (= main_~arr~0.offset 0)), 21813#(and (or (< 44 main_~length~0) (<= 56 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 44) (<= main_~a~0.offset 56)) (= main_~arr~0.offset 0)), 21814#(and (or (<= 60 main_~a~0.offset) (< 44 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 44) (<= main_~a~0.offset 60)) (= main_~arr~0.offset 0)), 21815#(and (or (<= 64 main_~a~0.offset) (< 44 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 44) (<= main_~a~0.offset 64))), 21816#(and (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 44) (<= main_~a~0.offset 68)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 68 main_~a~0.offset) (< 44 main_~length~0)) (= main_~arr~0.offset 0)), 21817#(and (= main_~arr~0.base main_~a~0.base) (or (< 44 main_~length~0) (<= 72 main_~a~0.offset)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 44) (<= main_~a~0.offset 72)) (= main_~arr~0.offset 0)), 21818#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 44) (<= main_~a~0.offset 76)) (or (<= 76 main_~a~0.offset) (< 44 main_~length~0)) (= main_~arr~0.offset 0)), 21819#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 44) (<= main_~a~0.offset 80)) (or (< 44 main_~length~0) (<= 80 main_~a~0.offset)) (= main_~arr~0.offset 0)), 21820#(and (or (<= main_~length~0 44) (<= main_~a~0.offset 84)) (= main_~arr~0.base main_~a~0.base) (or (< 44 main_~length~0) (<= 84 main_~a~0.offset)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 21821#(and (or (<= main_~length~0 44) (<= main_~a~0.offset 88)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 88 main_~a~0.offset) (< 44 main_~length~0)) (= main_~arr~0.offset 0)), 21822#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 44) (<= main_~a~0.offset 92)) (or (< 44 main_~length~0) (<= 92 main_~a~0.offset))), 21823#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 44) (<= main_~a~0.offset 96)) (or (<= 96 main_~a~0.offset) (< 44 main_~length~0)) (= main_~arr~0.offset 0)), 21824#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 44) (<= main_~a~0.offset 100)) (= main_~arr~0.offset 0) (or (< 44 main_~length~0) (<= 100 main_~a~0.offset))), 21825#(and (or (<= main_~length~0 44) (<= main_~a~0.offset 104)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 44 main_~length~0) (<= 104 main_~a~0.offset)) (= main_~arr~0.offset 0)), 21826#(and (or (< 44 main_~length~0) (<= 108 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 108) (<= main_~length~0 44)) (= main_~arr~0.offset 0)), 21827#(and (or (<= 112 main_~a~0.offset) (< 44 main_~length~0)) (or (<= main_~length~0 44) (<= main_~a~0.offset 112)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 21828#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 44) (<= main_~a~0.offset 116)) (or (<= 116 main_~a~0.offset) (< 44 main_~length~0))), 21829#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 120 main_~a~0.offset) (< 44 main_~length~0)) (or (<= main_~length~0 44) (<= main_~a~0.offset 120)) (= main_~arr~0.offset 0)), 21830#(and (or (<= 124 main_~a~0.offset) (< 44 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (or (<= main_~length~0 44) (<= main_~a~0.offset 124)) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 21831#(and (or (<= 128 main_~a~0.offset) (< 44 main_~length~0)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (<= main_~length~0 44) (<= main_~a~0.offset 128))), 21832#(and (or (<= main_~length~0 44) (<= main_~a~0.offset 132)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 44 main_~length~0) (<= 132 main_~a~0.offset)) (= main_~arr~0.offset 0)), 21833#(and (or (<= main_~length~0 44) (<= main_~a~0.offset 136)) (or (< 44 main_~length~0) (<= 136 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 21834#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (< 44 main_~length~0) (<= 140 main_~a~0.offset)) (or (<= main_~length~0 44) (<= main_~a~0.offset 140)) (= main_~arr~0.offset 0)), 21835#(and (or (<= main_~length~0 44) (<= main_~a~0.offset 144)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 44 main_~length~0) (<= 144 main_~a~0.offset))), 21836#(and (or (< 44 main_~length~0) (<= 148 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~a~0.offset 148) (<= main_~length~0 44)) (= main_~arr~0.offset 0)), 21837#(and (or (<= 152 main_~a~0.offset) (< 44 main_~length~0)) (or (<= main_~length~0 44) (<= main_~a~0.offset 152)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0)), 21838#(and (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 156 main_~a~0.offset) (< 44 main_~length~0)) (or (<= main_~length~0 44) (<= main_~a~0.offset 156)) (= main_~arr~0.offset 0)), 21839#(and (or (<= main_~length~0 44) (<= main_~a~0.offset 160)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (= main_~arr~0.offset 0) (or (< 44 main_~length~0) (<= 160 main_~a~0.offset))), 21840#(and (or (<= main_~length~0 44) (<= main_~a~0.offset 160)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (<= 0 main_~a~0.offset) (= main_~arr~0.offset 0) (or (< 44 main_~length~0) (<= 160 main_~a~0.offset))), 21841#(and (<= 4 main_~a~0.offset) (or (< 44 main_~length~0) (<= 164 main_~a~0.offset)) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= main_~length~0 44) (<= main_~a~0.offset 164)) (= main_~arr~0.offset 0)), 21842#(and (<= 8 main_~a~0.offset) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= 168 main_~a~0.offset) (< 44 main_~length~0)) (or (<= main_~length~0 44) (<= main_~a~0.offset 168)) (= main_~arr~0.offset 0)), 21843#(and (= main_~a~0.base main_~arr~0.base) (<= 12 main_~a~0.offset) (or (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (or (<= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)) (and (<= main_~a~0.offset 172) (< 44 main_~length~0))))) (= main_~arr~0.offset 0)), 21844#(and (<= 12 main_~a~0.offset) (= main_~arr~0.offset 0) (or (and (<= main_~a~0.offset 172) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 44 main_~length~0)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset))))), 21845#(and (or (not (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4))) (and (= main_~a~0.base main_~arr~0.base) (= |main_#t~mem5| (select (select |#memory_int| main_~arr~0.base) main_~a~0.offset)) (= |main_#t~mem4| (select (select |#memory_int| main_~a~0.base) main_~a~0.offset)))) (<= 12 main_~a~0.offset) (= main_~arr~0.offset 0) (or (and (<= main_~a~0.offset 172) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 44 main_~length~0)) (= (+ main_~arr~0.offset (* 4 main_~length~0)) (+ main_~a~0.offset 4)))), 21846#(and (<= main_~a~0.offset 172) (= main_~arr~0.base main_~a~0.base) (= (* 4 main_~length~0) (select |#length| main_~arr~0.base)) (< 44 main_~length~0) (<= 12 main_~a~0.offset) (= main_~arr~0.offset 0)), 21847#(and (<= (+ main_~a~0.offset 8) (select |#length| main_~a~0.base)) (<= 12 main_~a~0.offset)), 21848#(and (<= 16 main_~a~0.offset) (<= (+ main_~a~0.offset 4) (select |#length| main_~a~0.base)))] [2018-04-11 12:50:42,891 INFO L134 CoverageAnalysis]: Checked inductivity of 7656 backedges. 0 proven. 7656 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 12:50:42,892 INFO L442 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-04-11 12:50:42,892 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-04-11 12:50:42,892 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=158, Invalid=2704, Unknown=0, NotChecked=0, Total=2862 [2018-04-11 12:50:42,892 INFO L87 Difference]: Start difference. First operand 372 states and 372 transitions. Second operand 54 states. [2018-04-11 12:50:42,892 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-04-11 12:50:42,892 WARN L519 AbstractCegarLoop]: Verification canceled [2018-04-11 12:50:42,896 WARN L197 ceAbstractionStarter]: Timeout [2018-04-11 12:50:42,896 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 11.04 12:50:42 BoogieIcfgContainer [2018-04-11 12:50:42,896 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-04-11 12:50:42,897 INFO L168 Benchmark]: Toolchain (without parser) took 181823.81 ms. Allocated memory was 394.3 MB in the beginning and 2.4 GB in the end (delta: 2.0 GB). Free memory was 327.8 MB in the beginning and 1.3 GB in the end (delta: -964.1 MB). Peak memory consumption was 1.0 GB. Max. memory is 5.3 GB. [2018-04-11 12:50:42,898 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 394.3 MB. Free memory is still 354.3 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-11 12:50:42,898 INFO L168 Benchmark]: CACSL2BoogieTranslator took 224.75 ms. Allocated memory is still 394.3 MB. Free memory was 327.8 MB in the beginning and 304.0 MB in the end (delta: 23.8 MB). Peak memory consumption was 23.8 MB. Max. memory is 5.3 GB. [2018-04-11 12:50:42,898 INFO L168 Benchmark]: Boogie Preprocessor took 40.99 ms. Allocated memory is still 394.3 MB. Free memory was 304.0 MB in the beginning and 301.4 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. [2018-04-11 12:50:42,899 INFO L168 Benchmark]: RCFGBuilder took 375.03 ms. Allocated memory was 394.3 MB in the beginning and 596.1 MB in the end (delta: 201.9 MB). Free memory was 301.4 MB in the beginning and 532.8 MB in the end (delta: -231.5 MB). Peak memory consumption was 23.4 MB. Max. memory is 5.3 GB. [2018-04-11 12:50:42,899 INFO L168 Benchmark]: TraceAbstraction took 181180.49 ms. Allocated memory was 596.1 MB in the beginning and 2.4 GB in the end (delta: 1.8 GB). Free memory was 532.8 MB in the beginning and 1.3 GB in the end (delta: -759.1 MB). Peak memory consumption was 1.0 GB. Max. memory is 5.3 GB. [2018-04-11 12:50:42,900 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 394.3 MB. Free memory is still 354.3 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 224.75 ms. Allocated memory is still 394.3 MB. Free memory was 327.8 MB in the beginning and 304.0 MB in the end (delta: 23.8 MB). Peak memory consumption was 23.8 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 40.99 ms. Allocated memory is still 394.3 MB. Free memory was 304.0 MB in the beginning and 301.4 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. * RCFGBuilder took 375.03 ms. Allocated memory was 394.3 MB in the beginning and 596.1 MB in the end (delta: 201.9 MB). Free memory was 301.4 MB in the beginning and 532.8 MB in the end (delta: -231.5 MB). Peak memory consumption was 23.4 MB. Max. memory is 5.3 GB. * TraceAbstraction took 181180.49 ms. Allocated memory was 596.1 MB in the beginning and 2.4 GB in the end (delta: 1.8 GB). Free memory was 532.8 MB in the beginning and 1.3 GB in the end (delta: -759.1 MB). Peak memory consumption was 1.0 GB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 548]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 548). Cancelled while BasicCegarLoop was constructing difference of abstraction (372states) and interpolant automaton (currently 2 states, 54 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 547]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was constructing difference of abstraction (372states) and interpolant automaton (currently 2 states, 54 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 547]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was constructing difference of abstraction (372states) and interpolant automaton (currently 2 states, 54 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 548]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 548). Cancelled while BasicCegarLoop was constructing difference of abstraction (372states) and interpolant automaton (currently 2 states, 54 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 548]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 548). Cancelled while BasicCegarLoop was constructing difference of abstraction (372states) and interpolant automaton (currently 2 states, 54 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 548]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 548). Cancelled while BasicCegarLoop was constructing difference of abstraction (372states) and interpolant automaton (currently 2 states, 54 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 547]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was constructing difference of abstraction (372states) and interpolant automaton (currently 2 states, 54 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 548]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 548). Cancelled while BasicCegarLoop was constructing difference of abstraction (372states) and interpolant automaton (currently 2 states, 54 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 548]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 548). Cancelled while BasicCegarLoop was constructing difference of abstraction (372states) and interpolant automaton (currently 2 states, 54 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 547]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was constructing difference of abstraction (372states) and interpolant automaton (currently 2 states, 54 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 540]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 540). Cancelled while BasicCegarLoop was constructing difference of abstraction (372states) and interpolant automaton (currently 2 states, 54 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 44 locations, 11 error locations. TIMEOUT Result, 181.1s OverallTime, 50 OverallIterations, 45 TraceHistogramMax, 109.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2389 SDtfs, 16021 SDslu, 59891 SDs, 0 SdLazy, 189847 SolverSat, 2334 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 65.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2669 GetRequests, 99 SyntacticMatches, 44 SemanticMatches, 2526 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24969 ImplicationChecksByTransitivity, 78.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=372occurred in iteration=49, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 2/115502 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 49 MinimizatonAttempts, 51 StatesRemovedByMinimization, 44 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 1.5s SatisfiabilityAnalysisTime, 63.9s InterpolantComputationTime, 8536 NumberOfCodeBlocks, 8536 NumberOfCodeBlocksAsserted, 50 NumberOfCheckSat, 8486 ConstructedInterpolants, 0 QuantifiedInterpolants, 55000619 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 50 InterpolantComputations, 6 PerfectInterpolantSequences, 2/115502 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/add_last-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_Array.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-11_12-50-42-907.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/add_last-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_Array.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-04-11_12-50-42-907.csv Completed graceful shutdown