java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv --cacsl2boogietranslator.bitprecise.bitfields false -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf -i ../../../trunk/examples/svcomp/memsafety/lockfree-3.0_true-valid-memsafety.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-666feb3-m [2018-04-11 15:37:48,943 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-11 15:37:48,944 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-11 15:37:48,957 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-11 15:37:48,958 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-11 15:37:48,958 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-11 15:37:48,959 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-11 15:37:48,961 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-11 15:37:48,963 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-11 15:37:48,963 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-11 15:37:48,964 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-11 15:37:48,964 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-11 15:37:48,965 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-11 15:37:48,966 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-11 15:37:48,967 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-11 15:37:48,968 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-11 15:37:48,970 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-11 15:37:48,971 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-11 15:37:48,972 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-11 15:37:48,973 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-11 15:37:48,974 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-04-11 15:37:48,975 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-04-11 15:37:48,975 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-04-11 15:37:48,976 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-04-11 15:37:48,976 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-04-11 15:37:48,977 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-04-11 15:37:48,978 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-04-11 15:37:48,978 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-04-11 15:37:48,979 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-04-11 15:37:48,979 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-04-11 15:37:48,979 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-04-11 15:37:48,980 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf [2018-04-11 15:37:49,002 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-11 15:37:49,002 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-11 15:37:49,003 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-11 15:37:49,003 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-11 15:37:49,003 INFO L133 SettingsManager]: * Use SBE=true [2018-04-11 15:37:49,004 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-11 15:37:49,004 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-11 15:37:49,004 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-11 15:37:49,004 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-11 15:37:49,004 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-11 15:37:49,004 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-11 15:37:49,004 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-11 15:37:49,005 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-11 15:37:49,005 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-11 15:37:49,005 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-11 15:37:49,005 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-11 15:37:49,005 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-11 15:37:49,005 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-11 15:37:49,005 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-11 15:37:49,006 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-11 15:37:49,006 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-11 15:37:49,006 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-11 15:37:49,006 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-11 15:37:49,006 INFO L133 SettingsManager]: * Trace refinement strategy=SMTINTERPOL Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Bitprecise bitfields -> false [2018-04-11 15:37:49,037 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-11 15:37:49,046 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-11 15:37:49,049 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-11 15:37:49,050 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-11 15:37:49,051 INFO L276 PluginConnector]: CDTParser initialized [2018-04-11 15:37:49,051 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety/lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,370 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG134b762d8 [2018-04-11 15:37:49,508 INFO L287 CDTParser]: IsIndexed: true [2018-04-11 15:37:49,508 INFO L288 CDTParser]: Found 1 translation units. [2018-04-11 15:37:49,509 INFO L168 CDTParser]: Scanning lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,516 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-11 15:37:49,516 INFO L215 ultiparseSymbolTable]: [2018-04-11 15:37:49,516 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-11 15:37:49,516 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_flockfree_____true_valid_memsafety_i__pop ('pop') in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,516 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_flockfree_____true_valid_memsafety_i__push ('push') in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,516 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,517 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-11 15:37:49,517 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____off64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,517 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____qaddr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,517 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____blksize_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,517 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__blksize_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,517 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____caddr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,517 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__fd_set in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,517 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__sigset_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,517 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____rlim64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,517 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__u_quad_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,518 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__garbage in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,518 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____u_char in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,518 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____int32_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,518 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__ulong in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,518 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__mode_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,518 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pc1 in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,518 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_rwlockattr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,518 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__fsblkcnt_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,518 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__clock_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,518 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__daddr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,518 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____u_short in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,519 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____id_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,519 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pc4 in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,519 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__key_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,519 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____dev_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,519 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__u_int32_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,519 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_barrier_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,519 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____u_quad_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,519 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__u_long in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,519 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__size_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,519 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____ino_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,519 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____pid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,520 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____intptr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,520 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_mutexattr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,520 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____mode_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,520 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____gid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,520 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____timer_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,520 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,520 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____sigset_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,520 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__u_int in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,520 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__gid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,520 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____fsid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,520 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__caddr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,520 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____quad_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,521 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__u_short in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,521 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__div_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,521 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____suseconds_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,521 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____u_long in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,521 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_spinlock_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,521 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____rlim_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,521 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____int16_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,521 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____uint32_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,521 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__uid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,521 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_cond_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,521 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____socklen_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,521 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____pthread_list_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,521 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__lldiv_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,521 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__int16_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,521 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__u_int16_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,521 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__blkcnt_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,521 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__u_char in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,522 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__off_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,522 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____clockid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,522 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__quad_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,522 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____sig_atomic_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,522 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_attr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,522 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____uid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,522 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____int64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,522 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_once_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,522 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__wchar_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,522 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____uint64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,522 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__uint in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,522 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__ssize_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,522 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__nlink_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,522 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__loff_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,522 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____fsblkcnt64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,522 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____nlink_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,522 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____daddr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,522 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____clock_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,522 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____blkcnt64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,523 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_condattr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,523 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__int32_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,523 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__suseconds_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,523 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,523 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____ssize_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,523 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__u_int8_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,523 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____fd_mask in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,523 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__fsid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,523 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__timer_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,523 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__clockid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,523 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____loff_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,524 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____int8_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,524 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____off_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,524 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__fd_mask in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,524 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__fsfilcnt_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,524 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____WAIT_STATUS in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,524 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_mutex_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,524 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__ino_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,524 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____uint16_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,524 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__int64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,524 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____fsfilcnt_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,524 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__ushort in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,524 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____ino64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,525 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____time_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,525 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__int8_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,525 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__u_int64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,525 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____key_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,525 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__time_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,525 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__S in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,525 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____uint8_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,525 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__ldiv_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,525 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__register_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,525 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__id_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,525 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____swblk_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,526 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____useconds_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,526 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____fsfilcnt64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,526 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__dev_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,526 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_rwlock_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,526 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____blkcnt_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,526 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_barrierattr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,526 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____u_int in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,526 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____fsblkcnt_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,526 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_key_t in lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:49,540 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG134b762d8 [2018-04-11 15:37:49,543 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-11 15:37:49,544 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-11 15:37:49,544 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-11 15:37:49,545 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-11 15:37:49,548 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-11 15:37:49,549 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 11.04 03:37:49" (1/1) ... [2018-04-11 15:37:49,551 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@403bdb97 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 03:37:49, skipping insertion in model container [2018-04-11 15:37:49,551 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 11.04 03:37:49" (1/1) ... [2018-04-11 15:37:49,563 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-11 15:37:49,587 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-11 15:37:49,732 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-11 15:37:49,771 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-11 15:37:49,776 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 115 non ball SCCs. Number of states in SCCs 115. [2018-04-11 15:37:49,815 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 03:37:49 WrapperNode [2018-04-11 15:37:49,815 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-11 15:37:49,816 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-11 15:37:49,816 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-11 15:37:49,816 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-11 15:37:49,826 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 03:37:49" (1/1) ... [2018-04-11 15:37:49,827 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 03:37:49" (1/1) ... [2018-04-11 15:37:49,838 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 03:37:49" (1/1) ... [2018-04-11 15:37:49,838 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 03:37:49" (1/1) ... [2018-04-11 15:37:49,846 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 03:37:49" (1/1) ... [2018-04-11 15:37:49,851 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 03:37:49" (1/1) ... [2018-04-11 15:37:49,853 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 03:37:49" (1/1) ... [2018-04-11 15:37:49,857 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-11 15:37:49,858 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-11 15:37:49,858 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-11 15:37:49,858 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-11 15:37:49,859 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 03:37:49" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-11 15:37:49,966 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-11 15:37:49,966 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-11 15:37:49,966 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_flockfree_____true_valid_memsafety_i__push [2018-04-11 15:37:49,966 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_flockfree_____true_valid_memsafety_i__pop [2018-04-11 15:37:49,966 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-11 15:37:49,967 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-04-11 15:37:49,967 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-11 15:37:49,967 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-11 15:37:49,967 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-11 15:37:49,967 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-11 15:37:49,967 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-11 15:37:49,967 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-11 15:37:49,967 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-11 15:37:49,967 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-11 15:37:49,967 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-11 15:37:49,967 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-11 15:37:49,967 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-11 15:37:49,967 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-11 15:37:49,967 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-11 15:37:49,967 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-11 15:37:49,968 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-11 15:37:49,968 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-11 15:37:49,968 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-11 15:37:49,968 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-11 15:37:49,968 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-11 15:37:49,968 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-11 15:37:49,968 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-11 15:37:49,968 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-11 15:37:49,968 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-11 15:37:49,968 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-11 15:37:49,968 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-11 15:37:49,968 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-11 15:37:49,968 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-11 15:37:49,968 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-11 15:37:49,968 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-11 15:37:49,968 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-11 15:37:49,968 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-11 15:37:49,969 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-11 15:37:49,969 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-11 15:37:49,969 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-11 15:37:49,969 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-11 15:37:49,969 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-11 15:37:49,969 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-11 15:37:49,969 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-11 15:37:49,969 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-11 15:37:49,969 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-11 15:37:49,969 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-11 15:37:49,969 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-11 15:37:49,969 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-11 15:37:49,970 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-11 15:37:49,970 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-11 15:37:49,970 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-11 15:37:49,970 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-11 15:37:49,970 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-11 15:37:49,970 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-11 15:37:49,970 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-11 15:37:49,970 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-11 15:37:49,970 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-11 15:37:49,970 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-11 15:37:49,970 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-11 15:37:49,970 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-11 15:37:49,970 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-11 15:37:49,970 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-11 15:37:49,970 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-11 15:37:49,970 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-11 15:37:49,970 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-11 15:37:49,970 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-11 15:37:49,970 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-11 15:37:49,971 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-11 15:37:49,971 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-11 15:37:49,971 INFO L128 BoogieDeclarations]: Found specification of procedure __secure_getenv [2018-04-11 15:37:49,971 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-11 15:37:49,971 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-11 15:37:49,971 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-11 15:37:49,971 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-11 15:37:49,971 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-11 15:37:49,971 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-11 15:37:49,971 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-11 15:37:49,971 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-11 15:37:49,971 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-11 15:37:49,971 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-11 15:37:49,971 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-11 15:37:49,971 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-11 15:37:49,971 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-11 15:37:49,972 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-11 15:37:49,972 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-11 15:37:49,972 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-11 15:37:49,972 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-11 15:37:49,972 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-11 15:37:49,972 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-11 15:37:49,972 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-11 15:37:49,972 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-11 15:37:49,972 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-11 15:37:49,972 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-11 15:37:49,973 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-11 15:37:49,973 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-11 15:37:49,973 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-11 15:37:49,973 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-11 15:37:49,973 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-11 15:37:49,973 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-11 15:37:49,973 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-11 15:37:49,973 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-11 15:37:49,973 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-11 15:37:49,973 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-11 15:37:49,974 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-11 15:37:49,974 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-11 15:37:49,974 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-11 15:37:49,974 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-11 15:37:49,974 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_flockfree_____true_valid_memsafety_i__push [2018-04-11 15:37:49,974 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-11 15:37:49,974 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-11 15:37:49,974 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-04-11 15:37:49,975 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_flockfree_____true_valid_memsafety_i__pop [2018-04-11 15:37:49,975 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-04-11 15:37:49,975 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-11 15:37:49,975 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-11 15:37:49,975 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-11 15:37:49,975 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-11 15:37:49,975 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-11 15:37:49,975 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-11 15:37:50,284 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-11 15:37:50,285 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.04 03:37:50 BoogieIcfgContainer [2018-04-11 15:37:50,285 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-11 15:37:50,286 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-11 15:37:50,286 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-11 15:37:50,289 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-11 15:37:50,289 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 11.04 03:37:49" (1/3) ... [2018-04-11 15:37:50,289 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2c517024 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 11.04 03:37:50, skipping insertion in model container [2018-04-11 15:37:50,290 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 03:37:49" (2/3) ... [2018-04-11 15:37:50,290 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2c517024 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 11.04 03:37:50, skipping insertion in model container [2018-04-11 15:37:50,290 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.04 03:37:50" (3/3) ... [2018-04-11 15:37:50,291 INFO L107 eAbstractionObserver]: Analyzing ICFG lockfree-3.0_true-valid-memsafety.i [2018-04-11 15:37:50,297 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-11 15:37:50,302 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 19 error locations. [2018-04-11 15:37:50,326 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-11 15:37:50,326 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-11 15:37:50,326 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-11 15:37:50,326 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-11 15:37:50,326 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-11 15:37:50,326 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-11 15:37:50,327 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-11 15:37:50,327 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-11 15:37:50,327 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-11 15:37:50,327 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-11 15:37:50,336 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states. [2018-04-11 15:37:50,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-04-11 15:37:50,343 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:50,344 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:50,344 INFO L408 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:50,347 INFO L82 PathProgramCache]: Analyzing trace with hash -1827855978, now seen corresponding path program 1 times [2018-04-11 15:37:50,348 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:50,348 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:50,378 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:50,378 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:50,378 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:50,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:50,421 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:50,454 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 15:37:50,456 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 15:37:50,456 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-11 15:37:50,458 INFO L442 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-04-11 15:37:50,468 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-04-11 15:37:50,469 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-04-11 15:37:50,470 INFO L87 Difference]: Start difference. First operand 78 states. Second operand 2 states. [2018-04-11 15:37:50,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:50,491 INFO L93 Difference]: Finished difference Result 78 states and 95 transitions. [2018-04-11 15:37:50,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-04-11 15:37:50,493 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 9 [2018-04-11 15:37:50,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:50,502 INFO L225 Difference]: With dead ends: 78 [2018-04-11 15:37:50,502 INFO L226 Difference]: Without dead ends: 75 [2018-04-11 15:37:50,504 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-04-11 15:37:50,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2018-04-11 15:37:50,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 75. [2018-04-11 15:37:50,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-04-11 15:37:50,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 92 transitions. [2018-04-11 15:37:50,533 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 92 transitions. Word has length 9 [2018-04-11 15:37:50,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:50,534 INFO L459 AbstractCegarLoop]: Abstraction has 75 states and 92 transitions. [2018-04-11 15:37:50,534 INFO L460 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-04-11 15:37:50,534 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 92 transitions. [2018-04-11 15:37:50,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-04-11 15:37:50,534 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:50,534 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:50,534 INFO L408 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:50,535 INFO L82 PathProgramCache]: Analyzing trace with hash 2024262411, now seen corresponding path program 1 times [2018-04-11 15:37:50,535 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:50,535 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:50,536 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:50,536 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:50,536 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:50,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:50,555 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:50,582 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 15:37:50,583 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 15:37:50,583 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-11 15:37:50,584 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-11 15:37:50,584 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-11 15:37:50,584 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-11 15:37:50,585 INFO L87 Difference]: Start difference. First operand 75 states and 92 transitions. Second operand 3 states. [2018-04-11 15:37:50,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:50,598 INFO L93 Difference]: Finished difference Result 76 states and 93 transitions. [2018-04-11 15:37:50,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-11 15:37:50,599 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 12 [2018-04-11 15:37:50,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:50,599 INFO L225 Difference]: With dead ends: 76 [2018-04-11 15:37:50,599 INFO L226 Difference]: Without dead ends: 76 [2018-04-11 15:37:50,600 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-11 15:37:50,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-04-11 15:37:50,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 76. [2018-04-11 15:37:50,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-04-11 15:37:50,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 93 transitions. [2018-04-11 15:37:50,604 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 93 transitions. Word has length 12 [2018-04-11 15:37:50,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:50,604 INFO L459 AbstractCegarLoop]: Abstraction has 76 states and 93 transitions. [2018-04-11 15:37:50,604 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-11 15:37:50,604 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 93 transitions. [2018-04-11 15:37:50,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-04-11 15:37:50,605 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:50,605 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:50,605 INFO L408 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:50,605 INFO L82 PathProgramCache]: Analyzing trace with hash 2026109453, now seen corresponding path program 1 times [2018-04-11 15:37:50,605 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:50,605 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:50,606 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:50,606 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:50,606 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:50,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:50,626 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:50,676 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 15:37:50,676 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 15:37:50,676 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-11 15:37:50,676 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-11 15:37:50,676 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-11 15:37:50,676 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-11 15:37:50,676 INFO L87 Difference]: Start difference. First operand 76 states and 93 transitions. Second operand 3 states. [2018-04-11 15:37:50,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:50,700 INFO L93 Difference]: Finished difference Result 134 states and 169 transitions. [2018-04-11 15:37:50,700 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-11 15:37:50,700 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 12 [2018-04-11 15:37:50,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:50,701 INFO L225 Difference]: With dead ends: 134 [2018-04-11 15:37:50,701 INFO L226 Difference]: Without dead ends: 134 [2018-04-11 15:37:50,701 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-11 15:37:50,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-04-11 15:37:50,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 116. [2018-04-11 15:37:50,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-04-11 15:37:50,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 161 transitions. [2018-04-11 15:37:50,709 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 161 transitions. Word has length 12 [2018-04-11 15:37:50,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:50,709 INFO L459 AbstractCegarLoop]: Abstraction has 116 states and 161 transitions. [2018-04-11 15:37:50,709 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-11 15:37:50,709 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 161 transitions. [2018-04-11 15:37:50,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-04-11 15:37:50,709 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:50,709 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:50,709 INFO L408 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:50,709 INFO L82 PathProgramCache]: Analyzing trace with hash -1615117846, now seen corresponding path program 1 times [2018-04-11 15:37:50,710 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:50,710 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:50,710 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:50,710 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:50,710 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:50,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:50,722 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:50,749 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 15:37:50,749 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 15:37:50,749 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-11 15:37:50,750 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-11 15:37:50,750 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-11 15:37:50,750 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-11 15:37:50,750 INFO L87 Difference]: Start difference. First operand 116 states and 161 transitions. Second operand 3 states. [2018-04-11 15:37:50,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:50,821 INFO L93 Difference]: Finished difference Result 151 states and 209 transitions. [2018-04-11 15:37:50,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-11 15:37:50,821 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2018-04-11 15:37:50,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:50,823 INFO L225 Difference]: With dead ends: 151 [2018-04-11 15:37:50,823 INFO L226 Difference]: Without dead ends: 147 [2018-04-11 15:37:50,823 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-11 15:37:50,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-04-11 15:37:50,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 137. [2018-04-11 15:37:50,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-04-11 15:37:50,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 194 transitions. [2018-04-11 15:37:50,834 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 194 transitions. Word has length 13 [2018-04-11 15:37:50,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:50,835 INFO L459 AbstractCegarLoop]: Abstraction has 137 states and 194 transitions. [2018-04-11 15:37:50,835 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-11 15:37:50,835 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 194 transitions. [2018-04-11 15:37:50,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-04-11 15:37:50,835 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:50,835 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:50,836 INFO L408 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:50,836 INFO L82 PathProgramCache]: Analyzing trace with hash 689129259, now seen corresponding path program 1 times [2018-04-11 15:37:50,836 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:50,836 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:50,836 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:50,837 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:50,837 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:50,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:50,848 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:50,888 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 15:37:50,888 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 15:37:50,888 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-11 15:37:50,888 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-11 15:37:50,888 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-11 15:37:50,889 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-11 15:37:50,889 INFO L87 Difference]: Start difference. First operand 137 states and 194 transitions. Second operand 5 states. [2018-04-11 15:37:50,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:50,926 INFO L93 Difference]: Finished difference Result 259 states and 361 transitions. [2018-04-11 15:37:50,926 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-11 15:37:50,927 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 15 [2018-04-11 15:37:50,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:50,929 INFO L225 Difference]: With dead ends: 259 [2018-04-11 15:37:50,929 INFO L226 Difference]: Without dead ends: 259 [2018-04-11 15:37:50,929 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-11 15:37:50,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 259 states. [2018-04-11 15:37:50,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 259 to 228. [2018-04-11 15:37:50,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228 states. [2018-04-11 15:37:50,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 340 transitions. [2018-04-11 15:37:50,940 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 340 transitions. Word has length 15 [2018-04-11 15:37:50,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:50,940 INFO L459 AbstractCegarLoop]: Abstraction has 228 states and 340 transitions. [2018-04-11 15:37:50,940 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-11 15:37:50,940 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 340 transitions. [2018-04-11 15:37:50,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-04-11 15:37:50,941 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:50,941 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:50,941 INFO L408 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:50,941 INFO L82 PathProgramCache]: Analyzing trace with hash -112108404, now seen corresponding path program 1 times [2018-04-11 15:37:50,941 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:50,941 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:50,942 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:50,942 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:50,942 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:50,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:50,952 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:50,994 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 15:37:50,994 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 15:37:50,994 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-11 15:37:50,994 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-11 15:37:50,995 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-11 15:37:50,995 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-11 15:37:50,995 INFO L87 Difference]: Start difference. First operand 228 states and 340 transitions. Second operand 4 states. [2018-04-11 15:37:51,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:51,108 INFO L93 Difference]: Finished difference Result 392 states and 574 transitions. [2018-04-11 15:37:51,108 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-11 15:37:51,108 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-04-11 15:37:51,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:51,111 INFO L225 Difference]: With dead ends: 392 [2018-04-11 15:37:51,111 INFO L226 Difference]: Without dead ends: 392 [2018-04-11 15:37:51,111 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-11 15:37:51,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 392 states. [2018-04-11 15:37:51,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 360. [2018-04-11 15:37:51,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 360 states. [2018-04-11 15:37:51,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 360 states to 360 states and 550 transitions. [2018-04-11 15:37:51,131 INFO L78 Accepts]: Start accepts. Automaton has 360 states and 550 transitions. Word has length 16 [2018-04-11 15:37:51,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:51,131 INFO L459 AbstractCegarLoop]: Abstraction has 360 states and 550 transitions. [2018-04-11 15:37:51,131 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-11 15:37:51,131 INFO L276 IsEmpty]: Start isEmpty. Operand 360 states and 550 transitions. [2018-04-11 15:37:51,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-04-11 15:37:51,132 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:51,132 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:51,132 INFO L408 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:51,132 INFO L82 PathProgramCache]: Analyzing trace with hash -112108403, now seen corresponding path program 1 times [2018-04-11 15:37:51,132 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:51,132 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:51,133 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:51,133 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:51,133 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:51,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:51,145 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:51,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 15:37:51,172 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 15:37:51,172 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-11 15:37:51,172 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-11 15:37:51,172 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-11 15:37:51,173 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-11 15:37:51,173 INFO L87 Difference]: Start difference. First operand 360 states and 550 transitions. Second operand 4 states. [2018-04-11 15:37:51,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:51,245 INFO L93 Difference]: Finished difference Result 491 states and 721 transitions. [2018-04-11 15:37:51,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-11 15:37:51,246 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-04-11 15:37:51,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:51,249 INFO L225 Difference]: With dead ends: 491 [2018-04-11 15:37:51,249 INFO L226 Difference]: Without dead ends: 491 [2018-04-11 15:37:51,250 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-11 15:37:51,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 491 states. [2018-04-11 15:37:51,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 491 to 462. [2018-04-11 15:37:51,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 462 states. [2018-04-11 15:37:51,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 462 states to 462 states and 698 transitions. [2018-04-11 15:37:51,267 INFO L78 Accepts]: Start accepts. Automaton has 462 states and 698 transitions. Word has length 16 [2018-04-11 15:37:51,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:51,267 INFO L459 AbstractCegarLoop]: Abstraction has 462 states and 698 transitions. [2018-04-11 15:37:51,267 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-11 15:37:51,268 INFO L276 IsEmpty]: Start isEmpty. Operand 462 states and 698 transitions. [2018-04-11 15:37:51,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-04-11 15:37:51,268 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:51,268 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:51,268 INFO L408 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:51,269 INFO L82 PathProgramCache]: Analyzing trace with hash -1784605680, now seen corresponding path program 1 times [2018-04-11 15:37:51,269 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:51,269 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:51,269 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:51,270 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:51,270 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:51,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:51,277 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:51,301 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 15:37:51,301 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 15:37:51,301 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-11 15:37:51,301 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-11 15:37:51,301 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-11 15:37:51,301 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-11 15:37:51,302 INFO L87 Difference]: Start difference. First operand 462 states and 698 transitions. Second operand 5 states. [2018-04-11 15:37:51,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:51,341 INFO L93 Difference]: Finished difference Result 865 states and 1229 transitions. [2018-04-11 15:37:51,342 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-11 15:37:51,342 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-04-11 15:37:51,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:51,345 INFO L225 Difference]: With dead ends: 865 [2018-04-11 15:37:51,345 INFO L226 Difference]: Without dead ends: 865 [2018-04-11 15:37:51,345 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-11 15:37:51,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2018-04-11 15:37:51,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 830. [2018-04-11 15:37:51,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 830 states. [2018-04-11 15:37:51,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 830 states to 830 states and 1198 transitions. [2018-04-11 15:37:51,366 INFO L78 Accepts]: Start accepts. Automaton has 830 states and 1198 transitions. Word has length 16 [2018-04-11 15:37:51,366 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:51,366 INFO L459 AbstractCegarLoop]: Abstraction has 830 states and 1198 transitions. [2018-04-11 15:37:51,366 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-11 15:37:51,366 INFO L276 IsEmpty]: Start isEmpty. Operand 830 states and 1198 transitions. [2018-04-11 15:37:51,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-04-11 15:37:51,367 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:51,367 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:51,367 INFO L408 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:51,368 INFO L82 PathProgramCache]: Analyzing trace with hash -941901214, now seen corresponding path program 1 times [2018-04-11 15:37:51,368 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:51,368 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:51,368 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:51,369 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:51,369 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:51,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:51,378 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:51,409 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 15:37:51,410 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:37:51,410 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:37:51,410 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:51,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:51,454 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:37:51,483 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 15:37:51,484 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:37:51,484 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-04-11 15:37:51,484 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-11 15:37:51,484 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-11 15:37:51,485 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-11 15:37:51,485 INFO L87 Difference]: Start difference. First operand 830 states and 1198 transitions. Second operand 6 states. [2018-04-11 15:37:51,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:51,586 INFO L93 Difference]: Finished difference Result 1293 states and 1813 transitions. [2018-04-11 15:37:51,587 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-11 15:37:51,587 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 26 [2018-04-11 15:37:51,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:51,593 INFO L225 Difference]: With dead ends: 1293 [2018-04-11 15:37:51,593 INFO L226 Difference]: Without dead ends: 1293 [2018-04-11 15:37:51,593 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 27 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-04-11 15:37:51,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1293 states. [2018-04-11 15:37:51,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1293 to 1222. [2018-04-11 15:37:51,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1222 states. [2018-04-11 15:37:51,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1222 states to 1222 states and 1746 transitions. [2018-04-11 15:37:51,640 INFO L78 Accepts]: Start accepts. Automaton has 1222 states and 1746 transitions. Word has length 26 [2018-04-11 15:37:51,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:51,641 INFO L459 AbstractCegarLoop]: Abstraction has 1222 states and 1746 transitions. [2018-04-11 15:37:51,641 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-11 15:37:51,641 INFO L276 IsEmpty]: Start isEmpty. Operand 1222 states and 1746 transitions. [2018-04-11 15:37:51,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-04-11 15:37:51,642 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:51,642 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:51,642 INFO L408 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:51,643 INFO L82 PathProgramCache]: Analyzing trace with hash 1486720405, now seen corresponding path program 1 times [2018-04-11 15:37:51,643 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:51,643 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:51,644 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:51,644 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:51,644 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:51,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:51,655 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:51,755 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 15:37:51,756 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:37:51,756 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:37:51,756 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:51,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:51,779 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:37:51,809 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 15:37:51,810 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-11 15:37:51,810 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [10] total 12 [2018-04-11 15:37:51,810 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-11 15:37:51,810 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-11 15:37:51,811 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=104, Unknown=0, NotChecked=0, Total=132 [2018-04-11 15:37:51,811 INFO L87 Difference]: Start difference. First operand 1222 states and 1746 transitions. Second operand 12 states. [2018-04-11 15:37:53,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:53,002 INFO L93 Difference]: Finished difference Result 5425 states and 8644 transitions. [2018-04-11 15:37:53,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2018-04-11 15:37:53,003 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 27 [2018-04-11 15:37:53,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:53,050 INFO L225 Difference]: With dead ends: 5425 [2018-04-11 15:37:53,050 INFO L226 Difference]: Without dead ends: 5425 [2018-04-11 15:37:53,052 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1230 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=648, Invalid=3012, Unknown=0, NotChecked=0, Total=3660 [2018-04-11 15:37:53,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5425 states. [2018-04-11 15:37:53,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5425 to 4438. [2018-04-11 15:37:53,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4438 states. [2018-04-11 15:37:53,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4438 states to 4438 states and 6636 transitions. [2018-04-11 15:37:53,206 INFO L78 Accepts]: Start accepts. Automaton has 4438 states and 6636 transitions. Word has length 27 [2018-04-11 15:37:53,207 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:53,207 INFO L459 AbstractCegarLoop]: Abstraction has 4438 states and 6636 transitions. [2018-04-11 15:37:53,207 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-11 15:37:53,207 INFO L276 IsEmpty]: Start isEmpty. Operand 4438 states and 6636 transitions. [2018-04-11 15:37:53,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-04-11 15:37:53,208 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:53,208 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:53,208 INFO L408 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:53,208 INFO L82 PathProgramCache]: Analyzing trace with hash 455690443, now seen corresponding path program 1 times [2018-04-11 15:37:53,209 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:53,209 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:53,209 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:53,209 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:53,209 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:53,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:53,220 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:53,255 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 15:37:53,256 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 15:37:53,256 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-11 15:37:53,256 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-11 15:37:53,256 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-11 15:37:53,256 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-04-11 15:37:53,256 INFO L87 Difference]: Start difference. First operand 4438 states and 6636 transitions. Second operand 6 states. [2018-04-11 15:37:53,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:53,365 INFO L93 Difference]: Finished difference Result 1944 states and 2442 transitions. [2018-04-11 15:37:53,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-11 15:37:53,366 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 31 [2018-04-11 15:37:53,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:53,371 INFO L225 Difference]: With dead ends: 1944 [2018-04-11 15:37:53,371 INFO L226 Difference]: Without dead ends: 1512 [2018-04-11 15:37:53,372 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-04-11 15:37:53,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1512 states. [2018-04-11 15:37:53,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1512 to 1449. [2018-04-11 15:37:53,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1449 states. [2018-04-11 15:37:53,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1449 states to 1449 states and 1935 transitions. [2018-04-11 15:37:53,401 INFO L78 Accepts]: Start accepts. Automaton has 1449 states and 1935 transitions. Word has length 31 [2018-04-11 15:37:53,401 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:53,401 INFO L459 AbstractCegarLoop]: Abstraction has 1449 states and 1935 transitions. [2018-04-11 15:37:53,401 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-11 15:37:53,402 INFO L276 IsEmpty]: Start isEmpty. Operand 1449 states and 1935 transitions. [2018-04-11 15:37:53,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-04-11 15:37:53,403 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:53,403 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:53,403 INFO L408 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:53,403 INFO L82 PathProgramCache]: Analyzing trace with hash 973226151, now seen corresponding path program 1 times [2018-04-11 15:37:53,403 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:53,403 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:53,404 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:53,404 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:53,404 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:53,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:53,412 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:53,543 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 7 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 15:37:53,544 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:37:53,544 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:37:53,544 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:53,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:53,569 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:37:53,616 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 15:37:53,616 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-11 15:37:53,616 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2018-04-11 15:37:53,616 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-11 15:37:53,616 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-11 15:37:53,616 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-04-11 15:37:53,616 INFO L87 Difference]: Start difference. First operand 1449 states and 1935 transitions. Second operand 12 states. [2018-04-11 15:37:54,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:54,227 INFO L93 Difference]: Finished difference Result 2630 states and 3487 transitions. [2018-04-11 15:37:54,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-04-11 15:37:54,227 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 31 [2018-04-11 15:37:54,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:54,234 INFO L225 Difference]: With dead ends: 2630 [2018-04-11 15:37:54,234 INFO L226 Difference]: Without dead ends: 2618 [2018-04-11 15:37:54,234 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 142 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=158, Invalid=598, Unknown=0, NotChecked=0, Total=756 [2018-04-11 15:37:54,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2618 states. [2018-04-11 15:37:54,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2618 to 2014. [2018-04-11 15:37:54,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2014 states. [2018-04-11 15:37:54,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2014 states to 2014 states and 2688 transitions. [2018-04-11 15:37:54,265 INFO L78 Accepts]: Start accepts. Automaton has 2014 states and 2688 transitions. Word has length 31 [2018-04-11 15:37:54,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:54,266 INFO L459 AbstractCegarLoop]: Abstraction has 2014 states and 2688 transitions. [2018-04-11 15:37:54,266 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-11 15:37:54,266 INFO L276 IsEmpty]: Start isEmpty. Operand 2014 states and 2688 transitions. [2018-04-11 15:37:54,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-04-11 15:37:54,266 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:54,266 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:54,266 INFO L408 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:54,267 INFO L82 PathProgramCache]: Analyzing trace with hash 506774158, now seen corresponding path program 1 times [2018-04-11 15:37:54,267 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:54,267 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:54,267 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:54,268 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:54,268 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:54,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:54,275 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:54,325 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 17 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 15:37:54,325 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:37:54,325 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:37:54,326 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:54,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:54,353 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:37:54,386 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-04-11 15:37:54,386 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-11 15:37:54,386 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [8] total 10 [2018-04-11 15:37:54,386 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-11 15:37:54,387 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-11 15:37:54,387 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2018-04-11 15:37:54,387 INFO L87 Difference]: Start difference. First operand 2014 states and 2688 transitions. Second operand 10 states. [2018-04-11 15:37:54,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:54,824 INFO L93 Difference]: Finished difference Result 2235 states and 2906 transitions. [2018-04-11 15:37:54,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-04-11 15:37:54,824 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 38 [2018-04-11 15:37:54,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:54,831 INFO L225 Difference]: With dead ends: 2235 [2018-04-11 15:37:54,831 INFO L226 Difference]: Without dead ends: 2235 [2018-04-11 15:37:54,831 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=106, Invalid=314, Unknown=0, NotChecked=0, Total=420 [2018-04-11 15:37:54,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2235 states. [2018-04-11 15:37:54,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2235 to 1962. [2018-04-11 15:37:54,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1962 states. [2018-04-11 15:37:54,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1962 states to 1962 states and 2580 transitions. [2018-04-11 15:37:54,856 INFO L78 Accepts]: Start accepts. Automaton has 1962 states and 2580 transitions. Word has length 38 [2018-04-11 15:37:54,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:54,856 INFO L459 AbstractCegarLoop]: Abstraction has 1962 states and 2580 transitions. [2018-04-11 15:37:54,857 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-11 15:37:54,857 INFO L276 IsEmpty]: Start isEmpty. Operand 1962 states and 2580 transitions. [2018-04-11 15:37:54,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-04-11 15:37:54,857 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:54,857 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:54,857 INFO L408 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:54,857 INFO L82 PathProgramCache]: Analyzing trace with hash -1866673214, now seen corresponding path program 1 times [2018-04-11 15:37:54,857 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:54,858 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:54,858 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:54,858 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:54,858 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:54,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:54,866 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:54,930 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 8 proven. 9 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-04-11 15:37:54,930 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:37:54,930 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:37:54,931 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:54,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:54,958 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:37:55,003 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 15 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 15:37:55,003 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:37:55,003 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 12 [2018-04-11 15:37:55,004 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-11 15:37:55,004 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-11 15:37:55,004 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2018-04-11 15:37:55,004 INFO L87 Difference]: Start difference. First operand 1962 states and 2580 transitions. Second operand 12 states. [2018-04-11 15:37:55,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:55,280 INFO L93 Difference]: Finished difference Result 2737 states and 3758 transitions. [2018-04-11 15:37:55,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-11 15:37:55,280 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 42 [2018-04-11 15:37:55,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:55,287 INFO L225 Difference]: With dead ends: 2737 [2018-04-11 15:37:55,287 INFO L226 Difference]: Without dead ends: 2737 [2018-04-11 15:37:55,287 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 44 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=108, Invalid=312, Unknown=0, NotChecked=0, Total=420 [2018-04-11 15:37:55,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2737 states. [2018-04-11 15:37:55,320 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2737 to 2390. [2018-04-11 15:37:55,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2390 states. [2018-04-11 15:37:55,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2390 states to 2390 states and 3180 transitions. [2018-04-11 15:37:55,326 INFO L78 Accepts]: Start accepts. Automaton has 2390 states and 3180 transitions. Word has length 42 [2018-04-11 15:37:55,326 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:55,326 INFO L459 AbstractCegarLoop]: Abstraction has 2390 states and 3180 transitions. [2018-04-11 15:37:55,326 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-11 15:37:55,326 INFO L276 IsEmpty]: Start isEmpty. Operand 2390 states and 3180 transitions. [2018-04-11 15:37:55,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-04-11 15:37:55,328 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:55,328 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:55,328 INFO L408 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:55,329 INFO L82 PathProgramCache]: Analyzing trace with hash -2091506019, now seen corresponding path program 1 times [2018-04-11 15:37:55,329 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:55,329 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:55,329 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:55,330 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:55,330 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:55,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:55,342 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:55,437 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 18 proven. 5 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-04-11 15:37:55,437 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:37:55,437 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:37:55,438 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:55,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:55,460 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:37:55,498 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 18 proven. 5 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-04-11 15:37:55,499 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:37:55,499 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2018-04-11 15:37:55,499 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-11 15:37:55,499 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-11 15:37:55,500 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-04-11 15:37:55,500 INFO L87 Difference]: Start difference. First operand 2390 states and 3180 transitions. Second operand 9 states. [2018-04-11 15:37:55,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:55,693 INFO L93 Difference]: Finished difference Result 2034 states and 2697 transitions. [2018-04-11 15:37:55,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-11 15:37:55,693 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 43 [2018-04-11 15:37:55,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:55,701 INFO L225 Difference]: With dead ends: 2034 [2018-04-11 15:37:55,701 INFO L226 Difference]: Without dead ends: 2034 [2018-04-11 15:37:55,701 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 46 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=76, Invalid=164, Unknown=0, NotChecked=0, Total=240 [2018-04-11 15:37:55,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2034 states. [2018-04-11 15:37:55,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2034 to 1976. [2018-04-11 15:37:55,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1976 states. [2018-04-11 15:37:55,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1976 states to 1976 states and 2639 transitions. [2018-04-11 15:37:55,737 INFO L78 Accepts]: Start accepts. Automaton has 1976 states and 2639 transitions. Word has length 43 [2018-04-11 15:37:55,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:55,737 INFO L459 AbstractCegarLoop]: Abstraction has 1976 states and 2639 transitions. [2018-04-11 15:37:55,737 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-11 15:37:55,737 INFO L276 IsEmpty]: Start isEmpty. Operand 1976 states and 2639 transitions. [2018-04-11 15:37:55,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-04-11 15:37:55,738 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:55,738 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:55,738 INFO L408 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:55,738 INFO L82 PathProgramCache]: Analyzing trace with hash 844308241, now seen corresponding path program 1 times [2018-04-11 15:37:55,739 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:55,739 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:55,739 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:55,739 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:55,739 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:55,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:55,749 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:55,793 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 32 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-04-11 15:37:55,794 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:37:55,794 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:37:55,794 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:55,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:55,814 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:37:55,858 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 32 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-04-11 15:37:55,859 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:37:55,859 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 11 [2018-04-11 15:37:55,859 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-11 15:37:55,859 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-11 15:37:55,859 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-04-11 15:37:55,859 INFO L87 Difference]: Start difference. First operand 1976 states and 2639 transitions. Second operand 11 states. [2018-04-11 15:37:56,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:56,144 INFO L93 Difference]: Finished difference Result 2533 states and 3483 transitions. [2018-04-11 15:37:56,144 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-11 15:37:56,144 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 54 [2018-04-11 15:37:56,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:56,150 INFO L225 Difference]: With dead ends: 2533 [2018-04-11 15:37:56,150 INFO L226 Difference]: Without dead ends: 2533 [2018-04-11 15:37:56,150 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 57 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2018-04-11 15:37:56,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2533 states. [2018-04-11 15:37:56,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2533 to 2020. [2018-04-11 15:37:56,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2020 states. [2018-04-11 15:37:56,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2020 states to 2020 states and 2705 transitions. [2018-04-11 15:37:56,179 INFO L78 Accepts]: Start accepts. Automaton has 2020 states and 2705 transitions. Word has length 54 [2018-04-11 15:37:56,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:56,179 INFO L459 AbstractCegarLoop]: Abstraction has 2020 states and 2705 transitions. [2018-04-11 15:37:56,179 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-11 15:37:56,179 INFO L276 IsEmpty]: Start isEmpty. Operand 2020 states and 2705 transitions. [2018-04-11 15:37:56,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-04-11 15:37:56,180 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:56,180 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:56,180 INFO L408 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:56,181 INFO L82 PathProgramCache]: Analyzing trace with hash 581915855, now seen corresponding path program 1 times [2018-04-11 15:37:56,181 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:56,181 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:56,181 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:56,181 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:56,181 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:56,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:56,190 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:56,252 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 32 proven. 5 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-04-11 15:37:56,252 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:37:56,252 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:37:56,253 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:56,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:56,279 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:37:56,349 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 37 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-11 15:37:56,349 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:37:56,349 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 15 [2018-04-11 15:37:56,349 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-04-11 15:37:56,350 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-04-11 15:37:56,350 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=171, Unknown=0, NotChecked=0, Total=210 [2018-04-11 15:37:56,350 INFO L87 Difference]: Start difference. First operand 2020 states and 2705 transitions. Second operand 15 states. [2018-04-11 15:37:56,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:56,720 INFO L93 Difference]: Finished difference Result 3223 states and 4474 transitions. [2018-04-11 15:37:56,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-04-11 15:37:56,721 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 54 [2018-04-11 15:37:56,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:56,733 INFO L225 Difference]: With dead ends: 3223 [2018-04-11 15:37:56,733 INFO L226 Difference]: Without dead ends: 3167 [2018-04-11 15:37:56,734 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 222 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=253, Invalid=803, Unknown=0, NotChecked=0, Total=1056 [2018-04-11 15:37:56,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3167 states. [2018-04-11 15:37:56,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3167 to 2648. [2018-04-11 15:37:56,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2648 states. [2018-04-11 15:37:56,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2648 states to 2648 states and 3558 transitions. [2018-04-11 15:37:56,781 INFO L78 Accepts]: Start accepts. Automaton has 2648 states and 3558 transitions. Word has length 54 [2018-04-11 15:37:56,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:56,781 INFO L459 AbstractCegarLoop]: Abstraction has 2648 states and 3558 transitions. [2018-04-11 15:37:56,782 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-04-11 15:37:56,782 INFO L276 IsEmpty]: Start isEmpty. Operand 2648 states and 3558 transitions. [2018-04-11 15:37:56,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-04-11 15:37:56,782 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:56,782 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:56,782 INFO L408 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:56,783 INFO L82 PathProgramCache]: Analyzing trace with hash -1277262141, now seen corresponding path program 1 times [2018-04-11 15:37:56,783 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:56,783 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:56,783 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:56,783 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:56,783 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:56,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:56,791 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:56,913 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 51 proven. 6 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-04-11 15:37:56,913 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:37:56,913 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:37:56,914 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:57,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:57,023 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:37:57,093 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 51 proven. 6 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-04-11 15:37:57,093 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:37:57,094 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 13 [2018-04-11 15:37:57,094 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-04-11 15:37:57,094 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-04-11 15:37:57,094 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2018-04-11 15:37:57,094 INFO L87 Difference]: Start difference. First operand 2648 states and 3558 transitions. Second operand 13 states. [2018-04-11 15:37:57,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:57,472 INFO L93 Difference]: Finished difference Result 2597 states and 3449 transitions. [2018-04-11 15:37:57,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-11 15:37:57,473 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2018-04-11 15:37:57,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:57,486 INFO L225 Difference]: With dead ends: 2597 [2018-04-11 15:37:57,486 INFO L226 Difference]: Without dead ends: 2530 [2018-04-11 15:37:57,486 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 58 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=126, Invalid=336, Unknown=0, NotChecked=0, Total=462 [2018-04-11 15:37:57,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2530 states. [2018-04-11 15:37:57,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2530 to 1793. [2018-04-11 15:37:57,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1793 states. [2018-04-11 15:37:57,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1793 states to 1793 states and 2382 transitions. [2018-04-11 15:37:57,525 INFO L78 Accepts]: Start accepts. Automaton has 1793 states and 2382 transitions. Word has length 57 [2018-04-11 15:37:57,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:57,525 INFO L459 AbstractCegarLoop]: Abstraction has 1793 states and 2382 transitions. [2018-04-11 15:37:57,525 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-04-11 15:37:57,525 INFO L276 IsEmpty]: Start isEmpty. Operand 1793 states and 2382 transitions. [2018-04-11 15:37:57,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-04-11 15:37:57,527 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:57,527 INFO L355 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:57,527 INFO L408 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:57,527 INFO L82 PathProgramCache]: Analyzing trace with hash -1206407780, now seen corresponding path program 1 times [2018-04-11 15:37:57,527 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:57,527 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:57,528 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:57,528 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:57,528 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:57,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:57,548 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:57,629 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 50 proven. 15 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-04-11 15:37:57,629 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:37:57,629 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:37:57,630 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:57,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:57,661 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:37:57,698 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 66 proven. 4 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-04-11 15:37:57,699 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:37:57,699 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 11 [2018-04-11 15:37:57,699 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-11 15:37:57,699 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-11 15:37:57,699 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-04-11 15:37:57,699 INFO L87 Difference]: Start difference. First operand 1793 states and 2382 transitions. Second operand 11 states. [2018-04-11 15:37:57,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:57,920 INFO L93 Difference]: Finished difference Result 2157 states and 2912 transitions. [2018-04-11 15:37:57,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-11 15:37:57,920 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 68 [2018-04-11 15:37:57,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:57,924 INFO L225 Difference]: With dead ends: 2157 [2018-04-11 15:37:57,925 INFO L226 Difference]: Without dead ends: 2157 [2018-04-11 15:37:57,925 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 70 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=92, Invalid=250, Unknown=0, NotChecked=0, Total=342 [2018-04-11 15:37:57,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2157 states. [2018-04-11 15:37:57,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2157 to 2130. [2018-04-11 15:37:57,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2130 states. [2018-04-11 15:37:57,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2130 states to 2130 states and 2887 transitions. [2018-04-11 15:37:57,969 INFO L78 Accepts]: Start accepts. Automaton has 2130 states and 2887 transitions. Word has length 68 [2018-04-11 15:37:57,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:57,969 INFO L459 AbstractCegarLoop]: Abstraction has 2130 states and 2887 transitions. [2018-04-11 15:37:57,969 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-11 15:37:57,969 INFO L276 IsEmpty]: Start isEmpty. Operand 2130 states and 2887 transitions. [2018-04-11 15:37:57,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-04-11 15:37:57,971 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:57,971 INFO L355 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:57,971 INFO L408 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:57,971 INFO L82 PathProgramCache]: Analyzing trace with hash -2000652943, now seen corresponding path program 1 times [2018-04-11 15:37:57,972 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:57,972 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:57,972 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:57,972 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:57,973 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:58,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:58,008 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:58,134 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 51 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-04-11 15:37:58,134 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:37:58,134 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:37:58,135 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:58,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:58,155 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:37:58,242 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 53 proven. 22 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-04-11 15:37:58,243 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:37:58,243 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11] total 18 [2018-04-11 15:37:58,243 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-11 15:37:58,243 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-11 15:37:58,243 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=260, Unknown=0, NotChecked=0, Total=306 [2018-04-11 15:37:58,243 INFO L87 Difference]: Start difference. First operand 2130 states and 2887 transitions. Second operand 18 states. [2018-04-11 15:37:58,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:58,895 INFO L93 Difference]: Finished difference Result 3713 states and 5117 transitions. [2018-04-11 15:37:58,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-11 15:37:58,896 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 70 [2018-04-11 15:37:58,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:58,905 INFO L225 Difference]: With dead ends: 3713 [2018-04-11 15:37:58,905 INFO L226 Difference]: Without dead ends: 3662 [2018-04-11 15:37:58,905 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 73 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 263 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=291, Invalid=1041, Unknown=0, NotChecked=0, Total=1332 [2018-04-11 15:37:58,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3662 states. [2018-04-11 15:37:58,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3662 to 2742. [2018-04-11 15:37:58,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2742 states. [2018-04-11 15:37:58,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2742 states to 2742 states and 3650 transitions. [2018-04-11 15:37:58,969 INFO L78 Accepts]: Start accepts. Automaton has 2742 states and 3650 transitions. Word has length 70 [2018-04-11 15:37:58,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:37:58,969 INFO L459 AbstractCegarLoop]: Abstraction has 2742 states and 3650 transitions. [2018-04-11 15:37:58,969 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-11 15:37:58,969 INFO L276 IsEmpty]: Start isEmpty. Operand 2742 states and 3650 transitions. [2018-04-11 15:37:58,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-04-11 15:37:58,971 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:37:58,971 INFO L355 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:37:58,971 INFO L408 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:37:58,971 INFO L82 PathProgramCache]: Analyzing trace with hash 415832890, now seen corresponding path program 1 times [2018-04-11 15:37:58,971 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:37:58,971 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:37:58,972 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:58,972 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:58,972 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:37:58,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:58,988 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:37:59,151 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 68 proven. 31 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-04-11 15:37:59,151 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:37:59,151 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:37:59,152 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:37:59,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:37:59,171 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:37:59,269 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 78 proven. 6 refuted. 0 times theorem prover too weak. 53 trivial. 0 not checked. [2018-04-11 15:37:59,269 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:37:59,269 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 17 [2018-04-11 15:37:59,270 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-11 15:37:59,270 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-11 15:37:59,270 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-04-11 15:37:59,270 INFO L87 Difference]: Start difference. First operand 2742 states and 3650 transitions. Second operand 17 states. [2018-04-11 15:37:59,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:37:59,973 INFO L93 Difference]: Finished difference Result 3567 states and 4853 transitions. [2018-04-11 15:37:59,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-04-11 15:37:59,973 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 84 [2018-04-11 15:37:59,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:37:59,980 INFO L225 Difference]: With dead ends: 3567 [2018-04-11 15:37:59,981 INFO L226 Difference]: Without dead ends: 3491 [2018-04-11 15:37:59,981 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 85 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 178 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=219, Invalid=837, Unknown=0, NotChecked=0, Total=1056 [2018-04-11 15:37:59,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3491 states. [2018-04-11 15:38:00,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3491 to 2618. [2018-04-11 15:38:00,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2618 states. [2018-04-11 15:38:00,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2618 states to 2618 states and 3446 transitions. [2018-04-11 15:38:00,022 INFO L78 Accepts]: Start accepts. Automaton has 2618 states and 3446 transitions. Word has length 84 [2018-04-11 15:38:00,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:38:00,022 INFO L459 AbstractCegarLoop]: Abstraction has 2618 states and 3446 transitions. [2018-04-11 15:38:00,022 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-11 15:38:00,023 INFO L276 IsEmpty]: Start isEmpty. Operand 2618 states and 3446 transitions. [2018-04-11 15:38:00,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-04-11 15:38:00,024 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:38:00,024 INFO L355 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:38:00,024 INFO L408 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:38:00,024 INFO L82 PathProgramCache]: Analyzing trace with hash -1955592504, now seen corresponding path program 1 times [2018-04-11 15:38:00,024 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:38:00,024 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:38:00,025 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:00,025 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:00,025 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:00,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:00,035 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:38:00,119 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 40 proven. 64 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-04-11 15:38:00,119 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:38:00,119 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:38:00,120 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:00,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:00,137 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:38:00,227 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 107 proven. 6 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2018-04-11 15:38:00,228 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:38:00,228 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 16 [2018-04-11 15:38:00,228 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-11 15:38:00,228 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-11 15:38:00,228 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=210, Unknown=0, NotChecked=0, Total=240 [2018-04-11 15:38:00,228 INFO L87 Difference]: Start difference. First operand 2618 states and 3446 transitions. Second operand 16 states. [2018-04-11 15:38:01,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:38:01,343 INFO L93 Difference]: Finished difference Result 5367 states and 7228 transitions. [2018-04-11 15:38:01,344 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-04-11 15:38:01,344 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 87 [2018-04-11 15:38:01,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:38:01,352 INFO L225 Difference]: With dead ends: 5367 [2018-04-11 15:38:01,352 INFO L226 Difference]: Without dead ends: 5286 [2018-04-11 15:38:01,353 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 107 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 785 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=554, Invalid=2752, Unknown=0, NotChecked=0, Total=3306 [2018-04-11 15:38:01,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5286 states. [2018-04-11 15:38:01,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5286 to 4572. [2018-04-11 15:38:01,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4572 states. [2018-04-11 15:38:01,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4572 states to 4572 states and 6164 transitions. [2018-04-11 15:38:01,415 INFO L78 Accepts]: Start accepts. Automaton has 4572 states and 6164 transitions. Word has length 87 [2018-04-11 15:38:01,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:38:01,415 INFO L459 AbstractCegarLoop]: Abstraction has 4572 states and 6164 transitions. [2018-04-11 15:38:01,415 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-11 15:38:01,415 INFO L276 IsEmpty]: Start isEmpty. Operand 4572 states and 6164 transitions. [2018-04-11 15:38:01,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-04-11 15:38:01,417 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:38:01,417 INFO L355 BasicCegarLoop]: trace histogram [7, 7, 7, 6, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:38:01,417 INFO L408 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:38:01,417 INFO L82 PathProgramCache]: Analyzing trace with hash 1385009110, now seen corresponding path program 1 times [2018-04-11 15:38:01,417 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:38:01,418 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:38:01,418 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:01,418 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:01,418 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:01,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:01,432 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:38:01,558 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 39 proven. 76 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2018-04-11 15:38:01,558 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:38:01,558 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:38:01,559 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:01,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:01,594 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:38:01,661 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 87 proven. 3 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2018-04-11 15:38:01,661 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:38:01,662 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 17 [2018-04-11 15:38:01,662 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-11 15:38:01,662 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-11 15:38:01,662 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=240, Unknown=0, NotChecked=0, Total=272 [2018-04-11 15:38:01,662 INFO L87 Difference]: Start difference. First operand 4572 states and 6164 transitions. Second operand 17 states. [2018-04-11 15:38:03,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:38:03,959 INFO L93 Difference]: Finished difference Result 7850 states and 10621 transitions. [2018-04-11 15:38:03,959 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 77 states. [2018-04-11 15:38:03,959 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 99 [2018-04-11 15:38:03,959 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:38:03,970 INFO L225 Difference]: With dead ends: 7850 [2018-04-11 15:38:03,970 INFO L226 Difference]: Without dead ends: 7444 [2018-04-11 15:38:03,971 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 127 SyntacticMatches, 0 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2620 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1023, Invalid=7167, Unknown=0, NotChecked=0, Total=8190 [2018-04-11 15:38:03,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7444 states. [2018-04-11 15:38:04,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7444 to 6733. [2018-04-11 15:38:04,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6733 states. [2018-04-11 15:38:04,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6733 states to 6733 states and 9253 transitions. [2018-04-11 15:38:04,079 INFO L78 Accepts]: Start accepts. Automaton has 6733 states and 9253 transitions. Word has length 99 [2018-04-11 15:38:04,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:38:04,079 INFO L459 AbstractCegarLoop]: Abstraction has 6733 states and 9253 transitions. [2018-04-11 15:38:04,079 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-11 15:38:04,079 INFO L276 IsEmpty]: Start isEmpty. Operand 6733 states and 9253 transitions. [2018-04-11 15:38:04,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-04-11 15:38:04,081 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:38:04,081 INFO L355 BasicCegarLoop]: trace histogram [8, 8, 8, 7, 5, 5, 5, 5, 5, 4, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:38:04,081 INFO L408 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:38:04,081 INFO L82 PathProgramCache]: Analyzing trace with hash -1781032752, now seen corresponding path program 1 times [2018-04-11 15:38:04,082 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:38:04,082 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:38:04,082 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:04,083 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:04,083 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:04,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:04,100 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:38:04,328 INFO L134 CoverageAnalysis]: Checked inductivity of 212 backedges. 47 proven. 95 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-04-11 15:38:04,328 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:38:04,329 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:38:04,329 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:04,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:04,377 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:38:04,393 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 15:38:04,394 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:04,398 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:04,398 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-11 15:38:04,656 INFO L134 CoverageAnalysis]: Checked inductivity of 212 backedges. 85 proven. 91 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-04-11 15:38:04,657 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:38:04,657 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 13] total 21 [2018-04-11 15:38:04,657 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-04-11 15:38:04,657 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-04-11 15:38:04,657 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=405, Unknown=0, NotChecked=0, Total=462 [2018-04-11 15:38:04,657 INFO L87 Difference]: Start difference. First operand 6733 states and 9253 transitions. Second operand 22 states. [2018-04-11 15:38:06,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:38:06,363 INFO L93 Difference]: Finished difference Result 10477 states and 14418 transitions. [2018-04-11 15:38:06,363 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-04-11 15:38:06,363 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 105 [2018-04-11 15:38:06,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:38:06,379 INFO L225 Difference]: With dead ends: 10477 [2018-04-11 15:38:06,379 INFO L226 Difference]: Without dead ends: 10477 [2018-04-11 15:38:06,379 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 114 SyntacticMatches, 3 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 529 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=467, Invalid=2083, Unknown=0, NotChecked=0, Total=2550 [2018-04-11 15:38:06,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10477 states. [2018-04-11 15:38:06,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10477 to 9797. [2018-04-11 15:38:06,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9797 states. [2018-04-11 15:38:06,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9797 states to 9797 states and 13525 transitions. [2018-04-11 15:38:06,483 INFO L78 Accepts]: Start accepts. Automaton has 9797 states and 13525 transitions. Word has length 105 [2018-04-11 15:38:06,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:38:06,484 INFO L459 AbstractCegarLoop]: Abstraction has 9797 states and 13525 transitions. [2018-04-11 15:38:06,484 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-04-11 15:38:06,484 INFO L276 IsEmpty]: Start isEmpty. Operand 9797 states and 13525 transitions. [2018-04-11 15:38:06,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-04-11 15:38:06,488 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:38:06,489 INFO L355 BasicCegarLoop]: trace histogram [10, 10, 9, 8, 6, 6, 6, 6, 6, 5, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:38:06,489 INFO L408 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:38:06,489 INFO L82 PathProgramCache]: Analyzing trace with hash -1154616472, now seen corresponding path program 1 times [2018-04-11 15:38:06,489 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:38:06,489 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:38:06,490 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:06,490 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:06,490 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:06,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:06,502 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:38:06,541 INFO L134 CoverageAnalysis]: Checked inductivity of 327 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 284 trivial. 0 not checked. [2018-04-11 15:38:06,541 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 15:38:06,541 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-11 15:38:06,541 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-11 15:38:06,541 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-11 15:38:06,541 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-04-11 15:38:06,541 INFO L87 Difference]: Start difference. First operand 9797 states and 13525 transitions. Second operand 6 states. [2018-04-11 15:38:06,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:38:06,667 INFO L93 Difference]: Finished difference Result 14618 states and 20590 transitions. [2018-04-11 15:38:06,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-11 15:38:06,667 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 131 [2018-04-11 15:38:06,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:38:06,704 INFO L225 Difference]: With dead ends: 14618 [2018-04-11 15:38:06,704 INFO L226 Difference]: Without dead ends: 14618 [2018-04-11 15:38:06,705 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2018-04-11 15:38:06,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14618 states. [2018-04-11 15:38:06,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14618 to 14603. [2018-04-11 15:38:06,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14603 states. [2018-04-11 15:38:06,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14603 states to 14603 states and 20577 transitions. [2018-04-11 15:38:06,928 INFO L78 Accepts]: Start accepts. Automaton has 14603 states and 20577 transitions. Word has length 131 [2018-04-11 15:38:06,928 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:38:06,929 INFO L459 AbstractCegarLoop]: Abstraction has 14603 states and 20577 transitions. [2018-04-11 15:38:06,929 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-11 15:38:06,929 INFO L276 IsEmpty]: Start isEmpty. Operand 14603 states and 20577 transitions. [2018-04-11 15:38:06,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-04-11 15:38:06,935 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:38:06,935 INFO L355 BasicCegarLoop]: trace histogram [11, 11, 11, 10, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 4, 4, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:38:06,935 INFO L408 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:38:06,936 INFO L82 PathProgramCache]: Analyzing trace with hash -1162631629, now seen corresponding path program 1 times [2018-04-11 15:38:06,936 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:38:06,936 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:38:06,936 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:06,936 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:06,937 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:06,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:06,954 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:38:07,124 INFO L134 CoverageAnalysis]: Checked inductivity of 408 backedges. 188 proven. 21 refuted. 0 times theorem prover too weak. 199 trivial. 0 not checked. [2018-04-11 15:38:07,124 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:38:07,124 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:38:07,125 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:07,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:07,167 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:38:07,209 INFO L134 CoverageAnalysis]: Checked inductivity of 408 backedges. 210 proven. 4 refuted. 0 times theorem prover too weak. 194 trivial. 0 not checked. [2018-04-11 15:38:07,210 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:38:07,210 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 11 [2018-04-11 15:38:07,210 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-11 15:38:07,211 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-11 15:38:07,211 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-04-11 15:38:07,211 INFO L87 Difference]: Start difference. First operand 14603 states and 20577 transitions. Second operand 11 states. [2018-04-11 15:38:07,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:38:07,502 INFO L93 Difference]: Finished difference Result 15659 states and 21700 transitions. [2018-04-11 15:38:07,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-11 15:38:07,502 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 141 [2018-04-11 15:38:07,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:38:07,539 INFO L225 Difference]: With dead ends: 15659 [2018-04-11 15:38:07,540 INFO L226 Difference]: Without dead ends: 15197 [2018-04-11 15:38:07,540 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 143 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=100, Invalid=280, Unknown=0, NotChecked=0, Total=380 [2018-04-11 15:38:07,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15197 states. [2018-04-11 15:38:07,715 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15197 to 13639. [2018-04-11 15:38:07,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13639 states. [2018-04-11 15:38:07,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13639 states to 13639 states and 18766 transitions. [2018-04-11 15:38:07,736 INFO L78 Accepts]: Start accepts. Automaton has 13639 states and 18766 transitions. Word has length 141 [2018-04-11 15:38:07,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:38:07,736 INFO L459 AbstractCegarLoop]: Abstraction has 13639 states and 18766 transitions. [2018-04-11 15:38:07,736 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-11 15:38:07,736 INFO L276 IsEmpty]: Start isEmpty. Operand 13639 states and 18766 transitions. [2018-04-11 15:38:07,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-04-11 15:38:07,740 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:38:07,740 INFO L355 BasicCegarLoop]: trace histogram [12, 12, 12, 11, 7, 7, 7, 6, 6, 5, 5, 5, 5, 5, 5, 4, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:38:07,740 INFO L408 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:38:07,740 INFO L82 PathProgramCache]: Analyzing trace with hash -231926562, now seen corresponding path program 1 times [2018-04-11 15:38:07,741 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:38:07,741 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:38:07,741 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:07,741 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:07,741 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:07,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:07,761 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:38:07,861 INFO L134 CoverageAnalysis]: Checked inductivity of 498 backedges. 203 proven. 11 refuted. 0 times theorem prover too weak. 284 trivial. 0 not checked. [2018-04-11 15:38:07,861 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:38:07,862 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:38:07,862 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:07,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:07,908 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:38:07,988 INFO L134 CoverageAnalysis]: Checked inductivity of 498 backedges. 225 proven. 10 refuted. 0 times theorem prover too weak. 263 trivial. 0 not checked. [2018-04-11 15:38:07,988 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:38:07,988 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 11] total 14 [2018-04-11 15:38:07,989 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-04-11 15:38:07,989 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-04-11 15:38:07,989 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=147, Unknown=0, NotChecked=0, Total=182 [2018-04-11 15:38:07,989 INFO L87 Difference]: Start difference. First operand 13639 states and 18766 transitions. Second operand 14 states. [2018-04-11 15:38:08,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:38:08,499 INFO L93 Difference]: Finished difference Result 7333 states and 9592 transitions. [2018-04-11 15:38:08,499 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-04-11 15:38:08,499 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 155 [2018-04-11 15:38:08,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:38:08,512 INFO L225 Difference]: With dead ends: 7333 [2018-04-11 15:38:08,512 INFO L226 Difference]: Without dead ends: 5823 [2018-04-11 15:38:08,513 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 190 GetRequests, 157 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 229 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=275, Invalid=847, Unknown=0, NotChecked=0, Total=1122 [2018-04-11 15:38:08,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5823 states. [2018-04-11 15:38:08,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5823 to 4882. [2018-04-11 15:38:08,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4882 states. [2018-04-11 15:38:08,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4882 states to 4882 states and 6301 transitions. [2018-04-11 15:38:08,710 INFO L78 Accepts]: Start accepts. Automaton has 4882 states and 6301 transitions. Word has length 155 [2018-04-11 15:38:08,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:38:08,710 INFO L459 AbstractCegarLoop]: Abstraction has 4882 states and 6301 transitions. [2018-04-11 15:38:08,710 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-04-11 15:38:08,711 INFO L276 IsEmpty]: Start isEmpty. Operand 4882 states and 6301 transitions. [2018-04-11 15:38:08,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2018-04-11 15:38:08,716 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:38:08,717 INFO L355 BasicCegarLoop]: trace histogram [12, 12, 11, 10, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:38:08,717 INFO L408 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:38:08,717 INFO L82 PathProgramCache]: Analyzing trace with hash -1233899590, now seen corresponding path program 1 times [2018-04-11 15:38:08,717 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:38:08,717 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:38:08,718 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:08,718 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:08,718 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:08,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:08,738 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:38:08,831 INFO L134 CoverageAnalysis]: Checked inductivity of 474 backedges. 162 proven. 14 refuted. 0 times theorem prover too weak. 298 trivial. 0 not checked. [2018-04-11 15:38:08,831 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:38:08,831 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:38:08,832 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:08,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:08,889 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:38:08,892 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 15:38:08,892 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:08,893 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:08,893 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-11 15:38:09,126 INFO L134 CoverageAnalysis]: Checked inductivity of 474 backedges. 81 proven. 260 refuted. 0 times theorem prover too weak. 133 trivial. 0 not checked. [2018-04-11 15:38:09,126 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:38:09,126 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 13] total 15 [2018-04-11 15:38:09,126 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-11 15:38:09,127 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-11 15:38:09,127 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=205, Unknown=0, NotChecked=0, Total=240 [2018-04-11 15:38:09,127 INFO L87 Difference]: Start difference. First operand 4882 states and 6301 transitions. Second operand 16 states. [2018-04-11 15:38:10,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:38:10,955 INFO L93 Difference]: Finished difference Result 5932 states and 7616 transitions. [2018-04-11 15:38:10,955 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-04-11 15:38:10,955 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 162 [2018-04-11 15:38:10,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:38:10,963 INFO L225 Difference]: With dead ends: 5932 [2018-04-11 15:38:10,963 INFO L226 Difference]: Without dead ends: 5932 [2018-04-11 15:38:10,964 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 227 GetRequests, 162 SyntacticMatches, 8 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 913 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=631, Invalid=2791, Unknown=0, NotChecked=0, Total=3422 [2018-04-11 15:38:10,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5932 states. [2018-04-11 15:38:11,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5932 to 4884. [2018-04-11 15:38:11,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4884 states. [2018-04-11 15:38:11,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4884 states to 4884 states and 6305 transitions. [2018-04-11 15:38:11,030 INFO L78 Accepts]: Start accepts. Automaton has 4884 states and 6305 transitions. Word has length 162 [2018-04-11 15:38:11,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:38:11,030 INFO L459 AbstractCegarLoop]: Abstraction has 4884 states and 6305 transitions. [2018-04-11 15:38:11,030 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-11 15:38:11,030 INFO L276 IsEmpty]: Start isEmpty. Operand 4884 states and 6305 transitions. [2018-04-11 15:38:11,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2018-04-11 15:38:11,035 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:38:11,035 INFO L355 BasicCegarLoop]: trace histogram [12, 12, 11, 10, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:38:11,035 INFO L408 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:38:11,035 INFO L82 PathProgramCache]: Analyzing trace with hash -1233899589, now seen corresponding path program 1 times [2018-04-11 15:38:11,035 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:38:11,035 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:38:11,036 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:11,036 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:11,036 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:11,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:11,056 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:38:11,309 INFO L134 CoverageAnalysis]: Checked inductivity of 474 backedges. 69 proven. 272 refuted. 0 times theorem prover too weak. 133 trivial. 0 not checked. [2018-04-11 15:38:11,309 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:38:11,309 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:38:11,310 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:11,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:11,368 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:38:11,371 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 15:38:11,371 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:11,374 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:11,374 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-11 15:38:11,924 INFO L134 CoverageAnalysis]: Checked inductivity of 474 backedges. 81 proven. 260 refuted. 0 times theorem prover too weak. 133 trivial. 0 not checked. [2018-04-11 15:38:11,924 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:38:11,925 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14] total 26 [2018-04-11 15:38:11,925 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-04-11 15:38:11,925 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-04-11 15:38:11,926 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=642, Unknown=0, NotChecked=0, Total=702 [2018-04-11 15:38:11,926 INFO L87 Difference]: Start difference. First operand 4884 states and 6305 transitions. Second operand 27 states. [2018-04-11 15:38:15,163 WARN L151 SmtUtils]: Spent 103ms on a formula simplification. DAG size of input: 53 DAG size of output 37 [2018-04-11 15:38:17,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:38:17,424 INFO L93 Difference]: Finished difference Result 10373 states and 13550 transitions. [2018-04-11 15:38:17,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 91 states. [2018-04-11 15:38:17,424 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 162 [2018-04-11 15:38:17,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:38:17,439 INFO L225 Difference]: With dead ends: 10373 [2018-04-11 15:38:17,440 INFO L226 Difference]: Without dead ends: 10373 [2018-04-11 15:38:17,442 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 312 GetRequests, 190 SyntacticMatches, 8 SemanticMatches, 114 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4293 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=2219, Invalid=11121, Unknown=0, NotChecked=0, Total=13340 [2018-04-11 15:38:17,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10373 states. [2018-04-11 15:38:17,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10373 to 6112. [2018-04-11 15:38:17,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6112 states. [2018-04-11 15:38:17,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6112 states to 6112 states and 7891 transitions. [2018-04-11 15:38:17,618 INFO L78 Accepts]: Start accepts. Automaton has 6112 states and 7891 transitions. Word has length 162 [2018-04-11 15:38:17,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:38:17,618 INFO L459 AbstractCegarLoop]: Abstraction has 6112 states and 7891 transitions. [2018-04-11 15:38:17,618 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-04-11 15:38:17,619 INFO L276 IsEmpty]: Start isEmpty. Operand 6112 states and 7891 transitions. [2018-04-11 15:38:17,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2018-04-11 15:38:17,623 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:38:17,623 INFO L355 BasicCegarLoop]: trace histogram [12, 12, 11, 10, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:38:17,623 INFO L408 AbstractCegarLoop]: === Iteration 30 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:38:17,624 INFO L82 PathProgramCache]: Analyzing trace with hash 403816925, now seen corresponding path program 1 times [2018-04-11 15:38:17,624 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:38:17,624 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:38:17,625 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:17,625 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:17,625 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:17,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:17,644 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:38:17,805 INFO L134 CoverageAnalysis]: Checked inductivity of 474 backedges. 69 proven. 272 refuted. 0 times theorem prover too weak. 133 trivial. 0 not checked. [2018-04-11 15:38:17,805 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:38:17,805 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:38:17,805 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:17,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:17,835 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:38:17,949 INFO L134 CoverageAnalysis]: Checked inductivity of 474 backedges. 171 proven. 34 refuted. 0 times theorem prover too weak. 269 trivial. 0 not checked. [2018-04-11 15:38:17,949 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:38:17,949 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 10] total 19 [2018-04-11 15:38:17,950 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-11 15:38:17,950 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-11 15:38:17,950 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=297, Unknown=0, NotChecked=0, Total=342 [2018-04-11 15:38:17,950 INFO L87 Difference]: Start difference. First operand 6112 states and 7891 transitions. Second operand 19 states. [2018-04-11 15:38:21,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:38:21,061 INFO L93 Difference]: Finished difference Result 10514 states and 13429 transitions. [2018-04-11 15:38:21,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2018-04-11 15:38:21,061 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 163 [2018-04-11 15:38:21,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:38:21,074 INFO L225 Difference]: With dead ends: 10514 [2018-04-11 15:38:21,074 INFO L226 Difference]: Without dead ends: 10514 [2018-04-11 15:38:21,077 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 323 GetRequests, 205 SyntacticMatches, 2 SemanticMatches, 116 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4821 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2020, Invalid=11786, Unknown=0, NotChecked=0, Total=13806 [2018-04-11 15:38:21,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10514 states. [2018-04-11 15:38:21,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10514 to 6445. [2018-04-11 15:38:21,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6445 states. [2018-04-11 15:38:21,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6445 states to 6445 states and 8259 transitions. [2018-04-11 15:38:21,145 INFO L78 Accepts]: Start accepts. Automaton has 6445 states and 8259 transitions. Word has length 163 [2018-04-11 15:38:21,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:38:21,146 INFO L459 AbstractCegarLoop]: Abstraction has 6445 states and 8259 transitions. [2018-04-11 15:38:21,146 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-11 15:38:21,146 INFO L276 IsEmpty]: Start isEmpty. Operand 6445 states and 8259 transitions. [2018-04-11 15:38:21,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2018-04-11 15:38:21,151 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:38:21,151 INFO L355 BasicCegarLoop]: trace histogram [12, 12, 11, 10, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:38:21,151 INFO L408 AbstractCegarLoop]: === Iteration 31 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:38:21,151 INFO L82 PathProgramCache]: Analyzing trace with hash 1198835182, now seen corresponding path program 1 times [2018-04-11 15:38:21,151 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:38:21,151 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:38:21,152 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:21,152 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:21,152 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:21,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:21,174 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:38:21,676 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 66 proven. 290 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2018-04-11 15:38:21,676 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:38:21,677 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:38:21,677 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:21,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:21,734 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:38:22,028 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-11 15:38:22,030 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-11 15:38:22,030 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:22,031 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:22,037 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-11 15:38:22,039 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-11 15:38:22,039 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:22,040 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:22,044 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:22,044 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:33, output treesize:25 [2018-04-11 15:38:22,128 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-11 15:38:22,133 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 12 [2018-04-11 15:38:22,133 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-11 15:38:22,136 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 15:38:22,143 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-11 15:38:22,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 12 [2018-04-11 15:38:22,171 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-04-11 15:38:22,174 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 15:38:22,186 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-11 15:38:22,186 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:43, output treesize:18 [2018-04-11 15:38:22,300 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 27 proven. 94 refuted. 0 times theorem prover too weak. 356 trivial. 0 not checked. [2018-04-11 15:38:22,301 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:38:22,301 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 18] total 34 [2018-04-11 15:38:22,301 INFO L442 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-04-11 15:38:22,301 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-04-11 15:38:22,301 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=1039, Unknown=0, NotChecked=0, Total=1122 [2018-04-11 15:38:22,302 INFO L87 Difference]: Start difference. First operand 6445 states and 8259 transitions. Second operand 34 states. [2018-04-11 15:38:25,496 WARN L151 SmtUtils]: Spent 108ms on a formula simplification. DAG size of input: 26 DAG size of output 24 [2018-04-11 15:38:26,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:38:26,525 INFO L93 Difference]: Finished difference Result 11306 states and 14849 transitions. [2018-04-11 15:38:26,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 71 states. [2018-04-11 15:38:26,525 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 170 [2018-04-11 15:38:26,525 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:38:26,542 INFO L225 Difference]: With dead ends: 11306 [2018-04-11 15:38:26,542 INFO L226 Difference]: Without dead ends: 11306 [2018-04-11 15:38:26,543 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 281 GetRequests, 167 SyntacticMatches, 13 SemanticMatches, 101 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3058 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=1455, Invalid=9051, Unknown=0, NotChecked=0, Total=10506 [2018-04-11 15:38:26,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11306 states. [2018-04-11 15:38:26,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11306 to 8099. [2018-04-11 15:38:26,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8099 states. [2018-04-11 15:38:26,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8099 states to 8099 states and 10383 transitions. [2018-04-11 15:38:26,632 INFO L78 Accepts]: Start accepts. Automaton has 8099 states and 10383 transitions. Word has length 170 [2018-04-11 15:38:26,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:38:26,632 INFO L459 AbstractCegarLoop]: Abstraction has 8099 states and 10383 transitions. [2018-04-11 15:38:26,632 INFO L460 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-04-11 15:38:26,632 INFO L276 IsEmpty]: Start isEmpty. Operand 8099 states and 10383 transitions. [2018-04-11 15:38:26,635 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2018-04-11 15:38:26,635 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:38:26,635 INFO L355 BasicCegarLoop]: trace histogram [12, 12, 11, 10, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:38:26,635 INFO L408 AbstractCegarLoop]: === Iteration 32 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:38:26,635 INFO L82 PathProgramCache]: Analyzing trace with hash -1490816471, now seen corresponding path program 1 times [2018-04-11 15:38:26,635 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:38:26,635 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:38:26,636 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:26,636 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:26,636 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:26,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:26,655 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:38:26,664 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-11 15:38:26,664 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:38:26,664 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:38:26,665 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:26,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:26,718 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:38:26,786 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 15:38:26,787 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-11 15:38:26,787 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:26,790 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 15:38:26,790 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-11 15:38:26,821 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 15:38:26,821 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-11 15:38:26,821 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:26,823 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 15:38:26,823 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-11 15:38:26,843 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 15:38:26,844 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-11 15:38:26,844 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:26,846 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 15:38:26,846 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-11 15:38:26,878 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 15:38:26,879 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-11 15:38:26,879 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:26,881 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 15:38:26,881 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-11 15:38:26,900 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 15:38:26,901 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-11 15:38:26,901 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:26,903 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 15:38:26,903 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-11 15:38:26,939 WARN L1033 $PredicateComparison]: unable to prove that (exists ((~__U_MULTI_flockfree_____true_valid_memsafety_i__garbage~0.base Int)) (and (= (select |c_old(#valid)| ~__U_MULTI_flockfree_____true_valid_memsafety_i__garbage~0.base) 0) (= |c_#valid| (store |c_old(#valid)| ~__U_MULTI_flockfree_____true_valid_memsafety_i__garbage~0.base 0)))) is different from true [2018-04-11 15:38:26,973 INFO L134 CoverageAnalysis]: Checked inductivity of 476 backedges. 22 proven. 319 refuted. 0 times theorem prover too weak. 133 trivial. 2 not checked. [2018-04-11 15:38:26,973 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 15:38:26,973 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2018-04-11 15:38:26,974 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-11 15:38:26,974 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-11 15:38:26,974 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=178, Unknown=1, NotChecked=26, Total=240 [2018-04-11 15:38:26,974 INFO L87 Difference]: Start difference. First operand 8099 states and 10383 transitions. Second operand 16 states. [2018-04-11 15:38:28,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:38:28,504 INFO L93 Difference]: Finished difference Result 16597 states and 21372 transitions. [2018-04-11 15:38:28,504 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-04-11 15:38:28,504 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 171 [2018-04-11 15:38:28,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:38:28,527 INFO L225 Difference]: With dead ends: 16597 [2018-04-11 15:38:28,527 INFO L226 Difference]: Without dead ends: 16585 [2018-04-11 15:38:28,527 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 151 SyntacticMatches, 6 SemanticMatches, 45 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 541 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=326, Invalid=1747, Unknown=1, NotChecked=88, Total=2162 [2018-04-11 15:38:28,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16585 states. [2018-04-11 15:38:28,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16585 to 15074. [2018-04-11 15:38:28,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15074 states. [2018-04-11 15:38:28,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15074 states to 15074 states and 19510 transitions. [2018-04-11 15:38:28,675 INFO L78 Accepts]: Start accepts. Automaton has 15074 states and 19510 transitions. Word has length 171 [2018-04-11 15:38:28,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:38:28,676 INFO L459 AbstractCegarLoop]: Abstraction has 15074 states and 19510 transitions. [2018-04-11 15:38:28,676 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-11 15:38:28,676 INFO L276 IsEmpty]: Start isEmpty. Operand 15074 states and 19510 transitions. [2018-04-11 15:38:28,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2018-04-11 15:38:28,681 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:38:28,681 INFO L355 BasicCegarLoop]: trace histogram [13, 13, 13, 12, 8, 8, 8, 7, 7, 6, 5, 5, 5, 5, 5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:38:28,681 INFO L408 AbstractCegarLoop]: === Iteration 33 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:38:28,681 INFO L82 PathProgramCache]: Analyzing trace with hash -706197154, now seen corresponding path program 1 times [2018-04-11 15:38:28,682 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:38:28,682 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:38:28,682 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:28,682 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:28,684 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:28,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:28,717 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:38:28,730 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-11 15:38:28,730 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:38:28,730 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:38:28,730 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:28,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:28,907 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:38:28,953 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-11 15:38:28,955 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-11 15:38:28,955 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:28,957 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:28,965 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-11 15:38:28,967 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-11 15:38:28,967 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:28,968 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:28,974 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:28,975 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:39, output treesize:31 [2018-04-11 15:38:29,182 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-11 15:38:29,183 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-11 15:38:29,183 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:29,184 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:29,188 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-11 15:38:29,189 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-11 15:38:29,189 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:29,190 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:29,191 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:29,191 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:37, output treesize:7 [2018-04-11 15:38:29,364 INFO L134 CoverageAnalysis]: Checked inductivity of 600 backedges. 130 proven. 414 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2018-04-11 15:38:29,364 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 15:38:29,364 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27] total 27 [2018-04-11 15:38:29,365 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-04-11 15:38:29,365 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-04-11 15:38:29,365 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=634, Unknown=0, NotChecked=0, Total=702 [2018-04-11 15:38:29,365 INFO L87 Difference]: Start difference. First operand 15074 states and 19510 transitions. Second operand 27 states. [2018-04-11 15:38:39,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:38:39,464 INFO L93 Difference]: Finished difference Result 48364 states and 62601 transitions. [2018-04-11 15:38:39,464 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 219 states. [2018-04-11 15:38:39,464 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 173 [2018-04-11 15:38:39,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:38:39,543 INFO L225 Difference]: With dead ends: 48364 [2018-04-11 15:38:39,543 INFO L226 Difference]: Without dead ends: 48005 [2018-04-11 15:38:39,547 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 423 GetRequests, 187 SyntacticMatches, 0 SemanticMatches, 236 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23345 ImplicationChecksByTransitivity, 6.0s TimeCoverageRelationStatistics Valid=4924, Invalid=51482, Unknown=0, NotChecked=0, Total=56406 [2018-04-11 15:38:39,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48005 states. [2018-04-11 15:38:39,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48005 to 41420. [2018-04-11 15:38:39,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41420 states. [2018-04-11 15:38:40,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41420 states to 41420 states and 53360 transitions. [2018-04-11 15:38:40,067 INFO L78 Accepts]: Start accepts. Automaton has 41420 states and 53360 transitions. Word has length 173 [2018-04-11 15:38:40,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:38:40,068 INFO L459 AbstractCegarLoop]: Abstraction has 41420 states and 53360 transitions. [2018-04-11 15:38:40,068 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-04-11 15:38:40,068 INFO L276 IsEmpty]: Start isEmpty. Operand 41420 states and 53360 transitions. [2018-04-11 15:38:40,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2018-04-11 15:38:40,085 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:38:40,085 INFO L355 BasicCegarLoop]: trace histogram [13, 13, 13, 12, 8, 8, 8, 7, 7, 6, 5, 5, 5, 5, 5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:38:40,085 INFO L408 AbstractCegarLoop]: === Iteration 34 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:38:40,085 INFO L82 PathProgramCache]: Analyzing trace with hash 2031963369, now seen corresponding path program 1 times [2018-04-11 15:38:40,085 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:38:40,085 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:38:40,086 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:40,087 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:40,087 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:40,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:40,350 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:38:40,529 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 275 proven. 7 refuted. 0 times theorem prover too weak. 319 trivial. 0 not checked. [2018-04-11 15:38:40,529 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:38:40,529 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:38:40,530 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:40,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:40,574 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:38:40,647 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 252 proven. 7 refuted. 0 times theorem prover too weak. 342 trivial. 0 not checked. [2018-04-11 15:38:40,647 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:38:40,648 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 13 [2018-04-11 15:38:40,648 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-04-11 15:38:40,648 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-04-11 15:38:40,648 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2018-04-11 15:38:40,648 INFO L87 Difference]: Start difference. First operand 41420 states and 53360 transitions. Second operand 13 states. [2018-04-11 15:38:41,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:38:41,142 INFO L93 Difference]: Finished difference Result 45348 states and 57931 transitions. [2018-04-11 15:38:41,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-11 15:38:41,143 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 175 [2018-04-11 15:38:41,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:38:41,216 INFO L225 Difference]: With dead ends: 45348 [2018-04-11 15:38:41,216 INFO L226 Difference]: Without dead ends: 44983 [2018-04-11 15:38:41,217 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 198 GetRequests, 175 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=127, Invalid=335, Unknown=0, NotChecked=0, Total=462 [2018-04-11 15:38:41,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44983 states. [2018-04-11 15:38:41,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44983 to 41989. [2018-04-11 15:38:41,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41989 states. [2018-04-11 15:38:41,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41989 states to 41989 states and 53411 transitions. [2018-04-11 15:38:41,601 INFO L78 Accepts]: Start accepts. Automaton has 41989 states and 53411 transitions. Word has length 175 [2018-04-11 15:38:41,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:38:41,601 INFO L459 AbstractCegarLoop]: Abstraction has 41989 states and 53411 transitions. [2018-04-11 15:38:41,601 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-04-11 15:38:41,601 INFO L276 IsEmpty]: Start isEmpty. Operand 41989 states and 53411 transitions. [2018-04-11 15:38:41,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2018-04-11 15:38:41,613 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:38:41,613 INFO L355 BasicCegarLoop]: trace histogram [13, 13, 12, 11, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 4, 4, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:38:41,613 INFO L408 AbstractCegarLoop]: === Iteration 35 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:38:41,614 INFO L82 PathProgramCache]: Analyzing trace with hash 893459287, now seen corresponding path program 2 times [2018-04-11 15:38:41,614 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:38:41,614 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:38:41,614 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:41,614 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:41,614 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:41,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:41,635 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:38:41,718 INFO L134 CoverageAnalysis]: Checked inductivity of 560 backedges. 63 proven. 0 refuted. 0 times theorem prover too weak. 497 trivial. 0 not checked. [2018-04-11 15:38:41,719 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 15:38:41,719 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-11 15:38:41,719 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-11 15:38:41,719 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-11 15:38:41,719 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-04-11 15:38:41,719 INFO L87 Difference]: Start difference. First operand 41989 states and 53411 transitions. Second operand 5 states. [2018-04-11 15:38:41,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:38:41,830 INFO L93 Difference]: Finished difference Result 34303 states and 43282 transitions. [2018-04-11 15:38:41,831 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-11 15:38:41,831 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 181 [2018-04-11 15:38:41,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:38:41,895 INFO L225 Difference]: With dead ends: 34303 [2018-04-11 15:38:41,896 INFO L226 Difference]: Without dead ends: 34295 [2018-04-11 15:38:41,896 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-04-11 15:38:41,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34295 states. [2018-04-11 15:38:42,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34295 to 34150. [2018-04-11 15:38:42,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34150 states. [2018-04-11 15:38:42,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34150 states to 34150 states and 43108 transitions. [2018-04-11 15:38:42,239 INFO L78 Accepts]: Start accepts. Automaton has 34150 states and 43108 transitions. Word has length 181 [2018-04-11 15:38:42,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:38:42,240 INFO L459 AbstractCegarLoop]: Abstraction has 34150 states and 43108 transitions. [2018-04-11 15:38:42,240 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-11 15:38:42,240 INFO L276 IsEmpty]: Start isEmpty. Operand 34150 states and 43108 transitions. [2018-04-11 15:38:42,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2018-04-11 15:38:42,249 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:38:42,249 INFO L355 BasicCegarLoop]: trace histogram [14, 14, 13, 12, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 5, 5, 4, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:38:42,249 INFO L408 AbstractCegarLoop]: === Iteration 36 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:38:42,249 INFO L82 PathProgramCache]: Analyzing trace with hash 1226987177, now seen corresponding path program 1 times [2018-04-11 15:38:42,249 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:38:42,249 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:38:42,250 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:42,250 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-11 15:38:42,250 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:42,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:42,269 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:38:42,444 INFO L134 CoverageAnalysis]: Checked inductivity of 659 backedges. 331 proven. 64 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-04-11 15:38:42,445 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:38:42,445 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:38:42,445 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:42,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:42,495 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:38:42,925 INFO L134 CoverageAnalysis]: Checked inductivity of 659 backedges. 370 proven. 16 refuted. 0 times theorem prover too weak. 273 trivial. 0 not checked. [2018-04-11 15:38:42,925 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:38:42,925 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8] total 16 [2018-04-11 15:38:42,926 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-11 15:38:42,926 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-11 15:38:42,926 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2018-04-11 15:38:42,926 INFO L87 Difference]: Start difference. First operand 34150 states and 43108 transitions. Second operand 16 states. [2018-04-11 15:38:45,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:38:45,181 INFO L93 Difference]: Finished difference Result 54691 states and 69101 transitions. [2018-04-11 15:38:45,181 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 115 states. [2018-04-11 15:38:45,181 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 193 [2018-04-11 15:38:45,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:38:45,281 INFO L225 Difference]: With dead ends: 54691 [2018-04-11 15:38:45,281 INFO L226 Difference]: Without dead ends: 54376 [2018-04-11 15:38:45,283 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 364 GetRequests, 242 SyntacticMatches, 2 SemanticMatches, 120 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5868 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=1657, Invalid=13105, Unknown=0, NotChecked=0, Total=14762 [2018-04-11 15:38:45,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54376 states. [2018-04-11 15:38:45,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54376 to 51244. [2018-04-11 15:38:45,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51244 states. [2018-04-11 15:38:45,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51244 states to 51244 states and 64745 transitions. [2018-04-11 15:38:45,869 INFO L78 Accepts]: Start accepts. Automaton has 51244 states and 64745 transitions. Word has length 193 [2018-04-11 15:38:45,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:38:45,869 INFO L459 AbstractCegarLoop]: Abstraction has 51244 states and 64745 transitions. [2018-04-11 15:38:45,869 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-11 15:38:45,870 INFO L276 IsEmpty]: Start isEmpty. Operand 51244 states and 64745 transitions. [2018-04-11 15:38:45,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2018-04-11 15:38:45,881 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:38:45,881 INFO L355 BasicCegarLoop]: trace histogram [14, 14, 13, 11, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 5, 5, 4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:38:45,881 INFO L408 AbstractCegarLoop]: === Iteration 37 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:38:45,882 INFO L82 PathProgramCache]: Analyzing trace with hash 832620391, now seen corresponding path program 2 times [2018-04-11 15:38:45,882 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:38:45,882 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:38:45,882 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:45,882 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:45,882 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:45,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:45,897 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:38:45,904 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-11 15:38:45,905 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:38:45,905 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:38:45,905 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-11 15:38:45,958 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-11 15:38:45,958 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-11 15:38:45,966 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:38:46,023 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 15:38:46,024 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-11 15:38:46,024 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:46,027 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 15:38:46,027 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-11 15:38:46,067 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 15:38:46,067 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-11 15:38:46,067 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:46,069 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 15:38:46,070 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-11 15:38:46,092 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 15:38:46,092 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-11 15:38:46,093 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:46,095 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 15:38:46,095 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-11 15:38:46,117 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 15:38:46,117 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-11 15:38:46,117 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:46,119 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 15:38:46,120 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-11 15:38:46,141 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 15:38:46,141 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-11 15:38:46,142 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:46,144 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 15:38:46,145 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-11 15:38:46,179 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 15:38:46,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-11 15:38:46,179 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:46,181 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 15:38:46,181 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-11 15:38:46,204 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 15:38:46,204 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-11 15:38:46,205 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:46,206 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 15:38:46,206 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-11 15:38:46,230 WARN L1033 $PredicateComparison]: unable to prove that (exists ((~__U_MULTI_flockfree_____true_valid_memsafety_i__garbage~0.base Int)) (and (= (select |c_old(#valid)| ~__U_MULTI_flockfree_____true_valid_memsafety_i__garbage~0.base) 0) (= |c_#valid| (store |c_old(#valid)| ~__U_MULTI_flockfree_____true_valid_memsafety_i__garbage~0.base 0)))) is different from true [2018-04-11 15:38:46,671 INFO L134 CoverageAnalysis]: Checked inductivity of 659 backedges. 22 proven. 484 refuted. 0 times theorem prover too weak. 151 trivial. 2 not checked. [2018-04-11 15:38:46,671 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 15:38:46,671 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16] total 16 [2018-04-11 15:38:46,672 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-11 15:38:46,672 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-11 15:38:46,672 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=206, Unknown=1, NotChecked=28, Total=272 [2018-04-11 15:38:46,672 INFO L87 Difference]: Start difference. First operand 51244 states and 64745 transitions. Second operand 17 states. [2018-04-11 15:38:48,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:38:48,455 INFO L93 Difference]: Finished difference Result 57236 states and 72701 transitions. [2018-04-11 15:38:48,456 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-04-11 15:38:48,456 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 193 [2018-04-11 15:38:48,456 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:38:48,550 INFO L225 Difference]: With dead ends: 57236 [2018-04-11 15:38:48,550 INFO L226 Difference]: Without dead ends: 57224 [2018-04-11 15:38:48,550 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 228 GetRequests, 169 SyntacticMatches, 9 SemanticMatches, 50 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 702 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=383, Invalid=2170, Unknown=1, NotChecked=98, Total=2652 [2018-04-11 15:38:48,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57224 states. [2018-04-11 15:38:48,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57224 to 51507. [2018-04-11 15:38:48,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51507 states. [2018-04-11 15:38:49,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51507 states to 51507 states and 65549 transitions. [2018-04-11 15:38:49,080 INFO L78 Accepts]: Start accepts. Automaton has 51507 states and 65549 transitions. Word has length 193 [2018-04-11 15:38:49,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:38:49,080 INFO L459 AbstractCegarLoop]: Abstraction has 51507 states and 65549 transitions. [2018-04-11 15:38:49,080 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-11 15:38:49,080 INFO L276 IsEmpty]: Start isEmpty. Operand 51507 states and 65549 transitions. [2018-04-11 15:38:49,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 212 [2018-04-11 15:38:49,096 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:38:49,096 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 16, 15, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 6, 5, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:38:49,096 INFO L408 AbstractCegarLoop]: === Iteration 38 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:38:49,096 INFO L82 PathProgramCache]: Analyzing trace with hash 1408273221, now seen corresponding path program 2 times [2018-04-11 15:38:49,096 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:38:49,096 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:38:49,096 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:49,096 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-11 15:38:49,097 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:49,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:49,113 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:38:49,205 INFO L134 CoverageAnalysis]: Checked inductivity of 926 backedges. 404 proven. 25 refuted. 0 times theorem prover too weak. 497 trivial. 0 not checked. [2018-04-11 15:38:49,205 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:38:49,205 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:38:49,206 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-11 15:38:49,251 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-11 15:38:49,252 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-11 15:38:49,260 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:38:49,312 INFO L134 CoverageAnalysis]: Checked inductivity of 926 backedges. 448 proven. 4 refuted. 0 times theorem prover too weak. 474 trivial. 0 not checked. [2018-04-11 15:38:49,312 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:38:49,312 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 11 [2018-04-11 15:38:49,313 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-11 15:38:49,313 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-11 15:38:49,313 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-04-11 15:38:49,314 INFO L87 Difference]: Start difference. First operand 51507 states and 65549 transitions. Second operand 11 states. [2018-04-11 15:38:49,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:38:49,660 INFO L93 Difference]: Finished difference Result 39094 states and 48712 transitions. [2018-04-11 15:38:49,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-04-11 15:38:49,661 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 211 [2018-04-11 15:38:49,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:38:49,728 INFO L225 Difference]: With dead ends: 39094 [2018-04-11 15:38:49,729 INFO L226 Difference]: Without dead ends: 38394 [2018-04-11 15:38:49,729 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 237 GetRequests, 214 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=139, Invalid=367, Unknown=0, NotChecked=0, Total=506 [2018-04-11 15:38:49,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38394 states. [2018-04-11 15:38:50,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38394 to 37430. [2018-04-11 15:38:50,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37430 states. [2018-04-11 15:38:50,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37430 states to 37430 states and 46643 transitions. [2018-04-11 15:38:50,282 INFO L78 Accepts]: Start accepts. Automaton has 37430 states and 46643 transitions. Word has length 211 [2018-04-11 15:38:50,282 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:38:50,282 INFO L459 AbstractCegarLoop]: Abstraction has 37430 states and 46643 transitions. [2018-04-11 15:38:50,282 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-11 15:38:50,282 INFO L276 IsEmpty]: Start isEmpty. Operand 37430 states and 46643 transitions. [2018-04-11 15:38:50,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2018-04-11 15:38:50,294 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:38:50,295 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 15, 14, 9, 9, 9, 9, 9, 7, 6, 6, 6, 6, 6, 5, 5, 4, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:38:50,295 INFO L408 AbstractCegarLoop]: === Iteration 39 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:38:50,295 INFO L82 PathProgramCache]: Analyzing trace with hash 1857957655, now seen corresponding path program 2 times [2018-04-11 15:38:50,295 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:38:50,295 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:38:50,296 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:50,296 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-11 15:38:50,296 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:50,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:50,311 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:38:50,410 INFO L134 CoverageAnalysis]: Checked inductivity of 905 backedges. 375 proven. 63 refuted. 0 times theorem prover too weak. 467 trivial. 0 not checked. [2018-04-11 15:38:50,410 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:38:50,410 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:38:50,410 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-11 15:38:50,438 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-11 15:38:50,438 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-11 15:38:50,445 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:38:50,517 INFO L134 CoverageAnalysis]: Checked inductivity of 905 backedges. 483 proven. 5 refuted. 0 times theorem prover too weak. 417 trivial. 0 not checked. [2018-04-11 15:38:50,517 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 15:38:50,517 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 11 [2018-04-11 15:38:50,518 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-11 15:38:50,518 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-11 15:38:50,519 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-04-11 15:38:50,519 INFO L87 Difference]: Start difference. First operand 37430 states and 46643 transitions. Second operand 11 states. [2018-04-11 15:38:50,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 15:38:50,791 INFO L93 Difference]: Finished difference Result 42733 states and 54102 transitions. [2018-04-11 15:38:50,792 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-11 15:38:50,792 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 224 [2018-04-11 15:38:50,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 15:38:50,871 INFO L225 Difference]: With dead ends: 42733 [2018-04-11 15:38:50,872 INFO L226 Difference]: Without dead ends: 41970 [2018-04-11 15:38:50,872 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 225 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=100, Invalid=280, Unknown=0, NotChecked=0, Total=380 [2018-04-11 15:38:50,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41970 states. [2018-04-11 15:38:51,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41970 to 34080. [2018-04-11 15:38:51,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34080 states. [2018-04-11 15:38:51,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34080 states to 34080 states and 42389 transitions. [2018-04-11 15:38:51,234 INFO L78 Accepts]: Start accepts. Automaton has 34080 states and 42389 transitions. Word has length 224 [2018-04-11 15:38:51,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 15:38:51,235 INFO L459 AbstractCegarLoop]: Abstraction has 34080 states and 42389 transitions. [2018-04-11 15:38:51,235 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-11 15:38:51,235 INFO L276 IsEmpty]: Start isEmpty. Operand 34080 states and 42389 transitions. [2018-04-11 15:38:51,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 241 [2018-04-11 15:38:51,246 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 15:38:51,246 INFO L355 BasicCegarLoop]: trace histogram [18, 18, 18, 17, 10, 10, 10, 10, 10, 8, 8, 8, 8, 7, 7, 6, 6, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 15:38:51,246 INFO L408 AbstractCegarLoop]: === Iteration 40 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-11 15:38:51,246 INFO L82 PathProgramCache]: Analyzing trace with hash 1439437335, now seen corresponding path program 1 times [2018-04-11 15:38:51,246 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-11 15:38:51,246 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-11 15:38:51,247 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:51,247 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-11 15:38:51,247 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 15:38:51,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:51,273 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 15:38:51,374 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-11 15:38:51,374 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 15:38:51,374 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-11 15:38:51,375 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 15:38:51,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 15:38:51,466 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 15:38:51,488 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 15:38:51,488 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:51,491 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:51,492 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:15 [2018-04-11 15:38:51,552 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-11 15:38:51,554 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-11 15:38:51,554 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:51,555 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:51,564 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-11 15:38:51,566 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-11 15:38:51,566 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:51,567 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:51,575 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:51,575 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:45, output treesize:37 [2018-04-11 15:38:51,762 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 15:38:51,763 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 15:38:51,764 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 24 [2018-04-11 15:38:51,764 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:51,789 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 32 treesize of output 42 [2018-04-11 15:38:51,791 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 32 [2018-04-11 15:38:51,791 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:51,809 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:51,829 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 23 treesize of output 35 [2018-04-11 15:38:51,831 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 23 [2018-04-11 15:38:51,831 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:51,841 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:51,851 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-11 15:38:51,851 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 5 variables, input treesize:79, output treesize:69 [2018-04-11 15:38:52,045 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 41 treesize of output 49 [2018-04-11 15:38:52,052 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 40 treesize of output 49 [2018-04-11 15:38:52,053 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-11 15:38:52,079 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 15:38:52,088 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 35 treesize of output 47 [2018-04-11 15:38:52,088 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 4 xjuncts. [2018-04-11 15:38:52,117 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-04-11 15:38:52,167 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 32 treesize of output 42 [2018-04-11 15:38:52,186 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 28 treesize of output 47 [2018-04-11 15:38:52,187 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 4 xjuncts. [2018-04-11 15:38:52,223 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 36 [2018-04-11 15:38:52,224 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-11 15:38:52,245 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-04-11 15:38:52,428 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 2 dim-2 vars, End of recursive call: 26 dim-0 vars, and 14 xjuncts. [2018-04-11 15:38:52,428 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 7 variables, input treesize:95, output treesize:775 [2018-04-11 15:38:52,608 WARN L151 SmtUtils]: Spent 100ms on a formula simplification. DAG size of input: 216 DAG size of output 91 [2018-04-11 15:38:52,642 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 111 treesize of output 107 [2018-04-11 15:38:52,645 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 96 [2018-04-11 15:38:52,645 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:52,685 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 88 [2018-04-11 15:38:52,686 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:52,724 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 15:38:52,725 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 72 [2018-04-11 15:38:52,725 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:52,745 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:52,799 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 40 [2018-04-11 15:38:52,800 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-11 15:38:52,800 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:52,808 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:52,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 92 [2018-04-11 15:38:52,870 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 66 [2018-04-11 15:38:52,870 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-11 15:38:52,912 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 65 [2018-04-11 15:38:52,912 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 15:38:52,954 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 58 [2018-04-11 15:38:52,954 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:52,994 INFO L267 ElimStorePlain]: Start of recursive call 8: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-11 15:38:53,083 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 50 [2018-04-11 15:38:53,084 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-04-11 15:38:53,084 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:53,092 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:53,094 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 54 [2018-04-11 15:38:53,095 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-04-11 15:38:53,095 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:53,104 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:53,106 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 58 [2018-04-11 15:38:53,108 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-04-11 15:38:53,108 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:53,117 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:53,197 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 59 [2018-04-11 15:38:53,209 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 12 [2018-04-11 15:38:53,209 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 2 xjuncts. [2018-04-11 15:38:53,220 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 15:38:53,306 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 72 treesize of output 73 [2018-04-11 15:38:53,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 58 treesize of output 60 [2018-04-11 15:38:53,317 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-11 15:38:53,360 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 59 [2018-04-11 15:38:53,361 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-11 15:38:53,404 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 48 [2018-04-11 15:38:53,404 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:53,440 INFO L267 ElimStorePlain]: Start of recursive call 20: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-11 15:38:53,558 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 51 [2018-04-11 15:38:53,560 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-11 15:38:53,560 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:53,573 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:53,574 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 46 [2018-04-11 15:38:53,586 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-11 15:38:53,586 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:53,594 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:53,700 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 7 dim-2 vars, End of recursive call: 15 dim-0 vars, and 9 xjuncts. [2018-04-11 15:38:53,700 INFO L202 ElimStorePlain]: Needed 27 recursive calls to eliminate 23 variables, input treesize:310, output treesize:244 [2018-04-11 15:38:53,990 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 111 treesize of output 108 [2018-04-11 15:38:53,996 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 101 treesize of output 86 [2018-04-11 15:38:53,997 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-11 15:38:54,051 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 67 [2018-04-11 15:38:54,051 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,053 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 75 [2018-04-11 15:38:54,053 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 93 treesize of output 87 [2018-04-11 15:38:54,114 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-11 15:38:54,170 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-11 15:38:54,285 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 92 [2018-04-11 15:38:54,287 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 65 [2018-04-11 15:38:54,288 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 15:38:54,318 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 58 [2018-04-11 15:38:54,318 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 66 [2018-04-11 15:38:54,352 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-11 15:38:54,393 INFO L267 ElimStorePlain]: Start of recursive call 7: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-11 15:38:54,525 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 40 [2018-04-11 15:38:54,527 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-11 15:38:54,527 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,533 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,658 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 69 [2018-04-11 15:38:54,660 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-04-11 15:38:54,660 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-11 15:38:54,680 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,691 INFO L267 ElimStorePlain]: Start of recursive call 13: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 63 treesize of output 65 [2018-04-11 15:38:54,697 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 54 [2018-04-11 15:38:54,698 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,729 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 46 [2018-04-11 15:38:54,729 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,756 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 15:38:54,756 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 36 [2018-04-11 15:38:54,757 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,771 INFO L267 ElimStorePlain]: Start of recursive call 16: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,776 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 79 treesize of output 81 [2018-04-11 15:38:54,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 70 [2018-04-11 15:38:54,778 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,817 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 15:38:54,817 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 52 [2018-04-11 15:38:54,818 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,848 INFO L267 ElimStorePlain]: Start of recursive call 20: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,957 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 54 [2018-04-11 15:38:54,959 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-04-11 15:38:54,959 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,968 INFO L267 ElimStorePlain]: Start of recursive call 23: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,969 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 50 [2018-04-11 15:38:54,976 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-04-11 15:38:54,976 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,985 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,986 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 58 [2018-04-11 15:38:54,988 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-04-11 15:38:54,988 INFO L267 ElimStorePlain]: Start of recursive call 28: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:54,997 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:55,096 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 59 [2018-04-11 15:38:55,100 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 12 [2018-04-11 15:38:55,101 INFO L267 ElimStorePlain]: Start of recursive call 30: End of recursive call: and 2 xjuncts. [2018-04-11 15:38:55,113 INFO L267 ElimStorePlain]: Start of recursive call 29: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 15:38:55,236 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 51 [2018-04-11 15:38:55,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-11 15:38:55,238 INFO L267 ElimStorePlain]: Start of recursive call 32: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:55,247 INFO L267 ElimStorePlain]: Start of recursive call 31: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:55,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 46 [2018-04-11 15:38:55,250 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-11 15:38:55,251 INFO L267 ElimStorePlain]: Start of recursive call 34: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:55,259 INFO L267 ElimStorePlain]: Start of recursive call 33: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:55,369 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 7 dim-2 vars, End of recursive call: 15 dim-0 vars, and 9 xjuncts. [2018-04-11 15:38:55,369 INFO L202 ElimStorePlain]: Needed 34 recursive calls to eliminate 23 variables, input treesize:310, output treesize:244 [2018-04-11 15:38:55,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 59 [2018-04-11 15:38:55,523 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 12 [2018-04-11 15:38:55,524 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-11 15:38:55,544 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 15:38:55,649 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 40 [2018-04-11 15:38:55,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-11 15:38:55,651 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:55,659 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:55,751 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 111 treesize of output 107 [2018-04-11 15:38:55,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 95 [2018-04-11 15:38:55,755 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:55,803 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 82 [2018-04-11 15:38:55,803 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:55,855 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 15:38:55,856 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 72 [2018-04-11 15:38:55,856 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:55,880 INFO L267 ElimStorePlain]: Start of recursive call 6: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:55,958 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 77 [2018-04-11 15:38:55,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-04-11 15:38:55,961 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:55,973 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:56,055 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 63 treesize of output 66 [2018-04-11 15:38:56,058 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 52 [2018-04-11 15:38:56,058 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:56,098 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 51 treesize of output 48 [2018-04-11 15:38:56,099 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-11 15:38:56,138 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 40 [2018-04-11 15:38:56,138 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 15:38:56,183 INFO L267 ElimStorePlain]: Start of recursive call 12: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-11 15:38:56,280 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 46 [2018-04-11 15:38:56,283 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-11 15:38:56,283 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:56,294 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:56,297 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 51 [2018-04-11 15:38:56,299 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-11 15:38:56,299 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:56,310 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:56,412 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 72 treesize of output 73 [2018-04-11 15:38:56,419 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 59 [2018-04-11 15:38:56,420 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-11 15:38:56,468 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 48 [2018-04-11 15:38:56,469 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:56,471 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 40 [2018-04-11 15:38:56,471 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:56,521 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 58 treesize of output 60 [2018-04-11 15:38:56,522 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-11 15:38:56,560 INFO L267 ElimStorePlain]: Start of recursive call 20: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-11 15:38:56,668 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 7 dim-2 vars, End of recursive call: 15 dim-0 vars, and 9 xjuncts. [2018-04-11 15:38:56,669 INFO L202 ElimStorePlain]: Needed 24 recursive calls to eliminate 23 variables, input treesize:310, output treesize:244 [2018-04-11 15:38:56,801 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 58 [2018-04-11 15:38:56,802 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-11 15:38:56,802 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:56,820 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:56,905 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 125 treesize of output 101 [2018-04-11 15:38:56,907 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 7 [2018-04-11 15:38:56,907 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:56,921 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:56,999 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 143 treesize of output 130 [2018-04-11 15:38:57,011 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 115 treesize of output 101 [2018-04-11 15:38:57,012 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-11 15:38:57,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 123 treesize of output 104 [2018-04-11 15:38:57,117 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-11 15:38:57,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 89 [2018-04-11 15:38:57,192 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:57,259 INFO L267 ElimStorePlain]: Start of recursive call 6: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-11 15:38:57,535 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 79 [2018-04-11 15:38:57,540 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 12 [2018-04-11 15:38:57,541 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-04-11 15:38:57,556 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 15:38:57,711 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 62 [2018-04-11 15:38:57,716 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 16 [2018-04-11 15:38:57,717 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 2 xjuncts. [2018-04-11 15:38:57,733 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 15:38:57,735 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 67 [2018-04-11 15:38:57,737 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 15:38:57,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 12 [2018-04-11 15:38:57,738 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:57,749 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:57,900 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 81 [2018-04-11 15:38:57,902 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-11 15:38:57,902 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:57,917 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 7 [2018-04-11 15:38:57,918 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:57,930 INFO L267 ElimStorePlain]: Start of recursive call 16: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:57,935 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 77 [2018-04-11 15:38:57,937 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 58 [2018-04-11 15:38:57,937 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:57,970 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 51 [2018-04-11 15:38:57,970 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:58,003 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 15:38:58,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 50 [2018-04-11 15:38:58,004 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:58,023 INFO L267 ElimStorePlain]: Start of recursive call 19: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:58,028 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 93 [2018-04-11 15:38:58,030 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 74 [2018-04-11 15:38:58,030 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:58,072 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 67 [2018-04-11 15:38:58,073 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:58,113 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 15:38:58,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 66 [2018-04-11 15:38:58,114 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:58,139 INFO L267 ElimStorePlain]: Start of recursive call 23: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:58,236 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 45 [2018-04-11 15:38:58,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-11 15:38:58,237 INFO L267 ElimStorePlain]: Start of recursive call 28: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:58,244 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 15:38:58,345 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 86 treesize of output 81 [2018-04-11 15:38:58,347 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 62 [2018-04-11 15:38:58,347 INFO L267 ElimStorePlain]: Start of recursive call 30: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 15:38:58,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 59 [2018-04-11 15:38:58,382 INFO L267 ElimStorePlain]: Start of recursive call 31: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-11 15:38:58,424 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 51 [2018-04-11 15:38:58,424 INFO L267 ElimStorePlain]: Start of recursive call 32: End of recursive call: and 1 xjuncts. [2018-04-11 15:38:58,462 INFO L267 ElimStorePlain]: Start of recursive call 29: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-11 15:38:58,590 INFO L267 ElimStorePlain]: Start of recursive call 1: 14 dim-0 vars, 8 dim-2 vars, End of recursive call: 31 dim-0 vars, and 9 xjuncts. [2018-04-11 15:38:58,590 INFO L202 ElimStorePlain]: Needed 32 recursive calls to eliminate 22 variables, input treesize:414, output treesize:364 [2018-04-11 15:38:59,637 INFO L134 CoverageAnalysis]: Checked inductivity of 1196 backedges. 146 proven. 1009 refuted. 6 times theorem prover too weak. 35 trivial. 0 not checked. [2018-04-11 15:38:59,637 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-11 15:38:59,638 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47] total 47 [2018-04-11 15:38:59,638 INFO L442 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-04-11 15:38:59,638 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-04-11 15:38:59,638 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=148, Invalid=2087, Unknown=21, NotChecked=0, Total=2256 [2018-04-11 15:38:59,638 INFO L87 Difference]: Start difference. First operand 34080 states and 42389 transitions. Second operand 48 states. [2018-04-11 15:39:06,743 WARN L151 SmtUtils]: Spent 769ms on a formula simplification. DAG size of input: 132 DAG size of output 78 [2018-04-11 15:39:07,998 WARN L151 SmtUtils]: Spent 975ms on a formula simplification. DAG size of input: 139 DAG size of output 85 [2018-04-11 15:39:08,386 WARN L151 SmtUtils]: Spent 326ms on a formula simplification. DAG size of input: 121 DAG size of output 82 [2018-04-11 15:39:08,985 WARN L151 SmtUtils]: Spent 300ms on a formula simplification. DAG size of input: 111 DAG size of output 73 [2018-04-11 15:39:10,452 WARN L151 SmtUtils]: Spent 515ms on a formula simplification. DAG size of input: 129 DAG size of output 76 [2018-04-11 15:39:11,450 WARN L151 SmtUtils]: Spent 816ms on a formula simplification. DAG size of input: 141 DAG size of output 87 [2018-04-11 15:39:12,063 WARN L151 SmtUtils]: Spent 566ms on a formula simplification. DAG size of input: 125 DAG size of output 86 [2018-04-11 15:39:12,847 WARN L151 SmtUtils]: Spent 567ms on a formula simplification. DAG size of input: 125 DAG size of output 81 [2018-04-11 15:39:13,426 WARN L151 SmtUtils]: Spent 537ms on a formula simplification. DAG size of input: 109 DAG size of output 80 [2018-04-11 15:39:13,848 WARN L151 SmtUtils]: Spent 175ms on a formula simplification. DAG size of input: 163 DAG size of output 141 [2018-04-11 15:39:14,712 WARN L151 SmtUtils]: Spent 280ms on a formula simplification. DAG size of input: 133 DAG size of output 79 [2018-04-11 15:39:15,590 WARN L151 SmtUtils]: Spent 619ms on a formula simplification. DAG size of input: 116 DAG size of output 77 [2018-04-11 15:39:15,851 WARN L151 SmtUtils]: Spent 122ms on a formula simplification. DAG size of input: 162 DAG size of output 126 [2018-04-11 15:39:16,471 WARN L151 SmtUtils]: Spent 487ms on a formula simplification. DAG size of input: 140 DAG size of output 86 [2018-04-11 15:39:17,163 WARN L151 SmtUtils]: Spent 348ms on a formula simplification. DAG size of input: 134 DAG size of output 80 [2018-04-11 15:39:17,654 WARN L151 SmtUtils]: Spent 129ms on a formula simplification. DAG size of input: 199 DAG size of output 118 [2018-04-11 15:39:17,948 WARN L151 SmtUtils]: Spent 201ms on a formula simplification. DAG size of input: 180 DAG size of output 144 [2018-04-11 15:39:19,569 WARN L151 SmtUtils]: Spent 1471ms on a formula simplification. DAG size of input: 123 DAG size of output 84 [2018-04-11 15:39:20,195 WARN L151 SmtUtils]: Spent 188ms on a formula simplification. DAG size of input: 167 DAG size of output 124 [2018-04-11 15:39:21,024 WARN L151 SmtUtils]: Spent 321ms on a formula simplification. DAG size of input: 117 DAG size of output 78 [2018-04-11 15:39:21,360 WARN L151 SmtUtils]: Spent 207ms on a formula simplification. DAG size of input: 171 DAG size of output 129 [2018-04-11 15:39:22,578 WARN L151 SmtUtils]: Spent 731ms on a formula simplification. DAG size of input: 79 DAG size of output 67 [2018-04-11 15:39:23,285 WARN L151 SmtUtils]: Spent 352ms on a formula simplification. DAG size of input: 225 DAG size of output 156 [2018-04-11 15:39:23,554 WARN L151 SmtUtils]: Spent 196ms on a formula simplification. DAG size of input: 179 DAG size of output 129 [2018-04-11 15:39:23,943 WARN L151 SmtUtils]: Spent 290ms on a formula simplification. DAG size of input: 131 DAG size of output 78 [2018-04-11 15:39:24,500 WARN L151 SmtUtils]: Spent 449ms on a formula simplification. DAG size of input: 85 DAG size of output 53 [2018-04-11 15:39:24,973 WARN L151 SmtUtils]: Spent 300ms on a formula simplification. DAG size of input: 142 DAG size of output 88 [2018-04-11 15:39:25,754 WARN L151 SmtUtils]: Spent 456ms on a formula simplification. DAG size of input: 232 DAG size of output 161 [2018-04-11 15:39:26,087 WARN L151 SmtUtils]: Spent 242ms on a formula simplification. DAG size of input: 186 DAG size of output 134 [2018-04-11 15:39:26,452 WARN L151 SmtUtils]: Spent 306ms on a formula simplification. DAG size of input: 126 DAG size of output 82 [2018-04-11 15:39:26,665 WARN L151 SmtUtils]: Spent 143ms on a formula simplification. DAG size of input: 169 DAG size of output 131 [2018-04-11 15:39:27,334 WARN L151 SmtUtils]: Spent 525ms on a formula simplification. DAG size of input: 113 DAG size of output 75 [2018-04-11 15:39:27,582 WARN L151 SmtUtils]: Spent 151ms on a formula simplification. DAG size of input: 184 DAG size of output 132 [2018-04-11 15:39:27,898 WARN L151 SmtUtils]: Spent 221ms on a formula simplification. DAG size of input: 185 DAG size of output 148 [2018-04-11 15:39:28,854 WARN L151 SmtUtils]: Spent 789ms on a formula simplification. DAG size of input: 133 DAG size of output 79 [2018-04-11 15:39:29,064 WARN L151 SmtUtils]: Spent 123ms on a formula simplification. DAG size of input: 159 DAG size of output 124 [2018-04-11 15:39:29,529 WARN L151 SmtUtils]: Spent 102ms on a formula simplification. DAG size of input: 126 DAG size of output 101 [2018-04-11 15:39:29,780 WARN L151 SmtUtils]: Spent 156ms on a formula simplification. DAG size of input: 141 DAG size of output 105 [2018-04-11 15:39:30,282 WARN L151 SmtUtils]: Spent 439ms on a formula simplification. DAG size of input: 71 DAG size of output 50 [2018-04-11 15:39:30,759 WARN L151 SmtUtils]: Spent 384ms on a formula simplification. DAG size of input: 80 DAG size of output 58 [2018-04-11 15:39:31,058 WARN L151 SmtUtils]: Spent 116ms on a formula simplification. DAG size of input: 130 DAG size of output 106 [2018-04-11 15:39:31,716 WARN L151 SmtUtils]: Spent 447ms on a formula simplification. DAG size of input: 87 DAG size of output 55 [2018-04-11 15:39:32,094 WARN L151 SmtUtils]: Spent 225ms on a formula simplification. DAG size of input: 61 DAG size of output 49 [2018-04-11 15:39:32,457 WARN L151 SmtUtils]: Spent 158ms on a formula simplification. DAG size of input: 184 DAG size of output 133 [2018-04-11 15:39:33,149 WARN L151 SmtUtils]: Spent 435ms on a formula simplification. DAG size of input: 165 DAG size of output 108 [2018-04-11 15:39:33,525 WARN L151 SmtUtils]: Spent 269ms on a formula simplification. DAG size of input: 222 DAG size of output 154 [2018-04-11 15:39:33,780 WARN L151 SmtUtils]: Spent 165ms on a formula simplification. DAG size of input: 176 DAG size of output 127 [2018-04-11 15:39:34,335 WARN L151 SmtUtils]: Spent 473ms on a formula simplification. DAG size of input: 124 DAG size of output 85 [2018-04-11 15:39:34,876 WARN L151 SmtUtils]: Spent 328ms on a formula simplification. DAG size of input: 229 DAG size of output 160 [2018-04-11 15:39:35,117 WARN L151 SmtUtils]: Spent 159ms on a formula simplification. DAG size of input: 188 DAG size of output 138 [2018-04-11 15:39:35,386 WARN L151 SmtUtils]: Spent 193ms on a formula simplification. DAG size of input: 173 DAG size of output 137 [2018-04-11 15:39:35,957 WARN L151 SmtUtils]: Spent 343ms on a formula simplification. DAG size of input: 231 DAG size of output 154 [2018-04-11 15:39:36,224 WARN L151 SmtUtils]: Spent 176ms on a formula simplification. DAG size of input: 172 DAG size of output 132 [2018-04-11 15:39:36,728 WARN L151 SmtUtils]: Spent 440ms on a formula simplification. DAG size of input: 82 DAG size of output 51 [2018-04-11 15:39:36,942 WARN L151 SmtUtils]: Spent 154ms on a formula simplification. DAG size of input: 157 DAG size of output 131 [2018-04-11 15:39:37,214 WARN L151 SmtUtils]: Spent 190ms on a formula simplification. DAG size of input: 165 DAG size of output 143 [2018-04-11 15:39:38,178 WARN L151 SmtUtils]: Spent 745ms on a formula simplification. DAG size of input: 172 DAG size of output 113 [2018-04-11 15:39:38,708 WARN L151 SmtUtils]: Spent 465ms on a formula simplification. DAG size of input: 93 DAG size of output 59 [2018-04-11 15:39:39,350 WARN L151 SmtUtils]: Spent 474ms on a formula simplification. DAG size of input: 88 DAG size of output 56 [2018-04-11 15:39:39,687 WARN L151 SmtUtils]: Spent 219ms on a formula simplification. DAG size of input: 187 DAG size of output 126 [2018-04-11 15:39:40,363 WARN L151 SmtUtils]: Spent 212ms on a formula simplification. DAG size of input: 191 DAG size of output 131 [2018-04-11 15:39:41,106 WARN L151 SmtUtils]: Spent 292ms on a formula simplification. DAG size of input: 233 DAG size of output 164 [2018-04-11 15:39:41,341 WARN L151 SmtUtils]: Spent 154ms on a formula simplification. DAG size of input: 164 DAG size of output 128 [2018-04-11 15:39:41,739 WARN L151 SmtUtils]: Spent 148ms on a formula simplification. DAG size of input: 219 DAG size of output 127 [2018-04-11 15:39:42,094 WARN L151 SmtUtils]: Spent 149ms on a formula simplification. DAG size of input: 181 DAG size of output 131 [2018-04-11 15:39:42,538 WARN L151 SmtUtils]: Spent 293ms on a formula simplification. DAG size of input: 134 DAG size of output 80 [2018-04-11 15:39:43,103 WARN L151 SmtUtils]: Spent 367ms on a formula simplification. DAG size of input: 240 DAG size of output 169 [2018-04-11 15:39:43,407 WARN L151 SmtUtils]: Spent 171ms on a formula simplification. DAG size of input: 171 DAG size of output 133 [2018-04-11 15:39:43,797 WARN L151 SmtUtils]: Spent 141ms on a formula simplification. DAG size of input: 169 DAG size of output 112 [2018-04-11 15:39:44,048 WARN L151 SmtUtils]: Spent 116ms on a formula simplification. DAG size of input: 164 DAG size of output 100 [2018-04-11 15:39:44,351 WARN L151 SmtUtils]: Spent 166ms on a formula simplification. DAG size of input: 128 DAG size of output 92 [2018-04-11 15:39:44,783 WARN L151 SmtUtils]: Spent 134ms on a formula simplification. DAG size of input: 162 DAG size of output 106 [2018-04-11 15:39:45,543 WARN L151 SmtUtils]: Spent 702ms on a formula simplification. DAG size of input: 181 DAG size of output 106 [2018-04-11 15:39:46,070 WARN L151 SmtUtils]: Spent 479ms on a formula simplification. DAG size of input: 159 DAG size of output 113 [2018-04-11 15:39:46,698 WARN L151 SmtUtils]: Spent 469ms on a formula simplification. DAG size of input: 79 DAG size of output 57 [2018-04-11 15:39:46,935 WARN L151 SmtUtils]: Spent 150ms on a formula simplification. DAG size of input: 165 DAG size of output 129 [2018-04-11 15:39:47,154 WARN L151 SmtUtils]: Spent 144ms on a formula simplification. DAG size of input: 167 DAG size of output 111 [2018-04-11 15:39:47,341 WARN L151 SmtUtils]: Spent 104ms on a formula simplification. DAG size of input: 142 DAG size of output 103 [2018-04-11 15:39:47,782 WARN L151 SmtUtils]: Spent 158ms on a formula simplification. DAG size of input: 168 DAG size of output 112 [2018-04-11 15:39:47,962 WARN L151 SmtUtils]: Spent 103ms on a formula simplification. DAG size of input: 122 DAG size of output 94 [2018-04-11 15:39:48,405 WARN L151 SmtUtils]: Spent 119ms on a formula simplification. DAG size of input: 146 DAG size of output 107 [2018-04-11 15:39:48,582 WARN L151 SmtUtils]: Spent 104ms on a formula simplification. DAG size of input: 129 DAG size of output 101 [2018-04-11 15:39:49,152 WARN L151 SmtUtils]: Spent 180ms on a formula simplification. DAG size of input: 191 DAG size of output 123 [2018-04-11 15:39:49,373 WARN L151 SmtUtils]: Spent 149ms on a formula simplification. DAG size of input: 183 DAG size of output 116 [2018-04-11 15:39:49,805 WARN L151 SmtUtils]: Spent 318ms on a formula simplification. DAG size of input: 230 DAG size of output 162 [2018-04-11 15:39:50,049 WARN L151 SmtUtils]: Spent 147ms on a formula simplification. DAG size of input: 161 DAG size of output 126 [2018-04-11 15:39:50,584 WARN L151 SmtUtils]: Spent 370ms on a formula simplification. DAG size of input: 237 DAG size of output 167 [2018-04-11 15:39:51,057 WARN L151 SmtUtils]: Spent 330ms on a formula simplification. DAG size of input: 233 DAG size of output 157 [2018-04-11 15:39:51,312 WARN L151 SmtUtils]: Spent 180ms on a formula simplification. DAG size of input: 180 DAG size of output 130 [2018-04-11 15:39:51,705 WARN L151 SmtUtils]: Spent 164ms on a formula simplification. DAG size of input: 190 DAG size of output 121 [2018-04-11 15:39:53,158 WARN L151 SmtUtils]: Spent 1376ms on a formula simplification. DAG size of input: 88 DAG size of output 75 [2018-04-11 15:39:53,735 WARN L151 SmtUtils]: Spent 165ms on a formula simplification. DAG size of input: 191 DAG size of output 112 [2018-04-11 15:39:54,190 WARN L151 SmtUtils]: Spent 383ms on a formula simplification. DAG size of input: 165 DAG size of output 97 [2018-04-11 15:39:54,370 WARN L151 SmtUtils]: Spent 124ms on a formula simplification. DAG size of input: 105 DAG size of output 63 [2018-04-11 15:39:54,613 WARN L151 SmtUtils]: Spent 159ms on a formula simplification. DAG size of input: 183 DAG size of output 105 [2018-04-11 15:39:56,103 WARN L151 SmtUtils]: Spent 1137ms on a formula simplification. DAG size of input: 80 DAG size of output 68 [2018-04-11 15:39:56,818 WARN L151 SmtUtils]: Spent 174ms on a formula simplification. DAG size of input: 188 DAG size of output 121 [2018-04-11 15:39:57,324 WARN L151 SmtUtils]: Spent 436ms on a formula simplification. DAG size of input: 162 DAG size of output 106 [2018-04-11 15:39:57,654 WARN L151 SmtUtils]: Spent 164ms on a formula simplification. DAG size of input: 187 DAG size of output 120 [2018-04-11 15:39:58,182 WARN L151 SmtUtils]: Spent 154ms on a formula simplification. DAG size of input: 180 DAG size of output 114 [2018-04-11 15:39:58,445 WARN L151 SmtUtils]: Spent 171ms on a formula simplification. DAG size of input: 185 DAG size of output 119 [2018-04-11 15:39:58,882 WARN L151 SmtUtils]: Spent 167ms on a formula simplification. DAG size of input: 186 DAG size of output 120 [2018-04-11 15:40:00,076 WARN L151 SmtUtils]: Spent 531ms on a formula simplification. DAG size of input: 104 DAG size of output 61 [2018-04-11 15:40:01,643 WARN L151 SmtUtils]: Spent 483ms on a formula simplification. DAG size of input: 112 DAG size of output 68 [2018-04-11 15:40:02,093 WARN L151 SmtUtils]: Spent 307ms on a formula simplification. DAG size of input: 111 DAG size of output 66 [2018-04-11 15:40:02,762 WARN L151 SmtUtils]: Spent 298ms on a formula simplification. DAG size of input: 105 DAG size of output 62 [2018-04-11 15:40:03,474 WARN L151 SmtUtils]: Spent 554ms on a formula simplification. DAG size of input: 110 DAG size of output 66 [2018-04-11 15:40:03,920 WARN L151 SmtUtils]: Spent 184ms on a formula simplification. DAG size of input: 188 DAG size of output 121 [2018-04-11 15:40:04,464 WARN L151 SmtUtils]: Spent 186ms on a formula simplification. DAG size of input: 193 DAG size of output 126 [2018-04-11 15:40:04,986 WARN L151 SmtUtils]: Spent 195ms on a formula simplification. DAG size of input: 194 DAG size of output 127 [2018-04-11 15:40:05,240 WARN L151 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 106 DAG size of output 94 [2018-04-11 15:40:06,298 WARN L151 SmtUtils]: Spent 309ms on a formula simplification. DAG size of input: 102 DAG size of output 61 [2018-04-11 15:40:06,628 WARN L151 SmtUtils]: Spent 279ms on a formula simplification. DAG size of input: 101 DAG size of output 59 [2018-04-11 15:40:07,252 WARN L151 SmtUtils]: Spent 333ms on a formula simplification. DAG size of input: 114 DAG size of output 71 [2018-04-11 15:40:07,752 WARN L151 SmtUtils]: Spent 322ms on a formula simplification. DAG size of input: 106 DAG size of output 64 [2018-04-11 15:40:08,272 WARN L151 SmtUtils]: Spent 338ms on a formula simplification. DAG size of input: 98 DAG size of output 65 [2018-04-11 15:40:09,576 WARN L151 SmtUtils]: Spent 258ms on a formula simplification. DAG size of input: 105 DAG size of output 56 [2018-04-11 15:40:14,367 WARN L151 SmtUtils]: Spent 752ms on a formula simplification. DAG size of input: 117 DAG size of output 67 [2018-04-11 15:40:15,110 WARN L151 SmtUtils]: Spent 492ms on a formula simplification. DAG size of input: 121 DAG size of output 63 [2018-04-11 15:40:15,832 WARN L151 SmtUtils]: Spent 651ms on a formula simplification. DAG size of input: 108 DAG size of output 59 [2018-04-11 15:40:17,360 WARN L151 SmtUtils]: Spent 525ms on a formula simplification. DAG size of input: 105 DAG size of output 58 [2018-04-11 15:40:18,042 WARN L151 SmtUtils]: Spent 429ms on a formula simplification. DAG size of input: 85 DAG size of output 49 [2018-04-11 15:40:19,536 WARN L151 SmtUtils]: Spent 838ms on a formula simplification. DAG size of input: 122 DAG size of output 71 [2018-04-11 15:40:20,332 WARN L151 SmtUtils]: Spent 716ms on a formula simplification. DAG size of input: 114 DAG size of output 64 [2018-04-11 15:40:21,719 WARN L151 SmtUtils]: Spent 758ms on a formula simplification. DAG size of input: 124 DAG size of output 66 [2018-04-11 15:40:22,471 WARN L151 SmtUtils]: Spent 658ms on a formula simplification. DAG size of input: 116 DAG size of output 59 [2018-04-11 15:40:23,380 WARN L151 SmtUtils]: Spent 738ms on a formula simplification. DAG size of input: 115 DAG size of output 65 [2018-04-11 15:40:24,124 WARN L151 SmtUtils]: Spent 636ms on a formula simplification. DAG size of input: 106 DAG size of output 57 [2018-04-11 15:40:25,330 WARN L151 SmtUtils]: Spent 757ms on a formula simplification. DAG size of input: 120 DAG size of output 69 [2018-04-11 15:40:26,080 WARN L151 SmtUtils]: Spent 686ms on a formula simplification. DAG size of input: 111 DAG size of output 61 [2018-04-11 15:40:26,716 WARN L151 SmtUtils]: Spent 520ms on a formula simplification. DAG size of input: 108 DAG size of output 60 [2018-04-11 15:40:27,547 WARN L151 SmtUtils]: Spent 775ms on a formula simplification. DAG size of input: 120 DAG size of output 69 [2018-04-11 15:40:28,034 WARN L151 SmtUtils]: Spent 441ms on a formula simplification. DAG size of input: 88 DAG size of output 51 [2018-04-11 15:40:28,826 WARN L151 SmtUtils]: Spent 737ms on a formula simplification. DAG size of input: 112 DAG size of output 62 [2018-04-11 15:40:29,441 WARN L151 SmtUtils]: Spent 110ms on a formula simplification. DAG size of input: 123 DAG size of output 85 [2018-04-11 15:40:29,884 WARN L151 SmtUtils]: Spent 192ms on a formula simplification. DAG size of input: 80 DAG size of output 62 [2018-04-11 15:40:30,824 WARN L151 SmtUtils]: Spent 761ms on a formula simplification. DAG size of input: 125 DAG size of output 73 [2018-04-11 15:40:31,645 WARN L151 SmtUtils]: Spent 748ms on a formula simplification. DAG size of input: 117 DAG size of output 66 [2018-04-11 15:40:32,796 WARN L151 SmtUtils]: Spent 851ms on a formula simplification. DAG size of input: 135 DAG size of output 77 [2018-04-11 15:40:33,660 WARN L151 SmtUtils]: Spent 755ms on a formula simplification. DAG size of input: 127 DAG size of output 68 [2018-04-11 15:40:34,525 WARN L151 SmtUtils]: Spent 770ms on a formula simplification. DAG size of input: 126 DAG size of output 69 [2018-04-11 15:40:35,313 WARN L151 SmtUtils]: Spent 697ms on a formula simplification. DAG size of input: 119 DAG size of output 61 [2018-04-11 15:40:36,223 WARN L151 SmtUtils]: Spent 761ms on a formula simplification. DAG size of input: 117 DAG size of output 67 [2018-04-11 15:40:38,079 WARN L151 SmtUtils]: Spent 1752ms on a formula simplification. DAG size of input: 123 DAG size of output 68 [2018-04-11 15:40:38,289 WARN L151 SmtUtils]: Spent 116ms on a formula simplification. DAG size of input: 128 DAG size of output 89 [2018-04-11 15:40:39,014 WARN L151 SmtUtils]: Spent 641ms on a formula simplification. DAG size of input: 108 DAG size of output 59 Received shutdown request... [2018-04-11 15:40:40,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 338 states. [2018-04-11 15:40:40,677 WARN L519 AbstractCegarLoop]: Verification canceled [2018-04-11 15:40:40,681 WARN L197 ceAbstractionStarter]: Timeout [2018-04-11 15:40:40,682 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 11.04 03:40:40 BoogieIcfgContainer [2018-04-11 15:40:40,682 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-04-11 15:40:40,682 INFO L168 Benchmark]: Toolchain (without parser) took 171138.99 ms. Allocated memory was 406.3 MB in the beginning and 2.2 GB in the end (delta: 1.8 GB). Free memory was 338.9 MB in the beginning and 966.6 MB in the end (delta: -627.7 MB). Peak memory consumption was 1.2 GB. Max. memory is 5.3 GB. [2018-04-11 15:40:40,683 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 406.3 MB. Free memory is still 366.2 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-11 15:40:40,684 INFO L168 Benchmark]: CACSL2BoogieTranslator took 271.09 ms. Allocated memory is still 406.3 MB. Free memory was 336.9 MB in the beginning and 311.8 MB in the end (delta: 25.1 MB). Peak memory consumption was 25.1 MB. Max. memory is 5.3 GB. [2018-04-11 15:40:40,684 INFO L168 Benchmark]: Boogie Preprocessor took 41.50 ms. Allocated memory is still 406.3 MB. Free memory was 311.8 MB in the beginning and 309.2 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. [2018-04-11 15:40:40,684 INFO L168 Benchmark]: RCFGBuilder took 427.47 ms. Allocated memory was 406.3 MB in the beginning and 600.8 MB in the end (delta: 194.5 MB). Free memory was 309.2 MB in the beginning and 529.0 MB in the end (delta: -219.9 MB). Peak memory consumption was 25.2 MB. Max. memory is 5.3 GB. [2018-04-11 15:40:40,684 INFO L168 Benchmark]: TraceAbstraction took 170396.12 ms. Allocated memory was 600.8 MB in the beginning and 2.2 GB in the end (delta: 1.6 GB). Free memory was 529.0 MB in the beginning and 966.6 MB in the end (delta: -437.6 MB). Peak memory consumption was 1.2 GB. Max. memory is 5.3 GB. [2018-04-11 15:40:40,685 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 406.3 MB. Free memory is still 366.2 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 271.09 ms. Allocated memory is still 406.3 MB. Free memory was 336.9 MB in the beginning and 311.8 MB in the end (delta: 25.1 MB). Peak memory consumption was 25.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 41.50 ms. Allocated memory is still 406.3 MB. Free memory was 311.8 MB in the beginning and 309.2 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. * RCFGBuilder took 427.47 ms. Allocated memory was 406.3 MB in the beginning and 600.8 MB in the end (delta: 194.5 MB). Free memory was 309.2 MB in the beginning and 529.0 MB in the end (delta: -219.9 MB). Peak memory consumption was 25.2 MB. Max. memory is 5.3 GB. * TraceAbstraction took 170396.12 ms. Allocated memory was 600.8 MB in the beginning and 2.2 GB in the end (delta: 1.6 GB). Free memory was 529.0 MB in the beginning and 966.6 MB in the end (delta: -437.6 MB). Peak memory consumption was 1.2 GB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 634]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 634). Cancelled while BasicCegarLoop was constructing difference of abstraction (34080states) and interpolant automaton (currently 338 states, 48 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 103. - TimeoutResultAtElement [Line: 634]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 634). Cancelled while BasicCegarLoop was constructing difference of abstraction (34080states) and interpolant automaton (currently 338 states, 48 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 103. - TimeoutResultAtElement [Line: 644]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 644). Cancelled while BasicCegarLoop was constructing difference of abstraction (34080states) and interpolant automaton (currently 338 states, 48 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 103. - TimeoutResultAtElement [Line: 644]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 644). Cancelled while BasicCegarLoop was constructing difference of abstraction (34080states) and interpolant automaton (currently 338 states, 48 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 103. - TimeoutResultAtElement [Line: 635]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 635). Cancelled while BasicCegarLoop was constructing difference of abstraction (34080states) and interpolant automaton (currently 338 states, 48 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 103. - TimeoutResultAtElement [Line: 638]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 638). Cancelled while BasicCegarLoop was constructing difference of abstraction (34080states) and interpolant automaton (currently 338 states, 48 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 103. - TimeoutResultAtElement [Line: 635]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 635). Cancelled while BasicCegarLoop was constructing difference of abstraction (34080states) and interpolant automaton (currently 338 states, 48 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 103. - TimeoutResultAtElement [Line: 638]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 638). Cancelled while BasicCegarLoop was constructing difference of abstraction (34080states) and interpolant automaton (currently 338 states, 48 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 103. - TimeoutResultAtElement [Line: 681]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 681). Cancelled while BasicCegarLoop was constructing difference of abstraction (34080states) and interpolant automaton (currently 338 states, 48 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 103. - TimeoutResultAtElement [Line: 672]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 672). Cancelled while BasicCegarLoop was constructing difference of abstraction (34080states) and interpolant automaton (currently 338 states, 48 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 103. - TimeoutResultAtElement [Line: 682]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 682). Cancelled while BasicCegarLoop was constructing difference of abstraction (34080states) and interpolant automaton (currently 338 states, 48 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 103. - TimeoutResultAtElement [Line: 672]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 672). Cancelled while BasicCegarLoop was constructing difference of abstraction (34080states) and interpolant automaton (currently 338 states, 48 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 103. - TimeoutResultAtElement [Line: 681]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 681). Cancelled while BasicCegarLoop was constructing difference of abstraction (34080states) and interpolant automaton (currently 338 states, 48 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 103. - TimeoutResultAtElement [Line: 682]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 682). Cancelled while BasicCegarLoop was constructing difference of abstraction (34080states) and interpolant automaton (currently 338 states, 48 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 103. - TimeoutResultAtElement [Line: 697]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 697). Cancelled while BasicCegarLoop was constructing difference of abstraction (34080states) and interpolant automaton (currently 338 states, 48 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 103. - TimeoutResultAtElement [Line: 688]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 688). Cancelled while BasicCegarLoop was constructing difference of abstraction (34080states) and interpolant automaton (currently 338 states, 48 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 103. - TimeoutResultAtElement [Line: 698]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 698). Cancelled while BasicCegarLoop was constructing difference of abstraction (34080states) and interpolant automaton (currently 338 states, 48 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 103. - TimeoutResultAtElement [Line: 697]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 697). Cancelled while BasicCegarLoop was constructing difference of abstraction (34080states) and interpolant automaton (currently 338 states, 48 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 103. - TimeoutResultAtElement [Line: 698]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 698). Cancelled while BasicCegarLoop was constructing difference of abstraction (34080states) and interpolant automaton (currently 338 states, 48 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 103. - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 78 locations, 19 error locations. TIMEOUT Result, 170.3s OverallTime, 40 OverallIterations, 18 TraceHistogramMax, 145.5s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 5215 SDtfs, 26574 SDslu, 16724 SDs, 0 SdLazy, 62728 SolverSat, 8283 SolverUnsat, 1018 SolverUnknown, 0 SolverNotchecked, 34.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 5542 GetRequests, 3621 SyntacticMatches, 77 SemanticMatches, 1843 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 107051 ImplicationChecksByTransitivity, 107.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=51507occurred in iteration=37, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 5.4s AutomataMinimizationTime, 39 MinimizatonAttempts, 52289 StatesRemovedByMinimization, 37 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 1.6s SatisfiabilityAnalysisTime, 16.6s InterpolantComputationTime, 7288 NumberOfCodeBlocks, 7288 NumberOfCodeBlocksAsserted, 72 NumberOfCheckSat, 6446 ConstructedInterpolants, 317 QuantifiedInterpolants, 6077745 SizeOfPredicates, 184 NumberOfNonLiveVariables, 21814 ConjunctsInSsa, 1251 ConjunctsInUnsatCore, 65 InterpolantComputations, 14 PerfectInterpolantSequences, 13289/17747 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/lockfree-3.0_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-11_15-40-40-690.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/lockfree-3.0_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-04-11_15-40-40-690.csv Completed graceful shutdown