java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv --cacsl2boogietranslator.bitprecise.bitfields false -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/array-memsafety/cstrcat-alloca_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-408c70d-m [2018-04-12 10:03:03,668 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-12 10:03:03,670 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-12 10:03:03,683 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2018-04-12 10:03:03,705 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-04-12 10:03:03,714 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-12 10:03:03,714 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-12 10:03:03,715 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-12 10:03:03,715 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-12 10:03:03,715 INFO L133 SettingsManager]: * Use SBE=true [2018-04-12 10:03:03,716 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-12 10:03:03,716 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-12 10:03:03,716 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-12 10:03:03,716 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-12 10:03:03,716 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-12 10:03:03,716 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-12 10:03:03,716 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-12 10:03:03,717 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-12 10:03:03,717 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-12 10:03:03,717 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-12 10:03:03,717 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-12 10:03:03,717 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-12 10:03:03,717 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-12 10:03:03,717 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-12 10:03:03,718 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 10:03:03,718 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-12 10:03:03,718 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-12 10:03:03,718 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-12 10:03:03,718 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Bitprecise bitfields -> false [2018-04-12 10:03:03,747 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-12 10:03:03,755 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-12 10:03:03,757 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-12 10:03:03,758 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-12 10:03:03,758 INFO L276 PluginConnector]: CDTParser initialized [2018-04-12 10:03:03,759 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-memsafety/cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,033 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGd9d6015ab [2018-04-12 10:03:04,175 INFO L287 CDTParser]: IsIndexed: true [2018-04-12 10:03:04,175 INFO L288 CDTParser]: Found 1 translation units. [2018-04-12 10:03:04,176 INFO L168 CDTParser]: Scanning cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,182 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-12 10:03:04,182 INFO L215 ultiparseSymbolTable]: [2018-04-12 10:03:04,182 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-12 10:03:04,182 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____bswap_32 ('__bswap_32') in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,182 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,183 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__ ('') in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,183 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____bswap_64 ('__bswap_64') in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,183 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-12 10:03:04,183 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__fsblkcnt_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,183 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__time_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,183 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____suseconds_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,183 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____rlim64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,183 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__uid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,183 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____qaddr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,183 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__u_int in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,184 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____blksize_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,184 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__blksize_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,184 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_rwlock_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,184 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_key_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,184 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____int32_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,184 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____uint32_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,184 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____syscall_ulong_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,184 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____id_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,184 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__div_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,184 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____caddr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,184 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____u_short in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,184 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____dev_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,184 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__key_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,184 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__caddr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,184 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__mode_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,184 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__fsfilcnt_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,184 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__int32_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,185 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__fd_set in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,185 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,185 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__ulong in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,185 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____blkcnt64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,185 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____int16_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,185 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__u_short in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,185 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__gid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,185 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__off_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,185 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____socklen_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,185 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____nlink_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,185 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____ssize_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,185 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__timer_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,185 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____mode_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,186 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__u_int32_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,186 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__u_char in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,186 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__blkcnt_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,186 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____gid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,186 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____u_long in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,186 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____intptr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,186 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_once_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,186 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_mutexattr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,186 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__size_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,186 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____timer_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,187 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_attr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,187 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____off64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,187 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____fsblkcnt64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,187 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__int16_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,187 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____pid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,187 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____quad_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,187 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____pthread_list_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,187 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__lldiv_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,187 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__wchar_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,187 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____rlim_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,188 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____u_char in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,188 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_barrier_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,188 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____u_quad_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,188 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__dev_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,188 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____uint8_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,188 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__id_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,188 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__u_int8_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,188 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____u_int in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,188 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____useconds_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,188 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__loff_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,188 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____daddr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,189 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__clockid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,189 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____clockid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,189 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__fsid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,189 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__quad_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,189 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,189 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__u_int16_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,189 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_cond_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,189 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_spinlock_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,189 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____fd_mask in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,189 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_condattr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,189 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____blkcnt_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,189 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____clock_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,190 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____uid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,190 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____loff_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,190 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____ino64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,190 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__suseconds_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,190 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____ino_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,190 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____sigset_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,190 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____sig_atomic_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,190 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____fsid_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,190 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__nlink_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,190 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____off_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,190 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__clock_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,190 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__uint in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,190 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__u_long in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__fd_mask in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____uint64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__ssize_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_rwlockattr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____fsword_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__u_int64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__sigset_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____int8_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____uint16_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__daddr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____WAIT_STATUS in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__u_quad_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__ushort in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____time_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__int64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____fsfilcnt_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____syscall_slong_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____fsblkcnt_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_barrierattr_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,191 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__int8_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,192 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__register_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,192 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____fsfilcnt64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,192 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__pthread_mutex_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,192 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__ino_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,192 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____key_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,192 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____int64_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,192 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i__ldiv_t in cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,204 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGd9d6015ab [2018-04-12 10:03:04,207 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-12 10:03:04,208 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-12 10:03:04,209 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-12 10:03:04,209 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-12 10:03:04,212 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-12 10:03:04,213 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 10:03:04" (1/1) ... [2018-04-12 10:03:04,215 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6a8eb505 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:03:04, skipping insertion in model container [2018-04-12 10:03:04,215 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 10:03:04" (1/1) ... [2018-04-12 10:03:04,226 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 10:03:04,252 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 10:03:04,378 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 10:03:04,421 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 10:03:04,427 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 112 non ball SCCs. Number of states in SCCs 112. [2018-04-12 10:03:04,463 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:03:04 WrapperNode [2018-04-12 10:03:04,463 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-12 10:03:04,464 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-12 10:03:04,464 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-12 10:03:04,464 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-12 10:03:04,478 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:03:04" (1/1) ... [2018-04-12 10:03:04,478 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:03:04" (1/1) ... [2018-04-12 10:03:04,499 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:03:04" (1/1) ... [2018-04-12 10:03:04,500 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:03:04" (1/1) ... [2018-04-12 10:03:04,509 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:03:04" (1/1) ... [2018-04-12 10:03:04,515 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:03:04" (1/1) ... [2018-04-12 10:03:04,517 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:03:04" (1/1) ... [2018-04-12 10:03:04,521 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-12 10:03:04,522 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-12 10:03:04,522 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-12 10:03:04,522 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-12 10:03:04,523 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:03:04" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 10:03:04,609 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-12 10:03:04,609 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-12 10:03:04,609 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____bswap_32 [2018-04-12 10:03:04,609 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____bswap_64 [2018-04-12 10:03:04,609 INFO L136 BoogieDeclarations]: Found implementation of procedure cstrcat [2018-04-12 10:03:04,609 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-12 10:03:04,609 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____bswap_32 [2018-04-12 10:03:04,610 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fcstrcat_alloca_true_valid_memsafety_true_termination_i____bswap_64 [2018-04-12 10:03:04,610 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-12 10:03:04,610 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-12 10:03:04,610 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-12 10:03:04,610 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-12 10:03:04,610 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-12 10:03:04,610 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-12 10:03:04,610 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-12 10:03:04,610 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-12 10:03:04,611 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-12 10:03:04,611 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-12 10:03:04,611 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-12 10:03:04,611 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-12 10:03:04,611 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-12 10:03:04,611 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-12 10:03:04,611 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-12 10:03:04,611 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-12 10:03:04,611 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-12 10:03:04,612 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-12 10:03:04,612 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-12 10:03:04,612 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-12 10:03:04,612 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-12 10:03:04,612 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-12 10:03:04,612 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-12 10:03:04,612 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-12 10:03:04,612 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-12 10:03:04,613 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-12 10:03:04,613 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-12 10:03:04,613 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-12 10:03:04,613 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-12 10:03:04,613 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-12 10:03:04,613 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-12 10:03:04,613 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-12 10:03:04,613 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-12 10:03:04,613 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-12 10:03:04,614 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-12 10:03:04,614 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-12 10:03:04,614 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-12 10:03:04,614 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-12 10:03:04,614 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-12 10:03:04,614 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-12 10:03:04,614 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-12 10:03:04,614 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-12 10:03:04,614 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-12 10:03:04,614 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-12 10:03:04,615 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-12 10:03:04,615 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-12 10:03:04,615 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-12 10:03:04,615 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-12 10:03:04,615 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-12 10:03:04,615 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-12 10:03:04,615 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-12 10:03:04,615 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-12 10:03:04,615 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-12 10:03:04,616 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-12 10:03:04,616 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-12 10:03:04,616 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-12 10:03:04,616 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-12 10:03:04,616 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-12 10:03:04,616 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-12 10:03:04,616 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-12 10:03:04,616 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-12 10:03:04,616 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-12 10:03:04,616 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-12 10:03:04,617 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-12 10:03:04,617 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-12 10:03:04,617 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-12 10:03:04,617 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-12 10:03:04,617 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-12 10:03:04,617 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-12 10:03:04,617 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-12 10:03:04,617 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-12 10:03:04,617 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-12 10:03:04,617 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-12 10:03:04,618 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-12 10:03:04,618 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-12 10:03:04,618 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-12 10:03:04,618 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-12 10:03:04,618 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-12 10:03:04,618 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-12 10:03:04,618 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-12 10:03:04,618 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-12 10:03:04,618 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-12 10:03:04,618 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-12 10:03:04,619 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-12 10:03:04,619 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-12 10:03:04,619 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-12 10:03:04,619 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-12 10:03:04,619 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-12 10:03:04,619 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-12 10:03:04,619 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-12 10:03:04,619 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-12 10:03:04,619 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-12 10:03:04,619 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-12 10:03:04,620 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-12 10:03:04,620 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-12 10:03:04,620 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-12 10:03:04,620 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-12 10:03:04,620 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-12 10:03:04,620 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-12 10:03:04,620 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-12 10:03:04,620 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-12 10:03:04,620 INFO L128 BoogieDeclarations]: Found specification of procedure cstrcat [2018-04-12 10:03:04,620 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-12 10:03:04,621 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-12 10:03:04,621 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-12 10:03:04,621 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-12 10:03:04,621 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-12 10:03:04,621 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-12 10:03:04,621 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-12 10:03:04,621 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-12 10:03:04,882 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-12 10:03:04,882 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 10:03:04 BoogieIcfgContainer [2018-04-12 10:03:04,882 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-12 10:03:04,883 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-12 10:03:04,883 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-12 10:03:04,884 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-12 10:03:04,885 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.04 10:03:04" (1/3) ... [2018-04-12 10:03:04,885 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@b2b691e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 10:03:04, skipping insertion in model container [2018-04-12 10:03:04,885 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:03:04" (2/3) ... [2018-04-12 10:03:04,885 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@b2b691e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 10:03:04, skipping insertion in model container [2018-04-12 10:03:04,886 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 10:03:04" (3/3) ... [2018-04-12 10:03:04,887 INFO L107 eAbstractionObserver]: Analyzing ICFG cstrcat-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:03:04,895 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-12 10:03:04,901 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 11 error locations. [2018-04-12 10:03:04,930 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-12 10:03:04,931 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-12 10:03:04,931 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-12 10:03:04,932 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-12 10:03:04,932 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-12 10:03:04,932 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-12 10:03:04,932 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-12 10:03:04,932 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-12 10:03:04,932 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-12 10:03:04,933 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-12 10:03:04,941 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states. [2018-04-12 10:03:04,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-04-12 10:03:04,947 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:04,947 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:04,947 INFO L408 AbstractCegarLoop]: === Iteration 1 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:04,951 INFO L82 PathProgramCache]: Analyzing trace with hash -58907273, now seen corresponding path program 1 times [2018-04-12 10:03:04,952 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:04,952 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:04,984 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:04,984 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:04,984 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:05,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:05,028 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:05,081 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:05,083 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:03:05,083 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 10:03:05,084 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 10:03:05,091 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 10:03:05,092 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 10:03:05,093 INFO L87 Difference]: Start difference. First operand 49 states. Second operand 5 states. [2018-04-12 10:03:05,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:05,198 INFO L93 Difference]: Finished difference Result 91 states and 101 transitions. [2018-04-12 10:03:05,198 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 10:03:05,199 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 11 [2018-04-12 10:03:05,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:05,208 INFO L225 Difference]: With dead ends: 91 [2018-04-12 10:03:05,208 INFO L226 Difference]: Without dead ends: 86 [2018-04-12 10:03:05,210 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-12 10:03:05,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-04-12 10:03:05,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 49. [2018-04-12 10:03:05,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-04-12 10:03:05,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 56 transitions. [2018-04-12 10:03:05,236 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 56 transitions. Word has length 11 [2018-04-12 10:03:05,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:05,236 INFO L459 AbstractCegarLoop]: Abstraction has 49 states and 56 transitions. [2018-04-12 10:03:05,236 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 10:03:05,236 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 56 transitions. [2018-04-12 10:03:05,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-04-12 10:03:05,237 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:05,237 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:05,237 INFO L408 AbstractCegarLoop]: === Iteration 2 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:05,237 INFO L82 PathProgramCache]: Analyzing trace with hash -58905351, now seen corresponding path program 1 times [2018-04-12 10:03:05,237 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:05,237 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:05,238 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:05,238 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:05,238 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:05,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:05,247 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:05,277 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:05,278 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:03:05,278 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-12 10:03:05,279 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-12 10:03:05,279 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-12 10:03:05,279 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 10:03:05,280 INFO L87 Difference]: Start difference. First operand 49 states and 56 transitions. Second operand 3 states. [2018-04-12 10:03:05,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:05,301 INFO L93 Difference]: Finished difference Result 50 states and 56 transitions. [2018-04-12 10:03:05,301 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-12 10:03:05,301 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-04-12 10:03:05,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:05,302 INFO L225 Difference]: With dead ends: 50 [2018-04-12 10:03:05,302 INFO L226 Difference]: Without dead ends: 49 [2018-04-12 10:03:05,302 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 10:03:05,302 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-04-12 10:03:05,304 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 46. [2018-04-12 10:03:05,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-04-12 10:03:05,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 50 transitions. [2018-04-12 10:03:05,305 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 50 transitions. Word has length 11 [2018-04-12 10:03:05,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:05,305 INFO L459 AbstractCegarLoop]: Abstraction has 46 states and 50 transitions. [2018-04-12 10:03:05,305 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-12 10:03:05,305 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 50 transitions. [2018-04-12 10:03:05,305 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-04-12 10:03:05,306 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:05,306 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:05,306 INFO L408 AbstractCegarLoop]: === Iteration 3 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:05,306 INFO L82 PathProgramCache]: Analyzing trace with hash -2034104824, now seen corresponding path program 1 times [2018-04-12 10:03:05,306 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:05,306 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:05,306 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:05,307 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:05,307 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:05,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:05,320 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:05,352 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:05,353 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:03:05,353 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 10:03:05,353 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 10:03:05,353 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 10:03:05,353 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 10:03:05,353 INFO L87 Difference]: Start difference. First operand 46 states and 50 transitions. Second operand 4 states. [2018-04-12 10:03:05,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:05,392 INFO L93 Difference]: Finished difference Result 45 states and 49 transitions. [2018-04-12 10:03:05,393 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 10:03:05,393 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-04-12 10:03:05,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:05,393 INFO L225 Difference]: With dead ends: 45 [2018-04-12 10:03:05,394 INFO L226 Difference]: Without dead ends: 45 [2018-04-12 10:03:05,394 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 10:03:05,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-04-12 10:03:05,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-04-12 10:03:05,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-04-12 10:03:05,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 49 transitions. [2018-04-12 10:03:05,399 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 49 transitions. Word has length 15 [2018-04-12 10:03:05,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:05,399 INFO L459 AbstractCegarLoop]: Abstraction has 45 states and 49 transitions. [2018-04-12 10:03:05,399 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 10:03:05,399 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 49 transitions. [2018-04-12 10:03:05,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-04-12 10:03:05,400 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:05,400 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:05,400 INFO L408 AbstractCegarLoop]: === Iteration 4 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:05,400 INFO L82 PathProgramCache]: Analyzing trace with hash -2034104823, now seen corresponding path program 1 times [2018-04-12 10:03:05,400 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:05,400 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:05,401 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:05,401 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:05,401 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:05,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:05,413 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:05,484 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:05,484 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:03:05,484 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 10:03:05,485 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 10:03:05,485 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 10:03:05,485 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-04-12 10:03:05,485 INFO L87 Difference]: Start difference. First operand 45 states and 49 transitions. Second operand 6 states. [2018-04-12 10:03:05,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:05,546 INFO L93 Difference]: Finished difference Result 44 states and 48 transitions. [2018-04-12 10:03:05,547 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 10:03:05,547 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 15 [2018-04-12 10:03:05,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:05,548 INFO L225 Difference]: With dead ends: 44 [2018-04-12 10:03:05,548 INFO L226 Difference]: Without dead ends: 44 [2018-04-12 10:03:05,548 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-04-12 10:03:05,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-04-12 10:03:05,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-04-12 10:03:05,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-04-12 10:03:05,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 48 transitions. [2018-04-12 10:03:05,552 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 48 transitions. Word has length 15 [2018-04-12 10:03:05,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:05,552 INFO L459 AbstractCegarLoop]: Abstraction has 44 states and 48 transitions. [2018-04-12 10:03:05,553 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 10:03:05,553 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 48 transitions. [2018-04-12 10:03:05,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-04-12 10:03:05,553 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:05,553 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:05,553 INFO L408 AbstractCegarLoop]: === Iteration 5 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:05,554 INFO L82 PathProgramCache]: Analyzing trace with hash 1367259900, now seen corresponding path program 1 times [2018-04-12 10:03:05,554 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:05,554 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:05,555 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:05,555 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:05,555 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:05,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:05,565 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:05,584 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:05,584 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:03:05,584 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 10:03:05,585 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 10:03:05,585 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 10:03:05,585 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 10:03:05,585 INFO L87 Difference]: Start difference. First operand 44 states and 48 transitions. Second operand 4 states. [2018-04-12 10:03:05,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:05,628 INFO L93 Difference]: Finished difference Result 43 states and 47 transitions. [2018-04-12 10:03:05,628 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 10:03:05,628 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-04-12 10:03:05,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:05,629 INFO L225 Difference]: With dead ends: 43 [2018-04-12 10:03:05,629 INFO L226 Difference]: Without dead ends: 43 [2018-04-12 10:03:05,629 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 10:03:05,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-04-12 10:03:05,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-04-12 10:03:05,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-04-12 10:03:05,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 47 transitions. [2018-04-12 10:03:05,631 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 47 transitions. Word has length 16 [2018-04-12 10:03:05,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:05,631 INFO L459 AbstractCegarLoop]: Abstraction has 43 states and 47 transitions. [2018-04-12 10:03:05,631 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 10:03:05,631 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 47 transitions. [2018-04-12 10:03:05,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-04-12 10:03:05,631 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:05,632 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:05,632 INFO L408 AbstractCegarLoop]: === Iteration 6 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:05,632 INFO L82 PathProgramCache]: Analyzing trace with hash 1367259901, now seen corresponding path program 1 times [2018-04-12 10:03:05,632 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:05,632 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:05,632 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:05,633 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:05,633 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:05,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:05,643 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:05,678 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:05,679 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:03:05,679 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 10:03:05,679 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 10:03:05,679 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 10:03:05,679 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-04-12 10:03:05,679 INFO L87 Difference]: Start difference. First operand 43 states and 47 transitions. Second operand 6 states. [2018-04-12 10:03:05,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:05,739 INFO L93 Difference]: Finished difference Result 58 states and 62 transitions. [2018-04-12 10:03:05,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 10:03:05,740 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 16 [2018-04-12 10:03:05,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:05,740 INFO L225 Difference]: With dead ends: 58 [2018-04-12 10:03:05,740 INFO L226 Difference]: Without dead ends: 58 [2018-04-12 10:03:05,740 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2018-04-12 10:03:05,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-04-12 10:03:05,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 50. [2018-04-12 10:03:05,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-04-12 10:03:05,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2018-04-12 10:03:05,742 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 54 transitions. Word has length 16 [2018-04-12 10:03:05,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:05,743 INFO L459 AbstractCegarLoop]: Abstraction has 50 states and 54 transitions. [2018-04-12 10:03:05,743 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 10:03:05,743 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 54 transitions. [2018-04-12 10:03:05,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-04-12 10:03:05,743 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:05,743 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:05,743 INFO L408 AbstractCegarLoop]: === Iteration 7 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:05,743 INFO L82 PathProgramCache]: Analyzing trace with hash 557913275, now seen corresponding path program 1 times [2018-04-12 10:03:05,744 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:05,744 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:05,744 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:05,744 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:05,744 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:05,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:05,753 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:05,792 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:05,792 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:03:05,792 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 10:03:05,792 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 10:03:05,792 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 10:03:05,792 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-04-12 10:03:05,793 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. Second operand 6 states. [2018-04-12 10:03:05,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:05,828 INFO L93 Difference]: Finished difference Result 49 states and 53 transitions. [2018-04-12 10:03:05,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 10:03:05,828 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 16 [2018-04-12 10:03:05,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:05,829 INFO L225 Difference]: With dead ends: 49 [2018-04-12 10:03:05,829 INFO L226 Difference]: Without dead ends: 49 [2018-04-12 10:03:05,829 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-04-12 10:03:05,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-04-12 10:03:05,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 42. [2018-04-12 10:03:05,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-04-12 10:03:05,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 46 transitions. [2018-04-12 10:03:05,831 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 46 transitions. Word has length 16 [2018-04-12 10:03:05,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:05,831 INFO L459 AbstractCegarLoop]: Abstraction has 42 states and 46 transitions. [2018-04-12 10:03:05,831 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 10:03:05,831 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 46 transitions. [2018-04-12 10:03:05,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-04-12 10:03:05,831 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:05,831 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:05,831 INFO L408 AbstractCegarLoop]: === Iteration 8 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:05,832 INFO L82 PathProgramCache]: Analyzing trace with hash -1383367435, now seen corresponding path program 1 times [2018-04-12 10:03:05,832 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:05,832 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:05,832 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:05,832 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:05,832 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:05,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:05,840 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:05,863 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:05,863 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:03:05,864 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 10:03:05,864 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 10:03:05,864 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 10:03:05,864 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 10:03:05,864 INFO L87 Difference]: Start difference. First operand 42 states and 46 transitions. Second operand 5 states. [2018-04-12 10:03:05,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:05,914 INFO L93 Difference]: Finished difference Result 41 states and 45 transitions. [2018-04-12 10:03:05,914 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 10:03:05,914 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2018-04-12 10:03:05,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:05,915 INFO L225 Difference]: With dead ends: 41 [2018-04-12 10:03:05,915 INFO L226 Difference]: Without dead ends: 41 [2018-04-12 10:03:05,916 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-12 10:03:05,916 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-04-12 10:03:05,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-04-12 10:03:05,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-04-12 10:03:05,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 45 transitions. [2018-04-12 10:03:05,918 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 45 transitions. Word has length 20 [2018-04-12 10:03:05,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:05,918 INFO L459 AbstractCegarLoop]: Abstraction has 41 states and 45 transitions. [2018-04-12 10:03:05,918 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 10:03:05,918 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 45 transitions. [2018-04-12 10:03:05,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-04-12 10:03:05,919 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:05,919 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:05,919 INFO L408 AbstractCegarLoop]: === Iteration 9 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:05,919 INFO L82 PathProgramCache]: Analyzing trace with hash -1383367434, now seen corresponding path program 1 times [2018-04-12 10:03:05,919 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:05,919 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:05,920 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:05,920 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:05,920 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:05,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:05,933 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:05,999 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:05,999 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:03:05,999 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 10:03:05,999 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 10:03:05,999 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 10:03:05,999 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-04-12 10:03:06,000 INFO L87 Difference]: Start difference. First operand 41 states and 45 transitions. Second operand 7 states. [2018-04-12 10:03:06,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:06,084 INFO L93 Difference]: Finished difference Result 46 states and 51 transitions. [2018-04-12 10:03:06,084 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 10:03:06,084 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 20 [2018-04-12 10:03:06,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:06,084 INFO L225 Difference]: With dead ends: 46 [2018-04-12 10:03:06,085 INFO L226 Difference]: Without dead ends: 46 [2018-04-12 10:03:06,085 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2018-04-12 10:03:06,085 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-04-12 10:03:06,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 43. [2018-04-12 10:03:06,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-04-12 10:03:06,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 47 transitions. [2018-04-12 10:03:06,090 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 47 transitions. Word has length 20 [2018-04-12 10:03:06,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:06,090 INFO L459 AbstractCegarLoop]: Abstraction has 43 states and 47 transitions. [2018-04-12 10:03:06,090 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 10:03:06,090 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 47 transitions. [2018-04-12 10:03:06,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-12 10:03:06,093 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:06,094 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:06,094 INFO L408 AbstractCegarLoop]: === Iteration 10 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:06,094 INFO L82 PathProgramCache]: Analyzing trace with hash -1688021460, now seen corresponding path program 1 times [2018-04-12 10:03:06,094 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:06,094 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:06,095 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:06,095 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:06,095 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:06,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:06,107 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:06,166 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:06,166 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:03:06,166 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:03:06,174 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:06,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:06,218 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:03:06,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 10:03:06,252 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 10:03:06,252 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:06,253 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:06,254 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:06,254 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-04-12 10:03:06,283 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-12 10:03:06,284 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 10:03:06,284 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:06,285 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:06,286 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:06,286 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:15, output treesize:3 [2018-04-12 10:03:06,299 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:06,329 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-12 10:03:06,329 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [7] total 13 [2018-04-12 10:03:06,330 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-04-12 10:03:06,330 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-04-12 10:03:06,330 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-04-12 10:03:06,330 INFO L87 Difference]: Start difference. First operand 43 states and 47 transitions. Second operand 13 states. [2018-04-12 10:03:06,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:06,673 INFO L93 Difference]: Finished difference Result 88 states and 96 transitions. [2018-04-12 10:03:06,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-04-12 10:03:06,673 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 23 [2018-04-12 10:03:06,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:06,674 INFO L225 Difference]: With dead ends: 88 [2018-04-12 10:03:06,674 INFO L226 Difference]: Without dead ends: 88 [2018-04-12 10:03:06,675 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=119, Invalid=583, Unknown=0, NotChecked=0, Total=702 [2018-04-12 10:03:06,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-04-12 10:03:06,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 58. [2018-04-12 10:03:06,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-04-12 10:03:06,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 64 transitions. [2018-04-12 10:03:06,678 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 64 transitions. Word has length 23 [2018-04-12 10:03:06,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:06,678 INFO L459 AbstractCegarLoop]: Abstraction has 58 states and 64 transitions. [2018-04-12 10:03:06,678 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-04-12 10:03:06,678 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 64 transitions. [2018-04-12 10:03:06,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-12 10:03:06,678 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:06,679 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:06,679 INFO L408 AbstractCegarLoop]: === Iteration 11 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:06,679 INFO L82 PathProgramCache]: Analyzing trace with hash -789102402, now seen corresponding path program 1 times [2018-04-12 10:03:06,679 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:06,679 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:06,680 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:06,680 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:06,680 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:06,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:06,688 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:06,712 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:06,713 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:03:06,713 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 10:03:06,713 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 10:03:06,713 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 10:03:06,713 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-12 10:03:06,713 INFO L87 Difference]: Start difference. First operand 58 states and 64 transitions. Second operand 6 states. [2018-04-12 10:03:06,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:06,753 INFO L93 Difference]: Finished difference Result 57 states and 63 transitions. [2018-04-12 10:03:06,753 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 10:03:06,754 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 24 [2018-04-12 10:03:06,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:06,755 INFO L225 Difference]: With dead ends: 57 [2018-04-12 10:03:06,755 INFO L226 Difference]: Without dead ends: 57 [2018-04-12 10:03:06,755 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-04-12 10:03:06,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-04-12 10:03:06,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-04-12 10:03:06,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-04-12 10:03:06,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 63 transitions. [2018-04-12 10:03:06,759 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 63 transitions. Word has length 24 [2018-04-12 10:03:06,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:06,760 INFO L459 AbstractCegarLoop]: Abstraction has 57 states and 63 transitions. [2018-04-12 10:03:06,760 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 10:03:06,760 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 63 transitions. [2018-04-12 10:03:06,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-12 10:03:06,761 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:06,761 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:06,761 INFO L408 AbstractCegarLoop]: === Iteration 12 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:06,761 INFO L82 PathProgramCache]: Analyzing trace with hash -789102401, now seen corresponding path program 1 times [2018-04-12 10:03:06,761 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:06,761 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:06,762 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:06,762 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:06,762 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:06,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:06,768 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:06,846 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:06,846 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:03:06,846 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-12 10:03:06,846 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 10:03:06,847 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 10:03:06,847 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-04-12 10:03:06,847 INFO L87 Difference]: Start difference. First operand 57 states and 63 transitions. Second operand 9 states. [2018-04-12 10:03:06,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:06,938 INFO L93 Difference]: Finished difference Result 64 states and 71 transitions. [2018-04-12 10:03:06,938 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-12 10:03:06,938 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 24 [2018-04-12 10:03:06,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:06,939 INFO L225 Difference]: With dead ends: 64 [2018-04-12 10:03:06,939 INFO L226 Difference]: Without dead ends: 64 [2018-04-12 10:03:06,939 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2018-04-12 10:03:06,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-04-12 10:03:06,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 60. [2018-04-12 10:03:06,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-04-12 10:03:06,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 66 transitions. [2018-04-12 10:03:06,942 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 66 transitions. Word has length 24 [2018-04-12 10:03:06,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:06,942 INFO L459 AbstractCegarLoop]: Abstraction has 60 states and 66 transitions. [2018-04-12 10:03:06,943 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 10:03:06,943 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 66 transitions. [2018-04-12 10:03:06,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-04-12 10:03:06,943 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:06,943 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:06,943 INFO L408 AbstractCegarLoop]: === Iteration 13 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:06,943 INFO L82 PathProgramCache]: Analyzing trace with hash 1307629356, now seen corresponding path program 1 times [2018-04-12 10:03:06,944 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:06,944 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:06,944 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:06,944 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:06,945 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:06,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:06,951 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:06,980 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:06,981 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:03:06,981 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 10:03:06,981 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 10:03:06,981 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 10:03:06,981 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-12 10:03:06,981 INFO L87 Difference]: Start difference. First operand 60 states and 66 transitions. Second operand 6 states. [2018-04-12 10:03:07,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:07,022 INFO L93 Difference]: Finished difference Result 59 states and 65 transitions. [2018-04-12 10:03:07,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 10:03:07,022 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-04-12 10:03:07,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:07,022 INFO L225 Difference]: With dead ends: 59 [2018-04-12 10:03:07,022 INFO L226 Difference]: Without dead ends: 59 [2018-04-12 10:03:07,022 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-04-12 10:03:07,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-04-12 10:03:07,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-04-12 10:03:07,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-04-12 10:03:07,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 65 transitions. [2018-04-12 10:03:07,025 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 65 transitions. Word has length 25 [2018-04-12 10:03:07,025 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:07,025 INFO L459 AbstractCegarLoop]: Abstraction has 59 states and 65 transitions. [2018-04-12 10:03:07,025 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 10:03:07,025 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 65 transitions. [2018-04-12 10:03:07,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-04-12 10:03:07,025 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:07,026 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:07,026 INFO L408 AbstractCegarLoop]: === Iteration 14 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:07,026 INFO L82 PathProgramCache]: Analyzing trace with hash 1307629357, now seen corresponding path program 1 times [2018-04-12 10:03:07,026 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:07,026 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:07,026 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:07,026 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:07,026 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:07,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:07,034 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:07,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:07,105 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:03:07,105 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-04-12 10:03:07,105 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 10:03:07,105 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 10:03:07,106 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-04-12 10:03:07,106 INFO L87 Difference]: Start difference. First operand 59 states and 65 transitions. Second operand 8 states. [2018-04-12 10:03:07,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:07,229 INFO L93 Difference]: Finished difference Result 64 states and 71 transitions. [2018-04-12 10:03:07,230 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-12 10:03:07,230 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 25 [2018-04-12 10:03:07,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:07,230 INFO L225 Difference]: With dead ends: 64 [2018-04-12 10:03:07,230 INFO L226 Difference]: Without dead ends: 64 [2018-04-12 10:03:07,230 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=120, Unknown=0, NotChecked=0, Total=156 [2018-04-12 10:03:07,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-04-12 10:03:07,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 63. [2018-04-12 10:03:07,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-04-12 10:03:07,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 69 transitions. [2018-04-12 10:03:07,233 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 69 transitions. Word has length 25 [2018-04-12 10:03:07,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:07,233 INFO L459 AbstractCegarLoop]: Abstraction has 63 states and 69 transitions. [2018-04-12 10:03:07,233 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 10:03:07,233 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 69 transitions. [2018-04-12 10:03:07,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-04-12 10:03:07,234 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:07,234 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:07,234 INFO L408 AbstractCegarLoop]: === Iteration 15 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:07,235 INFO L82 PathProgramCache]: Analyzing trace with hash -69390988, now seen corresponding path program 1 times [2018-04-12 10:03:07,235 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:07,235 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:07,235 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:07,235 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:07,236 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:07,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:07,245 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:07,350 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 10:03:07,350 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:03:07,350 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-04-12 10:03:07,350 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-12 10:03:07,350 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-12 10:03:07,350 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2018-04-12 10:03:07,351 INFO L87 Difference]: Start difference. First operand 63 states and 69 transitions. Second operand 12 states. [2018-04-12 10:03:07,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:07,578 INFO L93 Difference]: Finished difference Result 102 states and 109 transitions. [2018-04-12 10:03:07,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-04-12 10:03:07,578 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 26 [2018-04-12 10:03:07,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:07,579 INFO L225 Difference]: With dead ends: 102 [2018-04-12 10:03:07,579 INFO L226 Difference]: Without dead ends: 102 [2018-04-12 10:03:07,579 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=150, Invalid=500, Unknown=0, NotChecked=0, Total=650 [2018-04-12 10:03:07,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-04-12 10:03:07,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 64. [2018-04-12 10:03:07,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-04-12 10:03:07,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 71 transitions. [2018-04-12 10:03:07,582 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 71 transitions. Word has length 26 [2018-04-12 10:03:07,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:07,582 INFO L459 AbstractCegarLoop]: Abstraction has 64 states and 71 transitions. [2018-04-12 10:03:07,582 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-12 10:03:07,582 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 71 transitions. [2018-04-12 10:03:07,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-04-12 10:03:07,583 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:07,583 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:07,583 INFO L408 AbstractCegarLoop]: === Iteration 16 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:07,583 INFO L82 PathProgramCache]: Analyzing trace with hash -1758334730, now seen corresponding path program 1 times [2018-04-12 10:03:07,583 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:07,584 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:07,584 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:07,584 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:07,584 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:07,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:07,593 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:07,715 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:07,715 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:03:07,715 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:03:07,721 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:07,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:07,733 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:03:07,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:07,738 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:07,742 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:07,743 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:14 [2018-04-12 10:03:07,767 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-12 10:03:07,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-12 10:03:07,769 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:07,770 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:07,774 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 10:03:07,774 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:24 [2018-04-12 10:03:07,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-04-12 10:03:07,888 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 11 [2018-04-12 10:03:07,888 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 10:03:07,890 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:07,898 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:07,899 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:37, output treesize:35 [2018-04-12 10:03:07,968 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:07,994 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:03:07,995 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 20 [2018-04-12 10:03:07,995 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-04-12 10:03:07,995 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-04-12 10:03:07,995 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=376, Unknown=0, NotChecked=0, Total=420 [2018-04-12 10:03:07,995 INFO L87 Difference]: Start difference. First operand 64 states and 71 transitions. Second operand 21 states. [2018-04-12 10:03:08,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:08,535 INFO L93 Difference]: Finished difference Result 83 states and 93 transitions. [2018-04-12 10:03:08,535 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-04-12 10:03:08,535 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 26 [2018-04-12 10:03:08,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:08,536 INFO L225 Difference]: With dead ends: 83 [2018-04-12 10:03:08,536 INFO L226 Difference]: Without dead ends: 83 [2018-04-12 10:03:08,537 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=127, Invalid=803, Unknown=0, NotChecked=0, Total=930 [2018-04-12 10:03:08,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-04-12 10:03:08,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 75. [2018-04-12 10:03:08,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-04-12 10:03:08,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 85 transitions. [2018-04-12 10:03:08,540 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 85 transitions. Word has length 26 [2018-04-12 10:03:08,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:08,540 INFO L459 AbstractCegarLoop]: Abstraction has 75 states and 85 transitions. [2018-04-12 10:03:08,540 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-04-12 10:03:08,540 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 85 transitions. [2018-04-12 10:03:08,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-04-12 10:03:08,541 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:08,541 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:08,541 INFO L408 AbstractCegarLoop]: === Iteration 17 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:08,541 INFO L82 PathProgramCache]: Analyzing trace with hash -1838913673, now seen corresponding path program 1 times [2018-04-12 10:03:08,541 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:08,541 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:08,542 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:08,542 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:08,546 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:08,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:08,557 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:08,635 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:08,636 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:03:08,636 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:03:08,644 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:08,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:08,665 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:03:08,675 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:08,675 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:08,678 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:08,678 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:9 [2018-04-12 10:03:08,755 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:08,782 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:03:08,782 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 9] total 16 [2018-04-12 10:03:08,783 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-12 10:03:08,783 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-12 10:03:08,783 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=235, Unknown=0, NotChecked=0, Total=272 [2018-04-12 10:03:08,783 INFO L87 Difference]: Start difference. First operand 75 states and 85 transitions. Second operand 17 states. [2018-04-12 10:03:09,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:09,108 INFO L93 Difference]: Finished difference Result 87 states and 100 transitions. [2018-04-12 10:03:09,108 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-12 10:03:09,108 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 28 [2018-04-12 10:03:09,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:09,109 INFO L225 Difference]: With dead ends: 87 [2018-04-12 10:03:09,109 INFO L226 Difference]: Without dead ends: 87 [2018-04-12 10:03:09,109 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=110, Invalid=592, Unknown=0, NotChecked=0, Total=702 [2018-04-12 10:03:09,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-04-12 10:03:09,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 80. [2018-04-12 10:03:09,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-04-12 10:03:09,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 91 transitions. [2018-04-12 10:03:09,111 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 91 transitions. Word has length 28 [2018-04-12 10:03:09,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:09,111 INFO L459 AbstractCegarLoop]: Abstraction has 80 states and 91 transitions. [2018-04-12 10:03:09,111 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-12 10:03:09,111 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 91 transitions. [2018-04-12 10:03:09,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-12 10:03:09,112 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:09,112 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:09,112 INFO L408 AbstractCegarLoop]: === Iteration 18 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:09,112 INFO L82 PathProgramCache]: Analyzing trace with hash -1372572863, now seen corresponding path program 1 times [2018-04-12 10:03:09,112 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:09,112 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:09,112 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:09,113 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:09,113 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:09,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:09,119 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:09,261 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:09,261 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:03:09,261 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-04-12 10:03:09,261 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-12 10:03:09,261 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-12 10:03:09,261 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-04-12 10:03:09,262 INFO L87 Difference]: Start difference. First operand 80 states and 91 transitions. Second operand 12 states. [2018-04-12 10:03:09,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:09,440 INFO L93 Difference]: Finished difference Result 144 states and 161 transitions. [2018-04-12 10:03:09,441 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-04-12 10:03:09,441 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 29 [2018-04-12 10:03:09,441 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:09,442 INFO L225 Difference]: With dead ends: 144 [2018-04-12 10:03:09,442 INFO L226 Difference]: Without dead ends: 144 [2018-04-12 10:03:09,442 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=85, Invalid=335, Unknown=0, NotChecked=0, Total=420 [2018-04-12 10:03:09,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-04-12 10:03:09,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 131. [2018-04-12 10:03:09,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-04-12 10:03:09,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 150 transitions. [2018-04-12 10:03:09,445 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 150 transitions. Word has length 29 [2018-04-12 10:03:09,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:09,446 INFO L459 AbstractCegarLoop]: Abstraction has 131 states and 150 transitions. [2018-04-12 10:03:09,446 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-12 10:03:09,446 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 150 transitions. [2018-04-12 10:03:09,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-12 10:03:09,447 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:09,447 INFO L355 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:09,447 INFO L408 AbstractCegarLoop]: === Iteration 19 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:09,447 INFO L82 PathProgramCache]: Analyzing trace with hash -1128799700, now seen corresponding path program 2 times [2018-04-12 10:03:09,447 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:09,447 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:09,448 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:09,448 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:09,448 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:09,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:09,459 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:09,720 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:09,720 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:03:09,720 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:03:09,725 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-12 10:03:09,741 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-12 10:03:09,741 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 10:03:09,743 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:03:09,747 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:09,747 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:09,752 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:09,752 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:14 [2018-04-12 10:03:09,771 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-12 10:03:09,773 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-12 10:03:09,773 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:09,774 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:09,779 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 10:03:09,779 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:24 [2018-04-12 10:03:09,917 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-04-12 10:03:09,920 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:09,927 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 25 [2018-04-12 10:03:09,928 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 10:03:09,942 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:09,956 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:09,956 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:58 [2018-04-12 10:03:10,057 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:10,085 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:03:10,085 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14] total 24 [2018-04-12 10:03:10,085 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-04-12 10:03:10,086 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-04-12 10:03:10,086 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=528, Unknown=0, NotChecked=0, Total=600 [2018-04-12 10:03:10,086 INFO L87 Difference]: Start difference. First operand 131 states and 150 transitions. Second operand 25 states. [2018-04-12 10:03:10,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:10,535 INFO L93 Difference]: Finished difference Result 175 states and 200 transitions. [2018-04-12 10:03:10,535 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-04-12 10:03:10,535 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 29 [2018-04-12 10:03:10,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:10,536 INFO L225 Difference]: With dead ends: 175 [2018-04-12 10:03:10,536 INFO L226 Difference]: Without dead ends: 175 [2018-04-12 10:03:10,537 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 214 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=180, Invalid=1152, Unknown=0, NotChecked=0, Total=1332 [2018-04-12 10:03:10,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-04-12 10:03:10,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 137. [2018-04-12 10:03:10,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-04-12 10:03:10,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 158 transitions. [2018-04-12 10:03:10,542 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 158 transitions. Word has length 29 [2018-04-12 10:03:10,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:10,542 INFO L459 AbstractCegarLoop]: Abstraction has 137 states and 158 transitions. [2018-04-12 10:03:10,542 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-04-12 10:03:10,542 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 158 transitions. [2018-04-12 10:03:10,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-12 10:03:10,543 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:10,543 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:10,544 INFO L408 AbstractCegarLoop]: === Iteration 20 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:10,544 INFO L82 PathProgramCache]: Analyzing trace with hash 1116956099, now seen corresponding path program 1 times [2018-04-12 10:03:10,544 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:10,544 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:10,545 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:10,545 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 10:03:10,545 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:10,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:10,553 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:10,674 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:10,674 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:03:10,674 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-04-12 10:03:10,674 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-04-12 10:03:10,675 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-04-12 10:03:10,675 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2018-04-12 10:03:10,675 INFO L87 Difference]: Start difference. First operand 137 states and 158 transitions. Second operand 15 states. [2018-04-12 10:03:10,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:10,947 INFO L93 Difference]: Finished difference Result 180 states and 199 transitions. [2018-04-12 10:03:10,947 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-04-12 10:03:10,947 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 29 [2018-04-12 10:03:10,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:10,948 INFO L225 Difference]: With dead ends: 180 [2018-04-12 10:03:10,948 INFO L226 Difference]: Without dead ends: 180 [2018-04-12 10:03:10,949 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 199 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=233, Invalid=889, Unknown=0, NotChecked=0, Total=1122 [2018-04-12 10:03:10,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-04-12 10:03:10,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 157. [2018-04-12 10:03:10,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-04-12 10:03:10,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 178 transitions. [2018-04-12 10:03:10,953 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 178 transitions. Word has length 29 [2018-04-12 10:03:10,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:10,953 INFO L459 AbstractCegarLoop]: Abstraction has 157 states and 178 transitions. [2018-04-12 10:03:10,953 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-04-12 10:03:10,953 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 178 transitions. [2018-04-12 10:03:10,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-12 10:03:10,954 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:10,954 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:10,954 INFO L408 AbstractCegarLoop]: === Iteration 21 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:10,954 INFO L82 PathProgramCache]: Analyzing trace with hash 1335810817, now seen corresponding path program 1 times [2018-04-12 10:03:10,954 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:10,954 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:10,955 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:10,955 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:10,955 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:10,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:10,963 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:11,082 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:11,082 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:03:11,082 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:03:11,088 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:11,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:11,101 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:03:11,104 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:11,105 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:11,106 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:11,106 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 10:03:11,129 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:11,129 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:11,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 10:03:11,130 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:11,132 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:11,132 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:8 [2018-04-12 10:03:11,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-12 10:03:11,162 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-12 10:03:11,163 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:11,164 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:11,167 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 10:03:11,167 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:25 [2018-04-12 10:03:11,186 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 26 [2018-04-12 10:03:11,187 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-12 10:03:11,187 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:11,190 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:11,196 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-04-12 10:03:11,196 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:39, output treesize:35 [2018-04-12 10:03:11,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 28 [2018-04-12 10:03:11,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 13 [2018-04-12 10:03:11,326 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 10:03:11,331 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-04-12 10:03:11,332 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:11,334 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:11,341 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:11,341 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 6 variables, input treesize:52, output treesize:29 [2018-04-12 10:03:11,369 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:11,386 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:03:11,386 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14] total 23 [2018-04-12 10:03:11,387 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-12 10:03:11,387 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-12 10:03:11,387 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=495, Unknown=0, NotChecked=0, Total=552 [2018-04-12 10:03:11,387 INFO L87 Difference]: Start difference. First operand 157 states and 178 transitions. Second operand 24 states. [2018-04-12 10:03:11,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:11,946 INFO L93 Difference]: Finished difference Result 165 states and 187 transitions. [2018-04-12 10:03:11,946 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-04-12 10:03:11,947 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 29 [2018-04-12 10:03:11,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:11,947 INFO L225 Difference]: With dead ends: 165 [2018-04-12 10:03:11,947 INFO L226 Difference]: Without dead ends: 165 [2018-04-12 10:03:11,948 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 211 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=174, Invalid=1086, Unknown=0, NotChecked=0, Total=1260 [2018-04-12 10:03:11,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-04-12 10:03:11,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 162. [2018-04-12 10:03:11,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-04-12 10:03:11,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 183 transitions. [2018-04-12 10:03:11,952 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 183 transitions. Word has length 29 [2018-04-12 10:03:11,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:11,952 INFO L459 AbstractCegarLoop]: Abstraction has 162 states and 183 transitions. [2018-04-12 10:03:11,952 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-12 10:03:11,952 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 183 transitions. [2018-04-12 10:03:11,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-04-12 10:03:11,953 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:11,953 INFO L355 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:11,953 INFO L408 AbstractCegarLoop]: === Iteration 22 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:11,954 INFO L82 PathProgramCache]: Analyzing trace with hash 1522064694, now seen corresponding path program 3 times [2018-04-12 10:03:11,954 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:11,954 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:11,954 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:11,954 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:11,954 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:11,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:11,961 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:12,198 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:12,198 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:03:12,198 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:03:12,203 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-12 10:03:12,221 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-04-12 10:03:12,222 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 10:03:12,224 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:03:12,228 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:12,229 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:12,232 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:12,232 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:14 [2018-04-12 10:03:12,268 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-12 10:03:12,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-12 10:03:12,270 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:12,271 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:12,274 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 10:03:12,274 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:24 [2018-04-12 10:03:12,520 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 26 [2018-04-12 10:03:12,539 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 4 case distinctions, treesize of input 26 treesize of output 58 [2018-04-12 10:03:12,542 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 10 xjuncts. [2018-04-12 10:03:12,564 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:12,586 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:12,586 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:60, output treesize:61 [2018-04-12 10:03:12,703 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:12,720 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:03:12,720 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 17] total 29 [2018-04-12 10:03:12,721 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-04-12 10:03:12,721 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-04-12 10:03:12,721 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=798, Unknown=0, NotChecked=0, Total=870 [2018-04-12 10:03:12,721 INFO L87 Difference]: Start difference. First operand 162 states and 183 transitions. Second operand 30 states. [2018-04-12 10:03:13,107 WARN L151 SmtUtils]: Spent 236ms on a formula simplification. DAG size of input: 53 DAG size of output 29 [2018-04-12 10:03:16,383 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:16,383 INFO L93 Difference]: Finished difference Result 213 states and 240 transitions. [2018-04-12 10:03:16,385 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-12 10:03:16,385 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 32 [2018-04-12 10:03:16,385 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:16,385 INFO L225 Difference]: With dead ends: 213 [2018-04-12 10:03:16,385 INFO L226 Difference]: Without dead ends: 213 [2018-04-12 10:03:16,386 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 264 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=266, Invalid=2085, Unknown=1, NotChecked=0, Total=2352 [2018-04-12 10:03:16,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-04-12 10:03:16,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 168. [2018-04-12 10:03:16,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-04-12 10:03:16,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 191 transitions. [2018-04-12 10:03:16,389 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 191 transitions. Word has length 32 [2018-04-12 10:03:16,389 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:16,389 INFO L459 AbstractCegarLoop]: Abstraction has 168 states and 191 transitions. [2018-04-12 10:03:16,389 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-04-12 10:03:16,389 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 191 transitions. [2018-04-12 10:03:16,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-04-12 10:03:16,389 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:16,389 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:16,389 INFO L408 AbstractCegarLoop]: === Iteration 23 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:16,390 INFO L82 PathProgramCache]: Analyzing trace with hash 1308976227, now seen corresponding path program 1 times [2018-04-12 10:03:16,390 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:16,390 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:16,390 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:16,390 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 10:03:16,390 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:16,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:16,398 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:16,545 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:16,545 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:03:16,545 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:03:16,550 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:16,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:16,566 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:03:16,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:16,569 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:16,573 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:16,574 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:16,577 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:16,577 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:18, output treesize:13 [2018-04-12 10:03:16,607 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:16,608 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:16,608 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-04-12 10:03:16,609 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:16,616 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:16,616 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:16,617 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 10:03:16,617 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:16,621 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:16,621 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:27, output treesize:13 [2018-04-12 10:03:16,785 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:16,804 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:03:16,804 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15] total 28 [2018-04-12 10:03:16,804 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-04-12 10:03:16,804 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-04-12 10:03:16,804 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=740, Unknown=0, NotChecked=0, Total=812 [2018-04-12 10:03:16,805 INFO L87 Difference]: Start difference. First operand 168 states and 191 transitions. Second operand 29 states. [2018-04-12 10:03:17,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:17,526 INFO L93 Difference]: Finished difference Result 209 states and 238 transitions. [2018-04-12 10:03:17,526 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-12 10:03:17,526 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 33 [2018-04-12 10:03:17,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:17,527 INFO L225 Difference]: With dead ends: 209 [2018-04-12 10:03:17,527 INFO L226 Difference]: Without dead ends: 209 [2018-04-12 10:03:17,528 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 443 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=289, Invalid=2161, Unknown=0, NotChecked=0, Total=2450 [2018-04-12 10:03:17,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2018-04-12 10:03:17,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 172. [2018-04-12 10:03:17,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-04-12 10:03:17,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 197 transitions. [2018-04-12 10:03:17,531 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 197 transitions. Word has length 33 [2018-04-12 10:03:17,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:17,531 INFO L459 AbstractCegarLoop]: Abstraction has 172 states and 197 transitions. [2018-04-12 10:03:17,531 INFO L460 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-04-12 10:03:17,531 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 197 transitions. [2018-04-12 10:03:17,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-04-12 10:03:17,532 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:17,532 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:17,532 INFO L408 AbstractCegarLoop]: === Iteration 24 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:17,532 INFO L82 PathProgramCache]: Analyzing trace with hash 2061021759, now seen corresponding path program 2 times [2018-04-12 10:03:17,532 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:17,532 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:17,532 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:17,533 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:17,533 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:17,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:17,541 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:17,809 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:17,810 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:03:17,810 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:03:17,815 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-12 10:03:17,834 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-12 10:03:17,835 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 10:03:17,837 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:03:17,845 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:17,845 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:17,849 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:17,849 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:17,852 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:17,852 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-04-12 10:03:17,868 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:17,869 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:17,869 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 10:03:17,869 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:17,874 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 10:03:17,874 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:17,877 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:17,877 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:13 [2018-04-12 10:03:17,904 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-04-12 10:03:17,905 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-04-12 10:03:17,906 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:17,907 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:17,909 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:17,910 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:27, output treesize:20 [2018-04-12 10:03:17,929 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-04-12 10:03:17,931 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-12 10:03:17,931 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:17,934 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:17,937 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 10:03:17,938 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:34, output treesize:30 [2018-04-12 10:03:18,059 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 32 [2018-04-12 10:03:18,065 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 25 [2018-04-12 10:03:18,066 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 10:03:18,074 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:18,085 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-04-12 10:03:18,086 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:43, output treesize:51 [2018-04-12 10:03:18,139 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-04-12 10:03:18,143 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 14 [2018-04-12 10:03:18,144 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 10:03:18,153 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:18,157 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:18,158 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:38 [2018-04-12 10:03:18,232 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:18,250 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:03:18,250 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 16] total 29 [2018-04-12 10:03:18,250 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-04-12 10:03:18,250 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-04-12 10:03:18,250 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=793, Unknown=0, NotChecked=0, Total=870 [2018-04-12 10:03:18,250 INFO L87 Difference]: Start difference. First operand 172 states and 197 transitions. Second operand 30 states. [2018-04-12 10:03:18,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:18,780 INFO L93 Difference]: Finished difference Result 194 states and 224 transitions. [2018-04-12 10:03:18,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-12 10:03:18,781 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 34 [2018-04-12 10:03:18,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:18,781 INFO L225 Difference]: With dead ends: 194 [2018-04-12 10:03:18,781 INFO L226 Difference]: Without dead ends: 194 [2018-04-12 10:03:18,782 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 20 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 294 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=181, Invalid=1541, Unknown=0, NotChecked=0, Total=1722 [2018-04-12 10:03:18,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-04-12 10:03:18,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 182. [2018-04-12 10:03:18,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-04-12 10:03:18,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 210 transitions. [2018-04-12 10:03:18,786 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 210 transitions. Word has length 34 [2018-04-12 10:03:18,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:18,786 INFO L459 AbstractCegarLoop]: Abstraction has 182 states and 210 transitions. [2018-04-12 10:03:18,786 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-04-12 10:03:18,786 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 210 transitions. [2018-04-12 10:03:18,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-04-12 10:03:18,787 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:18,787 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:18,787 INFO L408 AbstractCegarLoop]: === Iteration 25 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:18,787 INFO L82 PathProgramCache]: Analyzing trace with hash -4260326, now seen corresponding path program 1 times [2018-04-12 10:03:18,787 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:18,787 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:18,787 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:18,788 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 10:03:18,788 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:18,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:18,792 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:18,841 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:18,841 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:03:18,841 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 10:03:18,841 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 10:03:18,841 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 10:03:18,841 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-12 10:03:18,842 INFO L87 Difference]: Start difference. First operand 182 states and 210 transitions. Second operand 6 states. [2018-04-12 10:03:18,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:18,890 INFO L93 Difference]: Finished difference Result 181 states and 209 transitions. [2018-04-12 10:03:18,890 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 10:03:18,890 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-04-12 10:03:18,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:18,891 INFO L225 Difference]: With dead ends: 181 [2018-04-12 10:03:18,891 INFO L226 Difference]: Without dead ends: 119 [2018-04-12 10:03:18,891 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-04-12 10:03:18,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-04-12 10:03:18,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 114. [2018-04-12 10:03:18,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-04-12 10:03:18,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 124 transitions. [2018-04-12 10:03:18,892 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 124 transitions. Word has length 35 [2018-04-12 10:03:18,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:18,892 INFO L459 AbstractCegarLoop]: Abstraction has 114 states and 124 transitions. [2018-04-12 10:03:18,893 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 10:03:18,893 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 124 transitions. [2018-04-12 10:03:18,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-04-12 10:03:18,893 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:18,893 INFO L355 BasicCegarLoop]: trace histogram [6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:18,893 INFO L408 AbstractCegarLoop]: === Iteration 26 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:18,893 INFO L82 PathProgramCache]: Analyzing trace with hash 1859554796, now seen corresponding path program 4 times [2018-04-12 10:03:18,893 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:18,893 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:18,894 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:18,894 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:03:18,894 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:18,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:18,901 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:19,270 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:19,271 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:03:19,271 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:03:19,276 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-12 10:03:19,291 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-12 10:03:19,291 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 10:03:19,294 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:03:19,301 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:19,301 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:19,305 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:19,305 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:14 [2018-04-12 10:03:19,338 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-12 10:03:19,339 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-12 10:03:19,339 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:19,340 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:19,344 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 10:03:19,344 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:24 [2018-04-12 10:03:19,639 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 38 [2018-04-12 10:03:19,641 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:19,642 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:19,642 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:19,643 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:19,643 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:19,645 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:19,651 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 12 disjoint index pairs (out of 10 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 93 [2018-04-12 10:03:19,652 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 10:03:19,672 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:19,688 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:19,688 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:69, output treesize:73 [2018-04-12 10:03:19,806 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:19,835 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:03:19,835 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 18] total 33 [2018-04-12 10:03:19,836 INFO L442 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-04-12 10:03:19,836 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-04-12 10:03:19,836 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=128, Invalid=994, Unknown=0, NotChecked=0, Total=1122 [2018-04-12 10:03:19,836 INFO L87 Difference]: Start difference. First operand 114 states and 124 transitions. Second operand 34 states. [2018-04-12 10:03:22,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:22,640 INFO L93 Difference]: Finished difference Result 150 states and 163 transitions. [2018-04-12 10:03:22,640 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-04-12 10:03:22,641 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 35 [2018-04-12 10:03:22,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:22,641 INFO L225 Difference]: With dead ends: 150 [2018-04-12 10:03:22,641 INFO L226 Difference]: Without dead ends: 150 [2018-04-12 10:03:22,642 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 488 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=324, Invalid=2432, Unknown=0, NotChecked=0, Total=2756 [2018-04-12 10:03:22,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-04-12 10:03:22,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 126. [2018-04-12 10:03:22,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-12 10:03:22,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 138 transitions. [2018-04-12 10:03:22,644 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 138 transitions. Word has length 35 [2018-04-12 10:03:22,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:22,644 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 138 transitions. [2018-04-12 10:03:22,644 INFO L460 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-04-12 10:03:22,644 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 138 transitions. [2018-04-12 10:03:22,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-04-12 10:03:22,644 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:22,644 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:22,644 INFO L408 AbstractCegarLoop]: === Iteration 27 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:22,644 INFO L82 PathProgramCache]: Analyzing trace with hash 1280639017, now seen corresponding path program 2 times [2018-04-12 10:03:22,644 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:22,645 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:22,645 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:22,645 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 10:03:22,645 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:22,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:22,651 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:22,904 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:22,904 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:03:22,904 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:03:22,910 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-12 10:03:22,929 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-12 10:03:22,929 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 10:03:22,931 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:03:22,939 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:22,939 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:22,943 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:22,944 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:22,947 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:22,947 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:21, output treesize:16 [2018-04-12 10:03:22,983 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:22,983 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:22,984 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 10:03:22,984 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:22,990 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:22,991 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-04-12 10:03:22,991 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:22,996 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:22,996 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:30, output treesize:16 [2018-04-12 10:03:23,030 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-12 10:03:23,031 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-12 10:03:23,031 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:23,032 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:23,036 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 10:03:23,036 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:30, output treesize:26 [2018-04-12 10:03:23,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-04-12 10:03:23,105 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 15 [2018-04-12 10:03:23,106 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 10:03:23,110 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:23,116 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:23,116 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:33, output treesize:39 [2018-04-12 10:03:23,268 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:23,285 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:03:23,285 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17] total 33 [2018-04-12 10:03:23,285 INFO L442 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-04-12 10:03:23,285 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-04-12 10:03:23,286 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=1036, Unknown=0, NotChecked=0, Total=1122 [2018-04-12 10:03:23,286 INFO L87 Difference]: Start difference. First operand 126 states and 138 transitions. Second operand 34 states. [2018-04-12 10:03:24,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:24,582 INFO L93 Difference]: Finished difference Result 160 states and 172 transitions. [2018-04-12 10:03:24,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-12 10:03:24,583 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 36 [2018-04-12 10:03:24,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:24,583 INFO L225 Difference]: With dead ends: 160 [2018-04-12 10:03:24,583 INFO L226 Difference]: Without dead ends: 160 [2018-04-12 10:03:24,584 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 896 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=390, Invalid=3392, Unknown=0, NotChecked=0, Total=3782 [2018-04-12 10:03:24,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-04-12 10:03:24,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 126. [2018-04-12 10:03:24,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-12 10:03:24,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 138 transitions. [2018-04-12 10:03:24,586 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 138 transitions. Word has length 36 [2018-04-12 10:03:24,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:24,586 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 138 transitions. [2018-04-12 10:03:24,586 INFO L460 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-04-12 10:03:24,586 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 138 transitions. [2018-04-12 10:03:24,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-04-12 10:03:24,586 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:24,586 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:24,586 INFO L408 AbstractCegarLoop]: === Iteration 28 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:24,587 INFO L82 PathProgramCache]: Analyzing trace with hash -1225150015, now seen corresponding path program 3 times [2018-04-12 10:03:24,587 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:24,587 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:24,587 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:24,587 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 10:03:24,587 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:24,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:24,593 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:24,788 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 10:03:24,788 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:03:24,789 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:03:24,794 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-12 10:03:24,814 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-04-12 10:03:24,814 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 10:03:24,816 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:03:24,822 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:24,822 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:24,825 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:24,826 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:24,828 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:24,828 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-04-12 10:03:24,853 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:24,853 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:24,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 10:03:24,854 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:24,861 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 10:03:24,861 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:24,864 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:24,864 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:13 [2018-04-12 10:03:24,896 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-04-12 10:03:24,898 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-04-12 10:03:24,898 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:24,900 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:24,904 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 10:03:24,904 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:23 [2018-04-12 10:03:24,926 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-04-12 10:03:24,927 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-12 10:03:24,927 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:24,930 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:24,935 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-12 10:03:24,935 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:37, output treesize:33 [2018-04-12 10:03:25,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-04-12 10:03:25,122 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 25 [2018-04-12 10:03:25,123 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 10:03:25,143 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:25,163 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-04-12 10:03:25,163 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:44, output treesize:57 [2018-04-12 10:03:25,212 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 24 [2018-04-12 10:03:25,215 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 10:03:25,216 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:25,220 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:25,225 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:25,225 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:27, output treesize:16 [2018-04-12 10:03:25,264 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-04-12 10:03:25,272 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 14 [2018-04-12 10:03:25,272 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 10:03:25,275 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:25,282 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:25,282 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:32 [2018-04-12 10:03:25,338 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-04-12 10:03:25,368 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:03:25,369 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16] total 29 [2018-04-12 10:03:25,369 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-04-12 10:03:25,369 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-04-12 10:03:25,369 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=777, Unknown=0, NotChecked=0, Total=870 [2018-04-12 10:03:25,370 INFO L87 Difference]: Start difference. First operand 126 states and 138 transitions. Second operand 30 states. [2018-04-12 10:03:25,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:25,936 INFO L93 Difference]: Finished difference Result 125 states and 136 transitions. [2018-04-12 10:03:25,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-12 10:03:25,936 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 39 [2018-04-12 10:03:25,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:25,937 INFO L225 Difference]: With dead ends: 125 [2018-04-12 10:03:25,937 INFO L226 Difference]: Without dead ends: 95 [2018-04-12 10:03:25,937 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 26 SyntacticMatches, 3 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 346 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=243, Invalid=1479, Unknown=0, NotChecked=0, Total=1722 [2018-04-12 10:03:25,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-04-12 10:03:25,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 86. [2018-04-12 10:03:25,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-04-12 10:03:25,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 92 transitions. [2018-04-12 10:03:25,939 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 92 transitions. Word has length 39 [2018-04-12 10:03:25,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:25,939 INFO L459 AbstractCegarLoop]: Abstraction has 86 states and 92 transitions. [2018-04-12 10:03:25,939 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-04-12 10:03:25,939 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 92 transitions. [2018-04-12 10:03:25,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-04-12 10:03:25,940 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:25,940 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:25,940 INFO L408 AbstractCegarLoop]: === Iteration 29 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:25,940 INFO L82 PathProgramCache]: Analyzing trace with hash -1099594077, now seen corresponding path program 3 times [2018-04-12 10:03:25,940 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:25,940 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:25,941 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:25,941 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 10:03:25,941 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:25,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:25,954 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:26,398 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:26,398 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:03:26,398 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:03:26,403 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-12 10:03:26,423 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-04-12 10:03:26,423 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 10:03:26,426 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:03:26,429 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:26,429 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:26,435 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:26,435 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:26,440 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:26,440 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:24, output treesize:19 [2018-04-12 10:03:26,484 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:26,485 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:26,485 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-04-12 10:03:26,485 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:26,500 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:26,500 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:26,501 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 10:03:26,501 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:26,506 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:26,506 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:33, output treesize:19 [2018-04-12 10:03:26,546 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-12 10:03:26,552 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-12 10:03:26,553 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:26,554 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:26,559 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 10:03:26,559 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:33, output treesize:29 [2018-04-12 10:03:26,696 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-04-12 10:03:26,704 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 29 [2018-04-12 10:03:26,705 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 3 xjuncts. [2018-04-12 10:03:26,715 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:26,729 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:26,729 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:43, output treesize:99 [2018-04-12 10:03:26,944 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:26,962 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:03:26,962 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 19] total 37 [2018-04-12 10:03:26,962 INFO L442 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-04-12 10:03:26,962 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-04-12 10:03:26,962 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=1303, Unknown=0, NotChecked=0, Total=1406 [2018-04-12 10:03:26,963 INFO L87 Difference]: Start difference. First operand 86 states and 92 transitions. Second operand 38 states. [2018-04-12 10:03:27,439 WARN L151 SmtUtils]: Spent 288ms on a formula simplification. DAG size of input: 67 DAG size of output 44 [2018-04-12 10:03:28,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:28,284 INFO L93 Difference]: Finished difference Result 101 states and 107 transitions. [2018-04-12 10:03:28,284 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-12 10:03:28,284 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 39 [2018-04-12 10:03:28,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:28,285 INFO L225 Difference]: With dead ends: 101 [2018-04-12 10:03:28,285 INFO L226 Difference]: Without dead ends: 101 [2018-04-12 10:03:28,285 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 648 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=268, Invalid=2594, Unknown=0, NotChecked=0, Total=2862 [2018-04-12 10:03:28,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-04-12 10:03:28,286 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 96. [2018-04-12 10:03:28,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-04-12 10:03:28,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 102 transitions. [2018-04-12 10:03:28,287 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 102 transitions. Word has length 39 [2018-04-12 10:03:28,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:28,287 INFO L459 AbstractCegarLoop]: Abstraction has 96 states and 102 transitions. [2018-04-12 10:03:28,287 INFO L460 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-04-12 10:03:28,287 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 102 transitions. [2018-04-12 10:03:28,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-04-12 10:03:28,287 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:28,287 INFO L355 BasicCegarLoop]: trace histogram [8, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:28,287 INFO L408 AbstractCegarLoop]: === Iteration 30 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:28,288 INFO L82 PathProgramCache]: Analyzing trace with hash 146106796, now seen corresponding path program 5 times [2018-04-12 10:03:28,288 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:28,288 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:28,288 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:28,288 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 10:03:28,288 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:28,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:28,300 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:29,204 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:29,204 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:03:29,204 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:03:29,209 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-12 10:03:29,226 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2018-04-12 10:03:29,226 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 10:03:29,228 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:03:29,230 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:29,230 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:29,234 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:29,234 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:14 [2018-04-12 10:03:29,271 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-12 10:03:29,272 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-12 10:03:29,272 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:29,275 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:29,278 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 10:03:29,278 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:24 [2018-04-12 10:03:30,590 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 54 [2018-04-12 10:03:30,593 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:30,593 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:30,594 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:30,594 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:30,595 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:30,595 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:30,596 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:30,596 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:30,597 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:30,597 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:30,598 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:30,598 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:30,599 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:30,599 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:30,600 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:30,612 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 25 disjoint index pairs (out of 21 index pairs), introduced 5 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 187 [2018-04-12 10:03:30,613 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 10:03:30,662 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:30,690 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:30,690 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:89, output treesize:101 [2018-04-12 10:03:30,811 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:30,828 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:03:30,829 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 22] total 41 [2018-04-12 10:03:30,829 INFO L442 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-04-12 10:03:30,829 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-04-12 10:03:30,830 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=216, Invalid=1505, Unknown=1, NotChecked=0, Total=1722 [2018-04-12 10:03:30,830 INFO L87 Difference]: Start difference. First operand 96 states and 102 transitions. Second operand 42 states. [2018-04-12 10:03:35,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:35,918 INFO L93 Difference]: Finished difference Result 152 states and 163 transitions. [2018-04-12 10:03:35,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-04-12 10:03:35,918 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 41 [2018-04-12 10:03:35,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:35,918 INFO L225 Difference]: With dead ends: 152 [2018-04-12 10:03:35,919 INFO L226 Difference]: Without dead ends: 152 [2018-04-12 10:03:35,919 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1011 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=611, Invalid=4077, Unknown=4, NotChecked=0, Total=4692 [2018-04-12 10:03:35,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-04-12 10:03:35,921 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 120. [2018-04-12 10:03:35,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-04-12 10:03:35,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 130 transitions. [2018-04-12 10:03:35,922 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 130 transitions. Word has length 41 [2018-04-12 10:03:35,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:35,922 INFO L459 AbstractCegarLoop]: Abstraction has 120 states and 130 transitions. [2018-04-12 10:03:35,922 INFO L460 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-04-12 10:03:35,922 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 130 transitions. [2018-04-12 10:03:35,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-04-12 10:03:35,923 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:35,923 INFO L355 BasicCegarLoop]: trace histogram [5, 5, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:35,923 INFO L408 AbstractCegarLoop]: === Iteration 31 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:35,923 INFO L82 PathProgramCache]: Analyzing trace with hash -713640471, now seen corresponding path program 4 times [2018-04-12 10:03:35,923 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:35,923 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:35,924 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:35,924 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 10:03:35,924 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:35,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:35,935 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:36,672 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:36,672 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:03:36,672 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:03:36,677 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-12 10:03:36,692 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-12 10:03:36,692 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 10:03:36,694 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:03:36,697 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:36,697 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:36,701 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:36,701 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:36,705 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:36,705 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:21, output treesize:16 [2018-04-12 10:03:36,745 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:36,746 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:36,746 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-04-12 10:03:36,746 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:36,753 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:36,754 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:36,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 10:03:36,754 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:36,758 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:36,758 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:30, output treesize:16 [2018-04-12 10:03:36,796 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-12 10:03:36,797 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-12 10:03:36,797 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:36,798 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:36,802 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 10:03:36,802 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:30, output treesize:26 [2018-04-12 10:03:37,320 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 30 [2018-04-12 10:03:37,321 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:37,322 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:37,322 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:37,328 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 58 [2018-04-12 10:03:37,328 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 10:03:37,341 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:37,355 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:37,355 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:61, output treesize:84 [2018-04-12 10:03:37,583 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:37,600 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:03:37,600 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 21] total 41 [2018-04-12 10:03:37,601 INFO L442 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-04-12 10:03:37,601 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-04-12 10:03:37,601 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=108, Invalid=1613, Unknown=1, NotChecked=0, Total=1722 [2018-04-12 10:03:37,601 INFO L87 Difference]: Start difference. First operand 120 states and 130 transitions. Second operand 42 states. [2018-04-12 10:03:39,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:39,747 INFO L93 Difference]: Finished difference Result 139 states and 149 transitions. [2018-04-12 10:03:39,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-04-12 10:03:39,747 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 42 [2018-04-12 10:03:39,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:39,747 INFO L225 Difference]: With dead ends: 139 [2018-04-12 10:03:39,748 INFO L226 Difference]: Without dead ends: 139 [2018-04-12 10:03:39,748 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1017 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=326, Invalid=3963, Unknown=1, NotChecked=0, Total=4290 [2018-04-12 10:03:39,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-04-12 10:03:39,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 125. [2018-04-12 10:03:39,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-12 10:03:39,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 135 transitions. [2018-04-12 10:03:39,750 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 135 transitions. Word has length 42 [2018-04-12 10:03:39,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:39,750 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 135 transitions. [2018-04-12 10:03:39,750 INFO L460 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-04-12 10:03:39,750 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 135 transitions. [2018-04-12 10:03:39,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-04-12 10:03:39,750 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:39,750 INFO L355 BasicCegarLoop]: trace histogram [6, 6, 5, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:39,750 INFO L408 AbstractCegarLoop]: === Iteration 32 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:39,751 INFO L82 PathProgramCache]: Analyzing trace with hash -397215517, now seen corresponding path program 5 times [2018-04-12 10:03:39,751 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:39,751 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:39,751 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:39,751 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 10:03:39,752 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:39,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:39,765 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:40,773 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:40,774 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:03:40,774 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:03:40,779 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-12 10:03:40,796 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-04-12 10:03:40,796 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 10:03:40,798 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:03:40,801 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:40,802 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:40,807 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:40,807 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:40,812 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:40,812 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:24, output treesize:19 [2018-04-12 10:03:40,866 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:40,867 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:40,867 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 10:03:40,867 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:40,875 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:40,875 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 23 [2018-04-12 10:03:40,876 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:40,882 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:40,882 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:33, output treesize:19 [2018-04-12 10:03:40,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-12 10:03:40,945 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-12 10:03:40,945 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:40,946 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:40,951 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 10:03:40,952 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:33, output treesize:29 [2018-04-12 10:03:41,261 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 31 [2018-04-12 10:03:41,264 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:41,264 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:41,265 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:41,271 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 12 disjoint index pairs (out of 10 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 53 [2018-04-12 10:03:41,271 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 10:03:41,289 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:41,308 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:03:41,308 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:59, output treesize:151 [2018-04-12 10:03:41,530 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:41,547 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:03:41,548 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 22] total 44 [2018-04-12 10:03:41,548 INFO L442 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-04-12 10:03:41,548 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-04-12 10:03:41,548 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=123, Invalid=1857, Unknown=0, NotChecked=0, Total=1980 [2018-04-12 10:03:41,549 INFO L87 Difference]: Start difference. First operand 125 states and 135 transitions. Second operand 45 states. [2018-04-12 10:03:42,290 WARN L151 SmtUtils]: Spent 378ms on a formula simplification. DAG size of input: 119 DAG size of output 62 [2018-04-12 10:03:43,115 WARN L151 SmtUtils]: Spent 100ms on a formula simplification. DAG size of input: 114 DAG size of output 74 [2018-04-12 10:03:44,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:03:44,449 INFO L93 Difference]: Finished difference Result 163 states and 173 transitions. [2018-04-12 10:03:44,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-04-12 10:03:44,449 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 45 [2018-04-12 10:03:44,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:03:44,450 INFO L225 Difference]: With dead ends: 163 [2018-04-12 10:03:44,450 INFO L226 Difference]: Without dead ends: 163 [2018-04-12 10:03:44,451 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1500 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=485, Invalid=5521, Unknown=0, NotChecked=0, Total=6006 [2018-04-12 10:03:44,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-04-12 10:03:44,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 125. [2018-04-12 10:03:44,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-12 10:03:44,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 135 transitions. [2018-04-12 10:03:44,453 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 135 transitions. Word has length 45 [2018-04-12 10:03:44,453 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:03:44,453 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 135 transitions. [2018-04-12 10:03:44,453 INFO L460 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-04-12 10:03:44,454 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 135 transitions. [2018-04-12 10:03:44,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-04-12 10:03:44,454 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:03:44,454 INFO L355 BasicCegarLoop]: trace histogram [8, 8, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:03:44,454 INFO L408 AbstractCegarLoop]: === Iteration 33 === [cstrcatErr0RequiresViolation, cstrcatErr2RequiresViolation, cstrcatErr1RequiresViolation, cstrcatErr5RequiresViolation, cstrcatErr3RequiresViolation, cstrcatErr4RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:03:44,454 INFO L82 PathProgramCache]: Analyzing trace with hash 945928995, now seen corresponding path program 6 times [2018-04-12 10:03:44,454 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:03:44,454 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:03:44,455 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:44,455 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 10:03:44,455 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:03:44,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:03:44,470 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:03:44,794 WARN L151 SmtUtils]: Spent 181ms on a formula simplification. DAG size of input: 88 DAG size of output 66 [2018-04-12 10:03:44,942 WARN L151 SmtUtils]: Spent 129ms on a formula simplification. DAG size of input: 68 DAG size of output 55 [2018-04-12 10:03:45,071 WARN L151 SmtUtils]: Spent 114ms on a formula simplification. DAG size of input: 68 DAG size of output 55 [2018-04-12 10:03:45,216 WARN L151 SmtUtils]: Spent 127ms on a formula simplification. DAG size of input: 70 DAG size of output 55 [2018-04-12 10:03:45,335 WARN L151 SmtUtils]: Spent 103ms on a formula simplification. DAG size of input: 83 DAG size of output 58 [2018-04-12 10:03:45,456 WARN L151 SmtUtils]: Spent 101ms on a formula simplification. DAG size of input: 85 DAG size of output 58 [2018-04-12 10:03:45,927 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 0 proven. 88 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:03:45,928 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:03:45,928 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:03:45,933 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-12 10:03:45,968 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-04-12 10:03:45,969 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 10:03:45,971 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:03:46,043 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:46,043 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:46,047 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:46,047 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:21, output treesize:20 [2018-04-12 10:03:46,110 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:46,111 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:03:46,111 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 10:03:46,111 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:46,118 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:03:46,118 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:46,124 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:46,124 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:34, output treesize:24 [2018-04-12 10:03:46,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-12 10:03:46,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-12 10:03:46,200 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:46,201 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:46,207 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 10:03:46,208 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:34 [2018-04-12 10:03:46,253 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 26 [2018-04-12 10:03:46,254 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-12 10:03:46,254 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:03:46,257 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:03:46,264 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 10:03:46,264 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:48, output treesize:44 [2018-04-12 10:03:47,502 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 60 [2018-04-12 10:03:47,562 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 12 disjoint index pairs (out of 21 index pairs), introduced 6 new quantified variables, introduced 15 case distinctions, treesize of input 44 treesize of output 181 [2018-04-12 10:03:47,562 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 15 [2018-04-12 10:03:47,789 WARN L152 XnfTransformerHelper]: Simplifying disjunction of 32768 conjuctions. This might take some time... [2018-04-12 10:06:18,679 INFO L170 XnfTransformerHelper]: Simplified to disjunction of 32768 conjuctions. [2018-04-12 10:06:24,373 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 32768 xjuncts. Received shutdown request... [2018-04-12 10:16:53,279 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-04-12 10:16:53,279 WARN L519 AbstractCegarLoop]: Verification canceled [2018-04-12 10:16:53,282 WARN L197 ceAbstractionStarter]: Timeout [2018-04-12 10:16:53,282 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 12.04 10:16:53 BoogieIcfgContainer [2018-04-12 10:16:53,282 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-04-12 10:16:53,283 INFO L168 Benchmark]: Toolchain (without parser) took 829075.17 ms. Allocated memory was 404.8 MB in the beginning and 735.6 MB in the end (delta: 330.8 MB). Free memory was 343.1 MB in the beginning and 267.1 MB in the end (delta: 76.0 MB). Peak memory consumption was 1.3 GB. Max. memory is 5.3 GB. [2018-04-12 10:16:53,284 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 404.8 MB. Free memory is still 368.0 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-12 10:16:53,284 INFO L168 Benchmark]: CACSL2BoogieTranslator took 254.96 ms. Allocated memory is still 404.8 MB. Free memory was 341.8 MB in the beginning and 318.0 MB in the end (delta: 23.8 MB). Peak memory consumption was 23.8 MB. Max. memory is 5.3 GB. [2018-04-12 10:16:53,284 INFO L168 Benchmark]: Boogie Preprocessor took 57.35 ms. Allocated memory is still 404.8 MB. Free memory was 318.0 MB in the beginning and 315.3 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. [2018-04-12 10:16:53,284 INFO L168 Benchmark]: RCFGBuilder took 360.54 ms. Allocated memory was 404.8 MB in the beginning and 615.5 MB in the end (delta: 210.8 MB). Free memory was 315.3 MB in the beginning and 551.5 MB in the end (delta: -236.2 MB). Peak memory consumption was 22.9 MB. Max. memory is 5.3 GB. [2018-04-12 10:16:53,284 INFO L168 Benchmark]: TraceAbstraction took 828399.88 ms. Allocated memory was 615.5 MB in the beginning and 735.6 MB in the end (delta: 120.1 MB). Free memory was 549.8 MB in the beginning and 267.1 MB in the end (delta: 282.7 MB). Peak memory consumption was 1.3 GB. Max. memory is 5.3 GB. [2018-04-12 10:16:53,285 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 404.8 MB. Free memory is still 368.0 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 254.96 ms. Allocated memory is still 404.8 MB. Free memory was 341.8 MB in the beginning and 318.0 MB in the end (delta: 23.8 MB). Peak memory consumption was 23.8 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 57.35 ms. Allocated memory is still 404.8 MB. Free memory was 318.0 MB in the beginning and 315.3 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. * RCFGBuilder took 360.54 ms. Allocated memory was 404.8 MB in the beginning and 615.5 MB in the end (delta: 210.8 MB). Free memory was 315.3 MB in the beginning and 551.5 MB in the end (delta: -236.2 MB). Peak memory consumption was 22.9 MB. Max. memory is 5.3 GB. * TraceAbstraction took 828399.88 ms. Allocated memory was 615.5 MB in the beginning and 735.6 MB in the end (delta: 120.1 MB). Free memory was 549.8 MB in the beginning and 267.1 MB in the end (delta: 282.7 MB). Peak memory consumption was 1.3 GB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 543]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 543). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 8, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 32833. - TimeoutResultAtElement [Line: 545]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 545). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 8, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 32833. - TimeoutResultAtElement [Line: 543]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 543). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 8, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 32833. - TimeoutResultAtElement [Line: 545]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 545). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 8, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 32833. - TimeoutResultAtElement [Line: 545]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 545). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 8, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 32833. - TimeoutResultAtElement [Line: 545]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 545). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 8, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 32833. - TimeoutResultAtElement [Line: 566]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 8, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 32833. - TimeoutResultAtElement [Line: 565]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 565). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 8, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 32833. - TimeoutResultAtElement [Line: 566]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 8, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 32833. - TimeoutResultAtElement [Line: 549]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 549). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 8, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 32833. - TimeoutResultAtElement [Line: 565]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 565). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 8, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 32833. - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 55 locations, 11 error locations. TIMEOUT Result, 828.3s OverallTime, 33 OverallIterations, 8 TraceHistogramMax, 24.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1061 SDtfs, 2637 SDslu, 9001 SDs, 0 SdLazy, 9966 SolverSat, 847 SolverUnsat, 9 SolverUnknown, 0 SolverNotchecked, 9.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1209 GetRequests, 352 SyntacticMatches, 4 SemanticMatches, 853 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7985 ImplicationChecksByTransitivity, 25.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=182occurred in iteration=24, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 32 MinimizatonAttempts, 478 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 13.3s InterpolantComputationTime, 1379 NumberOfCodeBlocks, 1377 NumberOfCodeBlocksAsserted, 72 NumberOfCheckSat, 1332 ConstructedInterpolants, 120 QuantifiedInterpolants, 675329 SizeOfPredicates, 230 NumberOfNonLiveVariables, 2536 ConjunctsInSsa, 819 ConjunctsInUnsatCore, 47 InterpolantComputations, 18 PerfectInterpolantSequences, 20/679 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/cstrcat-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-12_10-16-53-289.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/cstrcat-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-04-12_10-16-53-289.csv Completed graceful shutdown