java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv --cacsl2boogietranslator.bitprecise.bitfields false -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/array-memsafety/diff-alloca_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-408c70d-m [2018-04-12 10:19:08,177 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-12 10:19:08,178 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-12 10:19:08,192 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-12 10:19:08,192 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-12 10:19:08,193 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-12 10:19:08,194 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-12 10:19:08,196 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-12 10:19:08,198 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-12 10:19:08,199 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-12 10:19:08,199 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-12 10:19:08,200 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-12 10:19:08,201 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-12 10:19:08,202 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-12 10:19:08,202 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-12 10:19:08,204 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-12 10:19:08,206 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-12 10:19:08,208 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-12 10:19:08,209 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-12 10:19:08,210 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-12 10:19:08,212 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-04-12 10:19:08,218 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-04-12 10:19:08,228 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-12 10:19:08,228 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-12 10:19:08,229 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-12 10:19:08,229 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-12 10:19:08,229 INFO L133 SettingsManager]: * Use SBE=true [2018-04-12 10:19:08,230 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-12 10:19:08,230 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-12 10:19:08,230 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-12 10:19:08,230 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-12 10:19:08,230 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-12 10:19:08,230 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-12 10:19:08,231 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-12 10:19:08,231 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-12 10:19:08,231 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-12 10:19:08,231 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-12 10:19:08,231 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-12 10:19:08,231 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-12 10:19:08,232 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-12 10:19:08,232 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-12 10:19:08,232 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 10:19:08,232 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-12 10:19:08,232 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-12 10:19:08,232 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-12 10:19:08,232 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Bitprecise bitfields -> false [2018-04-12 10:19:08,263 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-12 10:19:08,274 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-12 10:19:08,279 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-12 10:19:08,280 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-12 10:19:08,281 INFO L276 PluginConnector]: CDTParser initialized [2018-04-12 10:19:08,281 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-memsafety/diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,573 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG73c35cb31 [2018-04-12 10:19:08,711 INFO L287 CDTParser]: IsIndexed: true [2018-04-12 10:19:08,711 INFO L288 CDTParser]: Found 1 translation units. [2018-04-12 10:19:08,712 INFO L168 CDTParser]: Scanning diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,719 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-12 10:19:08,719 INFO L215 ultiparseSymbolTable]: [2018-04-12 10:19:08,719 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-12 10:19:08,720 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,720 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____bswap_32 ('__bswap_32') in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,720 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____bswap_64 ('__bswap_64') in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,720 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diff ('diff') in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,720 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-12 10:19:08,720 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____fsfilcnt64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,720 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__ino_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,720 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__int32_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,720 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,720 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__u_int64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____ssize_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____mode_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____socklen_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____nlink_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____int8_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____timer_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__size_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__off_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____intptr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__key_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____fsword_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____u_short in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____uint64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__caddr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__timer_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__mode_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____sig_atomic_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__u_short in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__nlink_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__gid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__fsfilcnt_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____blkcnt64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____uid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__ssize_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__loff_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__id_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__uint in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_rwlock_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_condattr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____u_int in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____useconds_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__fd_set in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____qaddr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____dev_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____rlim64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____fsblkcnt_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____blksize_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__time_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_key_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__fsid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__dev_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____blkcnt_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____clock_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_mutex_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__int64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____WAIT_STATUS in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____syscall_slong_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__register_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____daddr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____fsfilcnt_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_barrierattr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____uint8_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____time_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__int8_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__ushort in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__u_quad_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____key_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__ldiv_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____int64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__clock_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__daddr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____uint16_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__u_char in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____u_long in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____gid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__blkcnt_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____int16_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____loff_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__suseconds_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____sigset_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__fd_mask in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__u_int32_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__sigset_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____ino_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__u_long in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____ino64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____caddr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____off_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____fsid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__ulong in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_rwlockattr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____uint32_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__u_int8_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__wchar_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__lldiv_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__uid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__int16_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____clockid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__div_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__blksize_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_spinlock_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__clockid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__fsblkcnt_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__quad_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____fd_mask in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____id_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__u_int16_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____syscall_ulong_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_cond_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_once_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____int32_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____rlim_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____fsblkcnt64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____pid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__u_int in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____pthread_list_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_mutexattr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____u_char in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_barrier_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_attr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____off64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,729 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____suseconds_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,729 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____quad_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,729 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____u_quad_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:08,743 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG73c35cb31 [2018-04-12 10:19:08,746 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-12 10:19:08,747 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-12 10:19:08,747 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-12 10:19:08,747 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-12 10:19:08,751 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-12 10:19:08,751 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 10:19:08" (1/1) ... [2018-04-12 10:19:08,753 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@79d2e2ec and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:19:08, skipping insertion in model container [2018-04-12 10:19:08,753 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 10:19:08" (1/1) ... [2018-04-12 10:19:08,764 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 10:19:08,786 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 10:19:08,903 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 10:19:08,941 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 10:19:08,947 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 112 non ball SCCs. Number of states in SCCs 112. [2018-04-12 10:19:08,977 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:19:08 WrapperNode [2018-04-12 10:19:08,978 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-12 10:19:08,978 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-12 10:19:08,978 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-12 10:19:08,978 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-12 10:19:08,989 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:19:08" (1/1) ... [2018-04-12 10:19:08,989 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:19:08" (1/1) ... [2018-04-12 10:19:08,999 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:19:08" (1/1) ... [2018-04-12 10:19:09,000 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:19:08" (1/1) ... [2018-04-12 10:19:09,006 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:19:08" (1/1) ... [2018-04-12 10:19:09,010 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:19:08" (1/1) ... [2018-04-12 10:19:09,012 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:19:08" (1/1) ... [2018-04-12 10:19:09,015 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-12 10:19:09,016 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-12 10:19:09,016 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-12 10:19:09,016 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-12 10:19:09,017 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:19:08" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 10:19:09,112 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-12 10:19:09,112 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-12 10:19:09,112 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____bswap_32 [2018-04-12 10:19:09,113 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____bswap_64 [2018-04-12 10:19:09,113 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diff [2018-04-12 10:19:09,113 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-12 10:19:09,113 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____bswap_32 [2018-04-12 10:19:09,113 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____bswap_64 [2018-04-12 10:19:09,113 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-12 10:19:09,113 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-12 10:19:09,113 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-12 10:19:09,113 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-12 10:19:09,113 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-12 10:19:09,114 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-12 10:19:09,114 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-12 10:19:09,114 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-12 10:19:09,114 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-12 10:19:09,114 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-12 10:19:09,114 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-12 10:19:09,114 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-12 10:19:09,114 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-12 10:19:09,114 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-12 10:19:09,114 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-12 10:19:09,114 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-12 10:19:09,115 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-12 10:19:09,115 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-12 10:19:09,115 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-12 10:19:09,115 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-12 10:19:09,115 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-12 10:19:09,115 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-12 10:19:09,115 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-12 10:19:09,115 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-12 10:19:09,115 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-12 10:19:09,115 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-12 10:19:09,115 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-12 10:19:09,116 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-12 10:19:09,116 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-12 10:19:09,116 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-12 10:19:09,116 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-12 10:19:09,116 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-12 10:19:09,116 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-12 10:19:09,116 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-12 10:19:09,116 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-12 10:19:09,116 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-12 10:19:09,116 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-12 10:19:09,116 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-12 10:19:09,116 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-12 10:19:09,117 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-12 10:19:09,117 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-12 10:19:09,117 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-12 10:19:09,117 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-12 10:19:09,117 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-12 10:19:09,117 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-12 10:19:09,117 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-12 10:19:09,117 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-12 10:19:09,117 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-12 10:19:09,117 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-12 10:19:09,117 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-12 10:19:09,117 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-12 10:19:09,118 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-12 10:19:09,118 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-12 10:19:09,118 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-12 10:19:09,118 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-12 10:19:09,118 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-12 10:19:09,118 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-12 10:19:09,118 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-12 10:19:09,118 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-12 10:19:09,118 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-12 10:19:09,118 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-12 10:19:09,118 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-12 10:19:09,118 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-12 10:19:09,119 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-12 10:19:09,119 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-12 10:19:09,119 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-12 10:19:09,119 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-12 10:19:09,119 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-12 10:19:09,119 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-12 10:19:09,119 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-12 10:19:09,119 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-12 10:19:09,119 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-12 10:19:09,119 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-12 10:19:09,119 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-12 10:19:09,119 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-12 10:19:09,120 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-12 10:19:09,120 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-12 10:19:09,120 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-12 10:19:09,120 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-12 10:19:09,120 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-12 10:19:09,120 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-12 10:19:09,120 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-12 10:19:09,120 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-12 10:19:09,120 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-12 10:19:09,120 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-12 10:19:09,120 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-12 10:19:09,120 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-12 10:19:09,121 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-12 10:19:09,121 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-12 10:19:09,121 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-12 10:19:09,121 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-12 10:19:09,121 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-12 10:19:09,121 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-12 10:19:09,121 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-12 10:19:09,121 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-12 10:19:09,121 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-12 10:19:09,121 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-12 10:19:09,121 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-12 10:19:09,121 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-12 10:19:09,122 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-12 10:19:09,122 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-12 10:19:09,122 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diff [2018-04-12 10:19:09,122 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-12 10:19:09,122 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-12 10:19:09,122 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-12 10:19:09,122 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-12 10:19:09,122 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-12 10:19:09,122 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-12 10:19:09,122 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-12 10:19:09,122 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-12 10:19:09,407 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-12 10:19:09,407 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 10:19:09 BoogieIcfgContainer [2018-04-12 10:19:09,408 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-12 10:19:09,408 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-12 10:19:09,408 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-12 10:19:09,410 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-12 10:19:09,410 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.04 10:19:08" (1/3) ... [2018-04-12 10:19:09,410 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6661350a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 10:19:09, skipping insertion in model container [2018-04-12 10:19:09,411 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:19:08" (2/3) ... [2018-04-12 10:19:09,411 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6661350a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 10:19:09, skipping insertion in model container [2018-04-12 10:19:09,411 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 10:19:09" (3/3) ... [2018-04-12 10:19:09,412 INFO L107 eAbstractionObserver]: Analyzing ICFG diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:19:09,420 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-12 10:19:09,427 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 9 error locations. [2018-04-12 10:19:09,456 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-12 10:19:09,456 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-12 10:19:09,457 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-12 10:19:09,457 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-12 10:19:09,457 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-12 10:19:09,457 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-12 10:19:09,457 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-12 10:19:09,457 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-12 10:19:09,457 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-12 10:19:09,458 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-12 10:19:09,465 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states. [2018-04-12 10:19:09,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-04-12 10:19:09,471 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:19:09,471 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:19:09,471 INFO L408 AbstractCegarLoop]: === Iteration 1 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 10:19:09,474 INFO L82 PathProgramCache]: Analyzing trace with hash 1884904866, now seen corresponding path program 1 times [2018-04-12 10:19:09,475 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:19:09,475 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:19:09,504 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:09,504 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:19:09,504 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:09,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:19:09,554 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:19:09,650 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:19:09,652 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:19:09,653 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 10:19:09,654 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 10:19:09,666 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 10:19:09,666 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-12 10:19:09,669 INFO L87 Difference]: Start difference. First operand 50 states. Second operand 6 states. [2018-04-12 10:19:09,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:19:09,760 INFO L93 Difference]: Finished difference Result 48 states and 53 transitions. [2018-04-12 10:19:09,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 10:19:09,761 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 21 [2018-04-12 10:19:09,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:19:09,768 INFO L225 Difference]: With dead ends: 48 [2018-04-12 10:19:09,768 INFO L226 Difference]: Without dead ends: 45 [2018-04-12 10:19:09,769 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-04-12 10:19:09,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-04-12 10:19:09,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-04-12 10:19:09,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-04-12 10:19:09,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 50 transitions. [2018-04-12 10:19:09,798 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 50 transitions. Word has length 21 [2018-04-12 10:19:09,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:19:09,798 INFO L459 AbstractCegarLoop]: Abstraction has 45 states and 50 transitions. [2018-04-12 10:19:09,799 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 10:19:09,799 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 50 transitions. [2018-04-12 10:19:09,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-04-12 10:19:09,799 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:19:09,799 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:19:09,800 INFO L408 AbstractCegarLoop]: === Iteration 2 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 10:19:09,800 INFO L82 PathProgramCache]: Analyzing trace with hash 1884904867, now seen corresponding path program 1 times [2018-04-12 10:19:09,800 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:19:09,800 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:19:09,801 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:09,801 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:19:09,801 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:09,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:19:09,819 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:19:09,897 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:19:09,897 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:19:09,897 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-04-12 10:19:09,898 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 10:19:09,898 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 10:19:09,898 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-04-12 10:19:09,898 INFO L87 Difference]: Start difference. First operand 45 states and 50 transitions. Second operand 8 states. [2018-04-12 10:19:10,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:19:10,080 INFO L93 Difference]: Finished difference Result 63 states and 72 transitions. [2018-04-12 10:19:10,082 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 10:19:10,082 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 21 [2018-04-12 10:19:10,082 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:19:10,085 INFO L225 Difference]: With dead ends: 63 [2018-04-12 10:19:10,085 INFO L226 Difference]: Without dead ends: 63 [2018-04-12 10:19:10,086 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2018-04-12 10:19:10,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-04-12 10:19:10,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 54. [2018-04-12 10:19:10,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-04-12 10:19:10,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 65 transitions. [2018-04-12 10:19:10,092 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 65 transitions. Word has length 21 [2018-04-12 10:19:10,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:19:10,092 INFO L459 AbstractCegarLoop]: Abstraction has 54 states and 65 transitions. [2018-04-12 10:19:10,092 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 10:19:10,093 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 65 transitions. [2018-04-12 10:19:10,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-12 10:19:10,093 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:19:10,093 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:19:10,093 INFO L408 AbstractCegarLoop]: === Iteration 3 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 10:19:10,094 INFO L82 PathProgramCache]: Analyzing trace with hash -1697491302, now seen corresponding path program 1 times [2018-04-12 10:19:10,094 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:19:10,094 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:19:10,095 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:10,095 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:19:10,095 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:10,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:19:10,110 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:19:10,147 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:19:10,147 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:19:10,147 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 10:19:10,147 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 10:19:10,147 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 10:19:10,148 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-12 10:19:10,148 INFO L87 Difference]: Start difference. First operand 54 states and 65 transitions. Second operand 6 states. [2018-04-12 10:19:10,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:19:10,196 INFO L93 Difference]: Finished difference Result 53 states and 63 transitions. [2018-04-12 10:19:10,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 10:19:10,196 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2018-04-12 10:19:10,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:19:10,197 INFO L225 Difference]: With dead ends: 53 [2018-04-12 10:19:10,197 INFO L226 Difference]: Without dead ends: 53 [2018-04-12 10:19:10,197 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-04-12 10:19:10,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-04-12 10:19:10,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-04-12 10:19:10,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-04-12 10:19:10,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 63 transitions. [2018-04-12 10:19:10,200 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 63 transitions. Word has length 22 [2018-04-12 10:19:10,200 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:19:10,200 INFO L459 AbstractCegarLoop]: Abstraction has 53 states and 63 transitions. [2018-04-12 10:19:10,200 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 10:19:10,200 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 63 transitions. [2018-04-12 10:19:10,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-12 10:19:10,200 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:19:10,200 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:19:10,200 INFO L408 AbstractCegarLoop]: === Iteration 4 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 10:19:10,201 INFO L82 PathProgramCache]: Analyzing trace with hash -1697491301, now seen corresponding path program 1 times [2018-04-12 10:19:10,201 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:19:10,201 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:19:10,201 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:10,201 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:19:10,201 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:10,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:19:10,216 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:19:10,294 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:19:10,295 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:19:10,295 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-12 10:19:10,295 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 10:19:10,295 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 10:19:10,296 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-04-12 10:19:10,296 INFO L87 Difference]: Start difference. First operand 53 states and 63 transitions. Second operand 9 states. [2018-04-12 10:19:10,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:19:10,460 INFO L93 Difference]: Finished difference Result 96 states and 118 transitions. [2018-04-12 10:19:10,461 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-12 10:19:10,461 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 22 [2018-04-12 10:19:10,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:19:10,462 INFO L225 Difference]: With dead ends: 96 [2018-04-12 10:19:10,462 INFO L226 Difference]: Without dead ends: 96 [2018-04-12 10:19:10,463 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2018-04-12 10:19:10,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-04-12 10:19:10,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 63. [2018-04-12 10:19:10,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-04-12 10:19:10,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 78 transitions. [2018-04-12 10:19:10,466 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 78 transitions. Word has length 22 [2018-04-12 10:19:10,466 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:19:10,466 INFO L459 AbstractCegarLoop]: Abstraction has 63 states and 78 transitions. [2018-04-12 10:19:10,466 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 10:19:10,467 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 78 transitions. [2018-04-12 10:19:10,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-12 10:19:10,467 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:19:10,467 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:19:10,467 INFO L408 AbstractCegarLoop]: === Iteration 5 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 10:19:10,467 INFO L82 PathProgramCache]: Analyzing trace with hash -1082665576, now seen corresponding path program 1 times [2018-04-12 10:19:10,467 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:19:10,468 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:19:10,468 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:10,468 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:19:10,468 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:10,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:19:10,477 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:19:10,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:19:10,505 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:19:10,505 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 10:19:10,505 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 10:19:10,505 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 10:19:10,505 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-12 10:19:10,506 INFO L87 Difference]: Start difference. First operand 63 states and 78 transitions. Second operand 6 states. [2018-04-12 10:19:10,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:19:10,559 INFO L93 Difference]: Finished difference Result 62 states and 77 transitions. [2018-04-12 10:19:10,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 10:19:10,560 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-04-12 10:19:10,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:19:10,560 INFO L225 Difference]: With dead ends: 62 [2018-04-12 10:19:10,560 INFO L226 Difference]: Without dead ends: 62 [2018-04-12 10:19:10,561 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-04-12 10:19:10,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2018-04-12 10:19:10,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 62. [2018-04-12 10:19:10,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-04-12 10:19:10,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 77 transitions. [2018-04-12 10:19:10,563 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 77 transitions. Word has length 23 [2018-04-12 10:19:10,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:19:10,564 INFO L459 AbstractCegarLoop]: Abstraction has 62 states and 77 transitions. [2018-04-12 10:19:10,564 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 10:19:10,564 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 77 transitions. [2018-04-12 10:19:10,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-12 10:19:10,564 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:19:10,564 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:19:10,564 INFO L408 AbstractCegarLoop]: === Iteration 6 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 10:19:10,564 INFO L82 PathProgramCache]: Analyzing trace with hash -1082665575, now seen corresponding path program 1 times [2018-04-12 10:19:10,564 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:19:10,564 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:19:10,565 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:10,565 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:19:10,565 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:10,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:19:10,572 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:19:10,612 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:19:10,612 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:19:10,612 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 10:19:10,612 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 10:19:10,613 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 10:19:10,613 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-04-12 10:19:10,613 INFO L87 Difference]: Start difference. First operand 62 states and 77 transitions. Second operand 6 states. [2018-04-12 10:19:10,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:19:10,653 INFO L93 Difference]: Finished difference Result 73 states and 90 transitions. [2018-04-12 10:19:10,656 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 10:19:10,656 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-04-12 10:19:10,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:19:10,658 INFO L225 Difference]: With dead ends: 73 [2018-04-12 10:19:10,658 INFO L226 Difference]: Without dead ends: 73 [2018-04-12 10:19:10,658 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-04-12 10:19:10,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-04-12 10:19:10,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 66. [2018-04-12 10:19:10,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-04-12 10:19:10,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 81 transitions. [2018-04-12 10:19:10,663 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 81 transitions. Word has length 23 [2018-04-12 10:19:10,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:19:10,663 INFO L459 AbstractCegarLoop]: Abstraction has 66 states and 81 transitions. [2018-04-12 10:19:10,663 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 10:19:10,664 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 81 transitions. [2018-04-12 10:19:10,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-04-12 10:19:10,664 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:19:10,664 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:19:10,664 INFO L408 AbstractCegarLoop]: === Iteration 7 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 10:19:10,665 INFO L82 PathProgramCache]: Analyzing trace with hash 539067411, now seen corresponding path program 1 times [2018-04-12 10:19:10,665 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:19:10,665 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:19:10,666 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:10,666 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:19:10,666 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:10,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:19:10,676 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:19:10,739 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:19:10,739 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:19:10,740 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:19:10,747 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:19:10,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:19:10,780 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:19:10,820 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:19:10,837 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-12 10:19:10,837 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [9] total 13 [2018-04-12 10:19:10,838 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-04-12 10:19:10,838 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-04-12 10:19:10,838 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2018-04-12 10:19:10,838 INFO L87 Difference]: Start difference. First operand 66 states and 81 transitions. Second operand 13 states. [2018-04-12 10:19:10,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:19:10,922 INFO L93 Difference]: Finished difference Result 132 states and 157 transitions. [2018-04-12 10:19:10,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-12 10:19:10,936 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 27 [2018-04-12 10:19:10,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:19:10,937 INFO L225 Difference]: With dead ends: 132 [2018-04-12 10:19:10,937 INFO L226 Difference]: Without dead ends: 132 [2018-04-12 10:19:10,938 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=63, Invalid=209, Unknown=0, NotChecked=0, Total=272 [2018-04-12 10:19:10,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-04-12 10:19:10,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 105. [2018-04-12 10:19:10,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-04-12 10:19:10,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 131 transitions. [2018-04-12 10:19:10,942 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 131 transitions. Word has length 27 [2018-04-12 10:19:10,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:19:10,942 INFO L459 AbstractCegarLoop]: Abstraction has 105 states and 131 transitions. [2018-04-12 10:19:10,942 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-04-12 10:19:10,943 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 131 transitions. [2018-04-12 10:19:10,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-04-12 10:19:10,943 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:19:10,943 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:19:10,943 INFO L408 AbstractCegarLoop]: === Iteration 8 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 10:19:10,943 INFO L82 PathProgramCache]: Analyzing trace with hash -278581039, now seen corresponding path program 1 times [2018-04-12 10:19:10,943 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:19:10,943 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:19:10,944 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:10,944 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:19:10,944 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:10,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:19:10,954 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:19:11,058 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:19:11,058 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:19:11,059 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:19:11,067 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:19:11,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:19:11,093 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:19:11,117 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:19:11,118 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:19:11,123 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 10:19:11,123 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:19:11,128 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:19:11,128 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:18, output treesize:16 [2018-04-12 10:19:11,139 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:19:11,141 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-04-12 10:19:11,141 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:19:11,152 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:19:11,153 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:19:11,154 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 10:19:11,154 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:19:11,161 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 10:19:11,162 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:22 [2018-04-12 10:19:11,391 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:19:11,414 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:19:11,414 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 15 [2018-04-12 10:19:11,414 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-12 10:19:11,415 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-12 10:19:11,415 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=195, Unknown=0, NotChecked=0, Total=240 [2018-04-12 10:19:11,415 INFO L87 Difference]: Start difference. First operand 105 states and 131 transitions. Second operand 16 states. [2018-04-12 10:19:11,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:19:11,790 INFO L93 Difference]: Finished difference Result 150 states and 187 transitions. [2018-04-12 10:19:11,790 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-12 10:19:11,790 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 27 [2018-04-12 10:19:11,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:19:11,791 INFO L225 Difference]: With dead ends: 150 [2018-04-12 10:19:11,791 INFO L226 Difference]: Without dead ends: 150 [2018-04-12 10:19:11,791 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 20 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=99, Invalid=363, Unknown=0, NotChecked=0, Total=462 [2018-04-12 10:19:11,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-04-12 10:19:11,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 94. [2018-04-12 10:19:11,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-04-12 10:19:11,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 114 transitions. [2018-04-12 10:19:11,795 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 114 transitions. Word has length 27 [2018-04-12 10:19:11,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:19:11,796 INFO L459 AbstractCegarLoop]: Abstraction has 94 states and 114 transitions. [2018-04-12 10:19:11,796 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-12 10:19:11,796 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 114 transitions. [2018-04-12 10:19:11,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-04-12 10:19:11,796 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:19:11,796 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:19:11,796 INFO L408 AbstractCegarLoop]: === Iteration 9 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 10:19:11,797 INFO L82 PathProgramCache]: Analyzing trace with hash -428535111, now seen corresponding path program 1 times [2018-04-12 10:19:11,797 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:19:11,797 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:19:11,797 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:11,797 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:19:11,797 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:11,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:19:11,803 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:19:11,823 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:19:11,823 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:19:11,824 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 10:19:11,824 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 10:19:11,824 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 10:19:11,824 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 10:19:11,824 INFO L87 Difference]: Start difference. First operand 94 states and 114 transitions. Second operand 5 states. [2018-04-12 10:19:11,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:19:11,857 INFO L93 Difference]: Finished difference Result 105 states and 124 transitions. [2018-04-12 10:19:11,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 10:19:11,858 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2018-04-12 10:19:11,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:19:11,858 INFO L225 Difference]: With dead ends: 105 [2018-04-12 10:19:11,858 INFO L226 Difference]: Without dead ends: 101 [2018-04-12 10:19:11,859 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-12 10:19:11,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-04-12 10:19:11,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 94. [2018-04-12 10:19:11,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-04-12 10:19:11,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 112 transitions. [2018-04-12 10:19:11,863 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 112 transitions. Word has length 28 [2018-04-12 10:19:11,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:19:11,863 INFO L459 AbstractCegarLoop]: Abstraction has 94 states and 112 transitions. [2018-04-12 10:19:11,863 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 10:19:11,863 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 112 transitions. [2018-04-12 10:19:11,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-04-12 10:19:11,864 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:19:11,864 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:19:11,864 INFO L408 AbstractCegarLoop]: === Iteration 10 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 10:19:11,864 INFO L82 PathProgramCache]: Analyzing trace with hash -468822239, now seen corresponding path program 1 times [2018-04-12 10:19:11,864 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:19:11,865 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:19:11,865 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:11,865 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:19:11,865 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:11,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:19:11,875 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:19:11,926 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 10:19:11,926 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:19:11,926 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 10:19:11,927 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 10:19:11,927 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 10:19:11,927 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-12 10:19:11,927 INFO L87 Difference]: Start difference. First operand 94 states and 112 transitions. Second operand 7 states. [2018-04-12 10:19:12,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:19:12,003 INFO L93 Difference]: Finished difference Result 130 states and 158 transitions. [2018-04-12 10:19:12,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 10:19:12,004 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 28 [2018-04-12 10:19:12,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:19:12,004 INFO L225 Difference]: With dead ends: 130 [2018-04-12 10:19:12,004 INFO L226 Difference]: Without dead ends: 130 [2018-04-12 10:19:12,005 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2018-04-12 10:19:12,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-04-12 10:19:12,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 122. [2018-04-12 10:19:12,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-04-12 10:19:12,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 152 transitions. [2018-04-12 10:19:12,010 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 152 transitions. Word has length 28 [2018-04-12 10:19:12,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:19:12,010 INFO L459 AbstractCegarLoop]: Abstraction has 122 states and 152 transitions. [2018-04-12 10:19:12,010 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 10:19:12,010 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 152 transitions. [2018-04-12 10:19:12,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-04-12 10:19:12,011 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:19:12,011 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:19:12,011 INFO L408 AbstractCegarLoop]: === Iteration 11 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 10:19:12,012 INFO L82 PathProgramCache]: Analyzing trace with hash -472485569, now seen corresponding path program 1 times [2018-04-12 10:19:12,012 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:19:12,012 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:19:12,012 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:12,013 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:19:12,013 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:12,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:19:12,020 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:19:12,040 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 10:19:12,040 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:19:12,040 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 10:19:12,040 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-12 10:19:12,041 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-12 10:19:12,041 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 10:19:12,041 INFO L87 Difference]: Start difference. First operand 122 states and 152 transitions. Second operand 3 states. [2018-04-12 10:19:12,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:19:12,057 INFO L93 Difference]: Finished difference Result 144 states and 179 transitions. [2018-04-12 10:19:12,058 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-12 10:19:12,058 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 32 [2018-04-12 10:19:12,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:19:12,059 INFO L225 Difference]: With dead ends: 144 [2018-04-12 10:19:12,059 INFO L226 Difference]: Without dead ends: 144 [2018-04-12 10:19:12,059 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 10:19:12,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-04-12 10:19:12,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 134. [2018-04-12 10:19:12,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-04-12 10:19:12,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 167 transitions. [2018-04-12 10:19:12,063 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 167 transitions. Word has length 32 [2018-04-12 10:19:12,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:19:12,064 INFO L459 AbstractCegarLoop]: Abstraction has 134 states and 167 transitions. [2018-04-12 10:19:12,064 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-12 10:19:12,064 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 167 transitions. [2018-04-12 10:19:12,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-04-12 10:19:12,065 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:19:12,065 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:19:12,065 INFO L408 AbstractCegarLoop]: === Iteration 12 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 10:19:12,065 INFO L82 PathProgramCache]: Analyzing trace with hash -79458559, now seen corresponding path program 1 times [2018-04-12 10:19:12,065 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:19:12,065 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:19:12,066 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:12,066 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:19:12,066 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:12,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:19:12,075 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:19:12,194 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:19:12,194 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:19:12,195 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:19:12,203 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:19:12,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:19:12,220 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:19:12,223 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 10:19:12,223 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:19:12,227 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:19:12,227 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:19:12,231 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:19:12,231 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:18, output treesize:16 [2018-04-12 10:19:12,240 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:19:12,241 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-04-12 10:19:12,242 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:19:12,251 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:19:12,251 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:19:12,252 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 10:19:12,252 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:19:12,257 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 10:19:12,257 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:22 [2018-04-12 10:19:12,288 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 23 treesize of output 30 [2018-04-12 10:19:12,288 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-12 10:19:12,306 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-04-12 10:19:12,306 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:30, output treesize:52 [2018-04-12 10:19:12,476 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 10:19:12,504 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:19:12,504 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 15 [2018-04-12 10:19:12,504 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-12 10:19:12,504 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-12 10:19:12,505 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=194, Unknown=0, NotChecked=0, Total=240 [2018-04-12 10:19:12,505 INFO L87 Difference]: Start difference. First operand 134 states and 167 transitions. Second operand 16 states. [2018-04-12 10:19:12,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:19:12,742 INFO L93 Difference]: Finished difference Result 140 states and 167 transitions. [2018-04-12 10:19:12,742 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-12 10:19:12,743 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 32 [2018-04-12 10:19:12,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:19:12,743 INFO L225 Difference]: With dead ends: 140 [2018-04-12 10:19:12,743 INFO L226 Difference]: Without dead ends: 140 [2018-04-12 10:19:12,743 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 27 SyntacticMatches, 3 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=91, Invalid=329, Unknown=0, NotChecked=0, Total=420 [2018-04-12 10:19:12,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-04-12 10:19:12,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 108. [2018-04-12 10:19:12,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-04-12 10:19:12,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 128 transitions. [2018-04-12 10:19:12,745 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 128 transitions. Word has length 32 [2018-04-12 10:19:12,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:19:12,745 INFO L459 AbstractCegarLoop]: Abstraction has 108 states and 128 transitions. [2018-04-12 10:19:12,746 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-12 10:19:12,746 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 128 transitions. [2018-04-12 10:19:12,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-04-12 10:19:12,746 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:19:12,746 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:19:12,746 INFO L408 AbstractCegarLoop]: === Iteration 13 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 10:19:12,747 INFO L82 PathProgramCache]: Analyzing trace with hash 1586510747, now seen corresponding path program 1 times [2018-04-12 10:19:12,747 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:19:12,747 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:19:12,747 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:12,747 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:19:12,747 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:12,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:19:12,753 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:19:12,866 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 10:19:12,866 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:19:12,866 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-12 10:19:12,866 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 10:19:12,867 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 10:19:12,867 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2018-04-12 10:19:12,867 INFO L87 Difference]: Start difference. First operand 108 states and 128 transitions. Second operand 10 states. [2018-04-12 10:19:13,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:19:13,078 INFO L93 Difference]: Finished difference Result 117 states and 131 transitions. [2018-04-12 10:19:13,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-12 10:19:13,079 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 39 [2018-04-12 10:19:13,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:19:13,080 INFO L225 Difference]: With dead ends: 117 [2018-04-12 10:19:13,080 INFO L226 Difference]: Without dead ends: 101 [2018-04-12 10:19:13,080 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=170, Unknown=0, NotChecked=0, Total=210 [2018-04-12 10:19:13,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-04-12 10:19:13,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 91. [2018-04-12 10:19:13,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2018-04-12 10:19:13,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 100 transitions. [2018-04-12 10:19:13,083 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 100 transitions. Word has length 39 [2018-04-12 10:19:13,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:19:13,083 INFO L459 AbstractCegarLoop]: Abstraction has 91 states and 100 transitions. [2018-04-12 10:19:13,083 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 10:19:13,083 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 100 transitions. [2018-04-12 10:19:13,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-04-12 10:19:13,084 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:19:13,084 INFO L355 BasicCegarLoop]: trace histogram [4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:19:13,085 INFO L408 AbstractCegarLoop]: === Iteration 14 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 10:19:13,085 INFO L82 PathProgramCache]: Analyzing trace with hash 994133498, now seen corresponding path program 1 times [2018-04-12 10:19:13,085 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:19:13,085 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:19:13,086 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:13,086 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:19:13,086 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:19:13,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:19:13,101 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:19:13,268 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 10:19:13,268 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:19:13,268 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:19:13,276 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:19:13,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:19:13,295 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:19:13,299 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 10:19:13,299 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:19:13,302 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:19:13,302 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-12 10:19:13,444 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-12 10:19:13,462 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:19:13,462 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8] total 19 [2018-04-12 10:19:13,462 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-12 10:19:13,462 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-12 10:19:13,463 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=335, Unknown=0, NotChecked=0, Total=380 [2018-04-12 10:19:13,463 INFO L87 Difference]: Start difference. First operand 91 states and 100 transitions. Second operand 20 states. [2018-04-12 10:19:13,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:19:13,839 INFO L93 Difference]: Finished difference Result 138 states and 149 transitions. [2018-04-12 10:19:13,840 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-04-12 10:19:13,840 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 42 [2018-04-12 10:19:13,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:19:13,840 INFO L225 Difference]: With dead ends: 138 [2018-04-12 10:19:13,840 INFO L226 Difference]: Without dead ends: 0 [2018-04-12 10:19:13,840 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 35 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 138 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=140, Invalid=790, Unknown=0, NotChecked=0, Total=930 [2018-04-12 10:19:13,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-04-12 10:19:13,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-04-12 10:19:13,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-04-12 10:19:13,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-04-12 10:19:13,841 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 42 [2018-04-12 10:19:13,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:19:13,841 INFO L459 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-04-12 10:19:13,841 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-12 10:19:13,841 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-04-12 10:19:13,841 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-04-12 10:19:13,844 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 12.04 10:19:13 BoogieIcfgContainer [2018-04-12 10:19:13,844 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-04-12 10:19:13,844 INFO L168 Benchmark]: Toolchain (without parser) took 5098.24 ms. Allocated memory was 402.7 MB in the beginning and 719.8 MB in the end (delta: 317.2 MB). Free memory was 340.9 MB in the beginning and 633.3 MB in the end (delta: -292.4 MB). Peak memory consumption was 24.8 MB. Max. memory is 5.3 GB. [2018-04-12 10:19:13,845 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 402.7 MB. Free memory is still 365.9 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-12 10:19:13,845 INFO L168 Benchmark]: CACSL2BoogieTranslator took 230.73 ms. Allocated memory is still 402.7 MB. Free memory was 340.9 MB in the beginning and 315.7 MB in the end (delta: 25.2 MB). Peak memory consumption was 25.2 MB. Max. memory is 5.3 GB. [2018-04-12 10:19:13,845 INFO L168 Benchmark]: Boogie Preprocessor took 37.47 ms. Allocated memory is still 402.7 MB. Free memory was 315.7 MB in the beginning and 314.4 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. [2018-04-12 10:19:13,846 INFO L168 Benchmark]: RCFGBuilder took 391.79 ms. Allocated memory was 402.7 MB in the beginning and 612.4 MB in the end (delta: 209.7 MB). Free memory was 314.4 MB in the beginning and 547.1 MB in the end (delta: -232.8 MB). Peak memory consumption was 24.1 MB. Max. memory is 5.3 GB. [2018-04-12 10:19:13,846 INFO L168 Benchmark]: TraceAbstraction took 4435.89 ms. Allocated memory was 612.4 MB in the beginning and 719.8 MB in the end (delta: 107.5 MB). Free memory was 547.1 MB in the beginning and 633.3 MB in the end (delta: -86.2 MB). Peak memory consumption was 21.3 MB. Max. memory is 5.3 GB. [2018-04-12 10:19:13,848 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 402.7 MB. Free memory is still 365.9 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 230.73 ms. Allocated memory is still 402.7 MB. Free memory was 340.9 MB in the beginning and 315.7 MB in the end (delta: 25.2 MB). Peak memory consumption was 25.2 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 37.47 ms. Allocated memory is still 402.7 MB. Free memory was 315.7 MB in the beginning and 314.4 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. * RCFGBuilder took 391.79 ms. Allocated memory was 402.7 MB in the beginning and 612.4 MB in the end (delta: 209.7 MB). Free memory was 314.4 MB in the beginning and 547.1 MB in the end (delta: -232.8 MB). Peak memory consumption was 24.1 MB. Max. memory is 5.3 GB. * TraceAbstraction took 4435.89 ms. Allocated memory was 612.4 MB in the beginning and 719.8 MB in the end (delta: 107.5 MB). Free memory was 547.1 MB in the beginning and 633.3 MB in the end (delta: -86.2 MB). Peak memory consumption was 21.3 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - PositiveResult [Line: 564]: all allocated memory was freed For all program executions holds that all allocated memory was freed at this location - PositiveResult [Line: 558]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 558]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 551]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 551]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 551]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 558]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 551]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 558]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - AllSpecificationsHoldResult: All specifications hold 9 specifications checked. All of them hold - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 56 locations, 9 error locations. SAFE Result, 4.3s OverallTime, 14 OverallIterations, 4 TraceHistogramMax, 2.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 552 SDtfs, 1167 SDslu, 2043 SDs, 0 SdLazy, 1543 SolverSat, 115 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 284 GetRequests, 126 SyntacticMatches, 7 SemanticMatches, 151 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 352 ImplicationChecksByTransitivity, 1.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=134occurred in iteration=11, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 14 MinimizatonAttempts, 199 StatesRemovedByMinimization, 10 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 1.7s InterpolantComputationTime, 515 NumberOfCodeBlocks, 515 NumberOfCodeBlocksAsserted, 18 NumberOfCheckSat, 497 ConstructedInterpolants, 62 QuantifiedInterpolants, 138583 SizeOfPredicates, 31 NumberOfNonLiveVariables, 653 ConjunctsInSsa, 86 ConjunctsInUnsatCore, 18 InterpolantComputations, 11 PerfectInterpolantSequences, 37/89 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be correct! Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/diff-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-12_10-19-13-855.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/diff-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-04-12_10-19-13-855.csv Received shutdown request...