java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv --cacsl2boogietranslator.bitprecise.bitfields false -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_true-valid-memsafety.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-408c70d-m [2018-04-12 14:07:52,507 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-12 14:07:52,509 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-12 14:07:52,521 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-12 14:07:52,522 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-12 14:07:52,522 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-12 14:07:52,523 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-12 14:07:52,525 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-12 14:07:52,527 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-12 14:07:52,528 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-12 14:07:52,529 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-12 14:07:52,529 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-12 14:07:52,530 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-12 14:07:52,531 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-12 14:07:52,532 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-12 14:07:52,534 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-12 14:07:52,535 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-12 14:07:52,537 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-12 14:07:52,538 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-12 14:07:52,539 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-12 14:07:52,540 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-04-12 14:07:52,545 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-04-12 14:07:52,546 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-04-12 14:07:52,546 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-04-12 14:07:52,555 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-12 14:07:52,555 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-12 14:07:52,556 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-12 14:07:52,556 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-12 14:07:52,556 INFO L133 SettingsManager]: * Use SBE=true [2018-04-12 14:07:52,557 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-12 14:07:52,557 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-12 14:07:52,557 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-12 14:07:52,557 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-12 14:07:52,557 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-12 14:07:52,557 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-12 14:07:52,558 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-12 14:07:52,558 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-12 14:07:52,558 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-12 14:07:52,558 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-12 14:07:52,558 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-12 14:07:52,558 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-12 14:07:52,559 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-12 14:07:52,559 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-12 14:07:52,559 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 14:07:52,559 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-12 14:07:52,559 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-12 14:07:52,559 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-12 14:07:52,560 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Bitprecise bitfields -> false [2018-04-12 14:07:52,590 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-12 14:07:52,598 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-12 14:07:52,600 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-12 14:07:52,601 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-12 14:07:52,602 INFO L276 PluginConnector]: CDTParser initialized [2018-04-12 14:07:52,602 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:52,905 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGbcff76c76 [2018-04-12 14:07:53,044 INFO L287 CDTParser]: IsIndexed: true [2018-04-12 14:07:53,044 INFO L288 CDTParser]: Found 1 translation units. [2018-04-12 14:07:53,045 INFO L168 CDTParser]: Scanning optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,053 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-12 14:07:53,053 INFO L215 ultiparseSymbolTable]: [2018-04-12 14:07:53,053 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-12 14:07:53,053 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeData ('freeData') in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,053 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_64 ('__bswap_64') in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,053 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,053 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_32 ('__bswap_32') in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,053 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data ('create_data') in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,054 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append ('append') in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,054 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-12 14:07:53,054 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____useconds_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,054 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_int in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,054 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_condattr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,054 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__dev_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,054 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uint8_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,054 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____key_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,054 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__uint in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,054 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__loff_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,054 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__nlink_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,055 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,055 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int8_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,055 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__quad_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,055 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fd_mask in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,055 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____int64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,055 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____clockid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,055 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__clockid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,055 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____sig_atomic_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,055 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_attr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,055 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__wchar_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,055 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__suseconds_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,055 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uint64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,055 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_once_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,055 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsword_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,055 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____syscall_slong_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,056 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fd_mask in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,056 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____blkcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,056 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,056 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ssize_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,056 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int16_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,056 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_cond_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,056 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_spinlock_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,056 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____ino64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,056 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____sigset_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,056 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____ino_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,056 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__id_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,056 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____blkcnt64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,056 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_rwlockattr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,056 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____int16_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,056 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_char in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,056 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__off_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,056 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____off_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,056 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__blkcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,057 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fsfilcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,057 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____ssize_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,057 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__timer_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,057 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_barrier_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,057 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____nlink_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,057 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__int32_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,057 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____socklen_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,057 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_mutexattr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,057 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____pid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,057 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__key_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,057 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_quad_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,057 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____off64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,057 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int32_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,057 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsblkcnt64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,057 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_char in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,057 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____gid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,057 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____quad_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,057 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____syscall_ulong_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,057 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____id_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,058 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____timer_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,058 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,058 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____rlim64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,058 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uint32_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,058 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fsblkcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,058 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____suseconds_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,058 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_rwlock_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,058 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__div_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,058 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__time_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,058 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____pthread_slist_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,058 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____int32_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,058 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____dev_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,058 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsblkcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,058 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__mode_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,058 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__int16_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,058 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_key_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,058 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__Data in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,059 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____caddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,059 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fd_set in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,059 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__lldiv_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,059 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____rlim_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,059 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__uid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,059 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_short in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,059 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____intptr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,059 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__size_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,059 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____mode_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,059 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__blksize_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,059 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__caddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,060 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_long in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,060 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__sigset_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,060 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ldiv_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,060 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_short in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,060 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ino_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,060 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__daddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,060 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,060 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,060 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__gid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,060 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__register_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,060 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ulong in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,060 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_barrierattr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,061 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____int8_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,061 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_long in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,061 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,061 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsfilcnt64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,061 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__clock_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,061 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsfilcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,061 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_mutex_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,061 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____time_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,061 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____loff_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,061 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fsid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,061 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_quad_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,062 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ushort in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,062 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____blksize_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,062 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____clock_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,062 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__int8_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,062 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uint16_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,062 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____daddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,062 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__int64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,062 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____qaddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,075 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGbcff76c76 [2018-04-12 14:07:53,078 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-12 14:07:53,078 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-12 14:07:53,079 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-12 14:07:53,079 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-12 14:07:53,082 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-12 14:07:53,083 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 02:07:53" (1/1) ... [2018-04-12 14:07:53,085 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@665003f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 02:07:53, skipping insertion in model container [2018-04-12 14:07:53,085 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 02:07:53" (1/1) ... [2018-04-12 14:07:53,099 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 14:07:53,121 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 14:07:53,263 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 14:07:53,301 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 14:07:53,306 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 120 non ball SCCs. Number of states in SCCs 120. [2018-04-12 14:07:53,348 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 02:07:53 WrapperNode [2018-04-12 14:07:53,348 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-12 14:07:53,349 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-12 14:07:53,349 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-12 14:07:53,349 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-12 14:07:53,359 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 02:07:53" (1/1) ... [2018-04-12 14:07:53,359 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 02:07:53" (1/1) ... [2018-04-12 14:07:53,371 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 02:07:53" (1/1) ... [2018-04-12 14:07:53,371 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 02:07:53" (1/1) ... [2018-04-12 14:07:53,380 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 02:07:53" (1/1) ... [2018-04-12 14:07:53,384 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 02:07:53" (1/1) ... [2018-04-12 14:07:53,386 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 02:07:53" (1/1) ... [2018-04-12 14:07:53,389 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-12 14:07:53,390 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-12 14:07:53,390 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-12 14:07:53,390 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-12 14:07:53,391 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 02:07:53" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 14:07:53,481 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-12 14:07:53,482 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-12 14:07:53,482 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_32 [2018-04-12 14:07:53,482 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_64 [2018-04-12 14:07:53,482 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data [2018-04-12 14:07:53,482 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeData [2018-04-12 14:07:53,482 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append [2018-04-12 14:07:53,482 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-12 14:07:53,482 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-04-12 14:07:53,482 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-12 14:07:53,482 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-12 14:07:53,482 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-12 14:07:53,482 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-12 14:07:53,483 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-12 14:07:53,483 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-12 14:07:53,483 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-12 14:07:53,483 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-12 14:07:53,483 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-12 14:07:53,483 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-12 14:07:53,483 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-12 14:07:53,483 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-12 14:07:53,483 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-12 14:07:53,484 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-12 14:07:53,484 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-12 14:07:53,484 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-12 14:07:53,484 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_32 [2018-04-12 14:07:53,484 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_64 [2018-04-12 14:07:53,484 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-12 14:07:53,484 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-12 14:07:53,484 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-12 14:07:53,484 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-12 14:07:53,485 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-12 14:07:53,485 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-12 14:07:53,485 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-12 14:07:53,485 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-12 14:07:53,485 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-12 14:07:53,485 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-12 14:07:53,485 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-12 14:07:53,485 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-12 14:07:53,485 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-12 14:07:53,485 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-12 14:07:53,486 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-12 14:07:53,486 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-12 14:07:53,486 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-12 14:07:53,486 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-12 14:07:53,486 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-12 14:07:53,486 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-12 14:07:53,486 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-12 14:07:53,486 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-12 14:07:53,486 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-12 14:07:53,487 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-12 14:07:53,487 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-12 14:07:53,487 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-12 14:07:53,487 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-12 14:07:53,487 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-12 14:07:53,487 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-12 14:07:53,487 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-12 14:07:53,487 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-12 14:07:53,487 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-12 14:07:53,487 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-12 14:07:53,487 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-12 14:07:53,488 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-12 14:07:53,488 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-12 14:07:53,488 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-12 14:07:53,488 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-12 14:07:53,488 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-12 14:07:53,488 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-12 14:07:53,488 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-12 14:07:53,488 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-12 14:07:53,488 INFO L128 BoogieDeclarations]: Found specification of procedure aligned_alloc [2018-04-12 14:07:53,488 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-12 14:07:53,488 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-12 14:07:53,489 INFO L128 BoogieDeclarations]: Found specification of procedure at_quick_exit [2018-04-12 14:07:53,489 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-12 14:07:53,489 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-12 14:07:53,489 INFO L128 BoogieDeclarations]: Found specification of procedure quick_exit [2018-04-12 14:07:53,489 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-12 14:07:53,489 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-12 14:07:53,489 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-12 14:07:53,489 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-12 14:07:53,489 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-12 14:07:53,489 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-12 14:07:53,489 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-12 14:07:53,490 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-12 14:07:53,490 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-12 14:07:53,490 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-12 14:07:53,490 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-12 14:07:53,490 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-12 14:07:53,490 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-12 14:07:53,490 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-12 14:07:53,490 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-12 14:07:53,490 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-12 14:07:53,490 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-12 14:07:53,491 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-12 14:07:53,491 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-12 14:07:53,491 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-12 14:07:53,491 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-12 14:07:53,491 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-12 14:07:53,491 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-12 14:07:53,491 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-12 14:07:53,491 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-12 14:07:53,491 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-12 14:07:53,491 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-12 14:07:53,491 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-12 14:07:53,492 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-12 14:07:53,492 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-12 14:07:53,492 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-12 14:07:53,492 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-12 14:07:53,492 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-12 14:07:53,492 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-12 14:07:53,492 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-12 14:07:53,492 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-12 14:07:53,492 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-12 14:07:53,492 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-12 14:07:53,493 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-12 14:07:53,493 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data [2018-04-12 14:07:53,493 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-12 14:07:53,493 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-04-12 14:07:53,493 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-04-12 14:07:53,493 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-12 14:07:53,493 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeData [2018-04-12 14:07:53,493 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-12 14:07:53,493 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append [2018-04-12 14:07:53,493 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-12 14:07:53,493 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-12 14:07:53,494 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-12 14:07:53,494 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-12 14:07:53,494 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-12 14:07:53,858 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-12 14:07:53,858 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 02:07:53 BoogieIcfgContainer [2018-04-12 14:07:53,858 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-12 14:07:53,859 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-12 14:07:53,859 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-12 14:07:53,862 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-12 14:07:53,862 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.04 02:07:53" (1/3) ... [2018-04-12 14:07:53,862 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5251e882 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 02:07:53, skipping insertion in model container [2018-04-12 14:07:53,863 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 02:07:53" (2/3) ... [2018-04-12 14:07:53,863 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5251e882 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 02:07:53, skipping insertion in model container [2018-04-12 14:07:53,863 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 02:07:53" (3/3) ... [2018-04-12 14:07:53,865 INFO L107 eAbstractionObserver]: Analyzing ICFG optional_data_creation_test04_true-valid-memsafety.i [2018-04-12 14:07:53,870 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-12 14:07:53,876 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 45 error locations. [2018-04-12 14:07:53,900 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-12 14:07:53,900 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-12 14:07:53,900 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-12 14:07:53,901 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-12 14:07:53,901 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-12 14:07:53,901 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-12 14:07:53,901 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-12 14:07:53,901 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-12 14:07:53,901 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-12 14:07:53,901 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-12 14:07:53,912 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states. [2018-04-12 14:07:53,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-04-12 14:07:53,919 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:53,920 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:53,920 INFO L408 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:53,923 INFO L82 PathProgramCache]: Analyzing trace with hash -1089139594, now seen corresponding path program 1 times [2018-04-12 14:07:53,924 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:53,925 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:53,957 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:53,957 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:53,957 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:53,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:53,988 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:54,015 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:54,016 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:54,016 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-12 14:07:54,017 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-12 14:07:54,025 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-12 14:07:54,026 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 14:07:54,027 INFO L87 Difference]: Start difference. First operand 127 states. Second operand 3 states. [2018-04-12 14:07:54,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:54,136 INFO L93 Difference]: Finished difference Result 129 states and 136 transitions. [2018-04-12 14:07:54,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-12 14:07:54,137 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-04-12 14:07:54,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:54,144 INFO L225 Difference]: With dead ends: 129 [2018-04-12 14:07:54,144 INFO L226 Difference]: Without dead ends: 126 [2018-04-12 14:07:54,146 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 14:07:54,156 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-04-12 14:07:54,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 123. [2018-04-12 14:07:54,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-04-12 14:07:54,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 130 transitions. [2018-04-12 14:07:54,174 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 130 transitions. Word has length 7 [2018-04-12 14:07:54,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:54,174 INFO L459 AbstractCegarLoop]: Abstraction has 123 states and 130 transitions. [2018-04-12 14:07:54,175 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-12 14:07:54,175 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 130 transitions. [2018-04-12 14:07:54,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-04-12 14:07:54,175 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:54,175 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:54,175 INFO L408 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:54,175 INFO L82 PathProgramCache]: Analyzing trace with hash -1089139593, now seen corresponding path program 1 times [2018-04-12 14:07:54,175 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:54,175 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:54,176 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:54,176 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:54,176 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:54,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:54,186 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:54,208 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:54,209 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:54,209 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-12 14:07:54,210 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-12 14:07:54,210 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-12 14:07:54,210 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 14:07:54,210 INFO L87 Difference]: Start difference. First operand 123 states and 130 transitions. Second operand 3 states. [2018-04-12 14:07:54,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:54,274 INFO L93 Difference]: Finished difference Result 124 states and 132 transitions. [2018-04-12 14:07:54,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-12 14:07:54,275 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-04-12 14:07:54,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:54,276 INFO L225 Difference]: With dead ends: 124 [2018-04-12 14:07:54,276 INFO L226 Difference]: Without dead ends: 124 [2018-04-12 14:07:54,277 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 14:07:54,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-04-12 14:07:54,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 122. [2018-04-12 14:07:54,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-04-12 14:07:54,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 129 transitions. [2018-04-12 14:07:54,284 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 129 transitions. Word has length 7 [2018-04-12 14:07:54,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:54,284 INFO L459 AbstractCegarLoop]: Abstraction has 122 states and 129 transitions. [2018-04-12 14:07:54,284 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-12 14:07:54,284 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 129 transitions. [2018-04-12 14:07:54,285 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-04-12 14:07:54,285 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:54,285 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:54,285 INFO L408 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:54,285 INFO L82 PathProgramCache]: Analyzing trace with hash 1575434585, now seen corresponding path program 1 times [2018-04-12 14:07:54,285 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:54,285 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:54,286 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:54,286 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:54,286 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:54,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:54,301 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:54,349 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:54,350 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:54,350 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 14:07:54,350 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 14:07:54,350 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 14:07:54,350 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 14:07:54,351 INFO L87 Difference]: Start difference. First operand 122 states and 129 transitions. Second operand 5 states. [2018-04-12 14:07:54,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:54,519 INFO L93 Difference]: Finished difference Result 135 states and 143 transitions. [2018-04-12 14:07:54,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 14:07:54,519 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 14 [2018-04-12 14:07:54,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:54,520 INFO L225 Difference]: With dead ends: 135 [2018-04-12 14:07:54,520 INFO L226 Difference]: Without dead ends: 135 [2018-04-12 14:07:54,520 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-12 14:07:54,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-04-12 14:07:54,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 128. [2018-04-12 14:07:54,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-12 14:07:54,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 137 transitions. [2018-04-12 14:07:54,525 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 137 transitions. Word has length 14 [2018-04-12 14:07:54,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:54,525 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 137 transitions. [2018-04-12 14:07:54,525 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 14:07:54,525 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 137 transitions. [2018-04-12 14:07:54,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-04-12 14:07:54,526 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:54,526 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:54,526 INFO L408 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:54,526 INFO L82 PathProgramCache]: Analyzing trace with hash 1575434586, now seen corresponding path program 1 times [2018-04-12 14:07:54,526 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:54,526 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:54,527 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:54,527 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:54,527 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:54,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:54,535 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:54,605 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:54,605 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:54,605 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 14:07:54,605 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 14:07:54,606 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 14:07:54,606 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-12 14:07:54,606 INFO L87 Difference]: Start difference. First operand 128 states and 137 transitions. Second operand 7 states. [2018-04-12 14:07:54,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:54,772 INFO L93 Difference]: Finished difference Result 133 states and 142 transitions. [2018-04-12 14:07:54,773 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 14:07:54,773 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 14 [2018-04-12 14:07:54,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:54,774 INFO L225 Difference]: With dead ends: 133 [2018-04-12 14:07:54,774 INFO L226 Difference]: Without dead ends: 133 [2018-04-12 14:07:54,774 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-04-12 14:07:54,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-04-12 14:07:54,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 128. [2018-04-12 14:07:54,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-12 14:07:54,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 136 transitions. [2018-04-12 14:07:54,780 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 136 transitions. Word has length 14 [2018-04-12 14:07:54,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:54,780 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 136 transitions. [2018-04-12 14:07:54,781 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 14:07:54,781 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 136 transitions. [2018-04-12 14:07:54,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-04-12 14:07:54,781 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:54,781 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:54,781 INFO L408 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:54,781 INFO L82 PathProgramCache]: Analyzing trace with hash 1593831908, now seen corresponding path program 1 times [2018-04-12 14:07:54,782 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:54,782 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:54,782 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:54,783 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:54,783 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:54,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:54,792 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:54,820 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:54,820 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:54,820 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 14:07:54,820 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 14:07:54,821 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 14:07:54,821 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 14:07:54,821 INFO L87 Difference]: Start difference. First operand 128 states and 136 transitions. Second operand 4 states. [2018-04-12 14:07:54,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:54,893 INFO L93 Difference]: Finished difference Result 127 states and 135 transitions. [2018-04-12 14:07:54,894 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 14:07:54,894 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-04-12 14:07:54,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:54,894 INFO L225 Difference]: With dead ends: 127 [2018-04-12 14:07:54,894 INFO L226 Difference]: Without dead ends: 127 [2018-04-12 14:07:54,895 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 14:07:54,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-04-12 14:07:54,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-04-12 14:07:54,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-04-12 14:07:54,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 135 transitions. [2018-04-12 14:07:54,898 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 135 transitions. Word has length 15 [2018-04-12 14:07:54,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:54,898 INFO L459 AbstractCegarLoop]: Abstraction has 127 states and 135 transitions. [2018-04-12 14:07:54,898 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 14:07:54,898 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 135 transitions. [2018-04-12 14:07:54,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-04-12 14:07:54,899 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:54,899 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:54,899 INFO L408 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:54,899 INFO L82 PathProgramCache]: Analyzing trace with hash 1593831909, now seen corresponding path program 1 times [2018-04-12 14:07:54,899 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:54,899 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:54,900 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:54,900 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:54,900 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:54,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:54,909 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:54,928 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:54,929 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:54,929 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 14:07:54,929 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 14:07:54,929 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 14:07:54,929 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 14:07:54,929 INFO L87 Difference]: Start difference. First operand 127 states and 135 transitions. Second operand 4 states. [2018-04-12 14:07:54,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:54,989 INFO L93 Difference]: Finished difference Result 126 states and 134 transitions. [2018-04-12 14:07:54,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 14:07:54,990 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-04-12 14:07:54,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:54,990 INFO L225 Difference]: With dead ends: 126 [2018-04-12 14:07:54,990 INFO L226 Difference]: Without dead ends: 126 [2018-04-12 14:07:54,990 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 14:07:54,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-04-12 14:07:54,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-04-12 14:07:54,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-12 14:07:54,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 134 transitions. [2018-04-12 14:07:54,994 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 134 transitions. Word has length 15 [2018-04-12 14:07:54,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:54,994 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 134 transitions. [2018-04-12 14:07:54,994 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 14:07:54,994 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 134 transitions. [2018-04-12 14:07:54,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-12 14:07:54,994 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:54,994 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:54,994 INFO L408 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:54,994 INFO L82 PathProgramCache]: Analyzing trace with hash -1559978866, now seen corresponding path program 1 times [2018-04-12 14:07:54,995 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:54,995 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:54,995 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:54,995 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:54,995 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:55,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:55,002 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:55,018 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:55,018 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:55,018 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 14:07:55,019 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 14:07:55,019 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 14:07:55,019 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 14:07:55,019 INFO L87 Difference]: Start difference. First operand 126 states and 134 transitions. Second operand 5 states. [2018-04-12 14:07:55,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:55,107 INFO L93 Difference]: Finished difference Result 143 states and 152 transitions. [2018-04-12 14:07:55,107 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 14:07:55,107 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-04-12 14:07:55,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:55,108 INFO L225 Difference]: With dead ends: 143 [2018-04-12 14:07:55,108 INFO L226 Difference]: Without dead ends: 143 [2018-04-12 14:07:55,108 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-12 14:07:55,108 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-04-12 14:07:55,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 129. [2018-04-12 14:07:55,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-12 14:07:55,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 138 transitions. [2018-04-12 14:07:55,113 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 138 transitions. Word has length 22 [2018-04-12 14:07:55,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:55,113 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 138 transitions. [2018-04-12 14:07:55,113 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 14:07:55,113 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 138 transitions. [2018-04-12 14:07:55,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-12 14:07:55,114 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:55,114 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:55,114 INFO L408 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:55,114 INFO L82 PathProgramCache]: Analyzing trace with hash -1559978865, now seen corresponding path program 1 times [2018-04-12 14:07:55,114 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:55,115 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:55,115 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:55,115 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:55,115 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:55,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:55,125 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:55,149 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:55,150 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:55,150 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 14:07:55,150 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 14:07:55,150 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 14:07:55,150 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 14:07:55,150 INFO L87 Difference]: Start difference. First operand 129 states and 138 transitions. Second operand 5 states. [2018-04-12 14:07:55,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:55,254 INFO L93 Difference]: Finished difference Result 135 states and 144 transitions. [2018-04-12 14:07:55,254 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 14:07:55,254 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-04-12 14:07:55,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:55,255 INFO L225 Difference]: With dead ends: 135 [2018-04-12 14:07:55,255 INFO L226 Difference]: Without dead ends: 135 [2018-04-12 14:07:55,255 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-12 14:07:55,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-04-12 14:07:55,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 129. [2018-04-12 14:07:55,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-12 14:07:55,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 137 transitions. [2018-04-12 14:07:55,258 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 137 transitions. Word has length 22 [2018-04-12 14:07:55,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:55,258 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 137 transitions. [2018-04-12 14:07:55,258 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 14:07:55,258 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 137 transitions. [2018-04-12 14:07:55,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-12 14:07:55,258 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:55,259 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:55,259 INFO L408 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:55,259 INFO L82 PathProgramCache]: Analyzing trace with hash -1115224327, now seen corresponding path program 1 times [2018-04-12 14:07:55,259 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:55,259 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:55,260 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:55,260 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:55,260 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:55,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:55,269 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:55,286 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:55,286 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:55,287 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 14:07:55,287 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 14:07:55,287 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 14:07:55,287 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 14:07:55,287 INFO L87 Difference]: Start difference. First operand 129 states and 137 transitions. Second operand 4 states. [2018-04-12 14:07:55,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:55,340 INFO L93 Difference]: Finished difference Result 125 states and 133 transitions. [2018-04-12 14:07:55,340 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 14:07:55,340 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-04-12 14:07:55,340 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:55,341 INFO L225 Difference]: With dead ends: 125 [2018-04-12 14:07:55,341 INFO L226 Difference]: Without dead ends: 125 [2018-04-12 14:07:55,341 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 14:07:55,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-04-12 14:07:55,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2018-04-12 14:07:55,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-12 14:07:55,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 133 transitions. [2018-04-12 14:07:55,344 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 133 transitions. Word has length 23 [2018-04-12 14:07:55,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:55,344 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 133 transitions. [2018-04-12 14:07:55,344 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 14:07:55,344 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 133 transitions. [2018-04-12 14:07:55,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-12 14:07:55,345 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:55,345 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:55,345 INFO L408 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:55,345 INFO L82 PathProgramCache]: Analyzing trace with hash -1115224326, now seen corresponding path program 1 times [2018-04-12 14:07:55,345 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:55,345 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:55,346 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:55,346 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:55,346 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:55,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:55,355 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:55,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:55,384 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:55,384 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 14:07:55,384 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 14:07:55,384 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 14:07:55,385 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 14:07:55,385 INFO L87 Difference]: Start difference. First operand 125 states and 133 transitions. Second operand 4 states. [2018-04-12 14:07:55,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:55,464 INFO L93 Difference]: Finished difference Result 129 states and 137 transitions. [2018-04-12 14:07:55,464 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 14:07:55,464 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-04-12 14:07:55,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:55,465 INFO L225 Difference]: With dead ends: 129 [2018-04-12 14:07:55,465 INFO L226 Difference]: Without dead ends: 129 [2018-04-12 14:07:55,466 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 14:07:55,466 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-04-12 14:07:55,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 126. [2018-04-12 14:07:55,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-12 14:07:55,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 134 transitions. [2018-04-12 14:07:55,469 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 134 transitions. Word has length 23 [2018-04-12 14:07:55,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:55,469 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 134 transitions. [2018-04-12 14:07:55,470 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 14:07:55,470 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 134 transitions. [2018-04-12 14:07:55,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-12 14:07:55,470 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:55,470 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:55,471 INFO L408 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:55,471 INFO L82 PathProgramCache]: Analyzing trace with hash -196102737, now seen corresponding path program 1 times [2018-04-12 14:07:55,471 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:55,471 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:55,472 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:55,472 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:55,472 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:55,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:55,480 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:55,508 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:55,509 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:55,509 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 14:07:55,509 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 14:07:55,509 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 14:07:55,509 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 14:07:55,510 INFO L87 Difference]: Start difference. First operand 126 states and 134 transitions. Second operand 4 states. [2018-04-12 14:07:55,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:55,570 INFO L93 Difference]: Finished difference Result 136 states and 144 transitions. [2018-04-12 14:07:55,570 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 14:07:55,570 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 24 [2018-04-12 14:07:55,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:55,571 INFO L225 Difference]: With dead ends: 136 [2018-04-12 14:07:55,571 INFO L226 Difference]: Without dead ends: 136 [2018-04-12 14:07:55,571 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 14:07:55,572 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-04-12 14:07:55,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 128. [2018-04-12 14:07:55,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-12 14:07:55,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 137 transitions. [2018-04-12 14:07:55,573 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 137 transitions. Word has length 24 [2018-04-12 14:07:55,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:55,574 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 137 transitions. [2018-04-12 14:07:55,574 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 14:07:55,574 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 137 transitions. [2018-04-12 14:07:55,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-12 14:07:55,574 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:55,574 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:55,574 INFO L408 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:55,574 INFO L82 PathProgramCache]: Analyzing trace with hash -196102736, now seen corresponding path program 1 times [2018-04-12 14:07:55,574 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:55,575 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:55,575 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:55,575 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:55,575 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:55,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:55,584 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:55,629 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:55,629 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:55,629 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 14:07:55,630 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 14:07:55,630 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 14:07:55,630 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-04-12 14:07:55,630 INFO L87 Difference]: Start difference. First operand 128 states and 137 transitions. Second operand 7 states. [2018-04-12 14:07:55,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:55,788 INFO L93 Difference]: Finished difference Result 128 states and 136 transitions. [2018-04-12 14:07:55,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 14:07:55,789 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 24 [2018-04-12 14:07:55,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:55,789 INFO L225 Difference]: With dead ends: 128 [2018-04-12 14:07:55,789 INFO L226 Difference]: Without dead ends: 128 [2018-04-12 14:07:55,790 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2018-04-12 14:07:55,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-04-12 14:07:55,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-04-12 14:07:55,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-12 14:07:55,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 136 transitions. [2018-04-12 14:07:55,793 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 136 transitions. Word has length 24 [2018-04-12 14:07:55,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:55,793 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 136 transitions. [2018-04-12 14:07:55,793 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 14:07:55,793 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 136 transitions. [2018-04-12 14:07:55,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-12 14:07:55,794 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:55,794 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:55,794 INFO L408 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:55,794 INFO L82 PathProgramCache]: Analyzing trace with hash -212244555, now seen corresponding path program 1 times [2018-04-12 14:07:55,794 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:55,794 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:55,795 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:55,795 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:55,795 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:55,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:55,803 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:55,838 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:55,839 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:55,839 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 14:07:55,839 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 14:07:55,839 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 14:07:55,839 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-04-12 14:07:55,840 INFO L87 Difference]: Start difference. First operand 128 states and 136 transitions. Second operand 5 states. [2018-04-12 14:07:55,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:55,959 INFO L93 Difference]: Finished difference Result 125 states and 133 transitions. [2018-04-12 14:07:55,961 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 14:07:55,962 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2018-04-12 14:07:55,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:55,963 INFO L225 Difference]: With dead ends: 125 [2018-04-12 14:07:55,963 INFO L226 Difference]: Without dead ends: 125 [2018-04-12 14:07:55,963 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-04-12 14:07:55,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-04-12 14:07:55,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 123. [2018-04-12 14:07:55,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-04-12 14:07:55,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-04-12 14:07:55,966 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 24 [2018-04-12 14:07:55,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:55,967 INFO L459 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-04-12 14:07:55,967 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 14:07:55,967 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-04-12 14:07:55,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-12 14:07:55,968 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:55,968 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:55,968 INFO L408 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:55,968 INFO L82 PathProgramCache]: Analyzing trace with hash 748060877, now seen corresponding path program 1 times [2018-04-12 14:07:55,968 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:55,968 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:55,969 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:55,969 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:55,969 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:55,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:55,977 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:56,038 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:56,038 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:56,038 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 14:07:56,039 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 14:07:56,039 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 14:07:56,039 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-04-12 14:07:56,039 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 7 states. [2018-04-12 14:07:56,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:56,308 INFO L93 Difference]: Finished difference Result 139 states and 148 transitions. [2018-04-12 14:07:56,308 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 14:07:56,308 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-04-12 14:07:56,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:56,309 INFO L225 Difference]: With dead ends: 139 [2018-04-12 14:07:56,309 INFO L226 Difference]: Without dead ends: 139 [2018-04-12 14:07:56,310 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-04-12 14:07:56,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-04-12 14:07:56,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 129. [2018-04-12 14:07:56,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-12 14:07:56,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 138 transitions. [2018-04-12 14:07:56,313 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 138 transitions. Word has length 29 [2018-04-12 14:07:56,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:56,313 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 138 transitions. [2018-04-12 14:07:56,314 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 14:07:56,314 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 138 transitions. [2018-04-12 14:07:56,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-12 14:07:56,314 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:56,314 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:56,314 INFO L408 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:56,315 INFO L82 PathProgramCache]: Analyzing trace with hash 748060878, now seen corresponding path program 1 times [2018-04-12 14:07:56,315 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:56,315 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:56,315 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:56,316 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:56,316 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:56,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:56,325 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:56,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:56,387 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:56,387 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 14:07:56,387 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 14:07:56,387 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 14:07:56,388 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-12 14:07:56,388 INFO L87 Difference]: Start difference. First operand 129 states and 138 transitions. Second operand 7 states. [2018-04-12 14:07:56,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:56,619 INFO L93 Difference]: Finished difference Result 137 states and 147 transitions. [2018-04-12 14:07:56,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 14:07:56,619 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-04-12 14:07:56,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:56,620 INFO L225 Difference]: With dead ends: 137 [2018-04-12 14:07:56,620 INFO L226 Difference]: Without dead ends: 137 [2018-04-12 14:07:56,621 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-04-12 14:07:56,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-04-12 14:07:56,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 129. [2018-04-12 14:07:56,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-12 14:07:56,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 137 transitions. [2018-04-12 14:07:56,625 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 137 transitions. Word has length 29 [2018-04-12 14:07:56,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:56,626 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 137 transitions. [2018-04-12 14:07:56,626 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 14:07:56,626 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 137 transitions. [2018-04-12 14:07:56,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-12 14:07:56,626 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:56,630 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:56,630 INFO L408 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:56,630 INFO L82 PathProgramCache]: Analyzing trace with hash 2087682397, now seen corresponding path program 1 times [2018-04-12 14:07:56,630 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:56,630 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:56,632 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:56,632 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:56,632 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:56,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:56,640 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:56,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:56,685 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:56,685 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 14:07:56,685 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 14:07:56,686 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 14:07:56,686 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 14:07:56,686 INFO L87 Difference]: Start difference. First operand 129 states and 137 transitions. Second operand 5 states. [2018-04-12 14:07:56,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:56,801 INFO L93 Difference]: Finished difference Result 127 states and 135 transitions. [2018-04-12 14:07:56,802 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 14:07:56,802 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-04-12 14:07:56,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:56,803 INFO L225 Difference]: With dead ends: 127 [2018-04-12 14:07:56,803 INFO L226 Difference]: Without dead ends: 127 [2018-04-12 14:07:56,803 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-12 14:07:56,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-04-12 14:07:56,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 125. [2018-04-12 14:07:56,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-12 14:07:56,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 132 transitions. [2018-04-12 14:07:56,806 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 132 transitions. Word has length 30 [2018-04-12 14:07:56,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:56,807 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 132 transitions. [2018-04-12 14:07:56,807 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 14:07:56,807 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 132 transitions. [2018-04-12 14:07:56,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-12 14:07:56,807 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:56,808 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:56,808 INFO L408 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:56,808 INFO L82 PathProgramCache]: Analyzing trace with hash 2087682398, now seen corresponding path program 1 times [2018-04-12 14:07:56,808 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:56,808 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:56,809 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:56,809 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:56,809 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:56,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:56,817 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:56,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:56,888 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:56,888 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 14:07:56,888 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 14:07:56,888 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 14:07:56,888 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-04-12 14:07:56,889 INFO L87 Difference]: Start difference. First operand 125 states and 132 transitions. Second operand 6 states. [2018-04-12 14:07:56,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:56,993 INFO L93 Difference]: Finished difference Result 132 states and 141 transitions. [2018-04-12 14:07:56,993 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 14:07:56,993 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-04-12 14:07:56,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:56,994 INFO L225 Difference]: With dead ends: 132 [2018-04-12 14:07:56,994 INFO L226 Difference]: Without dead ends: 132 [2018-04-12 14:07:56,994 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-04-12 14:07:56,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-04-12 14:07:56,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 125. [2018-04-12 14:07:56,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-12 14:07:56,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 133 transitions. [2018-04-12 14:07:56,998 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 133 transitions. Word has length 30 [2018-04-12 14:07:56,998 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:56,998 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 133 transitions. [2018-04-12 14:07:56,998 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 14:07:56,998 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 133 transitions. [2018-04-12 14:07:56,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-12 14:07:56,999 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:56,999 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:56,999 INFO L408 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:56,999 INFO L82 PathProgramCache]: Analyzing trace with hash 72869690, now seen corresponding path program 1 times [2018-04-12 14:07:56,999 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:56,999 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:57,000 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:57,000 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:57,000 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:57,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:57,008 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:57,029 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:57,029 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:57,029 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 14:07:57,029 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 14:07:57,029 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 14:07:57,030 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 14:07:57,030 INFO L87 Difference]: Start difference. First operand 125 states and 133 transitions. Second operand 5 states. [2018-04-12 14:07:57,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:57,119 INFO L93 Difference]: Finished difference Result 124 states and 132 transitions. [2018-04-12 14:07:57,119 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 14:07:57,119 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-04-12 14:07:57,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:57,119 INFO L225 Difference]: With dead ends: 124 [2018-04-12 14:07:57,119 INFO L226 Difference]: Without dead ends: 124 [2018-04-12 14:07:57,120 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-12 14:07:57,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-04-12 14:07:57,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2018-04-12 14:07:57,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-04-12 14:07:57,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2018-04-12 14:07:57,121 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 30 [2018-04-12 14:07:57,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:57,122 INFO L459 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2018-04-12 14:07:57,122 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 14:07:57,122 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2018-04-12 14:07:57,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-12 14:07:57,122 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:57,122 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:57,122 INFO L408 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:57,122 INFO L82 PathProgramCache]: Analyzing trace with hash 72869691, now seen corresponding path program 1 times [2018-04-12 14:07:57,122 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:57,122 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:57,123 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:57,123 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:57,123 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:57,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:57,129 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:57,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:57,165 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:57,165 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 14:07:57,165 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 14:07:57,165 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 14:07:57,165 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-04-12 14:07:57,165 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 6 states. [2018-04-12 14:07:57,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:57,263 INFO L93 Difference]: Finished difference Result 131 states and 139 transitions. [2018-04-12 14:07:57,263 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 14:07:57,263 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-04-12 14:07:57,264 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:57,264 INFO L225 Difference]: With dead ends: 131 [2018-04-12 14:07:57,264 INFO L226 Difference]: Without dead ends: 131 [2018-04-12 14:07:57,265 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2018-04-12 14:07:57,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-04-12 14:07:57,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 129. [2018-04-12 14:07:57,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-12 14:07:57,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 137 transitions. [2018-04-12 14:07:57,268 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 137 transitions. Word has length 30 [2018-04-12 14:07:57,268 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:57,268 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 137 transitions. [2018-04-12 14:07:57,268 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 14:07:57,268 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 137 transitions. [2018-04-12 14:07:57,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-04-12 14:07:57,268 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:57,269 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:57,269 INFO L408 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:57,269 INFO L82 PathProgramCache]: Analyzing trace with hash 1626965550, now seen corresponding path program 1 times [2018-04-12 14:07:57,269 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:57,269 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:57,270 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:57,270 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:57,270 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:57,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:57,277 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:57,329 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:57,329 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:57,329 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 14:07:57,329 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 14:07:57,329 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 14:07:57,329 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-04-12 14:07:57,330 INFO L87 Difference]: Start difference. First operand 129 states and 137 transitions. Second operand 7 states. [2018-04-12 14:07:57,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:57,567 INFO L93 Difference]: Finished difference Result 141 states and 150 transitions. [2018-04-12 14:07:57,567 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 14:07:57,567 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 31 [2018-04-12 14:07:57,567 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:57,568 INFO L225 Difference]: With dead ends: 141 [2018-04-12 14:07:57,568 INFO L226 Difference]: Without dead ends: 141 [2018-04-12 14:07:57,568 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-04-12 14:07:57,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-04-12 14:07:57,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 131. [2018-04-12 14:07:57,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-04-12 14:07:57,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 140 transitions. [2018-04-12 14:07:57,570 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 140 transitions. Word has length 31 [2018-04-12 14:07:57,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:57,570 INFO L459 AbstractCegarLoop]: Abstraction has 131 states and 140 transitions. [2018-04-12 14:07:57,570 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 14:07:57,570 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 140 transitions. [2018-04-12 14:07:57,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-04-12 14:07:57,571 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:57,571 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:57,571 INFO L408 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:57,571 INFO L82 PathProgramCache]: Analyzing trace with hash 1626965551, now seen corresponding path program 1 times [2018-04-12 14:07:57,571 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:57,571 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:57,572 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:57,572 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:57,572 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:57,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:57,582 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:57,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:57,685 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:57,686 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-12 14:07:57,686 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 14:07:57,686 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 14:07:57,686 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-04-12 14:07:57,686 INFO L87 Difference]: Start difference. First operand 131 states and 140 transitions. Second operand 10 states. [2018-04-12 14:07:57,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:57,980 INFO L93 Difference]: Finished difference Result 140 states and 149 transitions. [2018-04-12 14:07:57,980 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-04-12 14:07:57,980 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 31 [2018-04-12 14:07:57,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:57,981 INFO L225 Difference]: With dead ends: 140 [2018-04-12 14:07:57,981 INFO L226 Difference]: Without dead ends: 140 [2018-04-12 14:07:57,981 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=233, Unknown=0, NotChecked=0, Total=306 [2018-04-12 14:07:57,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-04-12 14:07:57,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 126. [2018-04-12 14:07:57,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-12 14:07:57,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 134 transitions. [2018-04-12 14:07:57,984 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 134 transitions. Word has length 31 [2018-04-12 14:07:57,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:57,984 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 134 transitions. [2018-04-12 14:07:57,984 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 14:07:57,984 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 134 transitions. [2018-04-12 14:07:57,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-04-12 14:07:57,984 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:57,984 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:57,985 INFO L408 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:57,985 INFO L82 PathProgramCache]: Analyzing trace with hash -1275051825, now seen corresponding path program 1 times [2018-04-12 14:07:57,985 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:57,985 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:57,985 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:57,985 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:57,985 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:57,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:57,992 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:58,029 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:58,030 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:58,030 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 14:07:58,030 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 14:07:58,030 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 14:07:58,031 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-04-12 14:07:58,031 INFO L87 Difference]: Start difference. First operand 126 states and 134 transitions. Second operand 7 states. [2018-04-12 14:07:58,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:58,173 INFO L93 Difference]: Finished difference Result 141 states and 151 transitions. [2018-04-12 14:07:58,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-12 14:07:58,173 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2018-04-12 14:07:58,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:58,173 INFO L225 Difference]: With dead ends: 141 [2018-04-12 14:07:58,174 INFO L226 Difference]: Without dead ends: 141 [2018-04-12 14:07:58,174 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-04-12 14:07:58,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-04-12 14:07:58,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 131. [2018-04-12 14:07:58,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-04-12 14:07:58,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 141 transitions. [2018-04-12 14:07:58,176 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 141 transitions. Word has length 33 [2018-04-12 14:07:58,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:58,177 INFO L459 AbstractCegarLoop]: Abstraction has 131 states and 141 transitions. [2018-04-12 14:07:58,177 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 14:07:58,177 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 141 transitions. [2018-04-12 14:07:58,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-04-12 14:07:58,177 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:58,177 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:58,177 INFO L408 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:58,178 INFO L82 PathProgramCache]: Analyzing trace with hash -1275051824, now seen corresponding path program 1 times [2018-04-12 14:07:58,178 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:58,178 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:58,178 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:58,179 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:58,179 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:58,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:58,187 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:58,255 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:58,255 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:58,256 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-12 14:07:58,256 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 14:07:58,256 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 14:07:58,256 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-04-12 14:07:58,256 INFO L87 Difference]: Start difference. First operand 131 states and 141 transitions. Second operand 9 states. [2018-04-12 14:07:58,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:58,597 INFO L93 Difference]: Finished difference Result 178 states and 195 transitions. [2018-04-12 14:07:58,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-12 14:07:58,597 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 33 [2018-04-12 14:07:58,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:58,598 INFO L225 Difference]: With dead ends: 178 [2018-04-12 14:07:58,598 INFO L226 Difference]: Without dead ends: 178 [2018-04-12 14:07:58,599 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2018-04-12 14:07:58,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-04-12 14:07:58,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 149. [2018-04-12 14:07:58,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-04-12 14:07:58,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 164 transitions. [2018-04-12 14:07:58,602 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 164 transitions. Word has length 33 [2018-04-12 14:07:58,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:58,602 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 164 transitions. [2018-04-12 14:07:58,602 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 14:07:58,602 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 164 transitions. [2018-04-12 14:07:58,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-04-12 14:07:58,603 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:58,603 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:58,603 INFO L408 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:58,603 INFO L82 PathProgramCache]: Analyzing trace with hash 573717311, now seen corresponding path program 1 times [2018-04-12 14:07:58,603 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:58,603 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:58,604 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:58,604 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:58,604 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:58,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:58,613 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:58,729 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:58,729 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 14:07:58,730 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 14:07:58,739 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:58,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:58,771 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 14:07:58,884 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:07:58,890 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 14:07:58,890 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:07:58,903 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:07:58,904 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:07:58,904 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 14:07:58,905 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:07:58,909 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:07:58,909 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:18 [2018-04-12 14:07:58,939 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:58,958 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 14:07:58,958 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 14 [2018-04-12 14:07:58,958 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-04-12 14:07:58,958 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-04-12 14:07:58,958 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2018-04-12 14:07:58,958 INFO L87 Difference]: Start difference. First operand 149 states and 164 transitions. Second operand 15 states. [2018-04-12 14:07:59,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:59,293 INFO L93 Difference]: Finished difference Result 156 states and 170 transitions. [2018-04-12 14:07:59,293 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-12 14:07:59,293 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 34 [2018-04-12 14:07:59,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:59,295 INFO L225 Difference]: With dead ends: 156 [2018-04-12 14:07:59,295 INFO L226 Difference]: Without dead ends: 156 [2018-04-12 14:07:59,296 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 27 SyntacticMatches, 4 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=82, Invalid=298, Unknown=0, NotChecked=0, Total=380 [2018-04-12 14:07:59,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-04-12 14:07:59,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 137. [2018-04-12 14:07:59,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-04-12 14:07:59,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 147 transitions. [2018-04-12 14:07:59,300 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 147 transitions. Word has length 34 [2018-04-12 14:07:59,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:59,300 INFO L459 AbstractCegarLoop]: Abstraction has 137 states and 147 transitions. [2018-04-12 14:07:59,300 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-04-12 14:07:59,301 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 147 transitions. [2018-04-12 14:07:59,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-04-12 14:07:59,301 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:59,301 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:59,301 INFO L408 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:59,301 INFO L82 PathProgramCache]: Analyzing trace with hash -1260047476, now seen corresponding path program 1 times [2018-04-12 14:07:59,301 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:59,302 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:59,302 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:59,302 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:59,302 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:59,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:59,310 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:59,354 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:59,355 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:59,355 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-12 14:07:59,355 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 14:07:59,355 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 14:07:59,355 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-04-12 14:07:59,355 INFO L87 Difference]: Start difference. First operand 137 states and 147 transitions. Second operand 8 states. [2018-04-12 14:07:59,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:59,440 INFO L93 Difference]: Finished difference Result 164 states and 175 transitions. [2018-04-12 14:07:59,440 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-12 14:07:59,441 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 35 [2018-04-12 14:07:59,441 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:59,441 INFO L225 Difference]: With dead ends: 164 [2018-04-12 14:07:59,441 INFO L226 Difference]: Without dead ends: 164 [2018-04-12 14:07:59,441 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-04-12 14:07:59,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-04-12 14:07:59,444 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 137. [2018-04-12 14:07:59,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-04-12 14:07:59,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 145 transitions. [2018-04-12 14:07:59,445 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 145 transitions. Word has length 35 [2018-04-12 14:07:59,445 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:59,445 INFO L459 AbstractCegarLoop]: Abstraction has 137 states and 145 transitions. [2018-04-12 14:07:59,445 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 14:07:59,445 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 145 transitions. [2018-04-12 14:07:59,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-04-12 14:07:59,446 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:59,446 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:59,446 INFO L408 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:59,446 INFO L82 PathProgramCache]: Analyzing trace with hash -378073276, now seen corresponding path program 1 times [2018-04-12 14:07:59,446 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:59,446 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:59,447 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:59,447 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:59,447 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:59,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:59,455 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:59,476 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:59,476 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:59,476 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 14:07:59,476 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 14:07:59,477 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 14:07:59,477 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 14:07:59,477 INFO L87 Difference]: Start difference. First operand 137 states and 145 transitions. Second operand 5 states. [2018-04-12 14:07:59,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:59,562 INFO L93 Difference]: Finished difference Result 136 states and 144 transitions. [2018-04-12 14:07:59,562 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 14:07:59,562 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 36 [2018-04-12 14:07:59,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:59,563 INFO L225 Difference]: With dead ends: 136 [2018-04-12 14:07:59,563 INFO L226 Difference]: Without dead ends: 136 [2018-04-12 14:07:59,563 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-04-12 14:07:59,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-04-12 14:07:59,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-04-12 14:07:59,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-04-12 14:07:59,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 144 transitions. [2018-04-12 14:07:59,566 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 144 transitions. Word has length 36 [2018-04-12 14:07:59,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:59,566 INFO L459 AbstractCegarLoop]: Abstraction has 136 states and 144 transitions. [2018-04-12 14:07:59,567 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 14:07:59,567 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 144 transitions. [2018-04-12 14:07:59,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-04-12 14:07:59,567 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:59,567 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:59,567 INFO L408 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:59,568 INFO L82 PathProgramCache]: Analyzing trace with hash -378073275, now seen corresponding path program 1 times [2018-04-12 14:07:59,568 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:59,568 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:59,568 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:59,568 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:59,569 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:59,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:07:59,577 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:07:59,705 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:07:59,705 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:07:59,705 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-12 14:07:59,706 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 14:07:59,706 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 14:07:59,706 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-04-12 14:07:59,706 INFO L87 Difference]: Start difference. First operand 136 states and 144 transitions. Second operand 10 states. [2018-04-12 14:07:59,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:07:59,985 INFO L93 Difference]: Finished difference Result 160 states and 172 transitions. [2018-04-12 14:07:59,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-04-12 14:07:59,985 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 36 [2018-04-12 14:07:59,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:07:59,986 INFO L225 Difference]: With dead ends: 160 [2018-04-12 14:07:59,986 INFO L226 Difference]: Without dead ends: 160 [2018-04-12 14:07:59,986 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=57, Invalid=215, Unknown=0, NotChecked=0, Total=272 [2018-04-12 14:07:59,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-04-12 14:07:59,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 139. [2018-04-12 14:07:59,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-04-12 14:07:59,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 147 transitions. [2018-04-12 14:07:59,989 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 147 transitions. Word has length 36 [2018-04-12 14:07:59,990 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:07:59,990 INFO L459 AbstractCegarLoop]: Abstraction has 139 states and 147 transitions. [2018-04-12 14:07:59,990 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 14:07:59,990 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 147 transitions. [2018-04-12 14:07:59,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-04-12 14:07:59,990 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:07:59,991 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:07:59,992 INFO L408 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:07:59,992 INFO L82 PathProgramCache]: Analyzing trace with hash -1381840613, now seen corresponding path program 1 times [2018-04-12 14:07:59,992 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:07:59,992 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:07:59,993 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:07:59,993 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:07:59,993 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:00,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:08:00,002 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:08:00,119 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:08:00,119 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 14:08:00,119 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 14:08:00,128 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:08:00,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:08:00,148 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 14:08:00,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 14:08:00,153 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:00,155 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:00,156 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 14:08:00,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-12 14:08:00,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-12 14:08:00,170 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:00,172 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:00,193 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-12 14:08:00,196 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-12 14:08:00,197 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:00,199 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:00,206 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:00,206 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:35, output treesize:21 [2018-04-12 14:08:00,272 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-04-12 14:08:00,274 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5 [2018-04-12 14:08:00,274 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:00,276 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:00,286 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 26 [2018-04-12 14:08:00,287 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 11 [2018-04-12 14:08:00,288 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:00,314 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:00,317 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:00,317 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:55, output treesize:19 [2018-04-12 14:08:00,331 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:08:00,349 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 14:08:00,349 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 15 [2018-04-12 14:08:00,349 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-12 14:08:00,349 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-12 14:08:00,349 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=191, Unknown=0, NotChecked=0, Total=240 [2018-04-12 14:08:00,350 INFO L87 Difference]: Start difference. First operand 139 states and 147 transitions. Second operand 16 states. [2018-04-12 14:08:00,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:08:00,721 INFO L93 Difference]: Finished difference Result 149 states and 157 transitions. [2018-04-12 14:08:00,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-12 14:08:00,722 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 37 [2018-04-12 14:08:00,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:08:00,723 INFO L225 Difference]: With dead ends: 149 [2018-04-12 14:08:00,723 INFO L226 Difference]: Without dead ends: 149 [2018-04-12 14:08:00,723 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=143, Invalid=409, Unknown=0, NotChecked=0, Total=552 [2018-04-12 14:08:00,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-04-12 14:08:00,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-04-12 14:08:00,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-04-12 14:08:00,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 157 transitions. [2018-04-12 14:08:00,726 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 157 transitions. Word has length 37 [2018-04-12 14:08:00,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:08:00,727 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 157 transitions. [2018-04-12 14:08:00,727 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-12 14:08:00,727 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 157 transitions. [2018-04-12 14:08:00,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-04-12 14:08:00,727 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:08:00,727 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:08:00,727 INFO L408 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:08:00,728 INFO L82 PathProgramCache]: Analyzing trace with hash 760893153, now seen corresponding path program 1 times [2018-04-12 14:08:00,728 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:08:00,728 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:08:00,728 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:00,729 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:08:00,729 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:00,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:08:00,736 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:08:00,972 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:08:00,973 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:08:00,973 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-04-12 14:08:00,973 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-12 14:08:00,973 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-12 14:08:00,973 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2018-04-12 14:08:00,973 INFO L87 Difference]: Start difference. First operand 149 states and 157 transitions. Second operand 17 states. [2018-04-12 14:08:01,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:08:01,921 INFO L93 Difference]: Finished difference Result 188 states and 201 transitions. [2018-04-12 14:08:01,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-04-12 14:08:01,921 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 40 [2018-04-12 14:08:01,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:08:01,922 INFO L225 Difference]: With dead ends: 188 [2018-04-12 14:08:01,922 INFO L226 Difference]: Without dead ends: 188 [2018-04-12 14:08:01,923 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=134, Invalid=988, Unknown=0, NotChecked=0, Total=1122 [2018-04-12 14:08:01,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-04-12 14:08:01,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 166. [2018-04-12 14:08:01,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-04-12 14:08:01,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 177 transitions. [2018-04-12 14:08:01,926 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 177 transitions. Word has length 40 [2018-04-12 14:08:01,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:08:01,926 INFO L459 AbstractCegarLoop]: Abstraction has 166 states and 177 transitions. [2018-04-12 14:08:01,927 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-12 14:08:01,927 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 177 transitions. [2018-04-12 14:08:01,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-04-12 14:08:01,927 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:08:01,927 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:08:01,927 INFO L408 AbstractCegarLoop]: === Iteration 30 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:08:01,928 INFO L82 PathProgramCache]: Analyzing trace with hash 1372557105, now seen corresponding path program 1 times [2018-04-12 14:08:01,928 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:08:01,928 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:08:01,928 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:01,928 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:08:01,929 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:01,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:08:01,938 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:08:02,034 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:08:02,034 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:08:02,034 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-04-12 14:08:02,034 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-12 14:08:02,034 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-12 14:08:02,035 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-04-12 14:08:02,035 INFO L87 Difference]: Start difference. First operand 166 states and 177 transitions. Second operand 11 states. [2018-04-12 14:08:02,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:08:02,465 INFO L93 Difference]: Finished difference Result 200 states and 218 transitions. [2018-04-12 14:08:02,465 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-12 14:08:02,465 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 40 [2018-04-12 14:08:02,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:08:02,466 INFO L225 Difference]: With dead ends: 200 [2018-04-12 14:08:02,466 INFO L226 Difference]: Without dead ends: 200 [2018-04-12 14:08:02,466 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=89, Invalid=331, Unknown=0, NotChecked=0, Total=420 [2018-04-12 14:08:02,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2018-04-12 14:08:02,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 175. [2018-04-12 14:08:02,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-04-12 14:08:02,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 188 transitions. [2018-04-12 14:08:02,470 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 188 transitions. Word has length 40 [2018-04-12 14:08:02,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:08:02,470 INFO L459 AbstractCegarLoop]: Abstraction has 175 states and 188 transitions. [2018-04-12 14:08:02,470 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-12 14:08:02,470 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 188 transitions. [2018-04-12 14:08:02,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-04-12 14:08:02,470 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:08:02,470 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:08:02,471 INFO L408 AbstractCegarLoop]: === Iteration 31 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:08:02,471 INFO L82 PathProgramCache]: Analyzing trace with hash 1203361471, now seen corresponding path program 1 times [2018-04-12 14:08:02,471 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:08:02,471 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:08:02,471 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:02,471 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:08:02,471 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:02,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:08:02,476 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:08:02,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:08:02,556 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:08:02,556 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-04-12 14:08:02,556 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 14:08:02,557 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 14:08:02,557 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-04-12 14:08:02,557 INFO L87 Difference]: Start difference. First operand 175 states and 188 transitions. Second operand 8 states. [2018-04-12 14:08:02,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:08:02,636 INFO L93 Difference]: Finished difference Result 193 states and 207 transitions. [2018-04-12 14:08:02,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-12 14:08:02,636 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-04-12 14:08:02,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:08:02,637 INFO L225 Difference]: With dead ends: 193 [2018-04-12 14:08:02,637 INFO L226 Difference]: Without dead ends: 193 [2018-04-12 14:08:02,637 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-04-12 14:08:02,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-04-12 14:08:02,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 184. [2018-04-12 14:08:02,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-04-12 14:08:02,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 201 transitions. [2018-04-12 14:08:02,640 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 201 transitions. Word has length 44 [2018-04-12 14:08:02,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:08:02,640 INFO L459 AbstractCegarLoop]: Abstraction has 184 states and 201 transitions. [2018-04-12 14:08:02,640 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 14:08:02,640 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 201 transitions. [2018-04-12 14:08:02,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-04-12 14:08:02,640 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:08:02,640 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:08:02,640 INFO L408 AbstractCegarLoop]: === Iteration 32 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:08:02,641 INFO L82 PathProgramCache]: Analyzing trace with hash 1760106820, now seen corresponding path program 1 times [2018-04-12 14:08:02,641 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:08:02,641 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:08:02,641 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:02,641 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:08:02,641 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:02,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:08:02,651 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:08:02,733 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:08:02,733 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:08:02,733 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-12 14:08:02,733 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 14:08:02,734 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 14:08:02,734 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-04-12 14:08:02,734 INFO L87 Difference]: Start difference. First operand 184 states and 201 transitions. Second operand 10 states. [2018-04-12 14:08:02,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:08:02,889 INFO L93 Difference]: Finished difference Result 192 states and 206 transitions. [2018-04-12 14:08:02,890 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-12 14:08:02,890 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 43 [2018-04-12 14:08:02,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:08:02,890 INFO L225 Difference]: With dead ends: 192 [2018-04-12 14:08:02,890 INFO L226 Difference]: Without dead ends: 192 [2018-04-12 14:08:02,891 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2018-04-12 14:08:02,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2018-04-12 14:08:02,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 174. [2018-04-12 14:08:02,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-04-12 14:08:02,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 189 transitions. [2018-04-12 14:08:02,895 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 189 transitions. Word has length 43 [2018-04-12 14:08:02,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:08:02,895 INFO L459 AbstractCegarLoop]: Abstraction has 174 states and 189 transitions. [2018-04-12 14:08:02,895 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 14:08:02,895 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 189 transitions. [2018-04-12 14:08:02,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-04-12 14:08:02,896 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:08:02,896 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:08:02,896 INFO L408 AbstractCegarLoop]: === Iteration 33 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:08:02,896 INFO L82 PathProgramCache]: Analyzing trace with hash -1350499908, now seen corresponding path program 1 times [2018-04-12 14:08:02,896 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:08:02,896 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:08:02,897 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:02,897 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:08:02,897 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:02,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:08:02,904 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:08:02,937 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:08:02,937 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:08:02,938 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 14:08:02,938 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 14:08:02,938 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 14:08:02,938 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-12 14:08:02,939 INFO L87 Difference]: Start difference. First operand 174 states and 189 transitions. Second operand 6 states. [2018-04-12 14:08:03,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:08:03,050 INFO L93 Difference]: Finished difference Result 184 states and 199 transitions. [2018-04-12 14:08:03,050 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 14:08:03,050 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 45 [2018-04-12 14:08:03,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:08:03,051 INFO L225 Difference]: With dead ends: 184 [2018-04-12 14:08:03,051 INFO L226 Difference]: Without dead ends: 184 [2018-04-12 14:08:03,051 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-04-12 14:08:03,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-04-12 14:08:03,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 177. [2018-04-12 14:08:03,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-04-12 14:08:03,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 193 transitions. [2018-04-12 14:08:03,055 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 193 transitions. Word has length 45 [2018-04-12 14:08:03,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:08:03,055 INFO L459 AbstractCegarLoop]: Abstraction has 177 states and 193 transitions. [2018-04-12 14:08:03,055 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 14:08:03,055 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 193 transitions. [2018-04-12 14:08:03,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-04-12 14:08:03,055 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:08:03,055 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:08:03,055 INFO L408 AbstractCegarLoop]: === Iteration 34 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:08:03,056 INFO L82 PathProgramCache]: Analyzing trace with hash 816398688, now seen corresponding path program 1 times [2018-04-12 14:08:03,056 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:08:03,056 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:08:03,056 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:03,056 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:08:03,056 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:03,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:08:03,062 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:08:03,270 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:08:03,271 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:08:03,271 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-04-12 14:08:03,271 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-12 14:08:03,271 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-12 14:08:03,271 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=269, Unknown=0, NotChecked=0, Total=306 [2018-04-12 14:08:03,272 INFO L87 Difference]: Start difference. First operand 177 states and 193 transitions. Second operand 18 states. [2018-04-12 14:08:03,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:08:03,898 INFO L93 Difference]: Finished difference Result 229 states and 253 transitions. [2018-04-12 14:08:03,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-12 14:08:03,899 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 47 [2018-04-12 14:08:03,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:08:03,900 INFO L225 Difference]: With dead ends: 229 [2018-04-12 14:08:03,900 INFO L226 Difference]: Without dead ends: 229 [2018-04-12 14:08:03,900 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=136, Invalid=1054, Unknown=0, NotChecked=0, Total=1190 [2018-04-12 14:08:03,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229 states. [2018-04-12 14:08:03,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 201. [2018-04-12 14:08:03,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-04-12 14:08:03,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 224 transitions. [2018-04-12 14:08:03,903 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 224 transitions. Word has length 47 [2018-04-12 14:08:03,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:08:03,903 INFO L459 AbstractCegarLoop]: Abstraction has 201 states and 224 transitions. [2018-04-12 14:08:03,903 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-12 14:08:03,903 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 224 transitions. [2018-04-12 14:08:03,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-04-12 14:08:03,903 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:08:03,903 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:08:03,903 INFO L408 AbstractCegarLoop]: === Iteration 35 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:08:03,904 INFO L82 PathProgramCache]: Analyzing trace with hash 816398689, now seen corresponding path program 1 times [2018-04-12 14:08:03,904 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:08:03,904 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:08:03,904 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:03,904 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:08:03,904 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:03,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:08:03,910 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:08:04,181 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:08:04,181 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:08:04,181 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-04-12 14:08:04,181 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-12 14:08:04,181 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-12 14:08:04,182 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=303, Unknown=0, NotChecked=0, Total=342 [2018-04-12 14:08:04,182 INFO L87 Difference]: Start difference. First operand 201 states and 224 transitions. Second operand 19 states. [2018-04-12 14:08:04,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:08:04,991 INFO L93 Difference]: Finished difference Result 250 states and 277 transitions. [2018-04-12 14:08:04,992 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-04-12 14:08:04,992 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-04-12 14:08:04,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:08:04,993 INFO L225 Difference]: With dead ends: 250 [2018-04-12 14:08:04,993 INFO L226 Difference]: Without dead ends: 250 [2018-04-12 14:08:04,993 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 246 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=150, Invalid=1256, Unknown=0, NotChecked=0, Total=1406 [2018-04-12 14:08:04,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 250 states. [2018-04-12 14:08:04,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 250 to 223. [2018-04-12 14:08:04,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-04-12 14:08:04,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 251 transitions. [2018-04-12 14:08:04,996 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 251 transitions. Word has length 47 [2018-04-12 14:08:04,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:08:04,996 INFO L459 AbstractCegarLoop]: Abstraction has 223 states and 251 transitions. [2018-04-12 14:08:04,996 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-12 14:08:04,996 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 251 transitions. [2018-04-12 14:08:04,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-04-12 14:08:04,997 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:08:04,997 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:08:04,997 INFO L408 AbstractCegarLoop]: === Iteration 36 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:08:04,997 INFO L82 PathProgramCache]: Analyzing trace with hash -1783942653, now seen corresponding path program 1 times [2018-04-12 14:08:04,998 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:08:04,998 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:08:04,998 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:04,998 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:08:04,998 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:05,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:08:05,006 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:08:05,076 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:08:05,076 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:08:05,076 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-12 14:08:05,077 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 14:08:05,077 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 14:08:05,077 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-04-12 14:08:05,077 INFO L87 Difference]: Start difference. First operand 223 states and 251 transitions. Second operand 10 states. [2018-04-12 14:08:05,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:08:05,234 INFO L93 Difference]: Finished difference Result 242 states and 271 transitions. [2018-04-12 14:08:05,234 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-12 14:08:05,234 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 48 [2018-04-12 14:08:05,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:08:05,235 INFO L225 Difference]: With dead ends: 242 [2018-04-12 14:08:05,235 INFO L226 Difference]: Without dead ends: 242 [2018-04-12 14:08:05,235 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2018-04-12 14:08:05,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2018-04-12 14:08:05,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 234. [2018-04-12 14:08:05,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2018-04-12 14:08:05,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 264 transitions. [2018-04-12 14:08:05,239 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 264 transitions. Word has length 48 [2018-04-12 14:08:05,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:08:05,239 INFO L459 AbstractCegarLoop]: Abstraction has 234 states and 264 transitions. [2018-04-12 14:08:05,239 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 14:08:05,239 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 264 transitions. [2018-04-12 14:08:05,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-04-12 14:08:05,239 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:08:05,240 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:08:05,240 INFO L408 AbstractCegarLoop]: === Iteration 37 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:08:05,240 INFO L82 PathProgramCache]: Analyzing trace with hash -1066362853, now seen corresponding path program 1 times [2018-04-12 14:08:05,240 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:08:05,240 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:08:05,240 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:05,240 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:08:05,240 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:05,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:08:05,248 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:08:05,581 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:08:05,581 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:08:05,581 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2018-04-12 14:08:05,582 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-04-12 14:08:05,582 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-04-12 14:08:05,582 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=455, Unknown=0, NotChecked=0, Total=506 [2018-04-12 14:08:05,582 INFO L87 Difference]: Start difference. First operand 234 states and 264 transitions. Second operand 23 states. [2018-04-12 14:08:06,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:08:06,530 INFO L93 Difference]: Finished difference Result 304 states and 340 transitions. [2018-04-12 14:08:06,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-12 14:08:06,531 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 50 [2018-04-12 14:08:06,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:08:06,532 INFO L225 Difference]: With dead ends: 304 [2018-04-12 14:08:06,532 INFO L226 Difference]: Without dead ends: 304 [2018-04-12 14:08:06,533 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 531 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=218, Invalid=2134, Unknown=0, NotChecked=0, Total=2352 [2018-04-12 14:08:06,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 304 states. [2018-04-12 14:08:06,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 304 to 263. [2018-04-12 14:08:06,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 263 states. [2018-04-12 14:08:06,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 263 states to 263 states and 300 transitions. [2018-04-12 14:08:06,538 INFO L78 Accepts]: Start accepts. Automaton has 263 states and 300 transitions. Word has length 50 [2018-04-12 14:08:06,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:08:06,538 INFO L459 AbstractCegarLoop]: Abstraction has 263 states and 300 transitions. [2018-04-12 14:08:06,538 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-04-12 14:08:06,538 INFO L276 IsEmpty]: Start isEmpty. Operand 263 states and 300 transitions. [2018-04-12 14:08:06,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-04-12 14:08:06,539 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:08:06,539 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:08:06,539 INFO L408 AbstractCegarLoop]: === Iteration 38 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:08:06,540 INFO L82 PathProgramCache]: Analyzing trace with hash 1302490113, now seen corresponding path program 1 times [2018-04-12 14:08:06,540 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:08:06,540 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:08:06,540 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:06,540 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:08:06,540 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:06,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:08:06,549 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:08:06,891 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:08:06,891 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:08:06,891 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2018-04-12 14:08:06,891 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-04-12 14:08:06,891 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-04-12 14:08:06,891 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=455, Unknown=0, NotChecked=0, Total=506 [2018-04-12 14:08:06,891 INFO L87 Difference]: Start difference. First operand 263 states and 300 transitions. Second operand 23 states. [2018-04-12 14:08:07,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:08:07,892 INFO L93 Difference]: Finished difference Result 303 states and 338 transitions. [2018-04-12 14:08:07,893 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-04-12 14:08:07,893 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 51 [2018-04-12 14:08:07,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:08:07,894 INFO L225 Difference]: With dead ends: 303 [2018-04-12 14:08:07,894 INFO L226 Difference]: Without dead ends: 303 [2018-04-12 14:08:07,894 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 500 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=213, Invalid=2043, Unknown=0, NotChecked=0, Total=2256 [2018-04-12 14:08:07,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 303 states. [2018-04-12 14:08:07,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 303 to 263. [2018-04-12 14:08:07,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 263 states. [2018-04-12 14:08:07,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 263 states to 263 states and 298 transitions. [2018-04-12 14:08:07,898 INFO L78 Accepts]: Start accepts. Automaton has 263 states and 298 transitions. Word has length 51 [2018-04-12 14:08:07,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:08:07,898 INFO L459 AbstractCegarLoop]: Abstraction has 263 states and 298 transitions. [2018-04-12 14:08:07,898 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-04-12 14:08:07,898 INFO L276 IsEmpty]: Start isEmpty. Operand 263 states and 298 transitions. [2018-04-12 14:08:07,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-04-12 14:08:07,899 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:08:07,899 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:08:07,899 INFO L408 AbstractCegarLoop]: === Iteration 39 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:08:07,899 INFO L82 PathProgramCache]: Analyzing trace with hash -1740139545, now seen corresponding path program 1 times [2018-04-12 14:08:07,899 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:08:07,899 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:08:07,900 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:07,900 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:08:07,900 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:07,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:08:07,906 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:08:08,330 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:08:08,330 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 14:08:08,331 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 14:08:08,335 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:08:08,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:08:08,370 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 14:08:08,404 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:08:08,406 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:08:08,406 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,407 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,413 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:08:08,421 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:08:08,422 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,423 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,425 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,426 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:26, output treesize:18 [2018-04-12 14:08:08,569 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base Int) (__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base| Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset| Int)) (let ((.cse1 (+ __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset 4))) (and (= (let ((.cse0 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) .cse1 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|)) __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base|)))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base))) |c_#memory_$Pointer$.base|) (<= 0 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset) (= (let ((.cse2 (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) .cse1 (select (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|)) __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset|)))) (store .cse2 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse2 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset))) |c_#memory_$Pointer$.offset|) (<= __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset 0)))) is different from true [2018-04-12 14:08:08,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 40 [2018-04-12 14:08:08,659 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 20 [2018-04-12 14:08:08,661 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:08:08,663 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-04-12 14:08:08,663 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,668 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,682 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:08:08,684 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 41 [2018-04-12 14:08:08,687 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2018-04-12 14:08:08,687 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,693 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,699 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,710 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 43 [2018-04-12 14:08:08,712 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:08:08,713 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 41 [2018-04-12 14:08:08,715 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:08:08,718 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 40 [2018-04-12 14:08:08,718 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,725 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 21 [2018-04-12 14:08:08,737 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:08:08,737 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:08:08,739 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 26 [2018-04-12 14:08:08,739 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,743 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,748 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,779 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 43 [2018-04-12 14:08:08,781 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:08:08,781 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 41 [2018-04-12 14:08:08,787 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:08:08,789 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 40 [2018-04-12 14:08:08,789 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,795 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,801 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 21 [2018-04-12 14:08:08,803 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:08:08,804 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:08:08,806 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 26 [2018-04-12 14:08:08,806 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,809 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,813 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,817 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 40 [2018-04-12 14:08:08,819 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 20 [2018-04-12 14:08:08,821 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:08:08,822 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-04-12 14:08:08,822 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,826 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,835 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 36 [2018-04-12 14:08:08,838 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-04-12 14:08:08,838 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,842 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,846 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:08,866 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: 5 dim-0 vars, and 4 xjuncts. [2018-04-12 14:08:08,867 INFO L202 ElimStorePlain]: Needed 21 recursive calls to eliminate 6 variables, input treesize:114, output treesize:201 [2018-04-12 14:08:09,217 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-12 14:08:09,218 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:09,228 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 14:08:09,228 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:98, output treesize:97 [2018-04-12 14:08:09,276 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:08:09,277 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:08:09,277 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-12 14:08:09,277 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:09,293 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:08:09,293 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:08:09,298 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 77 [2018-04-12 14:08:09,301 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 58 [2018-04-12 14:08:09,302 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:09,308 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:09,320 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:08:09,321 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 75 [2018-04-12 14:08:09,323 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:08:09,324 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 90 [2018-04-12 14:08:09,324 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:09,330 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:09,338 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 14:08:09,338 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 5 variables, input treesize:118, output treesize:82 [2018-04-12 14:08:09,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 36 [2018-04-12 14:08:09,380 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-04-12 14:08:09,380 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:09,385 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:08:09,386 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-04-12 14:08:09,386 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:09,388 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:09,395 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 34 [2018-04-12 14:08:09,397 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-12 14:08:09,397 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:09,401 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:08:09,401 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2018-04-12 14:08:09,401 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:09,403 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:09,407 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:09,407 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:93, output treesize:7 [2018-04-12 14:08:09,436 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:08:09,454 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 14:08:09,454 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 22] total 36 [2018-04-12 14:08:09,455 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-12 14:08:09,455 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-12 14:08:09,455 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=1049, Unknown=4, NotChecked=66, Total=1260 [2018-04-12 14:08:09,455 INFO L87 Difference]: Start difference. First operand 263 states and 298 transitions. Second operand 36 states. [2018-04-12 14:08:13,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:08:13,868 INFO L93 Difference]: Finished difference Result 283 states and 321 transitions. [2018-04-12 14:08:13,869 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-04-12 14:08:13,869 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 53 [2018-04-12 14:08:13,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:08:13,870 INFO L225 Difference]: With dead ends: 283 [2018-04-12 14:08:13,870 INFO L226 Difference]: Without dead ends: 283 [2018-04-12 14:08:13,870 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 40 SyntacticMatches, 3 SemanticMatches, 49 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 584 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=279, Invalid=2169, Unknown=6, NotChecked=96, Total=2550 [2018-04-12 14:08:13,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 283 states. [2018-04-12 14:08:13,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 283 to 273. [2018-04-12 14:08:13,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 273 states. [2018-04-12 14:08:13,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 273 states to 273 states and 308 transitions. [2018-04-12 14:08:13,874 INFO L78 Accepts]: Start accepts. Automaton has 273 states and 308 transitions. Word has length 53 [2018-04-12 14:08:13,874 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:08:13,874 INFO L459 AbstractCegarLoop]: Abstraction has 273 states and 308 transitions. [2018-04-12 14:08:13,875 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-12 14:08:13,875 INFO L276 IsEmpty]: Start isEmpty. Operand 273 states and 308 transitions. [2018-04-12 14:08:13,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-04-12 14:08:13,875 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:08:13,875 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:08:13,876 INFO L408 AbstractCegarLoop]: === Iteration 40 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:08:13,876 INFO L82 PathProgramCache]: Analyzing trace with hash -1532747612, now seen corresponding path program 1 times [2018-04-12 14:08:13,876 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:08:13,876 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:08:13,877 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:13,877 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:08:13,877 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:08:13,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:08:13,886 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:08:14,080 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:08:14,081 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 14:08:14,081 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 14:08:14,086 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:08:14,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:08:14,109 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 14:08:14,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:08:14,172 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:08:14,173 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:14,174 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:14,180 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:14,180 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:23, output treesize:20 [2018-04-12 14:08:14,216 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-12 14:08:14,216 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:14,218 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:08:14,219 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:21, output treesize:12 [2018-04-12 14:08:20,235 WARN L148 SmtUtils]: Spent 2003ms on a formula simplification that was a NOOP. DAG size: 12 [2018-04-12 14:08:20,252 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-12 14:08:20,253 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 18 [2018-04-12 14:08:20,254 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:08:20,256 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:20,259 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:08:20,259 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:23 [2018-04-12 14:08:20,328 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_~#list~0.base| Int) (|main_#t~mem20.base| Int)) (let ((.cse0 (store |c_old(#valid)| |main_~#list~0.base| 1))) (and (= 0 (select |c_old(#valid)| |main_~#list~0.base|)) (= (store (store .cse0 |main_#t~mem20.base| 0) |main_~#list~0.base| 0) |c_#valid|) (= 0 (select .cse0 |main_#t~mem20.base|))))) is different from true [2018-04-12 14:08:20,342 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:08:20,362 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 14:08:20,362 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 19 [2018-04-12 14:08:20,363 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-12 14:08:20,363 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-12 14:08:20,363 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=291, Unknown=6, NotChecked=34, Total=380 [2018-04-12 14:08:20,363 INFO L87 Difference]: Start difference. First operand 273 states and 308 transitions. Second operand 20 states. [2018-04-12 14:08:40,563 WARN L148 SmtUtils]: Spent 2005ms on a formula simplification that was a NOOP. DAG size: 18 [2018-04-12 14:09:23,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:09:23,608 INFO L93 Difference]: Finished difference Result 285 states and 321 transitions. [2018-04-12 14:09:23,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-04-12 14:09:23,609 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 55 [2018-04-12 14:09:23,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:09:23,610 INFO L225 Difference]: With dead ends: 285 [2018-04-12 14:09:23,610 INFO L226 Difference]: Without dead ends: 258 [2018-04-12 14:09:23,610 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 48 SyntacticMatches, 6 SemanticMatches, 27 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 12.5s TimeCoverageRelationStatistics Valid=108, Invalid=643, Unknown=9, NotChecked=52, Total=812 [2018-04-12 14:09:23,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 258 states. [2018-04-12 14:09:23,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 258 to 250. [2018-04-12 14:09:23,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 250 states. [2018-04-12 14:09:23,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 250 states to 250 states and 284 transitions. [2018-04-12 14:09:23,613 INFO L78 Accepts]: Start accepts. Automaton has 250 states and 284 transitions. Word has length 55 [2018-04-12 14:09:23,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:09:23,613 INFO L459 AbstractCegarLoop]: Abstraction has 250 states and 284 transitions. [2018-04-12 14:09:23,613 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-12 14:09:23,613 INFO L276 IsEmpty]: Start isEmpty. Operand 250 states and 284 transitions. [2018-04-12 14:09:23,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-04-12 14:09:23,613 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:09:23,614 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:09:23,614 INFO L408 AbstractCegarLoop]: === Iteration 41 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:09:23,614 INFO L82 PathProgramCache]: Analyzing trace with hash 787271707, now seen corresponding path program 1 times [2018-04-12 14:09:23,614 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:09:23,614 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:09:23,614 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:23,614 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:09:23,614 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:23,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:09:23,625 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:09:23,804 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 14:09:23,804 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 14:09:23,804 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 14:09:23,824 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:09:23,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:09:23,850 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 14:09:23,932 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:09:23,933 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:09:23,933 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:23,935 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:23,939 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:23,940 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:21 [2018-04-12 14:09:23,964 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:09:23,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:09:23,966 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:23,968 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:23,985 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-04-12 14:09:23,994 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 35 [2018-04-12 14:09:23,996 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-12 14:09:24,015 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 17 [2018-04-12 14:09:24,015 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:24,026 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-12 14:09:24,037 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-12 14:09:24,037 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:37, output treesize:53 [2018-04-12 14:09:24,068 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:09:24,069 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:09:24,069 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 29 [2018-04-12 14:09:24,070 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:24,082 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:24,082 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:69, output treesize:29 [2018-04-12 14:09:24,108 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-04-12 14:09:24,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-04-12 14:09:24,117 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:24,118 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:24,121 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:09:24,122 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:40, output treesize:29 [2018-04-12 14:09:24,154 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 24 [2018-04-12 14:09:24,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-04-12 14:09:24,156 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:24,159 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-04-12 14:09:24,160 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:24,162 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:24,163 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:24,163 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:33, output treesize:5 [2018-04-12 14:09:24,178 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:09:24,195 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 14:09:24,196 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 27 [2018-04-12 14:09:24,196 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-04-12 14:09:24,196 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-04-12 14:09:24,196 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=680, Unknown=0, NotChecked=0, Total=756 [2018-04-12 14:09:24,196 INFO L87 Difference]: Start difference. First operand 250 states and 284 transitions. Second operand 28 states. [2018-04-12 14:09:25,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:09:25,057 INFO L93 Difference]: Finished difference Result 290 states and 327 transitions. [2018-04-12 14:09:25,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-04-12 14:09:25,057 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 67 [2018-04-12 14:09:25,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:09:25,058 INFO L225 Difference]: With dead ends: 290 [2018-04-12 14:09:25,058 INFO L226 Difference]: Without dead ends: 290 [2018-04-12 14:09:25,058 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 53 SyntacticMatches, 9 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 490 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=235, Invalid=2021, Unknown=0, NotChecked=0, Total=2256 [2018-04-12 14:09:25,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 290 states. [2018-04-12 14:09:25,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 290 to 258. [2018-04-12 14:09:25,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 258 states. [2018-04-12 14:09:25,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 258 states to 258 states and 293 transitions. [2018-04-12 14:09:25,062 INFO L78 Accepts]: Start accepts. Automaton has 258 states and 293 transitions. Word has length 67 [2018-04-12 14:09:25,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:09:25,062 INFO L459 AbstractCegarLoop]: Abstraction has 258 states and 293 transitions. [2018-04-12 14:09:25,062 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-04-12 14:09:25,062 INFO L276 IsEmpty]: Start isEmpty. Operand 258 states and 293 transitions. [2018-04-12 14:09:25,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-04-12 14:09:25,063 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:09:25,063 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:09:25,063 INFO L408 AbstractCegarLoop]: === Iteration 42 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:09:25,063 INFO L82 PathProgramCache]: Analyzing trace with hash 787271708, now seen corresponding path program 1 times [2018-04-12 14:09:25,063 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:09:25,064 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:09:25,064 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:25,064 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:09:25,064 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:25,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:09:25,076 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:09:25,423 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 14:09:25,423 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 14:09:25,423 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 14:09:25,428 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:09:25,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:09:25,453 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 14:09:25,623 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:09:25,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:09:25,625 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:25,627 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:25,635 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:09:25,637 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:09:25,637 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:25,638 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:25,644 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:25,644 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:39, output treesize:28 [2018-04-12 14:09:25,697 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-04-12 14:09:25,699 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-04-12 14:09:25,699 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:25,718 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 27 [2018-04-12 14:09:25,718 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-12 14:09:25,731 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-12 14:09:25,753 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-04-12 14:09:25,755 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-12 14:09:25,755 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:25,772 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-04-12 14:09:25,772 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-12 14:09:25,781 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:09:25,798 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 4 xjuncts. [2018-04-12 14:09:25,798 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:44, output treesize:133 [2018-04-12 14:09:25,856 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:09:25,856 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:09:25,857 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2018-04-12 14:09:25,857 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:25,876 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:25,876 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:84, output treesize:44 [2018-04-12 14:09:25,941 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 58 [2018-04-12 14:09:25,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-12 14:09:25,944 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:09:25,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 5 [2018-04-12 14:09:25,950 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:25,954 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:09:25,959 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-12 14:09:25,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-12 14:09:25,961 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:09:25,964 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 14:09:25,964 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:25,965 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:25,967 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:25,968 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:71, output treesize:9 [2018-04-12 14:09:26,027 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:09:26,045 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 14:09:26,045 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 21] total 35 [2018-04-12 14:09:26,045 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-12 14:09:26,045 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-12 14:09:26,045 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=1166, Unknown=0, NotChecked=0, Total=1260 [2018-04-12 14:09:26,046 INFO L87 Difference]: Start difference. First operand 258 states and 293 transitions. Second operand 36 states. [2018-04-12 14:09:27,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:09:27,788 INFO L93 Difference]: Finished difference Result 329 states and 366 transitions. [2018-04-12 14:09:27,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-04-12 14:09:27,788 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 67 [2018-04-12 14:09:27,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:09:27,789 INFO L225 Difference]: With dead ends: 329 [2018-04-12 14:09:27,789 INFO L226 Difference]: Without dead ends: 329 [2018-04-12 14:09:27,790 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 51 SyntacticMatches, 7 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1134 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=405, Invalid=4707, Unknown=0, NotChecked=0, Total=5112 [2018-04-12 14:09:27,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 329 states. [2018-04-12 14:09:27,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 329 to 271. [2018-04-12 14:09:27,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 271 states. [2018-04-12 14:09:27,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 271 states to 271 states and 306 transitions. [2018-04-12 14:09:27,794 INFO L78 Accepts]: Start accepts. Automaton has 271 states and 306 transitions. Word has length 67 [2018-04-12 14:09:27,794 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:09:27,794 INFO L459 AbstractCegarLoop]: Abstraction has 271 states and 306 transitions. [2018-04-12 14:09:27,794 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-12 14:09:27,794 INFO L276 IsEmpty]: Start isEmpty. Operand 271 states and 306 transitions. [2018-04-12 14:09:27,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-04-12 14:09:27,794 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:09:27,794 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:09:27,794 INFO L408 AbstractCegarLoop]: === Iteration 43 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:09:27,795 INFO L82 PathProgramCache]: Analyzing trace with hash 1887046790, now seen corresponding path program 1 times [2018-04-12 14:09:27,795 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:09:27,795 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:09:27,795 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:27,795 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:09:27,795 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:27,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:09:27,801 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:09:28,074 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 14:09:28,075 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 14:09:28,075 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 14:09:28,082 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:09:28,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:09:28,111 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 14:09:28,216 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:09:28,235 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:09:28,235 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:28,237 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:28,244 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:09:28,245 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:09:28,245 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:28,247 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:28,251 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:28,252 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:34, output treesize:26 [2018-04-12 14:09:28,289 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-04-12 14:09:28,296 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-04-12 14:09:28,297 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 14:09:28,315 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-04-12 14:09:28,315 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:28,324 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:09:28,347 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-04-12 14:09:28,354 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-04-12 14:09:28,354 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-04-12 14:09:28,368 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-04-12 14:09:28,369 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:28,378 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:09:28,394 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-04-12 14:09:28,394 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:42, output treesize:123 [2018-04-12 14:09:28,446 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-04-12 14:09:28,446 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:28,453 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:09:28,453 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:09:28,454 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-12 14:09:28,454 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:28,458 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:28,458 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:77, output treesize:42 [2018-04-12 14:09:28,525 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-04-12 14:09:28,533 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-12 14:09:28,534 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:09:28,541 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2018-04-12 14:09:28,541 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:28,548 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:09:28,554 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-12 14:09:28,560 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-12 14:09:28,560 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:28,564 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:28,566 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:28,566 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:69, output treesize:7 [2018-04-12 14:09:28,579 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:09:28,596 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 14:09:28,596 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 27 [2018-04-12 14:09:28,596 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-04-12 14:09:28,596 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-04-12 14:09:28,596 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=626, Unknown=3, NotChecked=0, Total=702 [2018-04-12 14:09:28,597 INFO L87 Difference]: Start difference. First operand 271 states and 306 transitions. Second operand 27 states. [2018-04-12 14:09:29,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:09:29,392 INFO L93 Difference]: Finished difference Result 295 states and 330 transitions. [2018-04-12 14:09:29,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-04-12 14:09:29,392 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 60 [2018-04-12 14:09:29,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:09:29,393 INFO L225 Difference]: With dead ends: 295 [2018-04-12 14:09:29,393 INFO L226 Difference]: Without dead ends: 295 [2018-04-12 14:09:29,394 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 48 SyntacticMatches, 7 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 498 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=251, Invalid=2002, Unknown=3, NotChecked=0, Total=2256 [2018-04-12 14:09:29,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 295 states. [2018-04-12 14:09:29,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 295 to 275. [2018-04-12 14:09:29,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 275 states. [2018-04-12 14:09:29,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 275 states to 275 states and 308 transitions. [2018-04-12 14:09:29,399 INFO L78 Accepts]: Start accepts. Automaton has 275 states and 308 transitions. Word has length 60 [2018-04-12 14:09:29,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:09:29,399 INFO L459 AbstractCegarLoop]: Abstraction has 275 states and 308 transitions. [2018-04-12 14:09:29,399 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-04-12 14:09:29,399 INFO L276 IsEmpty]: Start isEmpty. Operand 275 states and 308 transitions. [2018-04-12 14:09:29,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-04-12 14:09:29,400 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:09:29,400 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:09:29,400 INFO L408 AbstractCegarLoop]: === Iteration 44 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:09:29,400 INFO L82 PathProgramCache]: Analyzing trace with hash -660061586, now seen corresponding path program 1 times [2018-04-12 14:09:29,400 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:09:29,400 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:09:29,401 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:29,401 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:09:29,401 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:29,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:09:29,407 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:09:29,719 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:09:29,719 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:09:29,719 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-04-12 14:09:29,719 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-12 14:09:29,720 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-12 14:09:29,720 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=330, Unknown=0, NotChecked=0, Total=380 [2018-04-12 14:09:29,720 INFO L87 Difference]: Start difference. First operand 275 states and 308 transitions. Second operand 20 states. [2018-04-12 14:09:30,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:09:30,264 INFO L93 Difference]: Finished difference Result 311 states and 347 transitions. [2018-04-12 14:09:30,265 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-12 14:09:30,265 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 55 [2018-04-12 14:09:30,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:09:30,266 INFO L225 Difference]: With dead ends: 311 [2018-04-12 14:09:30,266 INFO L226 Difference]: Without dead ends: 311 [2018-04-12 14:09:30,266 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 230 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=140, Invalid=982, Unknown=0, NotChecked=0, Total=1122 [2018-04-12 14:09:30,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 311 states. [2018-04-12 14:09:30,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 311 to 288. [2018-04-12 14:09:30,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 288 states. [2018-04-12 14:09:30,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 288 states to 288 states and 322 transitions. [2018-04-12 14:09:30,270 INFO L78 Accepts]: Start accepts. Automaton has 288 states and 322 transitions. Word has length 55 [2018-04-12 14:09:30,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:09:30,270 INFO L459 AbstractCegarLoop]: Abstraction has 288 states and 322 transitions. [2018-04-12 14:09:30,270 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-12 14:09:30,271 INFO L276 IsEmpty]: Start isEmpty. Operand 288 states and 322 transitions. [2018-04-12 14:09:30,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-04-12 14:09:30,271 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:09:30,271 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:09:30,271 INFO L408 AbstractCegarLoop]: === Iteration 45 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:09:30,271 INFO L82 PathProgramCache]: Analyzing trace with hash -1628221628, now seen corresponding path program 1 times [2018-04-12 14:09:30,272 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:09:30,272 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:09:30,272 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:30,272 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:09:30,272 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:30,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:09:30,286 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:09:30,874 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:09:30,874 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:09:30,874 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2018-04-12 14:09:30,874 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-04-12 14:09:30,874 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-04-12 14:09:30,874 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=638, Unknown=0, NotChecked=0, Total=702 [2018-04-12 14:09:30,874 INFO L87 Difference]: Start difference. First operand 288 states and 322 transitions. Second operand 27 states. [2018-04-12 14:09:32,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:09:32,028 INFO L93 Difference]: Finished difference Result 326 states and 362 transitions. [2018-04-12 14:09:32,028 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-04-12 14:09:32,028 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 55 [2018-04-12 14:09:32,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:09:32,029 INFO L225 Difference]: With dead ends: 326 [2018-04-12 14:09:32,029 INFO L226 Difference]: Without dead ends: 326 [2018-04-12 14:09:32,029 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 811 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=339, Invalid=3201, Unknown=0, NotChecked=0, Total=3540 [2018-04-12 14:09:32,029 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326 states. [2018-04-12 14:09:32,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326 to 288. [2018-04-12 14:09:32,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 288 states. [2018-04-12 14:09:32,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 288 states to 288 states and 320 transitions. [2018-04-12 14:09:32,032 INFO L78 Accepts]: Start accepts. Automaton has 288 states and 320 transitions. Word has length 55 [2018-04-12 14:09:32,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:09:32,033 INFO L459 AbstractCegarLoop]: Abstraction has 288 states and 320 transitions. [2018-04-12 14:09:32,033 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-04-12 14:09:32,033 INFO L276 IsEmpty]: Start isEmpty. Operand 288 states and 320 transitions. [2018-04-12 14:09:32,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-04-12 14:09:32,033 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:09:32,033 INFO L355 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:09:32,033 INFO L408 AbstractCegarLoop]: === Iteration 46 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:09:32,033 INFO L82 PathProgramCache]: Analyzing trace with hash 1400615347, now seen corresponding path program 1 times [2018-04-12 14:09:32,033 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:09:32,033 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:09:32,034 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:32,034 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:09:32,034 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:32,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:09:32,041 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:09:32,067 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:09:32,068 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 14:09:32,068 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 14:09:32,076 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:09:32,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:09:32,106 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 14:09:32,119 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:09:32,143 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 14:09:32,143 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2018-04-12 14:09:32,143 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 14:09:32,143 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 14:09:32,143 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-04-12 14:09:32,143 INFO L87 Difference]: Start difference. First operand 288 states and 320 transitions. Second operand 7 states. [2018-04-12 14:09:32,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:09:32,156 INFO L93 Difference]: Finished difference Result 300 states and 332 transitions. [2018-04-12 14:09:32,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 14:09:32,156 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 54 [2018-04-12 14:09:32,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:09:32,157 INFO L225 Difference]: With dead ends: 300 [2018-04-12 14:09:32,157 INFO L226 Difference]: Without dead ends: 300 [2018-04-12 14:09:32,157 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 54 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-04-12 14:09:32,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 300 states. [2018-04-12 14:09:32,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 300 to 295. [2018-04-12 14:09:32,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 295 states. [2018-04-12 14:09:32,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 295 states to 295 states and 327 transitions. [2018-04-12 14:09:32,161 INFO L78 Accepts]: Start accepts. Automaton has 295 states and 327 transitions. Word has length 54 [2018-04-12 14:09:32,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:09:32,162 INFO L459 AbstractCegarLoop]: Abstraction has 295 states and 327 transitions. [2018-04-12 14:09:32,162 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 14:09:32,162 INFO L276 IsEmpty]: Start isEmpty. Operand 295 states and 327 transitions. [2018-04-12 14:09:32,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-04-12 14:09:32,162 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:09:32,162 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:09:32,163 INFO L408 AbstractCegarLoop]: === Iteration 47 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:09:32,163 INFO L82 PathProgramCache]: Analyzing trace with hash 1335978638, now seen corresponding path program 1 times [2018-04-12 14:09:32,163 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:09:32,163 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:09:32,163 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:32,164 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:09:32,164 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:32,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:09:32,172 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:09:32,519 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:09:32,519 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:09:32,520 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-04-12 14:09:32,520 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-12 14:09:32,520 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-12 14:09:32,520 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=295, Unknown=0, NotChecked=0, Total=342 [2018-04-12 14:09:32,520 INFO L87 Difference]: Start difference. First operand 295 states and 327 transitions. Second operand 19 states. [2018-04-12 14:09:33,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:09:33,028 INFO L93 Difference]: Finished difference Result 317 states and 350 transitions. [2018-04-12 14:09:33,029 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-04-12 14:09:33,029 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 57 [2018-04-12 14:09:33,029 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:09:33,030 INFO L225 Difference]: With dead ends: 317 [2018-04-12 14:09:33,030 INFO L226 Difference]: Without dead ends: 317 [2018-04-12 14:09:33,031 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=110, Invalid=760, Unknown=0, NotChecked=0, Total=870 [2018-04-12 14:09:33,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states. [2018-04-12 14:09:33,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 287. [2018-04-12 14:09:33,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 287 states. [2018-04-12 14:09:33,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 287 states to 287 states and 319 transitions. [2018-04-12 14:09:33,036 INFO L78 Accepts]: Start accepts. Automaton has 287 states and 319 transitions. Word has length 57 [2018-04-12 14:09:33,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:09:33,036 INFO L459 AbstractCegarLoop]: Abstraction has 287 states and 319 transitions. [2018-04-12 14:09:33,036 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-12 14:09:33,036 INFO L276 IsEmpty]: Start isEmpty. Operand 287 states and 319 transitions. [2018-04-12 14:09:33,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-04-12 14:09:33,037 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:09:33,037 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:09:33,037 INFO L408 AbstractCegarLoop]: === Iteration 48 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:09:33,037 INFO L82 PathProgramCache]: Analyzing trace with hash -1722226744, now seen corresponding path program 1 times [2018-04-12 14:09:33,037 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:09:33,037 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:09:33,038 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:33,038 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:09:33,038 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:33,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:09:33,047 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:09:33,336 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:09:33,336 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:09:33,336 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-04-12 14:09:33,336 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-04-12 14:09:33,336 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-04-12 14:09:33,336 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=363, Unknown=0, NotChecked=0, Total=420 [2018-04-12 14:09:33,337 INFO L87 Difference]: Start difference. First operand 287 states and 319 transitions. Second operand 21 states. [2018-04-12 14:09:33,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:09:33,884 INFO L93 Difference]: Finished difference Result 325 states and 356 transitions. [2018-04-12 14:09:33,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-04-12 14:09:33,884 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 60 [2018-04-12 14:09:33,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:09:33,885 INFO L225 Difference]: With dead ends: 325 [2018-04-12 14:09:33,885 INFO L226 Difference]: Without dead ends: 314 [2018-04-12 14:09:33,885 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 277 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=186, Invalid=1220, Unknown=0, NotChecked=0, Total=1406 [2018-04-12 14:09:33,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 314 states. [2018-04-12 14:09:33,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 314 to 294. [2018-04-12 14:09:33,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2018-04-12 14:09:33,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 324 transitions. [2018-04-12 14:09:33,890 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 324 transitions. Word has length 60 [2018-04-12 14:09:33,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:09:33,890 INFO L459 AbstractCegarLoop]: Abstraction has 294 states and 324 transitions. [2018-04-12 14:09:33,890 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-04-12 14:09:33,890 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 324 transitions. [2018-04-12 14:09:33,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-04-12 14:09:33,891 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:09:33,891 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:09:33,891 INFO L408 AbstractCegarLoop]: === Iteration 49 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:09:33,891 INFO L82 PathProgramCache]: Analyzing trace with hash 252927534, now seen corresponding path program 1 times [2018-04-12 14:09:33,891 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:09:33,891 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:09:33,892 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:33,892 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:09:33,892 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:33,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:09:33,904 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:09:34,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:09:34,539 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:09:34,539 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2018-04-12 14:09:34,539 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-04-12 14:09:34,540 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-04-12 14:09:34,540 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=634, Unknown=0, NotChecked=0, Total=702 [2018-04-12 14:09:34,540 INFO L87 Difference]: Start difference. First operand 294 states and 324 transitions. Second operand 27 states. [2018-04-12 14:09:35,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:09:35,498 INFO L93 Difference]: Finished difference Result 324 states and 357 transitions. [2018-04-12 14:09:35,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-04-12 14:09:35,499 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 60 [2018-04-12 14:09:35,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:09:35,499 INFO L225 Difference]: With dead ends: 324 [2018-04-12 14:09:35,499 INFO L226 Difference]: Without dead ends: 324 [2018-04-12 14:09:35,500 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 4 SyntacticMatches, 4 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 361 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=181, Invalid=1625, Unknown=0, NotChecked=0, Total=1806 [2018-04-12 14:09:35,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 324 states. [2018-04-12 14:09:35,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 324 to 298. [2018-04-12 14:09:35,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 298 states. [2018-04-12 14:09:35,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 298 states to 298 states and 328 transitions. [2018-04-12 14:09:35,503 INFO L78 Accepts]: Start accepts. Automaton has 298 states and 328 transitions. Word has length 60 [2018-04-12 14:09:35,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:09:35,503 INFO L459 AbstractCegarLoop]: Abstraction has 298 states and 328 transitions. [2018-04-12 14:09:35,503 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-04-12 14:09:35,504 INFO L276 IsEmpty]: Start isEmpty. Operand 298 states and 328 transitions. [2018-04-12 14:09:35,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-04-12 14:09:35,504 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:09:35,504 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:09:35,505 INFO L408 AbstractCegarLoop]: === Iteration 50 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:09:35,505 INFO L82 PathProgramCache]: Analyzing trace with hash -1749772722, now seen corresponding path program 1 times [2018-04-12 14:09:35,505 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:09:35,505 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:09:35,505 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:35,505 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:09:35,506 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:35,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:09:35,519 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:09:36,068 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:09:36,068 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:09:36,093 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-04-12 14:09:36,093 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-04-12 14:09:36,094 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-04-12 14:09:36,094 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=541, Unknown=0, NotChecked=0, Total=600 [2018-04-12 14:09:36,094 INFO L87 Difference]: Start difference. First operand 298 states and 328 transitions. Second operand 25 states. [2018-04-12 14:09:37,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:09:37,240 INFO L93 Difference]: Finished difference Result 326 states and 358 transitions. [2018-04-12 14:09:37,240 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-12 14:09:37,240 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 62 [2018-04-12 14:09:37,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:09:37,241 INFO L225 Difference]: With dead ends: 326 [2018-04-12 14:09:37,241 INFO L226 Difference]: Without dead ends: 326 [2018-04-12 14:09:37,241 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 519 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=212, Invalid=2044, Unknown=0, NotChecked=0, Total=2256 [2018-04-12 14:09:37,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326 states. [2018-04-12 14:09:37,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326 to 284. [2018-04-12 14:09:37,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 284 states. [2018-04-12 14:09:37,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 284 states to 284 states and 314 transitions. [2018-04-12 14:09:37,245 INFO L78 Accepts]: Start accepts. Automaton has 284 states and 314 transitions. Word has length 62 [2018-04-12 14:09:37,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:09:37,245 INFO L459 AbstractCegarLoop]: Abstraction has 284 states and 314 transitions. [2018-04-12 14:09:37,245 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-04-12 14:09:37,245 INFO L276 IsEmpty]: Start isEmpty. Operand 284 states and 314 transitions. [2018-04-12 14:09:37,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-04-12 14:09:37,246 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:09:37,246 INFO L355 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:09:37,246 INFO L408 AbstractCegarLoop]: === Iteration 51 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:09:37,246 INFO L82 PathProgramCache]: Analyzing trace with hash 32546574, now seen corresponding path program 1 times [2018-04-12 14:09:37,246 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:09:37,246 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:09:37,246 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:37,246 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:09:37,246 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:37,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:09:37,253 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:09:37,291 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 3 proven. 50 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-04-12 14:09:37,291 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 14:09:37,292 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 14:09:37,297 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:09:37,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:09:37,338 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 14:09:37,348 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 3 proven. 50 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-04-12 14:09:37,378 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 14:09:37,378 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-04-12 14:09:37,378 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 14:09:37,379 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 14:09:37,379 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-04-12 14:09:37,379 INFO L87 Difference]: Start difference. First operand 284 states and 314 transitions. Second operand 8 states. [2018-04-12 14:09:37,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:09:37,410 INFO L93 Difference]: Finished difference Result 296 states and 326 transitions. [2018-04-12 14:09:37,410 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 14:09:37,410 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 81 [2018-04-12 14:09:37,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:09:37,411 INFO L225 Difference]: With dead ends: 296 [2018-04-12 14:09:37,412 INFO L226 Difference]: Without dead ends: 296 [2018-04-12 14:09:37,412 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 81 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-04-12 14:09:37,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 296 states. [2018-04-12 14:09:37,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 296 to 291. [2018-04-12 14:09:37,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 291 states. [2018-04-12 14:09:37,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 321 transitions. [2018-04-12 14:09:37,420 INFO L78 Accepts]: Start accepts. Automaton has 291 states and 321 transitions. Word has length 81 [2018-04-12 14:09:37,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:09:37,420 INFO L459 AbstractCegarLoop]: Abstraction has 291 states and 321 transitions. [2018-04-12 14:09:37,420 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 14:09:37,420 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 321 transitions. [2018-04-12 14:09:37,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-04-12 14:09:37,421 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:09:37,421 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:09:37,421 INFO L408 AbstractCegarLoop]: === Iteration 52 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:09:37,422 INFO L82 PathProgramCache]: Analyzing trace with hash 1608088232, now seen corresponding path program 1 times [2018-04-12 14:09:37,422 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:09:37,422 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:09:37,422 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:37,422 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:09:37,422 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:09:37,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:09:37,432 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:09:37,532 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-12 14:09:37,532 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 14:09:37,532 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 14:09:37,538 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:09:37,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:09:37,566 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 14:09:37,594 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:09:37,595 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:09:37,595 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:37,596 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:37,599 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:37,599 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:9 [2018-04-12 14:09:37,606 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:09:37,607 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:09:37,607 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-12 14:09:37,608 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:37,610 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:37,610 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:18, output treesize:12 [2018-04-12 14:09:37,656 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-12 14:09:37,656 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:37,660 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:09:37,660 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:12 [2018-04-12 14:09:43,677 WARN L148 SmtUtils]: Spent 2003ms on a formula simplification that was a NOOP. DAG size: 12 [2018-04-12 14:09:43,691 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2018-04-12 14:09:43,692 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2018-04-12 14:09:43,692 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:43,693 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:43,696 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:09:43,696 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:21, output treesize:10 [2018-04-12 14:09:43,698 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:09:43,699 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-12 14:09:43,699 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:09:43,703 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:09:43,703 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-04-12 14:09:43,722 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:09:43,739 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 14:09:43,739 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 15] total 17 [2018-04-12 14:09:43,739 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-12 14:09:43,739 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-12 14:09:43,739 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=255, Unknown=2, NotChecked=0, Total=306 [2018-04-12 14:09:43,740 INFO L87 Difference]: Start difference. First operand 291 states and 321 transitions. Second operand 18 states. [2018-04-12 14:10:11,886 WARN L148 SmtUtils]: Spent 2004ms on a formula simplification that was a NOOP. DAG size: 16 [2018-04-12 14:10:15,903 WARN L148 SmtUtils]: Spent 2006ms on a formula simplification that was a NOOP. DAG size: 21 [2018-04-12 14:10:51,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:10:51,024 INFO L93 Difference]: Finished difference Result 333 states and 360 transitions. [2018-04-12 14:10:51,025 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-04-12 14:10:51,025 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 68 [2018-04-12 14:10:51,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:10:51,025 INFO L225 Difference]: With dead ends: 333 [2018-04-12 14:10:51,025 INFO L226 Difference]: Without dead ends: 322 [2018-04-12 14:10:51,026 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 59 SyntacticMatches, 4 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 203 ImplicationChecksByTransitivity, 20.3s TimeCoverageRelationStatistics Valid=150, Invalid=773, Unknown=7, NotChecked=0, Total=930 [2018-04-12 14:10:51,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 322 states. [2018-04-12 14:10:51,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 322 to 236. [2018-04-12 14:10:51,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236 states. [2018-04-12 14:10:51,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236 states to 236 states and 257 transitions. [2018-04-12 14:10:51,029 INFO L78 Accepts]: Start accepts. Automaton has 236 states and 257 transitions. Word has length 68 [2018-04-12 14:10:51,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:10:51,029 INFO L459 AbstractCegarLoop]: Abstraction has 236 states and 257 transitions. [2018-04-12 14:10:51,029 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-12 14:10:51,029 INFO L276 IsEmpty]: Start isEmpty. Operand 236 states and 257 transitions. [2018-04-12 14:10:51,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-04-12 14:10:51,030 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:10:51,030 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:10:51,030 INFO L408 AbstractCegarLoop]: === Iteration 53 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:10:51,030 INFO L82 PathProgramCache]: Analyzing trace with hash -2052912455, now seen corresponding path program 1 times [2018-04-12 14:10:51,031 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:10:51,031 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:10:51,031 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:10:51,031 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:10:51,031 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:10:51,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:10:51,039 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:10:51,426 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:10:51,426 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 14:10:51,426 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 14:10:51,432 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:10:51,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:10:51,454 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 14:10:51,470 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:10:51,471 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:10:51,471 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:51,472 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:10:51,477 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:10:51,478 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:10:51,478 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:51,479 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:10:51,482 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:10:51,482 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:26, output treesize:18 [2018-04-12 14:10:51,617 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base Int) (__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.offset Int)) (let ((.cse0 (+ __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.offset 4))) (and (= |c_#memory_$Pointer$.base| (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base) .cse0 0))) (= 0 (select |c_old(#valid)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base)) (= (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base) .cse0 0)) |c_#memory_$Pointer$.offset|)))) is different from true [2018-04-12 14:10:51,624 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:51,625 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:51,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 14:10:51,625 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:51,639 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 14:10:51,640 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:102, output treesize:96 [2018-04-12 14:10:51,777 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base Int) (__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.offset Int) (__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base Int) (__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base| Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset| Int)) (let ((.cse3 (+ __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.offset 4)) (.cse4 (+ __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset 4))) (and (= (let ((.cse0 (let ((.cse1 (let ((.cse2 (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) .cse4 (select (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|))))) (store .cse2 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base (store (select .cse2 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base) .cse3 0))))) (store .cse1 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (select .cse1 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset|))))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset))) |c_#memory_$Pointer$.offset|) (= (let ((.cse5 (let ((.cse6 (let ((.cse7 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) .cse4 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|))))) (store .cse7 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base (store (select .cse7 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base) .cse3 0))))) (store .cse6 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (select .cse6 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base|))))) (store .cse5 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse5 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base))) |c_#memory_$Pointer$.base|) (<= 0 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset) (not (= __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base)) (<= __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset 0)))) is different from true [2018-04-12 14:10:51,833 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 187 treesize of output 102 [2018-04-12 14:10:51,838 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:51,838 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 97 [2018-04-12 14:10:51,839 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:52,094 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 92 [2018-04-12 14:10:52,095 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:52,340 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 65 [2018-04-12 14:10:52,343 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-12 14:10:52,343 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:52,376 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 50 [2018-04-12 14:10:52,380 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:52,380 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:10:52,384 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 35 [2018-04-12 14:10:52,384 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:52,408 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 34 [2018-04-12 14:10:52,411 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:52,411 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:10:52,414 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 26 [2018-04-12 14:10:52,415 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:52,423 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:10:52,429 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:10:52,439 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:10:52,630 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 88 treesize of output 75 [2018-04-12 14:10:52,635 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 65 [2018-04-12 14:10:52,635 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:52,893 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 62 [2018-04-12 14:10:52,893 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:53,120 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 60 treesize of output 65 [2018-04-12 14:10:53,125 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:53,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 65 [2018-04-12 14:10:53,130 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:53,269 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:53,269 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:10:53,281 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 74 [2018-04-12 14:10:53,281 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:53,405 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:10:53,428 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 54 treesize of output 56 [2018-04-12 14:10:53,432 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:53,445 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 3 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 67 [2018-04-12 14:10:53,445 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:53,466 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:10:53,573 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:10:53,593 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 51 treesize of output 55 [2018-04-12 14:10:53,599 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 54 [2018-04-12 14:10:53,600 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:53,615 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:10:53,699 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 53 treesize of output 78 [2018-04-12 14:10:53,705 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 61 [2018-04-12 14:10:53,705 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:53,804 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:53,804 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:10:53,807 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 54 [2018-04-12 14:10:53,807 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:53,957 INFO L267 ElimStorePlain]: Start of recursive call 21: 4 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:10:53,998 INFO L267 ElimStorePlain]: Start of recursive call 14: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:10:54,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 57 treesize of output 64 [2018-04-12 14:10:54,255 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:54,259 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 62 [2018-04-12 14:10:54,259 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:54,357 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:54,358 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:10:54,361 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 58 [2018-04-12 14:10:54,362 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:54,491 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:10:54,508 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 51 treesize of output 55 [2018-04-12 14:10:54,512 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:54,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 42 [2018-04-12 14:10:54,518 INFO L267 ElimStorePlain]: Start of recursive call 28: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:54,533 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:10:54,625 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:10:54,646 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 48 treesize of output 62 [2018-04-12 14:10:54,649 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 56 [2018-04-12 14:10:54,650 INFO L267 ElimStorePlain]: Start of recursive call 30: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:54,673 INFO L267 ElimStorePlain]: Start of recursive call 29: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:10:54,758 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 37 treesize of output 66 [2018-04-12 14:10:54,766 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:10:54,766 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 47 [2018-04-12 14:10:54,767 INFO L267 ElimStorePlain]: Start of recursive call 32: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:54,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-04-12 14:10:54,873 INFO L267 ElimStorePlain]: Start of recursive call 33: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:54,925 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:54,925 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:10:54,928 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 38 [2018-04-12 14:10:54,929 INFO L267 ElimStorePlain]: Start of recursive call 34: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:54,981 INFO L267 ElimStorePlain]: Start of recursive call 31: 4 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:10:55,028 INFO L267 ElimStorePlain]: Start of recursive call 24: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-04-12 14:10:55,082 INFO L267 ElimStorePlain]: Start of recursive call 11: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-04-12 14:10:55,166 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-04-12 14:10:55,244 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 187 treesize of output 102 [2018-04-12 14:10:55,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 92 [2018-04-12 14:10:55,248 INFO L267 ElimStorePlain]: Start of recursive call 36: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:55,346 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:55,346 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 97 [2018-04-12 14:10:55,347 INFO L267 ElimStorePlain]: Start of recursive call 37: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:55,455 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 92 treesize of output 79 [2018-04-12 14:10:55,458 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 69 [2018-04-12 14:10:55,458 INFO L267 ElimStorePlain]: Start of recursive call 39: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:55,531 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 62 [2018-04-12 14:10:55,531 INFO L267 ElimStorePlain]: Start of recursive call 40: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:55,605 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 54 [2018-04-12 14:10:55,607 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:55,608 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 36 [2018-04-12 14:10:55,608 INFO L267 ElimStorePlain]: Start of recursive call 42: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:55,622 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 47 [2018-04-12 14:10:55,631 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 59 [2018-04-12 14:10:55,631 INFO L267 ElimStorePlain]: Start of recursive call 44: End of recursive call: and 2 xjuncts. [2018-04-12 14:10:55,645 INFO L267 ElimStorePlain]: Start of recursive call 43: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:10:55,659 INFO L267 ElimStorePlain]: Start of recursive call 41: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:10:55,721 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 61 treesize of output 55 [2018-04-12 14:10:55,723 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:55,724 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-04-12 14:10:55,724 INFO L267 ElimStorePlain]: Start of recursive call 46: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:55,747 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 64 [2018-04-12 14:10:55,760 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 51 [2018-04-12 14:10:55,760 INFO L267 ElimStorePlain]: Start of recursive call 48: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:55,799 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 42 treesize of output 60 [2018-04-12 14:10:55,799 INFO L267 ElimStorePlain]: Start of recursive call 49: End of recursive call: and 2 xjuncts. [2018-04-12 14:10:55,819 INFO L267 ElimStorePlain]: Start of recursive call 47: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:10:55,835 INFO L267 ElimStorePlain]: Start of recursive call 45: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:10:55,872 INFO L267 ElimStorePlain]: Start of recursive call 38: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:10:55,962 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 62 [2018-04-12 14:10:55,964 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-12 14:10:55,965 INFO L267 ElimStorePlain]: Start of recursive call 51: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:55,978 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 47 [2018-04-12 14:10:55,980 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:55,981 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:10:55,982 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 35 [2018-04-12 14:10:55,983 INFO L267 ElimStorePlain]: Start of recursive call 53: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:56,011 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 37 treesize of output 66 [2018-04-12 14:10:56,015 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 45 [2018-04-12 14:10:56,015 INFO L267 ElimStorePlain]: Start of recursive call 55: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:56,086 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:56,112 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:10:56,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 38 [2018-04-12 14:10:56,114 INFO L267 ElimStorePlain]: Start of recursive call 56: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:56,157 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 35 treesize of output 45 [2018-04-12 14:10:56,157 INFO L267 ElimStorePlain]: Start of recursive call 57: End of recursive call: and 2 xjuncts. [2018-04-12 14:10:56,200 INFO L267 ElimStorePlain]: Start of recursive call 54: 4 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-04-12 14:10:56,219 INFO L267 ElimStorePlain]: Start of recursive call 52: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-04-12 14:10:56,237 INFO L267 ElimStorePlain]: Start of recursive call 50: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-04-12 14:10:56,306 INFO L267 ElimStorePlain]: Start of recursive call 35: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-04-12 14:10:56,351 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 2 dim-2 vars, End of recursive call: 19 dim-0 vars, and 7 xjuncts. [2018-04-12 14:10:56,351 INFO L202 ElimStorePlain]: Needed 57 recursive calls to eliminate 8 variables, input treesize:386, output treesize:489 [2018-04-12 14:10:57,946 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 90 [2018-04-12 14:10:57,946 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,002 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 112 treesize of output 111 [2018-04-12 14:10:58,002 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,051 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 104 [2018-04-12 14:10:58,051 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,095 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 3 dim-1 vars, End of recursive call: 5 dim-0 vars, and 3 xjuncts. [2018-04-12 14:10:58,095 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 8 variables, input treesize:309, output treesize:306 [2018-04-12 14:10:58,228 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:58,229 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 125 treesize of output 111 [2018-04-12 14:10:58,229 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,231 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-04-12 14:10:58,231 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,234 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:58,235 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 111 treesize of output 97 [2018-04-12 14:10:58,235 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,294 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 97 treesize of output 86 [2018-04-12 14:10:58,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:58,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:10:58,298 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:10:58,301 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 63 [2018-04-12 14:10:58,301 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,323 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,359 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 65 [2018-04-12 14:10:58,362 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 40 [2018-04-12 14:10:58,362 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:10:58,378 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:10:58,406 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:10:58,407 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 111 treesize of output 119 [2018-04-12 14:10:58,409 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:10:58,409 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 128 [2018-04-12 14:10:58,409 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,419 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,461 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 99 [2018-04-12 14:10:58,463 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 95 treesize of output 76 [2018-04-12 14:10:58,464 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:10:58,471 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:10:58,528 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-1 vars, 6 dim-2 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-04-12 14:10:58,528 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 12 variables, input treesize:369, output treesize:132 [2018-04-12 14:10:58,622 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 82 [2018-04-12 14:10:58,625 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:10:58,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-12 14:10:58,625 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,636 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 14:10:58,636 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,641 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2018-04-12 14:10:58,657 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 5 [2018-04-12 14:10:58,657 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,662 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-12 14:10:58,662 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,665 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 22 [2018-04-12 14:10:58,677 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-04-12 14:10:58,677 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 14:10:58,680 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,681 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,690 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 44 [2018-04-12 14:10:58,691 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:10:58,692 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 9 [2018-04-12 14:10:58,692 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,696 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-12 14:10:58,696 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,699 INFO L267 ElimStorePlain]: Start of recursive call 11: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:10:58,704 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 4 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:10:58,704 INFO L202 ElimStorePlain]: Needed 13 recursive calls to eliminate 9 variables, input treesize:146, output treesize:11 [2018-04-12 14:10:58,770 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:10:58,787 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 14:10:58,787 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 26] total 43 [2018-04-12 14:10:58,787 INFO L442 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-04-12 14:10:58,787 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-04-12 14:10:58,787 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=142, Invalid=1497, Unknown=9, NotChecked=158, Total=1806 [2018-04-12 14:10:58,788 INFO L87 Difference]: Start difference. First operand 236 states and 257 transitions. Second operand 43 states. [2018-04-12 14:11:12,280 WARN L151 SmtUtils]: Spent 174ms on a formula simplification. DAG size of input: 89 DAG size of output 75 [2018-04-12 14:11:15,981 WARN L151 SmtUtils]: Spent 103ms on a formula simplification. DAG size of input: 101 DAG size of output 62 [2018-04-12 14:11:23,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:11:23,645 INFO L93 Difference]: Finished difference Result 321 states and 352 transitions. [2018-04-12 14:11:23,646 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-04-12 14:11:23,646 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 65 [2018-04-12 14:11:23,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:11:23,647 INFO L225 Difference]: With dead ends: 321 [2018-04-12 14:11:23,647 INFO L226 Difference]: Without dead ends: 321 [2018-04-12 14:11:23,647 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 129 GetRequests, 48 SyntacticMatches, 5 SemanticMatches, 76 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 1643 ImplicationChecksByTransitivity, 10.6s TimeCoverageRelationStatistics Valid=473, Invalid=5206, Unknown=29, NotChecked=298, Total=6006 [2018-04-12 14:11:23,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 321 states. [2018-04-12 14:11:23,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 321 to 285. [2018-04-12 14:11:23,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 285 states. [2018-04-12 14:11:23,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 285 states to 285 states and 314 transitions. [2018-04-12 14:11:23,649 INFO L78 Accepts]: Start accepts. Automaton has 285 states and 314 transitions. Word has length 65 [2018-04-12 14:11:23,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:11:23,650 INFO L459 AbstractCegarLoop]: Abstraction has 285 states and 314 transitions. [2018-04-12 14:11:23,650 INFO L460 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-04-12 14:11:23,650 INFO L276 IsEmpty]: Start isEmpty. Operand 285 states and 314 transitions. [2018-04-12 14:11:23,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-04-12 14:11:23,650 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:11:23,650 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:11:23,650 INFO L408 AbstractCegarLoop]: === Iteration 54 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:11:23,650 INFO L82 PathProgramCache]: Analyzing trace with hash -1459803402, now seen corresponding path program 1 times [2018-04-12 14:11:23,651 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:11:23,651 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:11:23,651 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:11:23,651 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:11:23,651 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:11:23,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:11:23,657 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:11:24,276 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:11:24,276 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 14:11:24,276 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 14:11:24,281 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:11:24,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:11:24,303 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 14:11:24,493 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:11:24,494 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:11:24,494 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:24,495 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:24,501 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:24,502 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:40, output treesize:37 [2018-04-12 14:11:24,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 37 treesize of output 47 [2018-04-12 14:11:24,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 37 [2018-04-12 14:11:24,546 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:24,561 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:24,566 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 33 treesize of output 43 [2018-04-12 14:11:24,566 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-12 14:11:24,580 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-12 14:11:24,592 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-12 14:11:24,592 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:42, output treesize:85 [2018-04-12 14:11:24,771 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:24,772 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:24,772 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 53 [2018-04-12 14:11:24,781 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:24,782 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:24,782 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:24,783 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 37 [2018-04-12 14:11:24,783 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:24,786 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:24,789 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:11:24,789 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:32 [2018-04-12 14:11:24,975 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:24,976 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:24,976 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 66 [2018-04-12 14:11:24,983 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 63 [2018-04-12 14:11:24,984 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-12 14:11:24,999 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 37 treesize of output 39 [2018-04-12 14:11:25,000 INFO L267 ElimStorePlain]: Start of recursive call 4: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-04-12 14:11:25,015 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-04-12 14:11:25,033 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 37 [2018-04-12 14:11:25,035 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-12 14:11:25,035 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:25,038 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:25,039 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 46 [2018-04-12 14:11:25,041 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2018-04-12 14:11:25,041 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:25,045 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:25,059 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-04-12 14:11:25,059 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 2 variables, input treesize:94, output treesize:82 [2018-04-12 14:11:25,280 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_~#list~0.base| Int) (|main_#t~mem20.base| Int) (v_prenex_65 Int)) (let ((.cse1 (store |c_old(#valid)| |main_~#list~0.base| 1))) (let ((.cse0 (store .cse1 |main_#t~mem20.base| 1))) (and (= 0 (select |c_old(#valid)| |main_~#list~0.base|)) (= (store (store (store .cse0 v_prenex_65 0) |main_#t~mem20.base| 0) |main_~#list~0.base| 0) |c_#valid|) (= 0 (select .cse1 |main_#t~mem20.base|)) (= (select .cse0 v_prenex_65) 0))))) is different from true [2018-04-12 14:11:25,303 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:11:25,320 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 14:11:25,320 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 43 [2018-04-12 14:11:25,321 INFO L442 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-04-12 14:11:25,321 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-04-12 14:11:25,321 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=1692, Unknown=8, NotChecked=82, Total=1892 [2018-04-12 14:11:25,321 INFO L87 Difference]: Start difference. First operand 285 states and 314 transitions. Second operand 44 states. [2018-04-12 14:11:27,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:11:27,262 INFO L93 Difference]: Finished difference Result 317 states and 347 transitions. [2018-04-12 14:11:27,262 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-04-12 14:11:27,262 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 67 [2018-04-12 14:11:27,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:11:27,263 INFO L225 Difference]: With dead ends: 317 [2018-04-12 14:11:27,263 INFO L226 Difference]: Without dead ends: 298 [2018-04-12 14:11:27,263 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 49 SyntacticMatches, 5 SemanticMatches, 62 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 826 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=239, Invalid=3662, Unknown=9, NotChecked=122, Total=4032 [2018-04-12 14:11:27,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 298 states. [2018-04-12 14:11:27,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 298 to 285. [2018-04-12 14:11:27,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 285 states. [2018-04-12 14:11:27,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 285 states to 285 states and 313 transitions. [2018-04-12 14:11:27,266 INFO L78 Accepts]: Start accepts. Automaton has 285 states and 313 transitions. Word has length 67 [2018-04-12 14:11:27,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:11:27,266 INFO L459 AbstractCegarLoop]: Abstraction has 285 states and 313 transitions. [2018-04-12 14:11:27,266 INFO L460 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-04-12 14:11:27,266 INFO L276 IsEmpty]: Start isEmpty. Operand 285 states and 313 transitions. [2018-04-12 14:11:27,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-04-12 14:11:27,266 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:11:27,266 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:11:27,266 INFO L408 AbstractCegarLoop]: === Iteration 55 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:11:27,267 INFO L82 PathProgramCache]: Analyzing trace with hash -246027677, now seen corresponding path program 1 times [2018-04-12 14:11:27,267 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:11:27,267 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:11:27,267 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:11:27,267 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:11:27,267 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:11:27,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:11:27,275 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:11:27,826 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 8 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:11:27,826 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 14:11:27,826 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 14:11:27,831 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:11:27,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:11:27,855 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 14:11:27,978 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:11:27,979 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:11:27,979 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:27,980 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:27,986 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:11:27,987 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:11:27,987 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:27,988 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:27,992 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:27,993 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:33, output treesize:26 [2018-04-12 14:11:28,233 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base| Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset| Int)) (and (= (let ((.cse0 (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|)) 0 |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset|)))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| 0))) |c_#memory_$Pointer$.offset|) (= |c_#memory_$Pointer$.base| (let ((.cse1 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|)) 0 |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base|)))) (store .cse1 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse1 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base)))) (= |c_#length| (store |c_old(#length)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base 8)) (= (select |c_old(#valid)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) 0))) is different from true [2018-04-12 14:11:28,321 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:28,323 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:28,323 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-12 14:11:28,324 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,414 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-04-12 14:11:28,414 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 47 [2018-04-12 14:11:28,500 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:28,500 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 45 [2018-04-12 14:11:28,504 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 42 [2018-04-12 14:11:28,504 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,511 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27 [2018-04-12 14:11:28,526 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:28,528 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 29 [2018-04-12 14:11:28,528 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,532 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,538 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 48 [2018-04-12 14:11:28,547 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-04-12 14:11:28,550 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-04-12 14:11:28,550 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,554 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,569 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:28,571 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 42 [2018-04-12 14:11:28,573 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-04-12 14:11:28,573 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,580 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,587 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,624 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 38 [2018-04-12 14:11:28,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-04-12 14:11:28,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-04-12 14:11:28,628 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,631 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,638 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:11:28,639 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 34 [2018-04-12 14:11:28,641 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-12 14:11:28,641 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,652 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,657 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,660 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 39 [2018-04-12 14:11:28,662 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:28,662 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 37 [2018-04-12 14:11:28,665 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 33 [2018-04-12 14:11:28,665 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,670 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 19 [2018-04-12 14:11:28,678 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:28,679 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2018-04-12 14:11:28,679 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,683 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,686 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:28,711 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, 2 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-04-12 14:11:28,711 INFO L202 ElimStorePlain]: Needed 23 recursive calls to eliminate 7 variables, input treesize:122, output treesize:254 [2018-04-12 14:11:29,063 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-12 14:11:29,063 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:29,074 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:29,074 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:112, output treesize:111 [2018-04-12 14:11:29,123 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:29,124 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:29,124 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-12 14:11:29,124 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:29,141 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:29,143 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 123 treesize of output 117 [2018-04-12 14:11:29,145 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 120 treesize of output 97 [2018-04-12 14:11:29,145 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:11:29,157 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:11:29,170 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:11:29,171 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 65 [2018-04-12 14:11:29,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 70 [2018-04-12 14:11:29,174 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:29,179 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:29,186 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:11:29,187 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:132, output treesize:75 [2018-04-12 14:11:29,230 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 36 [2018-04-12 14:11:29,232 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:11:29,232 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2018-04-12 14:11:29,232 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:29,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-04-12 14:11:29,238 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:29,240 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:29,257 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2018-04-12 14:11:29,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 14:11:29,258 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:29,262 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:11:29,262 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 9 [2018-04-12 14:11:29,262 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:29,264 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:29,268 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:11:29,268 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:86, output treesize:18 [2018-04-12 14:11:29,317 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-04-12 14:11:29,334 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 14:11:29,334 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 28] total 47 [2018-04-12 14:11:29,334 INFO L442 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-04-12 14:11:29,335 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-04-12 14:11:29,335 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=209, Invalid=1953, Unknown=4, NotChecked=90, Total=2256 [2018-04-12 14:11:29,335 INFO L87 Difference]: Start difference. First operand 285 states and 313 transitions. Second operand 48 states. [2018-04-12 14:11:31,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:11:31,937 INFO L93 Difference]: Finished difference Result 364 states and 405 transitions. [2018-04-12 14:11:31,938 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-04-12 14:11:31,938 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 73 [2018-04-12 14:11:31,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:11:31,939 INFO L225 Difference]: With dead ends: 364 [2018-04-12 14:11:31,939 INFO L226 Difference]: Without dead ends: 364 [2018-04-12 14:11:31,939 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 50 SyntacticMatches, 7 SemanticMatches, 77 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1951 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=598, Invalid=5404, Unknown=8, NotChecked=152, Total=6162 [2018-04-12 14:11:31,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 364 states. [2018-04-12 14:11:31,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 364 to 314. [2018-04-12 14:11:31,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 314 states. [2018-04-12 14:11:31,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 314 states to 314 states and 347 transitions. [2018-04-12 14:11:31,942 INFO L78 Accepts]: Start accepts. Automaton has 314 states and 347 transitions. Word has length 73 [2018-04-12 14:11:31,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:11:31,942 INFO L459 AbstractCegarLoop]: Abstraction has 314 states and 347 transitions. [2018-04-12 14:11:31,942 INFO L460 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-04-12 14:11:31,942 INFO L276 IsEmpty]: Start isEmpty. Operand 314 states and 347 transitions. [2018-04-12 14:11:31,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-04-12 14:11:31,942 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:11:31,942 INFO L355 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 5, 5, 5, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:11:31,942 INFO L408 AbstractCegarLoop]: === Iteration 56 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:11:31,943 INFO L82 PathProgramCache]: Analyzing trace with hash 1870574167, now seen corresponding path program 1 times [2018-04-12 14:11:31,943 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:11:31,943 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:11:31,943 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:11:31,943 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:11:31,943 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:11:31,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:11:31,950 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:11:31,977 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 6 proven. 80 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-04-12 14:11:31,977 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 14:11:31,977 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 14:11:31,983 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:11:32,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:11:32,026 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 14:11:32,045 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 6 proven. 80 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-04-12 14:11:32,075 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 14:11:32,075 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-04-12 14:11:32,075 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 14:11:32,076 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 14:11:32,076 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-04-12 14:11:32,076 INFO L87 Difference]: Start difference. First operand 314 states and 347 transitions. Second operand 9 states. [2018-04-12 14:11:32,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:11:32,104 INFO L93 Difference]: Finished difference Result 326 states and 359 transitions. [2018-04-12 14:11:32,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 14:11:32,104 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 95 [2018-04-12 14:11:32,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:11:32,105 INFO L225 Difference]: With dead ends: 326 [2018-04-12 14:11:32,105 INFO L226 Difference]: Without dead ends: 326 [2018-04-12 14:11:32,105 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 95 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-04-12 14:11:32,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326 states. [2018-04-12 14:11:32,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326 to 321. [2018-04-12 14:11:32,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 321 states. [2018-04-12 14:11:32,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321 states to 321 states and 354 transitions. [2018-04-12 14:11:32,110 INFO L78 Accepts]: Start accepts. Automaton has 321 states and 354 transitions. Word has length 95 [2018-04-12 14:11:32,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:11:32,110 INFO L459 AbstractCegarLoop]: Abstraction has 321 states and 354 transitions. [2018-04-12 14:11:32,110 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 14:11:32,110 INFO L276 IsEmpty]: Start isEmpty. Operand 321 states and 354 transitions. [2018-04-12 14:11:32,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-04-12 14:11:32,111 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:11:32,111 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:11:32,111 INFO L408 AbstractCegarLoop]: === Iteration 57 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:11:32,111 INFO L82 PathProgramCache]: Analyzing trace with hash -210320289, now seen corresponding path program 1 times [2018-04-12 14:11:32,112 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:11:32,112 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:11:32,112 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:11:32,112 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:11:32,112 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:11:32,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:11:32,123 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:11:32,406 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 8 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:11:32,407 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 14:11:32,442 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 14:11:32,447 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:11:32,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:11:32,477 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 14:11:32,498 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:11:32,499 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:11:32,499 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:32,501 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:32,503 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:32,503 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:8 [2018-04-12 14:11:32,604 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base| Int)) (= |c_#memory_$Pointer$.base| (let ((.cse0 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|)) 0 |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base|)))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base))))) is different from true [2018-04-12 14:11:32,623 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 39 [2018-04-12 14:11:32,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-04-12 14:11:32,641 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-04-12 14:11:32,641 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:32,644 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:32,654 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 35 [2018-04-12 14:11:32,656 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 16 [2018-04-12 14:11:32,657 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:32,661 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:32,666 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:32,668 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-04-12 14:11:32,670 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:32,670 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 38 [2018-04-12 14:11:32,672 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 37 [2018-04-12 14:11:32,673 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:32,676 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:32,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 20 [2018-04-12 14:11:32,684 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:32,686 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 20 [2018-04-12 14:11:32,686 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:32,689 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:32,692 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:32,705 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:11:32,705 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 3 variables, input treesize:53, output treesize:36 [2018-04-12 14:11:36,858 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-04-12 14:11:36,859 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-04-12 14:11:36,859 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:36,860 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:36,864 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:36,865 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:47, output treesize:36 [2018-04-12 14:11:36,909 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-12 14:11:36,909 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:36,913 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:36,914 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:37, output treesize:36 [2018-04-12 14:11:36,955 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:36,955 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:11:36,956 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-12 14:11:36,956 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:36,962 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 32 [2018-04-12 14:11:36,964 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 24 [2018-04-12 14:11:36,964 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:11:36,967 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:11:36,970 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:11:36,970 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:49, output treesize:27 [2018-04-12 14:11:36,999 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2018-04-12 14:11:37,000 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-04-12 14:11:37,000 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:37,003 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2018-04-12 14:11:37,003 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 14:11:37,004 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:37,005 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:11:37,006 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:31, output treesize:4 [2018-04-12 14:11:37,022 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 8 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-04-12 14:11:37,039 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 14:11:37,039 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 26] total 36 [2018-04-12 14:11:37,040 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-12 14:11:37,040 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-12 14:11:37,040 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=123, Invalid=1058, Unknown=13, NotChecked=66, Total=1260 [2018-04-12 14:11:37,040 INFO L87 Difference]: Start difference. First operand 321 states and 354 transitions. Second operand 36 states. [2018-04-12 14:12:26,108 WARN L148 SmtUtils]: Spent 198ms on a formula simplification that was a NOOP. DAG size: 20 [2018-04-12 14:12:26,322 WARN L148 SmtUtils]: Spent 190ms on a formula simplification that was a NOOP. DAG size: 24 [2018-04-12 14:12:26,555 WARN L148 SmtUtils]: Spent 196ms on a formula simplification that was a NOOP. DAG size: 29 [2018-04-12 14:12:26,806 WARN L148 SmtUtils]: Spent 204ms on a formula simplification that was a NOOP. DAG size: 34 [2018-04-12 14:12:27,060 WARN L148 SmtUtils]: Spent 203ms on a formula simplification that was a NOOP. DAG size: 38 [2018-04-12 14:12:29,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:12:29,534 INFO L93 Difference]: Finished difference Result 401 states and 443 transitions. [2018-04-12 14:12:29,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-04-12 14:12:29,534 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 75 [2018-04-12 14:12:29,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:12:29,535 INFO L225 Difference]: With dead ends: 401 [2018-04-12 14:12:29,535 INFO L226 Difference]: Without dead ends: 401 [2018-04-12 14:12:29,536 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 58 SyntacticMatches, 9 SemanticMatches, 66 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1220 ImplicationChecksByTransitivity, 14.1s TimeCoverageRelationStatistics Valid=491, Invalid=3900, Unknown=35, NotChecked=130, Total=4556 [2018-04-12 14:12:29,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 401 states. [2018-04-12 14:12:29,538 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 401 to 331. [2018-04-12 14:12:29,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 331 states. [2018-04-12 14:12:29,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331 states to 331 states and 363 transitions. [2018-04-12 14:12:29,539 INFO L78 Accepts]: Start accepts. Automaton has 331 states and 363 transitions. Word has length 75 [2018-04-12 14:12:29,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:12:29,539 INFO L459 AbstractCegarLoop]: Abstraction has 331 states and 363 transitions. [2018-04-12 14:12:29,539 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-12 14:12:29,539 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 363 transitions. [2018-04-12 14:12:29,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-04-12 14:12:29,540 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:12:29,540 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:12:29,540 INFO L408 AbstractCegarLoop]: === Iteration 58 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:12:29,540 INFO L82 PathProgramCache]: Analyzing trace with hash 2098698450, now seen corresponding path program 1 times [2018-04-12 14:12:29,540 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:12:29,540 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:12:29,541 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:12:29,541 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:12:29,541 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:12:29,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:12:29,547 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:12:29,880 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:12:29,880 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 14:12:29,880 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 14:12:29,885 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:12:29,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:12:29,919 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 14:12:29,937 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:12:29,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:12:29,938 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:29,939 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:29,940 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:29,940 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-04-12 14:12:30,020 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:12:30,021 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:12:30,022 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,023 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,027 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:12:30,027 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:53, output treesize:57 [2018-04-12 14:12:30,029 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset| Int)) (= (let ((.cse0 (let ((.cse1 (select (select |c_#memory_$Pointer$.base| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|))) (store |c_old(#memory_$Pointer$.offset)| .cse1 (store (store (select |c_old(#memory_$Pointer$.offset)| .cse1) 4 (select (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|)) 0 |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset|))))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| 0))) |c_#memory_$Pointer$.offset|)) is different from true [2018-04-12 14:12:30,049 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 46 [2018-04-12 14:12:30,050 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 22 [2018-04-12 14:12:30,053 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 27 [2018-04-12 14:12:30,053 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,056 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,063 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:30,064 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 46 [2018-04-12 14:12:30,065 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 27 [2018-04-12 14:12:30,065 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,069 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,073 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,076 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 47 [2018-04-12 14:12:30,077 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:30,078 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 41 [2018-04-12 14:12:30,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 45 [2018-04-12 14:12:30,080 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,085 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,091 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 30 [2018-04-12 14:12:30,092 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:30,093 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 27 [2018-04-12 14:12:30,094 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,097 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,100 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,110 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:12:30,110 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 2 variables, input treesize:68, output treesize:64 [2018-04-12 14:12:30,257 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 43 [2018-04-12 14:12:30,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 32 [2018-04-12 14:12:30,258 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,262 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,266 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,267 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:61, output treesize:42 [2018-04-12 14:12:30,324 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 14:12:30,324 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,329 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:12:30,329 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:41, output treesize:40 [2018-04-12 14:12:30,368 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:30,369 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:30,369 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 14:12:30,369 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,377 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:30,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 50 [2018-04-12 14:12:30,380 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 53 [2018-04-12 14:12:30,380 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,385 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,390 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:12:30,390 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:53, output treesize:36 [2018-04-12 14:12:30,491 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-12 14:12:30,492 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2018-04-12 14:12:30,492 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,494 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,503 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 37 [2018-04-12 14:12:30,504 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 22 [2018-04-12 14:12:30,504 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,510 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:30,511 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 9 [2018-04-12 14:12:30,511 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,514 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,518 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:30,518 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:62, output treesize:11 [2018-04-12 14:12:30,555 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 18 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-04-12 14:12:30,573 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 14:12:30,573 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 27] total 41 [2018-04-12 14:12:30,573 INFO L442 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-04-12 14:12:30,574 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-04-12 14:12:30,574 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=180, Invalid=1457, Unknown=7, NotChecked=78, Total=1722 [2018-04-12 14:12:30,574 INFO L87 Difference]: Start difference. First operand 331 states and 363 transitions. Second operand 42 states. [2018-04-12 14:12:30,987 WARN L148 SmtUtils]: Spent 126ms on a formula simplification that was a NOOP. DAG size: 32 [2018-04-12 14:12:32,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:12:32,060 INFO L93 Difference]: Finished difference Result 374 states and 410 transitions. [2018-04-12 14:12:32,060 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-04-12 14:12:32,060 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 76 [2018-04-12 14:12:32,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:12:32,061 INFO L225 Difference]: With dead ends: 374 [2018-04-12 14:12:32,061 INFO L226 Difference]: Without dead ends: 374 [2018-04-12 14:12:32,062 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 58 SyntacticMatches, 7 SemanticMatches, 75 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1768 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=593, Invalid=5097, Unknown=14, NotChecked=148, Total=5852 [2018-04-12 14:12:32,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 374 states. [2018-04-12 14:12:32,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 374 to 336. [2018-04-12 14:12:32,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 336 states. [2018-04-12 14:12:32,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 336 states to 336 states and 369 transitions. [2018-04-12 14:12:32,065 INFO L78 Accepts]: Start accepts. Automaton has 336 states and 369 transitions. Word has length 76 [2018-04-12 14:12:32,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:12:32,065 INFO L459 AbstractCegarLoop]: Abstraction has 336 states and 369 transitions. [2018-04-12 14:12:32,065 INFO L460 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-04-12 14:12:32,065 INFO L276 IsEmpty]: Start isEmpty. Operand 336 states and 369 transitions. [2018-04-12 14:12:32,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-04-12 14:12:32,065 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:12:32,065 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:12:32,066 INFO L408 AbstractCegarLoop]: === Iteration 59 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:12:32,066 INFO L82 PathProgramCache]: Analyzing trace with hash 1255974582, now seen corresponding path program 1 times [2018-04-12 14:12:32,066 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:12:32,066 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:12:32,066 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:12:32,066 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:12:32,066 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:12:32,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:12:32,076 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:12:32,558 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:12:32,558 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 14:12:32,558 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [27] imperfect sequences [] total 27 [2018-04-12 14:12:32,558 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-04-12 14:12:32,558 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-04-12 14:12:32,558 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=619, Unknown=0, NotChecked=0, Total=702 [2018-04-12 14:12:32,559 INFO L87 Difference]: Start difference. First operand 336 states and 369 transitions. Second operand 27 states. [2018-04-12 14:12:33,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:12:33,185 INFO L93 Difference]: Finished difference Result 373 states and 406 transitions. [2018-04-12 14:12:33,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-04-12 14:12:33,185 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 72 [2018-04-12 14:12:33,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:12:33,186 INFO L225 Difference]: With dead ends: 373 [2018-04-12 14:12:33,186 INFO L226 Difference]: Without dead ends: 326 [2018-04-12 14:12:33,186 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 535 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=222, Invalid=1940, Unknown=0, NotChecked=0, Total=2162 [2018-04-12 14:12:33,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326 states. [2018-04-12 14:12:33,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326 to 308. [2018-04-12 14:12:33,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 308 states. [2018-04-12 14:12:33,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308 states to 308 states and 339 transitions. [2018-04-12 14:12:33,189 INFO L78 Accepts]: Start accepts. Automaton has 308 states and 339 transitions. Word has length 72 [2018-04-12 14:12:33,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:12:33,189 INFO L459 AbstractCegarLoop]: Abstraction has 308 states and 339 transitions. [2018-04-12 14:12:33,189 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-04-12 14:12:33,189 INFO L276 IsEmpty]: Start isEmpty. Operand 308 states and 339 transitions. [2018-04-12 14:12:33,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-04-12 14:12:33,189 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:12:33,190 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:12:33,190 INFO L408 AbstractCegarLoop]: === Iteration 60 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:12:33,190 INFO L82 PathProgramCache]: Analyzing trace with hash 1456767157, now seen corresponding path program 1 times [2018-04-12 14:12:33,190 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:12:33,190 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:12:33,191 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:12:33,191 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:12:33,191 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:12:33,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:12:33,200 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:12:34,507 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 7 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:12:34,507 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 14:12:34,507 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 14:12:34,512 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:12:34,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:12:34,547 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 14:12:34,574 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 14:12:34,575 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:34,578 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:34,578 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:15 [2018-04-12 14:12:34,591 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:12:34,592 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:12:34,592 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:34,593 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:34,598 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:12:34,599 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:12:34,599 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:34,600 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:34,602 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:34,602 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:28, output treesize:17 [2018-04-12 14:12:35,076 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:35,077 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:35,077 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 14:12:35,077 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:35,101 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:35,120 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:35,120 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:124, output treesize:108 [2018-04-12 14:12:35,384 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base| Int)) (and (= (store (store |c_old(#length)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base 8) |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base| 8) |c_#length|) (= |c_#memory_$Pointer$.base| (let ((.cse0 (let ((.cse1 (let ((.cse2 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|))))) (store .cse2 |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base| (store (select .cse2 |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base|) 4 0))))) (store .cse1 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (select .cse1 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) 0 |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base|))))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base)))) (not (= |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base)) (= (let ((.cse3 (let ((.cse4 (let ((.cse5 (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|))))) (store .cse5 |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base| (store (select .cse5 |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base|) 4 0))))) (store .cse4 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (select .cse4 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) 0 0))))) (store .cse3 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse3 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| 0))) |c_#memory_$Pointer$.offset|))) is different from true [2018-04-12 14:12:35,394 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2018-04-12 14:12:35,406 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 24 [2018-04-12 14:12:35,406 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:35,427 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:35,512 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 163 treesize of output 92 [2018-04-12 14:12:35,516 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:35,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 85 [2018-04-12 14:12:35,516 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:35,739 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 82 [2018-04-12 14:12:35,739 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:36,027 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 81 treesize of output 72 [2018-04-12 14:12:36,031 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 64 [2018-04-12 14:12:36,032 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:36,212 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:36,213 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 60 [2018-04-12 14:12:36,213 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:36,387 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 50 [2018-04-12 14:12:36,390 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:36,391 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 30 [2018-04-12 14:12:36,391 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:36,413 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:36,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 41 [2018-04-12 14:12:36,419 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:36,419 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 41 [2018-04-12 14:12:36,419 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:36,428 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:36,436 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:36,554 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:36,562 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 56 treesize of output 54 [2018-04-12 14:12:36,581 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:36,601 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 57 treesize of output 70 [2018-04-12 14:12:36,656 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 46 [2018-04-12 14:12:36,659 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-04-12 14:12:36,659 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:36,669 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:36,682 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:36,689 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:36,718 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:36,794 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:36,831 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 165 treesize of output 94 [2018-04-12 14:12:36,834 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:36,834 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 95 [2018-04-12 14:12:36,835 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:36,923 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 84 [2018-04-12 14:12:36,923 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:37,000 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 71 [2018-04-12 14:12:37,001 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:12:37,001 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:37,013 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 56 [2018-04-12 14:12:37,015 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:37,016 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:37,017 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 39 [2018-04-12 14:12:37,017 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:37,027 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:37,028 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 42 [2018-04-12 14:12:37,030 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:37,032 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 40 [2018-04-12 14:12:37,032 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:37,038 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:37,041 INFO L267 ElimStorePlain]: Start of recursive call 23: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:37,046 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:37,102 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 83 treesize of output 74 [2018-04-12 14:12:37,105 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:37,131 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 74 [2018-04-12 14:12:37,131 INFO L267 ElimStorePlain]: Start of recursive call 28: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:37,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 62 [2018-04-12 14:12:37,179 INFO L267 ElimStorePlain]: Start of recursive call 29: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:37,234 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 62 treesize of output 67 [2018-04-12 14:12:37,238 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 60 [2018-04-12 14:12:37,238 INFO L267 ElimStorePlain]: Start of recursive call 31: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:37,281 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:37,282 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 57 [2018-04-12 14:12:37,285 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:37,286 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 54 [2018-04-12 14:12:37,289 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:37,289 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:37,291 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 39 [2018-04-12 14:12:37,291 INFO L267 ElimStorePlain]: Start of recursive call 34: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:37,297 INFO L267 ElimStorePlain]: Start of recursive call 33: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:37,304 INFO L267 ElimStorePlain]: Start of recursive call 32: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:37,332 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:37,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 45 [2018-04-12 14:12:37,336 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:37,338 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 40 [2018-04-12 14:12:37,338 INFO L267 ElimStorePlain]: Start of recursive call 36: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:37,344 INFO L267 ElimStorePlain]: Start of recursive call 35: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:37,371 INFO L267 ElimStorePlain]: Start of recursive call 30: 1 dim-1 vars, 3 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:12:37,430 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-04-12 14:12:37,432 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 23 [2018-04-12 14:12:37,432 INFO L267 ElimStorePlain]: Start of recursive call 38: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:37,446 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:37,460 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 54 treesize of output 86 [2018-04-12 14:12:37,464 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:37,467 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 69 [2018-04-12 14:12:37,467 INFO L267 ElimStorePlain]: Start of recursive call 40: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:37,591 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 54 [2018-04-12 14:12:37,591 INFO L267 ElimStorePlain]: Start of recursive call 41: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:37,636 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 57 [2018-04-12 14:12:37,637 INFO L267 ElimStorePlain]: Start of recursive call 42: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:37,660 INFO L267 ElimStorePlain]: Start of recursive call 39: 4 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-04-12 14:12:37,679 INFO L267 ElimStorePlain]: Start of recursive call 37: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-04-12 14:12:37,715 INFO L267 ElimStorePlain]: Start of recursive call 27: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:12:37,740 INFO L267 ElimStorePlain]: Start of recursive call 18: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:12:37,758 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-04-12 14:12:37,758 INFO L202 ElimStorePlain]: Needed 42 recursive calls to eliminate 5 variables, input treesize:343, output treesize:172 [2018-04-12 14:12:38,711 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 148 [2018-04-12 14:12:38,711 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:38,748 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 109 [2018-04-12 14:12:38,748 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:38,783 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-04-12 14:12:38,783 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:260, output treesize:258 [2018-04-12 14:12:38,921 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:38,922 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:38,923 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 169 treesize of output 163 [2018-04-12 14:12:38,923 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:38,925 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-04-12 14:12:38,925 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:38,986 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:38,988 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:38,988 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:38,989 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:38,993 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:39,003 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 126 treesize of output 168 [2018-04-12 14:12:39,018 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 4 case distinctions, treesize of input 162 treesize of output 165 [2018-04-12 14:12:39,019 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-12 14:12:39,091 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:39,094 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 106 [2018-04-12 14:12:39,094 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:39,129 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:12:39,157 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:39,164 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 132 treesize of output 142 [2018-04-12 14:12:39,165 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 67 [2018-04-12 14:12:39,166 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:39,178 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:39,192 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 4 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:12:39,192 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 7 variables, input treesize:300, output treesize:133 [2018-04-12 14:12:39,284 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 90 [2018-04-12 14:12:39,286 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:39,286 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:39,288 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 64 [2018-04-12 14:12:39,288 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:12:39,307 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:39,307 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:39,309 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 61 [2018-04-12 14:12:39,309 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:12:39,324 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2018-04-12 14:12:39,324 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:39,337 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 37 [2018-04-12 14:12:39,337 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:39,348 INFO L267 ElimStorePlain]: Start of recursive call 2: 4 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-04-12 14:12:39,369 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 60 [2018-04-12 14:12:39,371 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 42 [2018-04-12 14:12:39,371 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:39,389 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:39,389 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 47 [2018-04-12 14:12:39,390 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:39,405 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 18 [2018-04-12 14:12:39,405 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:39,414 INFO L267 ElimStorePlain]: Start of recursive call 7: 4 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:39,417 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 56 [2018-04-12 14:12:39,419 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:39,419 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 5 [2018-04-12 14:12:39,419 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:39,425 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 14:12:39,426 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:39,430 INFO L267 ElimStorePlain]: Start of recursive call 11: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:39,442 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-04-12 14:12:39,442 INFO L202 ElimStorePlain]: Needed 13 recursive calls to eliminate 4 variables, input treesize:144, output treesize:47 [2018-04-12 14:12:39,557 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 16 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-04-12 14:12:39,575 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 14:12:39,575 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 32] total 61 [2018-04-12 14:12:39,575 INFO L442 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-04-12 14:12:39,575 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-04-12 14:12:39,576 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=291, Invalid=3367, Unknown=6, NotChecked=118, Total=3782 [2018-04-12 14:12:39,576 INFO L87 Difference]: Start difference. First operand 308 states and 339 transitions. Second operand 62 states. [2018-04-12 14:12:42,267 WARN L151 SmtUtils]: Spent 364ms on a formula simplification. DAG size of input: 120 DAG size of output 80 [2018-04-12 14:12:46,942 WARN L151 SmtUtils]: Spent 105ms on a formula simplification. DAG size of input: 86 DAG size of output 83 [2018-04-12 14:12:47,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:12:47,844 INFO L93 Difference]: Finished difference Result 423 states and 475 transitions. [2018-04-12 14:12:47,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2018-04-12 14:12:47,845 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 85 [2018-04-12 14:12:47,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:12:47,846 INFO L225 Difference]: With dead ends: 423 [2018-04-12 14:12:47,846 INFO L226 Difference]: Without dead ends: 423 [2018-04-12 14:12:47,846 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 173 GetRequests, 57 SyntacticMatches, 11 SemanticMatches, 105 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 3385 ImplicationChecksByTransitivity, 6.5s TimeCoverageRelationStatistics Valid=848, Invalid=10261, Unknown=25, NotChecked=208, Total=11342 [2018-04-12 14:12:47,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 423 states. [2018-04-12 14:12:47,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 423 to 342. [2018-04-12 14:12:47,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 342 states. [2018-04-12 14:12:47,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 342 states to 342 states and 378 transitions. [2018-04-12 14:12:47,849 INFO L78 Accepts]: Start accepts. Automaton has 342 states and 378 transitions. Word has length 85 [2018-04-12 14:12:47,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:12:47,850 INFO L459 AbstractCegarLoop]: Abstraction has 342 states and 378 transitions. [2018-04-12 14:12:47,850 INFO L460 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-04-12 14:12:47,850 INFO L276 IsEmpty]: Start isEmpty. Operand 342 states and 378 transitions. [2018-04-12 14:12:47,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-04-12 14:12:47,850 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:12:47,850 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:12:47,850 INFO L408 AbstractCegarLoop]: === Iteration 61 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:12:47,850 INFO L82 PathProgramCache]: Analyzing trace with hash -2091824658, now seen corresponding path program 1 times [2018-04-12 14:12:47,850 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:12:47,850 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:12:47,851 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:12:47,851 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:12:47,851 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:12:47,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:12:47,859 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:12:48,759 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 7 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:12:48,759 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 14:12:48,759 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 14:12:48,764 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:12:48,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:12:48,794 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 14:12:48,796 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 14:12:48,796 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:48,801 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 14:12:48,801 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:48,804 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:48,804 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-04-12 14:12:49,093 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:12:49,095 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:12:49,095 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:49,096 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:49,106 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:12:49,107 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:12:49,107 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:49,109 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:49,116 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:49,117 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:48, output treesize:40 [2018-04-12 14:12:49,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-04-12 14:12:49,193 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-12 14:12:49,193 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:49,210 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-04-12 14:12:49,210 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-12 14:12:49,219 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:12:49,243 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-04-12 14:12:49,246 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 18 [2018-04-12 14:12:49,246 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:49,257 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-04-12 14:12:49,257 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:49,262 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:49,276 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:12:49,276 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:53, output treesize:100 [2018-04-12 14:12:49,353 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-04-12 14:12:49,353 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:49,363 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:49,364 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:49,364 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 29 [2018-04-12 14:12:49,364 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:49,376 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:49,376 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:49,377 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-12 14:12:49,377 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:49,391 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:49,391 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:116, output treesize:56 [2018-04-12 14:12:49,820 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base| Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset| Int)) (and (= (let ((.cse0 (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|)) 0 |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset|)))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| 0))) |c_#memory_$Pointer$.offset|) (= |c_#memory_$Pointer$.base| (let ((.cse1 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|)) 0 |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base|)))) (store .cse1 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse1 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base)))) (= |c_#length| (store |c_old(#length)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base 8)) (= (select |c_old(#valid)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) 0))) is different from true [2018-04-12 14:12:49,928 WARN L148 SmtUtils]: Spent 105ms on a formula simplification that was a NOOP. DAG size: 67 [2018-04-12 14:12:49,934 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:49,936 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:49,937 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-12 14:12:49,937 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,044 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:50,051 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:50,055 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 21 treesize of output 50 [2018-04-12 14:12:50,056 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 14:12:50,209 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:50,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 91 [2018-04-12 14:12:50,222 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-04-12 14:12:50,226 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-04-12 14:12:50,226 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,230 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,254 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:50,255 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:50,258 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:50,263 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 71 [2018-04-12 14:12:50,265 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 44 [2018-04-12 14:12:50,265 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,277 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,289 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,291 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-04-12 14:12:50,291 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,297 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 79 [2018-04-12 14:12:50,300 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:50,300 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 69 [2018-04-12 14:12:50,304 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 60 [2018-04-12 14:12:50,305 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,314 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,335 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 54 [2018-04-12 14:12:50,338 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:50,340 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 59 [2018-04-12 14:12:50,340 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,356 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,368 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,425 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-04-12 14:12:50,425 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,427 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:50,434 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 113 [2018-04-12 14:12:50,436 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 22 [2018-04-12 14:12:50,440 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 27 [2018-04-12 14:12:50,440 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,444 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,466 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:50,467 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:50,470 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:50,472 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 77 [2018-04-12 14:12:50,474 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 27 [2018-04-12 14:12:50,474 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,483 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,495 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,501 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 102 [2018-04-12 14:12:50,503 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:50,503 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 41 [2018-04-12 14:12:50,506 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 45 [2018-04-12 14:12:50,506 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,511 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,527 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 53 [2018-04-12 14:12:50,528 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:50,530 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 27 [2018-04-12 14:12:50,530 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,535 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,544 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:50,571 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:12:50,571 INFO L202 ElimStorePlain]: Needed 25 recursive calls to eliminate 7 variables, input treesize:149, output treesize:189 [2018-04-12 14:12:51,337 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 147 treesize of output 146 [2018-04-12 14:12:51,337 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:51,339 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 129 treesize of output 128 [2018-04-12 14:12:51,339 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:51,371 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:12:51,372 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:277, output treesize:275 [2018-04-12 14:12:51,472 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-04-12 14:12:51,472 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:51,474 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:51,475 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:51,475 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 167 treesize of output 161 [2018-04-12 14:12:51,475 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:51,494 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:51,494 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:51,498 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:51,500 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 136 [2018-04-12 14:12:51,501 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 114 [2018-04-12 14:12:51,502 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:51,511 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:51,555 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:51,555 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:51,559 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:51,560 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 142 treesize of output 145 [2018-04-12 14:12:51,571 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 151 treesize of output 116 [2018-04-12 14:12:51,571 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:12:51,593 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:12:51,604 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 4 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:12:51,604 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:317, output treesize:98 [2018-04-12 14:12:51,776 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:51,776 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:51,777 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:51,777 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:51,778 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:51,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 39 [2018-04-12 14:12:51,778 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:51,790 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:12:51,790 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:113, output treesize:85 [2018-04-12 14:12:51,957 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 65 [2018-04-12 14:12:51,958 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:51,958 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 15 [2018-04-12 14:12:51,958 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:51,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 26 [2018-04-12 14:12:51,966 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:51,971 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-04-12 14:12:51,972 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:12:51,977 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 14:12:51,987 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 48 [2018-04-12 14:12:51,988 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:51,988 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-04-12 14:12:51,988 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:51,995 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 14:12:51,995 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:51,999 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:51,999 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 9 [2018-04-12 14:12:51,999 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:52,001 INFO L267 ElimStorePlain]: Start of recursive call 6: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:52,005 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:52,005 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 4 variables, input treesize:119, output treesize:9 [2018-04-12 14:12:52,043 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 5 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-04-12 14:12:52,061 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 14:12:52,061 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 37] total 66 [2018-04-12 14:12:52,062 INFO L442 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-04-12 14:12:52,062 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-04-12 14:12:52,062 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=257, Invalid=3898, Unknown=9, NotChecked=126, Total=4290 [2018-04-12 14:12:52,062 INFO L87 Difference]: Start difference. First operand 342 states and 378 transitions. Second operand 66 states. [2018-04-12 14:12:52,923 WARN L151 SmtUtils]: Spent 143ms on a formula simplification. DAG size of input: 144 DAG size of output 85 [2018-04-12 14:12:56,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 14:12:56,262 INFO L93 Difference]: Finished difference Result 423 states and 471 transitions. [2018-04-12 14:12:56,262 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2018-04-12 14:12:56,262 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 80 [2018-04-12 14:12:56,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 14:12:56,263 INFO L225 Difference]: With dead ends: 423 [2018-04-12 14:12:56,263 INFO L226 Difference]: Without dead ends: 423 [2018-04-12 14:12:56,264 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 51 SyntacticMatches, 2 SemanticMatches, 102 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 3057 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=713, Invalid=9784, Unknown=13, NotChecked=202, Total=10712 [2018-04-12 14:12:56,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 423 states. [2018-04-12 14:12:56,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 423 to 379. [2018-04-12 14:12:56,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 379 states. [2018-04-12 14:12:56,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 379 states to 379 states and 419 transitions. [2018-04-12 14:12:56,267 INFO L78 Accepts]: Start accepts. Automaton has 379 states and 419 transitions. Word has length 80 [2018-04-12 14:12:56,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 14:12:56,267 INFO L459 AbstractCegarLoop]: Abstraction has 379 states and 419 transitions. [2018-04-12 14:12:56,267 INFO L460 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-04-12 14:12:56,267 INFO L276 IsEmpty]: Start isEmpty. Operand 379 states and 419 transitions. [2018-04-12 14:12:56,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-04-12 14:12:56,267 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 14:12:56,267 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 14:12:56,268 INFO L408 AbstractCegarLoop]: === Iteration 62 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-12 14:12:56,268 INFO L82 PathProgramCache]: Analyzing trace with hash -207024591, now seen corresponding path program 1 times [2018-04-12 14:12:56,268 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 14:12:56,268 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 14:12:56,268 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:12:56,268 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:12:56,268 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 14:12:56,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:12:56,277 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 14:12:56,945 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 8 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 14:12:56,945 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 14:12:56,945 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 14:12:56,951 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 14:12:56,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 14:12:56,983 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 14:12:57,003 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 14:12:57,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 14:12:57,004 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:57,005 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:57,007 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:57,007 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:8 [2018-04-12 14:12:57,218 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base Int) (__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.offset Int)) (and (= |c_#memory_$Pointer$.base| (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base) (+ __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.offset 4) 0))) (= (select |c_old(#valid)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base) 0))) is different from true [2018-04-12 14:12:57,223 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:57,224 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:57,224 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 14:12:57,224 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:57,235 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 14:12:57,235 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:61, output treesize:55 [2018-04-12 14:12:57,368 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base Int) (__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.offset Int) (__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base Int) (__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base| Int)) (and (= (let ((.cse0 (let ((.cse1 (let ((.cse2 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) (+ __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset 4) (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|))))) (store .cse2 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base (store (select .cse2 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base) (+ __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.offset 4) 0))))) (store .cse1 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (select .cse1 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base|))))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base))) |c_#memory_$Pointer$.base|) (<= 0 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset) (not (= __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base)) (<= __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset 0))) is different from true [2018-04-12 14:12:57,392 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 188 treesize of output 103 [2018-04-12 14:12:57,395 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 94 treesize of output 93 [2018-04-12 14:12:57,395 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:57,489 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:57,489 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 98 [2018-04-12 14:12:57,489 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:57,594 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 92 treesize of output 77 [2018-04-12 14:12:57,598 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:57,606 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 63 treesize of output 88 [2018-04-12 14:12:57,606 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-04-12 14:12:57,731 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 65 [2018-04-12 14:12:57,731 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:57,853 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 65 treesize of output 70 [2018-04-12 14:12:57,855 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:57,856 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:57,857 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 67 [2018-04-12 14:12:57,858 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:57,916 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 56 treesize of output 64 [2018-04-12 14:12:57,918 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:57,919 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:57,922 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 64 [2018-04-12 14:12:57,922 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:57,952 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:57,952 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:57,954 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 42 [2018-04-12 14:12:57,954 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:57,972 INFO L267 ElimStorePlain]: Start of recursive call 10: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 14:12:58,025 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 52 treesize of output 62 [2018-04-12 14:12:58,028 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:58,030 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 58 [2018-04-12 14:12:58,032 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 14:12:58,033 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 30 [2018-04-12 14:12:58,034 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-12 14:12:58,043 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 14:12:58,072 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 14:12:58,074 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: var is still there: v_arrayElimCell_252 term size 31 at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:221) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:270) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:243) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:445) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeStrongestPostconditionSequence(IterativePredicateTransformer.java:198) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:283) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:237) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:185) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.MultiTrackRefinementStrategy.getTraceCheck(MultiTrackRefinementStrategy.java:222) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:231) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:205) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:69) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:408) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:417) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:363) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:304) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:118) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:119) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:324) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.runToolchainDefault(DefaultToolchainJob.java:221) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.BasicToolchainJob.run(BasicToolchainJob.java:134) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-04-12 14:12:58,077 INFO L168 Benchmark]: Toolchain (without parser) took 304999.00 ms. Allocated memory was 402.7 MB in the beginning and 751.3 MB in the end (delta: 348.7 MB). Free memory was 339.7 MB in the beginning and 525.6 MB in the end (delta: -185.9 MB). Peak memory consumption was 162.8 MB. Max. memory is 5.3 GB. [2018-04-12 14:12:58,078 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 402.7 MB. Free memory is still 364.5 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-12 14:12:58,078 INFO L168 Benchmark]: CACSL2BoogieTranslator took 269.65 ms. Allocated memory is still 402.7 MB. Free memory was 339.7 MB in the beginning and 313.1 MB in the end (delta: 26.6 MB). Peak memory consumption was 26.6 MB. Max. memory is 5.3 GB. [2018-04-12 14:12:58,078 INFO L168 Benchmark]: Boogie Preprocessor took 40.67 ms. Allocated memory is still 402.7 MB. Free memory was 313.1 MB in the beginning and 310.5 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. [2018-04-12 14:12:58,078 INFO L168 Benchmark]: RCFGBuilder took 468.47 ms. Allocated memory was 402.7 MB in the beginning and 612.9 MB in the end (delta: 210.2 MB). Free memory was 310.5 MB in the beginning and 532.2 MB in the end (delta: -221.7 MB). Peak memory consumption was 24.2 MB. Max. memory is 5.3 GB. [2018-04-12 14:12:58,078 INFO L168 Benchmark]: TraceAbstraction took 304217.67 ms. Allocated memory was 612.9 MB in the beginning and 751.3 MB in the end (delta: 138.4 MB). Free memory was 532.2 MB in the beginning and 525.6 MB in the end (delta: 6.6 MB). Peak memory consumption was 145.0 MB. Max. memory is 5.3 GB. [2018-04-12 14:12:58,079 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 402.7 MB. Free memory is still 364.5 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 269.65 ms. Allocated memory is still 402.7 MB. Free memory was 339.7 MB in the beginning and 313.1 MB in the end (delta: 26.6 MB). Peak memory consumption was 26.6 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 40.67 ms. Allocated memory is still 402.7 MB. Free memory was 313.1 MB in the beginning and 310.5 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. * RCFGBuilder took 468.47 ms. Allocated memory was 402.7 MB in the beginning and 612.9 MB in the end (delta: 210.2 MB). Free memory was 310.5 MB in the beginning and 532.2 MB in the end (delta: -221.7 MB). Peak memory consumption was 24.2 MB. Max. memory is 5.3 GB. * TraceAbstraction took 304217.67 ms. Allocated memory was 612.9 MB in the beginning and 751.3 MB in the end (delta: 138.4 MB). Free memory was 532.2 MB in the beginning and 525.6 MB in the end (delta: 6.6 MB). Peak memory consumption was 145.0 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: var is still there: v_arrayElimCell_252 term size 31 de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: var is still there: v_arrayElimCell_252 term size 31: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) RESULT: Ultimate could not prove your program: Toolchain returned no result. Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-12_14-12-58-083.csv Received shutdown request...