java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv --cacsl2boogietranslator.bitprecise.bitfields false -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/forester-heap/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-408c70d-m [2018-04-12 17:10:48,613 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-12 17:10:48,614 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-12 17:10:48,626 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-12 17:10:48,627 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-12 17:10:48,627 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-12 17:10:48,628 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-12 17:10:48,630 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-12 17:10:48,631 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-12 17:10:48,632 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-12 17:10:48,633 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-12 17:10:48,633 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-12 17:10:48,634 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-12 17:10:48,635 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-12 17:10:48,635 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-12 17:10:48,637 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-12 17:10:48,638 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-12 17:10:48,640 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-12 17:10:48,641 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-12 17:10:48,642 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-12 17:10:48,643 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-04-12 17:10:48,644 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-04-12 17:10:48,644 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-04-12 17:10:48,645 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-04-12 17:10:48,645 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-04-12 17:10:48,646 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-04-12 17:10:48,646 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-04-12 17:10:48,647 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-04-12 17:10:48,647 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-04-12 17:10:48,648 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-04-12 17:10:48,648 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-04-12 17:10:48,648 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-04-12 17:10:48,658 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-12 17:10:48,658 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-12 17:10:48,659 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-12 17:10:48,659 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-12 17:10:48,659 INFO L133 SettingsManager]: * Use SBE=true [2018-04-12 17:10:48,659 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-12 17:10:48,660 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-12 17:10:48,660 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-12 17:10:48,660 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-12 17:10:48,660 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-12 17:10:48,660 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-12 17:10:48,660 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-12 17:10:48,660 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-12 17:10:48,661 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-12 17:10:48,661 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-12 17:10:48,661 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-12 17:10:48,661 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-12 17:10:48,661 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-12 17:10:48,661 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-12 17:10:48,661 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 17:10:48,661 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-12 17:10:48,661 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-12 17:10:48,662 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-12 17:10:48,662 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Bitprecise bitfields -> false [2018-04-12 17:10:48,690 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-12 17:10:48,699 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-12 17:10:48,702 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-12 17:10:48,703 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-12 17:10:48,704 INFO L276 PluginConnector]: CDTParser initialized [2018-04-12 17:10:48,704 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/forester-heap/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:48,978 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGb1d2c08b5 [2018-04-12 17:10:49,156 INFO L287 CDTParser]: IsIndexed: true [2018-04-12 17:10:49,156 INFO L288 CDTParser]: Found 1 translation units. [2018-04-12 17:10:49,157 INFO L168 CDTParser]: Scanning sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,164 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-12 17:10:49,164 INFO L215 ultiparseSymbolTable]: [2018-04-12 17:10:49,164 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-12 17:10:49,165 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,165 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-12 17:10:49,165 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_rwlockattr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,165 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____gid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,165 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____uint16_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,165 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__clock_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,165 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_char in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,165 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____int16_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,165 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____u_long in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,165 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__blkcnt_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,165 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__daddr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,165 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____loff_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,166 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__suseconds_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,166 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_int32_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,166 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____sigset_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,166 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__fd_mask in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,166 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__sigset_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,166 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____ino_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,166 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_spinlock_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,166 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__SLL in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,166 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____caddr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,166 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____off_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,166 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____ino64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,166 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_long in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,166 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fsid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,166 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__ulong in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,166 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____uint32_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,166 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__uid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,166 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__fsblkcnt_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,166 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__lldiv_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,166 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__wchar_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,167 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__int16_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,167 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__blksize_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,167 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____clockid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,167 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__clockid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,167 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____pthread_slist_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,167 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____int32_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,167 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____syscall_ulong_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,167 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____sig_atomic_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,167 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__div_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,167 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,167 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____id_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,167 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fd_mask in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,168 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__quad_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,168 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_int8_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,168 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_int16_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,168 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_cond_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,168 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fsblkcnt64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,168 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____pid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,168 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____rlim_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,168 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____timer_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,168 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_mutexattr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,168 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_attr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,168 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_int in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,168 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____u_char in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,169 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____u_quad_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,169 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_barrier_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,169 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____quad_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,169 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____off64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,169 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____suseconds_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,169 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fsfilcnt64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,169 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_int64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,169 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____blkcnt64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,169 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,169 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__ldiv_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,169 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__ino_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,170 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__fsfilcnt_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,170 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____ssize_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,170 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____socklen_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,170 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____mode_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,170 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__int32_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,170 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__idtype_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,170 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____int8_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,170 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____nlink_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,170 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____intptr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,170 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__timer_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,170 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__size_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,171 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__off_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,171 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__key_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,171 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____uint64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,171 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_once_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,171 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fsword_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,171 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__caddr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,171 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__mode_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,171 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____u_short in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,171 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__nlink_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,171 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_short in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,171 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____uid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,171 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__gid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__ssize_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__uint in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__loff_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____useconds_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__fd_set in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_condattr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__dev_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____rlim64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____blksize_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__id_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____qaddr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____clock_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_key_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____dev_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fsblkcnt_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__fsid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____u_int in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____blkcnt_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__time_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,172 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_rwlock_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,173 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_mutex_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,173 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fsfilcnt_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,173 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____syscall_slong_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,173 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_barrierattr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,173 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__register_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,173 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__int64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,173 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____daddr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,173 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____int64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,173 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__int8_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,173 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____time_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,173 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____uint8_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,173 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____key_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,173 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_quad_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,174 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__ushort in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,187 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGb1d2c08b5 [2018-04-12 17:10:49,189 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-12 17:10:49,190 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-12 17:10:49,191 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-12 17:10:49,191 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-12 17:10:49,194 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-12 17:10:49,194 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 05:10:49" (1/1) ... [2018-04-12 17:10:49,196 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@61c4592e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:49, skipping insertion in model container [2018-04-12 17:10:49,196 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 05:10:49" (1/1) ... [2018-04-12 17:10:49,206 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 17:10:49,227 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 17:10:49,347 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 17:10:49,381 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 17:10:49,387 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 115 non ball SCCs. Number of states in SCCs 115. [2018-04-12 17:10:49,416 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:49 WrapperNode [2018-04-12 17:10:49,416 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-12 17:10:49,416 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-12 17:10:49,417 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-12 17:10:49,417 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-12 17:10:49,424 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:49" (1/1) ... [2018-04-12 17:10:49,424 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:49" (1/1) ... [2018-04-12 17:10:49,435 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:49" (1/1) ... [2018-04-12 17:10:49,435 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:49" (1/1) ... [2018-04-12 17:10:49,445 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:49" (1/1) ... [2018-04-12 17:10:49,450 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:49" (1/1) ... [2018-04-12 17:10:49,452 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:49" (1/1) ... [2018-04-12 17:10:49,456 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-12 17:10:49,456 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-12 17:10:49,456 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-12 17:10:49,456 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-12 17:10:49,457 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:49" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 17:10:49,542 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-12 17:10:49,543 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-12 17:10:49,543 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-12 17:10:49,543 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-12 17:10:49,543 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-12 17:10:49,543 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-12 17:10:49,543 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-12 17:10:49,543 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-12 17:10:49,543 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-12 17:10:49,543 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-12 17:10:49,543 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-12 17:10:49,543 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-12 17:10:49,543 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-12 17:10:49,544 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-12 17:10:49,544 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-12 17:10:49,544 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-12 17:10:49,544 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-12 17:10:49,544 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-12 17:10:49,544 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-12 17:10:49,544 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-12 17:10:49,544 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-12 17:10:49,544 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-12 17:10:49,544 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-12 17:10:49,545 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-12 17:10:49,545 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-12 17:10:49,545 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-12 17:10:49,545 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-12 17:10:49,545 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-12 17:10:49,545 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-12 17:10:49,545 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-12 17:10:49,545 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-12 17:10:49,545 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-12 17:10:49,546 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-12 17:10:49,546 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-12 17:10:49,546 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-12 17:10:49,546 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-12 17:10:49,546 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-12 17:10:49,546 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-12 17:10:49,546 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-12 17:10:49,546 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-12 17:10:49,547 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-12 17:10:49,547 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-12 17:10:49,547 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-12 17:10:49,547 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-12 17:10:49,547 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-12 17:10:49,547 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-12 17:10:49,547 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-12 17:10:49,547 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-12 17:10:49,547 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-12 17:10:49,547 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-12 17:10:49,548 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-12 17:10:49,548 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-12 17:10:49,548 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-12 17:10:49,548 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-12 17:10:49,548 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-12 17:10:49,548 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-12 17:10:49,548 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-12 17:10:49,548 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-12 17:10:49,548 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-12 17:10:49,548 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-12 17:10:49,549 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-12 17:10:49,549 INFO L128 BoogieDeclarations]: Found specification of procedure aligned_alloc [2018-04-12 17:10:49,549 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-12 17:10:49,549 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-12 17:10:49,549 INFO L128 BoogieDeclarations]: Found specification of procedure at_quick_exit [2018-04-12 17:10:49,549 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-12 17:10:49,549 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-12 17:10:49,549 INFO L128 BoogieDeclarations]: Found specification of procedure quick_exit [2018-04-12 17:10:49,549 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-12 17:10:49,549 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-12 17:10:49,549 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-12 17:10:49,550 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-12 17:10:49,550 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-12 17:10:49,550 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-12 17:10:49,550 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-12 17:10:49,550 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-12 17:10:49,550 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-12 17:10:49,550 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-12 17:10:49,550 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-12 17:10:49,550 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-12 17:10:49,550 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-12 17:10:49,550 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-12 17:10:49,551 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-12 17:10:49,551 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-12 17:10:49,551 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-12 17:10:49,551 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-12 17:10:49,551 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-12 17:10:49,551 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-12 17:10:49,551 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-12 17:10:49,551 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-12 17:10:49,551 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-12 17:10:49,551 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-12 17:10:49,552 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-12 17:10:49,552 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-12 17:10:49,552 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-12 17:10:49,552 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-12 17:10:49,552 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-12 17:10:49,552 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-12 17:10:49,552 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-12 17:10:49,552 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-12 17:10:49,552 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-12 17:10:49,552 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-12 17:10:49,552 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-12 17:10:49,553 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-12 17:10:49,553 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-12 17:10:49,553 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-12 17:10:49,553 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-12 17:10:49,553 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-04-12 17:10:49,553 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-12 17:10:49,553 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-12 17:10:49,553 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-04-12 17:10:49,553 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-12 17:10:49,553 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-04-12 17:10:49,554 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-12 17:10:49,554 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-12 17:10:49,554 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-12 17:10:49,554 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-12 17:10:49,554 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-12 17:10:49,910 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-12 17:10:49,910 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 05:10:49 BoogieIcfgContainer [2018-04-12 17:10:49,911 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-12 17:10:49,911 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-12 17:10:49,911 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-12 17:10:49,913 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-12 17:10:49,913 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.04 05:10:49" (1/3) ... [2018-04-12 17:10:49,913 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@27b6e457 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 05:10:49, skipping insertion in model container [2018-04-12 17:10:49,913 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:49" (2/3) ... [2018-04-12 17:10:49,913 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@27b6e457 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 05:10:49, skipping insertion in model container [2018-04-12 17:10:49,913 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 05:10:49" (3/3) ... [2018-04-12 17:10:49,914 INFO L107 eAbstractionObserver]: Analyzing ICFG sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:49,919 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-12 17:10:49,924 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 43 error locations. [2018-04-12 17:10:49,945 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-12 17:10:49,946 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-12 17:10:49,946 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-12 17:10:49,946 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-12 17:10:49,946 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-12 17:10:49,946 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-12 17:10:49,946 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-12 17:10:49,946 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-12 17:10:49,946 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-12 17:10:49,947 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-12 17:10:49,955 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states. [2018-04-12 17:10:49,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-04-12 17:10:49,961 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:49,962 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:49,962 INFO L408 AbstractCegarLoop]: === Iteration 1 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:49,965 INFO L82 PathProgramCache]: Analyzing trace with hash -1982669053, now seen corresponding path program 1 times [2018-04-12 17:10:49,966 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:49,966 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:49,998 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:49,998 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:49,998 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:50,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:50,030 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:50,068 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:50,069 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:50,069 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 17:10:50,070 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 17:10:50,078 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 17:10:50,078 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 17:10:50,079 INFO L87 Difference]: Start difference. First operand 111 states. Second operand 4 states. [2018-04-12 17:10:50,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:50,252 INFO L93 Difference]: Finished difference Result 156 states and 166 transitions. [2018-04-12 17:10:50,252 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 17:10:50,253 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 8 [2018-04-12 17:10:50,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:50,262 INFO L225 Difference]: With dead ends: 156 [2018-04-12 17:10:50,262 INFO L226 Difference]: Without dead ends: 147 [2018-04-12 17:10:50,264 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:50,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-04-12 17:10:50,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 103. [2018-04-12 17:10:50,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-04-12 17:10:50,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 109 transitions. [2018-04-12 17:10:50,297 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 109 transitions. Word has length 8 [2018-04-12 17:10:50,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:50,297 INFO L459 AbstractCegarLoop]: Abstraction has 103 states and 109 transitions. [2018-04-12 17:10:50,297 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 17:10:50,297 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 109 transitions. [2018-04-12 17:10:50,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-04-12 17:10:50,298 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:50,298 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:50,298 INFO L408 AbstractCegarLoop]: === Iteration 2 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:50,298 INFO L82 PathProgramCache]: Analyzing trace with hash -1982669052, now seen corresponding path program 1 times [2018-04-12 17:10:50,298 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:50,299 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:50,300 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:50,300 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:50,300 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:50,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:50,312 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:50,345 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:50,345 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:50,345 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 17:10:50,346 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 17:10:50,346 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 17:10:50,347 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 17:10:50,347 INFO L87 Difference]: Start difference. First operand 103 states and 109 transitions. Second operand 4 states. [2018-04-12 17:10:50,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:50,475 INFO L93 Difference]: Finished difference Result 131 states and 139 transitions. [2018-04-12 17:10:50,475 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 17:10:50,475 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 8 [2018-04-12 17:10:50,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:50,476 INFO L225 Difference]: With dead ends: 131 [2018-04-12 17:10:50,476 INFO L226 Difference]: Without dead ends: 131 [2018-04-12 17:10:50,477 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:50,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-04-12 17:10:50,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 101. [2018-04-12 17:10:50,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-04-12 17:10:50,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 107 transitions. [2018-04-12 17:10:50,483 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 107 transitions. Word has length 8 [2018-04-12 17:10:50,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:50,483 INFO L459 AbstractCegarLoop]: Abstraction has 101 states and 107 transitions. [2018-04-12 17:10:50,483 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 17:10:50,484 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 107 transitions. [2018-04-12 17:10:50,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-04-12 17:10:50,484 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:50,484 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:50,484 INFO L408 AbstractCegarLoop]: === Iteration 3 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:50,484 INFO L82 PathProgramCache]: Analyzing trace with hash -1611689904, now seen corresponding path program 1 times [2018-04-12 17:10:50,484 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:50,485 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:50,486 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:50,486 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:50,486 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:50,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:50,502 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:50,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:50,533 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:50,533 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 17:10:50,533 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 17:10:50,533 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 17:10:50,533 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 17:10:50,533 INFO L87 Difference]: Start difference. First operand 101 states and 107 transitions. Second operand 4 states. [2018-04-12 17:10:50,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:50,626 INFO L93 Difference]: Finished difference Result 107 states and 113 transitions. [2018-04-12 17:10:50,626 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 17:10:50,626 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-04-12 17:10:50,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:50,627 INFO L225 Difference]: With dead ends: 107 [2018-04-12 17:10:50,627 INFO L226 Difference]: Without dead ends: 107 [2018-04-12 17:10:50,627 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:50,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-04-12 17:10:50,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 99. [2018-04-12 17:10:50,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-04-12 17:10:50,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 110 transitions. [2018-04-12 17:10:50,632 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 110 transitions. Word has length 15 [2018-04-12 17:10:50,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:50,633 INFO L459 AbstractCegarLoop]: Abstraction has 99 states and 110 transitions. [2018-04-12 17:10:50,633 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 17:10:50,633 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 110 transitions. [2018-04-12 17:10:50,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-04-12 17:10:50,633 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:50,633 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:50,633 INFO L408 AbstractCegarLoop]: === Iteration 4 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:50,634 INFO L82 PathProgramCache]: Analyzing trace with hash -1611689903, now seen corresponding path program 1 times [2018-04-12 17:10:50,634 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:50,634 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:50,635 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:50,635 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:50,635 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:50,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:50,647 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:50,690 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:50,691 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:50,691 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 17:10:50,691 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 17:10:50,691 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 17:10:50,691 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:50,691 INFO L87 Difference]: Start difference. First operand 99 states and 110 transitions. Second operand 5 states. [2018-04-12 17:10:50,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:50,870 INFO L93 Difference]: Finished difference Result 165 states and 182 transitions. [2018-04-12 17:10:50,870 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 17:10:50,870 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 15 [2018-04-12 17:10:50,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:50,871 INFO L225 Difference]: With dead ends: 165 [2018-04-12 17:10:50,871 INFO L226 Difference]: Without dead ends: 165 [2018-04-12 17:10:50,871 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-12 17:10:50,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-04-12 17:10:50,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 139. [2018-04-12 17:10:50,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-04-12 17:10:50,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 163 transitions. [2018-04-12 17:10:50,876 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 163 transitions. Word has length 15 [2018-04-12 17:10:50,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:50,876 INFO L459 AbstractCegarLoop]: Abstraction has 139 states and 163 transitions. [2018-04-12 17:10:50,876 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 17:10:50,876 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 163 transitions. [2018-04-12 17:10:50,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-04-12 17:10:50,878 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:50,878 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:50,878 INFO L408 AbstractCegarLoop]: === Iteration 5 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:50,879 INFO L82 PathProgramCache]: Analyzing trace with hash -455507554, now seen corresponding path program 1 times [2018-04-12 17:10:50,879 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:50,879 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:50,880 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:50,880 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:50,880 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:50,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:50,889 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:50,911 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:50,911 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:50,911 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 17:10:50,911 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 17:10:50,911 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 17:10:50,911 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 17:10:50,912 INFO L87 Difference]: Start difference. First operand 139 states and 163 transitions. Second operand 4 states. [2018-04-12 17:10:51,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:51,005 INFO L93 Difference]: Finished difference Result 156 states and 171 transitions. [2018-04-12 17:10:51,005 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 17:10:51,005 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2018-04-12 17:10:51,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:51,006 INFO L225 Difference]: With dead ends: 156 [2018-04-12 17:10:51,006 INFO L226 Difference]: Without dead ends: 156 [2018-04-12 17:10:51,006 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:51,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-04-12 17:10:51,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 138. [2018-04-12 17:10:51,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-04-12 17:10:51,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 162 transitions. [2018-04-12 17:10:51,011 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 162 transitions. Word has length 18 [2018-04-12 17:10:51,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:51,011 INFO L459 AbstractCegarLoop]: Abstraction has 138 states and 162 transitions. [2018-04-12 17:10:51,011 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 17:10:51,011 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 162 transitions. [2018-04-12 17:10:51,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-04-12 17:10:51,011 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:51,011 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:51,011 INFO L408 AbstractCegarLoop]: === Iteration 6 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:51,011 INFO L82 PathProgramCache]: Analyzing trace with hash -455507553, now seen corresponding path program 1 times [2018-04-12 17:10:51,011 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:51,011 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:51,012 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:51,012 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:51,012 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:51,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:51,018 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:51,038 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:51,038 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:51,039 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 17:10:51,039 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 17:10:51,039 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 17:10:51,039 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 17:10:51,039 INFO L87 Difference]: Start difference. First operand 138 states and 162 transitions. Second operand 4 states. [2018-04-12 17:10:51,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:51,102 INFO L93 Difference]: Finished difference Result 158 states and 175 transitions. [2018-04-12 17:10:51,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 17:10:51,102 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2018-04-12 17:10:51,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:51,103 INFO L225 Difference]: With dead ends: 158 [2018-04-12 17:10:51,103 INFO L226 Difference]: Without dead ends: 158 [2018-04-12 17:10:51,103 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:51,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-04-12 17:10:51,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 136. [2018-04-12 17:10:51,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-04-12 17:10:51,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 160 transitions. [2018-04-12 17:10:51,108 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 160 transitions. Word has length 18 [2018-04-12 17:10:51,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:51,108 INFO L459 AbstractCegarLoop]: Abstraction has 136 states and 160 transitions. [2018-04-12 17:10:51,109 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 17:10:51,109 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 160 transitions. [2018-04-12 17:10:51,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-04-12 17:10:51,109 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:51,109 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:51,109 INFO L408 AbstractCegarLoop]: === Iteration 7 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:51,109 INFO L82 PathProgramCache]: Analyzing trace with hash -414531954, now seen corresponding path program 1 times [2018-04-12 17:10:51,110 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:51,110 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:51,111 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:51,111 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:51,111 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:51,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:51,120 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:51,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:51,154 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:51,154 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 17:10:51,155 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 17:10:51,155 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 17:10:51,155 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-12 17:10:51,155 INFO L87 Difference]: Start difference. First operand 136 states and 160 transitions. Second operand 6 states. [2018-04-12 17:10:51,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:51,343 INFO L93 Difference]: Finished difference Result 239 states and 285 transitions. [2018-04-12 17:10:51,343 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 17:10:51,343 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-04-12 17:10:51,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:51,344 INFO L225 Difference]: With dead ends: 239 [2018-04-12 17:10:51,344 INFO L226 Difference]: Without dead ends: 239 [2018-04-12 17:10:51,344 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2018-04-12 17:10:51,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2018-04-12 17:10:51,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 126. [2018-04-12 17:10:51,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-12 17:10:51,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 149 transitions. [2018-04-12 17:10:51,348 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 149 transitions. Word has length 18 [2018-04-12 17:10:51,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:51,348 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 149 transitions. [2018-04-12 17:10:51,348 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 17:10:51,348 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 149 transitions. [2018-04-12 17:10:51,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-04-12 17:10:51,349 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:51,349 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:51,349 INFO L408 AbstractCegarLoop]: === Iteration 8 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:51,349 INFO L82 PathProgramCache]: Analyzing trace with hash -414531955, now seen corresponding path program 1 times [2018-04-12 17:10:51,349 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:51,349 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:51,350 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:51,350 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:51,350 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:51,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:51,358 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:51,388 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:51,388 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:51,388 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 17:10:51,388 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 17:10:51,388 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 17:10:51,389 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-12 17:10:51,389 INFO L87 Difference]: Start difference. First operand 126 states and 149 transitions. Second operand 6 states. [2018-04-12 17:10:51,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:51,539 INFO L93 Difference]: Finished difference Result 228 states and 271 transitions. [2018-04-12 17:10:51,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 17:10:51,539 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-04-12 17:10:51,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:51,540 INFO L225 Difference]: With dead ends: 228 [2018-04-12 17:10:51,540 INFO L226 Difference]: Without dead ends: 228 [2018-04-12 17:10:51,540 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-04-12 17:10:51,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states. [2018-04-12 17:10:51,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 125. [2018-04-12 17:10:51,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-12 17:10:51,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 148 transitions. [2018-04-12 17:10:51,543 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 148 transitions. Word has length 18 [2018-04-12 17:10:51,543 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:51,543 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 148 transitions. [2018-04-12 17:10:51,543 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 17:10:51,543 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 148 transitions. [2018-04-12 17:10:51,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-12 17:10:51,544 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:51,544 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:51,544 INFO L408 AbstractCegarLoop]: === Iteration 9 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:51,544 INFO L82 PathProgramCache]: Analyzing trace with hash -1233727545, now seen corresponding path program 1 times [2018-04-12 17:10:51,544 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:51,544 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:51,545 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:51,545 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:51,545 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:51,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:51,550 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:51,585 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:51,585 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:51,585 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 17:10:51,585 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 17:10:51,586 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 17:10:51,586 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:51,586 INFO L87 Difference]: Start difference. First operand 125 states and 148 transitions. Second operand 5 states. [2018-04-12 17:10:51,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:51,663 INFO L93 Difference]: Finished difference Result 143 states and 168 transitions. [2018-04-12 17:10:51,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 17:10:51,664 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23 [2018-04-12 17:10:51,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:51,664 INFO L225 Difference]: With dead ends: 143 [2018-04-12 17:10:51,664 INFO L226 Difference]: Without dead ends: 143 [2018-04-12 17:10:51,665 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-12 17:10:51,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-04-12 17:10:51,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 133. [2018-04-12 17:10:51,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-04-12 17:10:51,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 158 transitions. [2018-04-12 17:10:51,667 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 158 transitions. Word has length 23 [2018-04-12 17:10:51,668 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:51,668 INFO L459 AbstractCegarLoop]: Abstraction has 133 states and 158 transitions. [2018-04-12 17:10:51,668 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 17:10:51,668 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 158 transitions. [2018-04-12 17:10:51,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-12 17:10:51,669 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:51,669 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:51,669 INFO L408 AbstractCegarLoop]: === Iteration 10 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:51,669 INFO L82 PathProgramCache]: Analyzing trace with hash 1788148930, now seen corresponding path program 1 times [2018-04-12 17:10:51,669 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:51,669 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:51,670 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:51,670 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:51,670 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:51,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:51,679 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:51,725 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:51,725 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:51,725 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 17:10:51,726 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 17:10:51,726 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 17:10:51,726 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:51,726 INFO L87 Difference]: Start difference. First operand 133 states and 158 transitions. Second operand 5 states. [2018-04-12 17:10:51,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:51,866 INFO L93 Difference]: Finished difference Result 169 states and 184 transitions. [2018-04-12 17:10:51,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 17:10:51,867 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23 [2018-04-12 17:10:51,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:51,867 INFO L225 Difference]: With dead ends: 169 [2018-04-12 17:10:51,867 INFO L226 Difference]: Without dead ends: 169 [2018-04-12 17:10:51,867 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-04-12 17:10:51,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-04-12 17:10:51,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 111. [2018-04-12 17:10:51,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-04-12 17:10:51,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 123 transitions. [2018-04-12 17:10:51,870 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 123 transitions. Word has length 23 [2018-04-12 17:10:51,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:51,870 INFO L459 AbstractCegarLoop]: Abstraction has 111 states and 123 transitions. [2018-04-12 17:10:51,870 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 17:10:51,870 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 123 transitions. [2018-04-12 17:10:51,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-04-12 17:10:51,871 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:51,871 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:51,871 INFO L408 AbstractCegarLoop]: === Iteration 11 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:51,871 INFO L82 PathProgramCache]: Analyzing trace with hash 1692504881, now seen corresponding path program 1 times [2018-04-12 17:10:51,872 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:51,872 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:51,873 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:51,873 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:51,873 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:51,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:51,882 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:51,936 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:51,936 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:10:51,936 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:10:51,943 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:51,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:51,966 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:10:51,999 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-12 17:10:51,999 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,002 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,002 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-12 17:10:52,016 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:10:52,023 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:10:52,023 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,024 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,027 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,028 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:22, output treesize:15 [2018-04-12 17:10:52,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-04-12 17:10:52,049 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-04-12 17:10:52,049 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,050 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,054 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:10:52,054 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:22, output treesize:11 [2018-04-12 17:10:52,063 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:52,081 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:10:52,081 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 12 [2018-04-12 17:10:52,081 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-04-12 17:10:52,082 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-04-12 17:10:52,082 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2018-04-12 17:10:52,082 INFO L87 Difference]: Start difference. First operand 111 states and 123 transitions. Second operand 13 states. [2018-04-12 17:10:52,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:52,369 INFO L93 Difference]: Finished difference Result 155 states and 169 transitions. [2018-04-12 17:10:52,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-12 17:10:52,370 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 28 [2018-04-12 17:10:52,370 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:52,371 INFO L225 Difference]: With dead ends: 155 [2018-04-12 17:10:52,371 INFO L226 Difference]: Without dead ends: 155 [2018-04-12 17:10:52,371 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 25 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=111, Invalid=231, Unknown=0, NotChecked=0, Total=342 [2018-04-12 17:10:52,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2018-04-12 17:10:52,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 117. [2018-04-12 17:10:52,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-04-12 17:10:52,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 131 transitions. [2018-04-12 17:10:52,376 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 131 transitions. Word has length 28 [2018-04-12 17:10:52,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:52,376 INFO L459 AbstractCegarLoop]: Abstraction has 117 states and 131 transitions. [2018-04-12 17:10:52,376 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-04-12 17:10:52,376 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 131 transitions. [2018-04-12 17:10:52,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-04-12 17:10:52,377 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:52,378 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:52,378 INFO L408 AbstractCegarLoop]: === Iteration 12 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:52,378 INFO L82 PathProgramCache]: Analyzing trace with hash 1692504882, now seen corresponding path program 1 times [2018-04-12 17:10:52,378 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:52,378 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:52,381 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:52,381 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:52,381 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:52,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:52,390 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:52,473 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:52,473 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:10:52,473 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:10:52,485 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:52,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:52,504 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:10:52,509 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 17:10:52,509 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,510 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,511 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-12 17:10:52,548 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 14 [2018-04-12 17:10:52,548 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,555 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,556 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:24, output treesize:19 [2018-04-12 17:10:52,595 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:10:52,597 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:10:52,598 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,599 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,610 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:10:52,613 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:10:52,613 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,615 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,623 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,624 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:41, output treesize:31 [2018-04-12 17:10:52,672 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-04-12 17:10:52,674 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-04-12 17:10:52,675 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,677 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,685 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-04-12 17:10:52,688 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 9 [2018-04-12 17:10:52,688 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,692 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:52,708 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:10:52,708 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:45, output treesize:19 [2018-04-12 17:10:52,749 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:52,778 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:10:52,779 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10] total 17 [2018-04-12 17:10:52,779 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-12 17:10:52,779 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-12 17:10:52,779 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=259, Unknown=0, NotChecked=0, Total=306 [2018-04-12 17:10:52,779 INFO L87 Difference]: Start difference. First operand 117 states and 131 transitions. Second operand 18 states. [2018-04-12 17:10:53,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:53,412 INFO L93 Difference]: Finished difference Result 180 states and 195 transitions. [2018-04-12 17:10:53,412 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-12 17:10:53,412 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 28 [2018-04-12 17:10:53,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:53,414 INFO L225 Difference]: With dead ends: 180 [2018-04-12 17:10:53,415 INFO L226 Difference]: Without dead ends: 180 [2018-04-12 17:10:53,415 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 21 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 110 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=236, Invalid=694, Unknown=0, NotChecked=0, Total=930 [2018-04-12 17:10:53,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-04-12 17:10:53,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 115. [2018-04-12 17:10:53,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-04-12 17:10:53,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 128 transitions. [2018-04-12 17:10:53,419 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 128 transitions. Word has length 28 [2018-04-12 17:10:53,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:53,420 INFO L459 AbstractCegarLoop]: Abstraction has 115 states and 128 transitions. [2018-04-12 17:10:53,420 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-12 17:10:53,420 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 128 transitions. [2018-04-12 17:10:53,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-12 17:10:53,420 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:53,421 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:53,421 INFO L408 AbstractCegarLoop]: === Iteration 13 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:53,421 INFO L82 PathProgramCache]: Analyzing trace with hash 877482672, now seen corresponding path program 1 times [2018-04-12 17:10:53,421 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:53,421 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:53,422 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:53,422 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:53,422 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:53,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:53,429 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:53,494 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:53,495 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:53,495 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-12 17:10:53,495 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 17:10:53,495 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 17:10:53,496 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-04-12 17:10:53,496 INFO L87 Difference]: Start difference. First operand 115 states and 128 transitions. Second operand 10 states. [2018-04-12 17:10:53,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:53,692 INFO L93 Difference]: Finished difference Result 161 states and 177 transitions. [2018-04-12 17:10:53,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-12 17:10:53,692 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 29 [2018-04-12 17:10:53,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:53,693 INFO L225 Difference]: With dead ends: 161 [2018-04-12 17:10:53,693 INFO L226 Difference]: Without dead ends: 161 [2018-04-12 17:10:53,693 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=72, Invalid=138, Unknown=0, NotChecked=0, Total=210 [2018-04-12 17:10:53,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-04-12 17:10:53,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 120. [2018-04-12 17:10:53,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-04-12 17:10:53,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 135 transitions. [2018-04-12 17:10:53,695 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 135 transitions. Word has length 29 [2018-04-12 17:10:53,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:53,696 INFO L459 AbstractCegarLoop]: Abstraction has 120 states and 135 transitions. [2018-04-12 17:10:53,696 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 17:10:53,696 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 135 transitions. [2018-04-12 17:10:53,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-12 17:10:53,697 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:53,697 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:53,697 INFO L408 AbstractCegarLoop]: === Iteration 14 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:53,697 INFO L82 PathProgramCache]: Analyzing trace with hash 877482673, now seen corresponding path program 1 times [2018-04-12 17:10:53,697 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:53,697 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:53,698 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:53,698 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:53,698 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:53,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:53,706 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:53,779 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:53,779 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:53,780 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-12 17:10:53,780 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 17:10:53,780 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 17:10:53,780 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-04-12 17:10:53,780 INFO L87 Difference]: Start difference. First operand 120 states and 135 transitions. Second operand 9 states. [2018-04-12 17:10:54,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:54,015 INFO L93 Difference]: Finished difference Result 185 states and 201 transitions. [2018-04-12 17:10:54,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-12 17:10:54,016 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-04-12 17:10:54,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:54,016 INFO L225 Difference]: With dead ends: 185 [2018-04-12 17:10:54,016 INFO L226 Difference]: Without dead ends: 185 [2018-04-12 17:10:54,016 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=233, Unknown=0, NotChecked=0, Total=306 [2018-04-12 17:10:54,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-04-12 17:10:54,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 122. [2018-04-12 17:10:54,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-04-12 17:10:54,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 136 transitions. [2018-04-12 17:10:54,018 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 136 transitions. Word has length 29 [2018-04-12 17:10:54,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:54,018 INFO L459 AbstractCegarLoop]: Abstraction has 122 states and 136 transitions. [2018-04-12 17:10:54,018 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 17:10:54,018 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 136 transitions. [2018-04-12 17:10:54,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-04-12 17:10:54,019 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:54,019 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:54,019 INFO L408 AbstractCegarLoop]: === Iteration 15 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:54,019 INFO L82 PathProgramCache]: Analyzing trace with hash 221581916, now seen corresponding path program 1 times [2018-04-12 17:10:54,019 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:54,019 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:54,020 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:54,020 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:54,020 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:54,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:54,027 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:54,165 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:54,165 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:54,165 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-12 17:10:54,165 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 17:10:54,165 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 17:10:54,166 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-04-12 17:10:54,166 INFO L87 Difference]: Start difference. First operand 122 states and 136 transitions. Second operand 9 states. [2018-04-12 17:10:54,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:54,369 INFO L93 Difference]: Finished difference Result 199 states and 216 transitions. [2018-04-12 17:10:54,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-12 17:10:54,369 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 32 [2018-04-12 17:10:54,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:54,370 INFO L225 Difference]: With dead ends: 199 [2018-04-12 17:10:54,370 INFO L226 Difference]: Without dead ends: 199 [2018-04-12 17:10:54,370 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=188, Unknown=0, NotChecked=0, Total=272 [2018-04-12 17:10:54,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states. [2018-04-12 17:10:54,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 126. [2018-04-12 17:10:54,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-12 17:10:54,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 140 transitions. [2018-04-12 17:10:54,373 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 140 transitions. Word has length 32 [2018-04-12 17:10:54,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:54,374 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 140 transitions. [2018-04-12 17:10:54,374 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 17:10:54,374 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 140 transitions. [2018-04-12 17:10:54,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-04-12 17:10:54,374 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:54,374 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:54,375 INFO L408 AbstractCegarLoop]: === Iteration 16 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:54,375 INFO L82 PathProgramCache]: Analyzing trace with hash -1146002921, now seen corresponding path program 1 times [2018-04-12 17:10:54,375 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:54,375 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:54,376 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:54,376 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:54,376 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:54,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:54,384 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:54,457 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:54,457 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:10:54,458 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:10:54,463 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:54,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:54,475 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:10:54,482 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:54,483 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:54,484 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-04-12 17:10:54,484 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:54,490 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:54,490 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:23, output treesize:21 [2018-04-12 17:10:54,506 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:10:54,507 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:10:54,508 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:54,511 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:54,515 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:54,516 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:29 [2018-04-12 17:10:54,558 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2018-04-12 17:10:54,560 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-12 17:10:54,560 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:54,563 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:54,566 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:10:54,566 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:42, output treesize:34 [2018-04-12 17:10:54,611 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 24 [2018-04-12 17:10:54,613 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-04-12 17:10:54,613 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:54,617 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-12 17:10:54,617 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:54,619 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:54,622 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:10:54,622 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:41, output treesize:15 [2018-04-12 17:10:54,659 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:54,677 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:10:54,677 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11] total 20 [2018-04-12 17:10:54,677 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-04-12 17:10:54,677 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-04-12 17:10:54,677 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=348, Unknown=0, NotChecked=0, Total=420 [2018-04-12 17:10:54,678 INFO L87 Difference]: Start difference. First operand 126 states and 140 transitions. Second operand 21 states. [2018-04-12 17:10:55,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:55,387 INFO L93 Difference]: Finished difference Result 230 states and 253 transitions. [2018-04-12 17:10:55,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-04-12 17:10:55,387 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 32 [2018-04-12 17:10:55,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:55,388 INFO L225 Difference]: With dead ends: 230 [2018-04-12 17:10:55,388 INFO L226 Difference]: Without dead ends: 230 [2018-04-12 17:10:55,388 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 23 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 271 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=283, Invalid=977, Unknown=0, NotChecked=0, Total=1260 [2018-04-12 17:10:55,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2018-04-12 17:10:55,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 145. [2018-04-12 17:10:55,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-04-12 17:10:55,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 164 transitions. [2018-04-12 17:10:55,390 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 164 transitions. Word has length 32 [2018-04-12 17:10:55,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:55,390 INFO L459 AbstractCegarLoop]: Abstraction has 145 states and 164 transitions. [2018-04-12 17:10:55,390 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-04-12 17:10:55,390 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 164 transitions. [2018-04-12 17:10:55,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-04-12 17:10:55,391 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:55,391 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:55,391 INFO L408 AbstractCegarLoop]: === Iteration 17 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:55,391 INFO L82 PathProgramCache]: Analyzing trace with hash -1146002920, now seen corresponding path program 1 times [2018-04-12 17:10:55,391 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:55,391 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:55,392 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:55,392 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:55,392 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:55,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:55,399 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:55,489 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:55,490 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:10:55,490 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:10:55,495 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:55,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:55,510 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:10:55,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 17:10:55,517 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:55,529 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:55,530 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:55,530 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 17:10:55,530 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:55,536 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:55,536 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:26, output treesize:19 [2018-04-12 17:10:55,548 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:10:55,549 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:10:55,550 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:55,568 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:55,577 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:10:55,578 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:10:55,578 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:55,580 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:55,585 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:55,585 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:38, output treesize:31 [2018-04-12 17:10:55,622 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-04-12 17:10:55,623 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-12 17:10:55,623 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:55,626 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:55,637 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 44 [2018-04-12 17:10:55,639 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-12 17:10:55,639 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:55,644 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:55,659 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:10:55,659 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:63, output treesize:47 [2018-04-12 17:10:55,718 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 33 [2018-04-12 17:10:55,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 17 [2018-04-12 17:10:55,721 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:55,726 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-12 17:10:55,726 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:55,729 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:55,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2018-04-12 17:10:55,735 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 17:10:55,735 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:55,740 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-12 17:10:55,740 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:55,741 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:55,743 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:55,743 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:61, output treesize:9 [2018-04-12 17:10:55,757 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:55,775 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:10:55,775 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 16 [2018-04-12 17:10:55,775 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-12 17:10:55,775 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-12 17:10:55,775 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=228, Unknown=0, NotChecked=0, Total=272 [2018-04-12 17:10:55,775 INFO L87 Difference]: Start difference. First operand 145 states and 164 transitions. Second operand 17 states. [2018-04-12 17:10:56,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:56,220 INFO L93 Difference]: Finished difference Result 226 states and 251 transitions. [2018-04-12 17:10:56,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-12 17:10:56,220 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 32 [2018-04-12 17:10:56,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:56,221 INFO L225 Difference]: With dead ends: 226 [2018-04-12 17:10:56,221 INFO L226 Difference]: Without dead ends: 226 [2018-04-12 17:10:56,221 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 23 SyntacticMatches, 5 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 148 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=149, Invalid=663, Unknown=0, NotChecked=0, Total=812 [2018-04-12 17:10:56,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2018-04-12 17:10:56,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 153. [2018-04-12 17:10:56,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-04-12 17:10:56,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 173 transitions. [2018-04-12 17:10:56,223 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 173 transitions. Word has length 32 [2018-04-12 17:10:56,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:56,223 INFO L459 AbstractCegarLoop]: Abstraction has 153 states and 173 transitions. [2018-04-12 17:10:56,223 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-12 17:10:56,223 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 173 transitions. [2018-04-12 17:10:56,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-04-12 17:10:56,224 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:56,224 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:56,224 INFO L408 AbstractCegarLoop]: === Iteration 18 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:56,224 INFO L82 PathProgramCache]: Analyzing trace with hash -1771456283, now seen corresponding path program 1 times [2018-04-12 17:10:56,224 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:56,224 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:56,225 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:56,225 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:56,225 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:56,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:56,230 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:56,303 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:56,303 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:56,303 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-04-12 17:10:56,303 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-12 17:10:56,304 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-12 17:10:56,304 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-04-12 17:10:56,304 INFO L87 Difference]: Start difference. First operand 153 states and 173 transitions. Second operand 11 states. [2018-04-12 17:10:56,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:56,529 INFO L93 Difference]: Finished difference Result 199 states and 219 transitions. [2018-04-12 17:10:56,529 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-12 17:10:56,529 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 33 [2018-04-12 17:10:56,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:56,530 INFO L225 Difference]: With dead ends: 199 [2018-04-12 17:10:56,530 INFO L226 Difference]: Without dead ends: 199 [2018-04-12 17:10:56,530 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=234, Unknown=0, NotChecked=0, Total=306 [2018-04-12 17:10:56,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states. [2018-04-12 17:10:56,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 167. [2018-04-12 17:10:56,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-04-12 17:10:56,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 187 transitions. [2018-04-12 17:10:56,532 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 187 transitions. Word has length 33 [2018-04-12 17:10:56,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:56,533 INFO L459 AbstractCegarLoop]: Abstraction has 167 states and 187 transitions. [2018-04-12 17:10:56,533 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-12 17:10:56,533 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 187 transitions. [2018-04-12 17:10:56,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-04-12 17:10:56,533 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:56,533 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:56,533 INFO L408 AbstractCegarLoop]: === Iteration 19 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:56,533 INFO L82 PathProgramCache]: Analyzing trace with hash -776317895, now seen corresponding path program 1 times [2018-04-12 17:10:56,533 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:56,533 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:56,534 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:56,534 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:56,534 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:56,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:56,538 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:56,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:56,584 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:56,584 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-12 17:10:56,584 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 17:10:56,584 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 17:10:56,584 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-04-12 17:10:56,584 INFO L87 Difference]: Start difference. First operand 167 states and 187 transitions. Second operand 8 states. [2018-04-12 17:10:56,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:56,745 INFO L93 Difference]: Finished difference Result 222 states and 243 transitions. [2018-04-12 17:10:56,745 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-12 17:10:56,746 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2018-04-12 17:10:56,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:56,746 INFO L225 Difference]: With dead ends: 222 [2018-04-12 17:10:56,746 INFO L226 Difference]: Without dead ends: 222 [2018-04-12 17:10:56,746 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2018-04-12 17:10:56,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-04-12 17:10:56,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 188. [2018-04-12 17:10:56,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-04-12 17:10:56,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 217 transitions. [2018-04-12 17:10:56,750 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 217 transitions. Word has length 33 [2018-04-12 17:10:56,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:56,750 INFO L459 AbstractCegarLoop]: Abstraction has 188 states and 217 transitions. [2018-04-12 17:10:56,750 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 17:10:56,750 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 217 transitions. [2018-04-12 17:10:56,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-04-12 17:10:56,751 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:56,751 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:56,751 INFO L408 AbstractCegarLoop]: === Iteration 20 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:56,751 INFO L82 PathProgramCache]: Analyzing trace with hash -1339981119, now seen corresponding path program 2 times [2018-04-12 17:10:56,751 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:56,751 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:56,752 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:56,752 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:56,752 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:56,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:56,774 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:56,879 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-12 17:10:56,879 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:56,879 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-04-12 17:10:56,879 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 17:10:56,879 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 17:10:56,880 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2018-04-12 17:10:56,880 INFO L87 Difference]: Start difference. First operand 188 states and 217 transitions. Second operand 10 states. [2018-04-12 17:10:57,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:57,081 INFO L93 Difference]: Finished difference Result 196 states and 214 transitions. [2018-04-12 17:10:57,081 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-12 17:10:57,081 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 33 [2018-04-12 17:10:57,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:57,082 INFO L225 Difference]: With dead ends: 196 [2018-04-12 17:10:57,082 INFO L226 Difference]: Without dead ends: 196 [2018-04-12 17:10:57,082 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=127, Invalid=253, Unknown=0, NotChecked=0, Total=380 [2018-04-12 17:10:57,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-04-12 17:10:57,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 174. [2018-04-12 17:10:57,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-04-12 17:10:57,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 196 transitions. [2018-04-12 17:10:57,086 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 196 transitions. Word has length 33 [2018-04-12 17:10:57,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:57,086 INFO L459 AbstractCegarLoop]: Abstraction has 174 states and 196 transitions. [2018-04-12 17:10:57,086 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 17:10:57,086 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 196 transitions. [2018-04-12 17:10:57,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-04-12 17:10:57,087 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:57,087 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:57,087 INFO L408 AbstractCegarLoop]: === Iteration 21 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:57,087 INFO L82 PathProgramCache]: Analyzing trace with hash -23783762, now seen corresponding path program 1 times [2018-04-12 17:10:57,087 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:57,087 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:57,088 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:57,088 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 17:10:57,088 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:57,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:57,094 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:57,192 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:57,192 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:10:57,192 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:10:57,198 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:57,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:57,212 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:10:57,216 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:10:57,217 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:10:57,217 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:57,218 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:57,225 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:10:57,226 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:10:57,226 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:57,230 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:57,234 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:57,234 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:28, output treesize:20 [2018-04-12 17:10:57,239 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:57,240 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:57,240 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 17:10:57,241 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:57,244 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:57,244 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:25, output treesize:19 [2018-04-12 17:10:57,252 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-04-12 17:10:57,255 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:10:57,255 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:57,259 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:57,268 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 24 [2018-04-12 17:10:57,269 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:10:57,269 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:57,273 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:57,278 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:57,278 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:41, output treesize:39 [2018-04-12 17:10:57,340 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-04-12 17:10:57,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2018-04-12 17:10:57,342 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:57,348 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-12 17:10:57,348 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:10:57,353 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:10:57,359 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-12 17:10:57,361 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-12 17:10:57,361 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:57,364 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:57,366 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:57,367 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:69, output treesize:7 [2018-04-12 17:10:57,383 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:57,406 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:10:57,406 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 15 [2018-04-12 17:10:57,407 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-04-12 17:10:57,407 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-04-12 17:10:57,407 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=170, Unknown=9, NotChecked=0, Total=210 [2018-04-12 17:10:57,407 INFO L87 Difference]: Start difference. First operand 174 states and 196 transitions. Second operand 15 states. [2018-04-12 17:10:57,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:57,810 INFO L93 Difference]: Finished difference Result 213 states and 235 transitions. [2018-04-12 17:10:57,810 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-12 17:10:57,810 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 35 [2018-04-12 17:10:57,810 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:57,811 INFO L225 Difference]: With dead ends: 213 [2018-04-12 17:10:57,811 INFO L226 Difference]: Without dead ends: 213 [2018-04-12 17:10:57,811 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 29 SyntacticMatches, 5 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=97, Invalid=492, Unknown=11, NotChecked=0, Total=600 [2018-04-12 17:10:57,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-04-12 17:10:57,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 193. [2018-04-12 17:10:57,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193 states. [2018-04-12 17:10:57,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 215 transitions. [2018-04-12 17:10:57,814 INFO L78 Accepts]: Start accepts. Automaton has 193 states and 215 transitions. Word has length 35 [2018-04-12 17:10:57,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:57,814 INFO L459 AbstractCegarLoop]: Abstraction has 193 states and 215 transitions. [2018-04-12 17:10:57,815 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-04-12 17:10:57,815 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 215 transitions. [2018-04-12 17:10:57,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-04-12 17:10:57,815 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:57,815 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:57,815 INFO L408 AbstractCegarLoop]: === Iteration 22 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:57,816 INFO L82 PathProgramCache]: Analyzing trace with hash -1777126719, now seen corresponding path program 2 times [2018-04-12 17:10:57,816 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:57,816 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:57,817 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:57,817 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:57,817 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:57,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:57,824 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:57,962 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 7 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:57,963 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:10:57,963 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:10:57,973 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-12 17:10:57,998 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-12 17:10:57,998 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 17:10:58,001 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:10:58,073 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:58,074 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:58,074 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 17:10:58,074 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:58,078 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:58,078 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:23, output treesize:17 [2018-04-12 17:10:58,093 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:10:58,094 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:10:58,094 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:58,095 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:58,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:10:58,102 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:10:58,103 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:58,104 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:58,108 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:58,108 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:36, output treesize:25 [2018-04-12 17:10:58,166 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51 [2018-04-12 17:10:58,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-04-12 17:10:58,168 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:58,171 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:58,180 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 47 [2018-04-12 17:10:58,182 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-04-12 17:10:58,182 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:58,186 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:58,190 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:58,190 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:65, output treesize:49 [2018-04-12 17:10:58,268 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-04-12 17:10:58,276 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-12 17:10:58,276 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:10:58,283 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 17:10:58,283 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:58,287 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:10:58,318 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 29 [2018-04-12 17:10:58,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 14 [2018-04-12 17:10:58,319 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:58,324 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2018-04-12 17:10:58,324 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:58,326 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:58,329 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:58,329 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:76, output treesize:7 [2018-04-12 17:10:58,339 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 7 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:58,356 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:10:58,356 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 15] total 25 [2018-04-12 17:10:58,356 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-04-12 17:10:58,356 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-04-12 17:10:58,356 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=530, Unknown=3, NotChecked=0, Total=600 [2018-04-12 17:10:58,356 INFO L87 Difference]: Start difference. First operand 193 states and 215 transitions. Second operand 25 states. [2018-04-12 17:10:58,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:58,908 INFO L93 Difference]: Finished difference Result 222 states and 238 transitions. [2018-04-12 17:10:58,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-04-12 17:10:58,909 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 38 [2018-04-12 17:10:58,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:58,910 INFO L225 Difference]: With dead ends: 222 [2018-04-12 17:10:58,910 INFO L226 Difference]: Without dead ends: 222 [2018-04-12 17:10:58,910 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 27 SyntacticMatches, 3 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 225 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=252, Invalid=1226, Unknown=4, NotChecked=0, Total=1482 [2018-04-12 17:10:58,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-04-12 17:10:58,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 192. [2018-04-12 17:10:58,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2018-04-12 17:10:58,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 212 transitions. [2018-04-12 17:10:58,913 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 212 transitions. Word has length 38 [2018-04-12 17:10:58,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:58,913 INFO L459 AbstractCegarLoop]: Abstraction has 192 states and 212 transitions. [2018-04-12 17:10:58,913 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-04-12 17:10:58,914 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 212 transitions. [2018-04-12 17:10:58,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-04-12 17:10:58,914 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:58,914 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:58,914 INFO L408 AbstractCegarLoop]: === Iteration 23 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:58,915 INFO L82 PathProgramCache]: Analyzing trace with hash -362550985, now seen corresponding path program 1 times [2018-04-12 17:10:58,915 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:58,915 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:58,915 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:58,916 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 17:10:58,916 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:58,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:58,921 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:58,939 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 17:10:58,939 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:58,939 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 17:10:58,939 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 17:10:58,940 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 17:10:58,940 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:58,940 INFO L87 Difference]: Start difference. First operand 192 states and 212 transitions. Second operand 5 states. [2018-04-12 17:10:59,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:59,015 INFO L93 Difference]: Finished difference Result 218 states and 234 transitions. [2018-04-12 17:10:59,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 17:10:59,015 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 39 [2018-04-12 17:10:59,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:59,016 INFO L225 Difference]: With dead ends: 218 [2018-04-12 17:10:59,016 INFO L226 Difference]: Without dead ends: 218 [2018-04-12 17:10:59,016 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-04-12 17:10:59,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218 states. [2018-04-12 17:10:59,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218 to 181. [2018-04-12 17:10:59,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-04-12 17:10:59,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 196 transitions. [2018-04-12 17:10:59,018 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 196 transitions. Word has length 39 [2018-04-12 17:10:59,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:59,018 INFO L459 AbstractCegarLoop]: Abstraction has 181 states and 196 transitions. [2018-04-12 17:10:59,019 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 17:10:59,019 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 196 transitions. [2018-04-12 17:10:59,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-04-12 17:10:59,019 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:59,019 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:59,019 INFO L408 AbstractCegarLoop]: === Iteration 24 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:10:59,019 INFO L82 PathProgramCache]: Analyzing trace with hash 825125319, now seen corresponding path program 3 times [2018-04-12 17:10:59,020 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:59,020 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:59,020 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:59,021 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:59,021 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:59,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:59,030 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:59,134 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:59,135 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:10:59,135 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:10:59,140 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-12 17:10:59,156 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-04-12 17:10:59,156 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 17:10:59,158 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:10:59,160 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 17:10:59,160 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,161 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,162 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 17:10:59,202 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:59,202 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:59,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 17:10:59,203 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,206 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,206 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:14 [2018-04-12 17:10:59,219 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:10:59,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:10:59,221 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,221 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,226 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,226 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:30, output treesize:23 [2018-04-12 17:10:59,269 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:59,271 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-04-12 17:10:59,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:10:59,273 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,277 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,280 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,280 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:35, output treesize:27 [2018-04-12 17:10:59,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:59,298 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:59,298 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 17:10:59,298 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,303 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,303 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:32, output treesize:26 [2018-04-12 17:10:59,323 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-04-12 17:10:59,324 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 7 [2018-04-12 17:10:59,325 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,327 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,332 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,332 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:42, output treesize:28 [2018-04-12 17:10:59,407 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 57 treesize of output 61 [2018-04-12 17:10:59,409 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 61 [2018-04-12 17:10:59,410 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,428 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 37 treesize of output 45 [2018-04-12 17:10:59,428 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-12 17:10:59,438 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:10:59,449 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-04-12 17:10:59,449 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:60, output treesize:81 [2018-04-12 17:10:59,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 24 [2018-04-12 17:10:59,526 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-04-12 17:10:59,526 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,529 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-12 17:10:59,529 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,531 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,542 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 43 [2018-04-12 17:10:59,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 21 [2018-04-12 17:10:59,544 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,555 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 22 [2018-04-12 17:10:59,555 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-12 17:10:59,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27 [2018-04-12 17:10:59,569 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,579 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 22 [2018-04-12 17:10:59,580 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,589 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2018-04-12 17:10:59,589 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,593 INFO L267 ElimStorePlain]: Start of recursive call 5: 5 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,597 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:59,597 INFO L202 ElimStorePlain]: Needed 10 recursive calls to eliminate 7 variables, input treesize:89, output treesize:5 [2018-04-12 17:10:59,602 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:59,619 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:10:59,619 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17] total 29 [2018-04-12 17:10:59,620 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-04-12 17:10:59,620 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-04-12 17:10:59,620 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=100, Invalid=770, Unknown=0, NotChecked=0, Total=870 [2018-04-12 17:10:59,620 INFO L87 Difference]: Start difference. First operand 181 states and 196 transitions. Second operand 30 states. [2018-04-12 17:11:00,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:11:00,941 INFO L93 Difference]: Finished difference Result 285 states and 307 transitions. [2018-04-12 17:11:00,941 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-04-12 17:11:00,942 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 41 [2018-04-12 17:11:00,942 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:11:00,942 INFO L225 Difference]: With dead ends: 285 [2018-04-12 17:11:00,942 INFO L226 Difference]: Without dead ends: 285 [2018-04-12 17:11:00,943 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 88 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 856 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=575, Invalid=2964, Unknown=1, NotChecked=0, Total=3540 [2018-04-12 17:11:00,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 285 states. [2018-04-12 17:11:00,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 285 to 200. [2018-04-12 17:11:00,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200 states. [2018-04-12 17:11:00,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 220 transitions. [2018-04-12 17:11:00,945 INFO L78 Accepts]: Start accepts. Automaton has 200 states and 220 transitions. Word has length 41 [2018-04-12 17:11:00,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:11:00,945 INFO L459 AbstractCegarLoop]: Abstraction has 200 states and 220 transitions. [2018-04-12 17:11:00,945 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-04-12 17:11:00,945 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 220 transitions. [2018-04-12 17:11:00,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-04-12 17:11:00,946 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:11:00,946 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:11:00,946 INFO L408 AbstractCegarLoop]: === Iteration 25 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:11:00,946 INFO L82 PathProgramCache]: Analyzing trace with hash 825125320, now seen corresponding path program 2 times [2018-04-12 17:11:00,946 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:11:00,946 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:11:00,947 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:11:00,947 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 17:11:00,947 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:11:00,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:11:00,955 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:11:01,094 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:11:01,094 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:11:01,094 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:11:01,099 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-12 17:11:01,112 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-12 17:11:01,112 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 17:11:01,114 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:11:01,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 17:11:01,116 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,118 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,118 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 17:11:01,151 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:11:01,152 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:11:01,152 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 17:11:01,152 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,155 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,156 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:23, output treesize:17 [2018-04-12 17:11:01,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:11:01,172 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:11:01,172 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,173 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,181 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:11:01,182 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:11:01,182 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,183 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,189 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,189 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:41, output treesize:30 [2018-04-12 17:11:01,248 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:11:01,251 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 24 [2018-04-12 17:11:01,252 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-12 17:11:01,252 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,255 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,264 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:11:01,266 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 39 [2018-04-12 17:11:01,267 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:11:01,267 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,272 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,278 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,278 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:56, output treesize:48 [2018-04-12 17:11:01,304 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:11:01,304 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:11:01,304 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 17:11:01,305 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,313 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,313 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:53, output treesize:47 [2018-04-12 17:11:01,386 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 36 [2018-04-12 17:11:01,390 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 11 [2018-04-12 17:11:01,391 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,395 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,483 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 36 [2018-04-12 17:11:01,500 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 7 [2018-04-12 17:11:01,500 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,506 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,517 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,517 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:76, output treesize:40 [2018-04-12 17:11:01,608 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 36 [2018-04-12 17:11:01,610 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-04-12 17:11:01,610 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,617 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,640 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 74 treesize of output 72 [2018-04-12 17:11:01,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 54 treesize of output 58 [2018-04-12 17:11:01,649 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-04-12 17:11:01,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 62 [2018-04-12 17:11:01,677 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,705 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:11:01,739 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-04-12 17:11:01,739 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:99, output treesize:131 [2018-04-12 17:11:01,867 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 1 case distinctions, treesize of input 86 treesize of output 71 [2018-04-12 17:11:01,870 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 59 [2018-04-12 17:11:01,870 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,895 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 50 [2018-04-12 17:11:01,895 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2018-04-12 17:11:01,919 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:11:01,947 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 58 treesize of output 57 [2018-04-12 17:11:01,948 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-12 17:11:01,981 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 40 [2018-04-12 17:11:01,981 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:01,982 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 44 [2018-04-12 17:11:01,983 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:02,011 INFO L267 ElimStorePlain]: Start of recursive call 2: 5 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-12 17:11:02,054 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2018-04-12 17:11:02,056 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-12 17:11:02,056 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:02,063 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 17:11:02,063 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:02,070 INFO L267 ElimStorePlain]: Start of recursive call 9: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:02,072 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2018-04-12 17:11:02,074 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-12 17:11:02,074 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:02,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 17:11:02,082 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:02,088 INFO L267 ElimStorePlain]: Start of recursive call 12: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:02,090 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 34 [2018-04-12 17:11:02,091 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 17:11:02,091 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:02,098 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-12 17:11:02,098 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:02,103 INFO L267 ElimStorePlain]: Start of recursive call 15: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:02,129 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 56 [2018-04-12 17:11:02,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 17:11:02,131 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:02,137 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-12 17:11:02,138 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:02,143 INFO L267 ElimStorePlain]: Start of recursive call 18: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:02,165 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 32 [2018-04-12 17:11:02,167 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-12 17:11:02,167 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:02,172 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 12 [2018-04-12 17:11:02,173 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:02,176 INFO L267 ElimStorePlain]: Start of recursive call 21: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:02,195 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 4 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:02,195 INFO L202 ElimStorePlain]: Needed 23 recursive calls to eliminate 9 variables, input treesize:153, output treesize:9 [2018-04-12 17:11:02,238 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:11:02,257 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:11:02,257 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17] total 31 [2018-04-12 17:11:02,257 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-04-12 17:11:02,257 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-04-12 17:11:02,258 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=897, Unknown=1, NotChecked=0, Total=992 [2018-04-12 17:11:02,258 INFO L87 Difference]: Start difference. First operand 200 states and 220 transitions. Second operand 32 states. [2018-04-12 17:11:04,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:11:04,126 INFO L93 Difference]: Finished difference Result 270 states and 294 transitions. [2018-04-12 17:11:04,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-04-12 17:11:04,126 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 41 [2018-04-12 17:11:04,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:11:04,127 INFO L225 Difference]: With dead ends: 270 [2018-04-12 17:11:04,127 INFO L226 Difference]: Without dead ends: 270 [2018-04-12 17:11:04,128 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 28 SyntacticMatches, 1 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 427 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=366, Invalid=2284, Unknown=2, NotChecked=0, Total=2652 [2018-04-12 17:11:04,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 270 states. [2018-04-12 17:11:04,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 270 to 202. [2018-04-12 17:11:04,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202 states. [2018-04-12 17:11:04,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 223 transitions. [2018-04-12 17:11:04,130 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 223 transitions. Word has length 41 [2018-04-12 17:11:04,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:11:04,130 INFO L459 AbstractCegarLoop]: Abstraction has 202 states and 223 transitions. [2018-04-12 17:11:04,130 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-04-12 17:11:04,130 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 223 transitions. [2018-04-12 17:11:04,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-04-12 17:11:04,130 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:11:04,130 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:11:04,130 INFO L408 AbstractCegarLoop]: === Iteration 26 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:11:04,130 INFO L82 PathProgramCache]: Analyzing trace with hash 309460647, now seen corresponding path program 1 times [2018-04-12 17:11:04,130 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:11:04,131 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:11:04,131 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:11:04,131 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 17:11:04,131 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:11:04,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:11:04,136 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:11:04,185 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:11:04,185 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:11:04,185 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:11:04,191 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:11:04,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:11:04,208 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:11:04,263 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-12 17:11:04,264 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 17:11:04,264 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:04,265 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:04,269 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-12 17:11:04,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 17:11:04,270 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:04,271 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:04,274 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:04,274 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:35, output treesize:13 [2018-04-12 17:11:04,301 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:11:04,302 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:11:04,303 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:04,304 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:04,307 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:11:04,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:11:04,308 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:04,309 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:04,311 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:04,311 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:23, output treesize:15 [2018-04-12 17:11:04,344 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-12 17:11:04,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:11:04,349 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 17:11:04,351 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:11:04,358 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-12 17:11:04,362 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:11:04,362 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-04-12 17:11:04,364 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:11:04,371 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:11:04,371 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:35, output treesize:18 [2018-04-12 17:11:04,404 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:11:04,421 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:11:04,421 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 15] total 21 [2018-04-12 17:11:04,421 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-04-12 17:11:04,421 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-04-12 17:11:04,421 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=373, Unknown=0, NotChecked=0, Total=420 [2018-04-12 17:11:04,422 INFO L87 Difference]: Start difference. First operand 202 states and 223 transitions. Second operand 21 states. [2018-04-12 17:11:05,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:11:05,017 INFO L93 Difference]: Finished difference Result 246 states and 268 transitions. [2018-04-12 17:11:05,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-04-12 17:11:05,017 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 43 [2018-04-12 17:11:05,018 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:11:05,018 INFO L225 Difference]: With dead ends: 246 [2018-04-12 17:11:05,018 INFO L226 Difference]: Without dead ends: 246 [2018-04-12 17:11:05,019 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 37 SyntacticMatches, 1 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 247 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=271, Invalid=1369, Unknown=0, NotChecked=0, Total=1640 [2018-04-12 17:11:05,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-04-12 17:11:05,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 217. [2018-04-12 17:11:05,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 217 states. [2018-04-12 17:11:05,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217 states to 217 states and 239 transitions. [2018-04-12 17:11:05,021 INFO L78 Accepts]: Start accepts. Automaton has 217 states and 239 transitions. Word has length 43 [2018-04-12 17:11:05,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:11:05,021 INFO L459 AbstractCegarLoop]: Abstraction has 217 states and 239 transitions. [2018-04-12 17:11:05,021 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-04-12 17:11:05,021 INFO L276 IsEmpty]: Start isEmpty. Operand 217 states and 239 transitions. [2018-04-12 17:11:05,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-04-12 17:11:05,021 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:11:05,021 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:11:05,021 INFO L408 AbstractCegarLoop]: === Iteration 27 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:11:05,021 INFO L82 PathProgramCache]: Analyzing trace with hash 1398575738, now seen corresponding path program 1 times [2018-04-12 17:11:05,021 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:11:05,022 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:11:05,022 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:11:05,022 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:11:05,022 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:11:05,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:11:05,030 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:11:05,133 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:11:05,134 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:11:05,134 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:11:05,139 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:11:05,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:11:05,153 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:11:05,158 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:11:05,159 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:11:05,159 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-04-12 17:11:05,159 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:05,164 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:05,165 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:23, output treesize:21 [2018-04-12 17:11:05,178 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:11:05,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:11:05,180 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:05,181 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:05,185 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:05,185 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:29 [2018-04-12 17:11:05,223 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2018-04-12 17:11:05,224 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-12 17:11:05,224 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:05,227 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:05,231 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:11:05,231 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:42, output treesize:34 [2018-04-12 17:11:05,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 38 [2018-04-12 17:11:05,275 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 17 [2018-04-12 17:11:05,275 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:05,288 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-12 17:11:05,289 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:05,290 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:05,294 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:05,294 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:47, output treesize:21 [2018-04-12 17:11:05,319 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:11:05,320 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:11:05,321 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:11:05,321 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 34 [2018-04-12 17:11:05,321 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:05,328 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:11:05,328 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:32, output treesize:34 [2018-04-12 17:11:05,348 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:11:05,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:11:05,349 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:05,350 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:05,357 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:11:05,357 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:39, output treesize:40 [2018-04-12 17:11:05,400 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 25 [2018-04-12 17:11:05,401 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 14 [2018-04-12 17:11:05,401 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:05,403 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:05,408 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 17:11:05,408 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:47, output treesize:28 [2018-04-12 17:11:05,455 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:11:05,473 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:11:05,473 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 16] total 27 [2018-04-12 17:11:05,473 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-04-12 17:11:05,473 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-04-12 17:11:05,474 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=112, Invalid=644, Unknown=0, NotChecked=0, Total=756 [2018-04-12 17:11:05,474 INFO L87 Difference]: Start difference. First operand 217 states and 239 transitions. Second operand 28 states. [2018-04-12 17:11:06,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:11:06,866 INFO L93 Difference]: Finished difference Result 360 states and 386 transitions. [2018-04-12 17:11:06,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-04-12 17:11:06,866 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 43 [2018-04-12 17:11:06,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:11:06,867 INFO L225 Difference]: With dead ends: 360 [2018-04-12 17:11:06,867 INFO L226 Difference]: Without dead ends: 360 [2018-04-12 17:11:06,868 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 33 SyntacticMatches, 2 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 811 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=569, Invalid=2623, Unknown=0, NotChecked=0, Total=3192 [2018-04-12 17:11:06,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 360 states. [2018-04-12 17:11:06,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 360 to 232. [2018-04-12 17:11:06,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 232 states. [2018-04-12 17:11:06,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 232 states to 232 states and 256 transitions. [2018-04-12 17:11:06,870 INFO L78 Accepts]: Start accepts. Automaton has 232 states and 256 transitions. Word has length 43 [2018-04-12 17:11:06,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:11:06,870 INFO L459 AbstractCegarLoop]: Abstraction has 232 states and 256 transitions. [2018-04-12 17:11:06,870 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-04-12 17:11:06,870 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 256 transitions. [2018-04-12 17:11:06,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-04-12 17:11:06,871 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:11:06,871 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:11:06,871 INFO L408 AbstractCegarLoop]: === Iteration 28 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:11:06,871 INFO L82 PathProgramCache]: Analyzing trace with hash 1398575739, now seen corresponding path program 1 times [2018-04-12 17:11:06,871 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:11:06,871 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:11:06,871 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:11:06,872 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:11:06,872 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:11:06,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:11:06,877 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:11:07,026 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:11:07,027 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:11:07,027 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:11:07,032 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:11:07,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:11:07,045 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:11:07,049 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 17:11:07,049 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,056 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:11:07,056 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:11:07,057 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-04-12 17:11:07,057 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,063 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,063 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:29 [2018-04-12 17:11:07,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:11:07,081 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:11:07,081 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,083 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,091 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:11:07,092 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:11:07,092 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,093 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,099 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,099 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:48, output treesize:45 [2018-04-12 17:11:07,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 61 [2018-04-12 17:11:07,154 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-12 17:11:07,155 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,160 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,172 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-04-12 17:11:07,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-12 17:11:07,174 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,177 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,183 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:11:07,184 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:77, output treesize:61 [2018-04-12 17:11:07,284 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 54 [2018-04-12 17:11:07,286 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-12 17:11:07,286 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,295 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 25 [2018-04-12 17:11:07,295 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,299 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 23 [2018-04-12 17:11:07,321 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2018-04-12 17:11:07,322 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,335 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-12 17:11:07,335 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,336 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,343 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,343 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:81, output treesize:29 [2018-04-12 17:11:07,402 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:11:07,402 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 17:11:07,403 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,413 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:11:07,413 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:11:07,414 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:11:07,415 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-04-12 17:11:07,415 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,426 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:11:07,427 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:40, output treesize:32 [2018-04-12 17:11:07,455 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:11:07,457 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:11:07,457 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,468 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,480 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:11:07,481 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:11:07,481 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,483 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,491 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:11:07,491 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:45, output treesize:42 [2018-04-12 17:11:07,562 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 25 [2018-04-12 17:11:07,563 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 14 [2018-04-12 17:11:07,563 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,566 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,572 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-12 17:11:07,573 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 17:11:07,573 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,574 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:11:07,578 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:11:07,579 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:56, output treesize:18 [2018-04-12 17:11:07,632 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:11:07,649 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:11:07,649 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 16] total 28 [2018-04-12 17:11:07,649 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-04-12 17:11:07,649 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-04-12 17:11:07,650 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=713, Unknown=0, NotChecked=0, Total=812 [2018-04-12 17:11:07,650 INFO L87 Difference]: Start difference. First operand 232 states and 256 transitions. Second operand 29 states. [2018-04-12 17:11:08,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:11:08,727 INFO L93 Difference]: Finished difference Result 309 states and 334 transitions. [2018-04-12 17:11:08,727 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-12 17:11:08,727 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 43 [2018-04-12 17:11:08,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:11:08,728 INFO L225 Difference]: With dead ends: 309 [2018-04-12 17:11:08,728 INFO L226 Difference]: Without dead ends: 309 [2018-04-12 17:11:08,729 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 32 SyntacticMatches, 3 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 429 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=287, Invalid=1693, Unknown=0, NotChecked=0, Total=1980 [2018-04-12 17:11:08,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states. [2018-04-12 17:11:08,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 231. [2018-04-12 17:11:08,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 231 states. [2018-04-12 17:11:08,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231 states to 231 states and 254 transitions. [2018-04-12 17:11:08,731 INFO L78 Accepts]: Start accepts. Automaton has 231 states and 254 transitions. Word has length 43 [2018-04-12 17:11:08,732 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:11:08,732 INFO L459 AbstractCegarLoop]: Abstraction has 231 states and 254 transitions. [2018-04-12 17:11:08,732 INFO L460 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-04-12 17:11:08,732 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states and 254 transitions. [2018-04-12 17:11:08,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-04-12 17:11:08,732 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:11:08,733 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:11:08,733 INFO L408 AbstractCegarLoop]: === Iteration 29 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]=== [2018-04-12 17:11:08,733 INFO L82 PathProgramCache]: Analyzing trace with hash 1003344041, now seen corresponding path program 1 times [2018-04-12 17:11:08,733 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:11:08,733 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:11:08,734 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:11:08,734 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:11:08,734 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:11:08,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-04-12 17:11:08,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-04-12 17:11:08,766 INFO L421 BasicCegarLoop]: Counterexample might be feasible [2018-04-12 17:11:08,779 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-04-12 17:11:08,793 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 12.04 05:11:08 BoogieIcfgContainer [2018-04-12 17:11:08,793 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-04-12 17:11:08,794 INFO L168 Benchmark]: Toolchain (without parser) took 19603.95 ms. Allocated memory was 403.2 MB in the beginning and 917.5 MB in the end (delta: 514.3 MB). Free memory was 337.4 MB in the beginning and 540.2 MB in the end (delta: -202.8 MB). Peak memory consumption was 311.5 MB. Max. memory is 5.3 GB. [2018-04-12 17:11:08,795 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 403.2 MB. Free memory is still 366.4 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-12 17:11:08,795 INFO L168 Benchmark]: CACSL2BoogieTranslator took 225.56 ms. Allocated memory is still 403.2 MB. Free memory was 336.1 MB in the beginning and 309.6 MB in the end (delta: 26.5 MB). Peak memory consumption was 26.5 MB. Max. memory is 5.3 GB. [2018-04-12 17:11:08,795 INFO L168 Benchmark]: Boogie Preprocessor took 39.43 ms. Allocated memory is still 403.2 MB. Free memory was 309.6 MB in the beginning and 306.9 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. [2018-04-12 17:11:08,795 INFO L168 Benchmark]: RCFGBuilder took 454.37 ms. Allocated memory was 403.2 MB in the beginning and 613.9 MB in the end (delta: 210.8 MB). Free memory was 306.9 MB in the beginning and 537.6 MB in the end (delta: -230.7 MB). Peak memory consumption was 24.4 MB. Max. memory is 5.3 GB. [2018-04-12 17:11:08,795 INFO L168 Benchmark]: TraceAbstraction took 18882.05 ms. Allocated memory was 613.9 MB in the beginning and 917.5 MB in the end (delta: 303.6 MB). Free memory was 537.6 MB in the beginning and 540.2 MB in the end (delta: -2.6 MB). Peak memory consumption was 301.0 MB. Max. memory is 5.3 GB. [2018-04-12 17:11:08,796 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 403.2 MB. Free memory is still 366.4 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 225.56 ms. Allocated memory is still 403.2 MB. Free memory was 336.1 MB in the beginning and 309.6 MB in the end (delta: 26.5 MB). Peak memory consumption was 26.5 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 39.43 ms. Allocated memory is still 403.2 MB. Free memory was 309.6 MB in the beginning and 306.9 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. * RCFGBuilder took 454.37 ms. Allocated memory was 403.2 MB in the beginning and 613.9 MB in the end (delta: 210.8 MB). Free memory was 306.9 MB in the beginning and 537.6 MB in the end (delta: -230.7 MB). Peak memory consumption was 24.4 MB. Max. memory is 5.3 GB. * TraceAbstraction took 18882.05 ms. Allocated memory was 613.9 MB in the beginning and 917.5 MB in the end (delta: 303.6 MB). Free memory was 537.6 MB in the beginning and 540.2 MB in the end (delta: -2.6 MB). Peak memory consumption was 301.0 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 985]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: [L988] EXPR, FCALL malloc(sizeof(SLL)) VAL [malloc(sizeof(SLL))={11:0}] [L988] SLL* head = malloc(sizeof(SLL)); VAL [head={11:0}, malloc(sizeof(SLL))={11:0}] [L989] FCALL head->next = ((void*)0) VAL [head={11:0}, malloc(sizeof(SLL))={11:0}] [L990] FCALL head->data = 0 VAL [head={11:0}, malloc(sizeof(SLL))={11:0}] [L992] SLL* x = head; VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, x={11:0}] [L995] COND FALSE !(__VERIFIER_nondet_int()) [L1005] COND FALSE !(__VERIFIER_nondet_int()) [L1014] x = head VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, x={11:0}] [L1015] FCALL x->next VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, x={11:0}, x->next={0:0}] [L1015] COND FALSE !(x->next) [L1022] EXPR, FCALL x->next VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, x={11:0}, x->next={0:0}] [L1022] SLL* y = x->next; [L1023] EXPR, FCALL malloc(sizeof(SLL)) VAL [head={11:0}, malloc(sizeof(SLL))={10:0}, malloc(sizeof(SLL))={11:0}, x={11:0}, y={0:0}] [L1023] FCALL x->next = malloc(sizeof(SLL)) VAL [head={11:0}, malloc(sizeof(SLL))={10:0}, malloc(sizeof(SLL))={11:0}, x={11:0}, y={0:0}] [L1024] FCALL x->data = 1 VAL [head={11:0}, malloc(sizeof(SLL))={10:0}, malloc(sizeof(SLL))={11:0}, x={11:0}, y={0:0}] [L1025] FCALL x->next = y VAL [head={11:0}, malloc(sizeof(SLL))={10:0}, malloc(sizeof(SLL))={11:0}, x={11:0}, y={0:0}] [L1029] x = head VAL [head={11:0}, malloc(sizeof(SLL))={10:0}, malloc(sizeof(SLL))={11:0}, x={11:0}, y={0:0}] [L1032] EXPR, FCALL x->data VAL [head={11:0}, malloc(sizeof(SLL))={10:0}, malloc(sizeof(SLL))={11:0}, x={11:0}, x->data=1, y={0:0}] [L1032] COND FALSE !(x->data != 1) [L1038] EXPR, FCALL x->next VAL [head={11:0}, malloc(sizeof(SLL))={10:0}, malloc(sizeof(SLL))={11:0}, x={11:0}, x->next={0:0}, y={0:0}] [L1038] x = x->next [L1039] COND FALSE !(\read(*x)) VAL [head={11:0}, malloc(sizeof(SLL))={10:0}, malloc(sizeof(SLL))={11:0}, x={0:0}, y={0:0}] [L1047] x = head VAL [head={11:0}, malloc(sizeof(SLL))={10:0}, malloc(sizeof(SLL))={11:0}, x={11:0}, y={0:0}] [L1048] COND TRUE x != ((void*)0) [L1050] head = x VAL [head={11:0}, malloc(sizeof(SLL))={10:0}, malloc(sizeof(SLL))={11:0}, x={11:0}, y={0:0}] [L1051] EXPR, FCALL x->next VAL [head={11:0}, malloc(sizeof(SLL))={10:0}, malloc(sizeof(SLL))={11:0}, x={11:0}, x->next={0:0}, y={0:0}] [L1051] x = x->next [L1052] free(head) VAL [head={11:0}, malloc(sizeof(SLL))={10:0}, malloc(sizeof(SLL))={11:0}, x={0:0}, y={0:0}] [L1052] free(head) VAL [head={11:0}, malloc(sizeof(SLL))={10:0}, malloc(sizeof(SLL))={11:0}, x={0:0}, y={0:0}] [L1052] FCALL free(head) VAL [head={11:0}, malloc(sizeof(SLL))={10:0}, malloc(sizeof(SLL))={11:0}, x={0:0}, y={0:0}] [L1048] COND FALSE !(x != ((void*)0)) VAL [head={11:0}, malloc(sizeof(SLL))={10:0}, malloc(sizeof(SLL))={11:0}, x={0:0}, y={0:0}] [L1055] return 0; VAL [\result=0, head={11:0}, malloc(sizeof(SLL))={10:0}, malloc(sizeof(SLL))={11:0}, x={0:0}, y={0:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 111 locations, 43 error locations. UNSAFE Result, 18.8s OverallTime, 29 OverallIterations, 3 TraceHistogramMax, 11.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1999 SDtfs, 8274 SDslu, 9093 SDs, 0 SdLazy, 15545 SolverSat, 1564 SolverUnsat, 25 SolverUnknown, 0 SolverNotchecked, 5.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 927 GetRequests, 339 SyntacticMatches, 32 SemanticMatches, 556 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3876 ImplicationChecksByTransitivity, 7.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=232occurred in iteration=27, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 28 MinimizatonAttempts, 1433 StatesRemovedByMinimization, 28 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 5.8s InterpolantComputationTime, 1244 NumberOfCodeBlocks, 1244 NumberOfCodeBlocksAsserted, 44 NumberOfCheckSat, 1161 ConstructedInterpolants, 102 QuantifiedInterpolants, 583343 SizeOfPredicates, 163 NumberOfNonLiveVariables, 1726 ConjunctsInSsa, 412 ConjunctsInUnsatCore, 39 InterpolantComputations, 17 PerfectInterpolantSequences, 33/161 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-12_17-11-08-802.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-04-12_17-11-08-802.csv Received shutdown request...