java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv --cacsl2boogietranslator.bitprecise.bitfields false -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test18_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-408c70d-m [2018-04-13 10:21:14,389 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-13 10:21:14,390 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-13 10:21:14,402 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-13 10:21:14,402 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-13 10:21:14,403 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-13 10:21:14,404 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-13 10:21:14,406 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-13 10:21:14,407 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-13 10:21:14,408 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-13 10:21:14,409 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-13 10:21:14,409 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-13 10:21:14,410 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-13 10:21:14,410 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-13 10:21:14,411 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-13 10:21:14,413 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-13 10:21:14,414 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-13 10:21:14,415 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-13 10:21:14,416 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-13 10:21:14,417 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-13 10:21:14,419 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-04-13 10:21:14,419 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-04-13 10:21:14,419 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-04-13 10:21:14,420 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-04-13 10:21:14,421 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-04-13 10:21:14,422 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-04-13 10:21:14,422 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-04-13 10:21:14,422 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-04-13 10:21:14,423 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-04-13 10:21:14,423 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-04-13 10:21:14,424 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-04-13 10:21:14,424 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf [2018-04-13 10:21:14,434 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-13 10:21:14,434 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-13 10:21:14,435 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-13 10:21:14,435 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-13 10:21:14,435 INFO L133 SettingsManager]: * Use SBE=true [2018-04-13 10:21:14,436 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-13 10:21:14,436 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-13 10:21:14,436 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-13 10:21:14,436 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-13 10:21:14,436 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-13 10:21:14,436 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-13 10:21:14,437 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-13 10:21:14,437 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-13 10:21:14,437 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-13 10:21:14,437 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-13 10:21:14,437 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-13 10:21:14,437 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-13 10:21:14,438 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-13 10:21:14,438 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-13 10:21:14,438 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-13 10:21:14,438 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-13 10:21:14,438 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-13 10:21:14,438 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-13 10:21:14,439 INFO L133 SettingsManager]: * Trace refinement strategy=SMTINTERPOL Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Bitprecise bitfields -> false [2018-04-13 10:21:14,468 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-13 10:21:14,479 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-13 10:21:14,482 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-13 10:21:14,484 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-13 10:21:14,484 INFO L276 PluginConnector]: CDTParser initialized [2018-04-13 10:21:14,484 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,795 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG6d4aa4178 [2018-04-13 10:21:14,945 INFO L287 CDTParser]: IsIndexed: true [2018-04-13 10:21:14,945 INFO L288 CDTParser]: Found 1 translation units. [2018-04-13 10:21:14,946 INFO L168 CDTParser]: Scanning memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,955 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-13 10:21:14,955 INFO L215 ultiparseSymbolTable]: [2018-04-13 10:21:14,956 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-13 10:21:14,956 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_del ('__ldv_list_del') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,956 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_submit_msg ('ldv_submit_msg') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,956 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_positive ('ldv_positive') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,956 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tail ('ldv_list_add_tail') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,956 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdata ('ldv_dev_get_drvdata') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,956 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_create ('ldv_kobject_create') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,956 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_init ('ldv_kobject_init') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,956 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_nonpositive ('ldv_nonpositive') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,956 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanup ('ldv_kobject_cleanup') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,956 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__g ('g') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,957 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_get ('ldv_kobject_get') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,957 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__f ('f') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,957 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_add ('__ldv_list_add') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,957 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_put ('ldv_kobject_put') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,957 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____bswap_32 ('__bswap_32') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,957 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_init ('ldv_kref_init') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,957 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,957 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_del ('ldv_kobject_del') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,957 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_sub ('ldv_kref_sub') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,957 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEAD ('LDV_INIT_LIST_HEAD') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,957 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_release ('ldv_kobject_release') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,957 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgs ('ldv_destroy_msgs') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,957 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fill ('ldv_msg_fill') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,957 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_return ('ldv_atomic_add_return') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,957 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add ('ldv_list_add') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,957 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_point ('entry_point') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,957 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_alloc ('ldv_msg_alloc') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,957 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_init_internal ('ldv_kobject_init_internal') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,957 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_del ('ldv_list_del') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,958 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_put ('ldv_kref_put') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,958 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdata ('ldv_dev_set_drvdata') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,958 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_return ('ldv_atomic_sub_return') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,958 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc ('ldv_malloc') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,958 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_zalloc ('ldv_zalloc') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,958 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____bswap_64 ('__bswap_64') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,958 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_free ('ldv_msg_free') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,958 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_get ('ldv_kref_get') in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,958 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-13 10:21:14,958 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_global_msg_list in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,958 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ushort in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,958 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ino_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,959 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____syscall_slong_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,959 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____pid_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,959 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__suseconds_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,959 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__pthread_barrier_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,959 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____u_quad_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,959 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__u_long in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,959 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__int64_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,959 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__fd_mask in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,959 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____WAIT_STATUS in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,959 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__u_int16_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,959 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__fsid_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,960 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____clock_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,960 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____blkcnt_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,960 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__daddr_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,960 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__pthread_cond_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,960 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__clockid_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,960 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____clockid_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,960 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____loff_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,960 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__quad_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,960 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____u_int in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,960 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__dev_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,961 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__pthread_rwlockattr_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,961 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__id_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,961 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__clock_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,961 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____u_long in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,961 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____int16_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,961 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____off_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,961 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____fsid_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,961 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__sigset_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,961 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__pthread_spinlock_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,961 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__nlink_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,961 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ulong in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,962 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__uint in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,962 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____sigset_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,962 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ino64_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,962 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__pthread_once_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,962 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____fsword_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,962 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____uid_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,962 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ssize_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,962 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__pthread_attr_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,962 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____uint64_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,962 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__int16_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,962 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__blkcnt_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,963 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____fd_mask in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,963 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__timer_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,963 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____id_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,963 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____syscall_ulong_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,963 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__lldiv_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,963 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__pthread_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,963 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____pthread_list_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,963 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__uid_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,963 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____sig_atomic_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,963 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__u_char in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,964 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__off_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,964 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__u_int32_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,964 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__u_int8_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,964 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__fsblkcnt_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,964 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__wchar_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,964 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____gid_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,964 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__u_int in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,964 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____off64_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,964 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____suseconds_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,964 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____u_char in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,964 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____quad_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,965 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____fsblkcnt64_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,965 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__size_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,965 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__key_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,965 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__pthread_mutexattr_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,965 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____fsfilcnt_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,965 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____u_short in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,965 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____rlim_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,965 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____timer_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,965 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__pthread_mutex_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,965 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__mode_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,965 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ssize_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,965 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__idtype_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,965 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____socklen_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,965 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____int32_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,965 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____intptr_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,966 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__time_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,966 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__gid_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,966 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____blkcnt64_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,966 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____nlink_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,966 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__div_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,966 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__pid_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,966 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__int32_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,966 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____uint32_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,966 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__fsfilcnt_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,966 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__fd_set in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,966 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____mode_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,967 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__caddr_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,967 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__blksize_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,967 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__u_short in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,967 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,967 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__u_quad_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,967 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____caddr_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,967 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____dev_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,967 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____fsblkcnt_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,967 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__register_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,967 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__pthread_barrierattr_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,967 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__pthread_rwlock_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,967 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__pthread_key_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,967 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____int8_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,967 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldiv_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,967 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____rlim64_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,968 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ino_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,968 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____uint16_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,968 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____useconds_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,968 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__pthread_condattr_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,968 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____fsfilcnt64_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,968 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____qaddr_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,968 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____blksize_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,968 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____daddr_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,968 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____int64_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,968 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____key_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,968 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____uint8_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,968 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__loff_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,968 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____time_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,968 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__int8_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,968 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__u_int64_t in memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:14,982 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG6d4aa4178 [2018-04-13 10:21:14,985 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-13 10:21:14,986 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-13 10:21:14,986 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-13 10:21:14,986 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-13 10:21:14,990 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-13 10:21:14,990 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.04 10:21:14" (1/1) ... [2018-04-13 10:21:14,992 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6ff3454e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:21:14, skipping insertion in model container [2018-04-13 10:21:14,992 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.04 10:21:14" (1/1) ... [2018-04-13 10:21:15,002 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-13 10:21:15,032 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-13 10:21:15,182 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-13 10:21:15,236 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-13 10:21:15,243 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 155 non ball SCCs. Number of states in SCCs 155. [2018-04-13 10:21:15,288 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:21:15 WrapperNode [2018-04-13 10:21:15,288 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-13 10:21:15,289 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-13 10:21:15,289 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-13 10:21:15,289 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-13 10:21:15,296 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:21:15" (1/1) ... [2018-04-13 10:21:15,296 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:21:15" (1/1) ... [2018-04-13 10:21:15,311 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:21:15" (1/1) ... [2018-04-13 10:21:15,312 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:21:15" (1/1) ... [2018-04-13 10:21:15,328 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:21:15" (1/1) ... [2018-04-13 10:21:15,333 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:21:15" (1/1) ... [2018-04-13 10:21:15,336 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:21:15" (1/1) ... [2018-04-13 10:21:15,341 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-13 10:21:15,342 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-13 10:21:15,342 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-13 10:21:15,342 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-13 10:21:15,343 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:21:15" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-13 10:21:15,439 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-13 10:21:15,439 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-13 10:21:15,439 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-04-13 10:21:15,439 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____bswap_32 [2018-04-13 10:21:15,439 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____bswap_64 [2018-04-13 10:21:15,440 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_nonpositive [2018-04-13 10:21:15,440 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_positive [2018-04-13 10:21:15,440 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc [2018-04-13 10:21:15,440 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_zalloc [2018-04-13 10:21:15,440 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEAD [2018-04-13 10:21:15,440 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_add [2018-04-13 10:21:15,440 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_del [2018-04-13 10:21:15,440 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add [2018-04-13 10:21:15,440 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tail [2018-04-13 10:21:15,440 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_del [2018-04-13 10:21:15,440 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_alloc [2018-04-13 10:21:15,440 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fill [2018-04-13 10:21:15,441 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_free [2018-04-13 10:21:15,441 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_submit_msg [2018-04-13 10:21:15,441 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgs [2018-04-13 10:21:15,441 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdata [2018-04-13 10:21:15,441 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdata [2018-04-13 10:21:15,441 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_return [2018-04-13 10:21:15,441 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_return [2018-04-13 10:21:15,441 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_sub [2018-04-13 10:21:15,441 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_init [2018-04-13 10:21:15,441 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_get [2018-04-13 10:21:15,441 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_put [2018-04-13 10:21:15,441 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_del [2018-04-13 10:21:15,441 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanup [2018-04-13 10:21:15,442 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_release [2018-04-13 10:21:15,442 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_put [2018-04-13 10:21:15,442 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_get [2018-04-13 10:21:15,442 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_init_internal [2018-04-13 10:21:15,442 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_init [2018-04-13 10:21:15,442 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_create [2018-04-13 10:21:15,442 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__f [2018-04-13 10:21:15,442 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__g [2018-04-13 10:21:15,442 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_point [2018-04-13 10:21:15,442 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-13 10:21:15,443 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-04-13 10:21:15,443 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-04-13 10:21:15,443 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-04-13 10:21:15,443 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____bswap_32 [2018-04-13 10:21:15,443 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____bswap_64 [2018-04-13 10:21:15,443 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-13 10:21:15,443 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-13 10:21:15,443 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-13 10:21:15,443 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-13 10:21:15,443 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-13 10:21:15,443 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-13 10:21:15,444 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-13 10:21:15,444 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-13 10:21:15,444 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-13 10:21:15,444 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-13 10:21:15,444 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-13 10:21:15,444 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-13 10:21:15,444 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-13 10:21:15,444 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-13 10:21:15,444 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-13 10:21:15,444 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-13 10:21:15,445 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-13 10:21:15,445 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-13 10:21:15,445 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-13 10:21:15,445 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-13 10:21:15,445 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-13 10:21:15,445 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-13 10:21:15,445 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-13 10:21:15,445 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-13 10:21:15,445 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-13 10:21:15,445 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-13 10:21:15,445 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-13 10:21:15,446 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-13 10:21:15,446 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-13 10:21:15,446 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-13 10:21:15,446 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-13 10:21:15,446 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-13 10:21:15,446 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-13 10:21:15,446 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-13 10:21:15,446 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-13 10:21:15,446 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-13 10:21:15,446 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-13 10:21:15,447 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-13 10:21:15,447 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-13 10:21:15,447 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-13 10:21:15,447 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-13 10:21:15,447 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-13 10:21:15,447 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-13 10:21:15,447 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-13 10:21:15,447 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-13 10:21:15,447 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-13 10:21:15,447 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-13 10:21:15,447 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-13 10:21:15,447 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-13 10:21:15,448 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-13 10:21:15,448 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-13 10:21:15,448 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-13 10:21:15,448 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-13 10:21:15,448 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-13 10:21:15,448 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-13 10:21:15,448 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-13 10:21:15,448 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-13 10:21:15,448 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-13 10:21:15,448 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-13 10:21:15,448 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-13 10:21:15,449 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-13 10:21:15,449 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-13 10:21:15,449 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-13 10:21:15,449 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-13 10:21:15,449 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-13 10:21:15,449 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-13 10:21:15,449 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-13 10:21:15,449 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-13 10:21:15,449 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-13 10:21:15,449 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-13 10:21:15,449 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-13 10:21:15,450 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-13 10:21:15,450 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-13 10:21:15,450 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-13 10:21:15,450 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-13 10:21:15,450 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-13 10:21:15,450 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-13 10:21:15,450 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-13 10:21:15,450 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-13 10:21:15,450 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-13 10:21:15,450 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-13 10:21:15,450 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-13 10:21:15,451 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-13 10:21:15,451 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-13 10:21:15,451 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-13 10:21:15,451 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-13 10:21:15,451 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-13 10:21:15,451 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-13 10:21:15,451 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-13 10:21:15,451 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-13 10:21:15,451 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-13 10:21:15,451 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-13 10:21:15,451 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-13 10:21:15,451 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-13 10:21:15,452 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-13 10:21:15,452 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-13 10:21:15,452 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-13 10:21:15,452 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-13 10:21:15,452 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-13 10:21:15,452 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-13 10:21:15,452 INFO L128 BoogieDeclarations]: Found specification of procedure kfree [2018-04-13 10:21:15,452 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-13 10:21:15,452 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-04-13 10:21:15,452 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_nonpositive [2018-04-13 10:21:15,452 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_positive [2018-04-13 10:21:15,453 INFO L128 BoogieDeclarations]: Found specification of procedure memcpy [2018-04-13 10:21:15,453 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-04-13 10:21:15,453 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc [2018-04-13 10:21:15,453 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-13 10:21:15,453 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_zalloc [2018-04-13 10:21:15,453 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-04-13 10:21:15,453 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEAD [2018-04-13 10:21:15,453 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-04-13 10:21:15,453 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_add [2018-04-13 10:21:15,453 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_del [2018-04-13 10:21:15,453 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add [2018-04-13 10:21:15,453 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-04-13 10:21:15,454 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tail [2018-04-13 10:21:15,454 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_del [2018-04-13 10:21:15,454 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_alloc [2018-04-13 10:21:15,454 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fill [2018-04-13 10:21:15,454 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-04-13 10:21:15,454 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_free [2018-04-13 10:21:15,454 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-13 10:21:15,454 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_submit_msg [2018-04-13 10:21:15,454 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgs [2018-04-13 10:21:15,454 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdata [2018-04-13 10:21:15,454 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdata [2018-04-13 10:21:15,455 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_return [2018-04-13 10:21:15,455 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-13 10:21:15,455 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-13 10:21:15,455 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_return [2018-04-13 10:21:15,455 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_sub [2018-04-13 10:21:15,455 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-04-13 10:21:15,455 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_init [2018-04-13 10:21:15,455 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_get [2018-04-13 10:21:15,455 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_put [2018-04-13 10:21:15,455 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_del [2018-04-13 10:21:15,455 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanup [2018-04-13 10:21:15,455 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_release [2018-04-13 10:21:15,455 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_put [2018-04-13 10:21:15,456 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_get [2018-04-13 10:21:15,456 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_init_internal [2018-04-13 10:21:15,456 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_init [2018-04-13 10:21:15,456 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_create [2018-04-13 10:21:15,456 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-04-13 10:21:15,456 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__f [2018-04-13 10:21:15,456 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__g [2018-04-13 10:21:15,456 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_point [2018-04-13 10:21:15,456 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-13 10:21:15,456 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-13 10:21:15,456 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-13 10:21:15,456 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-13 10:21:15,736 WARN L446 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-04-13 10:21:15,875 WARN L446 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-04-13 10:21:16,054 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-13 10:21:16,054 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.04 10:21:16 BoogieIcfgContainer [2018-04-13 10:21:16,054 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-13 10:21:16,055 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-13 10:21:16,055 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-13 10:21:16,058 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-13 10:21:16,058 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.04 10:21:14" (1/3) ... [2018-04-13 10:21:16,059 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@597b6d13 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.04 10:21:16, skipping insertion in model container [2018-04-13 10:21:16,059 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:21:15" (2/3) ... [2018-04-13 10:21:16,059 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@597b6d13 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.04 10:21:16, skipping insertion in model container [2018-04-13 10:21:16,059 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.04 10:21:16" (3/3) ... [2018-04-13 10:21:16,060 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test18_true-valid-memsafety_true-termination.i [2018-04-13 10:21:16,066 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-13 10:21:16,073 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 79 error locations. [2018-04-13 10:21:16,096 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-13 10:21:16,096 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-13 10:21:16,096 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-13 10:21:16,096 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-13 10:21:16,096 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-13 10:21:16,097 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-13 10:21:16,097 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-13 10:21:16,097 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-13 10:21:16,097 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-13 10:21:16,097 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-13 10:21:16,107 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states. [2018-04-13 10:21:16,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-04-13 10:21:16,113 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:21:16,113 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-04-13 10:21:16,113 INFO L408 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:21:16,116 INFO L82 PathProgramCache]: Analyzing trace with hash 15377148, now seen corresponding path program 1 times [2018-04-13 10:21:16,117 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:21:16,117 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:21:16,153 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:16,153 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:21:16,153 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:16,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:21:16,179 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:21:16,208 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:21:16,210 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:21:16,210 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-13 10:21:16,211 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-13 10:21:16,223 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-13 10:21:16,223 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-13 10:21:16,225 INFO L87 Difference]: Start difference. First operand 126 states. Second operand 3 states. [2018-04-13 10:21:16,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:21:16,300 INFO L93 Difference]: Finished difference Result 77 states and 82 transitions. [2018-04-13 10:21:16,300 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-13 10:21:16,301 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 [2018-04-13 10:21:16,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:21:16,309 INFO L225 Difference]: With dead ends: 77 [2018-04-13 10:21:16,309 INFO L226 Difference]: Without dead ends: 71 [2018-04-13 10:21:16,310 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-13 10:21:16,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2018-04-13 10:21:16,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 52. [2018-04-13 10:21:16,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-04-13 10:21:16,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 57 transitions. [2018-04-13 10:21:16,340 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 57 transitions. Word has length 4 [2018-04-13 10:21:16,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:21:16,341 INFO L459 AbstractCegarLoop]: Abstraction has 52 states and 57 transitions. [2018-04-13 10:21:16,341 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-13 10:21:16,341 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 57 transitions. [2018-04-13 10:21:16,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-04-13 10:21:16,341 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:21:16,341 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-04-13 10:21:16,341 INFO L408 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:21:16,341 INFO L82 PathProgramCache]: Analyzing trace with hash 15377149, now seen corresponding path program 1 times [2018-04-13 10:21:16,341 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:21:16,342 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:21:16,343 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:16,343 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:21:16,343 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:16,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:21:16,353 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:21:16,375 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:21:16,376 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:21:16,376 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-13 10:21:16,377 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-13 10:21:16,377 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-13 10:21:16,377 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-13 10:21:16,377 INFO L87 Difference]: Start difference. First operand 52 states and 57 transitions. Second operand 3 states. [2018-04-13 10:21:16,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:21:16,399 INFO L93 Difference]: Finished difference Result 88 states and 99 transitions. [2018-04-13 10:21:16,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-13 10:21:16,400 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 [2018-04-13 10:21:16,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:21:16,402 INFO L225 Difference]: With dead ends: 88 [2018-04-13 10:21:16,402 INFO L226 Difference]: Without dead ends: 88 [2018-04-13 10:21:16,403 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-13 10:21:16,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-04-13 10:21:16,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 50. [2018-04-13 10:21:16,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-04-13 10:21:16,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 55 transitions. [2018-04-13 10:21:16,407 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 55 transitions. Word has length 4 [2018-04-13 10:21:16,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:21:16,407 INFO L459 AbstractCegarLoop]: Abstraction has 50 states and 55 transitions. [2018-04-13 10:21:16,407 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-13 10:21:16,407 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 55 transitions. [2018-04-13 10:21:16,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-04-13 10:21:16,408 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:21:16,408 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:21:16,408 INFO L408 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:21:16,408 INFO L82 PathProgramCache]: Analyzing trace with hash -1456240651, now seen corresponding path program 1 times [2018-04-13 10:21:16,408 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:21:16,408 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:21:16,410 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:16,410 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:21:16,410 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:16,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:21:16,425 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:21:16,449 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:21:16,449 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:21:16,449 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-13 10:21:16,449 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-13 10:21:16,450 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-13 10:21:16,450 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-13 10:21:16,450 INFO L87 Difference]: Start difference. First operand 50 states and 55 transitions. Second operand 3 states. [2018-04-13 10:21:16,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:21:16,491 INFO L93 Difference]: Finished difference Result 82 states and 93 transitions. [2018-04-13 10:21:16,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-13 10:21:16,492 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2018-04-13 10:21:16,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:21:16,493 INFO L225 Difference]: With dead ends: 82 [2018-04-13 10:21:16,493 INFO L226 Difference]: Without dead ends: 79 [2018-04-13 10:21:16,493 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-13 10:21:16,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-04-13 10:21:16,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 54. [2018-04-13 10:21:16,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-04-13 10:21:16,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 60 transitions. [2018-04-13 10:21:16,499 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 60 transitions. Word has length 20 [2018-04-13 10:21:16,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:21:16,499 INFO L459 AbstractCegarLoop]: Abstraction has 54 states and 60 transitions. [2018-04-13 10:21:16,499 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-13 10:21:16,499 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 60 transitions. [2018-04-13 10:21:16,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-13 10:21:16,500 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:21:16,500 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:21:16,500 INFO L408 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:21:16,500 INFO L82 PathProgramCache]: Analyzing trace with hash -1633146249, now seen corresponding path program 1 times [2018-04-13 10:21:16,501 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:21:16,501 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:21:16,502 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:16,502 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:21:16,502 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:16,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:21:16,519 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:21:16,590 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:21:16,590 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:21:16,590 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-13 10:21:16,591 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-13 10:21:16,591 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-13 10:21:16,591 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-13 10:21:16,591 INFO L87 Difference]: Start difference. First operand 54 states and 60 transitions. Second operand 6 states. [2018-04-13 10:21:16,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:21:16,638 INFO L93 Difference]: Finished difference Result 82 states and 93 transitions. [2018-04-13 10:21:16,638 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-13 10:21:16,638 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2018-04-13 10:21:16,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:21:16,639 INFO L225 Difference]: With dead ends: 82 [2018-04-13 10:21:16,639 INFO L226 Difference]: Without dead ends: 82 [2018-04-13 10:21:16,639 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-13 10:21:16,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-04-13 10:21:16,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 50. [2018-04-13 10:21:16,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-04-13 10:21:16,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2018-04-13 10:21:16,644 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 54 transitions. Word has length 22 [2018-04-13 10:21:16,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:21:16,644 INFO L459 AbstractCegarLoop]: Abstraction has 50 states and 54 transitions. [2018-04-13 10:21:16,644 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-13 10:21:16,644 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 54 transitions. [2018-04-13 10:21:16,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-13 10:21:16,645 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:21:16,645 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:21:16,645 INFO L408 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:21:16,645 INFO L82 PathProgramCache]: Analyzing trace with hash 1500247108, now seen corresponding path program 1 times [2018-04-13 10:21:16,646 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:21:16,646 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:21:16,647 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:16,647 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:21:16,647 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:16,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:21:16,658 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:21:16,695 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:21:16,695 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:21:16,695 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-13 10:21:16,696 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-13 10:21:16,696 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-13 10:21:16,696 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-13 10:21:16,696 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. Second operand 5 states. [2018-04-13 10:21:16,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:21:16,715 INFO L93 Difference]: Finished difference Result 54 states and 58 transitions. [2018-04-13 10:21:16,716 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-13 10:21:16,716 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23 [2018-04-13 10:21:16,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:21:16,717 INFO L225 Difference]: With dead ends: 54 [2018-04-13 10:21:16,717 INFO L226 Difference]: Without dead ends: 52 [2018-04-13 10:21:16,717 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-13 10:21:16,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-04-13 10:21:16,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-04-13 10:21:16,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-04-13 10:21:16,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 56 transitions. [2018-04-13 10:21:16,720 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 56 transitions. Word has length 23 [2018-04-13 10:21:16,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:21:16,721 INFO L459 AbstractCegarLoop]: Abstraction has 52 states and 56 transitions. [2018-04-13 10:21:16,721 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-13 10:21:16,721 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 56 transitions. [2018-04-13 10:21:16,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-04-13 10:21:16,722 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:21:16,722 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:21:16,722 INFO L408 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:21:16,722 INFO L82 PathProgramCache]: Analyzing trace with hash 1230449282, now seen corresponding path program 1 times [2018-04-13 10:21:16,722 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:21:16,722 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:21:16,723 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:16,724 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:21:16,724 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:16,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:21:16,735 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:21:16,767 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:21:16,767 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:21:16,767 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-13 10:21:16,767 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-13 10:21:16,767 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-13 10:21:16,767 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-13 10:21:16,767 INFO L87 Difference]: Start difference. First operand 52 states and 56 transitions. Second operand 6 states. [2018-04-13 10:21:16,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:21:16,790 INFO L93 Difference]: Finished difference Result 51 states and 55 transitions. [2018-04-13 10:21:16,790 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-13 10:21:16,790 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-04-13 10:21:16,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:21:16,790 INFO L225 Difference]: With dead ends: 51 [2018-04-13 10:21:16,790 INFO L226 Difference]: Without dead ends: 51 [2018-04-13 10:21:16,791 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-13 10:21:16,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-04-13 10:21:16,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-04-13 10:21:16,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-04-13 10:21:16,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 55 transitions. [2018-04-13 10:21:16,793 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 55 transitions. Word has length 25 [2018-04-13 10:21:16,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:21:16,793 INFO L459 AbstractCegarLoop]: Abstraction has 51 states and 55 transitions. [2018-04-13 10:21:16,793 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-13 10:21:16,793 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 55 transitions. [2018-04-13 10:21:16,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-04-13 10:21:16,793 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:21:16,793 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:21:16,793 INFO L408 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:21:16,794 INFO L82 PathProgramCache]: Analyzing trace with hash 1230449331, now seen corresponding path program 1 times [2018-04-13 10:21:16,794 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:21:16,794 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:21:16,795 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:16,795 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:21:16,795 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:16,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:21:16,805 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:21:16,845 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:21:16,845 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:21:16,845 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-13 10:21:16,845 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-13 10:21:16,845 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-13 10:21:16,845 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-13 10:21:16,846 INFO L87 Difference]: Start difference. First operand 51 states and 55 transitions. Second operand 6 states. [2018-04-13 10:21:16,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:21:16,917 INFO L93 Difference]: Finished difference Result 59 states and 64 transitions. [2018-04-13 10:21:16,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-13 10:21:16,918 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-04-13 10:21:16,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:21:16,918 INFO L225 Difference]: With dead ends: 59 [2018-04-13 10:21:16,918 INFO L226 Difference]: Without dead ends: 59 [2018-04-13 10:21:16,919 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-13 10:21:16,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-04-13 10:21:16,921 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 57. [2018-04-13 10:21:16,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-04-13 10:21:16,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 63 transitions. [2018-04-13 10:21:16,923 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 63 transitions. Word has length 25 [2018-04-13 10:21:16,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:21:16,923 INFO L459 AbstractCegarLoop]: Abstraction has 57 states and 63 transitions. [2018-04-13 10:21:16,923 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-13 10:21:16,923 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 63 transitions. [2018-04-13 10:21:16,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-04-13 10:21:16,924 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:21:16,924 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:21:16,924 INFO L408 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:21:16,924 INFO L82 PathProgramCache]: Analyzing trace with hash 1230449332, now seen corresponding path program 1 times [2018-04-13 10:21:16,924 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:21:16,924 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:21:16,925 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:16,925 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:21:16,925 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:16,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:21:16,934 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:21:16,998 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:21:16,999 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:21:16,999 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-13 10:21:16,999 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-13 10:21:16,999 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-13 10:21:16,999 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-04-13 10:21:17,000 INFO L87 Difference]: Start difference. First operand 57 states and 63 transitions. Second operand 4 states. [2018-04-13 10:21:17,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:21:17,020 INFO L93 Difference]: Finished difference Result 85 states and 95 transitions. [2018-04-13 10:21:17,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-13 10:21:17,020 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2018-04-13 10:21:17,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:21:17,021 INFO L225 Difference]: With dead ends: 85 [2018-04-13 10:21:17,021 INFO L226 Difference]: Without dead ends: 85 [2018-04-13 10:21:17,021 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-04-13 10:21:17,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-04-13 10:21:17,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 59. [2018-04-13 10:21:17,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-04-13 10:21:17,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 65 transitions. [2018-04-13 10:21:17,025 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 65 transitions. Word has length 25 [2018-04-13 10:21:17,025 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:21:17,025 INFO L459 AbstractCegarLoop]: Abstraction has 59 states and 65 transitions. [2018-04-13 10:21:17,025 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-13 10:21:17,025 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 65 transitions. [2018-04-13 10:21:17,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-13 10:21:17,026 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:21:17,026 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:21:17,026 INFO L408 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:21:17,026 INFO L82 PathProgramCache]: Analyzing trace with hash 183457428, now seen corresponding path program 1 times [2018-04-13 10:21:17,026 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:21:17,026 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:21:17,028 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:17,028 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:21:17,028 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:17,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:21:17,036 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:21:17,072 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-13 10:21:17,072 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:21:17,072 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-13 10:21:17,072 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-13 10:21:17,073 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-13 10:21:17,073 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-13 10:21:17,073 INFO L87 Difference]: Start difference. First operand 59 states and 65 transitions. Second operand 5 states. [2018-04-13 10:21:17,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:21:17,083 INFO L93 Difference]: Finished difference Result 79 states and 86 transitions. [2018-04-13 10:21:17,084 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-13 10:21:17,084 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-04-13 10:21:17,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:21:17,084 INFO L225 Difference]: With dead ends: 79 [2018-04-13 10:21:17,084 INFO L226 Difference]: Without dead ends: 79 [2018-04-13 10:21:17,084 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-13 10:21:17,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-04-13 10:21:17,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 61. [2018-04-13 10:21:17,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-04-13 10:21:17,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 67 transitions. [2018-04-13 10:21:17,087 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 67 transitions. Word has length 29 [2018-04-13 10:21:17,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:21:17,087 INFO L459 AbstractCegarLoop]: Abstraction has 61 states and 67 transitions. [2018-04-13 10:21:17,088 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-13 10:21:17,088 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 67 transitions. [2018-04-13 10:21:17,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-04-13 10:21:17,088 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:21:17,088 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:21:17,088 INFO L408 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:21:17,088 INFO L82 PathProgramCache]: Analyzing trace with hash -108224362, now seen corresponding path program 1 times [2018-04-13 10:21:17,088 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:21:17,088 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:21:17,089 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:17,089 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:21:17,089 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:21:17,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:21:17,101 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:21:17,109 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:21:17,109 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:21:17,109 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:21:17,110 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:21:17,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:21:17,146 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:21:17,178 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-04-13 10:21:17,180 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:21:17,196 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-04-13 10:21:17,196 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:21:17,198 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-04-13 10:21:17,198 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:21:17,212 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-04-13 10:21:17,213 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:21:17,226 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:21:17,226 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46 [2018-04-13 10:21:17,363 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:21:17,364 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:21:17,365 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 31 [2018-04-13 10:21:17,365 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:21:17,384 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:21:17,384 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 40 [2018-04-13 10:21:17,385 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:21:17,421 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:21:17,422 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 38 [2018-04-13 10:21:17,422 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:21:17,456 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:21:17,456 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:21:17,457 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 28 [2018-04-13 10:21:17,458 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:21:17,476 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-04-13 10:21:17,476 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:73, output treesize:55 [2018-04-13 10:21:17,526 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:21:17,527 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:21:17,527 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11] total 11 [2018-04-13 10:21:17,527 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-13 10:21:17,528 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-13 10:21:17,528 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=109, Unknown=1, NotChecked=0, Total=132 [2018-04-13 10:21:17,528 INFO L87 Difference]: Start difference. First operand 61 states and 67 transitions. Second operand 12 states. [2018-04-13 10:22:04,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:22:04,452 INFO L93 Difference]: Finished difference Result 145 states and 162 transitions. [2018-04-13 10:22:04,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-13 10:22:04,453 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 31 [2018-04-13 10:22:04,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:22:04,454 INFO L225 Difference]: With dead ends: 145 [2018-04-13 10:22:04,454 INFO L226 Difference]: Without dead ends: 145 [2018-04-13 10:22:04,454 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 6.5s TimeCoverageRelationStatistics Valid=84, Invalid=418, Unknown=4, NotChecked=0, Total=506 [2018-04-13 10:22:04,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-04-13 10:22:04,458 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 71. [2018-04-13 10:22:04,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-04-13 10:22:04,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 84 transitions. [2018-04-13 10:22:04,459 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 84 transitions. Word has length 31 [2018-04-13 10:22:04,459 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:22:04,459 INFO L459 AbstractCegarLoop]: Abstraction has 71 states and 84 transitions. [2018-04-13 10:22:04,459 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-13 10:22:04,459 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 84 transitions. [2018-04-13 10:22:04,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-04-13 10:22:04,460 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:22:04,460 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:22:04,460 INFO L408 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:22:04,460 INFO L82 PathProgramCache]: Analyzing trace with hash -108224363, now seen corresponding path program 1 times [2018-04-13 10:22:04,460 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:22:04,460 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:22:04,462 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:04,462 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:04,463 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:04,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:04,470 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:22:04,473 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:22:04,473 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:22:04,473 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:22:04,474 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:04,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:04,495 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:22:04,499 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:22:04,500 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:04,501 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:22:04,501 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:22:04,521 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc_#t~malloc12.base| Int)) (= |c_#valid| (store |c_old(#valid)| |__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc_#t~malloc12.base| 1))) is different from true [2018-04-13 10:22:04,526 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:22:04,527 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:04,531 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:22:04,531 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:11 [2018-04-13 10:22:04,536 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 3 not checked. [2018-04-13 10:22:04,537 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:22:04,537 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2018-04-13 10:22:04,537 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-13 10:22:04,537 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-13 10:22:04,537 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=32, Unknown=1, NotChecked=10, Total=56 [2018-04-13 10:22:04,537 INFO L87 Difference]: Start difference. First operand 71 states and 84 transitions. Second operand 8 states. [2018-04-13 10:22:04,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:22:04,645 INFO L93 Difference]: Finished difference Result 77 states and 90 transitions. [2018-04-13 10:22:04,645 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-13 10:22:04,645 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 31 [2018-04-13 10:22:04,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:22:04,646 INFO L225 Difference]: With dead ends: 77 [2018-04-13 10:22:04,646 INFO L226 Difference]: Without dead ends: 77 [2018-04-13 10:22:04,646 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=53, Unknown=2, NotChecked=14, Total=90 [2018-04-13 10:22:04,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2018-04-13 10:22:04,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 63. [2018-04-13 10:22:04,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-04-13 10:22:04,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 72 transitions. [2018-04-13 10:22:04,650 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 72 transitions. Word has length 31 [2018-04-13 10:22:04,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:22:04,650 INFO L459 AbstractCegarLoop]: Abstraction has 63 states and 72 transitions. [2018-04-13 10:22:04,650 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-13 10:22:04,650 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 72 transitions. [2018-04-13 10:22:04,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-04-13 10:22:04,651 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:22:04,651 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:22:04,651 INFO L408 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, 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__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:22:04,651 INFO L82 PathProgramCache]: Analyzing trace with hash -2114661359, now seen corresponding path program 1 times [2018-04-13 10:22:04,652 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:22:04,652 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:22:04,652 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:04,652 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:04,653 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:04,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:04,660 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:22:04,674 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-13 10:22:04,674 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:22:04,675 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-13 10:22:04,675 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-13 10:22:04,675 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-13 10:22:04,675 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-13 10:22:04,675 INFO L87 Difference]: Start difference. First operand 63 states and 72 transitions. Second operand 4 states. [2018-04-13 10:22:04,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:22:04,693 INFO L93 Difference]: Finished difference Result 74 states and 83 transitions. [2018-04-13 10:22:04,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-13 10:22:04,693 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-04-13 10:22:04,694 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:22:04,694 INFO L225 Difference]: With dead ends: 74 [2018-04-13 10:22:04,694 INFO L226 Difference]: Without dead ends: 74 [2018-04-13 10:22:04,695 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-13 10:22:04,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2018-04-13 10:22:04,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 68. [2018-04-13 10:22:04,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-04-13 10:22:04,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 77 transitions. [2018-04-13 10:22:04,698 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 77 transitions. Word has length 32 [2018-04-13 10:22:04,698 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:22:04,698 INFO L459 AbstractCegarLoop]: Abstraction has 68 states and 77 transitions. [2018-04-13 10:22:04,698 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-13 10:22:04,698 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 77 transitions. [2018-04-13 10:22:04,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-04-13 10:22:04,699 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:22:04,699 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:22:04,699 INFO L408 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:22:04,699 INFO L82 PathProgramCache]: Analyzing trace with hash 746433175, now seen corresponding path program 1 times [2018-04-13 10:22:04,699 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:22:04,699 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:22:04,700 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:04,700 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:04,700 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:04,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:04,708 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:22:04,710 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:22:04,710 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:22:04,710 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:22:04,710 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:04,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:04,725 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:22:04,782 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-13 10:22:04,782 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:22:04,783 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2018-04-13 10:22:04,783 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-13 10:22:04,783 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-13 10:22:04,783 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=38, Unknown=4, NotChecked=0, Total=56 [2018-04-13 10:22:04,783 INFO L87 Difference]: Start difference. First operand 68 states and 77 transitions. Second operand 8 states. [2018-04-13 10:22:04,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:22:04,876 INFO L93 Difference]: Finished difference Result 77 states and 85 transitions. [2018-04-13 10:22:04,876 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-13 10:22:04,876 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 37 [2018-04-13 10:22:04,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:22:04,877 INFO L225 Difference]: With dead ends: 77 [2018-04-13 10:22:04,877 INFO L226 Difference]: Without dead ends: 66 [2018-04-13 10:22:04,877 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=50, Unknown=4, NotChecked=0, Total=72 [2018-04-13 10:22:04,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-04-13 10:22:04,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2018-04-13 10:22:04,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-04-13 10:22:04,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 74 transitions. [2018-04-13 10:22:04,879 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 74 transitions. Word has length 37 [2018-04-13 10:22:04,879 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:22:04,879 INFO L459 AbstractCegarLoop]: Abstraction has 66 states and 74 transitions. [2018-04-13 10:22:04,879 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-13 10:22:04,879 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 74 transitions. [2018-04-13 10:22:04,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-04-13 10:22:04,880 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:22:04,880 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:22:04,881 INFO L408 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:22:04,881 INFO L82 PathProgramCache]: Analyzing trace with hash -544428488, now seen corresponding path program 1 times [2018-04-13 10:22:04,881 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:22:04,881 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:22:04,882 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:04,882 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:04,882 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:04,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:04,890 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:22:04,914 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-04-13 10:22:04,915 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:22:04,915 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:22:04,916 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:04,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:04,927 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:22:04,944 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-04-13 10:22:04,945 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:22:04,945 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2018-04-13 10:22:04,945 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-13 10:22:04,945 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-13 10:22:04,945 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-04-13 10:22:04,945 INFO L87 Difference]: Start difference. First operand 66 states and 74 transitions. Second operand 7 states. [2018-04-13 10:22:04,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:22:04,969 INFO L93 Difference]: Finished difference Result 106 states and 120 transitions. [2018-04-13 10:22:04,969 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-13 10:22:04,969 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 38 [2018-04-13 10:22:04,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:22:04,970 INFO L225 Difference]: With dead ends: 106 [2018-04-13 10:22:04,970 INFO L226 Difference]: Without dead ends: 106 [2018-04-13 10:22:04,970 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-04-13 10:22:04,970 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-04-13 10:22:04,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 69. [2018-04-13 10:22:04,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-04-13 10:22:04,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 77 transitions. [2018-04-13 10:22:04,973 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 77 transitions. Word has length 38 [2018-04-13 10:22:04,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:22:04,973 INFO L459 AbstractCegarLoop]: Abstraction has 69 states and 77 transitions. [2018-04-13 10:22:04,973 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-13 10:22:04,974 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 77 transitions. [2018-04-13 10:22:04,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-04-13 10:22:04,974 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:22:04,974 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:22:04,975 INFO L408 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:22:04,975 INFO L82 PathProgramCache]: Analyzing trace with hash 515494553, now seen corresponding path program 1 times [2018-04-13 10:22:04,975 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:22:04,975 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:22:04,976 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:04,976 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:04,976 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:04,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:04,984 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:22:05,022 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-04-13 10:22:05,022 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:22:05,022 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-13 10:22:05,022 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-13 10:22:05,022 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-13 10:22:05,022 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-13 10:22:05,023 INFO L87 Difference]: Start difference. First operand 69 states and 77 transitions. Second operand 6 states. [2018-04-13 10:22:05,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:22:05,046 INFO L93 Difference]: Finished difference Result 90 states and 99 transitions. [2018-04-13 10:22:05,046 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-13 10:22:05,047 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 39 [2018-04-13 10:22:05,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:22:05,047 INFO L225 Difference]: With dead ends: 90 [2018-04-13 10:22:05,047 INFO L226 Difference]: Without dead ends: 90 [2018-04-13 10:22:05,048 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-04-13 10:22:05,048 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2018-04-13 10:22:05,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 66. [2018-04-13 10:22:05,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-04-13 10:22:05,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 72 transitions. [2018-04-13 10:22:05,050 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 72 transitions. Word has length 39 [2018-04-13 10:22:05,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:22:05,051 INFO L459 AbstractCegarLoop]: Abstraction has 66 states and 72 transitions. [2018-04-13 10:22:05,051 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-13 10:22:05,051 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 72 transitions. [2018-04-13 10:22:05,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-04-13 10:22:05,052 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:22:05,052 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:22:05,052 INFO L408 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:22:05,052 INFO L82 PathProgramCache]: Analyzing trace with hash 1795846426, now seen corresponding path program 1 times [2018-04-13 10:22:05,052 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:22:05,052 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:22:05,053 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:05,053 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:05,053 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:05,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:05,064 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:22:05,068 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:22:05,068 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:22:05,068 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:22:05,069 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:05,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:05,117 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:22:05,131 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-04-13 10:22:05,132 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:05,152 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-04-13 10:22:05,153 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:05,174 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-04-13 10:22:05,175 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:05,177 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-04-13 10:22:05,177 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:05,194 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:22:05,194 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46 [2018-04-13 10:22:05,337 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,338 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,339 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 56 [2018-04-13 10:22:05,339 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:05,377 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,379 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 44 [2018-04-13 10:22:05,379 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:05,416 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,416 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,417 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 46 [2018-04-13 10:22:05,418 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:05,448 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,449 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,449 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 44 [2018-04-13 10:22:05,449 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:05,472 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-04-13 10:22:05,472 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:85, output treesize:75 [2018-04-13 10:22:05,693 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,694 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,696 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,697 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,697 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 92 [2018-04-13 10:22:05,698 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:05,795 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,795 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,798 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 70 [2018-04-13 10:22:05,799 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:05,874 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,875 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,876 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,876 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,877 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 67 [2018-04-13 10:22:05,878 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:05,964 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,965 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,965 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:05,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 64 [2018-04-13 10:22:05,967 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:06,046 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:06,047 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:06,047 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:06,048 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:06,049 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:06,050 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 88 [2018-04-13 10:22:06,051 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:06,124 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:06,124 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:06,125 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:06,126 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:06,126 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 64 [2018-04-13 10:22:06,127 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:06,209 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:06,209 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:06,210 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:06,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 62 [2018-04-13 10:22:06,211 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:06,279 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:06,280 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:06,281 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:06,282 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 77 [2018-04-13 10:22:06,282 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:06,342 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 8 dim-1 vars, End of recursive call: 16 dim-0 vars, and 4 xjuncts. [2018-04-13 10:22:06,342 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 24 variables, input treesize:253, output treesize:205 [2018-04-13 10:22:23,143 WARN L151 SmtUtils]: Spent 16746ms on a formula simplification. DAG size of input: 98 DAG size of output 78 [2018-04-13 10:22:23,161 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 2 proven. 19 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-04-13 10:22:23,161 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:22:23,161 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2018-04-13 10:22:23,161 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-13 10:22:23,161 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-13 10:22:23,162 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=200, Unknown=3, NotChecked=0, Total=240 [2018-04-13 10:22:23,162 INFO L87 Difference]: Start difference. First operand 66 states and 72 transitions. Second operand 16 states. [2018-04-13 10:22:48,782 WARN L151 SmtUtils]: Spent 14634ms on a formula simplification. DAG size of input: 96 DAG size of output 94 [2018-04-13 10:22:48,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:22:48,885 INFO L93 Difference]: Finished difference Result 93 states and 101 transitions. [2018-04-13 10:22:48,890 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-13 10:22:48,890 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 44 [2018-04-13 10:22:48,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:22:48,891 INFO L225 Difference]: With dead ends: 93 [2018-04-13 10:22:48,891 INFO L226 Difference]: Without dead ends: 93 [2018-04-13 10:22:48,891 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 107 ImplicationChecksByTransitivity, 32.0s TimeCoverageRelationStatistics Valid=115, Invalid=634, Unknown=7, NotChecked=0, Total=756 [2018-04-13 10:22:48,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2018-04-13 10:22:48,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 70. [2018-04-13 10:22:48,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-04-13 10:22:48,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 78 transitions. [2018-04-13 10:22:48,893 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 78 transitions. Word has length 44 [2018-04-13 10:22:48,893 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:22:48,893 INFO L459 AbstractCegarLoop]: Abstraction has 70 states and 78 transitions. [2018-04-13 10:22:48,894 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-13 10:22:48,894 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 78 transitions. [2018-04-13 10:22:48,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-04-13 10:22:48,894 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:22:48,894 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:22:48,894 INFO L408 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:22:48,895 INFO L82 PathProgramCache]: Analyzing trace with hash 1076958221, now seen corresponding path program 1 times [2018-04-13 10:22:48,895 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:22:48,895 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:22:48,896 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:48,896 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:48,896 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:48,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:48,904 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:22:48,947 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-04-13 10:22:48,948 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:22:48,948 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-13 10:22:48,948 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-13 10:22:48,948 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-13 10:22:48,948 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-13 10:22:48,948 INFO L87 Difference]: Start difference. First operand 70 states and 78 transitions. Second operand 6 states. [2018-04-13 10:22:49,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:22:49,024 INFO L93 Difference]: Finished difference Result 73 states and 80 transitions. [2018-04-13 10:22:49,024 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-13 10:22:49,024 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 45 [2018-04-13 10:22:49,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:22:49,025 INFO L225 Difference]: With dead ends: 73 [2018-04-13 10:22:49,025 INFO L226 Difference]: Without dead ends: 73 [2018-04-13 10:22:49,025 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-13 10:22:49,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-04-13 10:22:49,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 70. [2018-04-13 10:22:49,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-04-13 10:22:49,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 77 transitions. [2018-04-13 10:22:49,028 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 77 transitions. Word has length 45 [2018-04-13 10:22:49,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:22:49,028 INFO L459 AbstractCegarLoop]: Abstraction has 70 states and 77 transitions. [2018-04-13 10:22:49,028 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-13 10:22:49,028 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 77 transitions. [2018-04-13 10:22:49,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-04-13 10:22:49,029 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:22:49,029 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:22:49,029 INFO L408 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:22:49,029 INFO L82 PathProgramCache]: Analyzing trace with hash -974033432, now seen corresponding path program 1 times [2018-04-13 10:22:49,030 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:22:49,030 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:22:49,030 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:49,030 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:49,031 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:49,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:49,043 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:22:49,214 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-04-13 10:22:49,214 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:22:49,214 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:22:49,215 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:49,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:49,234 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:22:49,324 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:22:49,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:22:49,326 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:49,328 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:22:49,333 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:22:49,334 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-04-13 10:22:49,393 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-04-13 10:22:49,395 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:22:49,396 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-04-13 10:22:49,396 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:49,398 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:22:49,400 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:22:49,400 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:27, output treesize:3 [2018-04-13 10:22:49,406 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 7 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-04-13 10:22:49,407 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:22:49,407 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 15] total 20 [2018-04-13 10:22:49,407 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-04-13 10:22:49,407 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-04-13 10:22:49,407 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=347, Unknown=0, NotChecked=0, Total=420 [2018-04-13 10:22:49,408 INFO L87 Difference]: Start difference. First operand 70 states and 77 transitions. Second operand 21 states. [2018-04-13 10:22:49,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:22:49,540 INFO L93 Difference]: Finished difference Result 105 states and 112 transitions. [2018-04-13 10:22:49,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-04-13 10:22:49,540 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 46 [2018-04-13 10:22:49,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:22:49,540 INFO L225 Difference]: With dead ends: 105 [2018-04-13 10:22:49,540 INFO L226 Difference]: Without dead ends: 105 [2018-04-13 10:22:49,541 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 37 SyntacticMatches, 5 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 244 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=132, Invalid=680, Unknown=0, NotChecked=0, Total=812 [2018-04-13 10:22:49,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-04-13 10:22:49,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 92. [2018-04-13 10:22:49,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-04-13 10:22:49,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 103 transitions. [2018-04-13 10:22:49,544 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 103 transitions. Word has length 46 [2018-04-13 10:22:49,545 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:22:49,545 INFO L459 AbstractCegarLoop]: Abstraction has 92 states and 103 transitions. [2018-04-13 10:22:49,545 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-04-13 10:22:49,545 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 103 transitions. [2018-04-13 10:22:49,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-04-13 10:22:49,545 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:22:49,545 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:22:49,546 INFO L408 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, 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__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:22:49,546 INFO L82 PathProgramCache]: Analyzing trace with hash -130265140, now seen corresponding path program 1 times [2018-04-13 10:22:49,546 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:22:49,546 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:22:49,547 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:49,547 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:49,547 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:49,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:49,558 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:22:49,718 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-04-13 10:22:49,719 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:22:49,719 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:22:49,719 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:49,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:49,738 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:22:49,807 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:22:49,807 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:49,808 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:22:49,808 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:22:49,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:22:49,838 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:22:49,839 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:49,840 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:22:49,845 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:22:49,845 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:34, output treesize:27 [2018-04-13 10:22:49,861 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 1 [2018-04-13 10:22:49,861 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:49,862 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:22:49,862 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:3 [2018-04-13 10:22:49,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-13 10:22:49,873 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:22:49,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-13 10:22:49,874 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:49,876 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:22:49,878 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:22:49,879 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:5 [2018-04-13 10:22:49,881 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-04-13 10:22:49,881 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:22:49,881 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 22 [2018-04-13 10:22:49,881 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-04-13 10:22:49,881 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-04-13 10:22:49,881 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=432, Unknown=0, NotChecked=0, Total=506 [2018-04-13 10:22:49,881 INFO L87 Difference]: Start difference. First operand 92 states and 103 transitions. Second operand 23 states. [2018-04-13 10:22:50,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:22:50,092 INFO L93 Difference]: Finished difference Result 98 states and 109 transitions. [2018-04-13 10:22:50,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-04-13 10:22:50,093 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 47 [2018-04-13 10:22:50,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:22:50,093 INFO L225 Difference]: With dead ends: 98 [2018-04-13 10:22:50,093 INFO L226 Difference]: Without dead ends: 98 [2018-04-13 10:22:50,094 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 38 SyntacticMatches, 3 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 182 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=117, Invalid=695, Unknown=0, NotChecked=0, Total=812 [2018-04-13 10:22:50,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-04-13 10:22:50,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 94. [2018-04-13 10:22:50,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-04-13 10:22:50,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 105 transitions. [2018-04-13 10:22:50,097 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 105 transitions. Word has length 47 [2018-04-13 10:22:50,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:22:50,097 INFO L459 AbstractCegarLoop]: Abstraction has 94 states and 105 transitions. [2018-04-13 10:22:50,097 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-04-13 10:22:50,097 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 105 transitions. [2018-04-13 10:22:50,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-04-13 10:22:50,098 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:22:50,098 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:22:50,098 INFO L408 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:22:50,098 INFO L82 PathProgramCache]: Analyzing trace with hash 588646427, now seen corresponding path program 1 times [2018-04-13 10:22:50,098 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:22:50,098 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:22:50,099 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:50,099 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:50,099 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:50,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:50,107 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:22:50,144 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-04-13 10:22:50,145 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:22:50,145 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:22:50,145 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:50,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:50,153 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:22:50,164 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-04-13 10:22:50,165 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:22:50,167 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 6 [2018-04-13 10:22:50,167 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-13 10:22:50,167 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-13 10:22:50,167 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-13 10:22:50,168 INFO L87 Difference]: Start difference. First operand 94 states and 105 transitions. Second operand 6 states. [2018-04-13 10:22:50,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:22:50,194 INFO L93 Difference]: Finished difference Result 92 states and 101 transitions. [2018-04-13 10:22:50,194 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-13 10:22:50,194 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 50 [2018-04-13 10:22:50,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:22:50,194 INFO L225 Difference]: With dead ends: 92 [2018-04-13 10:22:50,194 INFO L226 Difference]: Without dead ends: 92 [2018-04-13 10:22:50,195 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 50 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-04-13 10:22:50,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2018-04-13 10:22:50,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2018-04-13 10:22:50,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-04-13 10:22:50,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 101 transitions. [2018-04-13 10:22:50,197 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 101 transitions. Word has length 50 [2018-04-13 10:22:50,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:22:50,197 INFO L459 AbstractCegarLoop]: Abstraction has 92 states and 101 transitions. [2018-04-13 10:22:50,197 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-13 10:22:50,197 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 101 transitions. [2018-04-13 10:22:50,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-04-13 10:22:50,197 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:22:50,197 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:22:50,197 INFO L408 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:22:50,198 INFO L82 PathProgramCache]: Analyzing trace with hash -1006623327, now seen corresponding path program 1 times [2018-04-13 10:22:50,198 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:22:50,198 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:22:50,198 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:50,198 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:50,198 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:50,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:50,223 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:22:50,252 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-04-13 10:22:50,252 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:22:50,252 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:22:50,253 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:50,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:50,267 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:22:50,299 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-04-13 10:22:50,299 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:22:50,299 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 9 [2018-04-13 10:22:50,299 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-13 10:22:50,300 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-13 10:22:50,300 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=39, Unknown=0, NotChecked=0, Total=72 [2018-04-13 10:22:50,300 INFO L87 Difference]: Start difference. First operand 92 states and 101 transitions. Second operand 9 states. [2018-04-13 10:22:50,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:22:50,341 INFO L93 Difference]: Finished difference Result 134 states and 143 transitions. [2018-04-13 10:22:50,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-13 10:22:50,341 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 52 [2018-04-13 10:22:50,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:22:50,342 INFO L225 Difference]: With dead ends: 134 [2018-04-13 10:22:50,342 INFO L226 Difference]: Without dead ends: 134 [2018-04-13 10:22:50,342 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 50 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=39, Unknown=0, NotChecked=0, Total=72 [2018-04-13 10:22:50,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-04-13 10:22:50,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 95. [2018-04-13 10:22:50,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-04-13 10:22:50,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 104 transitions. [2018-04-13 10:22:50,345 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 104 transitions. Word has length 52 [2018-04-13 10:22:50,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:22:50,345 INFO L459 AbstractCegarLoop]: Abstraction has 95 states and 104 transitions. [2018-04-13 10:22:50,346 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-13 10:22:50,346 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 104 transitions. [2018-04-13 10:22:50,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-04-13 10:22:50,346 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:22:50,346 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:22:50,346 INFO L408 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:22:50,347 INFO L82 PathProgramCache]: Analyzing trace with hash 1312052608, now seen corresponding path program 1 times [2018-04-13 10:22:50,347 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:22:50,347 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:22:50,348 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:50,348 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:50,348 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:50,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:50,355 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:22:50,379 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 5 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-04-13 10:22:50,379 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:22:50,379 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:22:50,380 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:50,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:50,391 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:22:50,401 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 5 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-04-13 10:22:50,401 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:22:50,402 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2018-04-13 10:22:50,402 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-13 10:22:50,402 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-13 10:22:50,402 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-04-13 10:22:50,402 INFO L87 Difference]: Start difference. First operand 95 states and 104 transitions. Second operand 7 states. [2018-04-13 10:22:50,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:22:50,448 INFO L93 Difference]: Finished difference Result 98 states and 103 transitions. [2018-04-13 10:22:50,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-13 10:22:50,449 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 53 [2018-04-13 10:22:50,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:22:50,449 INFO L225 Difference]: With dead ends: 98 [2018-04-13 10:22:50,449 INFO L226 Difference]: Without dead ends: 98 [2018-04-13 10:22:50,450 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2018-04-13 10:22:50,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-04-13 10:22:50,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 92. [2018-04-13 10:22:50,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-04-13 10:22:50,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 97 transitions. [2018-04-13 10:22:50,452 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 97 transitions. Word has length 53 [2018-04-13 10:22:50,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:22:50,453 INFO L459 AbstractCegarLoop]: Abstraction has 92 states and 97 transitions. [2018-04-13 10:22:50,453 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-13 10:22:50,453 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 97 transitions. [2018-04-13 10:22:50,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-04-13 10:22:50,453 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:22:50,453 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:22:50,454 INFO L408 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:22:50,454 INFO L82 PathProgramCache]: Analyzing trace with hash 2018923856, now seen corresponding path program 1 times [2018-04-13 10:22:50,454 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:22:50,454 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:22:50,455 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:50,455 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:50,455 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:22:50,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:50,466 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:22:50,471 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:22:50,471 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:22:50,471 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:22:50,472 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:22:50,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:22:50,492 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:22:50,495 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:22:50,495 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:50,497 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:22:50,497 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:22:50,543 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:50,544 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:50,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-13 10:22:50,545 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:50,547 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:22:50,548 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:8 [2018-04-13 10:22:50,575 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:22:50,577 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:22:50,578 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:50,579 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:22:50,587 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:22:50,587 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:35, output treesize:28 [2018-04-13 10:22:50,613 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 10:22:50,613 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:50,620 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:22:50,620 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:31, output treesize:26 [2018-04-13 10:22:54,638 WARN L148 SmtUtils]: Spent 2003ms on a formula simplification that was a NOOP. DAG size: 20 [2018-04-13 10:22:54,662 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-04-13 10:22:54,667 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 21 [2018-04-13 10:22:54,667 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 10:22:54,671 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:22:54,677 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-04-13 10:22:54,678 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:46, output treesize:63 [2018-04-13 10:22:54,724 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:54,728 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 37 treesize of output 40 [2018-04-13 10:22:54,728 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:22:54,750 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:22:54,750 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 38 [2018-04-13 10:22:54,750 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:22:54,771 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-1 vars, End of recursive call: 5 dim-0 vars, and 3 xjuncts. [2018-04-13 10:22:54,771 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:71, output treesize:96 [2018-04-13 10:22:54,927 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 7 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:22:54,927 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:22:54,927 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18] total 18 [2018-04-13 10:22:54,927 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-13 10:22:54,928 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-13 10:22:54,928 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=300, Unknown=1, NotChecked=0, Total=342 [2018-04-13 10:22:54,928 INFO L87 Difference]: Start difference. First operand 92 states and 97 transitions. Second operand 19 states. [2018-04-13 10:23:12,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:23:12,071 INFO L93 Difference]: Finished difference Result 105 states and 110 transitions. [2018-04-13 10:23:12,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-13 10:23:12,072 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 54 [2018-04-13 10:23:12,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:23:12,072 INFO L225 Difference]: With dead ends: 105 [2018-04-13 10:23:12,072 INFO L226 Difference]: Without dead ends: 105 [2018-04-13 10:23:12,073 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 35 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=79, Invalid=570, Unknown=1, NotChecked=0, Total=650 [2018-04-13 10:23:12,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-04-13 10:23:12,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 100. [2018-04-13 10:23:12,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-04-13 10:23:12,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 105 transitions. [2018-04-13 10:23:12,074 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 105 transitions. Word has length 54 [2018-04-13 10:23:12,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:23:12,075 INFO L459 AbstractCegarLoop]: Abstraction has 100 states and 105 transitions. [2018-04-13 10:23:12,075 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-13 10:23:12,075 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 105 transitions. [2018-04-13 10:23:12,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-04-13 10:23:12,075 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:23:12,075 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:23:12,075 INFO L408 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:23:12,075 INFO L82 PathProgramCache]: Analyzing trace with hash -1227188458, now seen corresponding path program 2 times [2018-04-13 10:23:12,075 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:23:12,075 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:23:12,076 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:23:12,076 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:23:12,076 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:23:12,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:23:12,086 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:23:12,089 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:23:12,089 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:23:12,089 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:23:12,090 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:23:12,127 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:23:12,127 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:23:12,130 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:23:12,141 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-04-13 10:23:12,141 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:12,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-04-13 10:23:12,156 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:12,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-04-13 10:23:12,173 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:12,175 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-04-13 10:23:12,175 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:12,187 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:23:12,188 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46 [2018-04-13 10:23:12,324 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:12,325 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:12,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 50 [2018-04-13 10:23:12,326 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:12,351 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:12,351 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:12,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 37 [2018-04-13 10:23:12,352 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:12,374 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:12,375 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 38 [2018-04-13 10:23:12,375 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:12,418 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:12,419 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:12,420 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 35 [2018-04-13 10:23:12,420 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:12,444 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-04-13 10:23:12,444 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:73, output treesize:55 [2018-04-13 10:23:12,662 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:12,665 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:12,666 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:12,667 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:12,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 56 treesize of output 87 [2018-04-13 10:23:12,677 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:23:12,856 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:12,857 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:12,858 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 56 [2018-04-13 10:23:12,858 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:12,860 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:12,860 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:12,861 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 50 [2018-04-13 10:23:12,861 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:12,954 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:12,955 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:12,956 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:12,956 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:12,963 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 58 treesize of output 89 [2018-04-13 10:23:12,963 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-04-13 10:23:13,097 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:13,098 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:13,098 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 58 [2018-04-13 10:23:13,099 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:13,100 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:13,101 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:13,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 52 [2018-04-13 10:23:13,102 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:13,210 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:13,218 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 58 treesize of output 65 [2018-04-13 10:23:13,218 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 2 xjuncts. [2018-04-13 10:23:13,355 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:13,356 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:13,356 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 50 [2018-04-13 10:23:13,357 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:13,359 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:13,359 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:13,360 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 58 [2018-04-13 10:23:13,360 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:13,464 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:13,466 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:13,467 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:13,473 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 60 treesize of output 87 [2018-04-13 10:23:13,474 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-04-13 10:23:13,624 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:13,624 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:13,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 60 [2018-04-13 10:23:13,625 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:13,627 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:13,628 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:13,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 52 [2018-04-13 10:23:13,629 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:13,748 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 8 dim-1 vars, End of recursive call: 24 dim-0 vars, and 8 xjuncts. [2018-04-13 10:23:13,749 INFO L202 ElimStorePlain]: Needed 13 recursive calls to eliminate 24 variables, input treesize:233, output treesize:333 [2018-04-13 10:23:14,012 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:14,013 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:14,013 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 59 [2018-04-13 10:23:14,014 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:14,079 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:14,079 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:14,081 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:14,082 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:14,087 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 56 treesize of output 87 [2018-04-13 10:23:14,087 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 10:23:14,188 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:14,188 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:14,189 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 56 [2018-04-13 10:23:14,189 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:14,192 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:14,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:14,193 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 50 [2018-04-13 10:23:14,193 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:14,277 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:14,278 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:14,278 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 61 [2018-04-13 10:23:14,278 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:14,387 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 55 [2018-04-13 10:23:14,387 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-13 10:23:14,488 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:14,489 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:14,495 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 54 treesize of output 77 [2018-04-13 10:23:14,495 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 2 xjuncts. [2018-04-13 10:23:14,617 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:14,618 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:14,618 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 59 [2018-04-13 10:23:14,619 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:14,748 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:14,749 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:14,749 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:23:14,755 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 79 [2018-04-13 10:23:14,755 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 2 xjuncts. [2018-04-13 10:23:14,895 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 8 dim-1 vars, End of recursive call: 24 dim-0 vars, and 8 xjuncts. [2018-04-13 10:23:14,896 INFO L202 ElimStorePlain]: Needed 10 recursive calls to eliminate 24 variables, input treesize:233, output treesize:333 [2018-04-13 10:23:15,004 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 3 proven. 34 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-04-13 10:23:15,005 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:23:15,005 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16] total 16 [2018-04-13 10:23:15,005 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-13 10:23:15,005 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-13 10:23:15,005 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=229, Unknown=4, NotChecked=0, Total=272 [2018-04-13 10:23:15,005 INFO L87 Difference]: Start difference. First operand 100 states and 105 transitions. Second operand 17 states. [2018-04-13 10:23:26,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:23:26,032 INFO L93 Difference]: Finished difference Result 146 states and 157 transitions. [2018-04-13 10:23:26,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-04-13 10:23:26,032 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 57 [2018-04-13 10:23:26,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:23:26,033 INFO L225 Difference]: With dead ends: 146 [2018-04-13 10:23:26,033 INFO L226 Difference]: Without dead ends: 146 [2018-04-13 10:23:26,034 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 38 SyntacticMatches, 3 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 148 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=119, Invalid=802, Unknown=9, NotChecked=0, Total=930 [2018-04-13 10:23:26,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-04-13 10:23:26,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 104. [2018-04-13 10:23:26,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-04-13 10:23:26,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 111 transitions. [2018-04-13 10:23:26,038 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 111 transitions. Word has length 57 [2018-04-13 10:23:26,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:23:26,038 INFO L459 AbstractCegarLoop]: Abstraction has 104 states and 111 transitions. [2018-04-13 10:23:26,038 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-13 10:23:26,038 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 111 transitions. [2018-04-13 10:23:26,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-04-13 10:23:26,039 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:23:26,039 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:23:26,039 INFO L408 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:23:26,039 INFO L82 PathProgramCache]: Analyzing trace with hash 1582302436, now seen corresponding path program 2 times [2018-04-13 10:23:26,039 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:23:26,039 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:23:26,040 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:23:26,040 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:23:26,040 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:23:26,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:23:26,052 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:23:26,177 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 6 proven. 21 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-04-13 10:23:26,177 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:23:26,177 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:23:26,178 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:23:26,190 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:23:26,190 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:23:26,192 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:23:26,243 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:23:26,251 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:23:26,251 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:26,253 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:23:26,256 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:23:26,257 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:23:26,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-13 10:23:26,350 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-13 10:23:26,350 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:26,351 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:23:26,352 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:23:26,352 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:15, output treesize:3 [2018-04-13 10:23:26,364 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 11 proven. 24 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-04-13 10:23:26,364 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:23:26,364 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14] total 21 [2018-04-13 10:23:26,365 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-04-13 10:23:26,365 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-04-13 10:23:26,365 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=402, Unknown=0, NotChecked=0, Total=462 [2018-04-13 10:23:26,365 INFO L87 Difference]: Start difference. First operand 104 states and 111 transitions. Second operand 22 states. [2018-04-13 10:23:27,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:23:27,051 INFO L93 Difference]: Finished difference Result 144 states and 152 transitions. [2018-04-13 10:23:27,051 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-04-13 10:23:27,051 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 59 [2018-04-13 10:23:27,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:23:27,052 INFO L225 Difference]: With dead ends: 144 [2018-04-13 10:23:27,052 INFO L226 Difference]: Without dead ends: 144 [2018-04-13 10:23:27,053 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 109 GetRequests, 58 SyntacticMatches, 4 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 461 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=374, Invalid=1978, Unknown=0, NotChecked=0, Total=2352 [2018-04-13 10:23:27,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-04-13 10:23:27,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 105. [2018-04-13 10:23:27,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-04-13 10:23:27,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 112 transitions. [2018-04-13 10:23:27,055 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 112 transitions. Word has length 59 [2018-04-13 10:23:27,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:23:27,055 INFO L459 AbstractCegarLoop]: Abstraction has 105 states and 112 transitions. [2018-04-13 10:23:27,055 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-04-13 10:23:27,055 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 112 transitions. [2018-04-13 10:23:27,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-04-13 10:23:27,055 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:23:27,055 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:23:27,055 INFO L408 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:23:27,055 INFO L82 PathProgramCache]: Analyzing trace with hash 266702631, now seen corresponding path program 1 times [2018-04-13 10:23:27,056 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:23:27,056 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:23:27,056 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:23:27,056 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:23:27,056 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:23:27,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:23:27,063 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:23:27,065 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:23:27,065 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:23:27,065 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:23:27,065 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:23:27,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:23:27,079 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:23:27,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 49 [2018-04-13 10:23:27,169 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:23:27,169 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:27,178 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:23:27,180 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 49 [2018-04-13 10:23:27,182 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:23:27,182 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:27,191 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:23:27,234 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-04-13 10:23:27,234 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:105, output treesize:107 [2018-04-13 10:23:27,301 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 30 [2018-04-13 10:23:27,301 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:27,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 30 [2018-04-13 10:23:27,325 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:23:27,342 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 2 dim-1 vars, End of recursive call: 6 dim-0 vars, and 2 xjuncts. [2018-04-13 10:23:27,342 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 8 variables, input treesize:79, output treesize:61 [2018-04-13 10:23:33,371 WARN L151 SmtUtils]: Spent 4011ms on a formula simplification. DAG size of input: 39 DAG size of output 22 [2018-04-13 10:23:37,436 WARN L151 SmtUtils]: Spent 2032ms on a formula simplification. DAG size of input: 58 DAG size of output 43 [2018-04-13 10:23:37,455 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 65 [2018-04-13 10:23:37,460 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 34 [2018-04-13 10:23:37,461 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 10:23:37,475 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 10:23:37,509 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 65 [2018-04-13 10:23:37,514 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 34 [2018-04-13 10:23:37,515 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 10:23:37,527 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 10:23:37,572 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 6 dim-0 vars, and 4 xjuncts. [2018-04-13 10:23:37,573 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:143, output treesize:201 [2018-04-13 10:23:40,080 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 11 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-04-13 10:23:40,081 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:23:40,081 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18] total 18 [2018-04-13 10:23:40,081 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-13 10:23:40,081 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-13 10:23:40,081 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=274, Unknown=27, NotChecked=0, Total=342 [2018-04-13 10:23:40,081 INFO L87 Difference]: Start difference. First operand 105 states and 112 transitions. Second operand 19 states. [2018-04-13 10:24:01,346 WARN L151 SmtUtils]: Spent 139ms on a formula simplification. DAG size of input: 123 DAG size of output 90 [2018-04-13 10:24:07,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:24:07,569 INFO L93 Difference]: Finished difference Result 109 states and 115 transitions. [2018-04-13 10:24:07,569 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-04-13 10:24:07,569 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 58 [2018-04-13 10:24:07,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:24:07,570 INFO L225 Difference]: With dead ends: 109 [2018-04-13 10:24:07,570 INFO L226 Difference]: Without dead ends: 88 [2018-04-13 10:24:07,570 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 39 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 13.0s TimeCoverageRelationStatistics Valid=66, Invalid=452, Unknown=34, NotChecked=0, Total=552 [2018-04-13 10:24:07,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-04-13 10:24:07,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 88. [2018-04-13 10:24:07,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-04-13 10:24:07,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 94 transitions. [2018-04-13 10:24:07,572 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 94 transitions. Word has length 58 [2018-04-13 10:24:07,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:24:07,572 INFO L459 AbstractCegarLoop]: Abstraction has 88 states and 94 transitions. [2018-04-13 10:24:07,572 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-13 10:24:07,573 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 94 transitions. [2018-04-13 10:24:07,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-04-13 10:24:07,573 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:24:07,573 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:24:07,573 INFO L408 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:24:07,574 INFO L82 PathProgramCache]: Analyzing trace with hash 1806735440, now seen corresponding path program 2 times [2018-04-13 10:24:07,574 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:24:07,574 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:24:07,575 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:07,575 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:24:07,575 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:07,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:24:07,586 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:24:07,748 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 14 proven. 24 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-04-13 10:24:07,748 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:24:07,748 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:24:07,749 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:24:07,765 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:24:07,766 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:24:07,769 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:24:07,822 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:24:07,822 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:07,823 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:07,823 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:24:07,862 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:24:07,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:24:07,864 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:07,865 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:07,870 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:07,870 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:20 [2018-04-13 10:24:07,916 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 1 [2018-04-13 10:24:07,917 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:07,918 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:07,918 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:3 [2018-04-13 10:24:07,939 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-04-13 10:24:07,941 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-04-13 10:24:07,941 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:07,942 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:07,942 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:07,943 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-04-13 10:24:07,947 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 11 proven. 27 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-04-13 10:24:07,948 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:24:07,948 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 23 [2018-04-13 10:24:07,948 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-13 10:24:07,948 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-13 10:24:07,949 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=491, Unknown=0, NotChecked=0, Total=552 [2018-04-13 10:24:07,949 INFO L87 Difference]: Start difference. First operand 88 states and 94 transitions. Second operand 24 states. [2018-04-13 10:24:08,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:24:08,546 INFO L93 Difference]: Finished difference Result 106 states and 112 transitions. [2018-04-13 10:24:08,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-04-13 10:24:08,546 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 60 [2018-04-13 10:24:08,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:24:08,547 INFO L225 Difference]: With dead ends: 106 [2018-04-13 10:24:08,547 INFO L226 Difference]: Without dead ends: 106 [2018-04-13 10:24:08,547 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 60 SyntacticMatches, 2 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 475 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=303, Invalid=2247, Unknown=0, NotChecked=0, Total=2550 [2018-04-13 10:24:08,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-04-13 10:24:08,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 89. [2018-04-13 10:24:08,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-04-13 10:24:08,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 95 transitions. [2018-04-13 10:24:08,550 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 95 transitions. Word has length 60 [2018-04-13 10:24:08,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:24:08,550 INFO L459 AbstractCegarLoop]: Abstraction has 89 states and 95 transitions. [2018-04-13 10:24:08,550 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-13 10:24:08,550 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 95 transitions. [2018-04-13 10:24:08,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-04-13 10:24:08,551 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:24:08,551 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:24:08,551 INFO L408 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:24:08,551 INFO L82 PathProgramCache]: Analyzing trace with hash 1644768004, now seen corresponding path program 2 times [2018-04-13 10:24:08,551 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:24:08,551 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:24:08,551 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:08,552 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:24:08,552 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:08,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:24:08,560 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:24:08,567 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:24:08,568 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:24:08,568 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:24:08,568 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:24:08,582 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:24:08,582 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:24:08,584 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:24:08,600 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 10:24:08,600 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:08,602 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:08,602 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:7 [2018-04-13 10:24:08,615 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-04-13 10:24:08,615 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:08,623 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-04-13 10:24:08,624 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:08,631 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:24:08,631 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:30 [2018-04-13 10:24:08,679 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:24:08,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:24:08,680 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:08,681 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:08,685 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:08,685 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:20 [2018-04-13 10:24:08,712 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 1 [2018-04-13 10:24:08,712 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:08,713 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:08,714 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:3 [2018-04-13 10:24:08,744 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:08,745 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:08,745 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-04-13 10:24:08,746 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:08,750 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-04-13 10:24:08,751 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:24:08,751 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2018-04-13 10:24:08,751 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:08,753 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:08,755 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:08,755 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:36, output treesize:13 [2018-04-13 10:24:08,767 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:08,767 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:24:08,767 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:08,771 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:24:08,771 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:14 [2018-04-13 10:24:08,819 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 14 proven. 31 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-04-13 10:24:08,819 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:24:08,820 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20] total 20 [2018-04-13 10:24:08,820 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-04-13 10:24:08,820 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-04-13 10:24:08,820 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=369, Unknown=0, NotChecked=0, Total=420 [2018-04-13 10:24:08,820 INFO L87 Difference]: Start difference. First operand 89 states and 95 transitions. Second operand 21 states. [2018-04-13 10:24:09,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:24:09,249 INFO L93 Difference]: Finished difference Result 130 states and 138 transitions. [2018-04-13 10:24:09,249 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-13 10:24:09,249 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 66 [2018-04-13 10:24:09,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:24:09,250 INFO L225 Difference]: With dead ends: 130 [2018-04-13 10:24:09,250 INFO L226 Difference]: Without dead ends: 130 [2018-04-13 10:24:09,250 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 128 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=117, Invalid=813, Unknown=0, NotChecked=0, Total=930 [2018-04-13 10:24:09,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-04-13 10:24:09,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 105. [2018-04-13 10:24:09,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-04-13 10:24:09,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 113 transitions. [2018-04-13 10:24:09,252 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 113 transitions. Word has length 66 [2018-04-13 10:24:09,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:24:09,252 INFO L459 AbstractCegarLoop]: Abstraction has 105 states and 113 transitions. [2018-04-13 10:24:09,252 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-04-13 10:24:09,252 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 113 transitions. [2018-04-13 10:24:09,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-04-13 10:24:09,253 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:24:09,253 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:24:09,253 INFO L408 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, 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__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:24:09,253 INFO L82 PathProgramCache]: Analyzing trace with hash 1644768005, now seen corresponding path program 1 times [2018-04-13 10:24:09,253 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:24:09,253 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:24:09,254 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:09,254 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:24:09,254 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:09,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:24:09,260 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:24:09,293 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 17 proven. 3 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-04-13 10:24:09,294 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:24:09,294 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:24:09,294 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:24:09,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:24:09,303 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:24:09,434 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 3 proven. 11 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-04-13 10:24:09,434 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:24:09,434 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6] total 12 [2018-04-13 10:24:09,434 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-04-13 10:24:09,435 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-04-13 10:24:09,435 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=122, Unknown=0, NotChecked=0, Total=156 [2018-04-13 10:24:09,435 INFO L87 Difference]: Start difference. First operand 105 states and 113 transitions. Second operand 13 states. [2018-04-13 10:24:09,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:24:09,676 INFO L93 Difference]: Finished difference Result 115 states and 123 transitions. [2018-04-13 10:24:09,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-13 10:24:09,677 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 66 [2018-04-13 10:24:09,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:24:09,677 INFO L225 Difference]: With dead ends: 115 [2018-04-13 10:24:09,677 INFO L226 Difference]: Without dead ends: 115 [2018-04-13 10:24:09,678 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=108, Invalid=312, Unknown=0, NotChecked=0, Total=420 [2018-04-13 10:24:09,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-04-13 10:24:09,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 104. [2018-04-13 10:24:09,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-04-13 10:24:09,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 111 transitions. [2018-04-13 10:24:09,681 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 111 transitions. Word has length 66 [2018-04-13 10:24:09,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:24:09,681 INFO L459 AbstractCegarLoop]: Abstraction has 104 states and 111 transitions. [2018-04-13 10:24:09,681 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-04-13 10:24:09,681 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 111 transitions. [2018-04-13 10:24:09,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-04-13 10:24:09,682 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:24:09,682 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:24:09,682 INFO L408 AbstractCegarLoop]: === Iteration 30 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:24:09,682 INFO L82 PathProgramCache]: Analyzing trace with hash -551799312, now seen corresponding path program 1 times [2018-04-13 10:24:09,682 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:24:09,682 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:24:09,683 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:09,683 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:24:09,683 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:09,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:24:09,696 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:24:09,701 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:24:09,701 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:24:09,701 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:24:09,701 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:24:09,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:24:09,721 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:24:09,774 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:24:09,776 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:24:09,777 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:09,779 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:09,785 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:09,785 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-04-13 10:24:09,869 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 22 [2018-04-13 10:24:09,881 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 22 treesize of output 35 [2018-04-13 10:24:09,881 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 10:24:09,889 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:24:09,905 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 10:24:09,905 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:45, output treesize:45 [2018-04-13 10:24:10,060 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-13 10:24:10,062 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:24:10,062 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-13 10:24:10,062 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:10,064 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:10,069 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:10,069 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:49, output treesize:3 [2018-04-13 10:24:10,085 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 12 proven. 32 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-04-13 10:24:10,086 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:24:10,086 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19] total 19 [2018-04-13 10:24:10,086 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-13 10:24:10,086 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-13 10:24:10,086 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=316, Unknown=0, NotChecked=0, Total=380 [2018-04-13 10:24:10,086 INFO L87 Difference]: Start difference. First operand 104 states and 111 transitions. Second operand 20 states. [2018-04-13 10:24:10,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:24:10,641 INFO L93 Difference]: Finished difference Result 126 states and 133 transitions. [2018-04-13 10:24:10,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-04-13 10:24:10,641 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 67 [2018-04-13 10:24:10,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:24:10,641 INFO L225 Difference]: With dead ends: 126 [2018-04-13 10:24:10,641 INFO L226 Difference]: Without dead ends: 126 [2018-04-13 10:24:10,642 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 49 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 200 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=153, Invalid=777, Unknown=0, NotChecked=0, Total=930 [2018-04-13 10:24:10,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-04-13 10:24:10,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 112. [2018-04-13 10:24:10,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-04-13 10:24:10,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 122 transitions. [2018-04-13 10:24:10,645 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 122 transitions. Word has length 67 [2018-04-13 10:24:10,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:24:10,645 INFO L459 AbstractCegarLoop]: Abstraction has 112 states and 122 transitions. [2018-04-13 10:24:10,645 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-13 10:24:10,645 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 122 transitions. [2018-04-13 10:24:10,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-04-13 10:24:10,646 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:24:10,646 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:24:10,646 INFO L408 AbstractCegarLoop]: === Iteration 31 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:24:10,646 INFO L82 PathProgramCache]: Analyzing trace with hash 74090692, now seen corresponding path program 1 times [2018-04-13 10:24:10,646 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:24:10,646 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:24:10,647 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:10,647 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:24:10,647 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:10,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:24:10,662 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:24:10,667 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:24:10,667 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:24:10,667 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:24:10,667 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:24:10,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:24:10,699 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:24:10,725 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:24:10,725 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:10,726 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:10,726 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:24:10,758 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:24:10,760 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:24:10,760 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:10,761 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:10,765 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:10,766 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:34, output treesize:20 [2018-04-13 10:24:10,787 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 1 [2018-04-13 10:24:10,787 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:10,788 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:10,788 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:3 [2018-04-13 10:24:10,814 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:10,815 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:10,815 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 33 [2018-04-13 10:24:10,815 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:10,822 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:10,822 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:27, output treesize:29 [2018-04-13 10:24:10,855 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 26 [2018-04-13 10:24:10,857 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:10,857 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 37 [2018-04-13 10:24:10,857 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:10,861 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:10,867 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:10,867 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:45 [2018-04-13 10:24:10,904 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 12 [2018-04-13 10:24:10,904 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:10,906 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:24:10,906 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:34, output treesize:16 [2018-04-13 10:24:10,983 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:10,983 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:24:10,984 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:10,985 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 66 [2018-04-13 10:24:10,985 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:10,992 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:10,992 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:55, output treesize:29 [2018-04-13 10:24:11,034 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 22 [2018-04-13 10:24:11,036 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:11,036 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:24:11,037 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:11,037 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 26 [2018-04-13 10:24:11,037 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:24:11,041 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:24:11,045 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:24:11,045 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:11 [2018-04-13 10:24:11,067 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 14 proven. 37 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-04-13 10:24:11,067 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:24:11,067 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26] total 26 [2018-04-13 10:24:11,067 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-04-13 10:24:11,067 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-04-13 10:24:11,068 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=628, Unknown=0, NotChecked=0, Total=702 [2018-04-13 10:24:11,068 INFO L87 Difference]: Start difference. First operand 112 states and 122 transitions. Second operand 27 states. [2018-04-13 10:24:11,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:24:11,601 INFO L93 Difference]: Finished difference Result 122 states and 132 transitions. [2018-04-13 10:24:11,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-04-13 10:24:11,601 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 68 [2018-04-13 10:24:11,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:24:11,602 INFO L225 Difference]: With dead ends: 122 [2018-04-13 10:24:11,602 INFO L226 Difference]: Without dead ends: 122 [2018-04-13 10:24:11,603 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 41 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 298 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=144, Invalid=1262, Unknown=0, NotChecked=0, Total=1406 [2018-04-13 10:24:11,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-04-13 10:24:11,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 118. [2018-04-13 10:24:11,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-04-13 10:24:11,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 128 transitions. [2018-04-13 10:24:11,604 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 128 transitions. Word has length 68 [2018-04-13 10:24:11,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:24:11,605 INFO L459 AbstractCegarLoop]: Abstraction has 118 states and 128 transitions. [2018-04-13 10:24:11,605 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-04-13 10:24:11,605 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 128 transitions. [2018-04-13 10:24:11,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-04-13 10:24:11,605 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:24:11,605 INFO L355 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:24:11,605 INFO L408 AbstractCegarLoop]: === Iteration 32 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:24:11,605 INFO L82 PathProgramCache]: Analyzing trace with hash -2122249574, now seen corresponding path program 3 times [2018-04-13 10:24:11,606 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:24:11,606 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:24:11,606 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:11,606 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:24:11,606 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:11,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:24:11,615 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:24:11,618 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:24:11,618 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:24:11,618 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:24:11,619 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:24:11,650 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-04-13 10:24:11,650 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:24:11,652 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:24:11,665 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-13 10:24:11,665 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:11,678 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-04-13 10:24:11,679 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:11,690 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:24:11,690 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-04-13 10:24:11,780 WARN L1033 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c___U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc_#in~size| 4294967296))) (or (and (<= .cse0 2147483647) (exists ((|__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc_#t~malloc12.base| Int)) (= (store |c_old(#length)| |__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc_#t~malloc12.base| (mod |c___U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc_#in~size| 4294967296)) |c_#length|))) (and (< 2147483647 .cse0) (exists ((v_prenex_122 Int)) (= (store |c_old(#length)| v_prenex_122 (+ (mod |c___U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc_#in~size| 4294967296) (- 4294967296))) |c_#length|))))) is different from true [2018-04-13 10:24:11,785 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:11,791 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 12 treesize of output 15 [2018-04-13 10:24:11,791 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:24:11,803 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 10:24:11,803 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:30 [2018-04-13 10:24:11,866 WARN L1033 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c___U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc_#in~size| 4294967296))) (or (and (<= .cse0 2147483647) (exists ((|__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc_#t~malloc12.base| Int)) (= (store |c_old(#length)| |__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc_#t~malloc12.base| (mod |c___U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc_#in~size| 4294967296)) |c_#length|))) (and (< 2147483647 .cse0) (exists ((v_prenex_123 Int)) (= (store |c_old(#length)| v_prenex_123 (+ (mod |c___U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc_#in~size| 4294967296) (- 4294967296))) |c_#length|))))) is different from true [2018-04-13 10:24:11,880 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:11,882 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:11,886 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 23 treesize of output 30 [2018-04-13 10:24:11,886 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:24:11,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 17 [2018-04-13 10:24:11,906 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:11,922 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 4 dim-0 vars, and 3 xjuncts. [2018-04-13 10:24:11,923 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:42, output treesize:61 [2018-04-13 10:24:12,040 WARN L1033 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c___U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc_#in~size| 4294967296))) (or (and (<= .cse0 2147483647) (exists ((|__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc_#t~malloc12.base| Int)) (= (store |c_old(#length)| |__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc_#t~malloc12.base| (mod |c___U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc_#in~size| 4294967296)) |c_#length|))) (and (exists ((v_prenex_128 Int)) (= |c_#length| (store |c_old(#length)| v_prenex_128 (+ (mod |c___U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_malloc_#in~size| 4294967296) (- 4294967296))))) (< 2147483647 .cse0)))) is different from true [2018-04-13 10:24:12,046 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:12,048 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:12,054 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 24 [2018-04-13 10:24:12,054 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:24:12,074 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-04-13 10:24:12,074 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:23, output treesize:44 [2018-04-13 10:24:12,306 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:12,307 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:12,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 15 [2018-04-13 10:24:12,308 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:12,315 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:12,315 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:12,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 30 [2018-04-13 10:24:12,316 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:12,322 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:24:12,322 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:33, output treesize:22 [2018-04-13 10:24:12,357 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 21 proven. 42 refuted. 0 times theorem prover too weak. 9 trivial. 27 not checked. [2018-04-13 10:24:12,357 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:24:12,357 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24] total 24 [2018-04-13 10:24:12,357 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-04-13 10:24:12,357 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-04-13 10:24:12,358 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=404, Unknown=5, NotChecked=126, Total=600 [2018-04-13 10:24:12,358 INFO L87 Difference]: Start difference. First operand 118 states and 128 transitions. Second operand 25 states. [2018-04-13 10:24:12,617 WARN L151 SmtUtils]: Spent 110ms on a formula simplification. DAG size of input: 73 DAG size of output 51 [2018-04-13 10:24:13,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:24:13,050 INFO L93 Difference]: Finished difference Result 187 states and 202 transitions. [2018-04-13 10:24:13,050 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-13 10:24:13,050 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 70 [2018-04-13 10:24:13,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:24:13,051 INFO L225 Difference]: With dead ends: 187 [2018-04-13 10:24:13,051 INFO L226 Difference]: Without dead ends: 187 [2018-04-13 10:24:13,052 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 45 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 228 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=148, Invalid=1119, Unknown=5, NotChecked=210, Total=1482 [2018-04-13 10:24:13,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-04-13 10:24:13,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 125. [2018-04-13 10:24:13,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-13 10:24:13,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 137 transitions. [2018-04-13 10:24:13,056 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 137 transitions. Word has length 70 [2018-04-13 10:24:13,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:24:13,056 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 137 transitions. [2018-04-13 10:24:13,056 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-04-13 10:24:13,056 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 137 transitions. [2018-04-13 10:24:13,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-04-13 10:24:13,057 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:24:13,057 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:24:13,057 INFO L408 AbstractCegarLoop]: === Iteration 33 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:24:13,057 INFO L82 PathProgramCache]: Analyzing trace with hash -1710388189, now seen corresponding path program 2 times [2018-04-13 10:24:13,057 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:24:13,057 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:24:13,058 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:13,058 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:24:13,058 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:13,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:24:13,067 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:24:13,097 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 5 proven. 14 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-04-13 10:24:13,098 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:24:13,098 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:24:13,098 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:24:13,111 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:24:13,111 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:24:13,114 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:24:13,132 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 17 proven. 2 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-04-13 10:24:13,133 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:24:13,133 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-04-13 10:24:13,133 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-13 10:24:13,133 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-13 10:24:13,133 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-04-13 10:24:13,134 INFO L87 Difference]: Start difference. First operand 125 states and 137 transitions. Second operand 8 states. [2018-04-13 10:24:13,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:24:13,193 INFO L93 Difference]: Finished difference Result 128 states and 139 transitions. [2018-04-13 10:24:13,193 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-13 10:24:13,193 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 71 [2018-04-13 10:24:13,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:24:13,194 INFO L225 Difference]: With dead ends: 128 [2018-04-13 10:24:13,194 INFO L226 Difference]: Without dead ends: 128 [2018-04-13 10:24:13,195 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 71 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=58, Unknown=0, NotChecked=0, Total=90 [2018-04-13 10:24:13,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-04-13 10:24:13,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-04-13 10:24:13,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-13 10:24:13,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 139 transitions. [2018-04-13 10:24:13,198 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 139 transitions. Word has length 71 [2018-04-13 10:24:13,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:24:13,198 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 139 transitions. [2018-04-13 10:24:13,198 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-13 10:24:13,198 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 139 transitions. [2018-04-13 10:24:13,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-04-13 10:24:13,200 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:24:13,200 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:24:13,200 INFO L408 AbstractCegarLoop]: === Iteration 34 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:24:13,201 INFO L82 PathProgramCache]: Analyzing trace with hash -1679690632, now seen corresponding path program 3 times [2018-04-13 10:24:13,201 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:24:13,201 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:24:13,201 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:13,202 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:24:13,202 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:13,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:24:13,220 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:24:13,254 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 14 proven. 17 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-04-13 10:24:13,255 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:24:13,255 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:24:13,256 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:24:13,292 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-04-13 10:24:13,292 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:24:13,296 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:24:13,315 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 14 proven. 17 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-04-13 10:24:13,315 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:24:13,315 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-04-13 10:24:13,316 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-13 10:24:13,316 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-13 10:24:13,316 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2018-04-13 10:24:13,316 INFO L87 Difference]: Start difference. First operand 128 states and 139 transitions. Second operand 9 states. [2018-04-13 10:24:13,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:24:13,371 INFO L93 Difference]: Finished difference Result 131 states and 139 transitions. [2018-04-13 10:24:13,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-13 10:24:13,371 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 74 [2018-04-13 10:24:13,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:24:13,372 INFO L225 Difference]: With dead ends: 131 [2018-04-13 10:24:13,372 INFO L226 Difference]: Without dead ends: 131 [2018-04-13 10:24:13,372 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=90, Unknown=0, NotChecked=0, Total=132 [2018-04-13 10:24:13,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-04-13 10:24:13,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 125. [2018-04-13 10:24:13,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-13 10:24:13,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 133 transitions. [2018-04-13 10:24:13,376 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 133 transitions. Word has length 74 [2018-04-13 10:24:13,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:24:13,376 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 133 transitions. [2018-04-13 10:24:13,377 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-13 10:24:13,377 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 133 transitions. [2018-04-13 10:24:13,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-04-13 10:24:13,377 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:24:13,377 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:24:13,378 INFO L408 AbstractCegarLoop]: === Iteration 35 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:24:13,378 INFO L82 PathProgramCache]: Analyzing trace with hash -530803368, now seen corresponding path program 2 times [2018-04-13 10:24:13,378 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:24:13,378 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:24:13,379 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:13,379 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:24:13,379 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:13,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:24:13,391 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:24:13,395 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:24:13,396 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:24:13,396 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:24:13,396 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:24:13,421 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:24:13,421 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:24:13,425 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:24:13,435 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:24:13,436 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:13,437 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:13,437 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:24:13,498 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:13,499 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:13,500 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-13 10:24:13,500 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:13,503 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:13,503 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:8 [2018-04-13 10:24:13,525 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:24:13,527 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:24:13,527 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:13,528 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:13,531 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:13,532 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:23, output treesize:16 [2018-04-13 10:24:15,556 WARN L1033 $PredicateComparison]: unable to prove that (exists ((v___U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_point_~array~0.offset_BEFORE_CALL_35 Int) (v___U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_point_~array~0.base_BEFORE_CALL_27 Int)) (not (= (select (select |c_#memory_$Pointer$.base| v___U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_point_~array~0.base_BEFORE_CALL_27) v___U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_point_~array~0.offset_BEFORE_CALL_35) v___U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_point_~array~0.base_BEFORE_CALL_27))) is different from true [2018-04-13 10:24:19,571 WARN L148 SmtUtils]: Spent 2002ms on a formula simplification that was a NOOP. DAG size: 12 [2018-04-13 10:24:19,663 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 17 [2018-04-13 10:24:19,664 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:19,673 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 24 [2018-04-13 10:24:19,674 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:19,677 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:19,680 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:19,680 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:26, output treesize:19 [2018-04-13 10:24:19,913 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 19 [2018-04-13 10:24:19,913 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:19,920 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:19,920 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:73, output treesize:19 [2018-04-13 10:24:19,941 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-04-13 10:24:19,944 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:19,951 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 24 treesize of output 41 [2018-04-13 10:24:19,951 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-04-13 10:24:19,964 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-04-13 10:24:19,974 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-04-13 10:24:19,974 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:72 [2018-04-13 10:24:20,017 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:20,021 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 25 treesize of output 28 [2018-04-13 10:24:20,021 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:24:20,047 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:20,052 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 30 [2018-04-13 10:24:20,052 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 10:24:20,085 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:20,085 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 30 [2018-04-13 10:24:20,085 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:20,111 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 3 dim-1 vars, End of recursive call: 3 dim-0 vars, and 5 xjuncts. [2018-04-13 10:24:20,111 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 6 variables, input treesize:78, output treesize:111 [2018-04-13 10:24:20,289 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 9 proven. 46 refuted. 0 times theorem prover too weak. 2 trivial. 2 not checked. [2018-04-13 10:24:20,289 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:24:20,290 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29] total 29 [2018-04-13 10:24:20,290 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-04-13 10:24:20,290 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-04-13 10:24:20,290 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=743, Unknown=2, NotChecked=54, Total=870 [2018-04-13 10:24:20,290 INFO L87 Difference]: Start difference. First operand 125 states and 133 transitions. Second operand 30 states. [2018-04-13 10:24:21,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:24:21,620 INFO L93 Difference]: Finished difference Result 136 states and 142 transitions. [2018-04-13 10:24:21,621 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-04-13 10:24:21,621 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 75 [2018-04-13 10:24:21,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:24:21,621 INFO L225 Difference]: With dead ends: 136 [2018-04-13 10:24:21,621 INFO L226 Difference]: Without dead ends: 136 [2018-04-13 10:24:21,622 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 45 SyntacticMatches, 1 SemanticMatches, 51 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 462 ImplicationChecksByTransitivity, 7.2s TimeCoverageRelationStatistics Valid=254, Invalid=2400, Unknown=2, NotChecked=100, Total=2756 [2018-04-13 10:24:21,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-04-13 10:24:21,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 131. [2018-04-13 10:24:21,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-04-13 10:24:21,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 138 transitions. [2018-04-13 10:24:21,623 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 138 transitions. Word has length 75 [2018-04-13 10:24:21,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:24:21,624 INFO L459 AbstractCegarLoop]: Abstraction has 131 states and 138 transitions. [2018-04-13 10:24:21,624 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-04-13 10:24:21,624 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 138 transitions. [2018-04-13 10:24:21,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-04-13 10:24:21,624 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:24:21,624 INFO L355 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:24:21,624 INFO L408 AbstractCegarLoop]: === Iteration 36 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:24:21,624 INFO L82 PathProgramCache]: Analyzing trace with hash 634547200, now seen corresponding path program 4 times [2018-04-13 10:24:21,624 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:24:21,625 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:24:21,625 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:21,625 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:24:21,625 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:21,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:24:21,635 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:24:21,641 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:24:21,641 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:24:21,641 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:24:21,642 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 10:24:21,656 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 10:24:21,656 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:24:21,658 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:24:21,681 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-04-13 10:24:21,681 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:21,693 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-04-13 10:24:21,694 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:21,704 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:24:21,704 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:30 [2018-04-13 10:24:21,767 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:24:21,769 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:24:21,769 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:21,771 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:21,779 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:21,779 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:25 [2018-04-13 10:24:21,820 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 1 [2018-04-13 10:24:21,820 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:21,826 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 10:24:21,826 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:21,830 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:21,830 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:32, output treesize:7 [2018-04-13 10:24:21,857 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:21,857 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:21,858 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 25 [2018-04-13 10:24:21,858 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:21,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-04-13 10:24:21,866 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 4 [2018-04-13 10:24:21,866 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:21,867 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:21,871 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:21,871 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:46, output treesize:10 [2018-04-13 10:24:21,885 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:21,885 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:24:21,885 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:21,889 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:24:21,889 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-04-13 10:24:21,909 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 43 proven. 27 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-04-13 10:24:21,909 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:24:21,909 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16] total 16 [2018-04-13 10:24:21,909 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-13 10:24:21,910 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-13 10:24:21,910 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=231, Unknown=0, NotChecked=0, Total=272 [2018-04-13 10:24:21,910 INFO L87 Difference]: Start difference. First operand 131 states and 138 transitions. Second operand 17 states. [2018-04-13 10:24:22,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:24:22,758 INFO L93 Difference]: Finished difference Result 171 states and 179 transitions. [2018-04-13 10:24:22,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-04-13 10:24:22,759 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 79 [2018-04-13 10:24:22,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:24:22,760 INFO L225 Difference]: With dead ends: 171 [2018-04-13 10:24:22,760 INFO L226 Difference]: Without dead ends: 171 [2018-04-13 10:24:22,760 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 64 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 176 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=194, Invalid=928, Unknown=0, NotChecked=0, Total=1122 [2018-04-13 10:24:22,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-04-13 10:24:22,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 132. [2018-04-13 10:24:22,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-04-13 10:24:22,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 139 transitions. [2018-04-13 10:24:22,764 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 139 transitions. Word has length 79 [2018-04-13 10:24:22,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:24:22,764 INFO L459 AbstractCegarLoop]: Abstraction has 132 states and 139 transitions. [2018-04-13 10:24:22,764 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-13 10:24:22,764 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 139 transitions. [2018-04-13 10:24:22,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-04-13 10:24:22,765 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:24:22,765 INFO L355 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:24:22,765 INFO L408 AbstractCegarLoop]: === Iteration 37 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:24:22,765 INFO L82 PathProgramCache]: Analyzing trace with hash -1803873164, now seen corresponding path program 2 times [2018-04-13 10:24:22,765 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:24:22,765 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:24:22,766 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:22,766 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:24:22,766 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:22,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:24:22,780 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:24:22,784 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:24:22,784 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:24:22,784 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:24:22,784 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:24:22,812 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:24:22,812 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:24:22,816 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:24:22,875 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:24:22,877 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:24:22,877 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:22,879 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:22,883 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:22,884 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:24:22,942 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:24:22,944 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:22,946 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:24:22,946 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:22,951 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:22,957 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:22,958 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:16 [2018-04-13 10:24:23,041 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-13 10:24:23,042 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-13 10:24:23,042 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:23,043 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:23,043 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:23,044 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:15, output treesize:3 [2018-04-13 10:24:23,081 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 24 proven. 56 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-04-13 10:24:23,082 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:24:23,082 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17] total 17 [2018-04-13 10:24:23,082 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-13 10:24:23,082 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-13 10:24:23,083 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=256, Unknown=0, NotChecked=0, Total=306 [2018-04-13 10:24:23,083 INFO L87 Difference]: Start difference. First operand 132 states and 139 transitions. Second operand 18 states. [2018-04-13 10:24:23,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:24:23,482 INFO L93 Difference]: Finished difference Result 221 states and 231 transitions. [2018-04-13 10:24:23,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-04-13 10:24:23,482 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 80 [2018-04-13 10:24:23,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:24:23,483 INFO L225 Difference]: With dead ends: 221 [2018-04-13 10:24:23,483 INFO L226 Difference]: Without dead ends: 221 [2018-04-13 10:24:23,483 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 62 SyntacticMatches, 3 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 305 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=198, Invalid=1134, Unknown=0, NotChecked=0, Total=1332 [2018-04-13 10:24:23,483 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-04-13 10:24:23,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 159. [2018-04-13 10:24:23,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-04-13 10:24:23,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 168 transitions. [2018-04-13 10:24:23,486 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 168 transitions. Word has length 80 [2018-04-13 10:24:23,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:24:23,486 INFO L459 AbstractCegarLoop]: Abstraction has 159 states and 168 transitions. [2018-04-13 10:24:23,486 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-13 10:24:23,486 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 168 transitions. [2018-04-13 10:24:23,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-04-13 10:24:23,487 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:24:23,487 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:24:23,487 INFO L408 AbstractCegarLoop]: === Iteration 38 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:24:23,487 INFO L82 PathProgramCache]: Analyzing trace with hash -1958966481, now seen corresponding path program 3 times [2018-04-13 10:24:23,487 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:24:23,488 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:24:23,488 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:23,488 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:24:23,488 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:23,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:24:23,498 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:24:23,502 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:24:23,502 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:24:23,502 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:24:23,503 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:24:23,520 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-04-13 10:24:23,520 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:24:23,524 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:24:23,623 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:24:23,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:24:23,625 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:23,627 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:23,636 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:23,636 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:45, output treesize:46 [2018-04-13 10:24:23,705 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 12 [2018-04-13 10:24:23,705 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:23,711 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:24:23,711 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:32, output treesize:23 [2018-04-13 10:24:23,945 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 62 [2018-04-13 10:24:23,947 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:24:23,947 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:23,948 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:23,948 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 102 [2018-04-13 10:24:23,949 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:23,956 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:23,965 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:24:23,965 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:88, output treesize:89 [2018-04-13 10:24:24,052 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:24,052 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 56 [2018-04-13 10:24:24,066 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:24,067 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:24,067 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 47 [2018-04-13 10:24:24,067 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:24,072 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:24,080 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-04-13 10:24:24,080 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:65, output treesize:62 [2018-04-13 10:24:24,543 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 73 [2018-04-13 10:24:24,545 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:24,547 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:24,549 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:24,552 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 78 [2018-04-13 10:24:24,553 INFO L267 ElimStorePlain]: Start of recursive call 3: 3 dim-0 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-04-13 10:24:24,572 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-04-13 10:24:24,591 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 2 xjuncts. [2018-04-13 10:24:24,591 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:110, output treesize:113 [2018-04-13 10:24:25,832 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 18 proven. 35 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-04-13 10:24:25,832 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:24:25,832 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30] total 30 [2018-04-13 10:24:25,833 INFO L442 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-04-13 10:24:25,833 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-04-13 10:24:25,833 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=860, Unknown=0, NotChecked=0, Total=930 [2018-04-13 10:24:25,833 INFO L87 Difference]: Start difference. First operand 159 states and 168 transitions. Second operand 31 states. [2018-04-13 10:24:28,495 WARN L151 SmtUtils]: Spent 230ms on a formula simplification. DAG size of input: 69 DAG size of output 54 [2018-04-13 10:24:29,300 WARN L151 SmtUtils]: Spent 337ms on a formula simplification. DAG size of input: 68 DAG size of output 58 [2018-04-13 10:24:29,494 WARN L151 SmtUtils]: Spent 123ms on a formula simplification. DAG size of input: 68 DAG size of output 34 [2018-04-13 10:24:29,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:24:29,683 INFO L93 Difference]: Finished difference Result 163 states and 171 transitions. [2018-04-13 10:24:29,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-04-13 10:24:29,683 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 79 [2018-04-13 10:24:29,683 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:24:29,684 INFO L225 Difference]: With dead ends: 163 [2018-04-13 10:24:29,684 INFO L226 Difference]: Without dead ends: 134 [2018-04-13 10:24:29,684 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 234 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=126, Invalid=1596, Unknown=0, NotChecked=0, Total=1722 [2018-04-13 10:24:29,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-04-13 10:24:29,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-04-13 10:24:29,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-04-13 10:24:29,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 142 transitions. [2018-04-13 10:24:29,686 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 142 transitions. Word has length 79 [2018-04-13 10:24:29,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:24:29,686 INFO L459 AbstractCegarLoop]: Abstraction has 134 states and 142 transitions. [2018-04-13 10:24:29,686 INFO L460 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-04-13 10:24:29,686 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 142 transitions. [2018-04-13 10:24:29,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-04-13 10:24:29,686 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:24:29,687 INFO L355 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:24:29,687 INFO L408 AbstractCegarLoop]: === Iteration 39 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:24:29,687 INFO L82 PathProgramCache]: Analyzing trace with hash -85493056, now seen corresponding path program 2 times [2018-04-13 10:24:29,687 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:24:29,687 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:24:29,687 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:29,687 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:24:29,688 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:29,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:24:29,697 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:24:29,702 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:24:29,702 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:24:29,702 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:24:29,703 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:24:29,727 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:24:29,727 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:24:29,729 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:24:29,759 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:29,760 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-13 10:24:29,760 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:29,761 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:29,761 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:5 [2018-04-13 10:24:29,794 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:24:29,795 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:24:29,796 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:29,797 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:29,801 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:29,801 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:20 [2018-04-13 10:24:29,827 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 1 [2018-04-13 10:24:29,827 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:29,828 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:29,828 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:3 [2018-04-13 10:24:29,861 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:29,862 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:29,862 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 39 [2018-04-13 10:24:29,863 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:29,869 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:29,869 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:29, output treesize:33 [2018-04-13 10:24:29,907 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-04-13 10:24:29,909 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:29,910 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 43 [2018-04-13 10:24:29,910 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:29,914 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:29,921 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:29,921 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:48, output treesize:49 [2018-04-13 10:24:29,974 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 12 [2018-04-13 10:24:29,974 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:29,976 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:24:29,976 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:34, output treesize:16 [2018-04-13 10:24:30,061 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:30,061 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:24:30,062 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:30,062 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 72 [2018-04-13 10:24:30,062 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:30,070 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:24:30,071 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:59, output treesize:31 [2018-04-13 10:24:30,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 20 [2018-04-13 10:24:30,115 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:30,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 15 [2018-04-13 10:24:30,116 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:24:30,118 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:24:30,120 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:24:30,120 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:26, output treesize:11 [2018-04-13 10:24:30,145 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 27 proven. 61 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-04-13 10:24:30,146 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:24:30,146 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27] total 27 [2018-04-13 10:24:30,146 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-04-13 10:24:30,146 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-04-13 10:24:30,146 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=679, Unknown=0, NotChecked=0, Total=756 [2018-04-13 10:24:30,147 INFO L87 Difference]: Start difference. First operand 134 states and 142 transitions. Second operand 28 states. [2018-04-13 10:24:30,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:24:30,677 INFO L93 Difference]: Finished difference Result 141 states and 149 transitions. [2018-04-13 10:24:30,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-04-13 10:24:30,677 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 81 [2018-04-13 10:24:30,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:24:30,678 INFO L225 Difference]: With dead ends: 141 [2018-04-13 10:24:30,678 INFO L226 Difference]: Without dead ends: 141 [2018-04-13 10:24:30,679 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 54 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 311 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=147, Invalid=1335, Unknown=0, NotChecked=0, Total=1482 [2018-04-13 10:24:30,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-04-13 10:24:30,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 139. [2018-04-13 10:24:30,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-04-13 10:24:30,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 147 transitions. [2018-04-13 10:24:30,681 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 147 transitions. Word has length 81 [2018-04-13 10:24:30,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:24:30,682 INFO L459 AbstractCegarLoop]: Abstraction has 139 states and 147 transitions. [2018-04-13 10:24:30,682 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-04-13 10:24:30,682 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 147 transitions. [2018-04-13 10:24:30,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-04-13 10:24:30,682 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:24:30,682 INFO L355 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:24:30,682 INFO L408 AbstractCegarLoop]: === Iteration 40 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:24:30,682 INFO L82 PathProgramCache]: Analyzing trace with hash -863408746, now seen corresponding path program 4 times [2018-04-13 10:24:30,682 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:24:30,682 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:24:30,683 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:30,683 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:24:30,683 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:24:30,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:24:30,696 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:24:30,701 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:24:30,701 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:24:30,701 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:24:30,702 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 10:24:30,727 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 10:24:30,727 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:24:30,731 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:24:30,745 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-04-13 10:24:30,745 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:30,762 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-04-13 10:24:30,762 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:30,764 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-04-13 10:24:30,764 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:30,783 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-04-13 10:24:30,783 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:30,798 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:24:30,799 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46 [2018-04-13 10:24:30,923 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:30,923 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:30,924 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 56 [2018-04-13 10:24:30,924 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:30,950 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:30,951 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 44 [2018-04-13 10:24:30,952 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:30,979 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:30,980 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:30,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 47 [2018-04-13 10:24:30,981 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:31,014 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,015 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,015 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 49 [2018-04-13 10:24:31,015 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:31,038 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-04-13 10:24:31,038 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:85, output treesize:75 [2018-04-13 10:24:31,301 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,302 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,303 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,303 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,303 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 51 [2018-04-13 10:24:31,304 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:31,373 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,374 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,375 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,375 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 66 [2018-04-13 10:24:31,376 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:31,442 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,442 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,443 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,444 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,444 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 85 [2018-04-13 10:24:31,445 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:31,510 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,510 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,511 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,512 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,512 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 85 [2018-04-13 10:24:31,514 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:31,578 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,579 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,579 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,580 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 50 [2018-04-13 10:24:31,580 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:31,638 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,638 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,639 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,639 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,640 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 52 [2018-04-13 10:24:31,640 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:31,693 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,694 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,696 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 63 [2018-04-13 10:24:31,696 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:31,747 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,748 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,748 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:31,749 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 48 [2018-04-13 10:24:31,749 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:31,798 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 8 dim-1 vars, End of recursive call: 16 dim-0 vars, and 4 xjuncts. [2018-04-13 10:24:31,799 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 24 variables, input treesize:225, output treesize:177 [2018-04-13 10:24:32,474 WARN L151 SmtUtils]: Spent 618ms on a formula simplification. DAG size of input: 94 DAG size of output 74 [2018-04-13 10:24:32,918 WARN L148 SmtUtils]: Spent 361ms on a formula simplification that was a NOOP. DAG size: 77 [2018-04-13 10:24:33,382 WARN L148 SmtUtils]: Spent 373ms on a formula simplification that was a NOOP. DAG size: 78 [2018-04-13 10:24:33,458 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:33,459 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:33,460 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:33,461 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:33,463 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:33,464 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:33,465 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:33,475 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 8 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 67 treesize of output 126 [2018-04-13 10:24:33,475 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 4 xjuncts. [2018-04-13 10:24:33,736 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:33,748 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 71 treesize of output 86 [2018-04-13 10:24:33,749 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-04-13 10:24:34,032 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,032 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,033 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 56 [2018-04-13 10:24:34,033 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:34,035 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,035 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,036 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 54 [2018-04-13 10:24:34,036 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:34,038 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,038 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,038 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 60 [2018-04-13 10:24:34,039 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:34,318 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,319 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 56 [2018-04-13 10:24:34,319 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:34,321 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,322 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,322 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 64 [2018-04-13 10:24:34,322 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:34,324 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,324 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 56 [2018-04-13 10:24:34,325 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:34,576 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,579 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,580 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,581 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,590 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 73 treesize of output 114 [2018-04-13 10:24:34,590 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 4 xjuncts. [2018-04-13 10:24:34,953 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,954 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,954 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,956 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,956 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,957 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:34,967 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 69 treesize of output 118 [2018-04-13 10:24:34,968 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 4 xjuncts. [2018-04-13 10:24:35,373 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:35,374 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:35,374 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 54 [2018-04-13 10:24:35,374 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:35,376 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:35,376 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:35,377 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 54 [2018-04-13 10:24:35,377 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:35,378 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:35,379 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:35,379 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 66 [2018-04-13 10:24:35,380 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:35,741 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:35,742 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:35,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 61 [2018-04-13 10:24:35,743 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:36,085 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:36,086 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:36,087 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:36,089 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:36,091 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:36,092 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:36,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 65 treesize of output 114 [2018-04-13 10:24:36,102 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 4 xjuncts. [2018-04-13 10:24:36,548 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:36,549 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:36,551 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:36,552 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:36,554 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:36,554 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:36,563 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 8 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 61 treesize of output 120 [2018-04-13 10:24:36,564 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 4 xjuncts. [2018-04-13 10:24:37,074 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:37,075 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:37,075 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 62 [2018-04-13 10:24:37,075 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:37,077 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:37,078 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:37,078 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 56 [2018-04-13 10:24:37,078 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:37,080 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:37,080 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:37,081 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 56 [2018-04-13 10:24:37,081 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:37,520 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:37,521 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:37,521 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 56 [2018-04-13 10:24:37,522 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:37,523 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:37,524 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:37,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 50 [2018-04-13 10:24:37,524 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:37,526 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:37,526 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:37,527 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 58 [2018-04-13 10:24:37,527 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:37,961 INFO L267 ElimStorePlain]: Start of recursive call 1: 36 dim-0 vars, 12 dim-1 vars, End of recursive call: 84 dim-0 vars, and 18 xjuncts. [2018-04-13 10:24:37,961 INFO L202 ElimStorePlain]: Needed 23 recursive calls to eliminate 48 variables, input treesize:413, output treesize:887 [2018-04-13 10:24:38,967 WARN L151 SmtUtils]: Spent 732ms on a formula simplification. DAG size of input: 431 DAG size of output 74 [2018-04-13 10:24:39,513 WARN L148 SmtUtils]: Spent 371ms on a formula simplification that was a NOOP. DAG size: 78 [2018-04-13 10:24:39,632 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:39,633 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:39,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 70 [2018-04-13 10:24:39,633 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:39,766 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:39,767 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:39,769 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:39,769 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:39,770 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:39,781 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 63 treesize of output 108 [2018-04-13 10:24:39,781 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-04-13 10:24:40,024 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,024 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,025 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,026 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,027 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,029 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,029 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,038 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 8 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 67 treesize of output 130 [2018-04-13 10:24:40,039 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 4 xjuncts. [2018-04-13 10:24:40,332 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,333 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,333 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 57 [2018-04-13 10:24:40,333 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:40,335 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,336 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,336 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 57 [2018-04-13 10:24:40,336 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:40,338 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,339 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,339 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 67 [2018-04-13 10:24:40,339 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:40,570 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,570 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,571 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,573 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,574 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,575 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 65 treesize of output 114 [2018-04-13 10:24:40,585 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 4 xjuncts. [2018-04-13 10:24:40,934 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,936 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,937 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,938 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:40,947 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 73 treesize of output 114 [2018-04-13 10:24:40,948 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 4 xjuncts. [2018-04-13 10:24:41,353 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:41,365 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 71 treesize of output 82 [2018-04-13 10:24:41,366 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 4 xjuncts. [2018-04-13 10:24:41,811 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:41,812 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:41,812 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 73 [2018-04-13 10:24:41,813 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:41,815 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:41,815 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:41,816 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 61 [2018-04-13 10:24:41,816 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:41,818 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:41,819 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:41,819 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 61 [2018-04-13 10:24:41,820 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:42,212 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:42,213 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:42,213 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 68 [2018-04-13 10:24:42,214 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:42,585 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:42,586 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:42,586 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 63 [2018-04-13 10:24:42,586 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:42,588 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:42,588 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:42,589 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 57 [2018-04-13 10:24:42,589 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:42,591 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:42,591 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:42,592 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 65 [2018-04-13 10:24:42,592 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:42,974 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:42,975 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:42,975 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 63 [2018-04-13 10:24:42,975 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:42,977 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:42,978 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:42,979 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 71 [2018-04-13 10:24:42,979 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:42,981 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:42,981 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:42,982 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 63 [2018-04-13 10:24:42,982 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:43,362 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:43,363 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:43,365 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:43,366 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:43,367 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:43,369 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:43,380 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 8 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 61 treesize of output 116 [2018-04-13 10:24:43,381 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 4 xjuncts. [2018-04-13 10:24:43,864 INFO L267 ElimStorePlain]: Start of recursive call 1: 36 dim-0 vars, 12 dim-1 vars, End of recursive call: 84 dim-0 vars, and 18 xjuncts. [2018-04-13 10:24:43,864 INFO L202 ElimStorePlain]: Needed 21 recursive calls to eliminate 48 variables, input treesize:413, output treesize:887 [2018-04-13 10:24:44,932 WARN L151 SmtUtils]: Spent 818ms on a formula simplification. DAG size of input: 431 DAG size of output 74 [2018-04-13 10:24:45,443 WARN L148 SmtUtils]: Spent 429ms on a formula simplification that was a NOOP. DAG size: 82 [2018-04-13 10:24:45,925 WARN L148 SmtUtils]: Spent 420ms on a formula simplification that was a NOOP. DAG size: 81 [2018-04-13 10:24:46,025 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:46,043 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 78 treesize of output 93 [2018-04-13 10:24:46,044 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 4 xjuncts. [2018-04-13 10:24:46,287 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:46,287 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:46,288 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:46,289 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:46,290 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:46,291 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:46,292 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:46,302 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 8 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 74 treesize of output 133 [2018-04-13 10:24:46,302 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-04-13 10:24:46,640 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:46,641 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:46,641 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 73 [2018-04-13 10:24:46,642 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:46,925 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:46,926 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:46,926 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 78 [2018-04-13 10:24:46,927 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:46,928 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:46,929 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:46,929 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 70 [2018-04-13 10:24:46,930 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:46,931 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:46,932 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:46,932 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 70 [2018-04-13 10:24:46,932 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:47,203 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:47,203 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:47,204 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 70 [2018-04-13 10:24:47,204 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:47,206 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:47,207 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:47,207 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 68 [2018-04-13 10:24:47,207 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:47,209 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:47,209 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:47,210 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 74 [2018-04-13 10:24:47,210 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:47,472 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:47,473 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:47,473 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 75 [2018-04-13 10:24:47,473 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:47,735 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:47,736 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:47,738 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:47,739 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:47,740 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:47,748 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 66 treesize of output 111 [2018-04-13 10:24:47,749 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 4 xjuncts. [2018-04-13 10:24:48,159 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:48,160 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:48,161 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:48,162 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:48,163 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:48,164 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:48,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 8 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 68 treesize of output 127 [2018-04-13 10:24:48,180 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 4 xjuncts. [2018-04-13 10:24:48,653 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:48,654 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:48,655 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:48,656 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:48,657 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:48,666 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:48,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 76 treesize of output 125 [2018-04-13 10:24:48,677 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 4 xjuncts. [2018-04-13 10:24:49,183 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:49,184 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:49,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 76 [2018-04-13 10:24:49,185 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:49,186 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:49,187 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:49,187 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 70 [2018-04-13 10:24:49,188 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:49,189 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:49,190 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:49,190 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 70 [2018-04-13 10:24:49,190 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:49,626 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:49,626 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:49,627 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 81 [2018-04-13 10:24:49,627 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-04-13 10:24:50,044 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:50,045 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:50,046 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:24:50,057 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 74 treesize of output 115 [2018-04-13 10:24:50,057 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 4 xjuncts. [2018-04-13 10:24:50,632 INFO L267 ElimStorePlain]: Start of recursive call 1: 36 dim-0 vars, 12 dim-1 vars, End of recursive call: 84 dim-0 vars, and 18 xjuncts. [2018-04-13 10:24:50,632 INFO L202 ElimStorePlain]: Needed 19 recursive calls to eliminate 48 variables, input treesize:455, output treesize:1013 [2018-04-13 10:24:52,053 WARN L151 SmtUtils]: Spent 1240ms on a formula simplification. DAG size of input: 434 DAG size of output 77 [2018-04-13 10:24:52,098 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 5 proven. 115 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-04-13 10:24:52,098 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:24:52,098 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23] total 23 [2018-04-13 10:24:52,099 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-13 10:24:52,099 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-13 10:24:52,099 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=480, Unknown=0, NotChecked=0, Total=552 [2018-04-13 10:24:52,099 INFO L87 Difference]: Start difference. First operand 139 states and 147 transitions. Second operand 24 states. [2018-04-13 10:24:52,392 WARN L148 SmtUtils]: Spent 152ms on a formula simplification that was a NOOP. DAG size: 70 [2018-04-13 10:24:52,582 WARN L148 SmtUtils]: Spent 158ms on a formula simplification that was a NOOP. DAG size: 82 [2018-04-13 10:24:52,744 WARN L148 SmtUtils]: Spent 124ms on a formula simplification that was a NOOP. DAG size: 65 [2018-04-13 10:24:52,899 WARN L148 SmtUtils]: Spent 113ms on a formula simplification that was a NOOP. DAG size: 65 [2018-04-13 10:24:53,268 WARN L148 SmtUtils]: Spent 117ms on a formula simplification that was a NOOP. DAG size: 67 [2018-04-13 10:24:55,733 WARN L151 SmtUtils]: Spent 621ms on a formula simplification. DAG size of input: 95 DAG size of output 93 [2018-04-13 10:24:56,576 WARN L151 SmtUtils]: Spent 771ms on a formula simplification. DAG size of input: 153 DAG size of output 111 [2018-04-13 10:24:57,772 WARN L151 SmtUtils]: Spent 1070ms on a formula simplification. DAG size of input: 146 DAG size of output 86 [2018-04-13 10:25:03,105 WARN L151 SmtUtils]: Spent 948ms on a formula simplification. DAG size of input: 92 DAG size of output 86 [2018-04-13 10:25:07,649 WARN L148 SmtUtils]: Spent 412ms on a formula simplification that was a NOOP. DAG size: 85 [2018-04-13 10:25:08,486 WARN L151 SmtUtils]: Spent 680ms on a formula simplification. DAG size of input: 144 DAG size of output 82 [2018-04-13 10:25:09,012 WARN L148 SmtUtils]: Spent 387ms on a formula simplification that was a NOOP. DAG size: 81 [2018-04-13 10:25:10,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:25:10,351 INFO L93 Difference]: Finished difference Result 191 states and 200 transitions. [2018-04-13 10:25:10,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-04-13 10:25:10,351 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 83 [2018-04-13 10:25:10,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:25:10,352 INFO L225 Difference]: With dead ends: 191 [2018-04-13 10:25:10,352 INFO L226 Difference]: Without dead ends: 191 [2018-04-13 10:25:10,352 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 57 SyntacticMatches, 3 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 314 ImplicationChecksByTransitivity, 13.7s TimeCoverageRelationStatistics Valid=215, Invalid=1425, Unknown=0, NotChecked=0, Total=1640 [2018-04-13 10:25:10,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2018-04-13 10:25:10,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 142. [2018-04-13 10:25:10,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-04-13 10:25:10,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 149 transitions. [2018-04-13 10:25:10,355 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 149 transitions. Word has length 83 [2018-04-13 10:25:10,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:25:10,355 INFO L459 AbstractCegarLoop]: Abstraction has 142 states and 149 transitions. [2018-04-13 10:25:10,355 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-13 10:25:10,355 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 149 transitions. [2018-04-13 10:25:10,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-04-13 10:25:10,355 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:25:10,355 INFO L355 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:25:10,355 INFO L408 AbstractCegarLoop]: === Iteration 41 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:25:10,356 INFO L82 PathProgramCache]: Analyzing trace with hash -1782023820, now seen corresponding path program 5 times [2018-04-13 10:25:10,356 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:25:10,356 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:25:10,356 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:10,356 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:25:10,356 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:10,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:25:10,365 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:25:10,369 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:25:10,369 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:25:10,369 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:25:10,370 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 10:25:10,391 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2018-04-13 10:25:10,391 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:25:10,394 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:25:10,395 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:25:10,396 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:10,398 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:10,398 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-13 10:25:10,460 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:10,460 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:10,461 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-04-13 10:25:10,461 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:10,469 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:25:10,469 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:23, output treesize:21 [2018-04-13 10:25:10,611 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:10,612 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:10,613 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:10,613 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-04-13 10:25:10,614 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:10,621 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:10,622 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:26, output treesize:11 [2018-04-13 10:25:10,657 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:25:10,659 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:25:10,659 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:10,660 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:10,664 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:10,664 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:26, output treesize:19 [2018-04-13 10:25:10,843 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 21 [2018-04-13 10:25:10,845 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:10,846 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 32 [2018-04-13 10:25:10,846 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:10,848 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:10,852 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:10,852 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:17 [2018-04-13 10:25:11,031 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2018-04-13 10:25:11,032 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2018-04-13 10:25:11,032 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:11,033 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:11,036 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:11,036 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:21, output treesize:10 [2018-04-13 10:25:11,064 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:11,064 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:25:11,064 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:11,067 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:25:11,067 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-04-13 10:25:11,108 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 11 proven. 86 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-04-13 10:25:11,108 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:25:11,108 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23] total 23 [2018-04-13 10:25:11,108 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-13 10:25:11,108 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-13 10:25:11,108 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=497, Unknown=0, NotChecked=0, Total=552 [2018-04-13 10:25:11,108 INFO L87 Difference]: Start difference. First operand 142 states and 149 transitions. Second operand 24 states. [2018-04-13 10:25:12,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:25:12,253 INFO L93 Difference]: Finished difference Result 206 states and 215 transitions. [2018-04-13 10:25:12,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-04-13 10:25:12,280 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 87 [2018-04-13 10:25:12,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:25:12,281 INFO L225 Difference]: With dead ends: 206 [2018-04-13 10:25:12,281 INFO L226 Difference]: Without dead ends: 206 [2018-04-13 10:25:12,281 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 62 SyntacticMatches, 3 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 424 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=229, Invalid=2027, Unknown=0, NotChecked=0, Total=2256 [2018-04-13 10:25:12,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-04-13 10:25:12,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 149. [2018-04-13 10:25:12,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-04-13 10:25:12,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 157 transitions. [2018-04-13 10:25:12,283 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 157 transitions. Word has length 87 [2018-04-13 10:25:12,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:25:12,284 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 157 transitions. [2018-04-13 10:25:12,284 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-13 10:25:12,284 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 157 transitions. [2018-04-13 10:25:12,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-04-13 10:25:12,284 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:25:12,284 INFO L355 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:25:12,284 INFO L408 AbstractCegarLoop]: === Iteration 42 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, 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__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, 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__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:25:12,284 INFO L82 PathProgramCache]: Analyzing trace with hash 591836544, now seen corresponding path program 3 times [2018-04-13 10:25:12,284 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:25:12,284 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:25:12,285 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:12,285 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:25:12,285 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:12,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:25:12,297 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:25:12,301 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:25:12,301 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:25:12,301 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:25:12,302 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:25:12,327 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-04-13 10:25:12,327 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:25:12,329 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:25:12,376 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:25:12,377 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:25:12,377 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:12,378 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:12,383 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:12,383 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-04-13 10:25:12,484 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:25:12,486 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:12,488 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:25:12,488 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:12,493 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:12,501 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:12,501 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:26 [2018-04-13 10:25:12,612 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:25:12,619 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:12,620 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:25:12,621 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:12,624 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:12,628 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:12,628 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:26 [2018-04-13 10:25:12,857 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-13 10:25:12,858 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2018-04-13 10:25:12,858 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:12,859 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:12,863 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:12,863 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:36, output treesize:3 [2018-04-13 10:25:12,887 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 19 proven. 82 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-04-13 10:25:12,888 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:25:12,888 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21] total 21 [2018-04-13 10:25:12,888 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-04-13 10:25:12,888 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-04-13 10:25:12,888 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=401, Unknown=0, NotChecked=0, Total=462 [2018-04-13 10:25:12,888 INFO L87 Difference]: Start difference. First operand 149 states and 157 transitions. Second operand 22 states. [2018-04-13 10:25:14,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:25:14,366 INFO L93 Difference]: Finished difference Result 204 states and 212 transitions. [2018-04-13 10:25:14,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-13 10:25:14,366 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 88 [2018-04-13 10:25:14,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:25:14,367 INFO L225 Difference]: With dead ends: 204 [2018-04-13 10:25:14,367 INFO L226 Difference]: Without dead ends: 204 [2018-04-13 10:25:14,367 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 68 SyntacticMatches, 3 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 495 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=240, Invalid=1652, Unknown=0, NotChecked=0, Total=1892 [2018-04-13 10:25:14,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 204 states. [2018-04-13 10:25:14,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 204 to 149. [2018-04-13 10:25:14,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-04-13 10:25:14,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 156 transitions. [2018-04-13 10:25:14,369 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 156 transitions. Word has length 88 [2018-04-13 10:25:14,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:25:14,370 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 156 transitions. [2018-04-13 10:25:14,370 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-04-13 10:25:14,370 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 156 transitions. [2018-04-13 10:25:14,370 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-04-13 10:25:14,370 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:25:14,370 INFO L355 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:25:14,370 INFO L408 AbstractCegarLoop]: === Iteration 43 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:25:14,370 INFO L82 PathProgramCache]: Analyzing trace with hash 1167063860, now seen corresponding path program 3 times [2018-04-13 10:25:14,370 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:25:14,370 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:25:14,371 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:14,371 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:25:14,371 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:14,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:25:14,382 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:25:14,386 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:25:14,386 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:25:14,386 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:25:14,387 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:25:14,416 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-04-13 10:25:14,417 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:25:14,419 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:25:14,421 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:25:14,421 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,422 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,422 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:25:14,433 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:25:14,435 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:25:14,435 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,436 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,438 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,439 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:13 [2018-04-13 10:25:14,450 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 1 [2018-04-13 10:25:14,451 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,451 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,451 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:18, output treesize:3 [2018-04-13 10:25:14,512 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:14,513 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:14,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 48 [2018-04-13 10:25:14,513 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,520 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,520 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:26, output treesize:33 [2018-04-13 10:25:14,552 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 36 [2018-04-13 10:25:14,554 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:14,555 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 52 [2018-04-13 10:25:14,555 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,560 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,565 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,565 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:48, output treesize:49 [2018-04-13 10:25:14,593 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 22 [2018-04-13 10:25:14,593 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,595 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:25:14,595 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:54, output treesize:26 [2018-04-13 10:25:14,673 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:14,674 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:14,674 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:14,675 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 97 [2018-04-13 10:25:14,675 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,684 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:25:14,684 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:84, output treesize:104 [2018-04-13 10:25:14,736 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 77 [2018-04-13 10:25:14,738 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:14,739 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:14,739 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 128 [2018-04-13 10:25:14,739 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,748 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,762 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,762 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:97, output treesize:106 [2018-04-13 10:25:14,812 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 67 [2018-04-13 10:25:14,812 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,816 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:25:14,816 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:112, output treesize:70 [2018-04-13 10:25:14,941 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:14,942 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 121 [2018-04-13 10:25:14,942 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,948 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:14,949 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:120, output treesize:64 [2018-04-13 10:25:15,019 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:15,027 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:15,027 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:15,028 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 121 [2018-04-13 10:25:15,028 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:15,035 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:15,035 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:77, output treesize:63 [2018-04-13 10:25:15,086 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 63 [2018-04-13 10:25:15,087 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:15,088 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:15,088 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:15,089 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:15,089 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 68 [2018-04-13 10:25:15,089 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:25:15,095 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:25:15,098 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:25:15,099 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:75, output treesize:20 [2018-04-13 10:25:15,143 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 73 proven. 30 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-04-13 10:25:15,143 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:25:15,143 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31] total 31 [2018-04-13 10:25:15,144 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-04-13 10:25:15,144 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-04-13 10:25:15,144 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=896, Unknown=0, NotChecked=0, Total=992 [2018-04-13 10:25:15,144 INFO L87 Difference]: Start difference. First operand 149 states and 156 transitions. Second operand 32 states. [2018-04-13 10:25:16,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:25:16,214 INFO L93 Difference]: Finished difference Result 182 states and 189 transitions. [2018-04-13 10:25:16,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-13 10:25:16,215 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 89 [2018-04-13 10:25:16,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:25:16,215 INFO L225 Difference]: With dead ends: 182 [2018-04-13 10:25:16,215 INFO L226 Difference]: Without dead ends: 180 [2018-04-13 10:25:16,216 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 109 GetRequests, 61 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 572 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=271, Invalid=2179, Unknown=0, NotChecked=0, Total=2450 [2018-04-13 10:25:16,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-04-13 10:25:16,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 165. [2018-04-13 10:25:16,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-04-13 10:25:16,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 174 transitions. [2018-04-13 10:25:16,218 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 174 transitions. Word has length 89 [2018-04-13 10:25:16,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:25:16,218 INFO L459 AbstractCegarLoop]: Abstraction has 165 states and 174 transitions. [2018-04-13 10:25:16,219 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-04-13 10:25:16,219 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 174 transitions. [2018-04-13 10:25:16,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-04-13 10:25:16,219 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:25:16,219 INFO L355 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:25:16,219 INFO L408 AbstractCegarLoop]: === Iteration 44 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:25:16,220 INFO L82 PathProgramCache]: Analyzing trace with hash -753865616, now seen corresponding path program 4 times [2018-04-13 10:25:16,220 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:25:16,220 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:25:16,221 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:16,221 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:25:16,221 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:16,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:25:16,237 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:25:16,241 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:25:16,241 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:25:16,242 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:25:16,242 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 10:25:16,266 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 10:25:16,266 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:25:16,269 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:25:16,288 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:25:16,290 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:25:16,290 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:16,291 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:16,292 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:16,293 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-04-13 10:25:16,372 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:25:16,374 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:16,376 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:25:16,376 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:16,380 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:16,384 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:16,384 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:12 [2018-04-13 10:25:16,551 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-13 10:25:16,551 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2018-04-13 10:25:16,552 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:16,552 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:16,553 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:16,553 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:23, output treesize:3 [2018-04-13 10:25:16,566 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 82 proven. 24 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-04-13 10:25:16,567 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:25:16,567 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2018-04-13 10:25:16,567 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-13 10:25:16,567 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-13 10:25:16,567 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2018-04-13 10:25:16,567 INFO L87 Difference]: Start difference. First operand 165 states and 174 transitions. Second operand 16 states. [2018-04-13 10:25:17,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:25:17,575 INFO L93 Difference]: Finished difference Result 165 states and 173 transitions. [2018-04-13 10:25:17,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-13 10:25:17,575 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 93 [2018-04-13 10:25:17,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:25:17,576 INFO L225 Difference]: With dead ends: 165 [2018-04-13 10:25:17,576 INFO L226 Difference]: Without dead ends: 165 [2018-04-13 10:25:17,577 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 84 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 180 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=184, Invalid=1006, Unknown=0, NotChecked=0, Total=1190 [2018-04-13 10:25:17,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-04-13 10:25:17,579 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 165. [2018-04-13 10:25:17,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-04-13 10:25:17,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 173 transitions. [2018-04-13 10:25:17,580 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 173 transitions. Word has length 93 [2018-04-13 10:25:17,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:25:17,581 INFO L459 AbstractCegarLoop]: Abstraction has 165 states and 173 transitions. [2018-04-13 10:25:17,581 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-13 10:25:17,581 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 173 transitions. [2018-04-13 10:25:17,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-04-13 10:25:17,581 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:25:17,582 INFO L355 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:25:17,582 INFO L408 AbstractCegarLoop]: === Iteration 45 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:25:17,582 INFO L82 PathProgramCache]: Analyzing trace with hash -335363046, now seen corresponding path program 5 times [2018-04-13 10:25:17,582 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:25:17,582 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:25:17,583 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:17,583 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:25:17,583 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:17,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:25:17,599 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:25:17,604 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:25:17,604 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:25:17,605 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:25:17,605 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 10:25:17,649 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2018-04-13 10:25:17,649 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:25:17,654 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:25:17,666 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-13 10:25:17,667 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:17,681 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-04-13 10:25:17,681 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:17,694 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:25:17,694 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-04-13 10:25:17,909 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:17,913 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 12 treesize of output 15 [2018-04-13 10:25:17,913 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:25:17,921 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 10:25:17,921 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:18, output treesize:30 [2018-04-13 10:25:18,104 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,104 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,105 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,118 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 40 treesize of output 57 [2018-04-13 10:25:18,118 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:25:18,184 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,184 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,185 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 50 [2018-04-13 10:25:18,185 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:18,241 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,242 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,242 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 31 [2018-04-13 10:25:18,242 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:18,244 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,244 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,245 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2018-04-13 10:25:18,245 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:18,295 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,295 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,296 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,298 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,303 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 42 treesize of output 77 [2018-04-13 10:25:18,303 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-04-13 10:25:18,382 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,383 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 38 [2018-04-13 10:25:18,383 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:18,442 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,443 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,443 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 30 [2018-04-13 10:25:18,443 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:18,502 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,503 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,503 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 28 [2018-04-13 10:25:18,503 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:18,558 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,559 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,559 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 35 [2018-04-13 10:25:18,559 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:18,561 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,561 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:18,561 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2018-04-13 10:25:18,562 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:18,620 INFO L267 ElimStorePlain]: Start of recursive call 1: 10 dim-0 vars, 8 dim-1 vars, End of recursive call: 14 dim-0 vars, and 6 xjuncts. [2018-04-13 10:25:18,621 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 18 variables, input treesize:155, output treesize:173 [2018-04-13 10:25:18,958 WARN L151 SmtUtils]: Spent 271ms on a formula simplification. DAG size of input: 87 DAG size of output 58 [2018-04-13 10:25:19,158 WARN L148 SmtUtils]: Spent 144ms on a formula simplification that was a NOOP. DAG size: 61 [2018-04-13 10:25:19,337 WARN L148 SmtUtils]: Spent 139ms on a formula simplification that was a NOOP. DAG size: 62 [2018-04-13 10:25:19,434 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,434 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,435 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 36 [2018-04-13 10:25:19,435 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:19,484 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,485 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,489 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 53 [2018-04-13 10:25:19,489 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 10:25:19,552 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,553 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,557 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 44 treesize of output 57 [2018-04-13 10:25:19,558 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-13 10:25:19,634 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,639 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 44 treesize of output 51 [2018-04-13 10:25:19,640 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-04-13 10:25:19,723 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,724 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,724 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 37 [2018-04-13 10:25:19,724 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:19,725 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,726 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,726 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 29 [2018-04-13 10:25:19,726 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:19,814 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,815 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,815 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,816 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,817 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,821 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 42 treesize of output 77 [2018-04-13 10:25:19,821 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 2 xjuncts. [2018-04-13 10:25:19,921 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,921 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,922 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 35 [2018-04-13 10:25:19,922 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:19,923 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,923 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:19,924 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 29 [2018-04-13 10:25:19,924 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:20,002 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:20,002 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:20,002 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 29 [2018-04-13 10:25:20,003 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:20,004 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:20,004 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:20,005 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 37 [2018-04-13 10:25:20,005 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:20,092 INFO L267 ElimStorePlain]: Start of recursive call 1: 12 dim-0 vars, 8 dim-1 vars, End of recursive call: 16 dim-0 vars, and 8 xjuncts. [2018-04-13 10:25:20,093 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 20 variables, input treesize:173, output treesize:213 [2018-04-13 10:25:20,292 WARN L151 SmtUtils]: Spent 127ms on a formula simplification. DAG size of input: 106 DAG size of output 27 [2018-04-13 10:25:20,570 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:20,570 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:20,571 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:20,572 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:20,572 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:20,577 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 48 treesize of output 83 [2018-04-13 10:25:20,578 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:25:20,653 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:20,654 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:20,654 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 54 [2018-04-13 10:25:20,654 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:20,656 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:20,657 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:20,658 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 52 [2018-04-13 10:25:20,658 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:20,702 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:20,703 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:20,703 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 53 [2018-04-13 10:25:20,703 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:20,741 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:20,743 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:20,749 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 44 treesize of output 57 [2018-04-13 10:25:20,750 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-04-13 10:25:20,805 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 4 dim-1 vars, End of recursive call: 10 dim-0 vars, and 4 xjuncts. [2018-04-13 10:25:20,805 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 10 variables, input treesize:95, output treesize:159 [2018-04-13 10:25:21,072 WARN L151 SmtUtils]: Spent 145ms on a formula simplification. DAG size of input: 77 DAG size of output 43 [2018-04-13 10:25:21,231 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,231 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,232 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,233 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,234 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,235 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 81 [2018-04-13 10:25:21,235 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:21,307 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,308 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,308 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,309 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,309 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 50 [2018-04-13 10:25:21,309 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:21,369 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,370 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,372 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 63 [2018-04-13 10:25:21,372 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:21,434 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,434 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,435 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,435 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 48 [2018-04-13 10:25:21,436 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:21,504 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,504 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,505 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,506 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,506 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 85 [2018-04-13 10:25:21,507 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:21,568 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,568 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,569 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,569 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,570 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,571 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 85 [2018-04-13 10:25:21,571 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:21,629 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,630 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,630 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,631 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,631 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 52 [2018-04-13 10:25:21,631 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:21,687 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,687 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,688 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:21,688 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 50 [2018-04-13 10:25:21,689 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:21,738 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 8 dim-1 vars, End of recursive call: 16 dim-0 vars, and 4 xjuncts. [2018-04-13 10:25:21,738 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 24 variables, input treesize:225, output treesize:177 [2018-04-13 10:25:22,506 WARN L151 SmtUtils]: Spent 664ms on a formula simplification. DAG size of input: 94 DAG size of output 74 [2018-04-13 10:25:22,992 WARN L148 SmtUtils]: Spent 384ms on a formula simplification that was a NOOP. DAG size: 78 [2018-04-13 10:25:23,436 WARN L148 SmtUtils]: Spent 358ms on a formula simplification that was a NOOP. DAG size: 78 [2018-04-13 10:25:23,683 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:23,683 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:23,683 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 66 [2018-04-13 10:25:23,684 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:23,817 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:23,818 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:23,819 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:23,821 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:23,822 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:23,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 59 treesize of output 104 [2018-04-13 10:25:23,831 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-04-13 10:25:24,058 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:24,061 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:24,062 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:24,063 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:24,072 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 73 treesize of output 118 [2018-04-13 10:25:24,072 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 4 xjuncts. [2018-04-13 10:25:24,365 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:24,365 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:24,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 68 [2018-04-13 10:25:24,366 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:24,593 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:24,594 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:24,594 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 73 [2018-04-13 10:25:24,595 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:24,596 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:24,596 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:24,597 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 61 [2018-04-13 10:25:24,597 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:24,599 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:24,599 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:24,599 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 61 [2018-04-13 10:25:24,600 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:24,818 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:24,819 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:24,819 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 68 [2018-04-13 10:25:24,819 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:25,047 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:25,048 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:25,049 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:25,050 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:25,051 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:25,051 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:25,061 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 8 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 61 treesize of output 116 [2018-04-13 10:25:25,061 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 4 xjuncts. [2018-04-13 10:25:25,365 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:25,365 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:25,366 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:25,367 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:25,368 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:25,369 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:25,379 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 69 treesize of output 122 [2018-04-13 10:25:25,380 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 4 xjuncts. [2018-04-13 10:25:25,760 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:25,761 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:25,761 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 72 [2018-04-13 10:25:25,761 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:26,064 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:26,065 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:26,066 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:26,067 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:26,068 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:26,069 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:26,077 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 8 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 61 treesize of output 116 [2018-04-13 10:25:26,077 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 4 xjuncts. [2018-04-13 10:25:26,510 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:26,511 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:26,511 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 63 [2018-04-13 10:25:26,511 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:26,513 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:26,513 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:26,514 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 63 [2018-04-13 10:25:26,514 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:26,515 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:26,516 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:26,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 69 [2018-04-13 10:25:26,516 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:26,891 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 65 treesize of output 72 [2018-04-13 10:25:26,891 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 4 xjuncts. [2018-04-13 10:25:27,306 INFO L267 ElimStorePlain]: Start of recursive call 1: 36 dim-0 vars, 12 dim-1 vars, End of recursive call: 84 dim-0 vars, and 18 xjuncts. [2018-04-13 10:25:27,306 INFO L202 ElimStorePlain]: Needed 17 recursive calls to eliminate 48 variables, input treesize:413, output treesize:887 [2018-04-13 10:25:28,887 WARN L151 SmtUtils]: Spent 1293ms on a formula simplification. DAG size of input: 431 DAG size of output 74 [2018-04-13 10:25:28,934 INFO L134 CoverageAnalysis]: Checked inductivity of 226 backedges. 25 proven. 176 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-04-13 10:25:28,934 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:25:28,934 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32] total 32 [2018-04-13 10:25:28,935 INFO L442 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-04-13 10:25:28,935 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-04-13 10:25:28,935 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=967, Unknown=0, NotChecked=0, Total=1056 [2018-04-13 10:25:28,935 INFO L87 Difference]: Start difference. First operand 165 states and 173 transitions. Second operand 33 states. [2018-04-13 10:25:29,239 WARN L148 SmtUtils]: Spent 112ms on a formula simplification that was a NOOP. DAG size: 66 [2018-04-13 10:25:29,406 WARN L148 SmtUtils]: Spent 127ms on a formula simplification that was a NOOP. DAG size: 76 [2018-04-13 10:25:30,585 WARN L151 SmtUtils]: Spent 217ms on a formula simplification. DAG size of input: 70 DAG size of output 49 [2018-04-13 10:25:30,882 WARN L151 SmtUtils]: Spent 221ms on a formula simplification. DAG size of input: 70 DAG size of output 46 [2018-04-13 10:25:31,169 WARN L151 SmtUtils]: Spent 221ms on a formula simplification. DAG size of input: 70 DAG size of output 48 [2018-04-13 10:25:31,789 WARN L151 SmtUtils]: Spent 187ms on a formula simplification. DAG size of input: 52 DAG size of output 52 [2018-04-13 10:25:33,425 WARN L151 SmtUtils]: Spent 672ms on a formula simplification. DAG size of input: 102 DAG size of output 100 [2018-04-13 10:25:33,937 WARN L148 SmtUtils]: Spent 369ms on a formula simplification that was a NOOP. DAG size: 82 [2018-04-13 10:25:35,036 WARN L148 SmtUtils]: Spent 347ms on a formula simplification that was a NOOP. DAG size: 78 [2018-04-13 10:25:35,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:25:35,389 INFO L93 Difference]: Finished difference Result 267 states and 288 transitions. [2018-04-13 10:25:35,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-13 10:25:35,389 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 96 [2018-04-13 10:25:35,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:25:35,390 INFO L225 Difference]: With dead ends: 267 [2018-04-13 10:25:35,390 INFO L226 Difference]: Without dead ends: 267 [2018-04-13 10:25:35,391 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 63 SyntacticMatches, 1 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 502 ImplicationChecksByTransitivity, 9.2s TimeCoverageRelationStatistics Valid=225, Invalid=2427, Unknown=0, NotChecked=0, Total=2652 [2018-04-13 10:25:35,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 267 states. [2018-04-13 10:25:35,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 267 to 172. [2018-04-13 10:25:35,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-04-13 10:25:35,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 182 transitions. [2018-04-13 10:25:35,394 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 182 transitions. Word has length 96 [2018-04-13 10:25:35,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:25:35,394 INFO L459 AbstractCegarLoop]: Abstraction has 172 states and 182 transitions. [2018-04-13 10:25:35,395 INFO L460 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-04-13 10:25:35,395 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 182 transitions. [2018-04-13 10:25:35,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-04-13 10:25:35,395 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:25:35,395 INFO L355 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:25:35,395 INFO L408 AbstractCegarLoop]: === Iteration 46 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:25:35,396 INFO L82 PathProgramCache]: Analyzing trace with hash 1482937064, now seen corresponding path program 6 times [2018-04-13 10:25:35,396 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:25:35,396 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:25:35,397 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:35,397 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:25:35,397 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:35,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:25:35,406 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:25:35,459 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 36 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2018-04-13 10:25:35,460 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:25:35,460 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:25:35,460 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 10:25:35,498 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-04-13 10:25:35,499 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:25:35,501 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:25:35,525 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 36 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2018-04-13 10:25:35,525 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:25:35,525 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 11 [2018-04-13 10:25:35,526 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-13 10:25:35,526 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-13 10:25:35,526 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2018-04-13 10:25:35,526 INFO L87 Difference]: Start difference. First operand 172 states and 182 transitions. Second operand 11 states. [2018-04-13 10:25:35,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:25:35,601 INFO L93 Difference]: Finished difference Result 184 states and 194 transitions. [2018-04-13 10:25:35,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-13 10:25:35,601 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 95 [2018-04-13 10:25:35,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:25:35,602 INFO L225 Difference]: With dead ends: 184 [2018-04-13 10:25:35,602 INFO L226 Difference]: Without dead ends: 184 [2018-04-13 10:25:35,602 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 95 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=63, Invalid=147, Unknown=0, NotChecked=0, Total=210 [2018-04-13 10:25:35,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-04-13 10:25:35,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 178. [2018-04-13 10:25:35,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-04-13 10:25:35,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 188 transitions. [2018-04-13 10:25:35,606 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 188 transitions. Word has length 95 [2018-04-13 10:25:35,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:25:35,606 INFO L459 AbstractCegarLoop]: Abstraction has 178 states and 188 transitions. [2018-04-13 10:25:35,606 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-13 10:25:35,606 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 188 transitions. [2018-04-13 10:25:35,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-04-13 10:25:35,607 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:25:35,607 INFO L355 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:25:35,607 INFO L408 AbstractCegarLoop]: === Iteration 47 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:25:35,607 INFO L82 PathProgramCache]: Analyzing trace with hash -1273592600, now seen corresponding path program 3 times [2018-04-13 10:25:35,607 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:25:35,607 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:25:35,608 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:35,608 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:25:35,608 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:35,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:25:35,622 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:25:35,626 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:25:35,626 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:25:35,626 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:25:35,627 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:25:35,660 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-04-13 10:25:35,660 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:25:35,665 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:25:35,667 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:25:35,668 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:35,669 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:35,669 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:25:35,702 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:35,703 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:35,703 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-13 10:25:35,703 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:35,704 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:35,704 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-04-13 10:25:35,733 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:25:35,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:25:35,734 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:35,735 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:35,738 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:35,739 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:20 [2018-04-13 10:25:36,122 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:25:36,124 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:36,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 36 [2018-04-13 10:25:36,125 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:36,128 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:36,132 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:25:36,133 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:47, output treesize:25 [2018-04-13 10:25:36,485 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 40 treesize of output 50 [2018-04-13 10:25:36,488 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:36,498 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 36 treesize of output 66 [2018-04-13 10:25:36,498 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 10:25:36,523 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:36,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 48 [2018-04-13 10:25:36,525 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:36,538 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:25:36,554 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 2 xjuncts. [2018-04-13 10:25:36,554 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 6 variables, input treesize:59, output treesize:77 [2018-04-13 10:25:37,419 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-04-13 10:25:37,423 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 21 [2018-04-13 10:25:37,423 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 10:25:37,425 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:25:37,431 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-04-13 10:25:37,431 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:42, output treesize:55 [2018-04-13 10:25:37,501 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:37,501 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 34 [2018-04-13 10:25:37,501 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:37,517 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:37,520 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 33 treesize of output 36 [2018-04-13 10:25:37,520 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 10:25:37,539 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-1 vars, End of recursive call: 5 dim-0 vars, and 3 xjuncts. [2018-04-13 10:25:37,539 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:63, output treesize:84 [2018-04-13 10:25:37,833 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 32 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:25:37,833 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:25:37,833 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27] total 27 [2018-04-13 10:25:37,834 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-04-13 10:25:37,834 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-04-13 10:25:37,834 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=666, Unknown=0, NotChecked=0, Total=756 [2018-04-13 10:25:37,834 INFO L87 Difference]: Start difference. First operand 178 states and 188 transitions. Second operand 28 states. [2018-04-13 10:25:41,623 WARN L151 SmtUtils]: Spent 163ms on a formula simplification. DAG size of input: 64 DAG size of output 44 [2018-04-13 10:25:42,157 WARN L151 SmtUtils]: Spent 197ms on a formula simplification. DAG size of input: 61 DAG size of output 53 [2018-04-13 10:25:42,662 WARN L151 SmtUtils]: Spent 222ms on a formula simplification. DAG size of input: 64 DAG size of output 56 [2018-04-13 10:25:44,639 WARN L151 SmtUtils]: Spent 217ms on a formula simplification. DAG size of input: 67 DAG size of output 59 [2018-04-13 10:25:45,191 WARN L151 SmtUtils]: Spent 171ms on a formula simplification. DAG size of input: 67 DAG size of output 47 [2018-04-13 10:25:45,868 WARN L151 SmtUtils]: Spent 189ms on a formula simplification. DAG size of input: 64 DAG size of output 56 [2018-04-13 10:25:46,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:25:46,367 INFO L93 Difference]: Finished difference Result 261 states and 273 transitions. [2018-04-13 10:25:46,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2018-04-13 10:25:46,367 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 96 [2018-04-13 10:25:46,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:25:46,368 INFO L225 Difference]: With dead ends: 261 [2018-04-13 10:25:46,368 INFO L226 Difference]: Without dead ends: 261 [2018-04-13 10:25:46,369 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 153 GetRequests, 69 SyntacticMatches, 3 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1669 ImplicationChecksByTransitivity, 7.6s TimeCoverageRelationStatistics Valid=1067, Invalid=5739, Unknown=0, NotChecked=0, Total=6806 [2018-04-13 10:25:46,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 261 states. [2018-04-13 10:25:46,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 261 to 185. [2018-04-13 10:25:46,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-04-13 10:25:46,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 196 transitions. [2018-04-13 10:25:46,372 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 196 transitions. Word has length 96 [2018-04-13 10:25:46,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:25:46,372 INFO L459 AbstractCegarLoop]: Abstraction has 185 states and 196 transitions. [2018-04-13 10:25:46,373 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-04-13 10:25:46,373 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 196 transitions. [2018-04-13 10:25:46,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-04-13 10:25:46,373 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:25:46,373 INFO L355 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:25:46,373 INFO L408 AbstractCegarLoop]: === Iteration 48 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:25:46,373 INFO L82 PathProgramCache]: Analyzing trace with hash 334163448, now seen corresponding path program 7 times [2018-04-13 10:25:46,373 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:25:46,374 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:25:46,374 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:46,374 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:25:46,374 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:46,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:25:46,387 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:25:46,390 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:25:46,390 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:25:46,390 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:25:46,391 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:25:46,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:25:46,428 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:25:46,463 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 10:25:46,463 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:46,467 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:46,467 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:14 [2018-04-13 10:25:46,541 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:46,542 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:46,543 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 12 [2018-04-13 10:25:46,543 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:46,548 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:46,548 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:14 [2018-04-13 10:25:46,583 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:25:46,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:25:46,585 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:46,586 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:46,590 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:46,591 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:22 [2018-04-13 10:25:46,781 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 21 [2018-04-13 10:25:46,782 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:46,810 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 32 [2018-04-13 10:25:46,811 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:46,813 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:46,817 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:46,818 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:20 [2018-04-13 10:25:47,011 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2018-04-13 10:25:47,012 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 4 [2018-04-13 10:25:47,012 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:47,013 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:47,016 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:47,016 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:10 [2018-04-13 10:25:47,043 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:47,044 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:25:47,044 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:47,047 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:25:47,047 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-04-13 10:25:47,091 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 40 proven. 100 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-04-13 10:25:47,091 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:25:47,091 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23] total 23 [2018-04-13 10:25:47,092 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-13 10:25:47,092 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-13 10:25:47,092 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=488, Unknown=0, NotChecked=0, Total=552 [2018-04-13 10:25:47,092 INFO L87 Difference]: Start difference. First operand 185 states and 196 transitions. Second operand 24 states. [2018-04-13 10:25:48,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:25:48,037 INFO L93 Difference]: Finished difference Result 300 states and 317 transitions. [2018-04-13 10:25:48,038 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-13 10:25:48,038 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 100 [2018-04-13 10:25:48,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:25:48,038 INFO L225 Difference]: With dead ends: 300 [2018-04-13 10:25:48,038 INFO L226 Difference]: Without dead ends: 300 [2018-04-13 10:25:48,039 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 77 SyntacticMatches, 3 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 387 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=222, Invalid=1670, Unknown=0, NotChecked=0, Total=1892 [2018-04-13 10:25:48,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 300 states. [2018-04-13 10:25:48,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 300 to 215. [2018-04-13 10:25:48,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 215 states. [2018-04-13 10:25:48,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 215 states to 215 states and 226 transitions. [2018-04-13 10:25:48,041 INFO L78 Accepts]: Start accepts. Automaton has 215 states and 226 transitions. Word has length 100 [2018-04-13 10:25:48,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:25:48,041 INFO L459 AbstractCegarLoop]: Abstraction has 215 states and 226 transitions. [2018-04-13 10:25:48,041 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-13 10:25:48,041 INFO L276 IsEmpty]: Start isEmpty. Operand 215 states and 226 transitions. [2018-04-13 10:25:48,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-04-13 10:25:48,042 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:25:48,042 INFO L355 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:25:48,042 INFO L408 AbstractCegarLoop]: === Iteration 49 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:25:48,042 INFO L82 PathProgramCache]: Analyzing trace with hash 1769132412, now seen corresponding path program 5 times [2018-04-13 10:25:48,042 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:25:48,042 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:25:48,043 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:48,043 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:25:48,043 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:48,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:25:48,053 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:25:48,056 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:25:48,056 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:25:48,056 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:25:48,057 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 10:25:48,083 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-04-13 10:25:48,084 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:25:48,086 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:25:48,147 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:25:48,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:25:48,148 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:48,149 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:48,169 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:48,169 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:25:48,226 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:25:48,228 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:48,229 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:25:48,229 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:48,234 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:48,240 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:48,240 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:16 [2018-04-13 10:25:48,276 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:25:48,278 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:48,279 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:25:48,279 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:48,282 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:48,287 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:48,287 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:16 [2018-04-13 10:25:48,396 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-13 10:25:48,396 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-13 10:25:48,397 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:48,397 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:48,398 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:48,398 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:15, output treesize:3 [2018-04-13 10:25:48,416 INFO L134 CoverageAnalysis]: Checked inductivity of 158 backedges. 32 proven. 104 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-04-13 10:25:48,417 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:25:48,417 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19] total 19 [2018-04-13 10:25:48,417 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-13 10:25:48,417 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-13 10:25:48,417 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=322, Unknown=0, NotChecked=0, Total=380 [2018-04-13 10:25:48,417 INFO L87 Difference]: Start difference. First operand 215 states and 226 transitions. Second operand 20 states. [2018-04-13 10:25:48,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:25:48,925 INFO L93 Difference]: Finished difference Result 296 states and 312 transitions. [2018-04-13 10:25:48,925 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-04-13 10:25:48,925 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 101 [2018-04-13 10:25:48,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:25:48,926 INFO L225 Difference]: With dead ends: 296 [2018-04-13 10:25:48,926 INFO L226 Difference]: Without dead ends: 296 [2018-04-13 10:25:48,926 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 79 SyntacticMatches, 5 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 453 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=246, Invalid=1560, Unknown=0, NotChecked=0, Total=1806 [2018-04-13 10:25:48,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 296 states. [2018-04-13 10:25:48,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 296 to 216. [2018-04-13 10:25:48,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 216 states. [2018-04-13 10:25:48,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 216 states to 216 states and 226 transitions. [2018-04-13 10:25:48,929 INFO L78 Accepts]: Start accepts. Automaton has 216 states and 226 transitions. Word has length 101 [2018-04-13 10:25:48,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:25:48,929 INFO L459 AbstractCegarLoop]: Abstraction has 216 states and 226 transitions. [2018-04-13 10:25:48,929 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-13 10:25:48,929 INFO L276 IsEmpty]: Start isEmpty. Operand 216 states and 226 transitions. [2018-04-13 10:25:48,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-04-13 10:25:48,930 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:25:48,930 INFO L355 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:25:48,930 INFO L408 AbstractCegarLoop]: === Iteration 50 === [__U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr6AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr7AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__entry_pointErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test___true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation]=== [2018-04-13 10:25:48,930 INFO L82 PathProgramCache]: Analyzing trace with hash 173290175, now seen corresponding path program 4 times [2018-04-13 10:25:48,930 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:25:48,930 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:25:48,931 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:48,931 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:25:48,931 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:25:48,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:25:48,941 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:25:48,945 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:25:48,945 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:25:48,945 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:25:48,945 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 10:25:48,969 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 10:25:48,969 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:25:48,972 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:25:49,106 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 68 [2018-04-13 10:25:49,109 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:25:49,109 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:49,124 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:49,127 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 68 [2018-04-13 10:25:49,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:25:49,130 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:49,161 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:49,271 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 68 [2018-04-13 10:25:49,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:25:49,274 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:49,288 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:49,292 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 68 [2018-04-13 10:25:49,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:25:49,309 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:49,322 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:49,411 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 64 [2018-04-13 10:25:49,413 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:25:49,413 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:49,424 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:49,427 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 64 [2018-04-13 10:25:49,428 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:25:49,429 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:49,440 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:49,507 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 64 [2018-04-13 10:25:49,508 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:25:49,508 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:49,518 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:49,520 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 64 [2018-04-13 10:25:49,521 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:25:49,521 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:49,530 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:49,583 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-04-13 10:25:49,583 INFO L202 ElimStorePlain]: Needed 17 recursive calls to eliminate 8 variables, input treesize:285, output treesize:261 [2018-04-13 10:25:49,725 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 27 [2018-04-13 10:25:49,725 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:49,745 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 27 [2018-04-13 10:25:49,745 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:49,762 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 27 [2018-04-13 10:25:49,762 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:49,777 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 3 dim-1 vars, End of recursive call: 6 dim-0 vars, and 3 xjuncts. [2018-04-13 10:25:49,777 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 9 variables, input treesize:109, output treesize:82 [2018-04-13 10:25:49,988 WARN L148 SmtUtils]: Spent 168ms on a formula simplification that was a NOOP. DAG size: 51 [2018-04-13 10:25:50,289 WARN L148 SmtUtils]: Spent 257ms on a formula simplification that was a NOOP. DAG size: 56 [2018-04-13 10:25:50,588 WARN L148 SmtUtils]: Spent 256ms on a formula simplification that was a NOOP. DAG size: 56 [2018-04-13 10:25:50,953 WARN L151 SmtUtils]: Spent 328ms on a formula simplification. DAG size of input: 90 DAG size of output 43 [2018-04-13 10:25:51,022 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 121 treesize of output 110 [2018-04-13 10:25:51,025 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:51,025 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:51,026 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 109 [2018-04-13 10:25:51,026 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:51,049 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:51,132 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 121 treesize of output 116 [2018-04-13 10:25:51,134 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:51,135 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 38 [2018-04-13 10:25:51,135 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:51,150 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:51,223 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 121 treesize of output 110 [2018-04-13 10:25:51,225 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:51,225 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:51,226 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 109 [2018-04-13 10:25:51,226 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:51,241 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:51,307 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 117 treesize of output 114 [2018-04-13 10:25:51,309 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:25:51,309 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:51,321 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:51,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 117 treesize of output 114 [2018-04-13 10:25:51,384 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:25:51,384 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:51,398 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:51,456 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 117 treesize of output 108 [2018-04-13 10:25:51,458 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:51,459 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:51,459 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 96 [2018-04-13 10:25:51,460 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:51,473 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:51,522 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 6 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-04-13 10:25:51,522 INFO L202 ElimStorePlain]: Needed 13 recursive calls to eliminate 12 variables, input treesize:364, output treesize:322 [2018-04-13 10:25:51,688 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:51,689 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 59 [2018-04-13 10:25:51,705 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:51,706 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:51,706 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:51,706 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 33 [2018-04-13 10:25:51,707 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:51,713 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:51,739 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:51,739 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 59 [2018-04-13 10:25:51,754 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:51,754 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:51,755 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:51,755 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 33 [2018-04-13 10:25:51,756 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:51,761 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:51,787 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:51,787 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 69 [2018-04-13 10:25:51,829 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:51,829 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:51,830 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:51,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 33 [2018-04-13 10:25:51,830 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:51,837 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:51,859 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 3 dim-1 vars, End of recursive call: 6 dim-0 vars, and 3 xjuncts. [2018-04-13 10:25:51,859 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 9 variables, input treesize:172, output treesize:154 [2018-04-13 10:25:52,040 WARN L148 SmtUtils]: Spent 122ms on a formula simplification that was a NOOP. DAG size: 70 [2018-04-13 10:25:52,318 WARN L148 SmtUtils]: Spent 186ms on a formula simplification that was a NOOP. DAG size: 75 [2018-04-13 10:25:52,580 WARN L148 SmtUtils]: Spent 182ms on a formula simplification that was a NOOP. DAG size: 75 [2018-04-13 10:25:53,114 WARN L151 SmtUtils]: Spent 436ms on a formula simplification. DAG size of input: 228 DAG size of output 45 [2018-04-13 10:25:53,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 136 treesize of output 119 [2018-04-13 10:25:53,205 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:53,206 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:53,207 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:53,208 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:53,208 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:53,209 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:53,210 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 150 [2018-04-13 10:25:53,210 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:53,235 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:53,354 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 136 treesize of output 117 [2018-04-13 10:25:53,357 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:53,357 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:53,358 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:53,359 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:53,360 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:53,360 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:53,361 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 8 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 158 [2018-04-13 10:25:53,361 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:53,384 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:53,475 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 132 treesize of output 127 [2018-04-13 10:25:53,477 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:53,478 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 28 [2018-04-13 10:25:53,478 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:53,495 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:53,601 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 136 treesize of output 117 [2018-04-13 10:25:53,603 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:53,604 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:53,605 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:53,605 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:53,606 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:53,607 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:53,607 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 7 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 158 [2018-04-13 10:25:53,608 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:53,632 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:53,708 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 132 treesize of output 129 [2018-04-13 10:25:53,715 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:25:53,715 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:53,733 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:53,815 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 132 treesize of output 129 [2018-04-13 10:25:53,817 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:25:53,817 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:53,842 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:53,905 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 6 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-04-13 10:25:53,906 INFO L202 ElimStorePlain]: Needed 13 recursive calls to eliminate 12 variables, input treesize:409, output treesize:367 [2018-04-13 10:25:54,129 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 92 [2018-04-13 10:25:54,161 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,162 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,162 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,163 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 87 [2018-04-13 10:25:54,178 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,179 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,180 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,180 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,180 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 9 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 82 [2018-04-13 10:25:54,181 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:54,187 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:54,199 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:54,241 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,242 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 102 [2018-04-13 10:25:54,266 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,266 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,267 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,267 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 87 [2018-04-13 10:25:54,283 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,283 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,284 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,284 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,285 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 8 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 82 [2018-04-13 10:25:54,285 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:54,291 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:54,301 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:54,340 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,340 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 102 [2018-04-13 10:25:54,364 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,365 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,365 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 95 [2018-04-13 10:25:54,381 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,382 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,382 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,383 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:25:54,383 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 8 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 82 [2018-04-13 10:25:54,383 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-13 10:25:54,388 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:54,399 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:25:54,434 INFO L267 ElimStorePlain]: Start of recursive call 1: 9 dim-0 vars, 3 dim-1 vars, End of recursive call: 9 dim-0 vars, and 3 xjuncts. [2018-04-13 10:25:54,435 INFO L202 ElimStorePlain]: Needed 10 recursive calls to eliminate 12 variables, input treesize:280, output treesize:310 [2018-04-13 10:25:54,614 WARN L148 SmtUtils]: Spent 112ms on a formula simplification that was a NOOP. DAG size: 105 [2018-04-13 10:25:56,365 WARN L151 SmtUtils]: Spent 1632ms on a formula simplification. DAG size of input: 146 DAG size of output 142 [2018-04-13 10:25:57,144 WARN L148 SmtUtils]: Spent 683ms on a formula simplification that was a NOOP. DAG size: 143 [2018-04-13 10:25:59,048 WARN L151 SmtUtils]: Spent 1778ms on a formula simplification. DAG size of input: 147 DAG size of output 145 [2018-04-13 10:25:59,860 WARN L148 SmtUtils]: Spent 700ms on a formula simplification that was a NOOP. DAG size: 143 [2018-04-13 10:26:00,734 WARN L148 SmtUtils]: Spent 745ms on a formula simplification that was a NOOP. DAG size: 142 [2018-04-13 10:26:02,624 WARN L151 SmtUtils]: Spent 1728ms on a formula simplification. DAG size of input: 148 DAG size of output 146 [2018-04-13 10:26:03,561 WARN L148 SmtUtils]: Spent 813ms on a formula simplification that was a NOOP. DAG size: 145 [2018-04-13 10:26:04,486 WARN L148 SmtUtils]: Spent 785ms on a formula simplification that was a NOOP. DAG size: 146 [2018-04-13 10:26:04,503 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 269 treesize of output 233 [2018-04-13 10:26:04,509 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:04,509 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:04,510 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:04,515 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:04,517 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:04,517 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:04,518 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:04,521 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:04,522 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:04,528 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:04,540 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 11 disjoint index pairs (out of 10 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 229 treesize of output 305 [2018-04-13 10:26:04,544 INFO L267 ElimStorePlain]: Start of recursive call 3: 17 dim-0 vars, End of recursive call: 17 dim-0 vars, and 6 xjuncts. [2018-04-13 10:26:05,727 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:05,728 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:05,737 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:05,739 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:05,741 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:05,743 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:05,745 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:05,760 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:05,762 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:05,772 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:26:05,857 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 21 disjoint index pairs (out of 28 index pairs), introduced 7 new quantified variables, introduced 18 case distinctions, treesize of input 218 treesize of output 482 [2018-04-13 10:26:05,858 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 18 [2018-04-13 10:26:10,688 WARN L152 XnfTransformerHelper]: Simplifying disjunction of 262144 conjuctions. This might take some time... Received shutdown request... [2018-04-13 10:35:16,007 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-04-13 10:35:16,008 WARN L519 AbstractCegarLoop]: Verification canceled [2018-04-13 10:35:16,012 WARN L197 ceAbstractionStarter]: Timeout [2018-04-13 10:35:16,012 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 13.04 10:35:16 BoogieIcfgContainer [2018-04-13 10:35:16,012 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-04-13 10:35:16,013 INFO L168 Benchmark]: Toolchain (without parser) took 841027.48 ms. Allocated memory was 405.3 MB in the beginning and 1.9 GB in the end (delta: 1.5 GB). Free memory was 334.9 MB in the beginning and 754.4 MB in the end (delta: -419.5 MB). Peak memory consumption was 1.7 GB. Max. memory is 5.3 GB. [2018-04-13 10:35:16,014 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 405.3 MB. Free memory is still 368.2 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-13 10:35:16,014 INFO L168 Benchmark]: CACSL2BoogieTranslator took 302.53 ms. Allocated memory is still 405.3 MB. Free memory was 334.9 MB in the beginning and 292.4 MB in the end (delta: 42.5 MB). Peak memory consumption was 42.5 MB. Max. memory is 5.3 GB. [2018-04-13 10:35:16,014 INFO L168 Benchmark]: Boogie Preprocessor took 52.51 ms. Allocated memory is still 405.3 MB. Free memory was 292.4 MB in the beginning and 288.3 MB in the end (delta: 4.1 MB). Peak memory consumption was 4.1 MB. Max. memory is 5.3 GB. [2018-04-13 10:35:16,015 INFO L168 Benchmark]: RCFGBuilder took 712.52 ms. Allocated memory was 405.3 MB in the beginning and 616.6 MB in the end (delta: 211.3 MB). Free memory was 288.3 MB in the beginning and 485.8 MB in the end (delta: -197.5 MB). Peak memory consumption was 29.3 MB. Max. memory is 5.3 GB. [2018-04-13 10:35:16,015 INFO L168 Benchmark]: TraceAbstraction took 839957.10 ms. Allocated memory was 616.6 MB in the beginning and 1.9 GB in the end (delta: 1.3 GB). Free memory was 485.8 MB in the beginning and 754.4 MB in the end (delta: -268.6 MB). Peak memory consumption was 1.6 GB. Max. memory is 5.3 GB. [2018-04-13 10:35:16,016 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 405.3 MB. Free memory is still 368.2 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 302.53 ms. Allocated memory is still 405.3 MB. Free memory was 334.9 MB in the beginning and 292.4 MB in the end (delta: 42.5 MB). Peak memory consumption was 42.5 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 52.51 ms. Allocated memory is still 405.3 MB. Free memory was 292.4 MB in the beginning and 288.3 MB in the end (delta: 4.1 MB). Peak memory consumption was 4.1 MB. Max. memory is 5.3 GB. * RCFGBuilder took 712.52 ms. Allocated memory was 405.3 MB in the beginning and 616.6 MB in the end (delta: 211.3 MB). Free memory was 288.3 MB in the beginning and 485.8 MB in the end (delta: -197.5 MB). Peak memory consumption was 29.3 MB. Max. memory is 5.3 GB. * TraceAbstraction took 839957.10 ms. Allocated memory was 616.6 MB in the beginning and 1.9 GB in the end (delta: 1.3 GB). Free memory was 485.8 MB in the beginning and 754.4 MB in the end (delta: -268.6 MB). Peak memory consumption was 1.6 GB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1163]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1163). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1164]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1164). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1163]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1163). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1164]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1164). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1163]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1163). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1163]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1163). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1100]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1100]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1099]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1099]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1131]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1131). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1131]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1131). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1131]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1131). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1131]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1131). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1411]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1411]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1256]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1256). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1258]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1258). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1258]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1258). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1256]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1256). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1340]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1344]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1344]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1339]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1339]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1340]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1108]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1108). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1109]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1109). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1109]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1109). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1107]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1107). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1108]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1108). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1110]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1110). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1107]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1107). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1110]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1110). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1460]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1460). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1294]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1294]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1135]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1135). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1135]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1135). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1135]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1135). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1135]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1135). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1448]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1448). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1453]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1453). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1453]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1453). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1455]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1455). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1448]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1448). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1453]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1453). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1455]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1455). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1453]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1453). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1179]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1179]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1179]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1179]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1179]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1179]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1126]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1126). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1126]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1126). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1193]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1193). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1193]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1193). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1146]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1146). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1146]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1146). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1115]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1115). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1116]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1116). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1116]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1116). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1115]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1115). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1156]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1156). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1156]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1156). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1156]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1156). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1156]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1156). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1157]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1157). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1157]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1157). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1198]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1198). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1198]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1198). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1267]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1267]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1265]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1265]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1121]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1121). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - TimeoutResultAtElement [Line: 1121]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1121). Cancelled while BasicCegarLoop was analyzing trace of length 101 with TraceHistMax 5, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 262144 conjuctions. . - StatisticsResult: Ultimate Automizer benchmark data CFG has 43 procedures, 352 locations, 79 error locations. TIMEOUT Result, 839.9s OverallTime, 50 OverallIterations, 7 TraceHistogramMax, 179.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2466 SDtfs, 5687 SDslu, 17422 SDs, 0 SdLazy, 22000 SolverSat, 1198 SolverUnsat, 162 SolverUnknown, 0 SolverNotchecked, 128.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 3199 GetRequests, 1999 SyntacticMatches, 51 SemanticMatches, 1149 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 9257 ImplicationChecksByTransitivity, 113.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=216occurred in iteration=49, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 49 MinimizatonAttempts, 1254 StatesRemovedByMinimization, 41 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 1.1s SatisfiabilityAnalysisTime, 91.2s InterpolantComputationTime, 5335 NumberOfCodeBlocks, 5335 NumberOfCodeBlocksAsserted, 138 NumberOfCheckSat, 3464 ConstructedInterpolants, 558 QuantifiedInterpolants, 3489684 SizeOfPredicates, 321 NumberOfNonLiveVariables, 9322 ConjunctsInSsa, 1282 ConjunctsInUnsatCore, 61 InterpolantComputations, 13 PerfectInterpolantSequences, 1468/3070 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test18_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-13_10-35-16-024.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test18_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-04-13_10-35-16-024.csv Completed graceful shutdown